target/linux/ramips/patches-3.8/0012-Document-devicetree-add-OF-documents-for-MIPS-interr.patch

   1 From dae867771332e7541783ebb6bacf33356ad449b3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 31 Jan 2013 13:44:10 +0100
   4 Subject: [PATCH 12/79] Document: devicetree: add OF documents for MIPS
   5  interrupt controller
   6
   7 Signed-off-by: John Crispin <blogic@openwrt.org>
   8 Acked-by: David Daney <david.daney@cavium.com>
   9 Patchwork: http://patchwork.linux-mips.org/patch/4901/
  10 ---
  11  Documentation/devicetree/bindings/mips/cpu_irq.txt |   47 ++++++++++++++++++++
  12  1 file changed, 47 insertions(+)
  13  create mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt
  14
  15 diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt
  16 new file mode 100644
  17 index 0000000..13aa4b6
  18 --- /dev/null
  19 +++ b/Documentation/devicetree/bindings/mips/cpu_irq.txt
  20 @@ -0,0 +1,47 @@
  21 +MIPS CPU interrupt controller
  22 +
  23 +On MIPS the mips_cpu_intc_init() helper can be used to initialize the 8 CPU
  24 +IRQs from a devicetree file and create a irq_domain for IRQ controller.
  25 +
  26 +With the irq_domain in place we can describe how the 8 IRQs are wired to the
  27 +platforms internal interrupt controller cascade.
  28 +
  29 +Below is an example of a platform describing the cascade inside the devicetree
  30 +and the code used to load it inside arch_init_irq().
  31 +
  32 +Required properties:
  33 +- compatible : Should be "mti,cpu-interrupt-controller"
  34 +
  35 +Example devicetree:
  36 +       cpu-irq: cpu-irq@0 {
  37 +               #address-cells = <0>;
  38 +
  39 +               interrupt-controller;
  40 +               #interrupt-cells = <1>;
  41 +
  42 +               compatible = "mti,cpu-interrupt-controller";
  43 +       };
  44 +
  45 +       intc: intc@200 {
  46 +               compatible = "ralink,rt2880-intc";
  47 +               reg = <0x200 0x100>;
  48 +
  49 +               interrupt-controller;
  50 +               #interrupt-cells = <1>;
  51 +
  52 +               interrupt-parent = <&cpu-irq>;
  53 +               interrupts = <2>;
  54 +       };
  55 +
  56 +
  57 +Example platform irq.c:
  58 +static struct of_device_id __initdata of_irq_ids[] = {
  59 +       { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
  60 +       { .compatible = "ralink,rt2880-intc", .data = intc_of_init },
  61 +       {},
  62 +};
  63 +
  64 +void __init arch_init_irq(void)
  65 +{
  66 +       of_irq_init(of_irq_ids);
  67 +}
  68 --
  69 1.7.10.4
  70