generic: ar8216: set chip type directly in ar8216_id_chip
[openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2  * ar8216.c: AR8216 switch driver
3  *
4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include "ar8216.h"
33
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS        128
36 #define AR8X16_PROBE_RETRIES    10
37
38 struct ar8216_priv {
39         struct switch_dev dev;
40         struct phy_device *phy;
41         u32 (*read)(struct ar8216_priv *priv, int reg);
42         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43         const struct net_device_ops *ndo_old;
44         struct net_device_ops ndo;
45         struct mutex reg_mutex;
46         int chip;
47         bool initialized;
48         bool port4_phy;
49         char buf[80];
50
51         bool init;
52
53         /* all fields below are cleared on reset */
54         bool vlan;
55         u16 vlan_id[AR8X16_MAX_VLANS];
56         u8 vlan_table[AR8X16_MAX_VLANS];
57         u8 vlan_tagged;
58         u16 pvid[AR8216_NUM_PORTS];
59 };
60
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
62
63 static inline void
64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
65 {
66         regaddr >>= 1;
67         *r1 = regaddr & 0x1e;
68
69         regaddr >>= 5;
70         *r2 = regaddr & 0x7;
71
72         regaddr >>= 3;
73         *page = regaddr & 0x1ff;
74 }
75
76 static u32
77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
78 {
79         struct phy_device *phy = priv->phy;
80         struct mii_bus *bus = phy->bus;
81         u16 r1, r2, page;
82         u16 lo, hi;
83
84         split_addr((u32) reg, &r1, &r2, &page);
85
86         mutex_lock(&bus->mdio_lock);
87
88         bus->write(bus, 0x18, 0, page);
89         msleep(1); /* wait for the page switch to propagate */
90         lo = bus->read(bus, 0x10 | r2, r1);
91         hi = bus->read(bus, 0x10 | r2, r1 + 1);
92
93         mutex_unlock(&bus->mdio_lock);
94
95         return (hi << 16) | lo;
96 }
97
98 static void
99 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
100 {
101         struct phy_device *phy = priv->phy;
102         struct mii_bus *bus = phy->bus;
103         u16 r1, r2, r3;
104         u16 lo, hi;
105
106         split_addr((u32) reg, &r1, &r2, &r3);
107         lo = val & 0xffff;
108         hi = (u16) (val >> 16);
109
110         mutex_lock(&bus->mdio_lock);
111
112         bus->write(bus, 0x18, 0, r3);
113         msleep(1); /* wait for the page switch to propagate */
114         bus->write(bus, 0x10 | r2, r1 + 1, hi);
115         bus->write(bus, 0x10 | r2, r1, lo);
116
117         mutex_unlock(&bus->mdio_lock);
118 }
119
120 static u32
121 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
122 {
123         u32 v;
124
125         v = priv->read(priv, reg);
126         v &= ~mask;
127         v |= val;
128         priv->write(priv, reg, v);
129
130         return v;
131 }
132
133 static inline int
134 ar8216_id_chip(struct ar8216_priv *priv)
135 {
136         u32 val;
137         u16 id;
138         int i;
139
140         priv->chip = UNKNOWN;
141
142         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
143         if (val == ~0)
144                 return -ENODEV;
145
146         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
147         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
148                 u16 t;
149
150                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
151                 if (val == ~0)
152                         return -ENODEV;
153
154                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
155                 if (t != id)
156                         return -ENODEV;
157         }
158
159         switch (id) {
160         case 0x0101:
161                 priv->chip = AR8216;
162                 break;
163         case 0x0301:
164                 priv->chip = AR8236;
165                 break;
166         case 0x1000:
167         case 0x1001:
168                 priv->chip = AR8316;
169                 break;
170         default:
171                 printk(KERN_DEBUG
172                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
173                         (int)(id >> AR8216_CTRL_VERSION_S),
174                         (int)(id & AR8216_CTRL_REVISION),
175                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
176                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
177
178                 return -ENODEV;
179         }
180
181         return 0;
182 }
183
184 static void
185 ar8216_read_port_link(struct ar8216_priv *priv, int port,
186                       struct switch_port_link *link)
187 {
188         u32 status;
189         u32 speed;
190
191         memset(link, '\0', sizeof(*link));
192
193         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
194
195         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
196         if (link->aneg) {
197                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
198                 if (!link->link)
199                         return;
200         } else {
201                 link->link = true;
202         }
203
204         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
205         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
206         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
207
208         speed = (status & AR8216_PORT_STATUS_SPEED) >>
209                  AR8216_PORT_STATUS_SPEED_S;
210
211         switch (speed) {
212         case AR8216_PORT_SPEED_10M:
213                 link->speed = SWITCH_PORT_SPEED_10;
214                 break;
215         case AR8216_PORT_SPEED_100M:
216                 link->speed = SWITCH_PORT_SPEED_100;
217                 break;
218         case AR8216_PORT_SPEED_1000M:
219                 link->speed = SWITCH_PORT_SPEED_1000;
220                 break;
221         default:
222                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
223                 break;
224         }
225 }
226
227 static int
228 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
229                 struct switch_val *val)
230 {
231         struct ar8216_priv *priv = to_ar8216(dev);
232         priv->vlan = !!val->value.i;
233         return 0;
234 }
235
236 static int
237 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
238                 struct switch_val *val)
239 {
240         struct ar8216_priv *priv = to_ar8216(dev);
241         val->value.i = priv->vlan;
242         return 0;
243 }
244
245
246 static int
247 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
248 {
249         struct ar8216_priv *priv = to_ar8216(dev);
250
251         /* make sure no invalid PVIDs get set */
252
253         if (vlan >= dev->vlans)
254                 return -EINVAL;
255
256         priv->pvid[port] = vlan;
257         return 0;
258 }
259
260 static int
261 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
262 {
263         struct ar8216_priv *priv = to_ar8216(dev);
264         *vlan = priv->pvid[port];
265         return 0;
266 }
267
268 static int
269 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
270                 struct switch_val *val)
271 {
272         struct ar8216_priv *priv = to_ar8216(dev);
273         priv->vlan_id[val->port_vlan] = val->value.i;
274         return 0;
275 }
276
277 static int
278 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
279                 struct switch_val *val)
280 {
281         struct ar8216_priv *priv = to_ar8216(dev);
282         val->value.i = priv->vlan_id[val->port_vlan];
283         return 0;
284 }
285
286 static int
287 ar8216_get_port_link(struct switch_dev *dev, int port,
288                      struct switch_port_link *link)
289 {
290         struct ar8216_priv *priv = to_ar8216(dev);
291
292         ar8216_read_port_link(priv, port, link);
293         return 0;
294 }
295
296 static int
297 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
298 {
299         struct ar8216_priv *priv = dev->phy_ptr;
300         unsigned char *buf;
301
302     if (unlikely(!priv))
303         goto error;
304
305         if (!priv->vlan)
306                 goto send;
307
308         if (unlikely(skb_headroom(skb) < 2)) {
309                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
310                         goto error;
311         }
312
313         buf = skb_push(skb, 2);
314         buf[0] = 0x10;
315         buf[1] = 0x80;
316
317 send:
318         return priv->ndo_old->ndo_start_xmit(skb, dev);
319
320 error:
321         dev_kfree_skb_any(skb);
322         return 0;
323 }
324
325 static int
326 ar8216_mangle_rx(struct sk_buff *skb, int napi)
327 {
328         struct ar8216_priv *priv;
329         struct net_device *dev;
330         unsigned char *buf;
331         int port, vlan;
332
333         dev = skb->dev;
334         if (!dev)
335                 goto error;
336
337         priv = dev->phy_ptr;
338         if (!priv)
339                 goto error;
340
341         /* don't strip the header if vlan mode is disabled */
342         if (!priv->vlan)
343                 goto recv;
344
345         /* strip header, get vlan id */
346         buf = skb->data;
347         skb_pull(skb, 2);
348
349         /* check for vlan header presence */
350         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
351                 goto recv;
352
353         port = buf[0] & 0xf;
354
355         /* no need to fix up packets coming from a tagged source */
356         if (priv->vlan_tagged & (1 << port))
357                 goto recv;
358
359         /* lookup port vid from local table, the switch passes an invalid vlan id */
360         vlan = priv->vlan_id[priv->pvid[port]];
361
362         buf[14 + 2] &= 0xf0;
363         buf[14 + 2] |= vlan >> 8;
364         buf[15 + 2] = vlan & 0xff;
365
366 recv:
367         skb->protocol = eth_type_trans(skb, skb->dev);
368
369         if (napi)
370                 return netif_receive_skb(skb);
371         else
372                 return netif_rx(skb);
373
374 error:
375         /* no vlan? eat the packet! */
376         dev_kfree_skb_any(skb);
377         return NET_RX_DROP;
378 }
379
380 static int
381 ar8216_netif_rx(struct sk_buff *skb)
382 {
383         return ar8216_mangle_rx(skb, 0);
384 }
385
386 static int
387 ar8216_netif_receive_skb(struct sk_buff *skb)
388 {
389         return ar8216_mangle_rx(skb, 1);
390 }
391
392
393 static struct switch_attr ar8216_globals[] = {
394         {
395                 .type = SWITCH_TYPE_INT,
396                 .name = "enable_vlan",
397                 .description = "Enable VLAN mode",
398                 .set = ar8216_set_vlan,
399                 .get = ar8216_get_vlan,
400                 .max = 1
401         },
402 };
403
404 static struct switch_attr ar8216_port[] = {
405 };
406
407 static struct switch_attr ar8216_vlan[] = {
408         {
409                 .type = SWITCH_TYPE_INT,
410                 .name = "vid",
411                 .description = "VLAN ID (0-4094)",
412                 .set = ar8216_set_vid,
413                 .get = ar8216_get_vid,
414                 .max = 4094,
415         },
416 };
417
418
419 static int
420 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
421 {
422         struct ar8216_priv *priv = to_ar8216(dev);
423         u8 ports = priv->vlan_table[val->port_vlan];
424         int i;
425
426         val->len = 0;
427         for (i = 0; i < AR8216_NUM_PORTS; i++) {
428                 struct switch_port *p;
429
430                 if (!(ports & (1 << i)))
431                         continue;
432
433                 p = &val->value.ports[val->len++];
434                 p->id = i;
435                 if (priv->vlan_tagged & (1 << i))
436                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
437                 else
438                         p->flags = 0;
439         }
440         return 0;
441 }
442
443 static int
444 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
445 {
446         struct ar8216_priv *priv = to_ar8216(dev);
447         u8 *vt = &priv->vlan_table[val->port_vlan];
448         int i, j;
449
450         *vt = 0;
451         for (i = 0; i < val->len; i++) {
452                 struct switch_port *p = &val->value.ports[i];
453
454                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
455                         priv->vlan_tagged |= (1 << p->id);
456                 else {
457                         priv->vlan_tagged &= ~(1 << p->id);
458                         priv->pvid[p->id] = val->port_vlan;
459
460                         /* make sure that an untagged port does not
461                          * appear in other vlans */
462                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
463                                 if (j == val->port_vlan)
464                                         continue;
465                                 priv->vlan_table[j] &= ~(1 << p->id);
466                         }
467                 }
468
469                 *vt |= 1 << p->id;
470         }
471         return 0;
472 }
473
474 static int
475 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
476 {
477         int timeout = 20;
478         u32 t = 0;
479
480         while (1) {
481                 t = priv->read(priv, reg);
482                 if ((t & mask) == val)
483                         return 0;
484
485                 if (timeout-- <= 0)
486                         break;
487
488                 udelay(10);
489         }
490
491         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
492                (unsigned int) reg, t, mask, val);
493         return -ETIMEDOUT;
494 }
495
496 static void
497 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
498 {
499         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
500                 return;
501         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
502                 val &= AR8216_VTUDATA_MEMBER;
503                 val |= AR8216_VTUDATA_VALID;
504                 priv->write(priv, AR8216_REG_VTU_DATA, val);
505         }
506         op |= AR8216_VTU_ACTIVE;
507         priv->write(priv, AR8216_REG_VTU, op);
508 }
509
510 static void
511 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
512                   u32 members, u32 pvid)
513 {
514         u32 header;
515
516         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
517                 header = AR8216_PORT_CTRL_HEADER;
518         else
519                 header = 0;
520
521         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
522                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
523                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
524                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
525                    AR8216_PORT_CTRL_LEARN | header |
526                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
527                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
528
529         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
530                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
531                    AR8216_PORT_VLAN_DEFAULT_ID,
532                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
533                    (ingress << AR8216_PORT_VLAN_MODE_S) |
534                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
535 }
536
537 static void
538 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
539                   u32 members, u32 pvid)
540 {
541         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
542                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
543                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
544                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
545                    AR8216_PORT_CTRL_LEARN |
546                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
547                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
548
549         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
550                    AR8236_PORT_VLAN_DEFAULT_ID,
551                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
552
553         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
554                    AR8236_PORT_VLAN2_VLAN_MODE |
555                    AR8236_PORT_VLAN2_MEMBER,
556                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
557                    (members << AR8236_PORT_VLAN2_MEMBER_S));
558 }
559
560 static int
561 ar8216_hw_apply(struct switch_dev *dev)
562 {
563         struct ar8216_priv *priv = to_ar8216(dev);
564         u8 portmask[AR8216_NUM_PORTS];
565         int i, j;
566
567         mutex_lock(&priv->reg_mutex);
568         /* flush all vlan translation unit entries */
569         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
570
571         memset(portmask, 0, sizeof(portmask));
572         if (!priv->init) {
573                 /* calculate the port destination masks and load vlans
574                  * into the vlan translation unit */
575                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
576                         u8 vp = priv->vlan_table[j];
577
578                         if (!vp)
579                                 continue;
580
581                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
582                                 u8 mask = (1 << i);
583                                 if (vp & mask)
584                                         portmask[i] |= vp & ~mask;
585                         }
586
587                         ar8216_vtu_op(priv,
588                                 AR8216_VTU_OP_LOAD |
589                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
590                                 priv->vlan_table[j]);
591                 }
592         } else {
593                 /* vlan disabled:
594                  * isolate all ports, but connect them to the cpu port */
595                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
596                         if (i == AR8216_PORT_CPU)
597                                 continue;
598
599                         portmask[i] = 1 << AR8216_PORT_CPU;
600                         portmask[AR8216_PORT_CPU] |= (1 << i);
601                 }
602         }
603
604         /* update the port destination mask registers and tag settings */
605         for (i = 0; i < AR8216_NUM_PORTS; i++) {
606                 int egress, ingress;
607                 int pvid;
608
609                 if (priv->vlan) {
610                         pvid = priv->vlan_id[priv->pvid[i]];
611                 } else {
612                         pvid = i;
613                 }
614
615                 if (priv->vlan) {
616                         if (priv->vlan_tagged & (1 << i))
617                                 egress = AR8216_OUT_ADD_VLAN;
618                         else
619                                 egress = AR8216_OUT_STRIP_VLAN;
620                 } else {
621                         egress = AR8216_OUT_KEEP;
622                 }
623                 if (priv->vlan) {
624                         ingress = AR8216_IN_SECURE;
625                 } else {
626                         ingress = AR8216_IN_PORT_ONLY;
627                 }
628
629                 if (priv->chip == AR8236)
630                         ar8236_setup_port(priv, i, egress, ingress, portmask[i],
631                                           pvid);
632                 else
633                         ar8216_setup_port(priv, i, egress, ingress, portmask[i],
634                                           pvid);
635         }
636         mutex_unlock(&priv->reg_mutex);
637         return 0;
638 }
639
640 static int
641 ar8236_hw_init(struct ar8216_priv *priv) {
642         static int initialized;
643         int i;
644         struct mii_bus *bus;
645
646         if (initialized)
647                 return 0;
648
649         /* Initialize the PHYs */
650         bus = priv->phy->bus;
651         for (i = 0; i < 5; i++) {
652                 mdiobus_write(bus, i, MII_ADVERTISE,
653                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
654                               ADVERTISE_PAUSE_ASYM);
655                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
656         }
657         msleep(1000);
658
659         initialized = true;
660         return 0;
661 }
662
663 static int
664 ar8316_hw_init(struct ar8216_priv *priv) {
665         int i;
666         u32 val, newval;
667         struct mii_bus *bus;
668
669         val = priv->read(priv, 0x8);
670
671         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
672                 if (priv->port4_phy) {
673                         /* value taken from Ubiquiti RouterStation Pro */
674                         newval = 0x81461bea;
675                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
676                 } else {
677                         newval = 0x01261be2;
678                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
679                 }
680         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
681                 /* value taken from AVM Fritz!Box 7390 sources */
682                 newval = 0x010e5b71;
683         } else {
684                 /* no known value for phy interface */
685                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
686                         priv->phy->interface);
687                 return -EINVAL;
688         }
689
690         if (val == newval)
691                 goto out;
692
693         priv->write(priv, 0x8, newval);
694
695         /* standard atheros magic */
696         priv->write(priv, 0x38, 0xc000050e);
697
698         /* Initialize the ports */
699         bus = priv->phy->bus;
700         for (i = 0; i < 5; i++) {
701                 if ((i == 4) && priv->port4_phy &&
702                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
703                         /* work around for phy4 rgmii mode */
704                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
705                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
706                         /* rx delay */
707                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
708                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
709                         /* tx delay */
710                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
711                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
712                         msleep(1000);
713                 }
714
715                 /* initialize the port itself */
716                 mdiobus_write(bus, i, MII_ADVERTISE,
717                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
718                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
719                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
720                 msleep(1000);
721         }
722
723 out:
724         priv->initialized = true;
725         return 0;
726 }
727
728 static void
729 ar8216_init_port(struct ar8216_priv *priv, int port)
730 {
731         /* Enable port learning and tx */
732         priv->write(priv, AR8216_REG_PORT_CTRL(port),
733                 AR8216_PORT_CTRL_LEARN |
734                 (4 << AR8216_PORT_CTRL_STATE_S));
735
736         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
737
738         if (port == AR8216_PORT_CPU) {
739                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
740                         AR8216_PORT_STATUS_LINK_UP |
741                         ((priv->chip == AR8316) ?
742                                 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
743                         AR8216_PORT_STATUS_TXMAC |
744                         AR8216_PORT_STATUS_RXMAC |
745                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
746                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
747                         AR8216_PORT_STATUS_DUPLEX);
748         } else {
749                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
750                         AR8216_PORT_STATUS_LINK_AUTO);
751         }
752 }
753
754 static int
755 ar8216_reset_switch(struct switch_dev *dev)
756 {
757         struct ar8216_priv *priv = to_ar8216(dev);
758         int i;
759
760         mutex_lock(&priv->reg_mutex);
761         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
762                 offsetof(struct ar8216_priv, vlan));
763         for (i = 0; i < AR8X16_MAX_VLANS; i++) {
764                 priv->vlan_id[i] = i;
765         }
766
767         /* Configure all ports */
768         for (i = 0; i < AR8216_NUM_PORTS; i++)
769                 ar8216_init_port(priv, i);
770
771         /* XXX: undocumented magic from atheros, required! */
772         priv->write(priv, 0x38, 0xc000050e);
773
774         if (priv->chip == AR8216) {
775                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
776                         AR8216_GCTRL_MTU, 1518 + 8 + 2);
777         } else if (priv->chip == AR8316 ||
778                    priv->chip == AR8236) {
779                 /* enable jumbo frames */
780                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
781                         AR8316_GCTRL_MTU, 9018 + 8 + 2);
782         }
783
784         if (priv->chip == AR8316) {
785                 /* enable cpu port to receive multicast and broadcast frames */
786                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
787         }
788         mutex_unlock(&priv->reg_mutex);
789         return ar8216_hw_apply(dev);
790 }
791
792
793 static const struct switch_dev_ops ar8216_ops = {
794         .attr_global = {
795                 .attr = ar8216_globals,
796                 .n_attr = ARRAY_SIZE(ar8216_globals),
797         },
798         .attr_port = {
799                 .attr = ar8216_port,
800                 .n_attr = ARRAY_SIZE(ar8216_port),
801         },
802         .attr_vlan = {
803                 .attr = ar8216_vlan,
804                 .n_attr = ARRAY_SIZE(ar8216_vlan),
805         },
806         .get_port_pvid = ar8216_get_pvid,
807         .set_port_pvid = ar8216_set_pvid,
808         .get_vlan_ports = ar8216_get_ports,
809         .set_vlan_ports = ar8216_set_ports,
810         .apply_config = ar8216_hw_apply,
811         .reset_switch = ar8216_reset_switch,
812         .get_port_link = ar8216_get_port_link,
813 };
814
815 static int
816 ar8216_config_init(struct phy_device *pdev)
817 {
818         struct ar8216_priv *priv = pdev->priv;
819         struct net_device *dev = pdev->attached_dev;
820         struct switch_dev *swdev;
821         int ret;
822
823         if (!priv) {
824                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
825                 if (priv == NULL)
826                         return -ENOMEM;
827         }
828
829         priv->phy = pdev;
830
831         ret = ar8216_id_chip(priv);
832         if (ret)
833                 goto err_free_priv;
834
835         if (pdev->addr != 0) {
836                 if (priv->chip == AR8316) {
837                         pdev->supported |= SUPPORTED_1000baseT_Full;
838                         pdev->advertising |= ADVERTISED_1000baseT_Full;
839
840                         /* check if we're attaching to the switch twice */
841                         pdev = pdev->bus->phy_map[0];
842                         if (!pdev) {
843                                 kfree(priv);
844                                 return 0;
845                         }
846
847                         /* switch device has not been initialized, reuse priv */
848                         if (!pdev->priv) {
849                                 priv->port4_phy = true;
850                                 pdev->priv = priv;
851                                 return 0;
852                         }
853
854                         kfree(priv);
855
856                         /* switch device has been initialized, reinit */
857                         priv = pdev->priv;
858                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
859                         priv->initialized = false;
860                         priv->port4_phy = true;
861                         ar8316_hw_init(priv);
862                         return 0;
863                 }
864
865                 kfree(priv);
866                 return 0;
867         }
868
869         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
870                 pdev->attached_dev->name, priv->chip);
871
872         pdev->supported = priv->chip == AR8316 ?
873                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
874         pdev->advertising = pdev->supported;
875
876         mutex_init(&priv->reg_mutex);
877         priv->read = ar8216_mii_read;
878         priv->write = ar8216_mii_write;
879
880         pdev->priv = priv;
881
882         swdev = &priv->dev;
883         swdev->cpu_port = AR8216_PORT_CPU;
884         swdev->ops = &ar8216_ops;
885         swdev->ports = AR8216_NUM_PORTS;
886
887         if (priv->chip == AR8316) {
888                 swdev->name = "Atheros AR8316";
889                 swdev->vlans = AR8X16_MAX_VLANS;
890
891                 if (priv->port4_phy) {
892                         /* port 5 connected to the other mac, therefore unusable */
893                         swdev->ports = (AR8216_NUM_PORTS - 1);
894                 }
895         } else if (priv->chip == AR8236) {
896                 swdev->name = "Atheros AR8236";
897                 swdev->vlans = AR8216_NUM_VLANS;
898                 swdev->ports = AR8216_NUM_PORTS;
899         } else {
900                 swdev->name = "Atheros AR8216";
901                 swdev->vlans = AR8216_NUM_VLANS;
902         }
903
904         ret = register_switch(&priv->dev, pdev->attached_dev);
905         if (ret)
906                 goto err_free_priv;
907
908         priv->init = true;
909
910         ret = 0;
911         if (priv->chip == AR8236)
912                 ret = ar8236_hw_init(priv);
913         else if (priv->chip == AR8316)
914                 ret = ar8316_hw_init(priv);
915
916         if (ret)
917                 goto err_free_priv;
918
919         ret = ar8216_reset_switch(&priv->dev);
920         if (ret)
921                 goto err_free_priv;
922
923         dev->phy_ptr = priv;
924
925         /* VID fixup only needed on ar8216 */
926         if (pdev->addr == 0 && priv->chip == AR8216) {
927                 pdev->pkt_align = 2;
928                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
929                 pdev->netif_rx = ar8216_netif_rx;
930                 priv->ndo_old = dev->netdev_ops;
931                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
932                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
933                 dev->netdev_ops = &priv->ndo;
934         }
935
936         priv->init = false;
937
938         return 0;
939
940 err_free_priv:
941         kfree(priv);
942         return ret;
943 }
944
945 static int
946 ar8216_read_status(struct phy_device *phydev)
947 {
948         struct ar8216_priv *priv = phydev->priv;
949         struct switch_port_link link;
950         int ret;
951         if (phydev->addr != 0) {
952                 return genphy_read_status(phydev);
953         }
954
955         ar8216_read_port_link(priv, phydev->addr, &link);
956         phydev->link = !!link.link;
957         if (!phydev->link)
958                 return 0;
959
960         switch (link.speed) {
961         case SWITCH_PORT_SPEED_10:
962                 phydev->speed = SPEED_10;
963                 break;
964         case SWITCH_PORT_SPEED_100:
965                 phydev->speed = SPEED_100;
966                 break;
967         case SWITCH_PORT_SPEED_1000:
968                 phydev->speed = SPEED_1000;
969                 break;
970         default:
971                 phydev->speed = 0;
972         }
973         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
974
975         /* flush the address translation unit */
976         mutex_lock(&priv->reg_mutex);
977         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
978         if (!ret)
979                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
980         mutex_unlock(&priv->reg_mutex);
981
982         phydev->state = PHY_RUNNING;
983         netif_carrier_on(phydev->attached_dev);
984         phydev->adjust_link(phydev->attached_dev);
985
986         return ret;
987 }
988
989 static int
990 ar8216_config_aneg(struct phy_device *phydev)
991 {
992         if (phydev->addr == 0)
993                 return 0;
994
995         return genphy_config_aneg(phydev);
996 }
997
998 static int
999 ar8216_probe(struct phy_device *pdev)
1000 {
1001         struct ar8216_priv priv;
1002
1003         priv.phy = pdev;
1004         return ar8216_id_chip(&priv);
1005 }
1006
1007 static void
1008 ar8216_remove(struct phy_device *pdev)
1009 {
1010         struct ar8216_priv *priv = pdev->priv;
1011         struct net_device *dev = pdev->attached_dev;
1012
1013         if (!priv)
1014                 return;
1015
1016         if (priv->ndo_old && dev)
1017                 dev->netdev_ops = priv->ndo_old;
1018         if (pdev->addr == 0)
1019                 unregister_switch(&priv->dev);
1020         kfree(priv);
1021 }
1022
1023 static struct phy_driver ar8216_driver = {
1024         .phy_id         = 0x004d0000,
1025         .name           = "Atheros AR8216/AR8236/AR8316",
1026         .phy_id_mask    = 0xffff0000,
1027         .features       = PHY_BASIC_FEATURES,
1028         .probe          = ar8216_probe,
1029         .remove         = ar8216_remove,
1030         .config_init    = &ar8216_config_init,
1031         .config_aneg    = &ar8216_config_aneg,
1032         .read_status    = &ar8216_read_status,
1033         .driver         = { .owner = THIS_MODULE },
1034 };
1035
1036 int __init
1037 ar8216_init(void)
1038 {
1039         return phy_driver_register(&ar8216_driver);
1040 }
1041
1042 void __exit
1043 ar8216_exit(void)
1044 {
1045         phy_driver_unregister(&ar8216_driver);
1046 }
1047
1048 module_init(ar8216_init);
1049 module_exit(ar8216_exit);
1050 MODULE_LICENSE("GPL");
1051