kernel: update 4.1 to 4.1.5
[openwrt.git] / target / linux / sunxi / patches-4.1 / 126-1-dt-sun4i-add-nand-ctrlpin-defs.patch
1 From 00f9956384e3cf011e0d5ffd211847bf9336ec78 Mon Sep 17 00:00:00 2001
2 From: Michal Suchanek <hramrach@gmail.com>
3 Date: Tue, 26 May 2015 17:01:33 +0200
4 Subject: [PATCH] ARM: dts: sun4i: Add NAND controller pin definitions
5
6 Define the NAND controller pin configs.
7
8 Signed-off-by: Michal Suchanek <hramrach@gmail.com>
9 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 ---
11  arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
12  1 file changed, 80 insertions(+)
13
14 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
15 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
16 @@ -774,6 +774,86 @@
17                                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
18                                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
19                         };
20 +
21 +                       nand_pins_a: nand_base0@0 {
22 +                               allwinner,pins = "PC0", "PC1", "PC2",
23 +                                               "PC5", "PC8", "PC9", "PC10",
24 +                                               "PC11", "PC12", "PC13", "PC14",
25 +                                               "PC15", "PC16";
26 +                               allwinner,function = "nand0";
27 +                               allwinner,drive = <0>;
28 +                               allwinner,pull = <0>;
29 +                       };
30 +
31 +                       nand_cs0_pins_a: nand_cs@0 {
32 +                               allwinner,pins = "PC4";
33 +                               allwinner,function = "nand0";
34 +                               allwinner,drive = <0>;
35 +                               allwinner,pull = <0>;
36 +                       };
37 +
38 +                       nand_cs1_pins_a: nand_cs@1 {
39 +                               allwinner,pins = "PC3";
40 +                               allwinner,function = "nand0";
41 +                               allwinner,drive = <0>;
42 +                               allwinner,pull = <0>;
43 +                       };
44 +
45 +                       nand_cs2_pins_a: nand_cs@2 {
46 +                               allwinner,pins = "PC17";
47 +                               allwinner,function = "nand0";
48 +                               allwinner,drive = <0>;
49 +                               allwinner,pull = <0>;
50 +                       };
51 +
52 +                       nand_cs3_pins_a: nand_cs@3 {
53 +                               allwinner,pins = "PC18";
54 +                               allwinner,function = "nand0";
55 +                               allwinner,drive = <0>;
56 +                               allwinner,pull = <0>;
57 +                       };
58 +
59 +                       nand_cs4_pins_a: nand_cs@4 {
60 +                               allwinner,pins = "PC19";
61 +                               allwinner,function = "nand0";
62 +                               allwinner,drive = <0>;
63 +                               allwinner,pull = <0>;
64 +                       };
65 +
66 +                       nand_cs5_pins_a: nand_cs@5 {
67 +                               allwinner,pins = "PC20";
68 +                               allwinner,function = "nand0";
69 +                               allwinner,drive = <0>;
70 +                               allwinner,pull = <0>;
71 +                       };
72 +
73 +                       nand_cs6_pins_a: nand_cs@6 {
74 +                               allwinner,pins = "PC21";
75 +                               allwinner,function = "nand0";
76 +                               allwinner,drive = <0>;
77 +                               allwinner,pull = <0>;
78 +                       };
79 +
80 +                       nand_cs7_pins_a: nand_cs@7 {
81 +                               allwinner,pins = "PC22";
82 +                               allwinner,function = "nand0";
83 +                               allwinner,drive = <0>;
84 +                               allwinner,pull = <0>;
85 +                       };
86 +
87 +                       nand_rb0_pins_a: nand_rb@0 {
88 +                               allwinner,pins = "PC6";
89 +                               allwinner,function = "nand0";
90 +                               allwinner,drive = <0>;
91 +                               allwinner,pull = <0>;
92 +                       };
93 +
94 +                       nand_rb1_pins_a: nand_rb@1 {
95 +                               allwinner,pins = "PC7";
96 +                               allwinner,function = "nand0";
97 +                               allwinner,drive = <0>;
98 +                               allwinner,pull = <0>;
99 +                       };
100                 };
101  
102                 timer@01c20c00 {