dde4a35aefcfe6c9f3c9f9a0568741134d8a7ca3
[openwrt.git] / target / linux / ramips / patches-3.10 / 0211-watchdog-add-MT7621-support.patch
1 From 158f2deb6349046ee4406578a5d3146ce9870cb3 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 16 Mar 2014 05:24:42 +0000
4 Subject: [PATCH 211/215] watchdog: add MT7621 support
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8  drivers/watchdog/Kconfig      |    7 ++
9  drivers/watchdog/Makefile     |    1 +
10  drivers/watchdog/mt7621_wdt.c |  185 +++++++++++++++++++++++++++++++++++++++++
11  3 files changed, 193 insertions(+)
12  create mode 100644 drivers/watchdog/mt7621_wdt.c
13
14 Index: linux-3.10.32/drivers/watchdog/Kconfig
15 ===================================================================
16 --- linux-3.10.32.orig/drivers/watchdog/Kconfig 2014-03-18 11:00:30.629639835 +0000
17 +++ linux-3.10.32/drivers/watchdog/Kconfig      2014-03-18 11:02:35.141634769 +0000
18 @@ -1120,6 +1120,13 @@
19         help
20           Hardware driver for the Ralink SoC Watchdog Timer.
21  
22 +config MT7621_WDT
23 +       tristate "Mediatek SoC watchdog"
24 +       select WATCHDOG_CORE
25 +       depends on SOC_MT7621
26 +       help
27 +         Hardware driver for the Ralink SoC Watchdog Timer.
28 +
29  # PARISC Architecture
30  
31  # POWERPC Architecture
32 Index: linux-3.10.32/drivers/watchdog/Makefile
33 ===================================================================
34 --- linux-3.10.32.orig/drivers/watchdog/Makefile        2014-03-18 11:00:30.629639835 +0000
35 +++ linux-3.10.32/drivers/watchdog/Makefile     2014-03-18 11:00:31.317639807 +0000
36 @@ -136,6 +136,7 @@
37  octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
38  obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
39  obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
40 +obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
41  
42  # PARISC Architecture
43  
44 Index: linux-3.10.32/drivers/watchdog/mt7621_wdt.c
45 ===================================================================
46 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
47 +++ linux-3.10.32/drivers/watchdog/mt7621_wdt.c 2014-03-18 11:00:31.317639807 +0000
48 @@ -0,0 +1,185 @@
49 +/*
50 + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
51 + *
52 + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
53 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
54 + *
55 + * This driver was based on: drivers/watchdog/softdog.c
56 + *
57 + * This program is free software; you can redistribute it and/or modify it
58 + * under the terms of the GNU General Public License version 2 as published
59 + * by the Free Software Foundation.
60 + */
61 +
62 +#include <linux/clk.h>
63 +#include <linux/reset.h>
64 +#include <linux/module.h>
65 +#include <linux/kernel.h>
66 +#include <linux/watchdog.h>
67 +#include <linux/miscdevice.h>
68 +#include <linux/moduleparam.h>
69 +#include <linux/platform_device.h>
70 +
71 +#include <asm/mach-ralink/ralink_regs.h>
72 +
73 +#define SYSC_RSTSTAT                   0x38
74 +#define WDT_RST_CAUSE                  BIT(1)
75 +
76 +#define RALINK_WDT_TIMEOUT             30
77 +
78 +#define TIMER_REG_TMRSTAT              0x00
79 +#define TIMER_REG_TMR1LOAD             0x24
80 +#define TIMER_REG_TMR1CTL              0x20
81 +
82 +#define TMR1CTL_ENABLE                 BIT(7)
83 +#define TMR1CTL_RESTART                        BIT(9)
84 +
85 +static void __iomem *mt762x_wdt_base;
86 +
87 +static bool nowayout = WATCHDOG_NOWAYOUT;
88 +module_param(nowayout, bool, 0);
89 +MODULE_PARM_DESC(nowayout,
90 +               "Watchdog cannot be stopped once started (default="
91 +               __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
92 +
93 +static inline void rt_wdt_w32(unsigned reg, u32 val)
94 +{
95 +       iowrite32(val, mt762x_wdt_base + reg);
96 +}
97 +
98 +static inline u32 rt_wdt_r32(unsigned reg)
99 +{
100 +       return ioread32(mt762x_wdt_base + reg);
101 +}
102 +
103 +static int mt762x_wdt_ping(struct watchdog_device *w)
104 +{
105 +       rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
106 +
107 +       return 0;
108 +}
109 +
110 +static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
111 +{
112 +       w->timeout = t;
113 +       rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
114 +       mt762x_wdt_ping(w);
115 +
116 +       return 0;
117 +}
118 +
119 +static int mt762x_wdt_start(struct watchdog_device *w)
120 +{
121 +       u32 t;
122 +
123 +       rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
124 +       mt762x_wdt_set_timeout(w, w->timeout);
125 +
126 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
127 +       t |= TMR1CTL_ENABLE;
128 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
129 +
130 +       return 0;
131 +}
132 +
133 +static int mt762x_wdt_stop(struct watchdog_device *w)
134 +{
135 +       u32 t;
136 +
137 +       mt762x_wdt_ping(w);
138 +
139 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
140 +       t &= ~TMR1CTL_ENABLE;
141 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
142 +
143 +       return 0;
144 +}
145 +
146 +static int mt762x_wdt_bootcause(void)
147 +{
148 +       if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
149 +               return WDIOF_CARDRESET;
150 +
151 +       return 0;
152 +}
153 +
154 +static struct watchdog_info mt762x_wdt_info = {
155 +       .identity = "Mediatek Watchdog",
156 +       .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
157 +};
158 +
159 +static struct watchdog_ops mt762x_wdt_ops = {
160 +       .owner = THIS_MODULE,
161 +       .start = mt762x_wdt_start,
162 +       .stop = mt762x_wdt_stop,
163 +       .ping = mt762x_wdt_ping,
164 +       .set_timeout = mt762x_wdt_set_timeout,
165 +};
166 +
167 +static struct watchdog_device mt762x_wdt_dev = {
168 +       .info = &mt762x_wdt_info,
169 +       .ops = &mt762x_wdt_ops,
170 +       .min_timeout = 1,
171 +};
172 +
173 +static int mt762x_wdt_probe(struct platform_device *pdev)
174 +{
175 +       struct resource *res;
176 +       int ret;
177 +
178 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
179 +       mt762x_wdt_base = devm_request_and_ioremap(&pdev->dev, res);
180 +       if (IS_ERR(mt762x_wdt_base))
181 +               return PTR_ERR(mt762x_wdt_base);
182 +
183 +       device_reset(&pdev->dev);
184 +
185 +       mt762x_wdt_dev.dev = &pdev->dev;
186 +       mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
187 +       mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
188 +       mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
189 +
190 +       watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
191 +
192 +       ret = watchdog_register_device(&mt762x_wdt_dev);
193 +       if (!ret)
194 +               dev_info(&pdev->dev, "Initialized\n");
195 +
196 +       return 0;
197 +}
198 +
199 +static int mt762x_wdt_remove(struct platform_device *pdev)
200 +{
201 +       watchdog_unregister_device(&mt762x_wdt_dev);
202 +
203 +       return 0;
204 +}
205 +
206 +static void mt762x_wdt_shutdown(struct platform_device *pdev)
207 +{
208 +       mt762x_wdt_stop(&mt762x_wdt_dev);
209 +}
210 +
211 +static const struct of_device_id mt762x_wdt_match[] = {
212 +       { .compatible = "mtk,mt7621-wdt" },
213 +       {},
214 +};
215 +MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
216 +
217 +static struct platform_driver mt762x_wdt_driver = {
218 +       .probe          = mt762x_wdt_probe,
219 +       .remove         = mt762x_wdt_remove,
220 +       .shutdown       = mt762x_wdt_shutdown,
221 +       .driver         = {
222 +               .name           = KBUILD_MODNAME,
223 +               .owner          = THIS_MODULE,
224 +               .of_match_table = mt762x_wdt_match,
225 +       },
226 +};
227 +
228 +module_platform_driver(mt762x_wdt_driver);
229 +
230 +MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
231 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
232 +MODULE_LICENSE("GPL v2");
233 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);