target/linux/imx6/patches-3.14/0003-ARM-dts-add-Gateworks-Ventana-support.patch

   1 From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001
   2 From: Tim Harvey <tharvey@gateworks.com>
   3 Date: Fri, 7 Feb 2014 15:24:56 +0800
   4 Subject: [PATCH] ARM: dts: add Gateworks Ventana support
   5
   6 The Gateworks Ventana product family consists of several baseboard designs
   7 based on the Freescale i.MX6 family of processors.  Each baseboard has a
   8 different set of possible features.
   9
  10 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
  11 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
  12 ---
  13  arch/arm/boot/dts/Makefile            |   9 +
  14  arch/arm/boot/dts/imx6dl-gw51xx.dts   |  19 ++
  15  arch/arm/boot/dts/imx6dl-gw52xx.dts   |  19 ++
  16  arch/arm/boot/dts/imx6dl-gw53xx.dts   |  19 ++
  17  arch/arm/boot/dts/imx6dl-gw54xx.dts   |  19 ++
  18  arch/arm/boot/dts/imx6q-gw51xx.dts    |  19 ++
  19  arch/arm/boot/dts/imx6q-gw52xx.dts    |  23 ++
  20  arch/arm/boot/dts/imx6q-gw53xx.dts    |  23 ++
  21  arch/arm/boot/dts/imx6q-gw5400-a.dts  | 546 ++++++++++++++++++++++++++++++++
  22  arch/arm/boot/dts/imx6q-gw54xx.dts    |  23 ++
  23  arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++
  24  arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++
  25  arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++
  26  arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++
  27  14 files changed, 2716 insertions(+)
  28  create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
  29  create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
  30  create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
  31  create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
  32  create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
  33  create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
  34  create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
  35  create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
  36  create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
  37  create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
  38  create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
  39  create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  40  create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  41
  42 --- a/arch/arm/boot/dts/Makefile
  43 +++ b/arch/arm/boot/dts/Makefile
  44 @@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
  45         imx53-qsb.dtb \
  46         imx53-smd.dtb \
  47         imx6dl-cubox-i.dtb \
  48 +       imx6dl-gw51xx.dtb \
  49 +       imx6dl-gw52xx.dtb \
  50 +       imx6dl-gw53xx.dtb \
  51 +       imx6dl-gw54xx.dtb \
  52         imx6dl-hummingboard.dtb \
  53         imx6dl-sabreauto.dtb \
  54         imx6dl-sabresd.dtb \
  55         imx6dl-wandboard.dtb \
  56         imx6q-arm2.dtb \
  57         imx6q-cubox-i.dtb \
  58 +       imx6q-gw51xx.dtb \
  59 +       imx6q-gw52xx.dtb \
  60 +       imx6q-gw53xx.dtb \
  61 +       imx6q-gw5400-a.dtb \
  62 +       imx6q-gw54xx.dtb \
  63         imx6q-phytec-pbab01.dtb \
  64         imx6q-sabreauto.dtb \
  65         imx6q-sabrelite.dtb \
  66 --- /dev/null
  67 +++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
  68 @@ -0,0 +1,19 @@
  69 +/*
  70 + * Copyright 2013 Gateworks Corporation
  71 + *
  72 + * The code contained herein is licensed under the GNU General Public
  73 + * License. You may obtain a copy of the GNU General Public License
  74 + * Version 2 or later at the following locations:
  75 + *
  76 + * http://www.opensource.org/licenses/gpl-license.html
  77 + * http://www.gnu.org/copyleft/gpl.html
  78 + */
  79 +
  80 +/dts-v1/;
  81 +#include "imx6dl.dtsi"
  82 +#include "imx6qdl-gw51xx.dtsi"
  83 +
  84 +/ {
  85 +       model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX";
  86 +       compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
  87 +};
  88 --- /dev/null
  89 +++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
  90 @@ -0,0 +1,19 @@
  91 +/*
  92 + * Copyright 2013 Gateworks Corporation
  93 + *
  94 + * The code contained herein is licensed under the GNU General Public
  95 + * License. You may obtain a copy of the GNU General Public License
  96 + * Version 2 or later at the following locations:
  97 + *
  98 + * http://www.opensource.org/licenses/gpl-license.html
  99 + * http://www.gnu.org/copyleft/gpl.html
 100 + */
 101 +
 102 +/dts-v1/;
 103 +#include "imx6dl.dtsi"
 104 +#include "imx6qdl-gw52xx.dtsi"
 105 +
 106 +/ {
 107 +       model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX";
 108 +       compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
 109 +};
 110 --- /dev/null
 111 +++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
 112 @@ -0,0 +1,19 @@
 113 +/*
 114 + * Copyright 2013 Gateworks Corporation
 115 + *
 116 + * The code contained herein is licensed under the GNU General Public
 117 + * License. You may obtain a copy of the GNU General Public License
 118 + * Version 2 or later at the following locations:
 119 + *
 120 + * http://www.opensource.org/licenses/gpl-license.html
 121 + * http://www.gnu.org/copyleft/gpl.html
 122 + */
 123 +
 124 +/dts-v1/;
 125 +#include "imx6dl.dtsi"
 126 +#include "imx6qdl-gw53xx.dtsi"
 127 +
 128 +/ {
 129 +       model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
 130 +       compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
 131 +};
 132 --- /dev/null
 133 +++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
 134 @@ -0,0 +1,19 @@
 135 +/*
 136 + * Copyright 2013 Gateworks Corporation
 137 + *
 138 + * The code contained herein is licensed under the GNU General Public
 139 + * License. You may obtain a copy of the GNU General Public License
 140 + * Version 2 or later at the following locations:
 141 + *
 142 + * http://www.opensource.org/licenses/gpl-license.html
 143 + * http://www.gnu.org/copyleft/gpl.html
 144 + */
 145 +
 146 +/dts-v1/;
 147 +#include "imx6dl.dtsi"
 148 +#include "imx6qdl-gw54xx.dtsi"
 149 +
 150 +/ {
 151 +       model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
 152 +       compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
 153 +};
 154 --- /dev/null
 155 +++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
 156 @@ -0,0 +1,19 @@
 157 +/*
 158 + * Copyright 2013 Gateworks Corporation
 159 + *
 160 + * The code contained herein is licensed under the GNU General Public
 161 + * License. You may obtain a copy of the GNU General Public License
 162 + * Version 2 or later at the following locations:
 163 + *
 164 + * http://www.opensource.org/licenses/gpl-license.html
 165 + * http://www.gnu.org/copyleft/gpl.html
 166 + */
 167 +
 168 +/dts-v1/;
 169 +#include "imx6q.dtsi"
 170 +#include "imx6qdl-gw51xx.dtsi"
 171 +
 172 +/ {
 173 +       model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX";
 174 +       compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
 175 +};
 176 --- /dev/null
 177 +++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
 178 @@ -0,0 +1,23 @@
 179 +/*
 180 + * Copyright 2013 Gateworks Corporation
 181 + *
 182 + * The code contained herein is licensed under the GNU General Public
 183 + * License. You may obtain a copy of the GNU General Public License
 184 + * Version 2 or later at the following locations:
 185 + *
 186 + * http://www.opensource.org/licenses/gpl-license.html
 187 + * http://www.gnu.org/copyleft/gpl.html
 188 + */
 189 +
 190 +/dts-v1/;
 191 +#include "imx6q.dtsi"
 192 +#include "imx6qdl-gw52xx.dtsi"
 193 +
 194 +/ {
 195 +       model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX";
 196 +       compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
 197 +};
 198 +
 199 +&sata {
 200 +       status = "okay";
 201 +};
 202 --- /dev/null
 203 +++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
 204 @@ -0,0 +1,23 @@
 205 +/*
 206 + * Copyright 2013 Gateworks Corporation
 207 + *
 208 + * The code contained herein is licensed under the GNU General Public
 209 + * License. You may obtain a copy of the GNU General Public License
 210 + * Version 2 or later at the following locations:
 211 + *
 212 + * http://www.opensource.org/licenses/gpl-license.html
 213 + * http://www.gnu.org/copyleft/gpl.html
 214 + */
 215 +
 216 +/dts-v1/;
 217 +#include "imx6q.dtsi"
 218 +#include "imx6qdl-gw53xx.dtsi"
 219 +
 220 +/ {
 221 +       model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX";
 222 +       compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
 223 +};
 224 +
 225 +&sata {
 226 +       status = "okay";
 227 +};
 228 --- /dev/null
 229 +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
 230 @@ -0,0 +1,543 @@
 231 +/*
 232 + * Copyright 2013 Gateworks Corporation
 233 + *
 234 + * The code contained herein is licensed under the GNU General Public
 235 + * License. You may obtain a copy of the GNU General Public License
 236 + * Version 2 or later at the following locations:
 237 + *
 238 + * http://www.opensource.org/licenses/gpl-license.html
 239 + * http://www.gnu.org/copyleft/gpl.html
 240 + */
 241 +
 242 +/dts-v1/;
 243 +#include "imx6q.dtsi"
 244 +
 245 +/ {
 246 +       model = "Gateworks Ventana GW5400-A";
 247 +       compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
 248 +
 249 +       /* these are used by bootloader for disabling nodes */
 250 +       aliases {
 251 +               ethernet0 = &fec;
 252 +               ethernet1 = &eth1;
 253 +               i2c0 = &i2c1;
 254 +               i2c1 = &i2c2;
 255 +               i2c2 = &i2c3;
 256 +               led0 = &led0;
 257 +               led1 = &led1;
 258 +               led2 = &led2;
 259 +               sky2 = &eth1;
 260 +               ssi0 = &ssi1;
 261 +               spi0 = &ecspi1;
 262 +               usb0 = &usbh1;
 263 +               usb1 = &usbotg;
 264 +               usdhc2 = &usdhc3;
 265 +       };
 266 +
 267 +       chosen {
 268 +               bootargs = "console=ttymxc1,115200";
 269 +       };
 270 +
 271 +       leds {
 272 +               compatible = "gpio-leds";
 273 +
 274 +               led0: user1 {
 275 +                       label = "user1";
 276 +                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
 277 +                       default-state = "on";
 278 +                       linux,default-trigger = "heartbeat";
 279 +               };
 280 +
 281 +               led1: user2 {
 282 +                       label = "user2";
 283 +                       gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
 284 +                       default-state = "off";
 285 +               };
 286 +
 287 +               led2: user3 {
 288 +                       label = "user3";
 289 +                       gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
 290 +                       default-state = "off";
 291 +               };
 292 +       };
 293 +
 294 +       memory {
 295 +               reg = <0x10000000 0x40000000>;
 296 +       };
 297 +
 298 +       pps {
 299 +               compatible = "pps-gpio";
 300 +               gpios = <&gpio1 5 0>;
 301 +               status = "okay";
 302 +       };
 303 +
 304 +       regulators {
 305 +               compatible = "simple-bus";
 306 +               #address-cells = <1>;
 307 +               #size-cells = <0>;
 308 +
 309 +               reg_1p0v: regulator@0 {
 310 +                       compatible = "regulator-fixed";
 311 +                       reg = <0>;
 312 +                       regulator-name = "1P0V";
 313 +                       regulator-min-microvolt = <1000000>;
 314 +                       regulator-max-microvolt = <1000000>;
 315 +                       regulator-always-on;
 316 +               };
 317 +
 318 +               reg_3p3v: regulator@1 {
 319 +                       compatible = "regulator-fixed";
 320 +                       reg = <1>;
 321 +                       regulator-name = "3P3V";
 322 +                       regulator-min-microvolt = <3300000>;
 323 +                       regulator-max-microvolt = <3300000>;
 324 +                       regulator-always-on;
 325 +               };
 326 +
 327 +               reg_usb_h1_vbus: regulator@2 {
 328 +                       compatible = "regulator-fixed";
 329 +                       reg = <2>;
 330 +                       regulator-name = "usb_h1_vbus";
 331 +                       regulator-min-microvolt = <5000000>;
 332 +                       regulator-max-microvolt = <5000000>;
 333 +                       regulator-always-on;
 334 +               };
 335 +
 336 +               reg_usb_otg_vbus: regulator@3 {
 337 +                       compatible = "regulator-fixed";
 338 +                       reg = <3>;
 339 +                       regulator-name = "usb_otg_vbus";
 340 +                       regulator-min-microvolt = <5000000>;
 341 +                       regulator-max-microvolt = <5000000>;
 342 +                       gpio = <&gpio3 22 0>;
 343 +                       enable-active-high;
 344 +               };
 345 +       };
 346 +
 347 +       sound {
 348 +               compatible = "fsl,imx6q-ventana-sgtl5000",
 349 +                            "fsl,imx-audio-sgtl5000";
 350 +               model = "sgtl5000-audio";
 351 +               ssi-controller = <&ssi1>;
 352 +               audio-codec = <&codec>;
 353 +               audio-routing =
 354 +                       "MIC_IN", "Mic Jack",
 355 +                       "Mic Jack", "Mic Bias",
 356 +                       "Headphone Jack", "HP_OUT";
 357 +               mux-int-port = <1>;
 358 +               mux-ext-port = <4>;
 359 +       };
 360 +};
 361 +
 362 +&audmux {
 363 +       pinctrl-names = "default";
 364 +       pinctrl-0 = <&pinctrl_audmux>;
 365 +       status = "okay";
 366 +};
 367 +
 368 +&ecspi1 {
 369 +       fsl,spi-num-chipselects = <1>;
 370 +       cs-gpios = <&gpio3 19 0>;
 371 +       pinctrl-names = "default";
 372 +       pinctrl-0 = <&pinctrl_ecspi1>;
 373 +       status = "okay";
 374 +
 375 +       flash: m25p80@0 {
 376 +               compatible = "sst,w25q256";
 377 +               spi-max-frequency = <30000000>;
 378 +               reg = <0>;
 379 +       };
 380 +};
 381 +
 382 +&fec {
 383 +       pinctrl-names = "default";
 384 +       pinctrl-0 = <&pinctrl_enet>;
 385 +       phy-mode = "rgmii";
 386 +       phy-reset-gpios = <&gpio1 30 0>;
 387 +       status = "okay";
 388 +};
 389 +
 390 +&i2c1 {
 391 +       clock-frequency = <100000>;
 392 +       pinctrl-names = "default";
 393 +       pinctrl-0 = <&pinctrl_i2c1>;
 394 +       status = "okay";
 395 +
 396 +       eeprom1: eeprom@50 {
 397 +               compatible = "atmel,24c02";
 398 +               reg = <0x50>;
 399 +               pagesize = <16>;
 400 +       };
 401 +
 402 +       eeprom2: eeprom@51 {
 403 +               compatible = "atmel,24c02";
 404 +               reg = <0x51>;
 405 +               pagesize = <16>;
 406 +       };
 407 +
 408 +       eeprom3: eeprom@52 {
 409 +               compatible = "atmel,24c02";
 410 +               reg = <0x52>;
 411 +               pagesize = <16>;
 412 +       };
 413 +
 414 +       eeprom4: eeprom@53 {
 415 +               compatible = "atmel,24c02";
 416 +               reg = <0x53>;
 417 +               pagesize = <16>;
 418 +       };
 419 +
 420 +       gpio: pca9555@23 {
 421 +               compatible = "nxp,pca9555";
 422 +               reg = <0x23>;
 423 +               gpio-controller;
 424 +               #gpio-cells = <2>;
 425 +       };
 426 +
 427 +       hwmon: gsc@29 {
 428 +               compatible = "gw,gsp";
 429 +               reg = <0x29>;
 430 +       };
 431 +
 432 +       rtc: ds1672@68 {
 433 +               compatible = "dallas,ds1672";
 434 +               reg = <0x68>;
 435 +       };
 436 +};
 437 +
 438 +&i2c2 {
 439 +       clock-frequency = <100000>;
 440 +       pinctrl-names = "default";
 441 +       pinctrl-0 = <&pinctrl_i2c2>;
 442 +       status = "okay";
 443 +
 444 +       pmic: pfuze100@08 {
 445 +               compatible = "fsl,pfuze100";
 446 +               reg = <0x08>;
 447 +
 448 +               regulators {
 449 +                       sw1a_reg: sw1ab {
 450 +                               regulator-min-microvolt = <300000>;
 451 +                               regulator-max-microvolt = <1875000>;
 452 +                               regulator-boot-on;
 453 +                               regulator-always-on;
 454 +                               regulator-ramp-delay = <6250>;
 455 +                       };
 456 +
 457 +                       sw1c_reg: sw1c {
 458 +                               regulator-min-microvolt = <300000>;
 459 +                               regulator-max-microvolt = <1875000>;
 460 +                               regulator-boot-on;
 461 +                               regulator-always-on;
 462 +                               regulator-ramp-delay = <6250>;
 463 +                       };
 464 +
 465 +                       sw2_reg: sw2 {
 466 +                               regulator-min-microvolt = <800000>;
 467 +                               regulator-max-microvolt = <3950000>;
 468 +                               regulator-boot-on;
 469 +                               regulator-always-on;
 470 +                       };
 471 +
 472 +                       sw3a_reg: sw3a {
 473 +                               regulator-min-microvolt = <400000>;
 474 +                               regulator-max-microvolt = <1975000>;
 475 +                               regulator-boot-on;
 476 +                               regulator-always-on;
 477 +                       };
 478 +
 479 +                       sw3b_reg: sw3b {
 480 +                               regulator-min-microvolt = <400000>;
 481 +                               regulator-max-microvolt = <1975000>;
 482 +                               regulator-boot-on;
 483 +                               regulator-always-on;
 484 +                       };
 485 +
 486 +                       sw4_reg: sw4 {
 487 +                               regulator-min-microvolt = <800000>;
 488 +                               regulator-max-microvolt = <3300000>;
 489 +                       };
 490 +
 491 +                       swbst_reg: swbst {
 492 +                               regulator-min-microvolt = <5000000>;
 493 +                               regulator-max-microvolt = <5150000>;
 494 +                       };
 495 +
 496 +                       snvs_reg: vsnvs {
 497 +                               regulator-min-microvolt = <1000000>;
 498 +                               regulator-max-microvolt = <3000000>;
 499 +                               regulator-boot-on;
 500 +                               regulator-always-on;
 501 +                       };
 502 +
 503 +                       vref_reg: vrefddr {
 504 +                               regulator-boot-on;
 505 +                               regulator-always-on;
 506 +                       };
 507 +
 508 +                       vgen1_reg: vgen1 {
 509 +                               regulator-min-microvolt = <800000>;
 510 +                               regulator-max-microvolt = <1550000>;
 511 +                       };
 512 +
 513 +                       vgen2_reg: vgen2 {
 514 +                               regulator-min-microvolt = <800000>;
 515 +                               regulator-max-microvolt = <1550000>;
 516 +                       };
 517 +
 518 +                       vgen3_reg: vgen3 {
 519 +                               regulator-min-microvolt = <1800000>;
 520 +                               regulator-max-microvolt = <3300000>;
 521 +                       };
 522 +
 523 +                       vgen4_reg: vgen4 {
 524 +                               regulator-min-microvolt = <1800000>;
 525 +                               regulator-max-microvolt = <3300000>;
 526 +                               regulator-always-on;
 527 +                       };
 528 +
 529 +                       vgen5_reg: vgen5 {
 530 +                               regulator-min-microvolt = <1800000>;
 531 +                               regulator-max-microvolt = <3300000>;
 532 +                               regulator-always-on;
 533 +                       };
 534 +
 535 +                       vgen6_reg: vgen6 {
 536 +                               regulator-min-microvolt = <1800000>;
 537 +                               regulator-max-microvolt = <3300000>;
 538 +                               regulator-always-on;
 539 +                       };
 540 +               };
 541 +       };
 542 +
 543 +       pciswitch: pex8609@3f {
 544 +               compatible = "plx,pex8609";
 545 +               reg = <0x3f>;
 546 +       };
 547 +
 548 +       pciclkgen: si52147@6b {
 549 +               compatible = "sil,si52147";
 550 +               reg = <0x6b>;
 551 +       };
 552 +};
 553 +
 554 +&i2c3 {
 555 +       clock-frequency = <100000>;
 556 +       pinctrl-names = "default";
 557 +       pinctrl-0 = <&pinctrl_i2c3>;
 558 +       status = "okay";
 559 +
 560 +       accelerometer: mma8450@1c {
 561 +               compatible = "fsl,mma8450";
 562 +               reg = <0x1c>;
 563 +       };
 564 +
 565 +       codec: sgtl5000@0a {
 566 +               compatible = "fsl,sgtl5000";
 567 +               reg = <0x0a>;
 568 +               clocks = <&clks 201>;
 569 +               VDDA-supply = <&sw4_reg>;
 570 +               VDDIO-supply = <&reg_3p3v>;
 571 +       };
 572 +
 573 +       hdmiin: adv7611@4c {
 574 +               compatible = "adi,adv7611";
 575 +               reg = <0x4c>;
 576 +       };
 577 +
 578 +       touchscreen: egalax_ts@04 {
 579 +               compatible = "eeti,egalax_ts";
 580 +               reg = <0x04>;
 581 +               interrupt-parent = <&gpio7>;
 582 +               interrupts = <12 2>; /* gpio7_12 active low */
 583 +               wakeup-gpios = <&gpio7 12 0>;
 584 +       };
 585 +
 586 +       videoout: adv7393@2a {
 587 +               compatible = "adi,adv7393";
 588 +               reg = <0x2a>;
 589 +       };
 590 +
 591 +       videoin: adv7180@20 {
 592 +               compatible = "adi,adv7180";
 593 +               reg = <0x20>;
 594 +       };
 595 +};
 596 +
 597 +&iomuxc {
 598 +       pinctrl-names = "default";
 599 +       pinctrl-0 = <&pinctrl_hog>;
 600 +
 601 +       imx6q-gw5400-a {
 602 +               pinctrl_hog: hoggrp {
 603 +                       fsl,pins = <
 604 +                               MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
 605 +                               MX6QDL_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
 606 +                               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
 607 +                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
 608 +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
 609 +                               MX6QDL_PAD_GPIO_5__GPIO1_IO05     0x80000000 /* GPS_PPS */
 610 +                               MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* TOUCH_IRQ# */
 611 +                               MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
 612 +                               MX6QDL_PAD_KEY_COL2__GPIO4_IO10   0x80000000 /* user2 led */
 613 +                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
 614 +                               MX6QDL_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
 615 +                               MX6QDL_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
 616 +                        >;
 617 +               };
 618 +
 619 +               pinctrl_audmux: audmuxgrp {
 620 +                       fsl,pins = <
 621 +                               MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 622 +                               MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 623 +                               MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 624 +                               MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 625 +                       >;
 626 +               };
 627 +
 628 +               pinctrl_ecspi1: ecspi1grp {
 629 +                       fsl,pins = <
 630 +                               MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 631 +                               MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 632 +                               MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 633 +                       >;
 634 +               };
 635 +
 636 +               pinctrl_enet: enetgrp {
 637 +                       fsl,pins = <
 638 +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 639 +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 640 +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 641 +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 642 +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 643 +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 644 +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 645 +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 646 +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 647 +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 648 +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 649 +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 650 +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 651 +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 652 +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 653 +                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 654 +                       >;
 655 +               };
 656 +
 657 +               pinctrl_i2c1: i2c1grp {
 658 +                       fsl,pins = <
 659 +                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 660 +                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 661 +                       >;
 662 +               };
 663 +
 664 +               pinctrl_i2c2: i2c2grp {
 665 +                       fsl,pins = <
 666 +                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 667 +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 668 +                       >;
 669 +               };
 670 +
 671 +               pinctrl_i2c3: i2c3grp {
 672 +                       fsl,pins = <
 673 +                               MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 674 +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 675 +                       >;
 676 +               };
 677 +
 678 +               pinctrl_uart1: uart1grp {
 679 +                       fsl,pins = <
 680 +                               MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 681 +                               MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 682 +                       >;
 683 +               };
 684 +
 685 +               pinctrl_uart2: uart2grp {
 686 +                       fsl,pins = <
 687 +                               MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 688 +                               MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 689 +                       >;
 690 +               };
 691 +
 692 +               pinctrl_uart5: uart5grp {
 693 +                       fsl,pins = <
 694 +                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 695 +                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 696 +                       >;
 697 +               };
 698 +
 699 +               pinctrl_usbotg: usbotggrp {
 700 +                       fsl,pins = <
 701 +                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 702 +                       >;
 703 +               };
 704 +
 705 +               pinctrl_usdhc3: usdhc3grp {
 706 +                       fsl,pins = <
 707 +                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 708 +                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 709 +                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 710 +                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 711 +                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 712 +                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 713 +                       >;
 714 +               };
 715 +       };
 716 +};
 717 +
 718 +&ldb {
 719 +       status = "okay";
 720 +};
 721 +
 722 +&pcie {
 723 +       reset-gpio = <&gpio1 29 0>;
 724 +       status = "okay";
 725 +
 726 +       eth1: sky2@8 { /* MAC/PHY on bus 8 */
 727 +               compatible = "marvell,sky2";
 728 +       };
 729 +};
 730 +
 731 +&ssi1 {
 732 +       fsl,mode = "i2s-slave";
 733 +       status = "okay";
 734 +};
 735 +
 736 +&uart1 {
 737 +       pinctrl-names = "default";
 738 +       pinctrl-0 = <&pinctrl_uart1>;
 739 +       status = "okay";
 740 +};
 741 +
 742 +&uart2 {
 743 +       pinctrl-names = "default";
 744 +       pinctrl-0 = <&pinctrl_uart2>;
 745 +       status = "okay";
 746 +};
 747 +
 748 +&uart5 {
 749 +       pinctrl-names = "default";
 750 +       pinctrl-0 = <&pinctrl_uart5>;
 751 +       status = "okay";
 752 +};
 753 +
 754 +&usbotg {
 755 +       vbus-supply = <&reg_usb_otg_vbus>;
 756 +       pinctrl-names = "default";
 757 +       pinctrl-0 = <&pinctrl_usbotg>;
 758 +       disable-over-current;
 759 +       status = "okay";
 760 +};
 761 +
 762 +&usbh1 {
 763 +       vbus-supply = <&reg_usb_h1_vbus>;
 764 +       status = "okay";
 765 +};
 766 +
 767 +&usdhc3 {
 768 +       pinctrl-names = "default";
 769 +       pinctrl-0 = <&pinctrl_usdhc3>;
 770 +       cd-gpios = <&gpio7 0 0>;
 771 +       vmmc-supply = <&reg_3p3v>;
 772 +       status = "okay";
 773 +};
 774 --- /dev/null
 775 +++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
 776 @@ -0,0 +1,23 @@
 777 +/*
 778 + * Copyright 2013 Gateworks Corporation
 779 + *
 780 + * The code contained herein is licensed under the GNU General Public
 781 + * License. You may obtain a copy of the GNU General Public License
 782 + * Version 2 or later at the following locations:
 783 + *
 784 + * http://www.opensource.org/licenses/gpl-license.html
 785 + * http://www.gnu.org/copyleft/gpl.html
 786 + */
 787 +
 788 +/dts-v1/;
 789 +#include "imx6q.dtsi"
 790 +#include "imx6qdl-gw54xx.dtsi"
 791 +
 792 +/ {
 793 +       model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
 794 +       compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
 795 +};
 796 +
 797 +&sata {
 798 +       status = "okay";
 799 +};
 800 --- /dev/null
 801 +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
 802 @@ -0,0 +1,374 @@
 803 +/*
 804 + * Copyright 2013 Gateworks Corporation
 805 + *
 806 + * The code contained herein is licensed under the GNU General Public
 807 + * License. You may obtain a copy of the GNU General Public License
 808 + * Version 2 or later at the following locations:
 809 + *
 810 + * http://www.opensource.org/licenses/gpl-license.html
 811 + * http://www.gnu.org/copyleft/gpl.html
 812 + */
 813 +
 814 +/ {
 815 +       /* these are used by bootloader for disabling nodes */
 816 +       aliases {
 817 +               can0 = &can1;
 818 +               ethernet0 = &fec;
 819 +               led0 = &led0;
 820 +               led1 = &led1;
 821 +               nand = &gpmi;
 822 +               usb0 = &usbh1;
 823 +               usb1 = &usbotg;
 824 +       };
 825 +
 826 +       chosen {
 827 +               bootargs = "console=ttymxc1,115200";
 828 +       };
 829 +
 830 +       leds {
 831 +               compatible = "gpio-leds";
 832 +
 833 +               led0: user1 {
 834 +                       label = "user1";
 835 +                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
 836 +                       default-state = "on";
 837 +                       linux,default-trigger = "heartbeat";
 838 +               };
 839 +
 840 +               led1: user2 {
 841 +                       label = "user2";
 842 +                       gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
 843 +                       default-state = "off";
 844 +               };
 845 +       };
 846 +
 847 +       memory {
 848 +               reg = <0x10000000 0x20000000>;
 849 +       };
 850 +
 851 +       pps {
 852 +               compatible = "pps-gpio";
 853 +               gpios = <&gpio1 26 0>;
 854 +               status = "okay";
 855 +       };
 856 +
 857 +       regulators {
 858 +               compatible = "simple-bus";
 859 +               #address-cells = <1>;
 860 +               #size-cells = <0>;
 861 +
 862 +               reg_3p3v: regulator@0 {
 863 +                       compatible = "regulator-fixed";
 864 +                       reg = <0>;
 865 +                       regulator-name = "3P3V";
 866 +                       regulator-min-microvolt = <3300000>;
 867 +                       regulator-max-microvolt = <3300000>;
 868 +                       regulator-always-on;
 869 +               };
 870 +
 871 +               reg_5p0v: regulator@1 {
 872 +                       compatible = "regulator-fixed";
 873 +                       reg = <1>;
 874 +                       regulator-name = "5P0V";
 875 +                       regulator-min-microvolt = <5000000>;
 876 +                       regulator-max-microvolt = <5000000>;
 877 +                       regulator-always-on;
 878 +               };
 879 +
 880 +               reg_usb_otg_vbus: regulator@2 {
 881 +                       compatible = "regulator-fixed";
 882 +                       reg = <2>;
 883 +                       regulator-name = "usb_otg_vbus";
 884 +                       regulator-min-microvolt = <5000000>;
 885 +                       regulator-max-microvolt = <5000000>;
 886 +                       gpio = <&gpio3 22 0>;
 887 +                       enable-active-high;
 888 +               };
 889 +       };
 890 +};
 891 +
 892 +&fec {
 893 +       pinctrl-names = "default";
 894 +       pinctrl-0 = <&pinctrl_enet>;
 895 +       phy-mode = "rgmii";
 896 +       phy-reset-gpios = <&gpio1 30 0>;
 897 +       status = "okay";
 898 +};
 899 +
 900 +&gpmi {
 901 +       pinctrl-names = "default";
 902 +       pinctrl-0 = <&pinctrl_gpmi_nand>;
 903 +       status = "okay";
 904 +};
 905 +
 906 +&i2c1 {
 907 +       clock-frequency = <100000>;
 908 +       pinctrl-names = "default";
 909 +       pinctrl-0 = <&pinctrl_i2c1>;
 910 +       status = "okay";
 911 +
 912 +       eeprom1: eeprom@50 {
 913 +               compatible = "atmel,24c02";
 914 +               reg = <0x50>;
 915 +               pagesize = <16>;
 916 +       };
 917 +
 918 +       eeprom2: eeprom@51 {
 919 +               compatible = "atmel,24c02";
 920 +               reg = <0x51>;
 921 +               pagesize = <16>;
 922 +       };
 923 +
 924 +       eeprom3: eeprom@52 {
 925 +               compatible = "atmel,24c02";
 926 +               reg = <0x52>;
 927 +               pagesize = <16>;
 928 +       };
 929 +
 930 +       eeprom4: eeprom@53 {
 931 +               compatible = "atmel,24c02";
 932 +               reg = <0x53>;
 933 +               pagesize = <16>;
 934 +       };
 935 +
 936 +       gpio: pca9555@23 {
 937 +               compatible = "nxp,pca9555";
 938 +               reg = <0x23>;
 939 +               gpio-controller;
 940 +               #gpio-cells = <2>;
 941 +       };
 942 +
 943 +       hwmon: gsc@29 {
 944 +               compatible = "gw,gsp";
 945 +               reg = <0x29>;
 946 +       };
 947 +
 948 +       rtc: ds1672@68 {
 949 +               compatible = "dallas,ds1672";
 950 +               reg = <0x68>;
 951 +       };
 952 +};
 953 +
 954 +&i2c2 {
 955 +       clock-frequency = <100000>;
 956 +       pinctrl-names = "default";
 957 +       pinctrl-0 = <&pinctrl_i2c2>;
 958 +       status = "okay";
 959 +
 960 +       pmic: ltc3676@3c {
 961 +               compatible = "ltc,ltc3676";
 962 +               reg = <0x3c>;
 963 +
 964 +               regulators {
 965 +                       sw1_reg: ltc3676__sw1 {
 966 +                               regulator-min-microvolt = <1175000>;
 967 +                               regulator-max-microvolt = <1175000>;
 968 +                               regulator-boot-on;
 969 +                               regulator-always-on;
 970 +                       };
 971 +
 972 +                       sw2_reg: ltc3676__sw2 {
 973 +                               regulator-min-microvolt = <1800000>;
 974 +                               regulator-max-microvolt = <1800000>;
 975 +                               regulator-boot-on;
 976 +                               regulator-always-on;
 977 +                       };
 978 +
 979 +                       sw3_reg: ltc3676__sw3 {
 980 +                               regulator-min-microvolt = <1175000>;
 981 +                               regulator-max-microvolt = <1175000>;
 982 +                               regulator-boot-on;
 983 +                               regulator-always-on;
 984 +                       };
 985 +
 986 +                       sw4_reg: ltc3676__sw4 {
 987 +                               regulator-min-microvolt = <1500000>;
 988 +                               regulator-max-microvolt = <1500000>;
 989 +                               regulator-boot-on;
 990 +                               regulator-always-on;
 991 +                       };
 992 +
 993 +                       ldo2_reg: ltc3676__ldo2 {
 994 +                               regulator-min-microvolt = <2500000>;
 995 +                               regulator-max-microvolt = <2500000>;
 996 +                               regulator-boot-on;
 997 +                               regulator-always-on;
 998 +                       };
 999 +
1000 +                       ldo4_reg: ltc3676__ldo4 {
1001 +                               regulator-min-microvolt = <3000000>;
1002 +                               regulator-max-microvolt = <3000000>;
1003 +                       };
1004 +               };
1005 +       };
1006 +};
1007 +
1008 +&i2c3 {
1009 +       clock-frequency = <100000>;
1010 +       pinctrl-names = "default";
1011 +       pinctrl-0 = <&pinctrl_i2c3>;
1012 +       status = "okay";
1013 +
1014 +       videoin: adv7180@20 {
1015 +               compatible = "adi,adv7180";
1016 +               reg = <0x20>;
1017 +       };
1018 +};
1019 +
1020 +&iomuxc {
1021 +       pinctrl-names = "default";
1022 +       pinctrl-0 = <&pinctrl_hog>;
1023 +
1024 +       imx6qdl-gw51xx {
1025 +               pinctrl_hog: hoggrp {
1026 +                       fsl,pins = <
1027 +                               MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
1028 +                               MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
1029 +                               MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
1030 +                               MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1031 +                               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1032 +                               MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x80000000 /* PCIE_RST# */
1033 +                               MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
1034 +                               MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
1035 +                        >;
1036 +               };
1037 +
1038 +               pinctrl_enet: enetgrp {
1039 +                       fsl,pins = <
1040 +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
1041 +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
1042 +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
1043 +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
1044 +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
1045 +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
1046 +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
1047 +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
1048 +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
1049 +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
1050 +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
1051 +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
1052 +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
1053 +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
1054 +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
1055 +                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
1056 +                       >;
1057 +               };
1058 +
1059 +               pinctrl_gpmi_nand: gpminandgrp {
1060 +                       fsl,pins = <
1061 +                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
1062 +                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
1063 +                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
1064 +                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
1065 +                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
1066 +                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
1067 +                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
1068 +                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
1069 +                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
1070 +                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
1071 +                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
1072 +                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
1073 +                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
1074 +                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
1075 +                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
1076 +                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
1077 +                       >;
1078 +               };
1079 +
1080 +               pinctrl_i2c1: i2c1grp {
1081 +                       fsl,pins = <
1082 +                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
1083 +                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
1084 +                       >;
1085 +               };
1086 +
1087 +               pinctrl_i2c2: i2c2grp {
1088 +                       fsl,pins = <
1089 +                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
1090 +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
1091 +                       >;
1092 +               };
1093 +
1094 +               pinctrl_i2c3: i2c3grp {
1095 +                       fsl,pins = <
1096 +                               MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
1097 +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
1098 +                       >;
1099 +               };
1100 +
1101 +               pinctrl_uart1: uart1grp {
1102 +                       fsl,pins = <
1103 +                               MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
1104 +                               MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
1105 +                       >;
1106 +               };
1107 +
1108 +               pinctrl_uart2: uart2grp {
1109 +                       fsl,pins = <
1110 +                               MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
1111 +                               MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
1112 +                       >;
1113 +               };
1114 +
1115 +               pinctrl_uart3: uart3grp {
1116 +                       fsl,pins = <
1117 +                               MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
1118 +                               MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
1119 +                       >;
1120 +               };
1121 +
1122 +               pinctrl_uart5: uart5grp {
1123 +                       fsl,pins = <
1124 +                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
1125 +                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
1126 +                       >;
1127 +               };
1128 +
1129 +               pinctrl_usbotg: usbotggrp {
1130 +                       fsl,pins = <
1131 +                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
1132 +                       >;
1133 +               };
1134 +       };
1135 +};
1136 +
1137 +&pcie {
1138 +       reset-gpio = <&gpio1 0 0>;
1139 +       status = "okay";
1140 +};
1141 +
1142 +&uart1 {
1143 +       pinctrl-names = "default";
1144 +       pinctrl-0 = <&pinctrl_uart1>;
1145 +       status = "okay";
1146 +};
1147 +
1148 +&uart2 {
1149 +       pinctrl-names = "default";
1150 +       pinctrl-0 = <&pinctrl_uart2>;
1151 +       status = "okay";
1152 +};
1153 +
1154 +&uart3 {
1155 +       pinctrl-names = "default";
1156 +       pinctrl-0 = <&pinctrl_uart3>;
1157 +       status = "okay";
1158 +};
1159 +
1160 +&uart5 {
1161 +       pinctrl-names = "default";
1162 +       pinctrl-0 = <&pinctrl_uart5>;
1163 +       status = "okay";
1164 +};
1165 +
1166 +&usbotg {
1167 +       vbus-supply = <&reg_usb_otg_vbus>;
1168 +       pinctrl-names = "default";
1169 +       pinctrl-0 = <&pinctrl_usbotg>;
1170 +       disable-over-current;
1171 +       status = "okay";
1172 +};
1173 +
1174 +&usbh1 {
1175 +       status = "okay";
1176 +};
1177 --- /dev/null
1178 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
1179 @@ -0,0 +1,528 @@
1180 +/*
1181 + * Copyright 2013 Gateworks Corporation
1182 + *
1183 + * The code contained herein is licensed under the GNU General Public
1184 + * License. You may obtain a copy of the GNU General Public License
1185 + * Version 2 or later at the following locations:
1186 + *
1187 + * http://www.opensource.org/licenses/gpl-license.html
1188 + * http://www.gnu.org/copyleft/gpl.html
1189 + */
1190 +
1191 +/ {
1192 +       /* these are used by bootloader for disabling nodes */
1193 +       aliases {
1194 +               ethernet0 = &fec;
1195 +               led0 = &led0;
1196 +               led1 = &led1;
1197 +               led2 = &led2;
1198 +               nand = &gpmi;
1199 +               ssi0 = &ssi1;
1200 +               usb0 = &usbh1;
1201 +               usb1 = &usbotg;
1202 +               usdhc2 = &usdhc3;
1203 +       };
1204 +
1205 +       chosen {
1206 +               bootargs = "console=ttymxc1,115200";
1207 +       };
1208 +
1209 +       backlight {
1210 +               compatible = "pwm-backlight";
1211 +               pwms = <&pwm4 0 5000000>;
1212 +               brightness-levels = <0 4 8 16 32 64 128 255>;
1213 +               default-brightness-level = <7>;
1214 +               status = "okay";
1215 +       };
1216 +
1217 +       leds {
1218 +               compatible = "gpio-leds";
1219 +
1220 +               led0: user1 {
1221 +                       label = "user1";
1222 +                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1223 +                       default-state = "on";
1224 +                       linux,default-trigger = "heartbeat";
1225 +               };
1226 +
1227 +               led1: user2 {
1228 +                       label = "user2";
1229 +                       gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1230 +                       default-state = "off";
1231 +               };
1232 +
1233 +               led2: user3 {
1234 +                       label = "user3";
1235 +                       gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
1236 +                       default-state = "off";
1237 +               };
1238 +       };
1239 +
1240 +       memory {
1241 +               reg = <0x10000000 0x20000000>;
1242 +       };
1243 +
1244 +       pps {
1245 +               compatible = "pps-gpio";
1246 +               gpios = <&gpio1 26 0>;
1247 +               status = "okay";
1248 +       };
1249 +
1250 +       regulators {
1251 +               compatible = "simple-bus";
1252 +               #address-cells = <1>;
1253 +               #size-cells = <0>;
1254 +
1255 +               reg_1p0v: regulator@0 {
1256 +                       compatible = "regulator-fixed";
1257 +                       reg = <0>;
1258 +                       regulator-name = "1P0V";
1259 +                       regulator-min-microvolt = <1000000>;
1260 +                       regulator-max-microvolt = <1000000>;
1261 +                       regulator-always-on;
1262 +               };
1263 +
1264 +               /* remove this fixed regulator once ltc3676__sw2 driver available */
1265 +               reg_1p8v: regulator@1 {
1266 +                       compatible = "regulator-fixed";
1267 +                       reg = <1>;
1268 +                       regulator-name = "1P8V";
1269 +                       regulator-min-microvolt = <1800000>;
1270 +                       regulator-max-microvolt = <1800000>;
1271 +                       regulator-always-on;
1272 +               };
1273 +
1274 +               reg_3p3v: regulator@2 {
1275 +                       compatible = "regulator-fixed";
1276 +                       reg = <2>;
1277 +                       regulator-name = "3P3V";
1278 +                       regulator-min-microvolt = <3300000>;
1279 +                       regulator-max-microvolt = <3300000>;
1280 +                       regulator-always-on;
1281 +               };
1282 +
1283 +               reg_5p0v: regulator@3 {
1284 +                       compatible = "regulator-fixed";
1285 +                       reg = <3>;
1286 +                       regulator-name = "5P0V";
1287 +                       regulator-min-microvolt = <5000000>;
1288 +                       regulator-max-microvolt = <5000000>;
1289 +                       regulator-always-on;
1290 +               };
1291 +
1292 +               reg_usb_otg_vbus: regulator@4 {
1293 +                       compatible = "regulator-fixed";
1294 +                       reg = <4>;
1295 +                       regulator-name = "usb_otg_vbus";
1296 +                       regulator-min-microvolt = <5000000>;
1297 +                       regulator-max-microvolt = <5000000>;
1298 +                       gpio = <&gpio3 22 0>;
1299 +                       enable-active-high;
1300 +               };
1301 +       };
1302 +
1303 +       sound {
1304 +               compatible = "fsl,imx6q-ventana-sgtl5000",
1305 +                            "fsl,imx-audio-sgtl5000";
1306 +               model = "sgtl5000-audio";
1307 +               ssi-controller = <&ssi1>;
1308 +               audio-codec = <&codec>;
1309 +               audio-routing =
1310 +                       "MIC_IN", "Mic Jack",
1311 +                       "Mic Jack", "Mic Bias",
1312 +                       "Headphone Jack", "HP_OUT";
1313 +               mux-int-port = <1>;
1314 +               mux-ext-port = <4>;
1315 +       };
1316 +};
1317 +
1318 +&audmux {
1319 +       pinctrl-names = "default";
1320 +       pinctrl-0 = <&pinctrl_audmux>;
1321 +       status = "okay";
1322 +};
1323 +
1324 +&fec {
1325 +       pinctrl-names = "default";
1326 +       pinctrl-0 = <&pinctrl_enet>;
1327 +       phy-mode = "rgmii";
1328 +       phy-reset-gpios = <&gpio1 30 0>;
1329 +       status = "okay";
1330 +};
1331 +
1332 +&gpmi {
1333 +       pinctrl-names = "default";
1334 +       pinctrl-0 = <&pinctrl_gpmi_nand>;
1335 +       status = "okay";
1336 +};
1337 +
1338 +&i2c1 {
1339 +       clock-frequency = <100000>;
1340 +       pinctrl-names = "default";
1341 +       pinctrl-0 = <&pinctrl_i2c1>;
1342 +       status = "okay";
1343 +
1344 +       eeprom1: eeprom@50 {
1345 +               compatible = "atmel,24c02";
1346 +               reg = <0x50>;
1347 +               pagesize = <16>;
1348 +       };
1349 +
1350 +       eeprom2: eeprom@51 {
1351 +               compatible = "atmel,24c02";
1352 +               reg = <0x51>;
1353 +               pagesize = <16>;
1354 +       };
1355 +
1356 +       eeprom3: eeprom@52 {
1357 +               compatible = "atmel,24c02";
1358 +               reg = <0x52>;
1359 +               pagesize = <16>;
1360 +       };
1361 +
1362 +       eeprom4: eeprom@53 {
1363 +               compatible = "atmel,24c02";
1364 +               reg = <0x53>;
1365 +               pagesize = <16>;
1366 +       };
1367 +
1368 +       gpio: pca9555@23 {
1369 +               compatible = "nxp,pca9555";
1370 +               reg = <0x23>;
1371 +               gpio-controller;
1372 +               #gpio-cells = <2>;
1373 +       };
1374 +
1375 +       hwmon: gsc@29 {
1376 +               compatible = "gw,gsp";
1377 +               reg = <0x29>;
1378 +       };
1379 +
1380 +       rtc: ds1672@68 {
1381 +               compatible = "dallas,ds1672";
1382 +               reg = <0x68>;
1383 +       };
1384 +};
1385 +
1386 +&i2c2 {
1387 +       clock-frequency = <100000>;
1388 +       pinctrl-names = "default";
1389 +       pinctrl-0 = <&pinctrl_i2c2>;
1390 +       status = "okay";
1391 +
1392 +       pciswitch: pex8609@3f {
1393 +               compatible = "plx,pex8609";
1394 +               reg = <0x3f>;
1395 +       };
1396 +
1397 +       pmic: ltc3676@3c {
1398 +               compatible = "ltc,ltc3676";
1399 +               reg = <0x3c>;
1400 +
1401 +               regulators {
1402 +                       sw1_reg: ltc3676__sw1 {
1403 +                               regulator-min-microvolt = <1175000>;
1404 +                               regulator-max-microvolt = <1175000>;
1405 +                               regulator-boot-on;
1406 +                               regulator-always-on;
1407 +                       };
1408 +
1409 +                       sw2_reg: ltc3676__sw2 {
1410 +                               regulator-min-microvolt = <1800000>;
1411 +                               regulator-max-microvolt = <1800000>;
1412 +                               regulator-boot-on;
1413 +                               regulator-always-on;
1414 +                       };
1415 +
1416 +                       sw3_reg: ltc3676__sw3 {
1417 +                               regulator-min-microvolt = <1175000>;
1418 +                               regulator-max-microvolt = <1175000>;
1419 +                               regulator-boot-on;
1420 +                               regulator-always-on;
1421 +                       };
1422 +
1423 +                       sw4_reg: ltc3676__sw4 {
1424 +                               regulator-min-microvolt = <1500000>;
1425 +                               regulator-max-microvolt = <1500000>;
1426 +                               regulator-boot-on;
1427 +                               regulator-always-on;
1428 +                       };
1429 +
1430 +                       ldo2_reg: ltc3676__ldo2 {
1431 +                               regulator-min-microvolt = <2500000>;
1432 +                               regulator-max-microvolt = <2500000>;
1433 +                               regulator-boot-on;
1434 +                               regulator-always-on;
1435 +                       };
1436 +
1437 +                       ldo3_reg: ltc3676__ldo3 {
1438 +                               regulator-min-microvolt = <1800000>;
1439 +                               regulator-max-microvolt = <1800000>;
1440 +                               regulator-boot-on;
1441 +                               regulator-always-on;
1442 +                       };
1443 +
1444 +                       ldo4_reg: ltc3676__ldo4 {
1445 +                               regulator-min-microvolt = <3000000>;
1446 +                               regulator-max-microvolt = <3000000>;
1447 +                       };
1448 +               };
1449 +       };
1450 +};
1451 +
1452 +&i2c3 {
1453 +       clock-frequency = <100000>;
1454 +       pinctrl-names = "default";
1455 +       pinctrl-0 = <&pinctrl_i2c3>;
1456 +       status = "okay";
1457 +
1458 +       accelerometer: fxos8700@1e {
1459 +               compatible = "fsl,fxos8700";
1460 +               reg = <0x13>;
1461 +       };
1462 +
1463 +       codec: sgtl5000@0a {
1464 +               compatible = "fsl,sgtl5000";
1465 +               reg = <0x0a>;
1466 +               clocks = <&clks 201>;
1467 +               VDDA-supply = <&reg_1p8v>;
1468 +               VDDIO-supply = <&reg_3p3v>;
1469 +       };
1470 +
1471 +       touchscreen: egalax_ts@04 {
1472 +               compatible = "eeti,egalax_ts";
1473 +               reg = <0x04>;
1474 +               interrupt-parent = <&gpio7>;
1475 +               interrupts = <12 2>; /* gpio7_12 active low */
1476 +               wakeup-gpios = <&gpio7 12 0>;
1477 +       };
1478 +
1479 +       videoin: adv7180@20 {
1480 +               compatible = "adi,adv7180";
1481 +               reg = <0x20>;
1482 +       };
1483 +};
1484 +
1485 +&iomuxc {
1486 +       pinctrl-names = "default";
1487 +       pinctrl-0 = <&pinctrl_hog>;
1488 +
1489 +       imx6qdl-gw52xx {
1490 +               pinctrl_hog: hoggrp {
1491 +                       fsl,pins = <
1492 +                               MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
1493 +                               MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
1494 +                               MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
1495 +                               MX6QDL_PAD_EIM_D31__GPIO3_IO31   0x80000000 /* VIDDEC_PDN# */
1496 +                               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1497 +                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
1498 +                               MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
1499 +                               MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1500 +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1     0x000130b0 /* AUD4_MCK */
1501 +                               MX6QDL_PAD_GPIO_2__GPIO1_IO02    0x80000000 /* USB_SEL_PCI */
1502 +                               MX6QDL_PAD_GPIO_17__GPIO7_IO12   0x80000000 /* TOUCH_IRQ# */
1503 +                               MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
1504 +                               MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
1505 +                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x80000000 /* user3 led */
1506 +                               MX6QDL_PAD_SD2_CMD__GPIO1_IO11   0x80000000 /* LVDS_TCH# */
1507 +                               MX6QDL_PAD_SD3_DAT5__GPIO7_IO00  0x80000000 /* SD3_CD# */
1508 +                               MX6QDL_PAD_SD4_DAT3__GPIO2_IO11  0x80000000 /* UART2_EN# */
1509 +                        >;
1510 +               };
1511 +
1512 +               pinctrl_audmux: audmuxgrp {
1513 +                       fsl,pins = <
1514 +                               MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
1515 +                               MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
1516 +                               MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
1517 +                               MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
1518 +                       >;
1519 +               };
1520 +
1521 +               pinctrl_enet: enetgrp {
1522 +                       fsl,pins = <
1523 +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
1524 +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
1525 +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
1526 +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
1527 +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
1528 +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
1529 +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
1530 +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
1531 +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
1532 +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
1533 +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
1534 +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
1535 +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
1536 +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
1537 +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
1538 +                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
1539 +                       >;
1540 +               };
1541 +
1542 +               pinctrl_gpmi_nand: gpminandgrp {
1543 +                       fsl,pins = <
1544 +                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
1545 +                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
1546 +                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
1547 +                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
1548 +                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
1549 +                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
1550 +                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
1551 +                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
1552 +                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
1553 +                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
1554 +                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
1555 +                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
1556 +                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
1557 +                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
1558 +                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
1559 +                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
1560 +                       >;
1561 +               };
1562 +
1563 +               pinctrl_i2c1: i2c1grp {
1564 +                       fsl,pins = <
1565 +                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
1566 +                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
1567 +                       >;
1568 +               };
1569 +
1570 +               pinctrl_i2c2: i2c2grp {
1571 +                       fsl,pins = <
1572 +                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
1573 +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
1574 +                       >;
1575 +               };
1576 +
1577 +               pinctrl_i2c3: i2c3grp {
1578 +                       fsl,pins = <
1579 +                               MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
1580 +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
1581 +                       >;
1582 +               };
1583 +
1584 +               pinctrl_pwm4: pwm4grp {
1585 +                       fsl,pins = <
1586 +                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
1587 +                       >;
1588 +               };
1589 +
1590 +               pinctrl_uart1: uart1grp {
1591 +                       fsl,pins = <
1592 +                               MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
1593 +                               MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
1594 +                       >;
1595 +               };
1596 +
1597 +               pinctrl_uart2: uart2grp {
1598 +                       fsl,pins = <
1599 +                               MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
1600 +                               MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
1601 +                       >;
1602 +               };
1603 +
1604 +               pinctrl_uart5: uart5grp {
1605 +                       fsl,pins = <
1606 +                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
1607 +                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
1608 +                       >;
1609 +               };
1610 +
1611 +               pinctrl_usbotg: usbotggrp {
1612 +                       fsl,pins = <
1613 +                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
1614 +                       >;
1615 +               };
1616 +
1617 +               pinctrl_usdhc3: usdhc3grp {
1618 +                       fsl,pins = <
1619 +                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
1620 +                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
1621 +                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
1622 +                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
1623 +                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
1624 +                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
1625 +                       >;
1626 +               };
1627 +       };
1628 +};
1629 +
1630 +&ldb {
1631 +       status = "okay";
1632 +
1633 +       lvds-channel@0 {
1634 +               fsl,data-mapping = "spwg";
1635 +               fsl,data-width = <18>;
1636 +               status = "okay";
1637 +
1638 +               display-timings {
1639 +                       native-mode = <&timing0>;
1640 +                       timing0: hsd100pxn1 {
1641 +                               clock-frequency = <65000000>;
1642 +                               hactive = <1024>;
1643 +                               vactive = <768>;
1644 +                               hback-porch = <220>;
1645 +                               hfront-porch = <40>;
1646 +                               vback-porch = <21>;
1647 +                               vfront-porch = <7>;
1648 +                               hsync-len = <60>;
1649 +                               vsync-len = <10>;
1650 +                       };
1651 +               };
1652 +       };
1653 +};
1654 +
1655 +&pcie {
1656 +       reset-gpio = <&gpio1 29 0>;
1657 +       status = "okay";
1658 +};
1659 +
1660 +&pwm4 {
1661 +       pinctrl-names = "default";
1662 +       pinctrl-0 = <&pinctrl_pwm4>;
1663 +       status = "okay";
1664 +};
1665 +
1666 +&ssi1 {
1667 +       fsl,mode = "i2s-slave";
1668 +       status = "okay";
1669 +};
1670 +
1671 +&uart1 {
1672 +       pinctrl-names = "default";
1673 +       pinctrl-0 = <&pinctrl_uart1>;
1674 +       status = "okay";
1675 +};
1676 +
1677 +&uart2 {
1678 +       pinctrl-names = "default";
1679 +       pinctrl-0 = <&pinctrl_uart2>;
1680 +       status = "okay";
1681 +};
1682 +
1683 +&uart5 {
1684 +       pinctrl-names = "default";
1685 +       pinctrl-0 = <&pinctrl_uart5>;
1686 +       status = "okay";
1687 +};
1688 +
1689 +&usbotg {
1690 +       vbus-supply = <&reg_usb_otg_vbus>;
1691 +       pinctrl-names = "default";
1692 +       pinctrl-0 = <&pinctrl_usbotg>;
1693 +       disable-over-current;
1694 +       status = "okay";
1695 +};
1696 +
1697 +&usbh1 {
1698 +       status = "okay";
1699 +};
1700 +
1701 +&usdhc3 {
1702 +       pinctrl-names = "default";
1703 +       pinctrl-0 = <&pinctrl_usdhc3>;
1704 +       cd-gpios = <&gpio7 0 0>;
1705 +       vmmc-supply = <&reg_3p3v>;
1706 +       status = "okay";
1707 +};
1708 --- /dev/null
1709 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
1710 @@ -0,0 +1,573 @@
1711 +/*
1712 + * Copyright 2013 Gateworks Corporation
1713 + *
1714 + * The code contained herein is licensed under the GNU General Public
1715 + * License. You may obtain a copy of the GNU General Public License
1716 + * Version 2 or later at the following locations:
1717 + *
1718 + * http://www.opensource.org/licenses/gpl-license.html
1719 + * http://www.gnu.org/copyleft/gpl.html
1720 + */
1721 +
1722 +/ {
1723 +       /* these are used by bootloader for disabling nodes */
1724 +       aliases {
1725 +               can0 = &can1;
1726 +               ethernet0 = &fec;
1727 +               ethernet1 = &eth1;
1728 +               led0 = &led0;
1729 +               led1 = &led1;
1730 +               led2 = &led2;
1731 +               nand = &gpmi;
1732 +               sky2 = &eth1;
1733 +               ssi0 = &ssi1;
1734 +               usb0 = &usbh1;
1735 +               usb1 = &usbotg;
1736 +               usdhc2 = &usdhc3;
1737 +       };
1738 +
1739 +       chosen {
1740 +               bootargs = "console=ttymxc1,115200";
1741 +       };
1742 +
1743 +       backlight {
1744 +               compatible = "pwm-backlight";
1745 +               pwms = <&pwm4 0 5000000>;
1746 +               brightness-levels = <0 4 8 16 32 64 128 255>;
1747 +               default-brightness-level = <7>;
1748 +               status = "okay";
1749 +       };
1750 +
1751 +       leds {
1752 +               compatible = "gpio-leds";
1753 +
1754 +               led0: user1 {
1755 +                       label = "user1";
1756 +                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1757 +                       default-state = "on";
1758 +                       linux,default-trigger = "heartbeat";
1759 +               };
1760 +
1761 +               led1: user2 {
1762 +                       label = "user2";
1763 +                       gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1764 +                       default-state = "off";
1765 +               };
1766 +
1767 +               led2: user3 {
1768 +                       label = "user3";
1769 +                       gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
1770 +                       default-state = "off";
1771 +               };
1772 +       };
1773 +
1774 +       memory {
1775 +               reg = <0x10000000 0x40000000>;
1776 +       };
1777 +
1778 +       pps {
1779 +               compatible = "pps-gpio";
1780 +               gpios = <&gpio1 26 0>;
1781 +               status = "okay";
1782 +       };
1783 +
1784 +       regulators {
1785 +               compatible = "simple-bus";
1786 +               #address-cells = <1>;
1787 +               #size-cells = <0>;
1788 +
1789 +               reg_1p0v: regulator@0 {
1790 +                       compatible = "regulator-fixed";
1791 +                       reg = <0>;
1792 +                       regulator-name = "1P0V";
1793 +                       regulator-min-microvolt = <1000000>;
1794 +                       regulator-max-microvolt = <1000000>;
1795 +                       regulator-always-on;
1796 +               };
1797 +
1798 +               /* remove when pmic 1p8 regulator available */
1799 +               reg_1p8v: regulator@1 {
1800 +                       compatible = "regulator-fixed";
1801 +                       reg = <1>;
1802 +                       regulator-name = "1P8V";
1803 +                       regulator-min-microvolt = <1800000>;
1804 +                       regulator-max-microvolt = <1800000>;
1805 +                       regulator-always-on;
1806 +               };
1807 +
1808 +               reg_3p3v: regulator@2 {
1809 +                       compatible = "regulator-fixed";
1810 +                       reg = <2>;
1811 +                       regulator-name = "3P3V";
1812 +                       regulator-min-microvolt = <3300000>;
1813 +                       regulator-max-microvolt = <3300000>;
1814 +                       regulator-always-on;
1815 +               };
1816 +
1817 +               reg_usb_h1_vbus: regulator@3 {
1818 +                       compatible = "regulator-fixed";
1819 +                       reg = <3>;
1820 +                       regulator-name = "usb_h1_vbus";
1821 +                       regulator-min-microvolt = <5000000>;
1822 +                       regulator-max-microvolt = <5000000>;
1823 +                       regulator-always-on;
1824 +               };
1825 +
1826 +               reg_usb_otg_vbus: regulator@4 {
1827 +                       compatible = "regulator-fixed";
1828 +                       reg = <4>;
1829 +                       regulator-name = "usb_otg_vbus";
1830 +                       regulator-min-microvolt = <5000000>;
1831 +                       regulator-max-microvolt = <5000000>;
1832 +                       gpio = <&gpio3 22 0>;
1833 +                       enable-active-high;
1834 +               };
1835 +       };
1836 +
1837 +       sound {
1838 +               compatible = "fsl,imx6q-ventana-sgtl5000",
1839 +                            "fsl,imx-audio-sgtl5000";
1840 +               model = "sgtl5000-audio";
1841 +               ssi-controller = <&ssi1>;
1842 +               audio-codec = <&codec>;
1843 +               audio-routing =
1844 +                       "MIC_IN", "Mic Jack",
1845 +                       "Mic Jack", "Mic Bias",
1846 +                       "Headphone Jack", "HP_OUT";
1847 +               mux-int-port = <1>;
1848 +               mux-ext-port = <4>;
1849 +       };
1850 +};
1851 +
1852 +&audmux {
1853 +       pinctrl-names = "default";
1854 +       pinctrl-0 = <&pinctrl_audmux>;
1855 +       status = "okay";
1856 +};
1857 +
1858 +&can1 {
1859 +       pinctrl-names = "default";
1860 +       pinctrl-0 = <&pinctrl_flexcan1>;
1861 +       status = "okay";
1862 +};
1863 +
1864 +&fec {
1865 +       pinctrl-names = "default";
1866 +       pinctrl-0 = <&pinctrl_enet>;
1867 +       phy-mode = "rgmii";
1868 +       phy-reset-gpios = <&gpio1 30 0>;
1869 +       status = "okay";
1870 +};
1871 +
1872 +&gpmi {
1873 +       pinctrl-names = "default";
1874 +       pinctrl-0 = <&pinctrl_gpmi_nand>;
1875 +       status = "okay";
1876 +};
1877 +
1878 +&i2c1 {
1879 +       clock-frequency = <100000>;
1880 +       pinctrl-names = "default";
1881 +       pinctrl-0 = <&pinctrl_i2c1>;
1882 +       status = "okay";
1883 +
1884 +       eeprom1: eeprom@50 {
1885 +               compatible = "atmel,24c02";
1886 +               reg = <0x50>;
1887 +               pagesize = <16>;
1888 +       };
1889 +
1890 +       eeprom2: eeprom@51 {
1891 +               compatible = "atmel,24c02";
1892 +               reg = <0x51>;
1893 +               pagesize = <16>;
1894 +       };
1895 +
1896 +       eeprom3: eeprom@52 {
1897 +               compatible = "atmel,24c02";
1898 +               reg = <0x52>;
1899 +               pagesize = <16>;
1900 +       };
1901 +
1902 +       eeprom4: eeprom@53 {
1903 +               compatible = "atmel,24c02";
1904 +               reg = <0x53>;
1905 +               pagesize = <16>;
1906 +       };
1907 +
1908 +       gpio: pca9555@23 {
1909 +               compatible = "nxp,pca9555";
1910 +               reg = <0x23>;
1911 +               gpio-controller;
1912 +               #gpio-cells = <2>;
1913 +       };
1914 +
1915 +       hwmon: gsc@29 {
1916 +               compatible = "gw,gsp";
1917 +               reg = <0x29>;
1918 +       };
1919 +
1920 +       rtc: ds1672@68 {
1921 +               compatible = "dallas,ds1672";
1922 +               reg = <0x68>;
1923 +       };
1924 +};
1925 +
1926 +&i2c2 {
1927 +       clock-frequency = <100000>;
1928 +       pinctrl-names = "default";
1929 +       pinctrl-0 = <&pinctrl_i2c2>;
1930 +       status = "okay";
1931 +
1932 +       pciclkgen: si53156@6b {
1933 +               compatible = "sil,si53156";
1934 +               reg = <0x6b>;
1935 +       };
1936 +
1937 +       pciswitch: pex8606@3f {
1938 +               compatible = "plx,pex8606";
1939 +               reg = <0x3f>;
1940 +       };
1941 +
1942 +       pmic: ltc3676@3c {
1943 +               compatible = "ltc,ltc3676";
1944 +               reg = <0x3c>;
1945 +
1946 +               regulators {
1947 +                       /* VDD_SOC */
1948 +                       sw1_reg: ltc3676__sw1 {
1949 +                               regulator-min-microvolt = <1175000>;
1950 +                               regulator-max-microvolt = <1175000>;
1951 +                               regulator-boot-on;
1952 +                               regulator-always-on;
1953 +                       };
1954 +
1955 +                       /* VDD_1P8 */
1956 +                       sw2_reg: ltc3676__sw2 {
1957 +                               regulator-min-microvolt = <1800000>;
1958 +                               regulator-max-microvolt = <1800000>;
1959 +                               regulator-boot-on;
1960 +                               regulator-always-on;
1961 +                       };
1962 +
1963 +                       /* VDD_ARM */
1964 +                       sw3_reg: ltc3676__sw3 {
1965 +                               regulator-min-microvolt = <1175000>;
1966 +                               regulator-max-microvolt = <1175000>;
1967 +                               regulator-boot-on;
1968 +                               regulator-always-on;
1969 +                       };
1970 +
1971 +                       /* VDD_DDR */
1972 +                       sw4_reg: ltc3676__sw4 {
1973 +                               regulator-min-microvolt = <1500000>;
1974 +                               regulator-max-microvolt = <1500000>;
1975 +                               regulator-boot-on;
1976 +                               regulator-always-on;
1977 +                       };
1978 +
1979 +                       /* VDD_2P5 */
1980 +                       ldo2_reg: ltc3676__ldo2 {
1981 +                               regulator-min-microvolt = <2500000>;
1982 +                               regulator-max-microvolt = <2500000>;
1983 +                               regulator-boot-on;
1984 +                               regulator-always-on;
1985 +                       };
1986 +
1987 +                       /* VDD_1P8 */
1988 +                       ldo3_reg: ltc3676__ldo3 {
1989 +                               regulator-min-microvolt = <1800000>;
1990 +                               regulator-max-microvolt = <1800000>;
1991 +                               regulator-boot-on;
1992 +                               regulator-always-on;
1993 +                       };
1994 +
1995 +                       /* VDD_HIGH */
1996 +                       ldo4_reg: ltc3676__ldo4 {
1997 +                               regulator-min-microvolt = <3000000>;
1998 +                               regulator-max-microvolt = <3000000>;
1999 +                       };
2000 +               };
2001 +       };
2002 +};
2003 +
2004 +&i2c3 {
2005 +       clock-frequency = <100000>;
2006 +       pinctrl-names = "default";
2007 +       pinctrl-0 = <&pinctrl_i2c3>;
2008 +       status = "okay";
2009 +
2010 +       accelerometer: fxos8700@1e {
2011 +               compatible = "fsl,fxos8700";
2012 +               reg = <0x1e>;
2013 +       };
2014 +
2015 +       codec: sgtl5000@0a {
2016 +               compatible = "fsl,sgtl5000";
2017 +               reg = <0x0a>;
2018 +               clocks = <&clks 201>;
2019 +               VDDA-supply = <&reg_1p8v>;
2020 +               VDDIO-supply = <&reg_3p3v>;
2021 +       };
2022 +
2023 +       hdmiin: adv7611@4c {
2024 +               compatible = "adi,adv7611";
2025 +               reg = <0x4c>;
2026 +       };
2027 +
2028 +       touchscreen: egalax_ts@04 {
2029 +               compatible = "eeti,egalax_ts";
2030 +               reg = <0x04>;
2031 +               interrupt-parent = <&gpio1>;
2032 +               interrupts = <11 2>; /* gpio1_11 active low */
2033 +               wakeup-gpios = <&gpio1 11 0>;
2034 +       };
2035 +
2036 +       videoout: adv7393@2a {
2037 +               compatible = "adi,adv7393";
2038 +               reg = <0x2a>;
2039 +       };
2040 +
2041 +       videoin: adv7180@20 {
2042 +               compatible = "adi,adv7180";
2043 +               reg = <0x20>;
2044 +       };
2045 +};
2046 +
2047 +&iomuxc {
2048 +       pinctrl-names = "default";
2049 +       pinctrl-0 = <&pinctrl_hog>;
2050 +
2051 +       imx6qdl-gw53xx {
2052 +               pinctrl_hog: hoggrp {
2053 +                       fsl,pins = <
2054 +                               MX6QDL_PAD_EIM_A19__GPIO2_IO19    0x80000000 /* PCIE6EXP_DIO0 */
2055 +                               MX6QDL_PAD_EIM_A20__GPIO2_IO18    0x80000000 /* PCIE6EXP_DIO1 */
2056 +                               MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
2057 +                               MX6QDL_PAD_ENET_RXD0__GPIO1_IO27  0x80000000 /* GPS_SHDN */
2058 +                               MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
2059 +                               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2060 +                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
2061 +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
2062 +                               MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
2063 +                               MX6QDL_PAD_GPIO_8__GPIO1_IO08     0x80000000 /* PMIC_IRQ# */
2064 +                               MX6QDL_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* HUB_RST# */
2065 +                               MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* PCIE_WDIS# */
2066 +                               MX6QDL_PAD_GPIO_19__GPIO4_IO05    0x80000000 /* ACCEL_IRQ# */
2067 +                               MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
2068 +                               MX6QDL_PAD_KEY_COL4__GPIO4_IO14   0x80000000 /* USBOTG_OC# */
2069 +                               MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
2070 +                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
2071 +                               MX6QDL_PAD_SD2_CMD__GPIO1_IO11    0x80000000 /* TOUCH_IRQ# */
2072 +                               MX6QDL_PAD_SD3_DAT5__GPIO7_IO00   0x80000000 /* SD3_DET# */
2073 +                        >;
2074 +               };
2075 +
2076 +               pinctrl_audmux: audmuxgrp {
2077 +                       fsl,pins = <
2078 +                               MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
2079 +                               MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
2080 +                               MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
2081 +                               MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
2082 +                       >;
2083 +               };
2084 +
2085 +               pinctrl_enet: enetgrp {
2086 +                       fsl,pins = <
2087 +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
2088 +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
2089 +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
2090 +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
2091 +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
2092 +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
2093 +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
2094 +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
2095 +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
2096 +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
2097 +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
2098 +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
2099 +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
2100 +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
2101 +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
2102 +                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
2103 +                       >;
2104 +               };
2105 +
2106 +               pinctrl_flexcan1: flexcan1grp {
2107 +                       fsl,pins = <
2108 +                               MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x80000000
2109 +                               MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x80000000
2110 +                       >;
2111 +               };
2112 +
2113 +               pinctrl_gpmi_nand: gpminandgrp {
2114 +                       fsl,pins = <
2115 +                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
2116 +                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
2117 +                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
2118 +                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
2119 +                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
2120 +                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
2121 +                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
2122 +                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
2123 +                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
2124 +                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
2125 +                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
2126 +                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
2127 +                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
2128 +                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
2129 +                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
2130 +                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
2131 +                       >;
2132 +               };
2133 +
2134 +               pinctrl_i2c1: i2c1grp {
2135 +                       fsl,pins = <
2136 +                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
2137 +                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
2138 +                       >;
2139 +               };
2140 +
2141 +               pinctrl_i2c2: i2c2grp {
2142 +                       fsl,pins = <
2143 +                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
2144 +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
2145 +                       >;
2146 +               };
2147 +
2148 +               pinctrl_i2c3: i2c3grp {
2149 +                       fsl,pins = <
2150 +                               MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
2151 +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
2152 +                       >;
2153 +               };
2154 +
2155 +               pinctrl_pwm4: pwm4grp {
2156 +                       fsl,pins = <
2157 +                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
2158 +                       >;
2159 +               };
2160 +
2161 +               pinctrl_uart1: uart1grp {
2162 +                       fsl,pins = <
2163 +                               MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
2164 +                               MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
2165 +                       >;
2166 +               };
2167 +
2168 +               pinctrl_uart2: uart2grp {
2169 +                       fsl,pins = <
2170 +                               MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
2171 +                               MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
2172 +                       >;
2173 +               };
2174 +
2175 +               pinctrl_uart5: uart5grp {
2176 +                       fsl,pins = <
2177 +                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
2178 +                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
2179 +                       >;
2180 +               };
2181 +
2182 +               pinctrl_usbotg: usbotggrp {
2183 +                       fsl,pins = <
2184 +                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
2185 +                       >;
2186 +               };
2187 +
2188 +               pinctrl_usdhc3: usdhc3grp {
2189 +                       fsl,pins = <
2190 +                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
2191 +                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
2192 +                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
2193 +                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
2194 +                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
2195 +                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
2196 +                       >;
2197 +               };
2198 +       };
2199 +};
2200 +
2201 +&ldb {
2202 +       status = "okay";
2203 +
2204 +       lvds-channel@0 {
2205 +               fsl,data-mapping = "spwg";
2206 +               fsl,data-width = <18>;
2207 +               status = "okay";
2208 +
2209 +               display-timings {
2210 +                       native-mode = <&timing0>;
2211 +                       timing0: hsd100pxn1 {
2212 +                               clock-frequency = <65000000>;
2213 +                               hactive = <1024>;
2214 +                               vactive = <768>;
2215 +                               hback-porch = <220>;
2216 +                               hfront-porch = <40>;
2217 +                               vback-porch = <21>;
2218 +                               vfront-porch = <7>;
2219 +                               hsync-len = <60>;
2220 +                               vsync-len = <10>;
2221 +                       };
2222 +               };
2223 +       };
2224 +};
2225 +
2226 +&pcie {
2227 +       reset-gpio = <&gpio1 29 0>;
2228 +       status = "okay";
2229 +
2230 +       eth1: sky2@8 { /* MAC/PHY on bus 8 */
2231 +               compatible = "marvell,sky2";
2232 +       };
2233 +};
2234 +
2235 +&pwm4 {
2236 +       pinctrl-names = "default";
2237 +       pinctrl-0 = <&pinctrl_pwm4>;
2238 +       status = "okay";
2239 +};
2240 +
2241 +&ssi1 {
2242 +       fsl,mode = "i2s-slave";
2243 +       status = "okay";
2244 +};
2245 +
2246 +&uart1 {
2247 +       pinctrl-names = "default";
2248 +       pinctrl-0 = <&pinctrl_uart1>;
2249 +       status = "okay";
2250 +};
2251 +
2252 +&uart2 {
2253 +       pinctrl-names = "default";
2254 +       pinctrl-0 = <&pinctrl_uart2>;
2255 +       status = "okay";
2256 +};
2257 +
2258 +&uart5 {
2259 +       pinctrl-names = "default";
2260 +       pinctrl-0 = <&pinctrl_uart5>;
2261 +       status = "okay";
2262 +};
2263 +
2264 +&usbotg {
2265 +       vbus-supply = <&reg_usb_otg_vbus>;
2266 +       pinctrl-names = "default";
2267 +       pinctrl-0 = <&pinctrl_usbotg>;
2268 +       disable-over-current;
2269 +       status = "okay";
2270 +};
2271 +
2272 +&usbh1 {
2273 +       vbus-supply = <&reg_usb_h1_vbus>;
2274 +       status = "okay";
2275 +};
2276 +
2277 +&usdhc3 {
2278 +       pinctrl-names = "default";
2279 +       pinctrl-0 = <&pinctrl_usdhc3>;
2280 +       cd-gpios = <&gpio7 0 0>;
2281 +       vmmc-supply = <&reg_3p3v>;
2282 +       status = "okay";
2283 +};
2284 --- /dev/null
2285 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
2286 @@ -0,0 +1,600 @@
2287 +/*
2288 + * Copyright 2013 Gateworks Corporation
2289 + *
2290 + * The code contained herein is licensed under the GNU General Public
2291 + * License. You may obtain a copy of the GNU General Public License
2292 + * Version 2 or later at the following locations:
2293 + *
2294 + * http://www.opensource.org/licenses/gpl-license.html
2295 + * http://www.gnu.org/copyleft/gpl.html
2296 + */
2297 +
2298 +/ {
2299 +       /* these are used by bootloader for disabling nodes */
2300 +       aliases {
2301 +               can0 = &can1;
2302 +               ethernet0 = &fec;
2303 +               ethernet1 = &eth1;
2304 +               led0 = &led0;
2305 +               led1 = &led1;
2306 +               led2 = &led2;
2307 +               nand = &gpmi;
2308 +               sky2 = &eth1;
2309 +               ssi0 = &ssi1;
2310 +               usb0 = &usbh1;
2311 +               usb1 = &usbotg;
2312 +               usdhc2 = &usdhc3;
2313 +       };
2314 +
2315 +       chosen {
2316 +               bootargs = "console=ttymxc1,115200";
2317 +       };
2318 +
2319 +       backlight {
2320 +               compatible = "pwm-backlight";
2321 +               pwms = <&pwm4 0 5000000>;
2322 +               brightness-levels = <0 4 8 16 32 64 128 255>;
2323 +               default-brightness-level = <7>;
2324 +               status = "okay";
2325 +       };
2326 +
2327 +       leds {
2328 +               compatible = "gpio-leds";
2329 +
2330 +               led0: user1 {
2331 +                       label = "user1";
2332 +                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
2333 +                       default-state = "on";
2334 +                       linux,default-trigger = "heartbeat";
2335 +               };
2336 +
2337 +               led1: user2 {
2338 +                       label = "user2";
2339 +                       gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
2340 +                       default-state = "off";
2341 +               };
2342 +
2343 +               led2: user3 {
2344 +                       label = "user3";
2345 +                       gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
2346 +                       default-state = "off";
2347 +               };
2348 +       };
2349 +
2350 +       memory {
2351 +               reg = <0x10000000 0x40000000>;
2352 +       };
2353 +
2354 +       pps {
2355 +               compatible = "pps-gpio";
2356 +               gpios = <&gpio1 26 0>;
2357 +               status = "okay";
2358 +       };
2359 +
2360 +       regulators {
2361 +               compatible = "simple-bus";
2362 +               #address-cells = <1>;
2363 +               #size-cells = <0>;
2364 +
2365 +               reg_1p0v: regulator@0 {
2366 +                       compatible = "regulator-fixed";
2367 +                       reg = <0>;
2368 +                       regulator-name = "1P0V";
2369 +                       regulator-min-microvolt = <1000000>;
2370 +                       regulator-max-microvolt = <1000000>;
2371 +                       regulator-always-on;
2372 +               };
2373 +
2374 +               reg_3p3v: regulator@1 {
2375 +                       compatible = "regulator-fixed";
2376 +                       reg = <1>;
2377 +                       regulator-name = "3P3V";
2378 +                       regulator-min-microvolt = <3300000>;
2379 +                       regulator-max-microvolt = <3300000>;
2380 +                       regulator-always-on;
2381 +               };
2382 +
2383 +               reg_usb_h1_vbus: regulator@2 {
2384 +                       compatible = "regulator-fixed";
2385 +                       reg = <2>;
2386 +                       regulator-name = "usb_h1_vbus";
2387 +                       regulator-min-microvolt = <5000000>;
2388 +                       regulator-max-microvolt = <5000000>;
2389 +                       regulator-always-on;
2390 +               };
2391 +
2392 +               reg_usb_otg_vbus: regulator@3 {
2393 +                       compatible = "regulator-fixed";
2394 +                       reg = <3>;
2395 +                       regulator-name = "usb_otg_vbus";
2396 +                       regulator-min-microvolt = <5000000>;
2397 +                       regulator-max-microvolt = <5000000>;
2398 +                       gpio = <&gpio3 22 0>;
2399 +                       enable-active-high;
2400 +               };
2401 +       };
2402 +
2403 +       sound {
2404 +               compatible = "fsl,imx6q-ventana-sgtl5000",
2405 +                            "fsl,imx-audio-sgtl5000";
2406 +               model = "sgtl5000-audio";
2407 +               ssi-controller = <&ssi1>;
2408 +               audio-codec = <&codec>;
2409 +               audio-routing =
2410 +                       "MIC_IN", "Mic Jack",
2411 +                       "Mic Jack", "Mic Bias",
2412 +                       "Headphone Jack", "HP_OUT";
2413 +               mux-int-port = <1>;
2414 +               mux-ext-port = <4>;
2415 +       };
2416 +};
2417 +
2418 +&audmux {
2419 +       pinctrl-names = "default";
2420 +       pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
2421 +       status = "okay";
2422 +};
2423 +
2424 +&can1 {
2425 +       pinctrl-names = "default";
2426 +       pinctrl-0 = <&pinctrl_flexcan1>;
2427 +       status = "okay";
2428 +};
2429 +
2430 +&fec {
2431 +       pinctrl-names = "default";
2432 +       pinctrl-0 = <&pinctrl_enet>;
2433 +       phy-mode = "rgmii";
2434 +       phy-reset-gpios = <&gpio1 30 0>;
2435 +       status = "okay";
2436 +};
2437 +
2438 +&gpmi {
2439 +       pinctrl-names = "default";
2440 +       pinctrl-0 = <&pinctrl_gpmi_nand>;
2441 +       status = "okay";
2442 +};
2443 +
2444 +&i2c1 {
2445 +       clock-frequency = <100000>;
2446 +       pinctrl-names = "default";
2447 +       pinctrl-0 = <&pinctrl_i2c1>;
2448 +       status = "okay";
2449 +
2450 +       eeprom1: eeprom@50 {
2451 +               compatible = "atmel,24c02";
2452 +               reg = <0x50>;
2453 +               pagesize = <16>;
2454 +       };
2455 +
2456 +       eeprom2: eeprom@51 {
2457 +               compatible = "atmel,24c02";
2458 +               reg = <0x51>;
2459 +               pagesize = <16>;
2460 +       };
2461 +
2462 +       eeprom3: eeprom@52 {
2463 +               compatible = "atmel,24c02";
2464 +               reg = <0x52>;
2465 +               pagesize = <16>;
2466 +       };
2467 +
2468 +       eeprom4: eeprom@53 {
2469 +               compatible = "atmel,24c02";
2470 +               reg = <0x53>;
2471 +               pagesize = <16>;
2472 +       };
2473 +
2474 +       gpio: pca9555@23 {
2475 +               compatible = "nxp,pca9555";
2476 +               reg = <0x23>;
2477 +               gpio-controller;
2478 +               #gpio-cells = <2>;
2479 +       };
2480 +
2481 +       hwmon: gsc@29 {
2482 +               compatible = "gw,gsp";
2483 +               reg = <0x29>;
2484 +       };
2485 +
2486 +       rtc: ds1672@68 {
2487 +               compatible = "dallas,ds1672";
2488 +               reg = <0x68>;
2489 +       };
2490 +};
2491 +
2492 +&i2c2 {
2493 +       clock-frequency = <100000>;
2494 +       pinctrl-names = "default";
2495 +       pinctrl-0 = <&pinctrl_i2c2>;
2496 +       status = "okay";
2497 +
2498 +       pmic: pfuze100@08 {
2499 +               compatible = "fsl,pfuze100";
2500 +               reg = <0x08>;
2501 +
2502 +               regulators {
2503 +                       sw1a_reg: sw1ab {
2504 +                               regulator-min-microvolt = <300000>;
2505 +                               regulator-max-microvolt = <1875000>;
2506 +                               regulator-boot-on;
2507 +                               regulator-always-on;
2508 +                               regulator-ramp-delay = <6250>;
2509 +                       };
2510 +
2511 +                       sw1c_reg: sw1c {
2512 +                               regulator-min-microvolt = <300000>;
2513 +                               regulator-max-microvolt = <1875000>;
2514 +                               regulator-boot-on;
2515 +                               regulator-always-on;
2516 +                               regulator-ramp-delay = <6250>;
2517 +                       };
2518 +
2519 +                       sw2_reg: sw2 {
2520 +                               regulator-min-microvolt = <800000>;
2521 +                               regulator-max-microvolt = <3950000>;
2522 +                               regulator-boot-on;
2523 +                               regulator-always-on;
2524 +                       };
2525 +
2526 +                       sw3a_reg: sw3a {
2527 +                               regulator-min-microvolt = <400000>;
2528 +                               regulator-max-microvolt = <1975000>;
2529 +                               regulator-boot-on;
2530 +                               regulator-always-on;
2531 +                       };
2532 +
2533 +                       sw3b_reg: sw3b {
2534 +                               regulator-min-microvolt = <400000>;
2535 +                               regulator-max-microvolt = <1975000>;
2536 +                               regulator-boot-on;
2537 +                               regulator-always-on;
2538 +                       };
2539 +
2540 +                       sw4_reg: sw4 {
2541 +                               regulator-min-microvolt = <800000>;
2542 +                               regulator-max-microvolt = <3300000>;
2543 +                       };
2544 +
2545 +                       swbst_reg: swbst {
2546 +                               regulator-min-microvolt = <5000000>;
2547 +                               regulator-max-microvolt = <5150000>;
2548 +                       };
2549 +
2550 +                       snvs_reg: vsnvs {
2551 +                               regulator-min-microvolt = <1000000>;
2552 +                               regulator-max-microvolt = <3000000>;
2553 +                               regulator-boot-on;
2554 +                               regulator-always-on;
2555 +                       };
2556 +
2557 +                       vref_reg: vrefddr {
2558 +                               regulator-boot-on;
2559 +                               regulator-always-on;
2560 +                       };
2561 +
2562 +                       vgen1_reg: vgen1 {
2563 +                               regulator-min-microvolt = <800000>;
2564 +                               regulator-max-microvolt = <1550000>;
2565 +                       };
2566 +
2567 +                       vgen2_reg: vgen2 {
2568 +                               regulator-min-microvolt = <800000>;
2569 +                               regulator-max-microvolt = <1550000>;
2570 +                       };
2571 +
2572 +                       vgen3_reg: vgen3 {
2573 +                               regulator-min-microvolt = <1800000>;
2574 +                               regulator-max-microvolt = <3300000>;
2575 +                       };
2576 +
2577 +                       vgen4_reg: vgen4 {
2578 +                               regulator-min-microvolt = <1800000>;
2579 +                               regulator-max-microvolt = <3300000>;
2580 +                               regulator-always-on;
2581 +                       };
2582 +
2583 +                       vgen5_reg: vgen5 {
2584 +                               regulator-min-microvolt = <1800000>;
2585 +                               regulator-max-microvolt = <3300000>;
2586 +                               regulator-always-on;
2587 +                       };
2588 +
2589 +                       vgen6_reg: vgen6 {
2590 +                               regulator-min-microvolt = <1800000>;
2591 +                               regulator-max-microvolt = <3300000>;
2592 +                               regulator-always-on;
2593 +                       };
2594 +               };
2595 +       };
2596 +
2597 +       pciswitch: pex8609@3f {
2598 +               compatible = "plx,pex8609";
2599 +               reg = <0x3f>;
2600 +       };
2601 +
2602 +       pciclkgen: si52147@6b {
2603 +               compatible = "sil,si52147";
2604 +               reg = <0x6b>;
2605 +       };
2606 +};
2607 +
2608 +&i2c3 {
2609 +       clock-frequency = <100000>;
2610 +       pinctrl-names = "default";
2611 +       pinctrl-0 = <&pinctrl_i2c3>;
2612 +       status = "okay";
2613 +
2614 +       accelerometer: fxos8700@1e {
2615 +               compatible = "fsl,fxos8700";
2616 +               reg = <0x1e>;
2617 +       };
2618 +
2619 +       codec: sgtl5000@0a {
2620 +               compatible = "fsl,sgtl5000";
2621 +               reg = <0x0a>;
2622 +               clocks = <&clks 201>;
2623 +               VDDA-supply = <&sw4_reg>;
2624 +               VDDIO-supply = <&reg_3p3v>;
2625 +       };
2626 +
2627 +       hdmiin: adv7611@4c {
2628 +               compatible = "adi,adv7611";
2629 +               reg = <0x4c>;
2630 +       };
2631 +
2632 +       touchscreen: egalax_ts@04 {
2633 +               compatible = "eeti,egalax_ts";
2634 +               reg = <0x04>;
2635 +               interrupt-parent = <&gpio7>;
2636 +               interrupts = <12 2>; /* gpio7_12 active low */
2637 +               wakeup-gpios = <&gpio7 12 0>;
2638 +       };
2639 +
2640 +       videoout: adv7393@2a {
2641 +               compatible = "adi,adv7393";
2642 +               reg = <0x2a>;
2643 +       };
2644 +
2645 +       videoin: adv7180@20 {
2646 +               compatible = "adi,adv7180";
2647 +               reg = <0x20>;
2648 +       };
2649 +};
2650 +
2651 +&iomuxc {
2652 +       pinctrl-names = "default";
2653 +       pinctrl-0 = <&pinctrl_hog>;
2654 +
2655 +       imx6qdl-gw54xx {
2656 +               pinctrl_hog: hoggrp {
2657 +                       fsl,pins = <
2658 +                               MX6QDL_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
2659 +                               MX6QDL_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
2660 +                               MX6QDL_PAD_ENET_RXD1__GPIO1_IO26  0x80000000 /* GPS_PPS */
2661 +                               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2662 +                               MX6QDL_PAD_ENET_TXD1__GPIO1_IO29  0x80000000 /* PCIE RST */
2663 +                               MX6QDL_PAD_GPIO_0__CCM_CLKO1      0x000130b0 /* AUD4_MCK */
2664 +                               MX6QDL_PAD_GPIO_2__GPIO1_IO02     0x80000000 /* CAN_STBY */
2665 +                               MX6QDL_PAD_GPIO_17__GPIO7_IO12    0x80000000 /* TOUCH_IRQ# */
2666 +                               MX6QDL_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user1 led */
2667 +                               MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x80000000 /* user2 led */
2668 +                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user3 led */
2669 +                               MX6QDL_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
2670 +                               MX6QDL_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
2671 +                        >;
2672 +               };
2673 +
2674 +               pinctrl_audmux: audmuxgrp {
2675 +                       fsl,pins = <
2676 +                               MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
2677 +                               MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
2678 +                               MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
2679 +                               MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
2680 +                       >;
2681 +               };
2682 +
2683 +               pinctrl_enet: enetgrp {
2684 +                       fsl,pins = <
2685 +                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
2686 +                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
2687 +                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
2688 +                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
2689 +                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
2690 +                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
2691 +                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
2692 +                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
2693 +                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
2694 +                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
2695 +                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
2696 +                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
2697 +                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
2698 +                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
2699 +                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
2700 +                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
2701 +                       >;
2702 +               };
2703 +
2704 +               pinctrl_flexcan1: flexcan1grp {
2705 +                       fsl,pins = <
2706 +                               MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x80000000
2707 +                               MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x80000000
2708 +                       >;
2709 +               };
2710 +
2711 +               pinctrl_gpmi_nand: gpminandgrp {
2712 +                       fsl,pins = <
2713 +                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
2714 +                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
2715 +                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
2716 +                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
2717 +                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
2718 +                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
2719 +                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
2720 +                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
2721 +                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
2722 +                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
2723 +                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
2724 +                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
2725 +                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
2726 +                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
2727 +                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
2728 +                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
2729 +                       >;
2730 +               };
2731 +
2732 +               pinctrl_i2c1: i2c1grp {
2733 +                       fsl,pins = <
2734 +                               MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
2735 +                               MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
2736 +                       >;
2737 +               };
2738 +
2739 +               pinctrl_i2c2: i2c2grp {
2740 +                       fsl,pins = <
2741 +                               MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
2742 +                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
2743 +                       >;
2744 +               };
2745 +
2746 +               pinctrl_i2c3: i2c3grp {
2747 +                       fsl,pins = <
2748 +                               MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
2749 +                               MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
2750 +                       >;
2751 +               };
2752 +
2753 +               pinctrl_pwm4: pwm4grp {
2754 +                       fsl,pins = <
2755 +                               MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
2756 +                       >;
2757 +               };
2758 +
2759 +               pinctrl_uart1: uart1grp {
2760 +                       fsl,pins = <
2761 +                               MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
2762 +                               MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
2763 +                       >;
2764 +               };
2765 +
2766 +               pinctrl_uart2: uart2grp {
2767 +                       fsl,pins = <
2768 +                               MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
2769 +                               MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
2770 +                       >;
2771 +               };
2772 +
2773 +               pinctrl_uart5: uart5grp {
2774 +                       fsl,pins = <
2775 +                               MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
2776 +                               MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
2777 +                       >;
2778 +               };
2779 +
2780 +               pinctrl_usbotg: usbotggrp {
2781 +                       fsl,pins = <
2782 +                               MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
2783 +                       >;
2784 +               };
2785 +
2786 +               pinctrl_usdhc3: usdhc3grp {
2787 +                       fsl,pins = <
2788 +                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
2789 +                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
2790 +                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
2791 +                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
2792 +                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
2793 +                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
2794 +                       >;
2795 +               };
2796 +       };
2797 +};
2798 +
2799 +&ldb {
2800 +       status = "okay";
2801 +
2802 +       lvds-channel@0 {
2803 +               fsl,data-mapping = "spwg";
2804 +               fsl,data-width = <18>;
2805 +               status = "okay";
2806 +
2807 +               display-timings {
2808 +                       native-mode = <&timing0>;
2809 +                       timing0: hsd100pxn1 {
2810 +                               clock-frequency = <65000000>;
2811 +                               hactive = <1024>;
2812 +                               vactive = <768>;
2813 +                               hback-porch = <220>;
2814 +                               hfront-porch = <40>;
2815 +                               vback-porch = <21>;
2816 +                               vfront-porch = <7>;
2817 +                               hsync-len = <60>;
2818 +                               vsync-len = <10>;
2819 +                       };
2820 +               };
2821 +       };
2822 +};
2823 +
2824 +&pcie {
2825 +       reset-gpio = <&gpio1 29 0>;
2826 +       status = "okay";
2827 +
2828 +       eth1: sky2@8 { /* MAC/PHY on bus 8 */
2829 +               compatible = "marvell,sky2";
2830 +       };
2831 +};
2832 +
2833 +&pwm4 {
2834 +       pinctrl-names = "default";
2835 +       pinctrl-0 = <&pinctrl_pwm4>;
2836 +       status = "okay";
2837 +};
2838 +
2839 +&ssi1 {
2840 +       fsl,mode = "i2s-slave";
2841 +       status = "okay";
2842 +};
2843 +
2844 +&ssi2 {
2845 +       fsl,mode = "i2s-slave";
2846 +       status = "okay";
2847 +};
2848 +
2849 +&uart1 {
2850 +       pinctrl-names = "default";
2851 +       pinctrl-0 = <&pinctrl_uart1>;
2852 +       status = "okay";
2853 +};
2854 +
2855 +&uart2 {
2856 +       pinctrl-names = "default";
2857 +       pinctrl-0 = <&pinctrl_uart2>;
2858 +       status = "okay";
2859 +};
2860 +
2861 +&uart5 {
2862 +       pinctrl-names = "default";
2863 +       pinctrl-0 = <&pinctrl_uart5>;
2864 +       status = "okay";
2865 +};
2866 +
2867 +&usbotg {
2868 +       vbus-supply = <&reg_usb_otg_vbus>;
2869 +       pinctrl-names = "default";
2870 +       pinctrl-0 = <&pinctrl_usbotg>;
2871 +       disable-over-current;
2872 +       status = "okay";
2873 +};
2874 +
2875 +&usbh1 {
2876 +       vbus-supply = <&reg_usb_h1_vbus>;
2877 +       status = "okay";
2878 +};
2879 +
2880 +&usdhc3 {
2881 +       pinctrl-names = "default";
2882 +       pinctrl-0 = <&pinctrl_usdhc3>;
2883 +       cd-gpios = <&gpio7 0 0>;
2884 +       vmmc-supply = <&reg_3p3v>;
2885 +       status = "okay";
2886 +};