bcm47xx: Add driver for the SSB Gigabit Ethernet core.
[openwrt.git] / target / linux / brcm47xx / patches-2.6.23 / 690-mips-allow-pciregister-after-boot.patch
1 Allow registering PCI devices after early boot.
2
3 This is an ugly hack and needs to be rewritten before going upstream.
4 Index: linux-2.6.23.16/arch/mips/pci/pci.c
5 ===================================================================
6 --- linux-2.6.23.16.orig/arch/mips/pci/pci.c    2008-02-20 16:06:36.000000000 +0100
7 +++ linux-2.6.23.16/arch/mips/pci/pci.c 2008-02-20 16:09:33.000000000 +0100
8 @@ -21,6 +21,17 @@
9   */
10  int pci_probe_only;
11  
12 +/*
13 + * Indicate whether PCI-bios init was already done.
14 + */
15 +static int pcibios_init_done;
16 +
17 +/*
18 + * The currently used busnumber.
19 + */
20 +static int next_busno;
21 +static int need_domain_info;
22 +
23  #define PCI_ASSIGN_ALL_BUSSES  1
24  
25  unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
26 @@ -75,8 +86,32 @@ pcibios_align_resource(void *data, struc
27         res->start = start;
28  }
29  
30 -void __devinit register_pci_controller(struct pci_controller *hose)
31 +/* Most MIPS systems have straight-forward swizzling needs.  */
32 +
33 +static inline u8 bridge_swizzle(u8 pin, u8 slot)
34 +{
35 +       return (((pin - 1) + slot) % 4) + 1;
36 +}
37 +
38 +static u8 common_swizzle(struct pci_dev *dev, u8 *pinp)
39  {
40 +       u8 pin = *pinp;
41 +
42 +       while (dev->bus->parent) {
43 +               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
44 +               /* Move up the chain of bridges. */
45 +               dev = dev->bus->self;
46 +        }
47 +       *pinp = pin;
48 +
49 +       /* The slot is the slot of the last bridge. */
50 +       return PCI_SLOT(dev->devfn);
51 +}
52 +
53 +void register_pci_controller(struct pci_controller *hose)
54 +{
55 +       struct pci_bus *bus;
56 +
57         if (request_resource(&iomem_resource, hose->mem_resource) < 0)
58                 goto out;
59         if (request_resource(&ioport_resource, hose->io_resource) < 0) {
60 @@ -84,9 +119,6 @@ void __devinit register_pci_controller(s
61                 goto out;
62         }
63  
64 -       *hose_tail = hose;
65 -       hose_tail = &hose->next;
66 -
67         /*
68          * Do not panic here but later - this might hapen before console init.
69          */
70 @@ -94,41 +126,47 @@ void __devinit register_pci_controller(s
71                 printk(KERN_WARNING
72                        "registering PCI controller with io_map_base unset\n");
73         }
74 -       return;
75  
76 -out:
77 -       printk(KERN_WARNING
78 -              "Skipping PCI bus scan due to resource conflict\n");
79 -}
80 +       if (pcibios_init_done) {
81 +               //TODO
82  
83 -/* Most MIPS systems have straight-forward swizzling needs.  */
84 +               printk(KERN_INFO "Registering a PCI bus after boot\n");
85  
86 -static inline u8 bridge_swizzle(u8 pin, u8 slot)
87 -{
88 -       return (((pin - 1) + slot) % 4) + 1;
89 -}
90 +               if (!hose->iommu)
91 +                       PCI_DMA_BUS_IS_PHYS = 1;
92  
93 -static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
94 -{
95 -       u8 pin = *pinp;
96 +               bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
97 +               hose->bus = bus;
98 +               need_domain_info = need_domain_info || hose->index;
99 +               hose->need_domain_info = need_domain_info;
100 +               if (bus) {
101 +                       next_busno = bus->subordinate + 1;
102 +                       /* Don't allow 8-bit bus number overflow inside the hose -
103 +                          reserve some space for bridges. */
104 +                       if (next_busno > 224) {
105 +                               next_busno = 0;
106 +                               need_domain_info = 1;
107 +                       }
108 +               }
109 +               if (!pci_probe_only)
110 +                       pci_assign_unassigned_resources();
111 +               pci_fixup_irqs(common_swizzle, pcibios_map_irq);
112 +       } else {
113 +               *hose_tail = hose;
114 +               hose_tail = &hose->next;
115 +       }
116  
117 -       while (dev->bus->parent) {
118 -               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
119 -               /* Move up the chain of bridges. */
120 -               dev = dev->bus->self;
121 -        }
122 -       *pinp = pin;
123 +       return;
124  
125 -       /* The slot is the slot of the last bridge. */
126 -       return PCI_SLOT(dev->devfn);
127 +out:
128 +       printk(KERN_WARNING
129 +              "Skipping PCI bus scan due to resource conflict\n");
130  }
131  
132  static int __init pcibios_init(void)
133  {
134         struct pci_controller *hose;
135         struct pci_bus *bus;
136 -       int next_busno;
137 -       int need_domain_info = 0;
138  
139         /* Scan all of the recorded PCI controllers.  */
140         for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
141 @@ -157,6 +195,7 @@ static int __init pcibios_init(void)
142         if (!pci_probe_only)
143                 pci_assign_unassigned_resources();
144         pci_fixup_irqs(common_swizzle, pcibios_map_irq);
145 +       pcibios_init_done = 1;
146  
147         return 0;
148  }
149 Index: linux-2.6.23.16/drivers/ssb/main.c
150 ===================================================================
151 --- linux-2.6.23.16.orig/drivers/ssb/main.c     2008-02-20 16:06:36.000000000 +0100
152 +++ linux-2.6.23.16/drivers/ssb/main.c  2008-02-20 18:33:21.000000000 +0100
153 @@ -1185,9 +1185,7 @@ static int __init ssb_modinit(void)
154  /* ssb must be initialized after PCI but before the ssb drivers.
155   * That means we must use some initcall between subsys_initcall
156   * and device_initcall. */
157 -//FIXME on embedded we need to be early to make sure we can register
158 -//      a new PCI bus, if needed.
159 -subsys_initcall(ssb_modinit);
160 +fs_initcall(ssb_modinit);
161  
162  static void __exit ssb_modexit(void)
163  {