target/linux/brcm63xx/dts/bcm6345.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm6345";
   5
   6         aliases {
   7                 pflash = &pflash;
   8         };
   9
  10         cpus {
  11                 #address-cells = <1>;
  12                 #size-cells = <0>;
  13
  14                 cpu@0 {
  15                         compatible = "brcm,bmips32", "mips,mips4Kc";
  16                         device_type = "cpu";
  17                         reg = <0>;
  18                 };
  19         };
  20
  21         cpu_intc: interrupt-controller {
  22                 #address-cells = <0>;
  23                 compatible = "mti,cpu-interrupt-controller";
  24
  25                 interrupt-controller;
  26                 #interrupt-cells = <1>;
  27         };
  28
  29         memory { device_type = "memory"; reg = <0 0>; };
  30
  31         pflash: nor@1fc00000 {
  32                 compatible = "cfi-flash";
  33                 reg = <0x1fc00000 0x400000>;
  34                 bank-width = <2>;
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37
  38                 status = "disabled";
  39         };
  40
  41         ubus@fff00000 {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 ranges;
  45                 compatible = "simple-bus";
  46
  47                 periph_intc: interrupt-controller@fffe000c {
  48                         compatible = "brcm,bcm6345-l2-intc";
  49                         reg = <0xfffe000c 0x9>;
  50
  51                         interrupt-controller;
  52                         #interrupt-cells = <1>;
  53
  54                         interrupt-parent = <&cpu_intc>;
  55                         interrupts = <2>;
  56                 };
  57
  58                 ext_intc: interrupt-controller@fffe0014 {
  59                         compatible = "brcm,bcm6345-ext-intc";
  60                         reg = <0xfffe0014 0x4>;
  61
  62                         interrupt-controller;
  63                         #interrupt-cells = <2>;
  64
  65                         interrupt-parent = <&cpu_intc>;
  66                         interrupts = <3>, <4>, <5>, <6>;
  67                 };
  68         };
  69 };