target/linux/brcm2708/patches-3.18/0096-bcm2709-dwc_otg-Setup-FIQ-on-core-1-if-1-core-active.patch

   1 From a31e1ba443ff061c4bf4abbac46ca8e197da3f0c Mon Sep 17 00:00:00 2001
   2 From: P33M <P33M@github.com>
   3 Date: Thu, 22 Jan 2015 18:45:23 +0000
   4 Subject: [PATCH 096/114] bcm2709/dwc_otg: Setup FIQ on core 1 if >1 core
   5  active
   6
   7 ---
   8  arch/arm/mach-bcm2709/armctrl.c              | 10 +++++++++-
   9  drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 15 +++++++++++----
  10  2 files changed, 20 insertions(+), 5 deletions(-)
  11
  12 diff --git a/arch/arm/mach-bcm2709/armctrl.c b/arch/arm/mach-bcm2709/armctrl.c
  13 index 8e69a813..6e3f0f2 100644
  14 --- a/arch/arm/mach-bcm2709/armctrl.c
  15 +++ b/arch/arm/mach-bcm2709/armctrl.c
  16 @@ -89,7 +89,15 @@ static void armctrl_unmask_irq(struct irq_data *d)
  17         };
  18         int i;
  19         if (d->irq >= FIQ_START) {
  20 -               unsigned int data = (unsigned int)irq_get_chip_data(d->irq) - FIQ_START;
  21 +               unsigned int data;
  22 +               if (num_online_cpus() > 1) {
  23 +                       data = readl(__io_address(ARM_LOCAL_GPU_INT_ROUTING));
  24 +                       data &= ~0xc;
  25 +                       data |= (1 << 2);
  26 +                       writel(data, __io_address(ARM_LOCAL_GPU_INT_ROUTING));
  27 +               }
  28 +               /* Unmask in ARMCTRL block after routing it properly */
  29 +               data = (unsigned int)irq_get_chip_data(d->irq) - FIQ_START;
  30                 writel(0x80 | data, __io_address(ARM_IRQ_FAST));
  31         } else if (d->irq >= IRQ_ARM_LOCAL_CNTPSIRQ && d->irq < IRQ_ARM_LOCAL_CNTPSIRQ + 4) {
  32  #if 1
  33 diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c
  34 index 4d8dd95..1d28459 100644
  35 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c
  36 +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c
  37 @@ -407,7 +407,9 @@ static void hcd_init_fiq(void *cookie)
  38                 DWC_ERROR("Can't claim FIQ");
  39                 BUG();
  40         }
  41 -       DWC_WARN("FIQ at 0x%08x", (fiq_fsm_enable ? (int)&dwc_otg_fiq_fsm : (int)&dwc_otg_fiq_nop));
  42 +       DWC_WARN("FIQ on core %d at 0x%08x",
  43 +                               smp_processor_id(),
  44 +                               (fiq_fsm_enable ? (int)&dwc_otg_fiq_fsm : (int)&dwc_otg_fiq_nop));
  45         DWC_WARN("FIQ ASM at 0x%08x length %d", (int)&_dwc_otg_fiq_stub, (int)(&_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub));
  46                 set_fiq_handler((void *) &_dwc_otg_fiq_stub, &_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub);
  47         memset(&regs,0,sizeof(regs));
  48 @@ -510,9 +512,14 @@ int hcd_init(dwc_bus_dev_t *_dev)
  49                 goto error2;
  50         }
  51
  52 -       if (fiq_enable)
  53 -               smp_call_function_single(0, hcd_init_fiq, otg_dev, 1);
  54 -
  55 +       if (fiq_enable) {
  56 +               if (num_online_cpus() > 1) {
  57 +                       /* bcm2709: can run the FIQ on a separate core to IRQs */
  58 +                       smp_call_function_single(1, hcd_init_fiq, otg_dev, 1);
  59 +               } else {
  60 +                       smp_call_function_single(0, hcd_init_fiq, otg_dev, 1);
  61 +               }
  62 +       }
  63
  64         otg_dev->hcd->otg_dev = otg_dev;
  65         hcd->self.otg_port = dwc_otg_hcd_otg_port(dwc_otg_hcd);
  66 --
  67 1.8.3.2
  68