1 From 6be3809614db2d52724eb4b5193c27d2466142be Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:47:48 +0200
4 Subject: [PATCH 050/114] BCM2708: armctrl: Add IRQ Device Tree support
6 Add Device Tree IRQ support for BCM2708.
7 Usage is the same as for irq-bcm2835.
8 See binding document: brcm,bcm2835-armctrl-ic.txt
10 A bank 3 is added to handle GPIO interrupts. This is done because
11 armctrl also handles GPIO interrupts.
13 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
15 BCM2708: armctrl: remove irq bank 3
17 irq bank 3 was needed by the pinctrl-bcm2708 and bcm2708_gpio
18 combination. It is no longer required.
20 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
22 arch/arm/boot/dts/bcm2708.dtsi | 9 ++++
23 arch/arm/mach-bcm2708/armctrl.c | 96 +++++++++++++++++++++++++++++++++++++++++
24 2 files changed, 105 insertions(+)
26 diff --git a/arch/arm/boot/dts/bcm2708.dtsi b/arch/arm/boot/dts/bcm2708.dtsi
27 index 50da059..a06f5b8 100644
28 --- a/arch/arm/boot/dts/bcm2708.dtsi
29 +++ b/arch/arm/boot/dts/bcm2708.dtsi
31 compatible = "brcm,bcm2708";
34 + interrupt-parent = <&intc>;
38 bootargs must be 1024 characters long because the
42 ranges = <0x7e000000 0x20000000 0x02000000>;
44 + intc: interrupt-controller {
45 + compatible = "brcm,bcm2708-armctrl-ic";
46 + reg = <0x7e00b200 0x200>;
47 + interrupt-controller;
48 + #interrupt-cells = <2>;
53 diff --git a/arch/arm/mach-bcm2708/armctrl.c b/arch/arm/mach-bcm2708/armctrl.c
54 index 96fa9b9..74bacb3 100644
55 --- a/arch/arm/mach-bcm2708/armctrl.c
56 +++ b/arch/arm/mach-bcm2708/armctrl.c
58 #include <linux/version.h>
59 #include <linux/syscore_ops.h>
60 #include <linux/interrupt.h>
61 +#include <linux/irqdomain.h>
62 +#include <linux/of.h>
64 #include <asm/mach/irq.h>
65 #include <mach/hardware.h>
66 @@ -79,6 +81,99 @@ static void armctrl_unmask_irq(struct irq_data *d)
72 +#define NR_IRQS_BANK0 21
74 +#define IRQS_PER_BANK 32
76 +/* from drivers/irqchip/irq-bcm2835.c */
77 +static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr,
78 + const u32 *intspec, unsigned int intsize,
79 + unsigned long *out_hwirq, unsigned int *out_type)
81 + if (WARN_ON(intsize != 2))
84 + if (WARN_ON(intspec[0] >= NR_BANKS))
87 + if (WARN_ON(intspec[1] >= IRQS_PER_BANK))
90 + if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0))
93 + if (intspec[0] == 0)
94 + *out_hwirq = ARM_IRQ0_BASE + intspec[1];
95 + else if (intspec[0] == 1)
96 + *out_hwirq = ARM_IRQ1_BASE + intspec[1];
98 + *out_hwirq = ARM_IRQ2_BASE + intspec[1];
100 + /* reverse remap_irqs[] */
101 + switch (*out_hwirq) {
102 + case INTERRUPT_VC_JPEG:
103 + *out_hwirq = INTERRUPT_JPEG;
105 + case INTERRUPT_VC_USB:
106 + *out_hwirq = INTERRUPT_USB;
108 + case INTERRUPT_VC_3D:
109 + *out_hwirq = INTERRUPT_3D;
111 + case INTERRUPT_VC_DMA2:
112 + *out_hwirq = INTERRUPT_DMA2;
114 + case INTERRUPT_VC_DMA3:
115 + *out_hwirq = INTERRUPT_DMA3;
117 + case INTERRUPT_VC_I2C:
118 + *out_hwirq = INTERRUPT_I2C;
120 + case INTERRUPT_VC_SPI:
121 + *out_hwirq = INTERRUPT_SPI;
123 + case INTERRUPT_VC_I2SPCM:
124 + *out_hwirq = INTERRUPT_I2SPCM;
126 + case INTERRUPT_VC_SDIO:
127 + *out_hwirq = INTERRUPT_SDIO;
129 + case INTERRUPT_VC_UART:
130 + *out_hwirq = INTERRUPT_UART;
132 + case INTERRUPT_VC_ARASANSDIO:
133 + *out_hwirq = INTERRUPT_ARASANSDIO;
137 + *out_type = IRQ_TYPE_NONE;
141 +static struct irq_domain_ops armctrl_ops = {
142 + .xlate = armctrl_xlate
145 +void __init armctrl_dt_init(void)
147 + struct device_node *np;
148 + struct irq_domain *domain;
150 + np = of_find_compatible_node(NULL, NULL, "brcm,bcm2708-armctrl-ic");
154 + domain = irq_domain_add_legacy(np, BCM2708_ALLOC_IRQS,
155 + IRQ_ARMCTRL_START, 0,
156 + &armctrl_ops, NULL);
160 +void __init armctrl_dt_init(void) { }
161 +#endif /* CONFIG_OF */
163 #if defined(CONFIG_PM)
165 /* for kernels 3.xx use the new syscore_ops apis but for older kernels use the sys dev class */
166 @@ -215,5 +310,6 @@ int __init armctrl_init(void __iomem * base, unsigned int irq_start,
168 armctrl_pm_register(base, irq_start, resume_sources);