[mcs814x] regroup interrupt controller register definitions in hardware.h

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32485 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
index eeff72c..58ad30e 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
@@ -11,8 +11,8 @@
                .endm
 
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-               mov     \tmp, #0x40
-               ldr     \irqstat, [\base, \tmp]
+               mov     \tmp, #MCS814X_IRQ_STS0  @ load tmp with STS0 register offset
+               ldr     \irqstat, [\base, \tmp]  @ load value at base + tmp
                tst     \irqstat, \irqstat       @ test if no active IRQ's
                beq     1002f                    @ if no active irqs return with status 0
                mov     \irqnr, #0               @ start from irq zero
@@ -23,7 +23,7 @@
                moveq   \tmp,   \tmp, lsl #1     @ shift mask one to left
                beq     1001b                    @ if  zero then loop again
                mov     \irqstat, \tmp           @ save the return mask
-               mov     \tmp, #0x00              @ ICR offset
+               mov     \tmp, #MCS814X_IRQ_STS0  @ load tmp with ICR offset
                str     \irqstat,  [\base, \tmp] @ clear irq with selected mask
 1002:
                 .endm

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/hardware.h b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/hardware.h
index 75343c6..6fb243c 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/hardware.h
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/hardware.h
@@ -14,6 +14,12 @@
 #define MCS814X_IO_START       0x40000000
 #define MCS814X_IO_SIZE                0x00100000
 
+/* IRQ controller register offset */
+#define MCS814X_IRQ_ICR                0x00
+#define MCS814X_IRQ_ISR                0x04
+#define MCS814X_IRQ_MASK       0x20
+#define MCS814X_IRQ_STS0       0x40
+
 #define _PHYS_CONFADDR         0x40000000
 #define _VIRT_CONFADDR         MCS814X_IO_BASE
 

diff --git a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
index c8a3c18..207a09c 100644 (file)
--- a/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
+++ b/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
@@ -14,11 +14,7 @@
 
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
-
-#define MCS814X_IRQ_ICR                0x00
-#define MCS814X_IRQ_ISR                0x04
-#define MCS814X_IRQ_MASK       0x20
-#define MCS814X_IRQ_STS0       0x40
+#include <mach/hardware.h>
 
 void __iomem *mcs814x_intc_base;