a single database in the ATU. This created problems in the
case of a system where two ports/devices share a MAC address
(e.g. Linksys WRT1900AC eth0/eth1).
This also clears any bootloader-set FDB defaults. This had
caused issues creating port-based VLANs when mappings
overlapped previous VLANs. Packets destined to a port
not in the default port group flooded all ports.
Tested on a
88E6171 (Linksys EA4500) and
88E6172 ('1900AC)
Signed-off-by: Claudio Leite <leitec@staticky.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46699
3c298f89-4303-0410-b956-
a3cf2f4a3e73
sw16(dev, MV_GLOBALREG(VTU_VID),
MV_VTU_VID_VALID | state->vlans[i].vid);
sw16(dev, MV_GLOBALREG(VTU_SID), i);
sw16(dev, MV_GLOBALREG(VTU_VID),
MV_VTU_VID_VALID | state->vlans[i].vid);
sw16(dev, MV_GLOBALREG(VTU_SID), i);
- sw16(dev, MV_GLOBALREG(VTU_FID), 0);
+ sw16(dev, MV_GLOBALREG(VTU_FID), i);
sw16(dev, MV_GLOBALREG(VTU_DATA1), v1);
sw16(dev, MV_GLOBALREG(VTU_DATA2), v2);
sw16(dev, MV_GLOBALREG(VTU_DATA3), 0);
sw16(dev, MV_GLOBALREG(VTU_DATA1), v1);
sw16(dev, MV_GLOBALREG(VTU_DATA2), v2);
sw16(dev, MV_GLOBALREG(VTU_DATA3), 0);
if(mode != MV_VTUCTL_EGRESS_TAGGED)
state->ports[i].pvid = state->vlans[vno].vid;
if(mode != MV_VTUCTL_EGRESS_TAGGED)
state->ports[i].pvid = state->vlans[vno].vid;
- if (state->vlans[vno].port_based)
+ if (state->vlans[vno].port_based) {
state->ports[i].mask |= state->vlans[vno].mask;
state->ports[i].mask |= state->vlans[vno].mask;
+ state->ports[i].fdb = vno;
+ }
else
state->ports[i].qmode = MV_8021Q_MODE_SECURE;
}
else
state->ports[i].qmode = MV_8021Q_MODE_SECURE;
}
state->ports[i].mask &= ~(1 << i);
state->ports[i].mask &= ~(1 << i);
- reg = sr16(dev, MV_PORTREG(VLANMAP, i)) & ~MV_PORTS_MASK;
- reg |= state->ports[i].mask;
+ /* set default forwarding DB number and port mask */
+ reg = sr16(dev, MV_PORTREG(CONTROL1, i)) & ~MV_FDB_HI_MASK;
+ reg |= (state->ports[i].fdb >> MV_FDB_HI_SHIFT) &
+ MV_FDB_HI_MASK;
+ sw16(dev, MV_PORTREG(CONTROL1, i), reg);
+
+ reg = ((state->ports[i].fdb & 0xf) << MV_FDB_LO_SHIFT) |
+ state->ports[i].mask;
sw16(dev, MV_PORTREG(VLANMAP, i), reg);
reg = sr16(dev, MV_PORTREG(CONTROL2, i)) &
sw16(dev, MV_PORTREG(VLANMAP, i), reg);
reg = sr16(dev, MV_PORTREG(CONTROL2, i)) &
return -ETIMEDOUT;
for (i = 0; i < dev->ports; i++) {
return -ETIMEDOUT;
for (i = 0; i < dev->ports; i++) {
+ state->ports[i].fdb = 0;
state->ports[i].qmode = 0;
state->ports[i].mask = 0;
state->ports[i].pvid = 0;
state->ports[i].qmode = 0;
state->ports[i].mask = 0;
state->ports[i].pvid = 0;
#define MV_PVID_MASK 0x0fff
#define MV_PVID_MASK 0x0fff
+#define MV_FDB_HI_MASK 0x00ff
+#define MV_FDB_LO_MASK 0xf000
+#define MV_FDB_HI_SHIFT 4
+#define MV_FDB_LO_SHIFT 12
+
struct mvsw61xx_state {
struct switch_dev dev;
struct mii_bus *bus;
struct mvsw61xx_state {
struct switch_dev dev;
struct mii_bus *bus;
int vlan_enabled;
struct port_state {
int vlan_enabled;
struct port_state {
u16 pvid;
u16 mask;
u8 qmode;
u16 pvid;
u16 mask;
u8 qmode;