ramips: enable wmac clock for mt7620
authorblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Tue, 1 Jul 2014 10:26:25 +0000 (10:26 +0000)
committerblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Tue, 1 Jul 2014 10:26:25 +0000 (10:26 +0000)
Signed-off-by: Roman Yeryomin <roman@advem.lv>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41443 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ramips/patches-3.10/0401-mt7620n-add-wmac-clock.patch [new file with mode: 0644]

diff --git a/target/linux/ramips/patches-3.10/0401-mt7620n-add-wmac-clock.patch b/target/linux/ramips/patches-3.10/0401-mt7620n-add-wmac-clock.patch
new file mode 100644 (file)
index 0000000..af5a252
--- /dev/null
@@ -0,0 +1,27 @@
+--- linux-3.10.26/arch/mips/ralink/mt7620.c    2014-01-15 21:49:41.368793580 +0200
++++ linux-3.10.26/arch/mips/ralink/mt7620.c    2014-01-15 19:33:32.022038160 +0200
+@@ -105,12 +105,15 @@
+ void __init ralink_clk_init(void)
+ {
+-      unsigned long cpu_rate, sys_rate;
++      unsigned long cpu_rate, sys_rate, xtal_freq;
+       u32 c0 = rt_sysc_r32(SYSC_REG_CPLL_CONFIG0);
+       u32 c1 = rt_sysc_r32(SYSC_REG_CPLL_CONFIG1);
+       u32 swconfig = (c0 >> CPLL_SW_CONFIG_SHIFT) & CPLL_SW_CONFIG_MASK;
+       u32 cpu_clk = (c1 >> CPLL_CPU_CLK_SHIFT) & CPLL_CPU_CLK_MASK;
++      u32 syscfg0 = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0);
++      xtal_freq = (syscfg0 & 0x40) ? 40000000 : 20000000;
++
+       if (cpu_clk) {
+               cpu_rate = 480000000;
+       } else if (!swconfig) {
+@@ -133,6 +136,7 @@
+       ralink_clk_add("10000500.uart", 40000000);
+       ralink_clk_add("10000b00.spi", 40000000);
+       ralink_clk_add("10000c00.uartlite", 40000000);
++      ralink_clk_add("10180000.wmac", xtal_freq);
+       if (IS_ENABLED(CONFIG_USB)) {
+               /*