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(parent: f294a46) | patch
ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio
authorblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 17 Aug 2015 06:15:49 +0000 (06:15 +0000)
committerblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Mon, 17 Aug 2015 06:15:49 +0000 (06:15 +0000)
commit49a1bc3ee7d75136004911b687a2508cda06d793
treee4c58982842cd51f0524ca9885d16c9e5624676etree | snapshot
parentf294a464d017861f99eda72b667120cbf3b6eb53commit | diff
ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio

The MT7621 uses a 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3 in the GPIO_MODE register. It was correctly done
for sdhci, spi, pcie and wdt, The same has to be done for uart3, uart2
and mdio.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@46645 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch diff | blob | history
OpenWrt main development branch