target/linux/sunxi/patches-4.1/143-dmaengine-add-h3.patch

   1 diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
   2 index 9cdcba24d..d13c136 100644
   3 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt
   4 +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt
   5 @@ -4,7 +4,10 @@ This driver follows the generic DMA bindings defined in dma.txt.
   6
   7  Required properties:
   8
   9 -- compatible:  Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"
  10 +- compatible:  Must be one of
  11 +                 "allwinner,sun6i-a31-dma"
  12 +                 "allwinner,sun8i-a23-dma"
  13 +                 "allwinner,sun8i-h3-dma"
  14  - reg:         Should contain the registers base address and length
  15  - interrupts:  Should contain a reference to the interrupt used by this device
  16  - clocks:      Should contain a reference to the parent AHB clock
  17 diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
  18 index 11e5365..842ff97 100644
  19 --- a/drivers/dma/sun6i-dma.c
  20 +++ b/drivers/dma/sun6i-dma.c
  21 @@ -891,9 +891,21 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
  22         .nr_max_vchans   = 37,
  23  };
  24
  25 +/*
  26 + * The H3 has 12 physical channels, a maximum DRQ port id of 27,
  27 + * and a total of 34 usable source and destination endpoints.
  28 + */
  29 +
  30 +static struct sun6i_dma_config sun8i_h3_dma_cfg = {
  31 +       .nr_max_channels = 12,
  32 +       .nr_max_requests = 27,
  33 +       .nr_max_vchans   = 34,
  34 +};
  35 +
  36  static const struct of_device_id sun6i_dma_match[] = {
  37         { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
  38         { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
  39 +       { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
  40         { /* sentinel */ }
  41  };
  42