target/linux/sunxi/patches-4.1/126-3-dt-sun7i-add-nand-ctrlpin-defs.patch

   1 From 576701449b01fb0dfaa76bb71f2b94ab5194c1dc Mon Sep 17 00:00:00 2001
   2 From: Boris BREZILLON <boris.brezillon@free-electrons.com>
   3 Date: Mon, 28 Jul 2014 14:08:15 +0200
   4 Subject: [PATCH] ARM: dts: sun7i: Add NAND controller pin definitions
   5
   6 Define the NAND controller pin configs.
   7
   8 Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
   9 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  10 ---
  11  arch/arm/boot/dts/sun7i-a20.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
  12  1 file changed, 80 insertions(+)
  13
  14 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
  15 index 0d7e600..6ec86c9 100644
  16 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  17 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  18 @@ -1164,6 +1164,86 @@
  19                                 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
  20                                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
  21                         };
  22 +
  23 +                       nand_pins_a: nand_base0@0 {
  24 +                               allwinner,pins = "PC0", "PC1", "PC2",
  25 +                                               "PC5", "PC8", "PC9", "PC10",
  26 +                                               "PC11", "PC12", "PC13", "PC14",
  27 +                                               "PC15", "PC16";
  28 +                               allwinner,function = "nand0";
  29 +                               allwinner,drive = <0>;
  30 +                               allwinner,pull = <0>;
  31 +                       };
  32 +
  33 +                       nand_cs0_pins_a: nand_cs@0 {
  34 +                               allwinner,pins = "PC4";
  35 +                               allwinner,function = "nand0";
  36 +                               allwinner,drive = <0>;
  37 +                               allwinner,pull = <0>;
  38 +                       };
  39 +
  40 +                       nand_cs1_pins_a: nand_cs@1 {
  41 +                               allwinner,pins = "PC3";
  42 +                               allwinner,function = "nand0";
  43 +                               allwinner,drive = <0>;
  44 +                               allwinner,pull = <0>;
  45 +                       };
  46 +
  47 +                       nand_cs2_pins_a: nand_cs@2 {
  48 +                               allwinner,pins = "PC17";
  49 +                               allwinner,function = "nand0";
  50 +                               allwinner,drive = <0>;
  51 +                               allwinner,pull = <0>;
  52 +                       };
  53 +
  54 +                       nand_cs3_pins_a: nand_cs@3 {
  55 +                               allwinner,pins = "PC18";
  56 +                               allwinner,function = "nand0";
  57 +                               allwinner,drive = <0>;
  58 +                               allwinner,pull = <0>;
  59 +                       };
  60 +
  61 +                       nand_cs4_pins_a: nand_cs@4 {
  62 +                               allwinner,pins = "PC19";
  63 +                               allwinner,function = "nand0";
  64 +                               allwinner,drive = <0>;
  65 +                               allwinner,pull = <0>;
  66 +                       };
  67 +
  68 +                       nand_cs5_pins_a: nand_cs@5 {
  69 +                               allwinner,pins = "PC20";
  70 +                               allwinner,function = "nand0";
  71 +                               allwinner,drive = <0>;
  72 +                               allwinner,pull = <0>;
  73 +                       };
  74 +
  75 +                       nand_cs6_pins_a: nand_cs@6 {
  76 +                               allwinner,pins = "PC21";
  77 +                               allwinner,function = "nand0";
  78 +                               allwinner,drive = <0>;
  79 +                               allwinner,pull = <0>;
  80 +                       };
  81 +
  82 +                       nand_cs7_pins_a: nand_cs@7 {
  83 +                               allwinner,pins = "PC22";
  84 +                               allwinner,function = "nand0";
  85 +                               allwinner,drive = <0>;
  86 +                               allwinner,pull = <0>;
  87 +                       };
  88 +
  89 +                       nand_rb0_pins_a: nand_rb@0 {
  90 +                               allwinner,pins = "PC6";
  91 +                               allwinner,function = "nand0";
  92 +                               allwinner,drive = <0>;
  93 +                               allwinner,pull = <0>;
  94 +                       };
  95 +
  96 +                       nand_rb1_pins_a: nand_rb@1 {
  97 +                               allwinner,pins = "PC7";
  98 +                               allwinner,function = "nand0";
  99 +                               allwinner,drive = <0>;
 100 +                               allwinner,pull = <0>;
 101 +                       };
 102                 };
 103
 104                 timer@01c20c00 {