target/linux/sunxi/patches-4.1/105-mfd-axp20x-add-axp152-support.patch

   1 From a50e5abe10c95108ece5d3a91027570e66b5f238 Mon Sep 17 00:00:00 2001
   2 From: Michal Suchanek <hramrach@gmail.com>
   3 Date: Sat, 11 Jul 2015 14:59:56 +0200
   4 Subject: [PATCH] mfd: axp20x: Add axp152 support
   5
   6 The axp152 is a stripped down version of the axp202 pmic with the battery
   7 charging function removed as it is intended for top-set boxes.
   8
   9 Signed-off-by: Michal Suchanek <hramrach@gmail.com>
  10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  11 Signed-off-by: Lee Jones <lee.jones@linaro.org>
  12 ---
  13  drivers/mfd/axp20x.c       | 83 ++++++++++++++++++++++++++++++++++++++++++++++
  14  include/linux/mfd/axp20x.h | 61 +++++++++++++++++++++++++++++++++-
  15  2 files changed, 143 insertions(+), 1 deletion(-)
  16
  17 diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
  18 index 8c2c3c4..b369cfc 100644
  19 --- a/drivers/mfd/axp20x.c
  20 +++ b/drivers/mfd/axp20x.c
  21 @@ -30,12 +30,34 @@
  22  #define AXP20X_OFF     0x80
  23
  24  static const char * const axp20x_model_names[] = {
  25 +       "AXP152",
  26         "AXP202",
  27         "AXP209",
  28         "AXP221",
  29         "AXP288",
  30  };
  31
  32 +static const struct regmap_range axp152_writeable_ranges[] = {
  33 +       regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
  34 +       regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
  35 +};
  36 +
  37 +static const struct regmap_range axp152_volatile_ranges[] = {
  38 +       regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
  39 +       regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
  40 +       regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
  41 +};
  42 +
  43 +static const struct regmap_access_table axp152_writeable_table = {
  44 +       .yes_ranges     = axp152_writeable_ranges,
  45 +       .n_yes_ranges   = ARRAY_SIZE(axp152_writeable_ranges),
  46 +};
  47 +
  48 +static const struct regmap_access_table axp152_volatile_table = {
  49 +       .yes_ranges     = axp152_volatile_ranges,
  50 +       .n_yes_ranges   = ARRAY_SIZE(axp152_volatile_ranges),
  51 +};
  52 +
  53  static const struct regmap_range axp20x_writeable_ranges[] = {
  54         regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  55         regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
  56 @@ -93,6 +115,11 @@ static const struct regmap_access_table axp288_volatile_table = {
  57         .n_yes_ranges   = ARRAY_SIZE(axp288_volatile_ranges),
  58  };
  59
  60 +static struct resource axp152_pek_resources[] = {
  61 +       DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
  62 +       DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
  63 +};
  64 +
  65  static struct resource axp20x_pek_resources[] = {
  66         {
  67                 .name   = "PEK_DBR",
  68 @@ -154,6 +181,15 @@ static struct resource axp288_fuel_gauge_resources[] = {
  69         },
  70  };
  71
  72 +static const struct regmap_config axp152_regmap_config = {
  73 +       .reg_bits       = 8,
  74 +       .val_bits       = 8,
  75 +       .wr_table       = &axp152_writeable_table,
  76 +       .volatile_table = &axp152_volatile_table,
  77 +       .max_register   = AXP152_PWM1_DUTY_CYCLE,
  78 +       .cache_type     = REGCACHE_RBTREE,
  79 +};
  80 +
  81  static const struct regmap_config axp20x_regmap_config = {
  82         .reg_bits       = 8,
  83         .val_bits       = 8,
  84 @@ -184,6 +220,26 @@ static const struct regmap_config axp288_regmap_config = {
  85  #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)                   \
  86         [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
  87
  88 +static const struct regmap_irq axp152_regmap_irqs[] = {
  89 +       INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT,         0, 6),
  90 +       INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL,         0, 5),
  91 +       INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT,        0, 3),
  92 +       INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL,        0, 2),
  93 +       INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW,            1, 5),
  94 +       INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW,            1, 4),
  95 +       INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW,            1, 3),
  96 +       INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW,            1, 2),
  97 +       INIT_REGMAP_IRQ(AXP152, PEK_SHORT,              1, 1),
  98 +       INIT_REGMAP_IRQ(AXP152, PEK_LONG,               1, 0),
  99 +       INIT_REGMAP_IRQ(AXP152, TIMER,                  2, 7),
 100 +       INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE,           2, 6),
 101 +       INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE,           2, 5),
 102 +       INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT,            2, 3),
 103 +       INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT,            2, 2),
 104 +       INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT,            2, 1),
 105 +       INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT,            2, 0),
 106 +};
 107 +
 108  static const struct regmap_irq axp20x_regmap_irqs[] = {
 109         INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V,            0, 7),
 110         INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN,            0, 6),
 111 @@ -293,6 +349,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
 112  };
 113
 114  static const struct of_device_id axp20x_of_match[] = {
 115 +       { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },
 116         { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
 117         { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
 118         { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
 119 @@ -317,6 +374,18 @@ static const struct acpi_device_id axp20x_acpi_match[] = {
 120  };
 121  MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);
 122
 123 +static const struct regmap_irq_chip axp152_regmap_irq_chip = {
 124 +       .name                   = "axp152_irq_chip",
 125 +       .status_base            = AXP152_IRQ1_STATE,
 126 +       .ack_base               = AXP152_IRQ1_STATE,
 127 +       .mask_base              = AXP152_IRQ1_EN,
 128 +       .mask_invert            = true,
 129 +       .init_ack_masked        = true,
 130 +       .irqs                   = axp152_regmap_irqs,
 131 +       .num_irqs               = ARRAY_SIZE(axp152_regmap_irqs),
 132 +       .num_regs               = 3,
 133 +};
 134 +
 135  static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
 136         .name                   = "axp20x_irq_chip",
 137         .status_base            = AXP20X_IRQ1_STATE,
 138 @@ -375,6 +444,14 @@ static struct mfd_cell axp22x_cells[] = {
 139         },
 140  };
 141
 142 +static struct mfd_cell axp152_cells[] = {
 143 +       {
 144 +               .name                   = "axp20x-pek",
 145 +               .num_resources          = ARRAY_SIZE(axp152_pek_resources),
 146 +               .resources              = axp152_pek_resources,
 147 +       },
 148 +};
 149 +
 150  static struct resource axp288_adc_resources[] = {
 151         {
 152                 .name  = "GPADC",
 153 @@ -513,6 +590,12 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
 154         }
 155
 156         switch (axp20x->variant) {
 157 +       case AXP152_ID:
 158 +               axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
 159 +               axp20x->cells = axp152_cells;
 160 +               axp20x->regmap_cfg = &axp152_regmap_config;
 161 +               axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
 162 +               break;
 163         case AXP202_ID:
 164         case AXP209_ID:
 165                 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
 166 diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
 167 index c2aa853..52203d5 100644
 168 --- a/include/linux/mfd/axp20x.h
 169 +++ b/include/linux/mfd/axp20x.h
 170 @@ -12,7 +12,8 @@
 171  #define __LINUX_MFD_AXP20X_H
 172
 173  enum {
 174 -       AXP202_ID = 0,
 175 +       AXP152_ID = 0,
 176 +       AXP202_ID,
 177         AXP209_ID,
 178         AXP221_ID,
 179         AXP288_ID,
 180 @@ -22,6 +23,24 @@ enum {
 181  #define AXP20X_DATACACHE(m)            (0x04 + (m))
 182
 183  /* Power supply */
 184 +#define AXP152_PWR_OP_MODE             0x01
 185 +#define AXP152_LDO3456_DC1234_CTRL     0x12
 186 +#define AXP152_ALDO_OP_MODE            0x13
 187 +#define AXP152_LDO0_CTRL               0x15
 188 +#define AXP152_DCDC2_V_OUT             0x23
 189 +#define AXP152_DCDC2_V_SCAL            0x25
 190 +#define AXP152_DCDC1_V_OUT             0x26
 191 +#define AXP152_DCDC3_V_OUT             0x27
 192 +#define AXP152_ALDO12_V_OUT            0x28
 193 +#define AXP152_DLDO1_V_OUT             0x29
 194 +#define AXP152_DLDO2_V_OUT             0x2a
 195 +#define AXP152_DCDC4_V_OUT             0x2b
 196 +#define AXP152_V_OFF                   0x31
 197 +#define AXP152_OFF_CTRL                        0x32
 198 +#define AXP152_PEK_KEY                 0x36
 199 +#define AXP152_DCDC_FREQ               0x37
 200 +#define AXP152_DCDC_MODE               0x80
 201 +
 202  #define AXP20X_PWR_INPUT_STATUS                0x00
 203  #define AXP20X_PWR_OP_MODE             0x01
 204  #define AXP20X_USB_OTG_STATUS          0x02
 205 @@ -69,6 +88,13 @@ enum {
 206  #define AXP22X_CHRG_CTRL3              0x35
 207
 208  /* Interrupt */
 209 +#define AXP152_IRQ1_EN                 0x40
 210 +#define AXP152_IRQ2_EN                 0x41
 211 +#define AXP152_IRQ3_EN                 0x42
 212 +#define AXP152_IRQ1_STATE              0x48
 213 +#define AXP152_IRQ2_STATE              0x49
 214 +#define AXP152_IRQ3_STATE              0x4a
 215 +
 216  #define AXP20X_IRQ1_EN                 0x40
 217  #define AXP20X_IRQ2_EN                 0x41
 218  #define AXP20X_IRQ3_EN                 0x42
 219 @@ -127,6 +153,19 @@ enum {
 220  #define AXP22X_PWREN_CTRL2             0x8d
 221
 222  /* GPIO */
 223 +#define AXP152_GPIO0_CTRL              0x90
 224 +#define AXP152_GPIO1_CTRL              0x91
 225 +#define AXP152_GPIO2_CTRL              0x92
 226 +#define AXP152_GPIO3_CTRL              0x93
 227 +#define AXP152_LDOGPIO2_V_OUT          0x96
 228 +#define AXP152_GPIO_INPUT              0x97
 229 +#define AXP152_PWM0_FREQ_X             0x98
 230 +#define AXP152_PWM0_FREQ_Y             0x99
 231 +#define AXP152_PWM0_DUTY_CYCLE         0x9a
 232 +#define AXP152_PWM1_FREQ_X             0x9b
 233 +#define AXP152_PWM1_FREQ_Y             0x9c
 234 +#define AXP152_PWM1_DUTY_CYCLE         0x9d
 235 +
 236  #define AXP20X_GPIO0_CTRL              0x90
 237  #define AXP20X_LDO5_V_OUT              0x91
 238  #define AXP20X_GPIO1_CTRL              0x92
 239 @@ -218,6 +257,26 @@ enum {
 240
 241  /* IRQs */
 242  enum {
 243 +       AXP152_IRQ_LDO0IN_CONNECT = 1,
 244 +       AXP152_IRQ_LDO0IN_REMOVAL,
 245 +       AXP152_IRQ_ALDO0IN_CONNECT,
 246 +       AXP152_IRQ_ALDO0IN_REMOVAL,
 247 +       AXP152_IRQ_DCDC1_V_LOW,
 248 +       AXP152_IRQ_DCDC2_V_LOW,
 249 +       AXP152_IRQ_DCDC3_V_LOW,
 250 +       AXP152_IRQ_DCDC4_V_LOW,
 251 +       AXP152_IRQ_PEK_SHORT,
 252 +       AXP152_IRQ_PEK_LONG,
 253 +       AXP152_IRQ_TIMER,
 254 +       AXP152_IRQ_PEK_RIS_EDGE,
 255 +       AXP152_IRQ_PEK_FAL_EDGE,
 256 +       AXP152_IRQ_GPIO3_INPUT,
 257 +       AXP152_IRQ_GPIO2_INPUT,
 258 +       AXP152_IRQ_GPIO1_INPUT,
 259 +       AXP152_IRQ_GPIO0_INPUT,
 260 +};
 261 +
 262 +enum {
 263         AXP20X_IRQ_ACIN_OVER_V = 1,
 264         AXP20X_IRQ_ACIN_PLUGIN,
 265         AXP20X_IRQ_ACIN_REMOVAL,