kernel: update 3.14 to 3.14.18
[openwrt.git] / target / linux / sunxi / patches-3.14 / 210-mfd-add-axp20x-pmic-driver.patch
1 From 509326e0138b762067904c0c60f818e9bdba4cd4 Mon Sep 17 00:00:00 2001
2 From: Carlo Caione <carlo@caione.org>
3 Date: Sat, 1 Mar 2014 17:45:46 +0100
4 Subject: [PATCH] mfd: AXP20x: Add mfd driver for AXP20x PMIC
5
6 This patch introduces the preliminary support for PMICs X-Powers AXP202
7 and AXP209. The AXP209 and AXP202 are the PMUs (Power Management Unit)
8 used by A10, A13 and A20 SoCs and developed by X-Powers, a sister company
9 of Allwinner.
10
11 The core enables support for two subsystems:
12 - PEK (Power Enable Key)
13 - Regulators
14
15 Signed-off-by: Carlo Caione <carlo@caione.org>
16 ---
17  arch/arm/configs/sunxi_defconfig |   1 +
18  drivers/mfd/Kconfig              |  12 ++
19  drivers/mfd/Makefile             |   1 +
20  drivers/mfd/axp20x.c             | 250 +++++++++++++++++++++++++++++++++++++++
21  include/linux/mfd/axp20x.h       | 180 ++++++++++++++++++++++++++++
22  5 files changed, 444 insertions(+)
23  create mode 100644 drivers/mfd/axp20x.c
24  create mode 100644 include/linux/mfd/axp20x.h
25
26 --- a/arch/arm/configs/sunxi_defconfig
27 +++ b/arch/arm/configs/sunxi_defconfig
28 @@ -55,6 +55,7 @@ CONFIG_GPIO_SYSFS=y
29  # CONFIG_HWMON is not set
30  CONFIG_WATCHDOG=y
31  CONFIG_SUNXI_WATCHDOG=y
32 +CONFIG_MFD_AXP20X=y
33  # CONFIG_USB_SUPPORT is not set
34  CONFIG_NEW_LEDS=y
35  CONFIG_LEDS_CLASS=y
36 --- a/drivers/mfd/Kconfig
37 +++ b/drivers/mfd/Kconfig
38 @@ -59,6 +59,18 @@ config MFD_AAT2870_CORE
39           additional drivers must be enabled in order to use the
40           functionality of the device.
41  
42 +config MFD_AXP20X
43 +       bool "X-Powers AXP20X"
44 +       select MFD_CORE
45 +       select REGMAP_I2C
46 +       select REGMAP_IRQ
47 +       depends on I2C=y
48 +       help
49 +         If you say Y here you get support for the AXP20X.
50 +         This driver provides common support for accessing the device,
51 +         additional drivers must be enabled in order to use the
52 +         functionality of the device.
53 +
54  config MFD_CROS_EC
55         tristate "ChromeOS Embedded Controller"
56         select MFD_CORE
57 --- a/drivers/mfd/Makefile
58 +++ b/drivers/mfd/Makefile
59 @@ -101,6 +101,7 @@ obj-$(CONFIG_PMIC_DA9052)   += da9052-irq.
60  obj-$(CONFIG_PMIC_DA9052)      += da9052-core.o
61  obj-$(CONFIG_MFD_DA9052_SPI)   += da9052-spi.o
62  obj-$(CONFIG_MFD_DA9052_I2C)   += da9052-i2c.o
63 +obj-$(CONFIG_MFD_AXP20X)       += axp20x.o
64  
65  obj-$(CONFIG_MFD_LP3943)       += lp3943.o
66  obj-$(CONFIG_MFD_LP8788)       += lp8788.o lp8788-irq.o
67 --- /dev/null
68 +++ b/drivers/mfd/axp20x.c
69 @@ -0,0 +1,250 @@
70 +/*
71 + * axp20x.c - mfd core driver for the X-Powers AXP202 and AXP209
72 + *
73 + * Author: Carlo Caione <carlo@caione.org>
74 + *
75 + * This program is free software; you can redistribute it and/or modify
76 + * it under the terms of the GNU General Public License version 2 as
77 + * published by the Free Software Foundation.
78 + */
79 +
80 +#include <linux/err.h>
81 +#include <linux/i2c.h>
82 +#include <linux/interrupt.h>
83 +#include <linux/kernel.h>
84 +#include <linux/module.h>
85 +#include <linux/pm_runtime.h>
86 +#include <linux/regmap.h>
87 +#include <linux/slab.h>
88 +#include <linux/regulator/consumer.h>
89 +#include <linux/mfd/axp20x.h>
90 +#include <linux/mfd/core.h>
91 +#include <linux/of_device.h>
92 +#include <linux/of_irq.h>
93 +
94 +#define AXP20X_OFF     0x80
95 +
96 +static const struct regmap_range axp20x_writeable_ranges[] = {
97 +       regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
98 +       regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
99 +};
100 +
101 +static const struct regmap_range axp20x_volatile_ranges[] = {
102 +       regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
103 +};
104 +
105 +static const struct regmap_access_table axp20x_writeable_table = {
106 +       .yes_ranges     = axp20x_writeable_ranges,
107 +       .n_yes_ranges   = ARRAY_SIZE(axp20x_writeable_ranges),
108 +};
109 +
110 +static const struct regmap_access_table axp20x_volatile_table = {
111 +       .yes_ranges     = axp20x_volatile_ranges,
112 +       .n_yes_ranges   = ARRAY_SIZE(axp20x_volatile_ranges),
113 +};
114 +
115 +static struct resource axp20x_pek_resources[] = {
116 +       {
117 +               .name   = "PEK_DBR",
118 +               .start  = AXP20X_IRQ_PEK_RIS_EDGE,
119 +               .end    = AXP20X_IRQ_PEK_RIS_EDGE,
120 +               .flags  = IORESOURCE_IRQ,
121 +       },
122 +       {
123 +               .name   = "PEK_DBF",
124 +               .start  = AXP20X_IRQ_PEK_FAL_EDGE,
125 +               .end    = AXP20X_IRQ_PEK_FAL_EDGE,
126 +               .flags  = IORESOURCE_IRQ,
127 +       },
128 +};
129 +
130 +static const struct regmap_config axp20x_regmap_config = {
131 +       .reg_bits       = 8,
132 +       .val_bits       = 8,
133 +       .wr_table       = &axp20x_writeable_table,
134 +       .volatile_table = &axp20x_volatile_table,
135 +       .max_register   = AXP20X_FG_RES,
136 +       .cache_type     = REGCACHE_RBTREE,
137 +};
138 +
139 +#define AXP20X_IRQ(_irq, _off, _mask) \
140 +       [AXP20X_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
141 +
142 +static const struct regmap_irq axp20x_regmap_irqs[] = {
143 +       AXP20X_IRQ(ACIN_OVER_V,         0, 7),
144 +       AXP20X_IRQ(ACIN_PLUGIN,         0, 6),
145 +       AXP20X_IRQ(ACIN_REMOVAL,        0, 5),
146 +       AXP20X_IRQ(VBUS_OVER_V,         0, 4),
147 +       AXP20X_IRQ(VBUS_PLUGIN,         0, 3),
148 +       AXP20X_IRQ(VBUS_REMOVAL,        0, 2),
149 +       AXP20X_IRQ(VBUS_V_LOW,          0, 1),
150 +       AXP20X_IRQ(BATT_PLUGIN,         1, 7),
151 +       AXP20X_IRQ(BATT_REMOVAL,        1, 6),
152 +       AXP20X_IRQ(BATT_ENT_ACT_MODE,   1, 5),
153 +       AXP20X_IRQ(BATT_EXIT_ACT_MODE,  1, 4),
154 +       AXP20X_IRQ(CHARG,               1, 3),
155 +       AXP20X_IRQ(CHARG_DONE,          1, 2),
156 +       AXP20X_IRQ(BATT_TEMP_HIGH,      1, 1),
157 +       AXP20X_IRQ(BATT_TEMP_LOW,       1, 0),
158 +       AXP20X_IRQ(DIE_TEMP_HIGH,       2, 7),
159 +       AXP20X_IRQ(CHARG_I_LOW,         2, 6),
160 +       AXP20X_IRQ(DCDC1_V_LONG,        2, 5),
161 +       AXP20X_IRQ(DCDC2_V_LONG,        2, 4),
162 +       AXP20X_IRQ(DCDC3_V_LONG,        2, 3),
163 +       AXP20X_IRQ(PEK_SHORT,           2, 1),
164 +       AXP20X_IRQ(PEK_LONG,            2, 0),
165 +       AXP20X_IRQ(N_OE_PWR_ON,         3, 7),
166 +       AXP20X_IRQ(N_OE_PWR_OFF,        3, 6),
167 +       AXP20X_IRQ(VBUS_VALID,          3, 5),
168 +       AXP20X_IRQ(VBUS_NOT_VALID,      3, 4),
169 +       AXP20X_IRQ(VBUS_SESS_VALID,     3, 3),
170 +       AXP20X_IRQ(VBUS_SESS_END,       3, 2),
171 +       AXP20X_IRQ(LOW_PWR_LVL1,        3, 1),
172 +       AXP20X_IRQ(LOW_PWR_LVL2,        3, 0),
173 +       AXP20X_IRQ(TIMER,               4, 7),
174 +       AXP20X_IRQ(PEK_RIS_EDGE,        4, 6),
175 +       AXP20X_IRQ(PEK_FAL_EDGE,        4, 5),
176 +       AXP20X_IRQ(GPIO3_INPUT,         4, 3),
177 +       AXP20X_IRQ(GPIO2_INPUT,         4, 2),
178 +       AXP20X_IRQ(GPIO1_INPUT,         4, 1),
179 +       AXP20X_IRQ(GPIO0_INPUT,         4, 0),
180 +};
181 +
182 +static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
183 +       .name                   = "axp20x_irq_chip",
184 +       .status_base            = AXP20X_IRQ1_STATE,
185 +       .ack_base               = AXP20X_IRQ1_STATE,
186 +       .mask_base              = AXP20X_IRQ1_EN,
187 +       .num_regs               = 5,
188 +       .irqs                   = axp20x_regmap_irqs,
189 +       .num_irqs               = ARRAY_SIZE(axp20x_regmap_irqs),
190 +       .mask_invert            = true,
191 +       .init_ack_masked        = true,
192 +};
193 +
194 +static struct mfd_cell axp20x_cells[] = {
195 +       {
196 +               .name           = "axp20x-pek",
197 +               .of_compatible  = "x-powers,axp20x-pek",
198 +               .num_resources  = ARRAY_SIZE(axp20x_pek_resources),
199 +               .resources      = axp20x_pek_resources,
200 +       }, {
201 +               .name           = "axp20x-regulator",
202 +       },
203 +};
204 +
205 +const struct of_device_id axp20x_of_match[] = {
206 +       { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
207 +       { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
208 +       { },
209 +};
210 +
211 +static struct axp20x_dev *axp20x_pm_power_off;
212 +static void axp20x_power_off(void)
213 +{
214 +       regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
215 +                    AXP20X_OFF);
216 +}
217 +
218 +static int axp20x_i2c_probe(struct i2c_client *i2c,
219 +                        const struct i2c_device_id *id)
220 +{
221 +       struct axp20x_dev *axp20x;
222 +       const struct of_device_id *of_id;
223 +       struct device_node *node = i2c->dev.of_node;
224 +       int ret;
225 +
226 +       axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);
227 +       if (!axp20x)
228 +               return -ENOMEM;
229 +
230 +       of_id = of_match_device(axp20x_of_match, &i2c->dev);
231 +       if (!of_id) {
232 +               dev_err(&i2c->dev, "Unable to setup AXP20X data\n");
233 +               return -ENODEV;
234 +       }
235 +       axp20x->variant = (int) of_id->data;
236 +
237 +       axp20x->i2c_client = i2c;
238 +       axp20x->dev = &i2c->dev;
239 +       dev_set_drvdata(axp20x->dev, axp20x);
240 +
241 +       axp20x->regmap = devm_regmap_init_i2c(i2c, &axp20x_regmap_config);
242 +       if (IS_ERR(axp20x->regmap)) {
243 +               ret = PTR_ERR(axp20x->regmap);
244 +               dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
245 +               return ret;
246 +       }
247 +
248 +       axp20x->irq = i2c->irq;
249 +       ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
250 +                                 IRQF_ONESHOT | IRQF_SHARED, -1,
251 +                                 &axp20x_regmap_irq_chip,
252 +                                 &axp20x->regmap_irqc);
253 +       if (ret) {
254 +               dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret);
255 +               return ret;
256 +       }
257 +
258 +       ret = mfd_add_devices(axp20x->dev, -1, axp20x_cells,
259 +                             ARRAY_SIZE(axp20x_cells), NULL, 0, NULL);
260 +       if (ret) {
261 +               dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
262 +               goto mfd_err;
263 +       }
264 +
265 +       axp20x->pm_off = of_property_read_bool(node, "axp,system-power-controller");
266 +
267 +       if (axp20x->pm_off && !pm_power_off) {
268 +               axp20x_pm_power_off = axp20x;
269 +               pm_power_off = axp20x_power_off;
270 +       }
271 +
272 +       dev_info(&i2c->dev, "AXP20X driver loaded\n");
273 +
274 +       return 0;
275 +
276 +mfd_err:
277 +       regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
278 +
279 +       return ret;
280 +}
281 +
282 +static int axp20x_i2c_remove(struct i2c_client *i2c)
283 +{
284 +       struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);
285 +
286 +       if (axp20x == axp20x_pm_power_off) {
287 +               axp20x_pm_power_off = NULL;
288 +               pm_power_off = NULL;
289 +       }
290 +
291 +       mfd_remove_devices(axp20x->dev);
292 +       regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc);
293 +
294 +       return 0;
295 +}
296 +
297 +static const struct i2c_device_id axp20x_i2c_id[] = {
298 +       { "axp202", AXP202_ID },
299 +       { "axp209", AXP209_ID },
300 +       { }
301 +};
302 +MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
303 +
304 +static struct i2c_driver axp20x_i2c_driver = {
305 +       .driver = {
306 +               .name   = "axp20x",
307 +               .owner  = THIS_MODULE,
308 +               .of_match_table = of_match_ptr(axp20x_of_match),
309 +       },
310 +       .probe          = axp20x_i2c_probe,
311 +       .remove         = axp20x_i2c_remove,
312 +       .id_table       = axp20x_i2c_id,
313 +};
314 +
315 +module_i2c_driver(axp20x_i2c_driver);
316 +
317 +MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
318 +MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
319 +MODULE_LICENSE("GPL");
320 --- /dev/null
321 +++ b/include/linux/mfd/axp20x.h
322 @@ -0,0 +1,180 @@
323 +/*
324 + * Functions to access AXP20X power management chip.
325 + *
326 + * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
327 + *
328 + * This program is free software; you can redistribute it and/or modify
329 + * it under the terms of the GNU General Public License version 2 as
330 + * published by the Free Software Foundation.
331 + */
332 +
333 +#ifndef __LINUX_MFD_AXP20X_H
334 +#define __LINUX_MFD_AXP20X_H
335 +
336 +#define AXP202_ID                      0
337 +#define AXP209_ID                      1
338 +
339 +#define AXP20X_DATACACHE(m)            (0x04 + (m))
340 +
341 +/* Power supply */
342 +#define AXP20X_PWR_INPUT_STATUS                0x00
343 +#define AXP20X_PWR_OP_MODE             0x01
344 +#define AXP20X_USB_OTG_STATUS          0x02
345 +#define AXP20X_PWR_OUT_CTRL            0x12
346 +#define AXP20X_DCDC2_V_OUT             0x23
347 +#define AXP20X_DCDC2_LDO3_V_SCAL       0x25
348 +#define AXP20X_DCDC3_V_OUT             0x27
349 +#define AXP20X_LDO24_V_OUT             0x28
350 +#define AXP20X_LDO3_V_OUT              0x29
351 +#define AXP20X_VBUS_IPSOUT_MGMT                0x30
352 +#define AXP20X_V_OFF                   0x31
353 +#define AXP20X_OFF_CTRL                        0x32
354 +#define AXP20X_CHRG_CTRL1              0x33
355 +#define AXP20X_CHRG_CTRL2              0x34
356 +#define AXP20X_CHRG_BAK_CTRL           0x35
357 +#define AXP20X_PEK_KEY                 0x36
358 +#define AXP20X_DCDC_FREQ               0x37
359 +#define AXP20X_V_LTF_CHRG              0x38
360 +#define AXP20X_V_HTF_CHRG              0x39
361 +#define AXP20X_APS_WARN_L1             0x3a
362 +#define AXP20X_APS_WARN_L2             0x3b
363 +#define AXP20X_V_LTF_DISCHRG           0x3c
364 +#define AXP20X_V_HTF_DISCHRG           0x3d
365 +
366 +/* Interrupt */
367 +#define AXP20X_IRQ1_EN                 0x40
368 +#define AXP20X_IRQ2_EN                 0x41
369 +#define AXP20X_IRQ3_EN                 0x42
370 +#define AXP20X_IRQ4_EN                 0x43
371 +#define AXP20X_IRQ5_EN                 0x44
372 +#define AXP20X_IRQ1_STATE              0x48
373 +#define AXP20X_IRQ2_STATE              0x49
374 +#define AXP20X_IRQ3_STATE              0x4a
375 +#define AXP20X_IRQ4_STATE              0x4b
376 +#define AXP20X_IRQ5_STATE              0x4c
377 +
378 +/* ADC */
379 +#define AXP20X_ACIN_V_ADC_H            0x56
380 +#define AXP20X_ACIN_V_ADC_L            0x57
381 +#define AXP20X_ACIN_I_ADC_H            0x58
382 +#define AXP20X_ACIN_I_ADC_L            0x59
383 +#define AXP20X_VBUS_V_ADC_H            0x5a
384 +#define AXP20X_VBUS_V_ADC_L            0x5b
385 +#define AXP20X_VBUS_I_ADC_H            0x5c
386 +#define AXP20X_VBUS_I_ADC_L            0x5d
387 +#define AXP20X_TEMP_ADC_H              0x5e
388 +#define AXP20X_TEMP_ADC_L              0x5f
389 +#define AXP20X_TS_IN_H                 0x62
390 +#define AXP20X_TS_IN_L                 0x63
391 +#define AXP20X_GPIO0_V_ADC_H           0x64
392 +#define AXP20X_GPIO0_V_ADC_L           0x65
393 +#define AXP20X_GPIO1_V_ADC_H           0x66
394 +#define AXP20X_GPIO1_V_ADC_L           0x67
395 +#define AXP20X_PWR_BATT_H              0x70
396 +#define AXP20X_PWR_BATT_M              0x71
397 +#define AXP20X_PWR_BATT_L              0x72
398 +#define AXP20X_BATT_V_H                        0x78
399 +#define AXP20X_BATT_V_L                        0x79
400 +#define AXP20X_BATT_CHRG_I_H           0x7a
401 +#define AXP20X_BATT_CHRG_I_L           0x7b
402 +#define AXP20X_BATT_DISCHRG_I_H                0x7c
403 +#define AXP20X_BATT_DISCHRG_I_L                0x7d
404 +#define AXP20X_IPSOUT_V_HIGH_H         0x7e
405 +#define AXP20X_IPSOUT_V_HIGH_L         0x7f
406 +
407 +/* Power supply */
408 +#define AXP20X_DCDC_MODE               0x80
409 +#define AXP20X_ADC_EN1                 0x82
410 +#define AXP20X_ADC_EN2                 0x83
411 +#define AXP20X_ADC_RATE                        0x84
412 +#define AXP20X_GPIO10_IN_RANGE         0x85
413 +#define AXP20X_GPIO1_ADC_IRQ_RIS       0x86
414 +#define AXP20X_GPIO1_ADC_IRQ_FAL       0x87
415 +#define AXP20X_TIMER_CTRL              0x8a
416 +#define AXP20X_VBUS_MON                        0x8b
417 +#define AXP20X_OVER_TMP                        0x8f
418 +
419 +/* GPIO */
420 +#define AXP20X_GPIO0_CTRL              0x90
421 +#define AXP20X_LDO5_V_OUT              0x91
422 +#define AXP20X_GPIO1_CTRL              0x92
423 +#define AXP20X_GPIO2_CTRL              0x93
424 +#define AXP20X_GPIO20_SS               0x94
425 +#define AXP20X_GPIO3_CTRL              0x95
426 +
427 +/* Battery */
428 +#define AXP20X_CHRG_CC_31_24           0xb0
429 +#define AXP20X_CHRG_CC_23_16           0xb1
430 +#define AXP20X_CHRG_CC_15_8            0xb2
431 +#define AXP20X_CHRG_CC_7_0             0xb3
432 +#define AXP20X_DISCHRG_CC_31_24                0xb4
433 +#define AXP20X_DISCHRG_CC_23_16                0xb5
434 +#define AXP20X_DISCHRG_CC_15_8         0xb6
435 +#define AXP20X_DISCHRG_CC_7_0          0xb7
436 +#define AXP20X_CC_CTRL                 0xb8
437 +#define AXP20X_FG_RES                  0xb9
438 +
439 +/* Regulators IDs */
440 +enum {
441 +       AXP20X_LDO1 = 0,
442 +       AXP20X_LDO2,
443 +       AXP20X_LDO3,
444 +       AXP20X_LDO4,
445 +       AXP20X_LDO5,
446 +       AXP20X_DCDC2,
447 +       AXP20X_DCDC3,
448 +       AXP20X_REG_ID_MAX,
449 +};
450 +
451 +/* IRQs */
452 +enum {
453 +       AXP20X_IRQ_ACIN_OVER_V = 1,
454 +       AXP20X_IRQ_ACIN_PLUGIN,
455 +       AXP20X_IRQ_ACIN_REMOVAL,
456 +       AXP20X_IRQ_VBUS_OVER_V,
457 +       AXP20X_IRQ_VBUS_PLUGIN,
458 +       AXP20X_IRQ_VBUS_REMOVAL,
459 +       AXP20X_IRQ_VBUS_V_LOW,
460 +       AXP20X_IRQ_BATT_PLUGIN,
461 +       AXP20X_IRQ_BATT_REMOVAL,
462 +       AXP20X_IRQ_BATT_ENT_ACT_MODE,
463 +       AXP20X_IRQ_BATT_EXIT_ACT_MODE,
464 +       AXP20X_IRQ_CHARG,
465 +       AXP20X_IRQ_CHARG_DONE,
466 +       AXP20X_IRQ_BATT_TEMP_HIGH,
467 +       AXP20X_IRQ_BATT_TEMP_LOW,
468 +       AXP20X_IRQ_DIE_TEMP_HIGH,
469 +       AXP20X_IRQ_CHARG_I_LOW,
470 +       AXP20X_IRQ_DCDC1_V_LONG,
471 +       AXP20X_IRQ_DCDC2_V_LONG,
472 +       AXP20X_IRQ_DCDC3_V_LONG,
473 +       AXP20X_IRQ_PEK_SHORT = 22,
474 +       AXP20X_IRQ_PEK_LONG,
475 +       AXP20X_IRQ_N_OE_PWR_ON,
476 +       AXP20X_IRQ_N_OE_PWR_OFF,
477 +       AXP20X_IRQ_VBUS_VALID,
478 +       AXP20X_IRQ_VBUS_NOT_VALID,
479 +       AXP20X_IRQ_VBUS_SESS_VALID,
480 +       AXP20X_IRQ_VBUS_SESS_END,
481 +       AXP20X_IRQ_LOW_PWR_LVL1,
482 +       AXP20X_IRQ_LOW_PWR_LVL2,
483 +       AXP20X_IRQ_TIMER,
484 +       AXP20X_IRQ_PEK_RIS_EDGE,
485 +       AXP20X_IRQ_PEK_FAL_EDGE,
486 +       AXP20X_IRQ_GPIO3_INPUT,
487 +       AXP20X_IRQ_GPIO2_INPUT,
488 +       AXP20X_IRQ_GPIO1_INPUT,
489 +       AXP20X_IRQ_GPIO0_INPUT,
490 +};
491 +
492 +struct axp20x_dev {
493 +       struct device                   *dev;
494 +       struct i2c_client               *i2c_client;
495 +       struct regmap                   *regmap;
496 +       struct regmap_irq_chip_data     *regmap_irqc;
497 +       int                             variant;
498 +       int                             irq;
499 +       bool                            pm_off;
500 +};
501 +
502 +#endif /* __LINUX_MFD_AXP20X_H */