d39b6eebec62bf961320e35d40a350be460eb818
[openwrt.git] / target / linux / sunxi / patches-3.14 / 145-2-dt-sun4i-add-a10-spi.patch
1 From cac3c4d67c80c4895d0d44e609beb535d66af6a3 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Sat, 22 Feb 2014 22:35:55 +0100
4 Subject: [PATCH] ARM: dt: sun4i: Add A10 SPI controller nodes
5
6 The A10 has 4 SPI controllers that are now supported. Add them in the DT.
7
8 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
9 ---
10  arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
11  1 file changed, 44 insertions(+)
12
13 diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
14 index f6f41d6..157bc09 100644
15 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
16 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
17 @@ -339,6 +339,28 @@
18                 #size-cells = <1>;
19                 ranges;
20  
21 +               spi0: spi@01c05000 {
22 +                       compatible = "allwinner,sun4i-a10-spi";
23 +                       reg = <0x01c05000 0x1000>;
24 +                       interrupts = <10>;
25 +                       clocks = <&ahb_gates 20>, <&spi0_clk>;
26 +                       clock-names = "ahb", "mod";
27 +                       status = "disabled";
28 +                       #address-cells = <1>;
29 +                       #size-cells = <0>;
30 +               };
31 +
32 +               spi1: spi@01c06000 {
33 +                       compatible = "allwinner,sun4i-a10-spi";
34 +                       reg = <0x01c06000 0x1000>;
35 +                       interrupts = <11>;
36 +                       clocks = <&ahb_gates 21>, <&spi1_clk>;
37 +                       clock-names = "ahb", "mod";
38 +                       status = "disabled";
39 +                       #address-cells = <1>;
40 +                       #size-cells = <0>;
41 +               };
42 +
43                 emac: ethernet@01c0b000 {
44                         compatible = "allwinner,sun4i-a10-emac";
45                         reg = <0x01c0b000 0x1000>;
46 @@ -355,6 +377,28 @@
47                         #size-cells = <0>;
48                 };
49  
50 +               spi2: spi@01c17000 {
51 +                       compatible = "allwinner,sun4i-a10-spi";
52 +                       reg = <0x01c17000 0x1000>;
53 +                       interrupts = <12>;
54 +                       clocks = <&ahb_gates 22>, <&spi2_clk>;
55 +                       clock-names = "ahb", "mod";
56 +                       status = "disabled";
57 +                       #address-cells = <1>;
58 +                       #size-cells = <0>;
59 +               };
60 +
61 +               spi3: spi@01c1f000 {
62 +                       compatible = "allwinner,sun4i-a10-spi";
63 +                       reg = <0x01c1f000 0x1000>;
64 +                       interrupts = <50>;
65 +                       clocks = <&ahb_gates 23>, <&spi3_clk>;
66 +                       clock-names = "ahb", "mod";
67 +                       status = "disabled";
68 +                       #address-cells = <1>;
69 +                       #size-cells = <0>;
70 +               };
71 +
72                 intc: interrupt-controller@01c20400 {
73                         compatible = "allwinner,sun4i-ic";
74                         reg = <0x01c20400 0x400>;
75 -- 
76 2.0.3
77