target/linux/sunxi/patches-3.13/151-pinctrl-sun5i-a13-port-F.patch

   1 From 33b0123664b627005728cfe7b1967b790392ceec Mon Sep 17 00:00:00 2001
   2 From: Hans de Goede <hdegoede@redhat.com>
   3 Date: Sat, 14 Dec 2013 17:20:13 +0100
   4 Subject: [PATCH] ARM: sunxi: fix sun5i-a13 port F multiplexing
   5
   6 The correct value for selecting the mmc0 function on port F pins is 2 not 4,
   7 as per the data-sheet:
   8 http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
   9
  10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  11 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  12 ---
  13  drivers/pinctrl/pinctrl-sunxi-pins.h | 12 ++++++------
  14  1 file changed, 6 insertions(+), 6 deletions(-)
  15
  16 --- a/drivers/pinctrl/pinctrl-sunxi-pins.h
  17 +++ b/drivers/pinctrl/pinctrl-sunxi-pins.h
  18 @@ -1932,27 +1932,27 @@ static const struct sunxi_desc_pin sun5i
  19         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,
  20                   SUNXI_FUNCTION(0x0, "gpio_in"),
  21                   SUNXI_FUNCTION(0x1, "gpio_out"),
  22 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D1 */
  23 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D1 */
  24         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,
  25                   SUNXI_FUNCTION(0x0, "gpio_in"),
  26                   SUNXI_FUNCTION(0x1, "gpio_out"),
  27 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D0 */
  28 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D0 */
  29         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,
  30                   SUNXI_FUNCTION(0x0, "gpio_in"),
  31                   SUNXI_FUNCTION(0x1, "gpio_out"),
  32 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CLK */
  33 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CLK */
  34         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,
  35                   SUNXI_FUNCTION(0x0, "gpio_in"),
  36                   SUNXI_FUNCTION(0x1, "gpio_out"),
  37 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CMD */
  38 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CMD */
  39         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,
  40                   SUNXI_FUNCTION(0x0, "gpio_in"),
  41                   SUNXI_FUNCTION(0x1, "gpio_out"),
  42 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D3 */
  43 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D3 */
  44         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,
  45                   SUNXI_FUNCTION(0x0, "gpio_in"),
  46                   SUNXI_FUNCTION(0x1, "gpio_out"),
  47 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D2 */
  48 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D2 */
  49         /* Hole */
  50         SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,
  51                   SUNXI_FUNCTION(0x0, "gpio_in"),