target/linux/sunxi/patches-3.13/125-dt-sunxi-update-ahb-clock-sun57i.patch

   1 From c8fe5648aff581545ce5744f73ee1312080b8ef4 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
   3 Date: Sat, 14 Sep 2013 20:44:03 -0300
   4 Subject: [PATCH] ARM: sunxi: dt: Update AHB clock to be muxable on sun[57]i
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 sun5i and sun7i have a mux to select the parent clock for AHB. This
  10 commit implements the required changes on the device trees.
  11
  12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  13 ---
  14  arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++--
  15  arch/arm/boot/dts/sun5i-a13.dtsi  | 4 ++--
  16  arch/arm/boot/dts/sun7i-a20.dtsi  | 4 ++--
  17  3 files changed, 6 insertions(+), 6 deletions(-)
  18
  19 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  20 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  21 @@ -111,9 +111,9 @@
  22
  23                 ahb: ahb@01c20054 {
  24                         #clock-cells = <0>;
  25 -                       compatible = "allwinner,sun4i-ahb-clk";
  26 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  27                         reg = <0x01c20054 0x4>;
  28 -                       clocks = <&axi>;
  29 +                       clocks = <&axi>, <&cpu>, <&pll6 1>;
  30                 };
  31
  32                 ahb_gates: ahb_gates@01c20060 {
  33 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  34 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  35 @@ -115,9 +115,9 @@
  36
  37                 ahb: ahb@01c20054 {
  38                         #clock-cells = <0>;
  39 -                       compatible = "allwinner,sun4i-ahb-clk";
  40 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  41                         reg = <0x01c20054 0x4>;
  42 -                       clocks = <&axi>;
  43 +                       clocks = <&axi>, <&cpu>, <&pll6 1>;
  44                 };
  45
  46                 ahb_gates: ahb_gates@01c20060 {
  47 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  48 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  49 @@ -101,9 +101,9 @@
  50
  51                 ahb: ahb@01c20054 {
  52                         #clock-cells = <0>;
  53 -                       compatible = "allwinner,sun4i-ahb-clk";
  54 +                       compatible = "allwinner,sun5i-a13-ahb-clk";
  55                         reg = <0x01c20054 0x4>;
  56 -                       clocks = <&axi>;
  57 +                       clocks = <&axi>, <&pll6 1>, <&pll6 2>;
  58                 };
  59
  60                 ahb_gates: ahb_gates@01c20060 {