target/linux/sunxi/patches-3.12/115-clk-sunxi-muxable-ahb-clock.patch

   1 From 147a46beeb49c6baabb85126d570f330a2ba7cad Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
   3 Date: Sat, 14 Sep 2013 20:48:40 -0300
   4 Subject: [PATCH] clk: sunxi: Implement muxable AHB clock
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 sun5i and sun7i have a mux to change the AHB clock parent, this commit
  10 adds support for it on the driver.
  11
  12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  13 ---
  14  Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
  15  drivers/clk/sunxi/clk-sunxi.c                     | 37 +++++++++++++++++++++++
  16  2 files changed, 38 insertions(+)
  17
  18 diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
  19 index e840cb2..941bd93 100644
  20 --- a/Documentation/devicetree/bindings/clock/sunxi.txt
  21 +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
  22 @@ -15,6 +15,7 @@ Required properties:
  23         "allwinner,sun4i-axi-clk" - for the AXI clock
  24         "allwinner,sun4i-axi-gates-clk" - for the AXI gates
  25         "allwinner,sun4i-ahb-clk" - for the AHB clock
  26 +       "allwinner,sun5i-a13-ahb-clk" - for the AHB clock on A13
  27         "allwinner,sun4i-ahb-gates-clk" - for the AHB gates on A10
  28         "allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
  29         "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
  30 diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
  31 index 0ecaa18..360d705 100644
  32 --- a/drivers/clk/sunxi/clk-sunxi.c
  33 +++ b/drivers/clk/sunxi/clk-sunxi.c
  34 @@ -240,7 +240,32 @@ static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate,
  35         *n = DIV_ROUND_UP(div, (*k+1));
  36  }
  37
  38 +/**
  39 + * sun5i_get_ahb_factors() - calculates p factor for AHB
  40 + * AHB rate is calculated as follows
  41 + * rate = parent_rate >> p
  42 + */
  43
  44 +static void sun5i_a13_get_ahb_factors(u32 *freq, u32 parent_rate,
  45 +                                     u8 *n, u8 *k, u8 *m, u8 *p)
  46 +{
  47 +       u8 div;
  48 +
  49 +       /* This clock can only divide, so we will never achieve a higher
  50 +        * rate than the parent's */
  51 +       if (*freq > parent_rate)
  52 +               *freq = parent_rate;
  53 +
  54 +       /* Normalize value to a parent multiple */
  55 +       div = *freq / parent_rate;
  56 +       *freq = parent_rate * div;
  57 +
  58 +       /* we were called to round the frequency, we can now return */
  59 +       if (n == NULL)
  60 +               return;
  61 +
  62 +       *p = div;
  63 +}
  64
  65  /**
  66   * sun4i_get_apb1_factors() - calculates m, p factors for APB1
  67 @@ -366,6 +391,11 @@ struct factors_data {
  68         .kwidth = 2,
  69  };
  70
  71 +static struct clk_factors_config sun5i_a13_ahb_config = {
  72 +       .pshift = 4,
  73 +       .pwidth = 2,
  74 +};
  75 +
  76  static struct clk_factors_config sun4i_apb1_config = {
  77         .mshift = 0,
  78         .mwidth = 5,
  79 @@ -399,6 +429,12 @@ struct factors_data {
  80         .getter = sun4i_get_pll5_factors,
  81  };
  82
  83 +static const struct factors_data sun5i_a13_ahb_data __initconst = {
  84 +       .mux = 6,
  85 +       .table = &sun5i_a13_ahb_config,
  86 +       .getter = sun5i_a13_get_ahb_factors,
  87 +};
  88 +
  89  static const struct factors_data sun4i_apb1_data __initconst = {
  90         .mux = 24,
  91         .table = &sun4i_apb1_config,
  92 @@ -842,6 +878,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
  93  static const struct of_device_id clk_factors_match[] __initconst = {
  94         {.compatible = "allwinner,sun4i-pll1-clk", .data = &sun4i_pll1_data,},
  95         {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
  96 +       {.compatible = "allwinner,sun5i-a13-ahb-clk", .data = &sun5i_a13_ahb_data,},
  97         {.compatible = "allwinner,sun4i-apb1-clk", .data = &sun4i_apb1_data,},
  98         {.compatible = "allwinner,sun4i-mod0-clk", .data = &sun4i_mod0_data,},
  99         {}
 100 --
 101 1.8.5.1
 102