target/linux/s3c24xx/patches-2.6.26/0145-introduce-samsung-camera-unit-driver.patch.patch

   1 From 573919b9c0d6752c42b2b130fde41d6b80a843b7 Mon Sep 17 00:00:00 2001
   2 From: SW.LEE <hitchcar@samsung.com>
   3 Date: Fri, 25 Jul 2008 23:06:10 +0100
   4 Subject: [PATCH] introduce-samsung-camera-unit-driver.patch
   5
   6 This is the kernel side of an old (2004) samsung camera driver for 2440
   7 It doesn't compile on modern kernel yet, this patch introduces it into the
   8 kernel tree without gross mods, so it is broken code we can start to work on
   9 ---
  10  arch/arm/mach-s3c2440/Kconfig               |    4 +-
  11  arch/arm/mach-s3c2440/Makefile              |    8 +-
  12  arch/arm/mach-s3c2440/camera/Kconfig        |    7 +
  13  arch/arm/mach-s3c2440/camera/Makefile       |    9 +
  14  arch/arm/mach-s3c2440/camera/bits.h         |   48 ++
  15  arch/arm/mach-s3c2440/camera/cam_reg.h      |  220 ++++++
  16  arch/arm/mach-s3c2440/camera/camif.c        |  978 +++++++++++++++++++++++++++
  17  arch/arm/mach-s3c2440/camera/camif.h        |  304 +++++++++
  18  arch/arm/mach-s3c2440/camera/camif_fsm.c    |  427 ++++++++++++
  19  arch/arm/mach-s3c2440/camera/imgsensor.c    |  255 +++++++
  20  arch/arm/mach-s3c2440/camera/miscdevice.h   |   18 +
  21  arch/arm/mach-s3c2440/camera/qt-driver.c    |  169 +++++
  22  arch/arm/mach-s3c2440/camera/qt.h           |   18 +
  23  arch/arm/mach-s3c2440/camera/s5x532.h       |  143 ++++
  24  arch/arm/mach-s3c2440/camera/s5x532_rev36.h |  208 ++++++
  25  arch/arm/mach-s3c2440/camera/sensor.h       |   20 +
  26  arch/arm/mach-s3c2440/camera/sxga.h         |  504 ++++++++++++++
  27  arch/arm/mach-s3c2440/camera/userapp.h      |   44 ++
  28  arch/arm/mach-s3c2440/camera/v4l2_api.c     |  311 +++++++++
  29  arch/arm/mach-s3c2440/camera/video-driver.c |  591 ++++++++++++++++
  30  arch/arm/mach-s3c2440/camera/videodev.c     |  342 ++++++++++
  31  arch/arm/mach-s3c2440/camera/videodev.h     |  110 +++
  32  arch/arm/mach-s3c2440/camera/videodev2.h    |  938 +++++++++++++++++++++++++
  33  23 files changed, 5668 insertions(+), 8 deletions(-)
  34  create mode 100644 arch/arm/mach-s3c2440/camera/Kconfig
  35  create mode 100644 arch/arm/mach-s3c2440/camera/Makefile
  36  create mode 100644 arch/arm/mach-s3c2440/camera/bits.h
  37  create mode 100644 arch/arm/mach-s3c2440/camera/cam_reg.h
  38  create mode 100644 arch/arm/mach-s3c2440/camera/camif.c
  39  create mode 100644 arch/arm/mach-s3c2440/camera/camif.h
  40  create mode 100644 arch/arm/mach-s3c2440/camera/camif_fsm.c
  41  create mode 100644 arch/arm/mach-s3c2440/camera/imgsensor.c
  42  create mode 100644 arch/arm/mach-s3c2440/camera/miscdevice.h
  43  create mode 100644 arch/arm/mach-s3c2440/camera/qt-driver.c
  44  create mode 100644 arch/arm/mach-s3c2440/camera/qt.h
  45  create mode 100644 arch/arm/mach-s3c2440/camera/s5x532.h
  46  create mode 100644 arch/arm/mach-s3c2440/camera/s5x532_rev36.h
  47  create mode 100644 arch/arm/mach-s3c2440/camera/sensor.h
  48  create mode 100644 arch/arm/mach-s3c2440/camera/sxga.h
  49  create mode 100644 arch/arm/mach-s3c2440/camera/userapp.h
  50  create mode 100644 arch/arm/mach-s3c2440/camera/v4l2_api.c
  51  create mode 100644 arch/arm/mach-s3c2440/camera/video-driver.c
  52  create mode 100644 arch/arm/mach-s3c2440/camera/videodev.c
  53  create mode 100644 arch/arm/mach-s3c2440/camera/videodev.h
  54  create mode 100644 arch/arm/mach-s3c2440/camera/videodev2.h
  55
  56 diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
  57 index 3e9e9f1..e042965 100644
  58 --- a/arch/arm/mach-s3c2440/Kconfig
  59 +++ b/arch/arm/mach-s3c2440/Kconfig
  60 @@ -30,6 +30,9 @@ config S3C2440_C_FIQ
  61           Support for S3C2440 FIQ support in C -- see
  62           ./arch/arm/macs3c2440/fiq_c_isr.c
  63
  64 +source "arch/arm/mach-s3c2440/camera/Kconfig"
  65 +
  66 +
  67  menu "S3C2440 Machines"
  68
  69  config MACH_ANUBIS
  70 @@ -93,4 +96,3 @@ config NEO1973_GTA02_2440
  71            of the FIC/Openmoko Neo1973 GTA02 GSM Phone.
  72
  73  endmenu
  74 -
  75 diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
  76 index 4932232..e9c6334 100644
  77 --- a/arch/arm/mach-s3c2440/Makefile
  78 +++ b/arch/arm/mach-s3c2440/Makefile
  79 @@ -1,10 +1,4 @@
  80 -# arch/arm/mach-s3c2440/Makefile
  81 -#
  82 -# Copyright 2007 Simtec Electronics
  83 -#
  84 -# Licensed under GPLv2
  85 -
  86 -obj-y                          :=
  87 +obj-y                           += camera/
  88  obj-m                          :=
  89  obj-n                          :=
  90  obj-                           :=
  91 diff --git a/arch/arm/mach-s3c2440/camera/Kconfig b/arch/arm/mach-s3c2440/camera/Kconfig
  92 new file mode 100644
  93 index 0000000..36f127d
  94 --- /dev/null
  95 +++ b/arch/arm/mach-s3c2440/camera/Kconfig
  96 @@ -0,0 +1,7 @@
  97 +
  98 +config S3C2440_CAMERA
  99 +       bool "S3C24xx Camera interface"
 100 +       depends on ARCH_S3C2410
 101 +       help
 102 +         Camera driver for S3C2440 camera unit
 103 +
 104 diff --git a/arch/arm/mach-s3c2440/camera/Makefile b/arch/arm/mach-s3c2440/camera/Makefile
 105 new file mode 100644
 106 index 0000000..a46d3be
 107 --- /dev/null
 108 +++ b/arch/arm/mach-s3c2440/camera/Makefile
 109 @@ -0,0 +1,9 @@
 110 +obj-$(CONFIG_S3C2440_CAMERA) += \
 111 +       videodev.o \
 112 +       imgsensor.o \
 113 +       videodrv.o \
 114 +       video-driver.o \
 115 +       camif.o \
 116 +       camif_fsm.o \
 117 +       qt-driver.o
 118 +
 119 diff --git a/arch/arm/mach-s3c2440/camera/bits.h b/arch/arm/mach-s3c2440/camera/bits.h
 120 new file mode 100644
 121 index 0000000..8d83c2e
 122 --- /dev/null
 123 +++ b/arch/arm/mach-s3c2440/camera/bits.h
 124 @@ -0,0 +1,48 @@
 125 +/*
 126 + *  Copyright (C) Samsung Electroincs  2003
 127 + *  Author: SW.LEE <hitchcar@samsung.com>
 128 + *
 129 + * This program is free software; you can redistribute it and/or modify
 130 + * it under the terms of the GNU General Public License as published by
 131 + * the Free Software Foundation; either version 2 of the License, or
 132 + * (at your option) any later version.
 133 + *
 134 + */
 135 +
 136 +#ifndef __SW_BITS_H
 137 +#define __SW_BITS_H
 138 +
 139 +#define BIT0                            0x00000001
 140 +#define BIT1                            0x00000002
 141 +#define BIT2                            0x00000004
 142 +#define BIT3                            0x00000008
 143 +#define BIT4                            0x00000010
 144 +#define BIT5                            0x00000020
 145 +#define BIT6                            0x00000040
 146 +#define BIT7                            0x00000080
 147 +#define BIT8                            0x00000100
 148 +#define BIT9                            0x00000200
 149 +#define BIT10                           0x00000400
 150 +#define BIT11                           0x00000800
 151 +#define BIT12                           0x00001000
 152 +#define BIT13                           0x00002000
 153 +#define BIT14                           0x00004000
 154 +#define BIT15                           0x00008000
 155 +#define BIT16                           0x00010000
 156 +#define BIT17                           0x00020000
 157 +#define BIT18                           0x00040000
 158 +#define BIT19                           0x00080000
 159 +#define BIT20                           0x00100000
 160 +#define BIT21                           0x00200000
 161 +#define BIT22                           0x00400000
 162 +#define BIT23                           0x00800000
 163 +#define BIT24                           0x01000000
 164 +#define BIT25                           0x02000000
 165 +#define BIT26                           0x04000000
 166 +#define BIT27                           0x08000000
 167 +#define BIT28                           0x10000000
 168 +#define BIT29                           0x20000000
 169 +#define BIT30                           0x40000000
 170 +#define BIT31                           0x80000000
 171 +
 172 +#endif
 173 diff --git a/arch/arm/mach-s3c2440/camera/cam_reg.h b/arch/arm/mach-s3c2440/camera/cam_reg.h
 174 new file mode 100644
 175 index 0000000..7247a4e
 176 --- /dev/null
 177 +++ b/arch/arm/mach-s3c2440/camera/cam_reg.h
 178 @@ -0,0 +1,220 @@
 179 + /*----------------------------------------------------------
 180 +  *   (C) 2004 Samsung Electronics
 181 +  *   SW.LEE < hitchcar@samsung.com>
 182 +  *
 183 +  ----------------------------------------------------------- */
 184 +
 185 +#ifndef __FIMC20_CAMERA_H__
 186 +#define __FIMC20_CAMERA_H__
 187 +
 188 +
 189 +#ifdef CONFIG_ARCH_S3C24A0
 190 +#define CAM_BASE_ADD             0x48000000
 191 +#else /* S3C2440A */
 192 +#define CAM_BASE_ADD             0x4F000000
 193 +#endif
 194 +
 195 +
 196 +/*
 197 + * CAMERA IP
 198 + * P-port is used as RGB Capturing device which including scale and crop
 199 + *  those who want to see(preview ) the image on display needs RGB image.
 200 + *
 201 + * C-port is used as YCbCr(4:2:0, 4:2:2) Capturing device which including the scale and crop
 202 + *   the prefix of C-port have the meaning of "Codec" ex. mpeg4, h263.. which requries the
 203 +     YCBCB format not RGB
 204 + */
 205 +
 206 +#define CISRCFMT            __REG(CAM_BASE_ADD+0x00) // RW Input Source Format
 207 +#define CIWDOFST            __REG(CAM_BASE_ADD+0x04) // Window offset register
 208 +#define CIGCTRL             __REG(CAM_BASE_ADD+0x08) // Global control register
 209 +#define CICOYSA0            __REG(CAM_BASE_ADD+0x18) // Y 1 st frame start address
 210 +#define CICOYSA1            __REG(CAM_BASE_ADD+0x1C) // Y 2 nd frame start address
 211 +#define CICOYSA2            __REG(CAM_BASE_ADD+0x20) // Y 3 rd frame start address
 212 +#define CICOYSA3            __REG(CAM_BASE_ADD+0x24) // Y 4 th frame start address
 213 +#define CICOCBSA0           __REG(CAM_BASE_ADD+0x28) // Cb 1 st frame start address
 214 +#define CICOCBSA1           __REG(CAM_BASE_ADD+0x2C) // Cb 2 nd frame start address
 215 +#define CICOCBSA2           __REG(CAM_BASE_ADD+0x30) // Cb 3 rd frame start address
 216 +#define CICOCBSA3           __REG(CAM_BASE_ADD+0x34) // Cb 4 th frame start address
 217 +#define CICOCRSA0           __REG(CAM_BASE_ADD+0x38) // Cr 1 st frame start address
 218 +#define CICOCRSA1           __REG(CAM_BASE_ADD+0x3C) // Cr 2 nd frame start address
 219 +#define CICOCRSA2           __REG(CAM_BASE_ADD+0x40) // Cr 3 rd frame start address
 220 +#define CICOCRSA3           __REG(CAM_BASE_ADD+0x44) // Cr 4 th frame start address
 221 +#define CICOTRGFMT          __REG(CAM_BASE_ADD+0x48) // Target image format of codec
 222 +#define CICOCTRL            __REG(CAM_BASE_ADD+0x4C) // Codec DMA control related
 223 +#define CICOSCPRERATIO      __REG(CAM_BASE_ADD+0x50) // Codec pre-scaler ratio control
 224 +#define CICOSCPREDST        __REG(CAM_BASE_ADD+0x54) // Codec pre-scaler destination
 225 +#define CICOSCCTRL          __REG(CAM_BASE_ADD+0x58) // Codec main-scaler control
 226 +#define CICOTAREA           __REG(CAM_BASE_ADD+0x5C) // Codec pre-scaler destination
 227 +#define CICOSTATUS          __REG(CAM_BASE_ADD+0x64) // Codec path status
 228 +#define CIPRCLRSA0          __REG(CAM_BASE_ADD+0x6C) // RGB 1 st frame start address
 229 +#define CIPRCLRSA1          __REG(CAM_BASE_ADD+0x70) // RGB 2 nd frame start address
 230 +#define CIPRCLRSA2          __REG(CAM_BASE_ADD+0x74) // RGB 3 rd frame start address
 231 +#define CIPRCLRSA3          __REG(CAM_BASE_ADD+0x78) // RGB 4 th frame start address
 232 +#define CIPRTRGFMT          __REG(CAM_BASE_ADD+0x7C) // Target image format of preview
 233 +#define CIPRCTRL            __REG(CAM_BASE_ADD+0x80) // Preview DMA control related
 234 +#define CIPRSCPRERATIO      __REG(CAM_BASE_ADD+0x84) // Preview pre-scaler ratio control
 235 +#define CIPRSCPREDST        __REG(CAM_BASE_ADD+0x88) // Preview pre-scaler destination
 236 +#define CIPRSCCTRL          __REG(CAM_BASE_ADD+0x8C) // Preview main-scaler control
 237 +#define CIPRTAREA           __REG(CAM_BASE_ADD+0x90) // Preview pre-scaler destination
 238 +#define CIPRSTATUS          __REG(CAM_BASE_ADD+0x98) // Preview path status
 239 +#define CIIMGCPT            __REG(CAM_BASE_ADD+0xA0) // Image capture enable command
 240 +
 241 +#define CICOYSA(__x)        __REG(CAM_BASE_ADD+0x18 + (__x)*4 )
 242 +#define CICOCBSA(__x)       __REG(CAM_BASE_ADD+0x28 + (__x)*4 )
 243 +#define CICOCRSA(__x)       __REG(CAM_BASE_ADD+0x38 + (__x)*4 )
 244 +#define CIPRCLRSA(__x)      __REG(CAM_BASE_ADD+0x6C + (__x)*4 )
 245 +
 246 +/* CISRCFMT BitField */
 247 +#define SRCFMT_ITU601       BIT31
 248 +#define SRCFMT_ITU656       0
 249 +#define SRCFMT_UVOFFSET_128 BIT30
 250 +#define fCAM_SIZE_H         Fld(13, 16)
 251 +#define fCAM_SIZE_V         Fld(13, 0)
 252 +#define SOURCE_HSIZE(x)     FInsrt((x), fCAM_SIZE_H)
 253 +#define SOURCE_VSIZE(x)     FInsrt((x), fCAM_SIZE_V)
 254 +
 255 +
 256 +/* Window Option Register */
 257 +#define WINOFEN             BIT31
 258 +#define CO_FIFO_Y           BIT30
 259 +#define CO_FIFO_CB          BIT15
 260 +#define CO_FIFO_CR          BIT14
 261 +#define PR_FIFO_CB          BIT13
 262 +#define PR_FIFO_CR          BIT12
 263 +#define fWINHOR             Fld(11, 16)
 264 +#define fWINVER             Fld(11, 0)
 265 +#define WINHOROFST(x)       FInsrt((x), fWINHOR)
 266 +#define WINVEROFST(x)       FInsrt((x), fWINVER)
 267 +
 268 +/* Global Control Register */
 269 +#define GC_SWRST            BIT31
 270 +#define GC_CAMRST           BIT30
 271 +#define GC_INVPOLPCLK       BIT26
 272 +#define GC_INVPOLVSYNC      BIT25
 273 +#define GC_INVPOLHREF       BIT24
 274 +
 275 +/*--------------------------------------------------
 276 +                REGISTER BIT FIELD DEFINITION TO
 277 +                          YCBCR and RGB
 278 +----------------------------------------------------*/
 279 +/* Codec Target Format Register */
 280 +#define IN_YCBCR420         0
 281 +#define IN_YCBCR422         BIT31
 282 +#define OUT_YCBCR420        0
 283 +#define OUT_YCBCR422        BIT30
 284 +
 285 +#if 0
 286 +#define FLIP_NORMAL        0
 287 +#define FLIP_X              (BIT14)
 288 +#define FLIP_Y              (BIT15)
 289 +#define FLIP_MIRROR         (BIT14|BIT15)
 290 +#endif
 291 +
 292 +/**  BEGIN    ************************************/
 293 +/* Cotents: Common in both P and C port          */
 294 +#define fTARGET_HSIZE       Fld(13,16)
 295 +#define TARGET_HSIZE(x)     FInsrt((x), fTARGET_HSIZE)
 296 +#define fTARGET_VSIZE       Fld(13,0)
 297 +#define TARGET_VSIZE(x)     FInsrt((x), fTARGET_VSIZE)
 298 +#define FLIP_X_MIRROR       BIT14
 299 +#define FLIP_Y_MIRROR       BIT15
 300 +#define FLIP_180_MIRROR     (BIT14 | BIT15)
 301 +/**  END     *************************************/
 302 +
 303 +/* Codec DMA Control Register */
 304 +#define fYBURST_M           Fld(5,19)
 305 +#define fYBURST_R           Fld(5,14)
 306 +#define fCBURST_M           Fld(5,9)
 307 +#define fCBURST_R           Fld(5,4)
 308 +#define YBURST_M(x)         FInsrt((x), fYBURST_M)
 309 +#define CBURST_M(x)         FInsrt((x), fCBURST_M)
 310 +#define YBURST_R(x)         FInsrt((x), fYBURST_R)
 311 +#define CBURST_R(x)         FInsrt((x), fCBURST_R)
 312 +#define LAST_IRQ_EN         BIT2              /* Common in both P and C port */
 313 +/*
 314 + *  Check the done signal of capturing image for JPEG
 315 + *  !!! AutoClear Bit
 316 + */
 317 +
 318 +
 319 +/* (Codec, Preview ) Pre-Scaler Control Register 1 */
 320 +#define fSHIFT              Fld(4,28)
 321 +#define PRE_SHIFT(x)        FInsrt((x), fSHIFT)
 322 +#define fRATIO_H            Fld(7,16)
 323 +#define PRE_HRATIO(x)       FInsrt((x), fRATIO_H)
 324 +#define fRATIO_V            Fld(7,0)
 325 +#define PRE_VRATIO(x)       FInsrt((x), fRATIO_V)
 326 +
 327 +/* (Codec, Preview ) Pre-Scaler Control Register 2*/
 328 +#define fDST_WIDTH          Fld(12,16)
 329 +#define fDST_HEIGHT         Fld(12,0)
 330 +#define PRE_DST_WIDTH(x)    FInsrt((x), fDST_WIDTH)
 331 +#define PRE_DST_HEIGHT(x)   FInsrt((x), fDST_HEIGHT)
 332 +
 333 +
 334 +/* (Codec, Preview) Main-scaler control Register */
 335 +#define S_METHOD            BIT31  /* Sampling method only for P-port */
 336 +#define SCALERSTART         BIT15
 337 +/* Codec scaler bypass for upper 2048x2048
 338 +   where ImgCptEn_CoSC and ImgCptEn_PrSC should be 0
 339 +*/
 340 +
 341 +#define SCALERBYPASS        BIT31
 342 +#define RGB_FMT24           BIT30
 343 +#define RGB_FMT16           0
 344 +
 345 +/*
 346 +#define SCALE_UP_H          BIT29
 347 +#define SCALE_UP_V          BIT28
 348 +*/
 349 +
 350 +#define fMAIN_HRATIO        Fld(9, 16)
 351 +#define MAIN_HRATIO(x)      FInsrt((x), fMAIN_HRATIO)
 352 +
 353 +#define SCALER_START        BIT15
 354 +
 355 +#define fMAIN_VRATIO        Fld(9, 0)
 356 +#define MAIN_VRATIO(x)      FInsrt((x), fMAIN_VRATIO)
 357 +
 358 +/* (Codec, Preview ) DMA Target AREA Register */
 359 +#define fCICOTAREA          Fld(26,0)
 360 +#define TARGET_DMA_AREA(x)  FInsrt((x), fCICOTAREA)
 361 +
 362 +/* Preview DMA Control Register */
 363 +#define fRGBURST_M          Fld(5,19)
 364 +#define fRGBURST_R          Fld(5,14)
 365 +#define RGBURST_M(x)        FInsrt((x), fRGBURST_M)
 366 +#define RGBURST_R(x)        FInsrt((x), fRGBURST_R)
 367 +
 368 +
 369 +/* (Codec, Preview) Status Register */
 370 +#define CO_OVERFLOW_Y       BIT31
 371 +#define CO_OVERFLOW_CB      BIT30
 372 +#define CO_OVERFLOW_CR      BIT29
 373 +#define PR_OVERFLOW_CB      BIT31
 374 +#define PR_OVERFLOW_CR      BIT30
 375 +
 376 +#define VSYNC               BIT28
 377 +
 378 +#define fFRAME_CNT          Fld(2,26)
 379 +#define FRAME_CNT(x)        FExtr((x),fFRAME_CNT)
 380 +
 381 +#define WIN_OFF_EN          BIT25
 382 +#define fFLIP_MODE          Fld(2,23)
 383 +#define FLIP_MODE(x)        EExtr((x), fFLIP_MODE)
 384 +#define CAP_STATUS_CAMIF    BIT22
 385 +#define CAP_STATUS_CODEC    BIT21
 386 +#define CAP_STATUS_PREVIEW  BIT21
 387 +#define VSYNC_A             BIT20
 388 +#define VSYNC_B             BIT19
 389 +
 390 +/* Image Capture Enable Regiser */
 391 +#define        CAMIF_CAP_ON         BIT31
 392 +#define CAMIF_CAP_CODEC_ON   BIT30
 393 +#define CAMIF_CAP_PREVIEW_ON BIT29
 394 +
 395 +
 396 +
 397 +
 398 +#endif /* S3C2440_CAMER_H */
 399 diff --git a/arch/arm/mach-s3c2440/camera/camif.c b/arch/arm/mach-s3c2440/camera/camif.c
 400 new file mode 100644
 401 index 0000000..36d4ccc
 402 --- /dev/null
 403 +++ b/arch/arm/mach-s3c2440/camera/camif.c
 404 @@ -0,0 +1,978 @@
 405 +/*
 406 + *   Copyright (C) 2004 Samsung Electronics
 407 + *       SW.LEE <hitchcar@samsung.com>
 408 + *
 409 + * This file is subject to the terms and conditions of the GNU General Public
 410 + * License 2. See the file COPYING in the main directory of this archive
 411 + * for more details.
 412 + */
 413 +
 414 +#include <linux/config.h>
 415 +#include <linux/module.h>
 416 +#include <linux/kernel.h>
 417 +#include <linux/init.h>
 418 +#include <linux/sched.h>
 419 +#include <linux/irq.h>
 420 +#include <linux/tqueue.h>
 421 +#include <linux/locks.h>
 422 +#include <linux/completion.h>
 423 +#include <linux/delay.h>
 424 +#include <linux/slab.h>
 425 +#include <linux/vmalloc.h>
 426 +#include <linux/miscdevice.h>
 427 +#include <linux/wait.h>
 428 +#include <linux/miscdevice.h>
 429 +#include <asm/io.h>
 430 +#include <asm/semaphore.h>
 431 +#include <asm/hardware.h>
 432 +#include <asm/uaccess.h>
 433 +
 434 +#ifdef CONFIG_ARCH_S3C24A0A
 435 +#include <asm/arch/S3C24A0.h>
 436 +#include <asm/arch/clocks.h>
 437 +#else
 438 +#include <asm/arch/S3C2440.h>
 439 +#include <asm/arch/clocks.h>
 440 +#endif
 441 +
 442 +#include "cam_reg.h"
 443 +//#define SW_DEBUG
 444 +#include "camif.h"
 445 +#include "videodev.h"
 446 +#include "miscdevice.h"
 447 +
 448 +
 449 +static int camif_dma_burst(camif_cfg_t *);
 450 +static int camif_scaler(camif_cfg_t *);
 451 +
 452 +static const char *camif_version =
 453 +        "$Id: camif.c,v 1.10 2004/06/04 04:24:14 swlee Exp $";
 454 +
 455 +/* For SXGA Image */
 456 +#define RESERVE_MEM  15*1024*1024
 457 +#define YUV_MEM      10*1024*1024
 458 +#define RGB_MEM      (RESERVE_MEM - YUV_MEM)
 459 +
 460 +static int camif_malloc(camif_cfg_t *cfg)
 461 +{
 462 +       unsigned int t_size;
 463 +       unsigned int daon = cfg->target_x *cfg->target_y;
 464 +
 465 +       if(cfg->dma_type & CAMIF_CODEC) {
 466 +               if (cfg->fmt & CAMIF_OUT_YCBCR420) {
 467 +                       t_size = daon * 3 / 2 ;
 468 +               }
 469 +               else  { t_size = daon * 2; /* CAMIF_OUT_YCBCR422 */ }
 470 +               t_size = t_size *cfg->pp_num;
 471 +
 472 +#ifndef SAMSUNG_SXGA_CAM
 473 +               cfg->pp_virt_buf = consistent_alloc(GFP_KERNEL, t_size, &cfg->pp_phys_buf);
 474 +#else
 475 +               printk(KERN_INFO "Reserving High RAM Addresses \n");
 476 +               cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM);
 477 +               cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf,YUV_MEM);
 478 +#endif
 479 +
 480 +               if ( !cfg->pp_virt_buf ) {
 481 +                       printk(KERN_ERR"CAMERA:Failed to request YCBCR MEM\n");
 482 +                       return -ENOMEM;
 483 +               }
 484 +               memset(cfg->pp_virt_buf, 0, t_size);
 485 +               cfg->pp_totalsize = t_size;
 486 +               return 0;
 487 +       }
 488 +       if ( cfg->dma_type & CAMIF_PREVIEW ) {
 489 +               if (cfg->fmt & CAMIF_RGB16)
 490 +                       t_size = daon * 2; /*  4byte per two pixel*/
 491 +               else {
 492 +                       assert(cfg->fmt & CAMIF_RGB24);
 493 +                       t_size = daon * 4; /* 4byte per one pixel */
 494 +               }
 495 +               t_size = t_size * cfg->pp_num;
 496 +#ifndef SAMSUNG_SXGA_CAM
 497 +               cfg->pp_virt_buf = consistent_alloc(GFP_KERNEL, t_size, &cfg->pp_phys_buf);
 498 +#else
 499 +               printk(KERN_INFO "Reserving High RAM Addresses \n");
 500 +               cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM ) + YUV_MEM;
 501 +               cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf,RGB_MEM);
 502 +#endif
 503 +               if ( !cfg->pp_virt_buf ) {
 504 +                       printk(KERN_ERR"CAMERA:Failed to request RGB MEM\n");
 505 +                       return -ENOMEM;
 506 +               }
 507 +               memset(cfg->pp_virt_buf, 0, t_size);
 508 +               cfg->pp_totalsize = t_size;
 509 +               return 0;
 510 +       }
 511 +
 512 +       return 0;               /* Never come. */
 513 +}
 514 +
 515 +static int camif_demalloc(camif_cfg_t *cfg)
 516 +{
 517 +#ifndef SAMSUNG_SXGA_CAM
 518 +       if ( cfg->pp_virt_buf ) {
 519 +               consistent_free(cfg->pp_virt_buf,cfg->pp_totalsize,cfg->pp_phys_buf);
 520 +               cfg->pp_virt_buf = 0;
 521 +       }
 522 +#else
 523 +       iounmap(cfg->pp_virt_buf);
 524 +       cfg->pp_virt_buf = 0;
 525 +#endif
 526 +       return 0;
 527 +}
 528 +
 529 +/*
 530 + * advise a person to use this func in ISR
 531 + * index value indicates the next frame count to be used
 532 + */
 533 +int camif_g_frame_num(camif_cfg_t *cfg)
 534 +{
 535 +       int index = 0;
 536 +
 537 +       if (cfg->dma_type & CAMIF_CODEC ) {
 538 +               index = FRAME_CNT(CICOSTATUS);
 539 +               DPRINTK("CAMIF_CODEC frame %d \n", index);
 540 +       }
 541 +       else {
 542 +               assert(cfg->dma_type & CAMIF_PREVIEW );
 543 +               index = FRAME_CNT(CIPRSTATUS);
 544 +               DPRINTK("CAMIF_PREVIEW frame %d  0x%08X \n", index, CIPRSTATUS);
 545 +       }
 546 +       cfg->now_frame_num = (index + 2) % 4; /* When 4 PingPong */
 547 +       return index; /* meaningless */
 548 +}
 549 +
 550 +static int camif_pp_codec(camif_cfg_t *cfg)
 551 +{
 552 +       u32 i, c_size; /* Cb,Cr size */
 553 +       u32 one_p_size;
 554 +       u32 daon = cfg->target_x * cfg->target_y;
 555 +       if (cfg->fmt & CAMIF_OUT_YCBCR420) {
 556 +               c_size = daon /4;
 557 +       }
 558 +       else {
 559 +               assert(cfg->fmt & CAMIF_OUT_YCBCR422);
 560 +               c_size = daon /2;
 561 +       }
 562 +       switch ( cfg->pp_num ) {
 563 +               case 1 :
 564 +                       for ( i =0 ; i < 4; i=i+1) {
 565 +                               cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
 566 +                               cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
 567 +                               cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon;
 568 +                               cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon;
 569 +                               cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size;
 570 +                               cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size;
 571 +                               CICOYSA(i)  =  cfg->img_buf[i].phys_y;
 572 +                               CICOCBSA(i) =  cfg->img_buf[i].phys_cb;
 573 +                               CICOCRSA(i) =  cfg->img_buf[i].phys_cr;
 574 +                       }
 575 +                       break;
 576 +               case 2:
 577 +#define  TRY   (( i%2 ) ? 1 :0)
 578 +                       one_p_size = daon + 2*c_size;
 579 +                       for (i = 0; i < 4  ; i++) {
 580 +                               cfg->img_buf[i].virt_y = cfg->pp_virt_buf + TRY * one_p_size;
 581 +                               cfg->img_buf[i].phys_y = cfg->pp_phys_buf + TRY * one_p_size;
 582 +                               cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + TRY * one_p_size;
 583 +                               cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + TRY * one_p_size;
 584 +                               cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + TRY * one_p_size;
 585 +                               cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + TRY * one_p_size;
 586 +                               CICOYSA(i)  = cfg->img_buf[i].phys_y;
 587 +                               CICOCBSA(i) = cfg->img_buf[i].phys_cb;
 588 +                               CICOCRSA(i) = cfg->img_buf[i].phys_cr;
 589 +                       }
 590 +                       break;
 591 +               case 4:
 592 +                       one_p_size = daon + 2*c_size;
 593 +                       for (i = 0; i < 4 ; i++) {
 594 +                               cfg->img_buf[i].virt_y = cfg->pp_virt_buf + i * one_p_size;
 595 +                               cfg->img_buf[i].phys_y = cfg->pp_phys_buf + i * one_p_size;
 596 +                               cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + i * one_p_size;
 597 +                               cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + i * one_p_size;
 598 +                               cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + i * one_p_size;
 599 +                               cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + i * one_p_size;
 600 +                               CICOYSA(i)  =  cfg->img_buf[i].phys_y;
 601 +                               CICOCBSA(i) =  cfg->img_buf[i].phys_cb;
 602 +                               CICOCRSA(i) =  cfg->img_buf[i].phys_cr;
 603 +                       }
 604 +                       break;
 605 +               default:
 606 +                       printk("Invalid PingPong Number %d \n",cfg->pp_num);
 607 +                       panic("halt\n");
 608 +       }
 609 +       return 0;
 610 +}
 611 +
 612 +/* RGB Buffer Allocation */
 613 +static int camif_pp_preview(camif_cfg_t *cfg)
 614 +{
 615 +       int i;
 616 +       u32 daon = cfg->target_x * cfg->target_y;
 617 +
 618 +       if(cfg->fmt & CAMIF_RGB24)
 619 +               daon = daon * 4 ;
 620 +       else {
 621 +               assert (cfg->fmt & CAMIF_RGB16);
 622 +               daon = daon *2;
 623 +       }
 624 +       switch ( cfg->pp_num ) {
 625 +               case 1:
 626 +                       for ( i = 0; i < 4 ; i++ ) {
 627 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf ;
 628 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf ;
 629 +                               CIPRCLRSA(i) = cfg->img_buf[i].phys_rgb;
 630 +                       }
 631 +                       break;
 632 +               case 2:
 633 +                       for ( i = 0; i < 4 ; i++) {
 634 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + TRY * daon;
 635 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + TRY * daon;
 636 +                               CIPRCLRSA(i) = cfg->img_buf[i].phys_rgb;
 637 +                       }
 638 +                       break;
 639 +               case 4:
 640 +                       for ( i = 0; i < 4 ; i++) {
 641 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * daon;
 642 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * daon;
 643 +                               CIPRCLRSA(i) = cfg->img_buf[i].phys_rgb;
 644 +                       }
 645 +                       break;
 646 +               default:
 647 +                       printk("Invalid PingPong Number %d \n",cfg->pp_num);
 648 +                       panic("halt\n");
 649 +       }
 650 +       return 0;
 651 +}
 652 +
 653 +static int camif_pingpong(camif_cfg_t *cfg)
 654 +{
 655 +       if (cfg->dma_type & CAMIF_CODEC ) {
 656 +               camif_pp_codec(cfg);
 657 +       }
 658 +
 659 +       if ( cfg->dma_type & CAMIF_PREVIEW) {
 660 +               camif_pp_preview(cfg);
 661 +       }
 662 +       return 0;
 663 +}
 664 +
 665 +
 666 +/***********       Image Convert *******************************/
 667 +/*  Return Format
 668 + *  Supported by Hardware
 669 + *  V4L2_PIX_FMT_YUV420,
 670 + *  V4L2_PIX_FMT_YUV422P,
 671 + *  V4L2_PIX_FMT_BGR32 (BGR4)
 672 + * -----------------------------------
 673 + *  V4L2_PIX_FMT_RGB565(X)
 674 + *  Currenly 2byte --> BGR656 Format
 675 + *  S3C2440A,S3C24A0 supports vairants with reversed FMT_RGB565
 676 +    i.e  blue toward the least, red towards the most significant bit
 677 +    --  by SW.LEE
 678 + */
 679 +
 680 +
 681 +/*
 682 + * After calling camif_g_frame_num,
 683 + * this func must be called
 684 + */
 685 +u8 * camif_g_frame(camif_cfg_t *cfg)
 686 +{
 687 +       u8 * ret = NULL;
 688 +       int cnt = cfg->now_frame_num;
 689 +
 690 +       if(cfg->dma_type & CAMIF_PREVIEW) {
 691 +               ret = cfg->img_buf[cnt].virt_rgb;
 692 +       }
 693 +       if (cfg->dma_type & CAMIF_CODEC) {
 694 +               ret = cfg->img_buf[cnt].virt_y;
 695 +       }
 696 +       return ret;
 697 +}
 698 +
 699 +/* This function must be called in module initial time */
 700 +static int camif_source_fmt(camif_gc_t *gc)
 701 +{
 702 +       u32 cmd = 0;
 703 +
 704 +       /* Configure CISRCFMT --Source Format */
 705 +       if (gc->itu_fmt & CAMIF_ITU601) {
 706 +               cmd = CAMIF_ITU601;
 707 +       }
 708 +       else {
 709 +               assert ( gc->itu_fmt & CAMIF_ITU656);
 710 +               cmd = CAMIF_ITU656;
 711 +       }
 712 +       cmd  |= SOURCE_HSIZE(gc->source_x)| SOURCE_VSIZE(gc->source_y);
 713 +       /* Order422 */
 714 +       cmd |=  gc->order422;
 715 +       CISRCFMT = cmd;
 716 +
 717 +       return 0 ;
 718 +}
 719 +
 720 +
 721 +/*
 722 + * Codec Input YCBCR422 will be Fixed
 723 + */
 724 +static int camif_target_fmt(camif_cfg_t *cfg)
 725 +{
 726 +       u32 cmd = 0;
 727 +
 728 +       if (cfg->dma_type & CAMIF_CODEC) {
 729 +               /* YCBCR setting */
 730 +               cmd = TARGET_HSIZE(cfg->target_x)| TARGET_VSIZE(cfg->target_y);
 731 +               if ( cfg->fmt & CAMIF_OUT_YCBCR420 ) {
 732 +                       cmd |= OUT_YCBCR420|IN_YCBCR422;
 733 +               }
 734 +               else {
 735 +                       assert(cfg->fmt & CAMIF_OUT_YCBCR422);
 736 +                       cmd |= OUT_YCBCR422|IN_YCBCR422;
 737 +               }
 738 +               CICOTRGFMT = cmd | cfg->flip;
 739 +       }
 740 +       else {
 741 +               assert(cfg->dma_type & CAMIF_PREVIEW);
 742 +               CIPRTRGFMT =
 743 +                       TARGET_HSIZE(cfg->target_x)|TARGET_VSIZE(cfg->target_y)|cfg->flip;
 744 +       }
 745 +       return 0;
 746 +}
 747 +
 748 +void camif_change_flip(camif_cfg_t *cfg)
 749 +{
 750 +       u32 cmd = 0;
 751 +
 752 +       if (cfg->dma_type & CAMIF_CODEC ) {
 753 +               /* YCBCR setting */
 754 +               cmd  = CICOTRGFMT;
 755 +               cmd &= ~(BIT14|BIT15); /* Clear FLIP Mode */
 756 +               cmd |= cfg->flip;
 757 +               CICOTRGFMT = cmd;
 758 +       }
 759 +       else {
 760 +               cmd  = CIPRTRGFMT;
 761 +               cmd &= ~(BIT14|BIT15);
 762 +               cmd |= cfg->flip;
 763 +               CICOTRGFMT = cmd;
 764 +       }
 765 +}
 766 +
 767 +
 768 +
 769 +/* Must:
 770 + * Before calling this function,
 771 + * you must use "camif_dynamic_open"
 772 + * If you want to enable both CODEC and preview
 773 + *  you must do it at the same time.
 774 + */
 775 +int camif_capture_start(camif_cfg_t *cfg)
 776 +{
 777 +       u32 n_cmd = 0;          /* Next Command */
 778 +
 779 +       switch(cfg->exec) {
 780 +               case CAMIF_BOTH_DMA_ON:
 781 +                       camif_reset(CAMIF_RESET,0); /* Flush Camera Core Buffer */
 782 +                       CIPRSCCTRL |= SCALERSTART;
 783 +                       CICOSCCTRL |= SCALERSTART;
 784 +                       n_cmd = CAMIF_CAP_PREVIEW_ON|CAMIF_CAP_CODEC_ON;
 785 +                       break;
 786 +               case CAMIF_DMA_ON:
 787 +                       camif_reset(CAMIF_RESET,0); /* Flush Camera Core Buffer */
 788 +                       if (cfg->dma_type&CAMIF_CODEC) {
 789 +                               CICOSCCTRL |= SCALERSTART;
 790 +                               n_cmd = CAMIF_CAP_CODEC_ON;
 791 +                       }else {
 792 +                               CIPRSCCTRL |= SCALERSTART;
 793 +                               n_cmd = CAMIF_CAP_PREVIEW_ON;
 794 +                       }
 795 +
 796 +                       /* wait until Sync Time expires */
 797 +                       /* First settting, to wait VSYNC fall  */
 798 +                       /* By VESA spec,in 640x480 @60Hz
 799 +                          MAX Delay Time is around 64us which "while" has.*/
 800 +                       while(VSYNC & CICOSTATUS);
 801 +                       break;
 802 +               default:
 803 +                       break;
 804 +       }
 805 +       CIIMGCPT = n_cmd|CAMIF_CAP_ON;
 806 +       return 0;
 807 +}
 808 +
 809 +
 810 +int camif_capture_stop(camif_cfg_t *cfg)
 811 +{
 812 +       u32 n_cmd = CIIMGCPT;   /* Next Command */
 813 +
 814 +       switch(cfg->exec) {
 815 +               case CAMIF_BOTH_DMA_OFF:
 816 +                       CIPRSCCTRL &= ~SCALERSTART;
 817 +                       CICOSCCTRL &= ~SCALERSTART;
 818 +                       n_cmd = 0;
 819 +                       break;
 820 +               case CAMIF_DMA_OFF_L_IRQ: /* fall thru */
 821 +               case CAMIF_DMA_OFF:
 822 +                       if (cfg->dma_type&CAMIF_CODEC) {
 823 +                               CICOSCCTRL &= ~SCALERSTART;
 824 +                               n_cmd &= ~CAMIF_CAP_CODEC_ON;
 825 +                               if (!(n_cmd & CAMIF_CAP_PREVIEW_ON))
 826 +                                       n_cmd = 0;
 827 +                       }else {
 828 +                               CIPRSCCTRL &= ~SCALERSTART;
 829 +                               n_cmd &= ~CAMIF_CAP_PREVIEW_ON;
 830 +                               if (!(n_cmd & CAMIF_CAP_CODEC_ON))
 831 +                                       n_cmd = 0;
 832 +                       }
 833 +                       break;
 834 +               default:
 835 +                       panic("Unexpected \n");
 836 +       }
 837 +       CIIMGCPT = n_cmd;
 838 +       if(cfg->exec == CAMIF_DMA_OFF_L_IRQ) { /* Last IRQ  */
 839 +               if (cfg->dma_type & CAMIF_CODEC)
 840 +                       CICOCTRL |= LAST_IRQ_EN;
 841 +               else
 842 +                       CIPRCTRL |= LAST_IRQ_EN;
 843 +       }
 844 +#if 0
 845 +       else {                          /* to make internal state machine of CAMERA stop */
 846 +               camif_reset(CAMIF_RESET, 0);
 847 +       }
 848 +#endif
 849 +       return 0;
 850 +}
 851 +
 852 +
 853 +/* LastIRQEn is autoclear */
 854 +void camif_last_irq_en(camif_cfg_t *cfg)
 855 +{
 856 +       if(cfg->exec == CAMIF_BOTH_DMA_ON) {
 857 +               CIPRCTRL |= LAST_IRQ_EN;
 858 +               CICOCTRL |= LAST_IRQ_EN;
 859 +       }
 860 +       else {
 861 +               if (cfg->dma_type & CAMIF_CODEC)
 862 +                       CICOCTRL |= LAST_IRQ_EN;
 863 +               else
 864 +                       CIPRCTRL |= LAST_IRQ_EN;
 865 +       }
 866 +}
 867 +
 868 +static int
 869 +camif_scaler_internal(u32 srcWidth, u32 dstWidth, u32 *ratio, u32 *shift)
 870 +{
 871 +       if(srcWidth>=64*dstWidth){
 872 +               printk(KERN_ERR"CAMERA:out of prescaler range: srcWidth /dstWidth = %d(< 64)\n",
 873 +                        srcWidth/dstWidth);
 874 +               return 1;
 875 +       }
 876 +       else if(srcWidth>=32*dstWidth){
 877 +               *ratio=32;
 878 +               *shift=5;
 879 +       }
 880 +       else if(srcWidth>=16*dstWidth){
 881 +               *ratio=16;
 882 +               *shift=4;
 883 +       }
 884 +       else if(srcWidth>=8*dstWidth){
 885 +               *ratio=8;
 886 +               *shift=3;
 887 +       }
 888 +       else if(srcWidth>=4*dstWidth){
 889 +               *ratio=4;
 890 +               *shift=2;
 891 +       }
 892 +       else if(srcWidth>=2*dstWidth){
 893 +               *ratio=2;
 894 +               *shift=1;
 895 +       }
 896 +       else {
 897 +               *ratio=1;
 898 +               *shift=0;
 899 +       }
 900 +       return 0;
 901 +}
 902 +
 903 +
 904 +int camif_g_fifo_status(camif_cfg_t *cfg)
 905 +{
 906 +       u32 reg;
 907 +
 908 +       if (cfg->dma_type & CAMIF_CODEC) {
 909 +               u32 flag = CO_OVERFLOW_Y|CO_OVERFLOW_CB|CO_OVERFLOW_CR;
 910 +               reg = CICOSTATUS;
 911 +               if (reg & flag) {
 912 +                       printk("CODEC: FIFO error(0x%08x) and corrected\n",reg);
 913 +                       /* FIFO Error Count ++  */
 914 +                       CIWDOFST |= CO_FIFO_Y|CO_FIFO_CB|CO_FIFO_CR;
 915 +                       CIWDOFST &= ~(CO_FIFO_Y|CO_FIFO_CB|CO_FIFO_CR);
 916 +                       return 1; /* Error */
 917 +               }
 918 +       }
 919 +       if (cfg->dma_type & CAMIF_PREVIEW) {
 920 +               u32 flag = PR_OVERFLOW_CB|PR_OVERFLOW_CR;
 921 +               reg = CIPRSTATUS;
 922 +               if (reg & flag) {
 923 +                       printk("PREVIEW:FIFO error(0x%08x) and corrected\n",reg);
 924 +                       CIWDOFST |= PR_FIFO_CB|PR_FIFO_CR;
 925 +                       CIWDOFST &= ~(CO_FIFO_Y|CO_FIFO_CB|CO_FIFO_CR);
 926 +                       /* FIFO Error Count ++  */
 927 +                       return 1; /* Error */
 928 +               }
 929 +       }
 930 +       return 0;               /* No Error */
 931 +}
 932 +
 933 +
 934 +/* Policy:
 935 + * if codec or preview define the win offset,
 936 + *    other must follow that value.
 937 + */
 938 +int camif_win_offset(camif_gc_t *gc )
 939 +{
 940 +       u32 h = gc->win_hor_ofst;
 941 +       u32 v = gc->win_ver_ofst;
 942 +
 943 +       /*Clear Overflow */
 944 +       CIWDOFST = CO_FIFO_Y|CO_FIFO_CB|CO_FIFO_CR|PR_FIFO_CB|PR_FIFO_CB;
 945 +       CIWDOFST = 0;           /* ? Dummy */
 946 +       if (!h && !v)   {
 947 +               CIWDOFST = 0;
 948 +               return 0;
 949 +       }
 950 +       CIWDOFST = WINOFEN | WINHOROFST(h) | WINVEROFST(v);
 951 +       return 0;
 952 +}
 953 +
 954 +/*
 955 + * when you change the resolution in a specific camera,
 956 + * sometimes, it is necessary to change the polarity
 957 + *                                       -- SW.LEE
 958 + */
 959 +static void camif_polarity(camif_gc_t *gc)
 960 +{
 961 +       u32 cmd = CIGCTRL;
 962 +
 963 +       cmd = cmd & ~(BIT26|BIT25|BIT24); /* clear polarity */
 964 +       if (gc->polarity_pclk)
 965 +               cmd |= GC_INVPOLPCLK;
 966 +       if (gc->polarity_vsync)
 967 +               cmd |= GC_INVPOLVSYNC;
 968 +       if (gc->polarity_href)
 969 +               cmd |= GC_INVPOLHREF;
 970 +       CIGCTRL |= cmd;
 971 +}
 972 +
 973 +
 974 +int camif_dynamic_open(camif_cfg_t *cfg)
 975 +{
 976 +       camif_win_offset(cfg->gc);
 977 +       camif_polarity(cfg->gc);
 978 +
 979 +       if(camif_scaler(cfg)) {
 980 +               printk(KERN_ERR "CAMERA:Preview Scaler, Change WinHorOfset or Target Size\n");
 981 +               return 1;
 982 +       }
 983 +       camif_target_fmt(cfg);
 984 +       if (camif_dma_burst(cfg)) {
 985 +               printk(KERN_ERR "CAMERA:DMA Busrt Length Error \n");
 986 +               return 1;
 987 +       }
 988 +       if(camif_malloc(cfg) ) {
 989 +               printk(KERN_ERR "    Instead of using consistent_alloc()\n"
 990 +                               "    lease use dedicated memory allocation for DMA memory\n");
 991 +               return -1;
 992 +       }
 993 +       camif_pingpong(cfg);
 994 +       return 0;
 995 +}
 996 +
 997 +int camif_dynamic_close(camif_cfg_t *cfg)
 998 +{
 999 +       camif_demalloc(cfg);
1000 +       return 0;
1001 +}
1002 +
1003 +static int camif_target_area(camif_cfg_t *cfg)
1004 +{
1005 +       u32 rect = cfg->target_x * cfg->target_y;
1006 +       if (cfg->dma_type & CAMIF_CODEC ) {
1007 +               CICOTAREA = rect;
1008 +       }
1009 +       if (cfg->dma_type & CAMIF_PREVIEW) {
1010 +               CIPRTAREA = rect;
1011 +       }
1012 +       return 0;
1013 +}
1014 +
1015 +static int inline camif_hw_reg(camif_cfg_t *cfg)
1016 +{
1017 +       u32 cmd = 0;
1018 +
1019 +       if (cfg->dma_type & CAMIF_CODEC) {
1020 +               CICOSCPRERATIO = PRE_SHIFT(cfg->sc.shfactor)
1021 +                       |PRE_HRATIO(cfg->sc.prehratio)|PRE_VRATIO(cfg->sc.prevratio);
1022 +               CICOSCPREDST =
1023 +                       PRE_DST_WIDTH(cfg->sc.predst_x)|PRE_DST_HEIGHT(cfg->sc.predst_y);
1024 +
1025 +               /* Differ from Preview */
1026 +               if (cfg->sc.scalerbypass)
1027 +                       cmd |= SCALERBYPASS;
1028 +               if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
1029 +                       cmd |= BIT30|BIT29;
1030 +               CICOSCCTRL = cmd | MAIN_HRATIO(cfg->sc.mainhratio)
1031 +                       |MAIN_VRATIO(cfg->sc.mainvratio);
1032 +               return 0;
1033 +       }
1034 +       else if (cfg->dma_type & CAMIF_PREVIEW) {
1035 +               CIPRSCPRERATIO = PRE_SHIFT(cfg->sc.shfactor)
1036 +                       |PRE_HRATIO(cfg->sc.prehratio)|PRE_VRATIO(cfg->sc.prevratio);
1037 +               CIPRSCPREDST =
1038 +                       PRE_DST_WIDTH(cfg->sc.predst_x)|PRE_DST_HEIGHT(cfg->sc.predst_y);
1039 +               /* Differ from Codec */
1040 +               if (cfg->fmt & CAMIF_RGB24) {
1041 +                       cmd |= RGB_FMT24;
1042 +               }
1043 +               else {
1044 +                       /* RGB16 */;
1045 +               }
1046 +               if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
1047 +                       cmd |= BIT29|BIT28;
1048 +               CIPRSCCTRL = cmd |MAIN_HRATIO(cfg->sc.mainhratio)|S_METHOD
1049 +                       |MAIN_VRATIO(cfg->sc.mainvratio);
1050 +       }else {
1051 +               panic("CAMERA:DMA_TYPE Wrong \n");
1052 +       }
1053 +
1054 +       return 0;
1055 +}
1056 +
1057 +
1058 +/* Configure Pre-scaler control  & main scaler control register */
1059 +static int camif_scaler(camif_cfg_t *cfg)
1060 +{
1061 +       int tx = cfg->target_x,ty=cfg->target_y;
1062 +       int sx, sy;
1063 +
1064 +       if (tx <= 0 || ty<= 0)  panic("CAMERA: Invalid target size \n");
1065 +
1066 +       sx = cfg->gc->source_x - 2*cfg->gc->win_hor_ofst;
1067 +       sy = cfg->gc->source_y - 2*cfg->gc->win_ver_ofst;
1068 +       if (sx <= 0 || sy<= 0)  panic("CAMERA: Invalid source size \n");
1069 +       cfg->sc.modified_src_x = sx;
1070 +       cfg->sc.modified_src_y = sy;
1071 +
1072 +       /* Pre-scaler control register 1 */
1073 +       camif_scaler_internal(sx,tx,&cfg->sc.prehratio,&cfg->sc.hfactor);
1074 +       camif_scaler_internal(sy,ty,&cfg->sc.prevratio,&cfg->sc.vfactor);
1075 +
1076 +       if (cfg->dma_type & CAMIF_PREVIEW) {
1077 +               if ( (sx /cfg->sc.prehratio) <= 640 ) {}
1078 +               else {
1079 +                       printk(KERN_INFO "CAMERA: Internal Preview line buffer is 640 pixels\n");
1080 +                       return 1; /* Error */
1081 +               }
1082 +       }
1083 +
1084 +       cfg->sc.shfactor = 10-(cfg->sc.hfactor+cfg->sc.vfactor);
1085 +       /* Pre-scaler control register 2 */
1086 +       cfg->sc.predst_x = sx / cfg->sc.prehratio;
1087 +       cfg->sc.predst_y = sy / cfg->sc.prevratio;
1088 +
1089 +       /* Main-scaler control register */
1090 +       cfg->sc.mainhratio = (sx << 8)/(tx << cfg->sc.hfactor);
1091 +       cfg->sc.mainvratio = (sy << 8)/(ty << cfg->sc.vfactor);
1092 +       DPRINTK(" sx %d, sy %d tx %d ty %d  \n",sx,sy,tx,ty);
1093 +       DPRINTK(" hfactor %d  vfactor %d \n",cfg->sc.hfactor,cfg->sc.vfactor);
1094 +
1095 +       cfg->sc.scaleup_h  = (sx <= tx) ? 1: 0;
1096 +       cfg->sc.scaleup_v  = (sy <= ty) ? 1: 0;
1097 +       if ( cfg->sc.scaleup_h != cfg->sc.scaleup_v)
1098 +               printk(KERN_ERR "scaleup_h must be same to scaleup_v \n");
1099 +       camif_hw_reg(cfg);
1100 +       camif_target_area(cfg);
1101 +       return 0;
1102 +}
1103 +
1104 +/******************************************************
1105 + CalculateBurstSize - Calculate the busrt lengths
1106 + Description:
1107 + - dstHSize: the number of the byte of H Size.
1108 +********************************************************/
1109 +static void camif_g_bsize(u32 hsize, u32 *mburst, u32 *rburst)
1110 +{
1111 +       u32 tmp;
1112 +
1113 +       tmp = (hsize/4) % 16;
1114 +       switch(tmp) {
1115 +               case 0:
1116 +                       *mburst=16;
1117 +                       *rburst=16;
1118 +                       break;
1119 +               case 4:
1120 +                       *mburst=16;
1121 +                       *rburst=4;
1122 +                       break;
1123 +               case 8:
1124 +                       *mburst=16;
1125 +                       *rburst=8;
1126 +                       break;
1127 +               default:
1128 +                       tmp=(hsize/4)%8;
1129 +                       switch(tmp) {
1130 +                               case 0:
1131 +                                       *mburst=8;
1132 +                                       *rburst=8;
1133 +                                       break;
1134 +                               case 4:
1135 +                                       *mburst=8;
1136 +                                       *rburst=4;
1137 +                               default:
1138 +                                       *mburst=4;
1139 +                                       tmp=(hsize/4)%4;
1140 +                                       *rburst= (tmp) ? tmp: 4;
1141 +                                       break;
1142 +                       }
1143 +                       break;
1144 +       }
1145 +}
1146 +
1147 +/* SXGA 1028x1024*/
1148 +/* XGA 1024x768 */
1149 +/* SVGA 800x600 */
1150 +/* VGA 640x480 */
1151 +/* CIF 352x288 */
1152 +/* QVGA 320x240 */
1153 +/* QCIF 176x144 */
1154 +/* ret val
1155 +        1 : DMA Size Error
1156 +*/
1157 +#define BURST_ERR 1
1158 +static int camif_dma_burst(camif_cfg_t *cfg)
1159 +{
1160 +       int width = cfg->target_x;
1161 +
1162 +       if (cfg->dma_type & CAMIF_CODEC ) {
1163 +               u32 yburst_m, yburst_r;
1164 +               u32 cburst_m, cburst_r;
1165 +               /* CODEC DMA WIDHT is multiple of 16 */
1166 +               if (width %16 != 0 )  return BURST_ERR;   /* DMA Burst Length Error */
1167 +               camif_g_bsize(width,&yburst_m,&yburst_r);
1168 +               camif_g_bsize(width/2,&cburst_m,&cburst_r);
1169 +               CICOCTRL =YBURST_M(yburst_m)|CBURST_M(cburst_m)
1170 +                       |YBURST_R(yburst_r)|CBURST_R(cburst_r);
1171 +       }
1172 +
1173 +       if (cfg->dma_type & CAMIF_PREVIEW) {
1174 +               u32 rgburst_m, rgburst_r;
1175 +               if(cfg->fmt == CAMIF_RGB24) {
1176 +                       if (width %2 != 0 )  return BURST_ERR;   /* DMA Burst Length Error */
1177 +                       camif_g_bsize(width*4,&rgburst_m,&rgburst_r);
1178 +               }
1179 +               else {          /* CAMIF_RGB16 */
1180 +                       if ((width/2) %2 != 0 )  return BURST_ERR; /* DMA Burst Length Error */
1181 +                       camif_g_bsize(width*2,&rgburst_m,&rgburst_r);
1182 +               }
1183 +                       CIPRCTRL = RGBURST_M(rgburst_m) | RGBURST_R(rgburst_r);
1184 +       }
1185 +       return 0;
1186 +}
1187 +
1188 +static int camif_gpio_init(void)
1189 +{
1190 +#ifdef CONFIG_ARCH_S3C24A0A
1191 +       /* S3C24A0A has the dedicated signal pins for Camera */
1192 +#else
1193 +       set_gpio_ctrl(GPIO_CAMDATA0);
1194 +       set_gpio_ctrl(GPIO_CAMDATA1);
1195 +       set_gpio_ctrl(GPIO_CAMDATA2);
1196 +       set_gpio_ctrl(GPIO_CAMDATA3);
1197 +       set_gpio_ctrl(GPIO_CAMDATA4);
1198 +       set_gpio_ctrl(GPIO_CAMDATA5);
1199 +       set_gpio_ctrl(GPIO_CAMDATA6);
1200 +       set_gpio_ctrl(GPIO_CAMDATA7);
1201 +       set_gpio_ctrl(GPIO_CAMPCLKIN);
1202 +       set_gpio_ctrl(GPIO_CAMVSYNC);
1203 +       set_gpio_ctrl(GPIO_CAMHREF);
1204 +       set_gpio_ctrl(GPIO_CAMPCLKOUT);
1205 +       set_gpio_ctrl(GPIO_CAMRESET);
1206 +#endif
1207 +        return 0;
1208 +}
1209 +
1210 +
1211 +#define ROUND_ADD 0x100000
1212 +
1213 +#ifdef CONFIG_ARCH_S3C24A0A
1214 +int camif_clock_init(camif_gc_t *gc)
1215 +{
1216 +       unsigned int upll, camclk_div, camclk;
1217 +
1218 +       if (!gc) camclk = 24000000;
1219 +       else  {
1220 +               camclk = gc->camclk;
1221 +               if (camclk > 48000000)
1222 +                       printk(KERN_ERR "Wrong Camera Clock\n");
1223 +       }
1224 +
1225 +       CLKCON |= CLKCON_CAM_UPLL | CLKCON_CAM_HCLK;
1226 +       upll = get_bus_clk(GET_UPLL);
1227 +       printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
1228 +       UPLLCON = FInsrt(56, fPLL_MDIV) | FInsrt(2, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
1229 +       upll = get_bus_clk(GET_UPLL);
1230 +
1231 +       camclk_div = (upll+ROUND_ADD) / camclk - 1;
1232 +       CLKDIVN = (CLKDIVN & 0xFF) | CLKDIVN_CAM(camclk_div);
1233 +       printk(KERN_INFO"CAMERA:upll %d MACRO 0x%08X CLKDIVN 0x%08X \n",
1234 +                               upll, CLKDIVN_CAM(camclk_div),CLKDIVN);
1235 +       CIIMGCPT = 0;           /* Dummy ? */
1236 +       return 0;
1237 +}
1238 +#else
1239 +int camif_clock_init(camif_gc_t *gc)
1240 +{
1241 +       unsigned int upll, camclk_div, camclk;
1242 +       if (!gc) camclk = 24000000;
1243 +       else  {
1244 +               camclk = gc->camclk;
1245 +               if (camclk > 48000000)
1246 +                       printk(KERN_ERR "Wrong Camera Clock\n");
1247 +       }
1248 +
1249 +       CLKCON |= CLKCON_CAMIF;
1250 +       upll = elfin_get_bus_clk(GET_UPLL);
1251 +       printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
1252 +       {
1253 +               UPLLCON = FInsrt(60, fPLL_MDIV) | FInsrt(4, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
1254 +               CLKDIVN |= DIVN_UPLL;   /* For USB */
1255 +               upll = elfin_get_bus_clk(GET_UPLL);
1256 +       }
1257 +
1258 +       camclk_div = (upll+ROUND_ADD) /(camclk * 2) -1;
1259 +       CAMDIVN = CAMCLK_SET_DIV|(camclk_div&0xf);
1260 +       printk(KERN_INFO "CAMERA:upll %08d  cam_clk %08d CAMDIVN 0x%08x \n",upll,camclk, CAMDIVN);
1261 +       CIIMGCPT = 0;           /* Dummy ? */
1262 +       return 0;
1263 +}
1264 +#endif
1265 +
1266 +/*
1267 +   Reset Camera IP in CPU
1268 +   Reset External Sensor
1269 + */
1270 +void camif_reset(int is, int delay)
1271 +{
1272 +       switch (is) {
1273 +               case CAMIF_RESET:
1274 +                       CIGCTRL |= GC_SWRST;
1275 +                       mdelay(1);
1276 +                       CIGCTRL &= ~GC_SWRST;
1277 +                       break;
1278 +               case CAMIF_EX_RESET_AH: /*Active High */
1279 +                       CIGCTRL &= ~GC_CAMRST;
1280 +                       udelay(200);
1281 +                       CIGCTRL |= GC_CAMRST;
1282 +                       udelay(delay);
1283 +                       CIGCTRL &= ~GC_CAMRST;
1284 +                       break;
1285 +               case CAMIF_EX_RESET_AL: /*Active Low */
1286 +                       CIGCTRL |=  GC_CAMRST;
1287 +                       udelay(200);
1288 +                       CIGCTRL &= ~GC_CAMRST;
1289 +                       udelay(delay);
1290 +                       CIGCTRL |= GC_CAMRST;
1291 +                       break;
1292 +               default:
1293 +                       break;
1294 +       }
1295 +}
1296 +
1297 +/* For Camera Operation,
1298 + * we can give the high priority to REQ2 of ARBITER1
1299 + */
1300 +
1301 +/* Please move me into proper place
1302 + *  camif_gc_t is not because "rmmod imgsenor" will delete the instance of camif_gc_t
1303 + */
1304 +static u32 old_priority;
1305 +
1306 +static void camif_bus_priority(int flag)
1307 +{
1308 +       if (flag) {
1309 +#ifdef CONFIG_ARCH_S3C24A0A
1310 +               old_priority = PRIORITY0;
1311 +               PRIORITY0 = PRIORITY_I_FIX;
1312 +               PRIORITY1 = PRIORITY_I_FIX;
1313 +
1314 +#else
1315 +               old_priority = PRIORITY;
1316 +               PRIORITY &= ~(3<<7);
1317 +               PRIORITY |=  (1<<7); /* Arbiter 1, REQ2 first */
1318 +               PRIORITY &= ~(1<<1); /* Disable Priority Rotate */
1319 +#endif
1320 +       }
1321 +       else {
1322 +#ifdef CONFIG_ARCH_S3C24A0A
1323 +               PRIORITY0 = old_priority;
1324 +               PRIORITY1 = old_priority;
1325 +#else
1326 +               PRIORITY = old_priority;
1327 +#endif
1328 +       }
1329 +}
1330 +
1331 +static void inline camif_clock_off(void)
1332 +{
1333 +       CIIMGCPT = 0;
1334 +#if defined (CONFIG_ARCH_S3C24A0A)
1335 +       CLKCON &= ~CLKCON_CAM_UPLL;
1336 +       CLKCON &= ~CLKCON_CAM_HCLK;
1337 +#else
1338 +       CLKCON &= ~CLKCON_CAMIF;
1339 +#endif
1340 +}
1341 +
1342 +
1343 +/* Init external image sensor
1344 + *  Before make some value into image senor,
1345 + *  you must set up the pixel clock.
1346 + */
1347 +void camif_setup_sensor(void)
1348 +{
1349 +       camif_reset(CAMIF_RESET, 0);
1350 +       camif_gpio_init();
1351 +       camif_clock_init(NULL);
1352 +/* Sometimes ,Before loading I2C module, we need the reset signal */
1353 +#ifdef CONFIG_ARCH_S3C24A0A
1354 +       camif_reset(CAMIF_EX_RESET_AL,1000);
1355 +#else
1356 +       camif_reset(CAMIF_EX_RESET_AH,1000);
1357 +#endif
1358 +}
1359 +
1360 +void camif_hw_close(camif_cfg_t *cfg)
1361 +{
1362 +       camif_bus_priority(0);
1363 +       camif_clock_off();
1364 +}
1365 +
1366 +void camif_hw_open(camif_gc_t *gc)
1367 +{
1368 +       camif_source_fmt(gc);
1369 +       camif_win_offset(gc);
1370 +       camif_bus_priority(1);
1371 +}
1372 +
1373 +
1374 +
1375 +/*
1376 + * Local variables:
1377 + * tab-width: 8
1378 + *  c-indent-level: 8
1379 + *  c-basic-offset: 8
1380 + *  c-set-style: "K&R"
1381 + * End:
1382 + */
1383 diff --git a/arch/arm/mach-s3c2440/camera/camif.h b/arch/arm/mach-s3c2440/camera/camif.h
1384 new file mode 100644
1385 index 0000000..8b4f9aa
1386 --- /dev/null
1387 +++ b/arch/arm/mach-s3c2440/camera/camif.h
1388 @@ -0,0 +1,304 @@
1389 +/*
1390 +    FIMC2.0  Camera Header File
1391 +
1392 +    Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
1393 +
1394 +       Author : SW.LEE <hitchcar@samsung.com>
1395 +
1396 +    This program is free software; you can redistribute it and/or modify
1397 +    it under the terms of the GNU General Public License as published by
1398 +    the Free Software Foundation; either version 2 of the License, or
1399 +    (at your option) any later version.
1400 +*
1401 +*/
1402 +
1403 +
1404 +#ifndef __FIMC20_CAMIF_H_
1405 +#define __FIMC20_CAMIF_H_
1406 +
1407 +#ifdef __KERNEL__
1408 +
1409 +#include "bits.h"
1410 +#include "videodev.h"
1411 +#include <asm/types.h>
1412 +#include <linux/i2c.h>
1413 +
1414 +#endif  /* __KERNEL__ */
1415 +
1416 +#ifndef O_NONCAP
1417 +#define O_NONCAP O_TRUNC
1418 +#endif
1419 +
1420 +/* Codec or Preview Status */
1421 +#define CAMIF_STARTED         BIT1
1422 +#define CAMIF_STOPPED         BIT2
1423 +#define CAMIF_INT_HAPPEN      BIT3
1424 +
1425 +/* Codec or Preview  : Interrupt FSM */
1426 +#define CAMIF_1nd_INT         BIT7
1427 +#define CAMIF_Xnd_INT         BIT8
1428 +#define CAMIF_Ynd_INT         BIT9
1429 +#define CAMIF_Znd_INT         BIT10
1430 +#define CAMIF_NORMAL_INT      BIT11
1431 +#define CAMIF_DUMMY_INT       BIT12
1432 +#define CAMIF_PENDING_INT     0
1433 +
1434 +
1435 +/* CAMIF RESET Definition */
1436 +#define CAMIF_RESET           BIT0
1437 +#define CAMIF_EX_RESET_AL     BIT1     /* Active Low */
1438 +#define CAMIF_EX_RESET_AH     BIT2     /* Active High */
1439 +
1440 +
1441 +enum camif_itu_fmt {
1442 +       CAMIF_ITU601 = BIT31,
1443 +       CAMIF_ITU656 = 0
1444 +};
1445 +
1446 +/* It is possbie to use two device simultaneously */
1447 +enum camif_dma_type {
1448 +       CAMIF_PREVIEW = BIT0,
1449 +       CAMIF_CODEC   = BIT1,
1450 +};
1451 +
1452 +enum camif_order422 {
1453 +       CAMIF_YCBYCR = 0,
1454 +       CAMIF_YCRYCB = BIT14,
1455 +       CAMIF_CBYCRY = BIT15,
1456 +       CAMIF_CRYCBY = BIT14 | BIT15
1457 +};
1458 +
1459 +enum flip_mode {
1460 +        CAMIF_FLIP   = 0,
1461 +        CAMIF_FLIP_X = BIT14,
1462 +        CAMIF_FLIP_Y = BIT15,
1463 +        CAMIF_FLIP_MIRROR = BIT14 |BIT15,
1464 +};
1465 +
1466 +enum camif_codec_fmt {
1467 +       /* Codec part */
1468 +        CAMIF_IN_YCBCR420  = BIT0, /* Currently IN_YCBCR format fixed */
1469 +        CAMIF_IN_YCBCR422  = BIT1,
1470 +        CAMIF_OUT_YCBCR420 = BIT4,
1471 +        CAMIF_OUT_YCBCR422 = BIT5,
1472 +       /* Preview Part */
1473 +       CAMIF_RGB16        = BIT2,
1474 +       CAMIF_RGB24        = BIT3,
1475 +};
1476 +
1477 +enum camif_capturing {
1478 +        CAMIF_BOTH_DMA_ON  = BIT4,
1479 +       CAMIF_DMA_ON       = BIT3,
1480 +       CAMIF_BOTH_DMA_OFF = BIT1,
1481 +       CAMIF_DMA_OFF      = BIT0,
1482 +       /*------------------------*/
1483 +       CAMIF_DMA_OFF_L_IRQ= BIT5,
1484 +};
1485 +
1486 +typedef struct camif_performance
1487 +{
1488 +       int     frames;
1489 +       int     framesdropped;
1490 +       __u64   bytesin;
1491 +       __u64   bytesout;
1492 +       __u32   reserved[4];
1493 +} camif_perf_t;
1494 +
1495 +
1496 +typedef struct {
1497 +        dma_addr_t  phys_y;
1498 +        dma_addr_t  phys_cb;
1499 +        dma_addr_t  phys_cr;
1500 +        u8          *virt_y;
1501 +        u8          *virt_cb;
1502 +        u8          *virt_cr;
1503 +        dma_addr_t  phys_rgb;
1504 +        u8          *virt_rgb;
1505 +}img_buf_t;
1506 +
1507 +
1508 +/* this structure convers the CIWDOFFST, prescaler, mainscaler */
1509 +typedef struct {
1510 +       u32 modified_src_x;     /* After windows applyed to source_x */
1511 +       u32 modified_src_y;
1512 +       u32 hfactor;
1513 +       u32 vfactor;
1514 +       u32 shfactor;           /* SHfactor = 10 - ( hfactor + vfactor ) */
1515 +       u32 prehratio;
1516 +       u32 prevratio;
1517 +       u32 predst_x;
1518 +       u32 predst_y;
1519 +       u32 scaleup_h;
1520 +       u32 scaleup_v;
1521 +       u32 mainhratio;
1522 +       u32 mainvratio;
1523 +       u32 scalerbypass;       /* only codec */
1524 +} scaler_t;
1525 +
1526 +
1527 +enum v4l2_status {
1528 +        CAMIF_V4L2_INIT    = BIT0,
1529 +        CAMIF_v4L2_DIRTY   = BIT1,
1530 +};
1531 +
1532 +
1533 +/* Global Status Definition */
1534 +#define PWANT2START   BIT0
1535 +#define CWANT2START   BIT1
1536 +#define BOTH_STARTED  (PWANT2START|CWANT2START)
1537 +#define PNOTWORKING   BIT4
1538 +#define C_WORKING     BIT5
1539 +
1540 +typedef struct {
1541 +       struct semaphore         lock;
1542 +        enum camif_itu_fmt       itu_fmt;
1543 +        enum camif_order422      order422;
1544 +       u32                      win_hor_ofst;
1545 +       u32                      win_ver_ofst;
1546 +        u32                      camclk;  /* External Image Sensor Camera Clock */
1547 +        u32                      source_x;
1548 +        u32                      source_y;
1549 +       u32                      polarity_pclk;
1550 +       u32                      polarity_vsync;
1551 +       u32                      polarity_href;
1552 +       struct i2c_client        *sensor;
1553 +       u32                      user; /* MAX 2 (codec, preview) */
1554 +       u32                      old_priority; /* BUS PRIORITY register */
1555 +       u32                      status;
1556 +       u32                      init_sensor;/* initializing sensor */
1557 +       void                     *other;    /* Codec camif_cfg_t */
1558 +       u32                      reset_type;    /* External Sensor Reset  Type */
1559 +       u32                      reset_udelay;
1560 +} camif_gc_t;                  /* gobal control register */
1561 +
1562 +
1563 +/* when  App want to change v4l2 parameter,
1564 + * we instantly store it into v4l2_t v2
1565 + * and then reflect it to hardware
1566 + */
1567 +typedef struct v4l2 {
1568 +       struct v4l2_fmtdesc     *fmtdesc;
1569 +       struct v4l2_pix_format   fmt; /* current pixel format */
1570 +       struct v4l2_input        input;
1571 +        struct video_picture     picture;
1572 +       enum v4l2_status         status;
1573 +       int     used_fmt ;      /* used format index  */
1574 +} v4l2_t;
1575 +
1576 +
1577 +typedef struct camif_c_t {
1578 +        struct video_device      *v;
1579 +       /* V4L2 param only for v4l2 driver */
1580 +       v4l2_t                    v2;
1581 +       camif_gc_t               *gc; /* Common between Codec and Preview */
1582 +       /* logical parameter */
1583 +       wait_queue_head_t        waitq;
1584 +       u32                      status; /* Start/Stop */
1585 +       u32                      fsm; /* Start/Stop */
1586 +       u32                      open_count; /* duplicated */
1587 +       int                      irq;
1588 +       char                     shortname[16];
1589 +        u32                      target_x;
1590 +        u32                      target_y;
1591 +       scaler_t                 sc;
1592 +       enum flip_mode           flip;
1593 +        enum camif_dma_type      dma_type;
1594 +       /* 4 pingpong Frame memory */
1595 +        u8                       *pp_virt_buf;
1596 +        dma_addr_t               pp_phys_buf;
1597 +        u32                      pp_totalsize;
1598 +       u32                      pp_num; /* used pingpong memory number */
1599 +        img_buf_t                img_buf[4];
1600 +        enum camif_codec_fmt     fmt;
1601 +        enum camif_capturing     exec;
1602 +       camif_perf_t             perf;
1603 +       u32                      now_frame_num;
1604 +       u32                      auto_restart; /* Only For Preview */
1605 +} camif_cfg_t;
1606 +
1607 +#ifdef SW_DEBUG
1608 +#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
1609 +#else
1610 +#define DPRINTK(fmt, args...)
1611 +#endif
1612 +
1613 +
1614 +#ifdef SW_DEBUG
1615 +#define assert(expr) \
1616 +        if(!(expr)) {                                   \
1617 +        printk( "Assertion failed! %s,%s,%s,line=%d\n", \
1618 +        #expr,__FILE__,__FUNCTION__,__LINE__);          \
1619 +        }
1620 +#else
1621 +#define assert(expr)
1622 +#endif
1623 +
1624 +
1625 +
1626 +extern int camif_capture_start(camif_cfg_t *);
1627 +extern int camif_capture_stop(camif_cfg_t *);
1628 +extern int camif_g_frame_num(camif_cfg_t *);
1629 +extern u8 * camif_g_frame(camif_cfg_t *);
1630 +extern int  camif_win_offset(camif_gc_t *);
1631 +extern void camif_hw_open(camif_gc_t *);
1632 +extern void camif_hw_close(camif_cfg_t *);
1633 +extern int camif_dynamic_open(camif_cfg_t *);
1634 +extern int camif_dynamic_close(camif_cfg_t *);
1635 +extern void camif_reset(int,int);
1636 +extern void camif_setup_sensor(void);
1637 +extern int camif_g_fifo_status(camif_cfg_t *);
1638 +extern void camif_last_irq_en(camif_cfg_t *);
1639 +extern void camif_change_flip(camif_cfg_t *);
1640 +
1641 +
1642 +/* Todo
1643 + *  API Interface function to both Character and V4L2 Drivers
1644 + */
1645 +extern int camif_do_write(struct file *,const char *, size_t, loff_t *);
1646 +extern int camif_do_ioctl(struct inode *, struct file *,unsigned int, void *);
1647 +
1648 +
1649 +/*
1650 + * API for Decoder (S5x532, OV7620..)
1651 + */
1652 +void camif_register_decoder(struct i2c_client *);
1653 +void camif_unregister_decoder(struct i2c_client*);
1654 +
1655 +
1656 +
1657 +/* API for FSM */
1658 +#define INSTANT_SKIP 0
1659 +#define INSTANT_GO   1
1660 +
1661 +extern ssize_t camif_p_1fsm_start(camif_cfg_t *);
1662 +extern ssize_t camif_p_2fsm_start(camif_cfg_t *);
1663 +extern ssize_t camif_4fsm_start(camif_cfg_t *);
1664 +extern ssize_t camif_p_stop(camif_cfg_t *);
1665 +extern int camif_enter_p_4fsm(camif_cfg_t *);
1666 +extern int camif_enter_c_4fsm(camif_cfg_t *);
1667 +extern int camif_enter_2fsm(camif_cfg_t *);
1668 +extern int camif_enter_1fsm(camif_cfg_t *);
1669 +extern int camif_check_preview(camif_cfg_t *);
1670 +extern int camif_callback_start(camif_cfg_t *);
1671 +extern int camif_clock_init(camif_gc_t *);
1672 +
1673 +/*
1674 + *  V4L2 Part
1675 + */
1676 +#define VID_HARDWARE_SAMSUNG_FIMC20   236
1677 +
1678 +
1679 +
1680 +
1681 +
1682 +#endif
1683 +
1684 +
1685 +/*
1686 + * Local variables:
1687 + * tab-width: 8
1688 + *  c-indent-level: 8
1689 + *  c-basic-offset: 8
1690 + *  c-set-style: "K&R"
1691 + * End:
1692 + */
1693 diff --git a/arch/arm/mach-s3c2440/camera/camif_fsm.c b/arch/arm/mach-s3c2440/camera/camif_fsm.c
1694 new file mode 100644
1695 index 0000000..3e2b71a
1696 --- /dev/null
1697 +++ b/arch/arm/mach-s3c2440/camera/camif_fsm.c
1698 @@ -0,0 +1,427 @@
1699 +/*
1700 +    Copyright (C) 2004 Samsung Electronics
1701 +                     SW.LEE <hitchcar@sec.samsung.com>
1702 +
1703 +    This program is free software; you can redistribute it and/or modify
1704 +    it under the terms of the GNU General Public License as published by
1705 +    the Free Software Foundation; either version 2 of the License, or
1706 +    (at your option) any later version.
1707 +*/
1708 +
1709 +#include <linux/version.h>
1710 +#include <linux/module.h>
1711 +#include <linux/delay.h>
1712 +#include <linux/errno.h>
1713 +#include <linux/fs.h>
1714 +#include <linux/kernel.h>
1715 +#include <linux/major.h>
1716 +#include <linux/slab.h>
1717 +#include <linux/poll.h>
1718 +#include <linux/signal.h>
1719 +#include <linux/ioport.h>
1720 +#include <linux/sched.h>
1721 +#include <linux/types.h>
1722 +#include <linux/interrupt.h>
1723 +#include <linux/kmod.h>
1724 +#include <linux/vmalloc.h>
1725 +#include <linux/init.h>
1726 +#include <linux/pagemap.h>
1727 +#include <asm/io.h>
1728 +#include <asm/irq.h>
1729 +#include <asm/semaphore.h>
1730 +#include <linux/miscdevice.h>
1731 +
1732 +//#define SW_DEBUG
1733 +
1734 +#include "camif.h"
1735 +const char *fsm_version =
1736 +        "$Id: camif_fsm.c,v 1.3 2004/04/27 10:26:28 swlee Exp $";
1737 +
1738 +
1739 +/*
1740 + * FSM function is the place where Synchronization in not necessary
1741 + * because IRS calls this functions.
1742 + */
1743 +
1744 +ssize_t camif_p_1fsm_start(camif_cfg_t *cfg)
1745 +{
1746 +       //camif_reset(CAMIF_RESET,0);
1747 +       cfg->exec = CAMIF_DMA_ON;
1748 +       camif_capture_start(cfg);
1749 +       camif_last_irq_en(cfg);
1750 +       cfg->status = CAMIF_STARTED;
1751 +       cfg->fsm = CAMIF_1nd_INT;
1752 +       return 0;
1753 +}
1754 +
1755 +
1756 +ssize_t camif_p_2fsm_start(camif_cfg_t *cfg)
1757 +{
1758 +       camif_reset(CAMIF_RESET,0);/* FIFO Count goes to zero */
1759 +       cfg->exec = CAMIF_DMA_ON;
1760 +       camif_capture_start(cfg);
1761 +       cfg->status = CAMIF_STARTED;
1762 +       cfg->fsm = CAMIF_1nd_INT;
1763 +       return 0;
1764 +}
1765 +
1766 +
1767 +ssize_t camif_4fsm_start(camif_cfg_t *cfg)
1768 +{
1769 +       camif_reset(CAMIF_RESET,0); /* FIFO Count goes to zero */
1770 +       cfg->exec = CAMIF_DMA_ON;
1771 +       camif_capture_start(cfg);
1772 +       cfg->status = CAMIF_STARTED;
1773 +       cfg->fsm = CAMIF_1nd_INT;
1774 +       cfg->perf.frames = 0;
1775 +       return 0;
1776 +}
1777 +
1778 +
1779 +/* Policy:
1780 +     cfg->perf.frames  set in camif_fsm.c
1781 +     cfg->status set in video-driver.c
1782 + */
1783 +
1784 +/*
1785 + * Don't insert camif_reset(CAM_RESET, 0 ) into this func
1786 + */
1787 +ssize_t camif_p_stop(camif_cfg_t *cfg)
1788 +{
1789 +       cfg->exec = CAMIF_DMA_OFF;
1790 +//     cfg->status = CAMIF_STOPPED;
1791 +       camif_capture_stop(cfg);
1792 +       cfg->perf.frames = 0;   /* Dupplicated ? */
1793 +       return 0;
1794 +}
1795 +
1796 +/* When C working, P asks C to play togehter */
1797 +/* Only P must call this function */
1798 +void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other)
1799 +{
1800 +//     cfg->gc->other = get_camif(CODEC_MINOR);
1801 +       cfg->gc->other = other;
1802 +       camif_start_p_with_c(cfg);
1803 +}
1804 +
1805 +static void camif_start_p_with_c(camif_cfg_t *cfg)
1806 +{
1807 +       camif_cfg_t *other = (camif_cfg_t *)cfg->gc->other;
1808 +       /* Preview Stop */
1809 +       cfg->exec = CAMIF_DMA_OFF;
1810 +       camif_capture_stop(cfg);
1811 +       /* Start P and C */
1812 +       camif_reset(CAMIF_RESET, 0);
1813 +       cfg->exec =CAMIF_BOTH_DMA_ON;
1814 +       camif_capture_start(cfg);
1815 +       cfg->fsm = CAMIF_1nd_INT; /* For Preview */
1816 +       if(!other) panic("Unexpected Error \n");
1817 +       other->fsm = CAMIF_1nd_INT; /* For Preview */
1818 +}
1819 +
1820 +static void camif_auto_restart(camif_cfg_t *cfg)
1821 +{
1822 +//     if (cfg->dma_type & CAMIF_CODEC) return;
1823 +       if (cfg->auto_restart)
1824 +               camif_start_p_with_c(cfg);
1825 +}
1826 +
1827 +
1828 +/* Supposed that PREVIEW already running
1829 + * request PREVIEW to start with Codec
1830 + */
1831 +static int camif_check_global(camif_cfg_t *cfg)
1832 +{
1833 +       int ret = 0;
1834 +
1835 +        if (down_interruptible(&cfg->gc->lock))
1836 +                       return -ERESTARTSYS;
1837 +        if ( cfg->gc->status & CWANT2START ) {
1838 +               cfg->gc->status &= ~CWANT2START;
1839 +               cfg->auto_restart = 1;
1840 +               ret = 1;
1841 +       }
1842 +       else {
1843 +               ret = 0; /* There is no codec */
1844 +               cfg->auto_restart = 0; /* Duplicated ..Dummy */
1845 +       }
1846 +
1847 +       up(&cfg->gc->lock);
1848 +
1849 +        return ret;
1850 +}
1851 +
1852 +/*
1853 + *    1nd INT : Start Interrupt
1854 + *    Xnd INT : enable Last IRQ : pingpong get the valid data
1855 + *    Ynd INT : Stop Codec or Preview : pingpong get the valid data
1856 + *    Znd INT : Last IRQ : valid data
1857 + */
1858 +#define CHECK_FREQ 5
1859 +int camif_enter_p_4fsm(camif_cfg_t *cfg)
1860 +{
1861 +       int ret = 0;
1862 +
1863 +       cfg->perf.frames++;
1864 +       if (cfg->fsm == CAMIF_NORMAL_INT)
1865 +       if (cfg->perf.frames % CHECK_FREQ == 0)
1866 +               ret = camif_check_global(cfg);
1867 +       if (ret > 0) cfg->fsm = CAMIF_Xnd_INT; /* Codec wait for Preview */
1868 +
1869 +       switch (cfg->fsm) {
1870 +               case CAMIF_1nd_INT:           /* Start IRQ */
1871 +                       cfg->fsm = CAMIF_NORMAL_INT;
1872 +                       ret = INSTANT_SKIP;
1873 +                       DPRINTK(KERN_INFO "1nd INT \n");
1874 +                       break;
1875 +               case CAMIF_NORMAL_INT:
1876 +                       cfg->status = CAMIF_INT_HAPPEN;
1877 +                       cfg->fsm = CAMIF_NORMAL_INT;
1878 +                       ret = INSTANT_GO;
1879 +                       DPRINTK(KERN_INFO "NORMAL INT \n");
1880 +                       break;
1881 +               case CAMIF_Xnd_INT:
1882 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
1883 +                       cfg->status = CAMIF_INT_HAPPEN;
1884 +                       cfg->fsm = CAMIF_Ynd_INT;
1885 +                       ret = INSTANT_GO;
1886 +                       DPRINTK(KERN_INFO "Xnd INT \n");
1887 +                       break;
1888 +               case CAMIF_Ynd_INT:        /* Capture Stop */
1889 +                       cfg->exec = CAMIF_DMA_OFF;
1890 +                       cfg->status = CAMIF_INT_HAPPEN;
1891 +                       camif_capture_stop(cfg);
1892 +                       cfg->fsm = CAMIF_Znd_INT;
1893 +                       ret = INSTANT_GO;
1894 +                       DPRINTK(KERN_INFO "Ynd INT \n");
1895 +                       break;
1896 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
1897 +                       cfg->fsm = CAMIF_DUMMY_INT;
1898 +                       cfg->status = CAMIF_INT_HAPPEN;
1899 +                       ret = INSTANT_GO;
1900 +                       camif_auto_restart(cfg);  /* Automatically Restart Camera */
1901 +                       DPRINTK(KERN_INFO "Znd INT \n");
1902 +                       break;
1903 +               case CAMIF_DUMMY_INT:
1904 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
1905 +                       ret = INSTANT_SKIP;
1906 +//                     DPRINTK(KERN_INFO "Dummy INT \n");
1907 +                       break;
1908 +               default:
1909 +                       printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
1910 +                       ret = INSTANT_SKIP;
1911 +                       break;
1912 +       }
1913 +       return ret;
1914 +}
1915 +
1916 +
1917 +/*
1918 + * NO autorestart included in this function
1919 + */
1920 +int camif_enter_c_4fsm(camif_cfg_t *cfg)
1921 +{
1922 +       int ret;
1923 +
1924 +       cfg->perf.frames++;
1925 +#if 0
1926 +       if (   (cfg->fsm==CAMIF_NORMAL_INT)
1927 +           && (cfg->perf.frames>cfg->restart_limit-1)
1928 +          )
1929 +               cfg->fsm = CAMIF_Xnd_INT;
1930 +#endif
1931 +       switch (cfg->fsm) {
1932 +               case CAMIF_1nd_INT:           /* Start IRQ */
1933 +                       cfg->fsm = CAMIF_NORMAL_INT;
1934 +//                     cfg->status = CAMIF_STARTED; /* need this to meet auto-restart */
1935 +                       ret = INSTANT_SKIP;
1936 +                       DPRINTK(KERN_INFO "1nd INT \n");
1937 +                       break;
1938 +               case CAMIF_NORMAL_INT:
1939 +                       cfg->status = CAMIF_INT_HAPPEN;
1940 +                       cfg->fsm = CAMIF_NORMAL_INT;
1941 +                       ret = INSTANT_GO;
1942 +                       DPRINTK(KERN_INFO "NORMALd INT \n");
1943 +                       break;
1944 +               case CAMIF_Xnd_INT:
1945 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
1946 +                       cfg->status = CAMIF_INT_HAPPEN;
1947 +                       cfg->fsm = CAMIF_Ynd_INT;
1948 +                       ret = INSTANT_GO;
1949 +                       DPRINTK(KERN_INFO "Xnd INT \n");
1950 +                       break;
1951 +               case CAMIF_Ynd_INT:        /* Capture Stop */
1952 +                       cfg->exec = CAMIF_DMA_OFF;
1953 +                       cfg->status = CAMIF_INT_HAPPEN;
1954 +                       camif_capture_stop(cfg);
1955 +                       cfg->fsm = CAMIF_Znd_INT;
1956 +                       ret = INSTANT_GO;
1957 +                       DPRINTK(KERN_INFO "Ynd INT \n");
1958 +                       break;
1959 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
1960 +                       cfg->fsm = CAMIF_DUMMY_INT;
1961 +                       cfg->status = CAMIF_INT_HAPPEN;
1962 +                       ret = INSTANT_GO;
1963 +                       DPRINTK(KERN_INFO "Znd INT \n");
1964 +                       break;
1965 +               case CAMIF_DUMMY_INT:
1966 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
1967 +                       ret = INSTANT_SKIP;
1968 +                       break;
1969 +               default:
1970 +                       printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
1971 +                       ret = INSTANT_SKIP;
1972 +                       break;
1973 +       }
1974 +       return ret;
1975 +}
1976 +
1977 +/* 4 Interrups State Machine is for two pingpong
1978 + *    1nd INT : Start Interrupt
1979 + *    Xnd INT : enable Last IRQ : pingpong get the valid data
1980 + *    Ynd INT : Stop Codec or Preview : pingpong get the valid data
1981 + *    Znd INT : Last IRQ : valid data
1982 + *
1983 + * Note:
1984 + *    Before calling this func, you must call camif_reset
1985 + */
1986 +
1987 +int camif_enter_2fsm(camif_cfg_t *cfg) /* Codec FSM */
1988 +{
1989 +       int ret;
1990 +
1991 +       cfg->perf.frames++;
1992 +       switch (cfg->fsm) {
1993 +               case CAMIF_1nd_INT:           /* Start IRQ */
1994 +                       cfg->fsm = CAMIF_Xnd_INT;
1995 +                       ret = INSTANT_SKIP;
1996 +//                     printk(KERN_INFO "1nd INT \n");
1997 +                       break;
1998 +               case CAMIF_Xnd_INT:
1999 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
2000 +                       cfg->now_frame_num = 0;
2001 +                       cfg->status = CAMIF_INT_HAPPEN;
2002 +                       cfg->fsm = CAMIF_Ynd_INT;
2003 +                       ret = INSTANT_GO;
2004 +//                     printk(KERN_INFO "2nd INT \n");
2005 +                       break;
2006 +               case CAMIF_Ynd_INT:        /* Capture Stop */
2007 +                       cfg->exec = CAMIF_DMA_OFF;
2008 +                       cfg->now_frame_num = 1;
2009 +                       cfg->status = CAMIF_INT_HAPPEN;
2010 +                       camif_capture_stop(cfg);
2011 +                       cfg->fsm = CAMIF_Znd_INT;
2012 +                       ret = INSTANT_GO;
2013 +//                     printk(KERN_INFO "Ynd INT \n");
2014 +                       break;
2015 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
2016 +                       cfg->now_frame_num = 0;
2017 +//                     cfg->fsm = CAMIF_DUMMY_INT;
2018 +                       cfg->status = CAMIF_INT_HAPPEN;
2019 +                       ret = INSTANT_GO;
2020 +//                     printk(KERN_INFO "Znd INT \n");
2021 +                       break;
2022 +               case CAMIF_DUMMY_INT:
2023 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
2024 +                       ret = INSTANT_SKIP;
2025 +                       printk(KERN_INFO "Dummy INT \n");
2026 +                       break;
2027 +               default:  /* CAMIF_PENDING_INT */
2028 +                       printk(KERN_INFO "Unexpect INT \n");
2029 +                       ret = INSTANT_SKIP;
2030 +                       break;
2031 +       }
2032 +       return ret;
2033 +}
2034 +
2035 +
2036 +/* 2 Interrups State Machine is for one pingpong
2037 + *    1nd INT : Stop Codec or Preview : pingpong get the valid data
2038 + *    2nd INT : Last IRQ : dummy data
2039 + */
2040 +int camif_enter_1fsm(camif_cfg_t *cfg) /* Codec FSM */
2041 +{
2042 +       int ret;
2043 +
2044 +       cfg->perf.frames++;
2045 +       switch (cfg->fsm) {
2046 +               case CAMIF_Ynd_INT:             /* IRQ for Enabling LAST IRQ */
2047 +                       cfg->exec = CAMIF_DMA_OFF;
2048 +                       camif_capture_stop(cfg);
2049 +                       cfg->fsm = CAMIF_Znd_INT;
2050 +                       ret = INSTANT_SKIP;
2051 +       //              printk(KERN_INFO "Ynd INT \n");
2052 +                       break;
2053 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
2054 +                       cfg->fsm = CAMIF_DUMMY_INT;
2055 +                       cfg->status = CAMIF_INT_HAPPEN;
2056 +                       ret = INSTANT_GO;
2057 +       //              printk(KERN_INFO "Znd INT \n");
2058 +                       break;
2059 +               case CAMIF_DUMMY_INT:
2060 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
2061 +                       ret = INSTANT_SKIP;
2062 +                       printk(KERN_INFO "Dummy INT \n");
2063 +                       break;
2064 +               default:
2065 +                       printk(KERN_INFO "Unexpect INT \n");
2066 +                       ret = INSTANT_SKIP;
2067 +                       break;
2068 +       }
2069 +       return ret;
2070 +}
2071 +
2072 +
2073 +/*
2074 + *  GLOBAL STATUS CONTROL FUNCTION
2075 + *
2076 + */
2077 +
2078 +
2079 +/* Supposed that PREVIEW already running
2080 + * request PREVIEW to start with Codec
2081 + */
2082 +int camif_callback_start(camif_cfg_t *cfg)
2083 +{
2084 +        int  doit = 1;
2085 +        while (doit) {
2086 +                if (down_interruptible(&cfg->gc->lock)) {
2087 +                        return -ERESTARTSYS;
2088 +                }
2089 +                cfg->gc->status = CWANT2START;
2090 +                cfg->gc->other = cfg;
2091 +                up(&cfg->gc->lock);
2092 +                doit = 0;
2093 +        }
2094 +        return 0;
2095 +}
2096 +
2097 +/*
2098 + * Return status of Preview Machine
2099 +  ret value :
2100 +      0: Preview is not working
2101 +      X: Codec must follow PREVIEW start
2102 +*/
2103 +int camif_check_preview(camif_cfg_t *cfg)
2104 +{
2105 +        int ret = 0;
2106 +
2107 +        if (down_interruptible(&cfg->gc->lock)) {
2108 +                        ret = -ERESTARTSYS;
2109 +                        return ret;
2110 +        }
2111 +        if (cfg->gc->user == 1) ret = 0;
2112 +     //   else if (cfg->gc->status & PNOTWORKING) ret = 0;
2113 +        else ret = 1;
2114 +        up(&cfg->gc->lock);
2115 +        return ret;
2116 +}
2117 +
2118 +
2119 +
2120 +
2121 +/*
2122 + * Local variables:
2123 + * c-basic-offset: 8
2124 + * End:
2125 + */
2126 diff --git a/arch/arm/mach-s3c2440/camera/imgsensor.c b/arch/arm/mach-s3c2440/camera/imgsensor.c
2127 new file mode 100644
2128 index 0000000..44b7bee
2129 --- /dev/null
2130 +++ b/arch/arm/mach-s3c2440/camera/imgsensor.c
2131 @@ -0,0 +1,255 @@
2132 +/*
2133 + *  Copyright (C) 2004 Samsung Electronics
2134 + *             SW.LEE <hitchcar@samsung.com>
2135 + *
2136 + *  Copyright (C) 2000 Russell King : pcf8583.c
2137 + *
2138 + * This program is free software; you can redistribute it and/or modify
2139 + * it under the terms of the GNU General Public License version 2 as
2140 + * published by the Free Software Foundation.
2141 + *
2142 + *  Driver for FIMC20 Camera Decoder
2143 + */
2144 +
2145 +#include <linux/config.h>
2146 +#include <linux/module.h>
2147 +#include <linux/kernel.h>
2148 +#include <linux/init.h>
2149 +#include <linux/i2c.h>
2150 +#include <linux/slab.h>
2151 +#include <linux/string.h>
2152 +#include <linux/init.h>
2153 +#include <linux/delay.h>
2154 +
2155 +
2156 +#ifdef CONFIG_ARCH_S3C24A0A
2157 +#else
2158 +#include <asm/arch/S3C2440.h>
2159 +#endif
2160 +
2161 +#define SW_DEBUG
2162 +#include "camif.h"
2163 +#include "sensor.h"
2164 +
2165 +#ifndef SAMSUNG_SXGA_CAM
2166 +#include "s5x532_rev36.h"
2167 +#else
2168 +#include "sxga.h"
2169 +#endif
2170 +
2171 +static const char *sensor_version =
2172 +        "$Id: imgsensor.c,v 1.11 2004/06/10 12:45:40 swlee Exp $";
2173 +
2174 +
2175 +static struct i2c_driver s5x532_driver;
2176 +static camif_gc_t data = {
2177 +       itu_fmt:      CAMIF_ITU601,
2178 +       order422:     CAMIF_YCBYCR,
2179 +       camclk:       24000000,
2180 +#ifndef SAMSUNG_SXGA_CAM
2181 +       source_x:     640,
2182 +       source_y:     480,
2183 +       win_hor_ofst: 112,
2184 +       win_ver_ofst: 20,
2185 +#else
2186 +       source_x:     1280,
2187 +       source_y:     1024,
2188 +       win_hor_ofst: 0,
2189 +       win_ver_ofst: 0,
2190 +#endif
2191 +       polarity_pclk:1,
2192 +       polarity_href:0,
2193 +#ifdef CONFIG_ARCH_S3C24A0A
2194 +       reset_type:CAMIF_EX_RESET_AL, /* Active Low */
2195 +#else
2196 +       reset_type:CAMIF_EX_RESET_AH, /* Ref board has inverted signal */
2197 +#endif
2198 +       reset_udelay:2000,
2199 +};
2200 +
2201 +#define CAM_ID 0x5a
2202 +
2203 +static unsigned short ignore[] = { I2C_CLIENT_END };
2204 +static unsigned short normal_addr[] = { (CAM_ID>>1), I2C_CLIENT_END };
2205 +static struct i2c_client_address_data addr_data = {
2206 +       normal_i2c:             normal_addr,
2207 +       normal_i2c_range:       ignore,
2208 +       probe:                  ignore,
2209 +       probe_range:            ignore,
2210 +       ignore:                 ignore,
2211 +       ignore_range:           ignore,
2212 +       force:                  ignore,
2213 +};
2214 +
2215 +s5x532_t s5x532_regs_mirror[S5X532_REGS];
2216 +
2217 +unsigned char
2218 +s5x532_read(struct i2c_client *client,unsigned char subaddr)
2219 +{
2220 +       int ret;
2221 +       unsigned char buf[1];
2222 +       struct i2c_msg msg ={ client->addr, 0, 1, buf};
2223 +       buf[0] = subaddr;
2224 +
2225 +       ret = i2c_transfer(client->adapter,&msg, 1) == 1 ? 0 : -EIO;
2226 +       if (ret == -EIO) {
2227 +         printk(" I2C write Error \n");
2228 +         return -EIO;
2229 +       }
2230 +
2231 +       msg.flags = I2C_M_RD;
2232 +       ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
2233 +
2234 +       return buf[0];
2235 +}
2236 +
2237 +
2238 +static int
2239 +s5x532_write(struct i2c_client *client,
2240 +                 unsigned char subaddr, unsigned char val)
2241 +{
2242 +       unsigned char buf[2];
2243 +       struct i2c_msg msg = { client->addr, 0, 2, buf};
2244 +
2245 +       buf[0]= subaddr;
2246 +       buf[1]= val;
2247 +
2248 +       return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
2249 +}
2250 +
2251 +void inline s5x532_init(struct i2c_client *sam_client)
2252 +{
2253 +       int i;
2254 +
2255 +       printk(KERN_ERR "s5x532_init  \n");
2256 +       for (i = 0; i < S5X532_INIT_REGS; i++) {
2257 +               s5x532_write(sam_client,
2258 +                             s5x532_reg[i].subaddr, s5x532_reg[i].value );
2259 +       }
2260 +
2261 +#ifdef YOU_WANT_TO_CHECK_IMG_SENSOR
2262 +       for (i = 0; i < S5X532_INIT_REGS;i++) {
2263 +               if ( s5x532_reg[i].subaddr == PAGE_ADDRESS ) {
2264 +                       s5x532_write(sam_client,
2265 +                             s5x532_reg[i].subaddr, s5x532_reg[i].value);
2266 +
2267 +                       printk(KERN_ERR "Page: Subaddr %02x = 0x%02x\n",
2268 +                              s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
2269 +
2270 +
2271 +               } else
2272 +               {
2273 +                       s5x532_regs_mirror[i].subaddr = s5x532_reg[i].subaddr;
2274 +                       s5x532_regs_mirror[i].value =
2275 +                       s5x532_read(sam_client,s5x532_reg[i].subaddr);
2276 +                       printk(KERN_ERR "Subaddr %02x = 0x%02x\n",
2277 +                              s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
2278 +               }
2279 +       }
2280 +#endif
2281 +
2282 +}
2283 +
2284 +static int
2285 +s5x532_attach(struct i2c_adapter *adap, int addr, unsigned short flags,int kind)
2286 +{
2287 +       struct i2c_client *c;
2288 +
2289 +       c = kmalloc(sizeof(*c), GFP_KERNEL);
2290 +       if (!c) return -ENOMEM;
2291 +
2292 +       strcpy(c->name, "S5X532");
2293 +       c->id           = s5x532_driver.id;
2294 +       c->flags        = I2C_CLIENT_ALLOW_USE;
2295 +       c->addr         = addr;
2296 +       c->adapter      = adap;
2297 +       c->driver       = &s5x532_driver;
2298 +       c->data         = &data;
2299 +       data.sensor     = c;
2300 +
2301 +       camif_register_decoder(c);
2302 +       return i2c_attach_client(c);
2303 +}
2304 +
2305 +static int s5x532_probe(struct i2c_adapter *adap)
2306 +{
2307 +       return i2c_probe(adap, &addr_data, s5x532_attach);
2308 +}
2309 +
2310 +static int s5x532_detach(struct i2c_client *client)
2311 +{
2312 +       i2c_detach_client(client);
2313 +       camif_unregister_decoder(client);
2314 +       return 0;
2315 +}
2316 +
2317 +static int
2318 +s5x532_command(struct i2c_client *client, unsigned int cmd, void *arg)
2319 +{
2320 +        switch (cmd) {
2321 +        case SENSOR_INIT:
2322 +                 s5x532_init(client);
2323 +                printk(KERN_INFO "CAMERA: S5X532 Sensor initialized\n");
2324 +                break;
2325 +       case USER_ADD:
2326 +               MOD_INC_USE_COUNT;
2327 +               break;
2328 +       case USER_EXIT:
2329 +               MOD_DEC_USE_COUNT;
2330 +               break;
2331 +/* Todo
2332 +       case SENSOR_BRIGHTNESS:
2333 +               change_sensor();
2334 +               break;
2335 +*/
2336 +       default:
2337 +               panic("Unexpect Sensor Command \n");
2338 +               break;
2339 +        }
2340 +       return 0;
2341 +}
2342 +
2343 +static struct i2c_driver s5x532_driver = {
2344 +       name:           "S5X532",
2345 +       id:             I2C_ALGO_S3C,
2346 +       flags:          I2C_DF_NOTIFY,
2347 +       attach_adapter: s5x532_probe,
2348 +       detach_client:  s5x532_detach,
2349 +       command:        s5x532_command
2350 +};
2351 +
2352 +static void iic_gpio_port(void)
2353 +{
2354 +#ifdef CONFIG_ARCH_S3C24A0A
2355 +#else
2356 +       GPECON &=  ~(0xf <<28);
2357 +       GPECON |=    0xa <<28;
2358 +#endif
2359 +}
2360 +
2361 +static __init int camif_sensor_init(void)
2362 +{
2363 +        iic_gpio_port();
2364 +       return i2c_add_driver(&s5x532_driver);
2365 +}
2366 +
2367 +
2368 +static __init void camif_sensor_exit(void)
2369 +{
2370 +       i2c_del_driver(&s5x532_driver);
2371 +}
2372 +
2373 +module_init(camif_sensor_init)
2374 +module_exit(camif_sensor_exit)
2375 +
2376 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
2377 +MODULE_DESCRIPTION("I2C Client Driver For Fimc2.0 MISC Driver");
2378 +MODULE_LICENSE("GPL");
2379 +
2380 +
2381 +
2382 +/*
2383 + * Local variables:
2384 + * c-basic-offset: 8
2385 + * End:
2386 + */
2387 diff --git a/arch/arm/mach-s3c2440/camera/miscdevice.h b/arch/arm/mach-s3c2440/camera/miscdevice.h
2388 new file mode 100644
2389 index 0000000..2e1cfbc
2390 --- /dev/null
2391 +++ b/arch/arm/mach-s3c2440/camera/miscdevice.h
2392 @@ -0,0 +1,18 @@
2393 +
2394 + /*----------------------------------------------------------
2395 +  *   (C) 2004 Samsung Electronics
2396 +  *   SW.LEE < hitchcar@samsung.com>
2397 +  *
2398 +  ----------------------------------------------------------- */
2399 +
2400 +#ifndef _LINUX_S3C_MISCDEVICE_H
2401 +#define _LINUX_S3C_MISCDEVICE_H
2402 +
2403 +#define CODEC_MINOR 212
2404 +#define PREVIEW_MINOR 213
2405 +
2406 +
2407 +
2408 +
2409 +
2410 +#endif
2411 diff --git a/arch/arm/mach-s3c2440/camera/qt-driver.c b/arch/arm/mach-s3c2440/camera/qt-driver.c
2412 new file mode 100644
2413 index 0000000..0c5dd40
2414 --- /dev/null
2415 +++ b/arch/arm/mach-s3c2440/camera/qt-driver.c
2416 @@ -0,0 +1,169 @@
2417 +/*
2418 + * SW.LEE <hitchcar@samsung.com>
2419 + *
2420 + * This file is subject to the terms and conditions of the GNU General Public
2421 + * License 2. See the file COPYING in the main directory of this archive
2422 + * for more details.
2423 + */
2424 +
2425 +#include <linux/version.h>
2426 +#include <linux/module.h>
2427 +#include <linux/delay.h>
2428 +#include <linux/errno.h>
2429 +#include <linux/fs.h>
2430 +#include <linux/kernel.h>
2431 +#include <linux/major.h>
2432 +#include <linux/slab.h>
2433 +#include <linux/poll.h>
2434 +#include <linux/signal.h>
2435 +#include <linux/ioport.h>
2436 +#include <linux/sched.h>
2437 +#include <linux/types.h>
2438 +#include <linux/interrupt.h>
2439 +#include <linux/kmod.h>
2440 +#include <linux/vmalloc.h>
2441 +#include <linux/init.h>
2442 +#include <asm/io.h>
2443 +#include <asm/page.h>
2444 +#include <asm/irq.h>
2445 +#include <asm/semaphore.h>
2446 +#include <linux/miscdevice.h>
2447 +
2448 +//#define SW_DEBUG
2449 +
2450 +#include "camif.h"
2451 +#include "videodev.h"
2452 +#include "miscdevice.h"
2453 +#include "cam_reg.h"
2454 +#include "sensor.h"
2455 +#include "userapp.h"
2456 +
2457 +
2458 +/************************* Sharp Zarus API **************************
2459 +* refering to Camera Driver API for SL-5000D/SL-5600 revision 1.00
2460 +*                              April 11, 2002.
2461 +  SW.LEE <hitchcar@sec.samsung.com>
2462 +               I want to use Sharp Camera Application.
2463 +*
2464 +*/
2465 +
2466 +#define READ_MODE_STATUS       0x1
2467 +#define READ_MODE_IMAGE                0x0
2468 +#define CAPTURE_SPEED
2469 +#define        H_FLIP
2470 +#define V_FLIP
2471 +typedef enum sharp_readmode
2472 +{
2473 +        IMAGE = 0, STATUS = 1,
2474 +        FASTER = 0, BETTER = 2,
2475 +        XNOFLIP = 0, XFLIP = 4,
2476 +        YNOFLIP = 0, YFLIP = 8,
2477 +        AUTOMATICFLIP = -1
2478 +} ReadMode_t;
2479 +
2480 +
2481 +static struct sharp_param_t {
2482 +       ReadMode_t readMode;
2483 +       char CameraStatus[4];
2484 +} sharp_param = { STATUS, {'s','m','c','A'}};
2485 +
2486 +
2487 +camif_param_t qt_parm = { 640,480,240,320,16,0};
2488 +
2489 +static void setReadMode(const char *b,size_t count)
2490 +{
2491 +       int i =   *(b+2) - 48 ;
2492 +       if ( 4 == count ) {
2493 +               i = (*(b+3) - 48)  + i * 10;
2494 +       }
2495 +
2496 +       //      DPRINTK(" setReadMode %s conversion value %d \n",b , i);
2497 +       if ( i & STATUS ) {
2498 +       //      DPRINTK(" STATUS MODE \n");
2499 +               sharp_param.readMode = i;
2500 +       }
2501 +       else  {
2502 +       //      DPRINTK(" IMAGE MODE \n");
2503 +               sharp_param.readMode = i;
2504 +       }
2505 +}
2506 +
2507 +
2508 +
2509 +
2510 +extern ssize_t camif_p_read(struct file *, char *, size_t , loff_t *);
2511 +
2512 +ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos)
2513 +{
2514 +       size_t end;
2515 +
2516 +       if (sharp_param.readMode & STATUS ) {
2517 +               buf[0] = sharp_param.CameraStatus[0];
2518 +               buf[1] = sharp_param.CameraStatus[1];
2519 +               buf[2] = sharp_param.CameraStatus[2];
2520 +               buf[3] = sharp_param.CameraStatus[3];
2521 +               end = 4;
2522 +               return end;
2523 +       }
2524 +       else {  /* Image ReadMode */
2525 +               /*
2526 +               if (( sharp_param.readMode & (BETTER|X  FLIP|YFLIP)))
2527 +                       DPRINTK("  Not Supporting BETTER|XFLIP|YFLIP\n");
2528 +               */
2529 +               return camif_p_read(f,buf,count,pos);
2530 +       }
2531 +}
2532 +
2533 +static void z_config(camif_cfg_t *cfg,int x, int y)
2534 +{
2535 +       cfg->target_x = x;
2536 +       cfg->target_y = y;
2537 +       cfg->fmt = CAMIF_RGB16;
2538 +       if (camif_dynamic_open(cfg)) {
2539 +               panic(" Eror Happens \n");
2540 +       }
2541 +}
2542 +
2543 +
2544 +ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos)
2545 +{
2546 +       int array[5];
2547 +       int zoom = 1;
2548 +       camif_cfg_t *cfg;
2549 +
2550 +       cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
2551 +//     DPRINTK(" param %s count %d \n",b, c );
2552 +
2553 +       switch(*b) {
2554 +       case 'M':
2555 +               setReadMode(b, c);
2556 +               break;
2557 +       case 'B':       /* Clear the latch flag of shutter button */
2558 +               DPRINTK("  clear latch flag of camera's shutter button\n");
2559 +               sharp_param.CameraStatus[0]='s';
2560 +               break;
2561 +       case 'Y':       /* I don't know how to set Shutter pressed */
2562 +               DPRINTK("  set latch flag n");
2563 +               sharp_param.CameraStatus[0]='S';
2564 +               break;
2565 +       case 'S':       /* Camera Image Resolution */
2566 +       case 'R':       /* Donot support Rotation */
2567 +       DPRINTK(" param %s count %d \n",b, c );
2568 +               get_options((char *)(b+2), 5, array);
2569 +               if ( array[3] == 512 ) zoom = 2;
2570 +               z_config(cfg, array[1] * zoom , array[2] * zoom );
2571 +               camif_4fsm_start(cfg);
2572 +               break;
2573 +       case 'C':
2574 +       DPRINTK(" param %s count %d \n",b, c );
2575 +               DPRINTK("  Start the camera to capture \n");
2576 +               sharp_param.CameraStatus[2]='C';
2577 +               camif_4fsm_start(cfg);
2578 +               break;
2579 +       default:
2580 +               printk("Unexpected  param %s count %d \n",b, c );
2581 +       }
2582 +
2583 +       return c;
2584 +}
2585 +
2586 diff --git a/arch/arm/mach-s3c2440/camera/qt.h b/arch/arm/mach-s3c2440/camera/qt.h
2587 new file mode 100644
2588 index 0000000..e58368a
2589 --- /dev/null
2590 +++ b/arch/arm/mach-s3c2440/camera/qt.h
2591 @@ -0,0 +1,18 @@
2592 +/*
2593 + * SW.LEE <hitchcar@samsung.com>
2594 + *
2595 + * This file is subject to the terms and conditions of the GNU General Public
2596 + * License 2. See the file COPYING in the main directory of this archive
2597 + * for more details.
2598 + */
2599 +
2600 +#ifndef __Z_API_H_
2601 +#define __Z_API_H_
2602 +
2603 +extern ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos);
2604 +extern ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos);
2605 +
2606 +
2607 +
2608 +#endif
2609 +
2610 diff --git a/arch/arm/mach-s3c2440/camera/s5x532.h b/arch/arm/mach-s3c2440/camera/s5x532.h
2611 new file mode 100644
2612 index 0000000..12725f4
2613 --- /dev/null
2614 +++ b/arch/arm/mach-s3c2440/camera/s5x532.h
2615 @@ -0,0 +1,143 @@
2616 +/*
2617 + * 2004 (C) Samsung Electronics
2618 + *  SW.LEE <hitchcar@sec.samsung.com>
2619 + * This file is subject to the terms and conditions of the GNU General Public
2620 + * License 2. See the file COPYING in the main directory of this archive
2621 + * for more details.
2622 + */
2623 +
2624 +
2625 +#ifndef _SMDK2440_S5X532_H_
2626 +#define _SMDK2440_S5X532_H_
2627 +
2628 +
2629 +#define CHIP_DELAY 0xFF
2630 +
2631 +typedef struct samsung_t{
2632 +       unsigned char subaddr;
2633 +       unsigned char value;
2634 +       unsigned char page;
2635 +} s5x532_t;
2636 +
2637 +s5x532_t s5x532_reg[] = {
2638 +       // page 5
2639 +       {0xec,0x05},
2640 +       {0x08,0x55,0x5},
2641 +       {0x0a,0x75,0x5},
2642 +       {0x0c,0x90,0x5},
2643 +       {0x0e,0x18,0x5},
2644 +       {0x12,0x09,0x5},
2645 +       {0x14,0x9d,0x5},
2646 +       {0x16,0x90,0x5},
2647 +       {0x1a,0x18,0x5},
2648 +       {0x1c,0x0c,0x5},
2649 +       {0x1e,0x09,0x5},
2650 +       {0x20,0x06,0x5},
2651 +       {0x22,0x20,0x5},
2652 +       {0x2a,0x00,0x5},
2653 +       {0x2d,0x04,0x5},
2654 +       {0x12,0x24,0x5},
2655 +       // page 3
2656 +       {0xec,0x03,0x3},
2657 +       {0x0c,0x09,0x3},
2658 +       {0x6c,0x09,0x3},
2659 +       {0x2b,0x10,0x3}, // momo clock inversion
2660 +       // page 2
2661 +       {0xec,0x02,0x2},
2662 +       {0x03,0x09,0x2},
2663 +       {0x05,0x08,0x2},
2664 +       {0x06,0x01,0x2},
2665 +       {0x07,0xf8,0x2},
2666 +       {0x15,0x25,0x2},
2667 +       {0x30,0x29,0x2},
2668 +       {0x36,0x12,0x2},
2669 +       {0x38,0x04,0x2},
2670 +       {0x1b,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
2671 +       {0x1c,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
2672 +       // page 1
2673 +       {0xec,0x01,0x1},
2674 +       {0x00,0x03,0x1}, //
2675 +       {0x0a,0x08,0x1}, // 0x0-QQVGA, 0x06-CIF, 0x02-QCIF, 0x08-VGA, 0x04-QVGA, 0x0a-SXGA
2676 +       {0x0c,0x00,0x1}, // Pattern selectio. 0-CIS, 1-Color bar, 2-Ramp, 3-Blue screen
2677 +       {0x10,0x27,0x1},
2678 +       // 0x21-ITU-R656(CrYCbY), 0x25-ITU-R601(CrYCbY), 0x26-ITU-R601(YCbYCr)
2679 +       {0x50,0x21,0x1},                // Hblank
2680 +       {0x51,0x00,0x1},                // Hblank
2681 +       {0x52,0xA1,0x1},                // Hblank
2682 +       {0x53,0x02,0x1},                // Hblank
2683 +       {0x54,0x01,0x1},                // Vblank
2684 +       {0x55,0x00,0x1},                // Vblank
2685 +       {0x56,0xE1,0x1},                // Vblank
2686 +       {0x57,0x01,0x1},                // Vblank
2687 +       {0x58,0x21,0x1},                // Hsync
2688 +       {0x59,0x00,0x1},                // Hsync
2689 +       {0x5a,0xA1,0x1},                // Hsync
2690 +       {0x5b,0x02,0x1},                // Hsync
2691 +       {0x5c,0x03,0x1},                // Vref
2692 +       {0x5d,0x00,0x1},                // Vref
2693 +       {0x5e,0x05,0x1},                // Vref
2694 +       {0x5f,0x00,0x1},                // Vref
2695 +       {0x70,0x0E,0x1},
2696 +       {0x71,0xD6,0x1},
2697 +       {0x72,0x30,0x1},
2698 +       {0x73,0xDB,0x1},
2699 +       {0x74,0x0E,0x1},
2700 +       {0x75,0xD6,0x1},
2701 +       {0x76,0x18,0x1},
2702 +       {0x77,0xF5,0x1},
2703 +       {0x78,0x0E,0x1},
2704 +       {0x79,0xD6,0x1},
2705 +       {0x7a,0x28,0x1},
2706 +       {0x7b,0xE6,0x1},
2707 +       {0x50,0x00,0x1},
2708 +       {0x5c,0x00,0x1},
2709 +
2710 +       // page 0
2711 +       {0xec,0x00,0x0},
2712 +       {0x79,0x01,0x0},
2713 +       {0x58,0x90,0x0},
2714 +       {0x59,0xA0,0x0},
2715 +       {0x5a,0x50,0x0},
2716 +       {0x5b,0x70,0x0},
2717 +       {0x5c,0xD0,0x0},
2718 +       {0x5d,0xC0,0x0},
2719 +       {0x5e,0x28,0x0},
2720 +       {0x5f,0x08,0x0},
2721 +       {0x50,0x90,0x0},
2722 +       {0x51,0xA0,0x0},
2723 +       {0x52,0x50,0x0},
2724 +       {0x53,0x70,0x0},
2725 +       {0x54,0xD0,0x0},
2726 +       {0x55,0xC0,0x0},
2727 +       {0x56,0x28,0x0},
2728 +       {0x57,0x00,0x0},
2729 +       {0x48,0x90,0x0},
2730 +       {0x49,0xA0,0x0},
2731 +       {0x4a,0x50,0x0},
2732 +       {0x4b,0x70,0x0},
2733 +       {0x4c,0xD0,0x0},
2734 +       {0x4d,0xC0,0x0},
2735 +       {0x4e,0x28,0x0},
2736 +       {0x4f,0x08,0x0},
2737 +       {0x72,0x82,0x0}, // main clock = 24MHz:0xd2, 16M:0x82, 12M:0x54
2738 +       {0x75,0x05,0x0} // absolute vertical mirror.  junon
2739 +
2740 +};
2741 +
2742 +
2743 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
2744 +#define S5X532_RISC_REGS 0xEB
2745 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
2746 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
2747 +
2748 +
2749 +#define PAGE_ADDRESS      0xEC
2750 +
2751 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
2752 +#define S5X532_REGS (0x1000)
2753 +
2754 +
2755 +
2756 +#endif
2757 +
2758 +
2759 diff --git a/arch/arm/mach-s3c2440/camera/s5x532_rev36.h b/arch/arm/mach-s3c2440/camera/s5x532_rev36.h
2760 new file mode 100644
2761 index 0000000..b662e9c
2762 --- /dev/null
2763 +++ b/arch/arm/mach-s3c2440/camera/s5x532_rev36.h
2764 @@ -0,0 +1,208 @@
2765 +/*
2766 + * 2004 (C) Samsung Electronics
2767 + *  SW.LEE <hitchcar@sec.samsung.com>
2768 + * This file is subject to the terms and conditions of the GNU General Public
2769 + * License 2. See the file COPYING in the main directory of this archive
2770 + * for more details.
2771 + */
2772 +
2773 +
2774 +#ifndef _SMDK2440_S5X532_H_
2775 +#define _SMDK2440_S5X532_H_
2776 +
2777 +
2778 +#define CHIP_DELAY 0xFF
2779 +
2780 +typedef struct samsung_t{
2781 +       unsigned char subaddr;
2782 +       unsigned char value;
2783 +       unsigned char page;
2784 +} s5x532_t;
2785 +
2786 +s5x532_t s5x532_reg[] = {
2787 +
2788 +       //=============== page0 ===============//
2789 +       {0xec,0x00,0x00},
2790 +       {0x02,0x00,0x00},
2791 +       {0x14,0x60,0x00},
2792 +       {0x15,0x60,0x00},
2793 +       {0x16,0x60,0x00},
2794 +       {0x1b,0x20,0x00},
2795 +       {0x1c,0x20,0x00},
2796 +       {0x1d,0x20,0x00},
2797 +       {0x1e,0x20,0x00},
2798 +       {0x72,0xdc,0x00},
2799 +       {0x73,0x11,0x00},
2800 +       {0x76,0x82,0x00},
2801 +       {0x77,0x90,0x00},
2802 +       {0x78,0x6c,0x00},
2803 +       {0x0a,0x02,0x00},
2804 +       {0x34,0x0d,0x00},
2805 +       {0x35,0x0a,0x00},
2806 +       {0x36,0x05,0x00},
2807 +       {0x37,0x05,0x00},
2808 +       {0x38,0x06,0x00},
2809 +       {0x39,0x08,0x00},
2810 +       {0x3A,0x0d,0x00},
2811 +       {0x3B,0x0d,0x00},
2812 +       {0x3C,0x18,0x00},
2813 +       {0x3D,0xE0,0x00},
2814 +       {0x3E,0x20,0x00},
2815 +       {0x66,0x02,0x00},
2816 +       {0x6c,0x40,0x00},
2817 +       {0x7c,0x01,0x00},
2818 +       {0x0D,0x24,0x00},
2819 +       {0x40,0x1B,0x00},
2820 +       {0x41,0x4F,0x00},
2821 +       {0x42,0x24,0x00},
2822 +       {0x43,0x3E,0x00},
2823 +       {0x44,0x32,0x00},
2824 +       {0x45,0x30,0x00},
2825 +       {0x48,0xa0,0x00},
2826 +       {0x49,0xd0,0x00},
2827 +       {0x4A,0x28,0x00},
2828 +       {0x4B,0x7d,0x00},
2829 +       {0x4C,0xd0,0x00},
2830 +       {0x4D,0xe0,0x00},
2831 +       {0x4E,0x1a,0x00},
2832 +       {0x4F,0xa0,0x00},
2833 +       {0x50,0xc0,0x00},
2834 +       {0x51,0xc0,0x00},
2835 +       {0x52,0x42,0x00},
2836 +       {0x53,0x7e,0x00},
2837 +       {0x54,0xc0,0x00},
2838 +       {0x55,0xf0,0x00},
2839 +       {0x56,0x1e,0x00},
2840 +       {0x57,0xe0,0x00},
2841 +       {0x58,0xc0,0x00},
2842 +       {0x59,0xa0,0x00},
2843 +       {0x5A,0x4a,0x00},
2844 +       {0x5B,0x7e,0x00},
2845 +       {0x5C,0xc0,0x00},
2846 +       {0x5D,0xf0,0x00},
2847 +       {0x5E,0x2a,0x00},
2848 +       {0x5F,0x10,0x00},
2849 +       {0x79,0x00,0x00},
2850 +       {0x7a,0x00,0x00},
2851 +       {0xe0,0x0f,0x00},
2852 +       {0xe3,0x14,0x00},
2853 +       {0xe5,0x48,0x00},
2854 +       {0xe7,0x58,0x00},
2855 +
2856 +       //=============== page1 ===============//
2857 +       {0xec,0x01,0x01},
2858 +       {0x10,0x05,0x01},
2859 +       {0x20,0xde,0x01},
2860 +       {0x0b,0x06,0x01},
2861 +       {0x30,0x00,0x01},
2862 +       {0x31,0x00,0x01},
2863 +       {0x32,0x00,0x01},
2864 +       {0x24,0x28,0x01},
2865 +       {0x25,0x3F,0x01},
2866 +       {0x26,0x65,0x01},
2867 +       {0x27,0xA1,0x01},
2868 +       {0x28,0xFF,0x01},
2869 +       {0x29,0x96,0x01},
2870 +       {0x2A,0x85,0x01},
2871 +       {0x2B,0xFF,0x01},
2872 +       {0x2C,0x00,0x01},
2873 +       {0x2D,0x1B,0x01},
2874 +       {0xB0,0x28,0x01},
2875 +       {0xB1,0x3F,0x01},
2876 +       {0xB2,0x65,0x01},
2877 +       {0xB3,0xA1,0x01},
2878 +       {0xB4,0xFF,0x01},
2879 +       {0xB5,0x96,0x01},
2880 +       {0xB6,0x85,0x01},
2881 +       {0xB7,0xFF,0x01},
2882 +       {0xB8,0x00,0x01},
2883 +       {0xB9,0x1B,0x01},
2884 +       {0x15,0x15,0x01},
2885 +       {0x18,0x85,0x01},
2886 +       {0x1f,0x05,0x01},
2887 +       {0x87,0x40,0x01},
2888 +       {0x37,0x60,0x01},
2889 +       {0x38,0xd5,0x01},
2890 +       {0x48,0xa0,0x01},
2891 +       {0x61,0x54,0x01},
2892 +       {0x62,0x54,0x01},
2893 +       {0x63,0x14,0x01},
2894 +       {0x64,0x14,0x01},
2895 +       {0x6d,0x12,0x01},
2896 +       {0x78,0x09,0x01},
2897 +       {0x79,0xD7,0x01},
2898 +       {0x7A,0x14,0x01},
2899 +       {0x7B,0xEE,0x01},
2900 +
2901 +       //=============== page2 ===============//
2902 +       {0xec,0x02,0x02},
2903 +       {0x2c,0x76,0x02},
2904 +       {0x25,0x25,0x02},
2905 +       {0x27,0x27,0x02},
2906 +       {0x30,0x29,0x02},
2907 +       {0x36,0x08,0x02},
2908 +       {0x38,0x04,0x02},
2909 +
2910 +       //=============== page3 ===============//
2911 +       {0xec,0x03,0x03},
2912 +       {0x08,0x00,0x03},
2913 +       {0x09,0x33,0x03},
2914 +
2915 +       //=============== page4 ===============//
2916 +       {0xec,0x04,0x04},
2917 +       {0x00,0x21,0x04},
2918 +       {0x01,0x00,0x04},
2919 +       {0x02,0x9d,0x04},
2920 +       {0x03,0x02,0x04},
2921 +       {0x04,0x04,0x04},
2922 +       {0x05,0x00,0x04},
2923 +       {0x06,0x1f,0x04},
2924 +       {0x07,0x02,0x04},
2925 +       {0x08,0x21,0x04},
2926 +       {0x09,0x00,0x04},
2927 +       {0x0a,0x9d,0x04},
2928 +       {0x0b,0x02,0x04},
2929 +       {0x0c,0x04,0x04},
2930 +       {0x0d,0x00,0x04},
2931 +       {0x0e,0x20,0x04},
2932 +       {0x0f,0x02,0x04},
2933 +       {0x1b,0x3c,0x04},
2934 +       {0x1c,0x3c,0x04},
2935 +
2936 +       //=============== page5 ===============//
2937 +       {0xec,0x05,0x05},
2938 +       {0x1f,0x00,0x05},
2939 +       {0x08,0x59,0x05},
2940 +       {0x0a,0x71,0x05},
2941 +       {0x1e,0x23,0x05},
2942 +       {0x0e,0x3c,0x05},
2943 +
2944 +       //=============== page7 ===============//
2945 +       {0xec,0x07,0x07},
2946 +       {0x11,0xfe,0x07},
2947 +
2948 +       // added by junon
2949 +       {0xec,0x01,0x07},
2950 +       {0x10,0x26,0x07},
2951 +       // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
2952 +
2953 +
2954 +};
2955 +
2956 +
2957 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
2958 +#define S5X532_RISC_REGS 0xEB
2959 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
2960 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
2961 +
2962 +
2963 +#define PAGE_ADDRESS      0xEC
2964 +
2965 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
2966 +#define S5X532_REGS (0x1000)
2967 +
2968 +
2969 +
2970 +#endif
2971 +
2972 +
2973 diff --git a/arch/arm/mach-s3c2440/camera/sensor.h b/arch/arm/mach-s3c2440/camera/sensor.h
2974 new file mode 100644
2975 index 0000000..e28d01c
2976 --- /dev/null
2977 +++ b/arch/arm/mach-s3c2440/camera/sensor.h
2978 @@ -0,0 +1,20 @@
2979 +/*
2980 + *
2981 + *  Copyright (C) 2004 Samsung Electronics
2982 + *            SW.LEE <hitchcar@sec.samsung.com>
2983 + *
2984 + * This program is free software; you can redistribute it and/or modify
2985 + * it under the terms of the GNU General Public License version 2 as
2986 + * published by the Free Software Foundation.
2987 + */
2988 +
2989 +#ifndef __SENSOR_CMD_H_
2990 +#define __SENSOR_CMD_H_
2991 +
2992 +#include "bits.h"
2993 +
2994 +#define SENSOR_INIT    BIT0
2995 +#define USER_ADD        BIT1
2996 +#define USER_EXIT       BIT2
2997 +
2998 +#endif
2999 diff --git a/arch/arm/mach-s3c2440/camera/sxga.h b/arch/arm/mach-s3c2440/camera/sxga.h
3000 new file mode 100644
3001 index 0000000..b41305a
3002 --- /dev/null
3003 +++ b/arch/arm/mach-s3c2440/camera/sxga.h
3004 @@ -0,0 +1,504 @@
3005 +/*
3006 + * 2004 (C) Samsung Electronics
3007 + *  SW.LEE <hitchcar@sec.samsung.com>
3008 + * This file is subject to the terms and conditions of the GNU General Public
3009 + * License 2. See the file COPYING in the main directory of this archive
3010 + * for more details.
3011 + */
3012 +
3013 +
3014 +#ifndef _SAMSUNG_SXGA_H_
3015 +#define _SAMSUNG_SXGA_H_
3016 +
3017 +
3018 +#define CHIP_DELAY 0xFF
3019 +
3020 +typedef struct samsung_t{
3021 +       unsigned char subaddr;
3022 +       unsigned char value;
3023 +       unsigned char page;
3024 +} s5x532_t;
3025 +
3026 +s5x532_t s5x532_reg[] = {
3027 +       // page 0
3028 +       {0xec,0x00,0x0},
3029 +       {0x0c,0x38,0x0},
3030 +       {0x0d,0x24,0x0},
3031 +       {0x13,0x10,0x0},
3032 +       {0x14,0x10,0x0},
3033 +       {0x15,0x10,0x0},
3034 +       {0x16,0x10,0x0},
3035 +       {0x17,0x20,0x0},
3036 +       {0x18,0x30,0x0},
3037 +       {0x19,0x30,0x0},
3038 +       {0x1a,0x10,0x0},
3039 +       {0x1b,0x10,0x0},
3040 +
3041 +       {0x2d,0x40,0x0},
3042 +       {0x3e,0x10,0x0},
3043 +       {0x34,0x0a,0x0},
3044 +       {0x39,0x04,0x0},
3045 +       {0x3a,0x02,0x0},
3046 +       {0x31,0x05,0x0},
3047 +
3048 +       {0x40,0x1d,0x0},
3049 +       {0x41,0x50,0x0},
3050 +       {0x42,0x24,0x0},
3051 +       {0x43,0x3f,0x0},
3052 +       {0x44,0x30,0x0},
3053 +       {0x45,0x31,0x0},
3054 +
3055 +       {0x48,0xa0,0x0},
3056 +       {0x49,0xc0,0x0},
3057 +       {0x4a,0x58,0x0},
3058 +       {0x4b,0x50,0x0},
3059 +       {0x4c,0xb0,0x0},
3060 +       {0x4d,0xc0,0x0},
3061 +       {0x4e,0x30,0x0},
3062 +       {0x4f,0x20,0x0},
3063 +
3064 +       {0x50,0xa0,0x0},
3065 +       {0x51,0xc0,0x0},
3066 +       {0x52,0x50,0x0},
3067 +       {0x53,0x60,0x0},
3068 +       {0x54,0xb0,0x0},
3069 +       {0x55,0xc0,0x0},
3070 +       {0x56,0x20,0x0},
3071 +       {0x57,0x08,0x0},
3072 +//     {0x72,0x50,0x0}, // Clock 16
3073 +       {0x72,0x78,0x0}, // Clock 24Mhz
3074 +//     {0x72,0xf0,0x0}, // Clock 48Mhz
3075 +       // page 1
3076 +       {0xec,0x01,0x1},
3077 +       {0x10,0x17,0x1}, // ITU-R601
3078 +                        /*
3079 +                          [3:2] : out_sel
3080 +                            00 : 656
3081 +                            01 : 601
3082 +                            10 : RGB
3083 +                            11 : CIS
3084 +                          [1] : YC_SEL
3085 +                          [0] : CBCR_SEL
3086 +                        */
3087 +
3088 +       {0x0b,0x06,0x1}, // 6
3089 +       {0x20,0xa8,0x1}, //b0); // Highlight C Supp 040215
3090 +       {0x22,0x26,0x1}, //2f); 040225
3091 +
3092 +       {0x24,0x08,0x1}, //00); //1F); 040226
3093 +       {0x25,0x10,0x1}, //10); //34);
3094 +       {0x26,0x40,0x1}, //56);
3095 +       {0x27,0x80,0x1}, //8D);
3096 +       {0x28,0x2c,0x1}, //E7);
3097 +       {0x29,0xd6,0x1}, //7C);
3098 +       {0x2A,0x0c,0x1}, //70);
3099 +       {0x2B,0xFF,0x1}, //FF);
3100 +       {0x2C,0x00,0x1}, //00);
3101 +       {0x2D,0x5f,0x1}, //1B);
3102 +       //
3103 +       {0xB0,0x08,0x1}, //00); //1F); 040226
3104 +       {0xB1,0x10,0x1}, //10); //34);50
3105 +       {0xB2,0x40,0x1}, //36);
3106 +       {0xB3,0x80,0x1}, //6D);
3107 +       {0xB4,0x2c,0x1}, //b7);
3108 +       {0xB5,0xd6,0x1}, //7C);
3109 +       {0xB6,0x0c,0x1}, //70);
3110 +       {0xB7,0xFF,0x1}, //FF);
3111 +       {0xB8,0x00,0x1}, //00);
3112 +       {0xB9,0x5f,0x1}, //1B);
3113 +
3114 +
3115 +       {0xc2,0x01,0x1}, // shading On
3116 +       {0xc3,0x80,0x1},
3117 +       {0xc4,0x02,0x1},
3118 +       {0xc5,0x00,0x1},
3119 +       {0xc6,0x01,0x1},
3120 +       {0xc7,0x00,0x1},
3121 +       {0xc8,0x05,0x1},
3122 +       {0xc9,0x00,0x1},
3123 +       {0xca,0x04,0x1},
3124 +
3125 +       // shading 5
3126 +       {0xd0,0xb5,0x1},
3127 +       {0xd1,0x9c,0x1},
3128 +       {0xd2,0x8d,0x1},
3129 +       {0xd3,0x84,0x1},
3130 +       {0xd4,0x84,0x1},
3131 +       {0xd5,0x91,0x1},
3132 +       {0xd6,0xa0,0x1},
3133 +       {0xd7,0xb5,0x1},
3134 +
3135 +       {0xd8,0xc0,0x1},
3136 +       {0xd9,0xa6,0x1},
3137 +       {0xda,0x93,0x1},
3138 +       {0xdb,0x85,0x1},
3139 +       {0xdc,0x85,0x1},
3140 +       {0xdd,0x90,0x1},
3141 +       {0xde,0xa0,0x1},
3142 +       {0xdf,0xb8,0x1},
3143 +
3144 +       // Page 2
3145 +       {0xec,0x02,0x02},
3146 +
3147 +       {0x2d,0x02,0x02},
3148 +       {0x20,0x13,0x02},
3149 +       {0x21,0x13,0x2},
3150 +       {0x22,0x13,0x2},
3151 +       {0x23,0x13,0x2},
3152 +       {0x2e,0x85,0x2},
3153 +       {0x2f,0x34,0x2},
3154 +       {0x30,0x00,0x2},
3155 +       {0x28,0x94,0x2},
3156 +
3157 +
3158 +       // page 3
3159 +       {0xec,0x03,0x03},
3160 +       {0x10,0x00,0x3},
3161 +       {0x20,0x00,0x3},
3162 +       {0x21,0x20,0x3},
3163 +       {0x22,0x00,0x3},
3164 +       {0x23,0x00,0x3},
3165 +       {0x40,0x20,0x3},
3166 +       {0x41,0x20,0x3},
3167 +       {0x42,0x20,0x3},
3168 +       {0x43,0x20,0x3},
3169 +       {0x60,0x00,0x3},
3170 +       {0x61,0x00,0x3},
3171 +       {0x62,0x00,0x3},
3172 +       {0x63,0x00,0x3},
3173 +       {0x64,0x04,0x3},
3174 +       {0x65,0x1C,0x3},
3175 +       {0x66,0x05,0x3},
3176 +       {0x67,0x1C,0x3},
3177 +       {0x68,0x00,0x3},
3178 +       {0x69,0x2D,0x3},
3179 +       {0x6a,0x00,0x3},
3180 +       {0x6b,0x72,0x3},
3181 +       {0x6c,0x00,0x3},
3182 +       {0x6d,0x00,0x3},
3183 +       {0x6e,0x16,0x3}, // 2.38
3184 +       {0x6f,0x16,0x3}, // 2.38
3185 +       {0x70,0x00,0x3},
3186 +       {0x71,0x00,0x3},
3187 +       {0x72,0x45,0x3},
3188 +       {0x73,0x00,0x3},
3189 +       {0x74,0x1C,0x3},
3190 +       {0x75,0x05,0x3},
3191 +
3192 +       {0x80,0x00,0x3},  //for 0.02 _ 44
3193 +       {0x81,0x00,0x3},
3194 +       {0x82,0x00,0x3},
3195 +       {0x83,0x00,0x3},
3196 +       {0x84,0x04,0x3},
3197 +       {0x85,0x1c,0x3},
3198 +       {0x86,0x05,0x3},
3199 +       {0x87,0x1c,0x3},
3200 +       {0x88,0x00,0x3},
3201 +       {0x89,0x2d,0x3},
3202 +       {0x8a,0x00,0x3},
3203 +       {0x8b,0xcc,0x3},
3204 +       {0x8c,0x00,0x3},
3205 +       {0x8d,0x00,0x3},
3206 +       {0x8e,0x08,0x3},
3207 +       {0x8f,0x08,0x3},
3208 +       {0x90,0x01,0x3},
3209 +       {0x91,0x00,0x3},
3210 +       {0x92,0x91,0x3},
3211 +       {0x93,0x00,0x3},
3212 +       {0x94,0x88,0x3},
3213 +       {0x95,0x02,0x3},
3214 +
3215 +
3216 +
3217 +       // page 4
3218 +       {0xec,0x04,0x04},
3219 +       {0x3f,0x09,0x04}, // VGA : old board :0x08 , new board ; 0X09
3220 +       {0x18,0x00,0x04},  // sxga
3221 +       {0x1c,0x41,0x04},
3222 +       {0x20,0x41,0x04}, // vga center 040215
3223 +       {0x22,0xc1,0x04},// a1);
3224 +       {0x23,0x02,0x04},
3225 +       {0x28,0x41,0x04},
3226 +       {0x2a,0xc1,0x04},// a1);
3227 +       {0x2b,0x02,0x04},
3228 +
3229 +       {0x3c,0x0b,0x04}, //f);  // vga
3230 +       {0x58,0x11,0x04},
3231 +       {0x5c,0x14,0x04},
3232 +       {0x60,0x21,0x04},
3233 +       {0x61,0x00,0x04},
3234 +       {0x62,0xB1,0x04},
3235 +       {0x63,0x02,0x04},
3236 +       {0x64,0x01,0x04},
3237 +       {0x65,0x00,0x04},
3238 +       {0x66,0x01,0x04},
3239 +       {0x67,0x02,0x04},
3240 +       {0x68,0x21,0x04},
3241 +       {0x69,0x00,0x04},
3242 +       {0x6a,0xB1,0x04},
3243 +       {0x6b,0x02,0x04},
3244 +       {0x6c,0x01,0x04},
3245 +       {0x6d,0x00,0x04},
3246 +       {0x6e,0x01,0x04},
3247 +       {0x6f,0x02,0x04},
3248 +       {0x70,0x2D,0x04},
3249 +       {0x71,0x00,0x04},
3250 +       {0x72,0xd3,0x04}, // 14
3251 +       {0x73,0x05,0x04}, // 15
3252 +       {0x74,0x1C,0x04},
3253 +       {0x75,0x05,0x04},
3254 +       {0x76,0x1b,0x04}, // HendL
3255 +       {0x77,0x0b,0x04}, // HendH
3256 +       {0x78,0x01,0x04}, // 5.00
3257 +       {0x79,0x80,0x04}, // 5.2a
3258 +       {0x7a,0x33,0x04},
3259 +       {0x7b,0x00,0x04},
3260 +       {0x7c,0x38,0x04}, // 5.0e
3261 +       {0x7d,0x03,0x04},
3262 +       {0x7e,0x00,0x04},
3263 +       {0x7f,0x0A,0x04},
3264 +
3265 +       {0x80,0x2e,0x04},
3266 +       {0x81,0x00,0x04},
3267 +       {0x82,0xae,0x04},
3268 +       {0x83,0x02,0x04},
3269 +       {0x84,0x00,0x04},
3270 +       {0x85,0x00,0x04},
3271 +       {0x86,0x01,0x04},
3272 +       {0x87,0x02,0x04},
3273 +       {0x88,0x2e,0x04},
3274 +       {0x89,0x00,0x04},
3275 +       {0x8a,0xae,0x04},
3276 +       {0x8b,0x02,0x04},
3277 +       {0x8c,0x1c,0x04},
3278 +       {0x8d,0x00,0x04},
3279 +       {0x8e,0x04,0x04},
3280 +       {0x8f,0x02,0x04},
3281 +       {0x90,0x2d,0x04},
3282 +       {0x91,0x00,0x04},
3283 +       {0x92,0xa5,0x04},
3284 +       {0x93,0x00,0x04},
3285 +       {0x94,0x88,0x04},
3286 +       {0x95,0x02,0x04},
3287 +       {0x96,0xb3,0x04},
3288 +       {0x97,0x06,0x04},
3289 +       {0x98,0x01,0x04},
3290 +       {0x99,0x00,0x04},
3291 +       {0x9a,0x33,0x04},
3292 +       {0x9b,0x30,0x04},
3293 +       {0x9c,0x50,0x04},
3294 +       {0x9d,0x30,0x04},
3295 +       {0x9e,0x01,0x04},
3296 +       {0x9f,0x08,0x04},
3297 +
3298 +       // page 5
3299 +       {0xec,0x05,0x05},
3300 +       {0x5a,0x22,0x05},
3301 +
3302 +       // page 6
3303 +       {0xec,0x06,0x06},
3304 +       {0x14,0x1e,0x06},
3305 +       {0x15,0xb4,0x04},
3306 +       {0x16,0x25,0x04},
3307 +       {0x17,0x74,0x04},
3308 +
3309 +       {0x10,0x48,0x04},
3310 +       {0x11,0xa0,0x04},
3311 +       {0x12,0x40,0x04},  // 040216  AE1 window ÁÙÀÓ
3312 +       {0x13,0x70,0x04},
3313 +
3314 +       {0x1a,0x29,0x04},  // 040217  AWB window ÁÙÀÓ
3315 +       {0x30,0x40,0x04},
3316 +       {0x31,0xa2,0x04},
3317 +       {0x32,0x50,0x04},
3318 +       {0x33,0xbc,0x04},
3319 +       {0x34,0x10,0x04},
3320 +       {0x35,0xd2,0x04},
3321 +       {0x36,0x18,0x04},
3322 +       {0x37,0xf5,0x04},
3323 +       {0x38,0x10,0x04},
3324 +       {0x39,0xd3,0x04},
3325 +       {0x3a,0x1a,0x04},
3326 +       {0x3b,0xf0,0x04},
3327 +
3328 +       // page 7
3329 +       {0xec,0x07,0x07},
3330 +       {0x08,0xff,0x7},
3331 +       {0x38,0x01,0x7}, //07); 040315
3332 +       {0x39,0x01,0x7}, //02); //4);  040223   040315
3333 +       {0x11,0xfe,0x7},  //fe);   // green -2  040303
3334 +       {0x2a,0x20,0x7},
3335 +       {0x2b,0x20,0x7},
3336 +       {0x2c,0x10,0x7},
3337 +       {0x2d,0x00,0x7},
3338 +       {0x2e,0xf0,0x7},
3339 +       {0x2f,0xd0,0x7},
3340 +       {0x3a,0xf0,0x7},
3341 +       {0x23,0x07,0x7},  //  for ESD
3342 +
3343 +       // page 0
3344 +       {0xec,0x00,0x00},
3345 +       {0x8a,0x04,0x00},
3346 +
3347 +       // page 1
3348 +       {0xec,0x01,0x01},
3349 +       {0xe5,0xb0,0x01},
3350 +       {0xe5,0xb0,0x01},
3351 +       {0xc2,0x01,0x01},
3352 +
3353 +       {0x61,0x7b,0x01},
3354 +       {0x62,0x7b,0x01},
3355 +       {0x63,0x1b,0x01},
3356 +       {0x64,0x1b,0x01},
3357 +
3358 +       // page 0
3359 +       {0xec,0x00,0x00},
3360 +       {0x7e,0x04,0x00},
3361 +
3362 +       // page 4
3363 +       {0xec,0x04,0x04},
3364 +       {0x04,0x02,0x04},
3365 +       {0x06,0x02,0x04},
3366 +
3367 +       // page 1
3368 +       {0xec,0x01,0x01},
3369 +       {0x10,0x05,0x01},
3370 +       {0x54,0x02,0x01},
3371 +       {0x56,0x02,0x01},
3372 +
3373 +       // page 3
3374 +       {0xec,0x03,0x03},
3375 +       {0x0e,0x08,0x03},
3376 +       {0x0f,0x08,0x03},
3377 +
3378 +       // page 4
3379 +       {0xec,0x04,0x04},
3380 +       {0x00,0x30,0x04},
3381 +       {0x0a,0x30,0x04},
3382 +
3383 +       // page 5
3384 +       {0xec,0x05,0x05},
3385 +       {0x08,0x33,0x05},
3386 +
3387 +       // page 0
3388 +       {0xec,0x00,0x00},
3389 +       {0x02,0x00,0x00},
3390 +
3391 +       // page 4
3392 +//scale out
3393 +       {0xec,0x04,0x04},
3394 +       {0x02,0x20,0x04},
3395 +       {0x1c,0x4f,0x04},
3396 +
3397 +       // page 1
3398 +       {0xec,0x01,0x01},
3399 +       {0x52,0x20,0x01},
3400 +
3401 +       // page 5
3402 +       {0xec,0x05,0x05},
3403 +       {0x0e,0x4f,0x05},
3404 +
3405 +//ae speed
3406 +       // page 0
3407 +       {0xec,0x00,0x00},
3408 +       {0x92,0x80,0x00},
3409 +       {0x93,0x02,0x00},
3410 +       {0x94,0x04,0x00},
3411 +       {0x95,0x04,0x00},
3412 +       {0x96,0x04,0x00},
3413 +       {0x97,0x04,0x00},
3414 +       {0x9b,0x47,0x00},
3415 +
3416 +       {0xec,0x00,0x00},
3417 +       {0x40,0x17,0x00},
3418 +       {0x41,0x4c,0x00},
3419 +       {0x42,0x1d,0x00},
3420 +       {0x43,0x3e,0x00},
3421 +       {0x44,0x2a,0x00},
3422 +       {0x45,0x2d,0x00},
3423 +
3424 +       {0xec,0x01,0x01},
3425 +       {0x20,0xd0,0x01},   //high light color reference
3426 +
3427 +       {0xec,0x00,0x00},
3428 +       {0x7e,0x00,0x00},
3429 +       {0x73,0x11,0x00}, // 41
3430 +       {0x78,0x78,0x00},
3431 +
3432 +       {0xec,0x07,0x07},
3433 +       {0x1b,0x3e,0x07},
3434 +
3435 +       {0xec,0x00,0x00},
3436 +       {0x48,0xA0,0x00}, //s48C0
3437 +       {0x49,0xB0,0x00}, //s49B0
3438 +       {0x4a,0x30,0x00}, //s4a20
3439 +       {0x4b,0x70,0x00}, //s4b70
3440 +       {0x4c,0xD0,0x00}, //s4cA0
3441 +       {0x4d,0xB0,0x00}, //s4dB0
3442 +       {0x4e,0x30,0x00}, //s4e30
3443 +       {0x4f,0xF0,0x00}, //s4fF0
3444 +       {0x50,0xA0,0x00}, //s50D0
3445 +       {0x51,0xB0,0x00}, //s51B0
3446 +       {0x52,0x25,0x00}, //s5210
3447 +       {0x53,0x70,0x00}, //s5370
3448 +       {0x54,0xD0,0x00}, //s5490
3449 +       {0x55,0xD0,0x00}, //s55B0
3450 +       {0x56,0x3A,0x00}, //s5640
3451 +       {0x57,0xD0,0x00}, //s57D0
3452 +       {0x58,0xA0,0x00}, //s58D0
3453 +       {0x59,0xA0,0x00}, //s59B0
3454 +       {0x5a,0x32,0x00}, //s5a0A
3455 +       {0x5b,0x7A,0x00}, //s5b7A
3456 +       {0x5c,0xB0,0x00}, //s5c90
3457 +       {0x5d,0xC0,0x00}, //s5dC0
3458 +       {0x5e,0x3E,0x00}, //s5e4A
3459 +       {0x5f,0xfa,0x00}, //s5fD0
3460 +
3461 +       // gamma
3462 +       {0xec,0x01,0x01},
3463 +       {0x24,0x31,0x01},
3464 +       {0x25,0x4C,0x01},
3465 +       {0x26,0x75,0x01},
3466 +       {0x27,0xB5,0x01},
3467 +       {0x28,0x17,0x01},
3468 +       {0x29,0xAE,0x01},
3469 +       {0x2A,0x97,0x01},
3470 +       {0x2B,0xFF,0x01},
3471 +       {0x2C,0x00,0x01},
3472 +       {0x2D,0x5B,0x01},
3473 +
3474 +       {0xB0,0x31,0x01},
3475 +       {0xB1,0x4C,0x01},
3476 +       {0xB2,0x75,0x01},
3477 +       {0xB3,0xB5,0x01},
3478 +       {0xB4,0x17,0x01},
3479 +       {0xB5,0xAE,0x01},
3480 +       {0xB6,0x97,0x01},
3481 +       {0xB7,0xFF,0x01},
3482 +       {0xB8,0x00,0x01},
3483 +       {0xB9,0x5B,0x01},
3484 +
3485 +       {0xec,0x00,0x00},
3486 +       {0x77,0xb0,0x00},
3487 +       {0x39,0x06,0x00},
3488 +       {0x3a,0x08,0x00},
3489 +
3490 +};
3491 +
3492 +
3493 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
3494 +#define S5X532_RISC_REGS 0xEB
3495 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
3496 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
3497 +
3498 +
3499 +#define PAGE_ADDRESS      0xEC
3500 +
3501 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
3502 +#define S5X532_REGS (0x1000)
3503 +
3504 +
3505 +
3506 +#endif
3507 +
3508 +
3509 diff --git a/arch/arm/mach-s3c2440/camera/userapp.h b/arch/arm/mach-s3c2440/camera/userapp.h
3510 new file mode 100644
3511 index 0000000..9203378
3512 --- /dev/null
3513 +++ b/arch/arm/mach-s3c2440/camera/userapp.h
3514 @@ -0,0 +1,44 @@
3515 +/*
3516 +    Character Driver API Interface
3517 +
3518 +    Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
3519 +
3520 +    This program is free software; you can redistribute it and/or modify
3521 +    it under the terms of the GNU General Public License as published by
3522 +    the Free Software Foundation; either version 2 of the License, or
3523 +    (at your option) any later version.
3524 +
3525 +*/
3526 +
3527 +#ifndef __FIMC20_CAMIF_USR_APP_H_
3528 +#define __FIMC20_CAMIF_USR_APP_H_
3529 +
3530 +
3531 +/*
3532 + * IOCTL Command for Character Driver
3533 + */
3534 +
3535 +#define CMD_CAMERA_INIT   0x23
3536 +/*  Test Application Usage */
3537 +typedef struct {
3538 +        int src_x;
3539 +        int src_y;
3540 +        int dst_x;
3541 +        int dst_y;
3542 +        int bpp;
3543 +        int flip;
3544 +} camif_param_t;
3545 +
3546 +
3547 +
3548 +#endif
3549 +
3550 +
3551 +/*
3552 + * Local variables:
3553 + * tab-width: 8
3554 + *  c-indent-level: 8
3555 + *  c-basic-offset: 8
3556 + *  c-set-style: "K&R"
3557 + * End:
3558 + */
3559 diff --git a/arch/arm/mach-s3c2440/camera/v4l2_api.c b/arch/arm/mach-s3c2440/camera/v4l2_api.c
3560 new file mode 100644
3561 index 0000000..13aed36
3562 --- /dev/null
3563 +++ b/arch/arm/mach-s3c2440/camera/v4l2_api.c
3564 @@ -0,0 +1,311 @@
3565 +/*
3566 + * . 2004-01-03: SW.LEE <hitchcar@sec.samsung.com>
3567 + *
3568 + * This file is subject to the terms and conditions of the GNU General Public
3569 + * License 2. See the file COPYING in the main directory of this archive
3570 + * for more details.
3571 + */
3572 +
3573 +#include <linux/config.h>
3574 +#include <linux/module.h>
3575 +#include <linux/kernel.h>
3576 +#include <linux/init.h>
3577 +#include <linux/sched.h>
3578 +#include <linux/irq.h>
3579 +#include <linux/tqueue.h>
3580 +#include <linux/locks.h>
3581 +#include <linux/completion.h>
3582 +#include <linux/delay.h>
3583 +#include <linux/slab.h>
3584 +#include <linux/vmalloc.h>
3585 +#include <linux/miscdevice.h>
3586 +#include <linux/wait.h>
3587 +
3588 +#include <asm/io.h>
3589 +#include <asm/semaphore.h>
3590 +#include <asm/hardware.h>
3591 +#include <asm/uaccess.h>
3592 +
3593 +#include <asm/arch/cpu_s3c2440.h>
3594 +#include <asm/arch/S3C2440.h>
3595 +
3596 +#include "camif.h"
3597 +#include "videodev.h"
3598 +
3599 +/*
3600 +  Codec_formats/Preview_format[0] must be same to initial value of
3601 +  preview_init_param/codec_init_param
3602 +*/
3603 +
3604 +const struct v4l2_fmtdesc codec_formats[] = {
3605 +       {
3606 +               .index     = 0,
3607 +               .type      = V4L2_BUF_TYPE_VIDEO_CAPTURE,
3608 +//             .flags     = FORMAT_FLAGS_PLANAR,
3609 +               .description = "4:2:2, planar, Y-Cb-Cr",
3610 +               .pixelformat = V4L2_PIX_FMT_YUV422P,
3611 +
3612 +       },{
3613 +               .index    = 1,
3614 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
3615 +//             .flags    = FORMAT_FLAGS_PLANAR,
3616 +               .name     = "4:2:0, planar, Y-Cb-Cr",
3617 +               .fourcc   = V4L2_PIX_FMT_YUV420,
3618 +       }
3619 +};
3620 +
3621 +
3622 +/* Todo
3623 +   FIMC V4L2_PIX_FMT_RGB565 is not same to that of V4L2spec
3624 +   and so we need image convert to FIMC V4l2_PIX_FMT_RGB565.
3625 +*/
3626 +const struct v4l2_fmtdesc preview_formats[] = {
3627 +       {
3628 +               .index    = 1,
3629 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
3630 +               .description = "16 bpp RGB, le",
3631 +               .fourcc   = V4L2_PIX_FMT_RGB565,
3632 +//             .flags    = FORMAT_FLAGS_PACKED,
3633 +       },
3634 +       {
3635 +               .index    = 0,
3636 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
3637 +//             .flags    = FORMAT_FLAGS_PACKED,
3638 +               .description = "32 bpp RGB, le",
3639 +               .fourcc   = V4L2_PIX_FMT_BGR32,
3640 +       }
3641 +}
3642 +
3643 +#define NUM_F       ARRARY_SIZE(preview_formats)
3644 +
3645 +
3646 +/*
3647 + * This function and v4l2 structure made for V4L2 API functions
3648 + *     App <--> v4l2 <--> logical param <--> hardware
3649 + */
3650 +static int camif_get_v4l2(camif_cfg_t *cfg)
3651 +{
3652 +       return 0;
3653 +}
3654 +
3655 +
3656 +/*
3657 +** Gives the depth of a video4linux2 fourcc aka pixel format in bits.
3658 +*/
3659 +static int pixfmt2depth(int pixfmt,int *fmtptr)
3660 +{
3661 +       int fmt, depth;
3662 +
3663 +       switch (pixfmt) {
3664 +       case V4L2_PIX_FMT_RGB565:
3665 +       case V4L2_PIX_FMT_RGB565X:
3666 +               fmt = CAMIF_RGB_16;
3667 +               depth = 16;
3668 +               break;
3669 +       case V4L2_PIX_FMT_BGR24: /* Not tested */
3670 +       case V4L2_PIX_FMT_RGB24:
3671 +               fmt = CAMIF_RGB_24;
3672 +               depth = 24;
3673 +               break;
3674 +       case V4L2_PIX_FMT_BGR32:
3675 +       case V4L2_PIX_FMT_RGB32:
3676 +               fmt = CAMIF_RGB_24;
3677 +               depth 32;
3678 +               break;
3679 +       case V4L2_PIX_FMT_GREY: /* Not tested  */
3680 +               fmt = CAMIF_OUT_YCBCR420;
3681 +               depth = 8;
3682 +               break;
3683 +       case V4L2_PIX_FMT_YUYV:
3684 +       case V4L2_PIX_FMT_UYVY:
3685 +       case V4L2_PIX_FMT_YUV422P:
3686 +               fmt = CAMIF_OUT_YCBCR422;
3687 +               depth = 16;
3688 +               break;
3689 +       case V4L2_PIX_FMT_YUV420:
3690 +               fmt = CAMIF_OUT_YCBCR420;
3691 +               depth = 12;
3692 +               break;
3693 +       }
3694 +       if (fmtptr) *fmtptr = fmt;
3695 +       return depth;
3696 +}
3697 +
3698 +
3699 +
3700 +static int camif_s_v4l2(camif_cfg_t *cfg)
3701 +{
3702 +       int num = cfg->v2.used_fmt;
3703 +
3704 +       if ( !(cfg->v2.status&CAMIF_V4L2_INIT)) {
3705 +               int depth;
3706 +               int fourcc = v2.fmtdesc[num].pixelformat;
3707 +
3708 +               /* To define v4l2_fmtsdesc */
3709 +               if (cfg->dma_type == CAMIF_CODEC)
3710 +                       cfg->v2->fmtdesc = codec_formats;
3711 +               else
3712 +                       cfg->v2->fmtdesc = preview_formats;
3713 +
3714 +               /* To define v4l2_format used currently */
3715 +               cfg->v2.fmt.width    = cfg->target_x;
3716 +               cfg->v2.fmt.height   = cfg->target_y;
3717 +               cfg->v2.fmt.field    = V4L2_FIELD_NONE;
3718 +               cfg->v2.fmt.pixelformat = fourcc;
3719 +               depth       = pixfmt2depth(fourcc,NULL);
3720 +               cfg->v2.fmt.bytesperline= cfg->v2.fmt.width*depth >> 3;
3721 +               cfg->v2.fmt.sizeimage =
3722 +                       cfg->v2.fmt.height * cfg->v2.fmt.bytesperline;
3723 +
3724 +               /* To define v4l2_input */
3725 +               cfg->v2.input.index  = 0;
3726 +               if (cfg->dma_type == CAMIF_CODEC)
3727 +                       snprintf(cfg->v2.input.name, 31, "CAMIF CODEC");
3728 +               else
3729 +                       snprintf(cfg->v2.input.name, 31, "CAMIF PREVIEW");
3730 +               cfg->v2.input.type = V4L2_INPUT_TYPE_CAMERA;
3731 +
3732 +               /* Write the Status of v4l2 machine */
3733 +               cfg->v2.status |= CAMIF_V4L2_INIT;
3734 +        }
3735 +       return 0;
3736 +}
3737 +
3738 +
3739 +static int camif_g_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
3740 +{
3741 +       int size = sizeof(struct v4l2_pix_format);
3742 +
3743 +       switch (f->type) {
3744 +       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
3745 +               memset(&f->fmt.pix,0,size);
3746 +               memcpy(&f->fmt.pix,&cfg->v2.fmt,size);
3747 +               return 0;
3748 +       default:
3749 +               return -EINVAL;
3750 +       }
3751 +}
3752 +
3753 +
3754 +/* Copy v4l2 parameter into other element of camif_cfg_t */
3755 +static int camif_s_try(camif_cfg_t *cfg, int f)
3756 +{
3757 +       int fmt;
3758 +       cfg->target_x = cfg->v2.fmt.width;
3759 +       cfg->target_y = cfg->v2.fmt.height;
3760 +       pixfmt2depth(cfg->v2.fmt.pixelformat,&fmt);
3761 +       cfg->fmt = fmt;
3762 +       camif_dynamic_conf(cfg);
3763 +}
3764 +
3765 +
3766 +static int camif_s_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
3767 +{
3768 +       int retval;
3769 +
3770 +       switch (f->type) {
3771 +       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
3772 +       {
3773 +               /* update our state informations */
3774 +//             down(&fh->cap.lock);
3775 +               cfg->v2.fmt          = f->pix;
3776 +               cfg->v2.status       |= CAMIF_v4L2_DIRTY;
3777 +               camif_dynamic_conf(cfg);
3778 +               cfg->v2.status      &= ~CAMIF_v4L2_DIRTY; /* dummy ? */
3779 +//             up(&fh->cap.lock);
3780 +
3781 +               return 0;
3782 +       }
3783 +       default:
3784 +               return -EINVAL;
3785 +       }
3786 +
3787 +}
3788 +
3789 +/* Refer ioctl of  videodeX.c  and bttv-driver.c */
3790 +int camif_do_ioctl
3791 +(struct inode *inode, struct file *file,unsigned int cmd, void * arg)
3792 +{
3793 +       camif_cfg_t *cfg = file->private_data;
3794 +       int ret = 0;
3795 +
3796 +       switch (cmd) {
3797 +        case VIDIOC_QUERYCAP:
3798 +               {
3799 +                       struct v4l2_capability *cap = arg;
3800 +
3801 +                       strcpy(cap->driver,"Fimc Camera");
3802 +                       strlcpy(cap->card,cfg->v->name,sizeof(cap->card));
3803 +                       sprintf(cap->bus_info,"FIMC 2.0 AHB Bus");
3804 +                       cap->version = 0;
3805 +                       cap->capabilities =
3806 +                               V4L2_CAP_VIDEO_CAPTURE |V4L2_CAP_READWRITE;
3807 +                       return 0;
3808 +               }
3809 +       case VIDIOC_G_FMT:
3810 +               {
3811 +                       struct v4l2_format *f = arg;
3812 +                       return camif_g_fmt(cfg,f);
3813 +               }
3814 +       case VIDIOC_S_FMT:
3815 +               {
3816 +                       struct v4l2_format *f = arg;
3817 +                       return camif_s_fmt(cfg,f);
3818 +               }
3819 +
3820 +       case VIDIOC_ENUM_FMT:
3821 +               {
3822 +                       struct v4l2_fmtdesc *f = arg;
3823 +                       enum v4l2_buf_type type = f->type;
3824 +                       int index = f->index;
3825 +
3826 +                       if (index >= NUM_F)
3827 +                               return -EINVAL;
3828 +                       switch (f->type) {
3829 +                       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
3830 +                               break;
3831 +                       case V4L2_BUF_TYPE_VIDEO_OVERLAY:
3832 +                       case V4L2_BUF_TYPE_VBI_CAPTURE:
3833 +                                       default:
3834 +                       return -EINVAL;
3835 +                       }
3836 +                       memset(f,0,sizeof(*f));
3837 +                       memcpy(f,cfg->v2.fmtdesc+index,sizeof(*f));
3838 +                       return 0;
3839 +               }
3840 +       case VIDIOC_G_INPUT:
3841 +               {
3842 +                       u32 *i = arg;
3843 +                       *i = cfg->v2.input;
3844 +                       return 0;
3845 +               }
3846 +       case VIDIOC_S_INPUT:
3847 +               {
3848 +                       int index = *((int *)arg);
3849 +                       if (index != 0)
3850 +                               return -EINVAL;
3851 +                       cfg->v2.input.index = index;
3852 +                       return 0;
3853 +               }
3854 +
3855 +       default:
3856 +               return -ENOIOCTLCMD; /* errno.h */
3857 +       } /* End of Switch  */
3858 +
3859 +
3860 +}
3861 +
3862 +
3863 +
3864 +
3865 +
3866 +
3867 +
3868 +/*
3869 + * Local variables:
3870 + * tab-width: 8
3871 + *  c-indent-level: 8
3872 + *  c-basic-offset: 8
3873 + *  c-set-style: "K&R"
3874 + * End:
3875 + */
3876 diff --git a/arch/arm/mach-s3c2440/camera/video-driver.c b/arch/arm/mach-s3c2440/camera/video-driver.c
3877 new file mode 100644
3878 index 0000000..fe9130c
3879 --- /dev/null
3880 +++ b/arch/arm/mach-s3c2440/camera/video-driver.c
3881 @@ -0,0 +1,591 @@
3882 +/*
3883 +    Copyright (C) 2004 Samsung Electronics
3884 +                     SW.LEE <hitchcar@sec.samsung.com>
3885 +    This program is free software; you can redistribute it and/or modify
3886 +    it under the terms of the GNU General Public License as published by
3887 +    the Free Software Foundation; either version 2 of the License, or
3888 +    (at your option) any later version.
3889 +*/
3890 +
3891 +#include <linux/version.h>
3892 +#include <linux/module.h>
3893 +#include <linux/delay.h>
3894 +#include <linux/errno.h>
3895 +#include <linux/fs.h>
3896 +#include <linux/kernel.h>
3897 +#include <linux/major.h>
3898 +#include <linux/slab.h>
3899 +#include <linux/poll.h>
3900 +#include <linux/signal.h>
3901 +#include <linux/ioport.h>
3902 +#include <linux/sched.h>
3903 +#include <linux/types.h>
3904 +#include <linux/interrupt.h>
3905 +#include <linux/kmod.h>
3906 +#include <linux/vmalloc.h>
3907 +#include <linux/init.h>
3908 +#include <asm/io.h>
3909 +#include <asm/page.h>
3910 +#include <asm/irq.h>
3911 +#include <asm/semaphore.h>
3912 +#include <linux/miscdevice.h>
3913 +
3914 +//#define SW_DEBUG
3915 +
3916 +#include "camif.h"
3917 +#include "videodev.h"
3918 +#include "miscdevice.h"
3919 +#include "cam_reg.h"
3920 +#include "sensor.h"
3921 +#include "userapp.h"
3922 +
3923 +#ifdef Z_API
3924 +#include "qt.h"
3925 +#endif
3926 +
3927 +/* Codec and Preview */
3928 +#define CAMIF_NUM  2
3929 +static camif_cfg_t  fimc[CAMIF_NUM];
3930 +
3931 +static const char *driver_version =
3932 +       "$Id: video-driver.c,v 1.9 2004/06/02 03:10:36 swlee Exp $";
3933 +extern const char *fimc_version;
3934 +extern const char *fsm_version;
3935 +
3936 +
3937 +camif_cfg_t * get_camif(int nr)
3938 +{
3939 +       camif_cfg_t *ret = NULL;
3940 +       switch(nr) {
3941 +       case CODEC_MINOR:
3942 +               ret = &fimc[0];
3943 +               break;
3944 +       case PREVIEW_MINOR:
3945 +               ret = &fimc[1];
3946 +               break;
3947 +       default:
3948 +               panic("Unknow Minor Number \n");
3949 +       }
3950 +       return ret;
3951 +}
3952 +
3953 +
3954 +static int camif_codec_start(camif_cfg_t *cfg)
3955 +{
3956 +       int  ret = 0;
3957 +       ret =camif_check_preview(cfg);
3958 +       switch(ret) {
3959 +       case 0:                 /* Play alone */
3960 +               DPRINTK("Start Alone \n");
3961 +               camif_4fsm_start(cfg);
3962 +               cfg->gc->status |= C_WORKING;
3963 +               break;
3964 +       case -ERESTARTSYS:       /* Busy , retry */
3965 +               //DPRINTK("Error \n");
3966 +               printk("Error \n");
3967 +               break;
3968 +       case 1:
3969 +               DPRINTK("need callback \n");
3970 +               ret = camif_callback_start(cfg);
3971 +               if(ret < 0 ) {
3972 +                       printk(KERN_INFO "Busy RESTART \n");
3973 +                       return ret; /* Busy, retry */
3974 +               }
3975 +               break;
3976 +       }
3977 +       return ret;
3978 +}
3979 +
3980 +
3981 +ssize_t camif_write (struct file *f, const char *b, size_t c,loff_t *offset)
3982 +{
3983 +       camif_cfg_t *cfg;
3984 +
3985 +       c = 0;                  /* return value */
3986 +       DPRINTK("\n");
3987 +       cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
3988 +       switch (*b) {
3989 +               case 'O':
3990 +                       if (cfg->dma_type & CAMIF_PREVIEW) {
3991 +                               if (cfg->gc->status & C_WORKING) {
3992 +                                       camif_start_c_with_p(cfg,get_camif(CODEC_MINOR));
3993 +                               }
3994 +                               else  {
3995 +                                       camif_4fsm_start(cfg);
3996 +                               }
3997 +                       }
3998 +                       else{
3999 +                               c = camif_codec_start(cfg);
4000 +                               if(c < 0) c = 1; /* Error and neet to retry */
4001 +                       }
4002 +
4003 +                       break;
4004 +               case 'X':
4005 +                       camif_p_stop(cfg);
4006 +                       break;
4007 +               default:
4008 +                       panic("CAMERA:camif_write: Unexpected Param\n");
4009 +       }
4010 +       DPRINTK("end\n");
4011 +
4012 +       return c;
4013 +}
4014 +
4015 +
4016 +ssize_t camif_p_read(struct file *file, char *buf, size_t count, loff_t *pos)
4017 +{
4018 +       camif_cfg_t *cfg = NULL;
4019 +       size_t end;
4020 +
4021 +       cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
4022 +       cfg->status = CAMIF_STARTED;
4023 +
4024 +       if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
4025 +               return -ERESTARTSYS;
4026 +
4027 +       cfg->status = CAMIF_STOPPED;
4028 +       end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
4029 +       if (copy_to_user(buf, camif_g_frame(cfg), end))
4030 +               return -EFAULT;
4031 +
4032 +       return end;
4033 +}
4034 +
4035 +
4036 +static ssize_t
4037 +camif_c_read(struct file *file, char *buf, size_t count, loff_t *pos)
4038 +{
4039 +       camif_cfg_t *cfg = NULL;
4040 +       size_t end;
4041 +
4042 +       /* cfg = file->private_data; */
4043 +       cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
4044 +#if 0
4045 +       if(file->f_flags & O_NONBLOCK) {
4046 +               printk(KERN_ERR"Don't Support NON_BLOCK \n");
4047 +       }
4048 +#endif
4049 +
4050 +      /* Change the below wait_event_interruptible func */
4051 +       if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
4052 +              return -ERESTARTSYS;
4053 +       cfg->status = CAMIF_STOPPED;
4054 +       end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
4055 +       if (copy_to_user(buf, camif_g_frame(cfg), end))
4056 +              return -EFAULT;
4057 +       return end;
4058 +}
4059 +
4060 +
4061 +static void camif_c_irq(int irq, void *dev_id, struct pt_regs *regs)
4062 +{
4063 +        camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
4064 +       DPRINTK("\n");
4065 +       camif_g_fifo_status(cfg);
4066 +       camif_g_frame_num(cfg);
4067 +       if(camif_enter_c_4fsm(cfg) == INSTANT_SKIP) return;
4068 +       wake_up_interruptible(&cfg->waitq);
4069 +}
4070 +
4071 +static void camif_p_irq(int irq, void *dev_id, struct pt_regs * regs)
4072 +{
4073 +        camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
4074 +       DPRINTK("\n");
4075 +       camif_g_fifo_status(cfg);
4076 +       camif_g_frame_num(cfg);
4077 +       if(camif_enter_p_4fsm(cfg) == INSTANT_SKIP) return;
4078 +       wake_up_interruptible(&cfg->waitq);
4079 +#if 0
4080 +       if( (cfg->perf.frames % 5) == 0)
4081 +               DPRINTK("5\n");
4082 +#endif
4083 +}
4084 +
4085 +static void camif_release_irq(camif_cfg_t *cfg)
4086 +{
4087 +       disable_irq(cfg->irq);
4088 +       free_irq(cfg->irq, cfg);
4089 +}
4090 +
4091 +static int camif_irq_request(camif_cfg_t *cfg)
4092 +{
4093 +       int ret = 0;
4094 +
4095 +       if (cfg->dma_type & CAMIF_CODEC) {
4096 +               if ((ret = request_irq(cfg->irq, camif_c_irq,
4097 +                              SA_INTERRUPT,cfg->shortname, cfg))) {
4098 +                       printk("request_irq(CAM_C) failed.\n");
4099 +               }
4100 +       }
4101 +       if (cfg->dma_type & CAMIF_PREVIEW) {
4102 +               if ((ret = request_irq(cfg->irq, camif_p_irq,
4103 +                              SA_INTERRUPT,cfg->shortname, cfg))) {
4104 +                       printk("request_irq(CAM_P) failed.\n");
4105 +               }
4106 +       }
4107 +       return 0;
4108 +}
4109 +
4110 +static void camif_init_sensor(camif_cfg_t *cfg)
4111 +{
4112 +       camif_gc_t *gc =  cfg->gc;
4113 +       if (!gc->sensor)
4114 +               panic("CAMERA:I2C Client(Img Sensor)Not registered\n");
4115 +       if(!gc->init_sensor) {
4116 +               camif_reset(gc->reset_type, gc->reset_udelay);
4117 +               gc->sensor->driver->command(gc->sensor,SENSOR_INIT,NULL);
4118 +               gc->init_sensor = 1; /*sensor init done */
4119 +       }
4120 +       gc->sensor->driver->command(gc->sensor, USER_ADD, NULL);
4121 +}
4122 +
4123 +static int camif_open(struct inode *inode, struct file *file)
4124 +{
4125 +       int err;
4126 +       camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
4127 +
4128 +       if(cfg->dma_type & CAMIF_PREVIEW) {
4129 +               if(down_interruptible(&cfg->gc->lock))
4130 +                       return -ERESTARTSYS;
4131 +               if (cfg->dma_type & CAMIF_PREVIEW) {
4132 +                       cfg->gc->status &= ~PNOTWORKING;
4133 +               }
4134 +               up(&cfg->gc->lock);
4135 +       }
4136 +       err = video_exclusive_open(inode,file);
4137 +       cfg->gc->user++;
4138 +       cfg->status = CAMIF_STOPPED;
4139 +       if (err < 0)  return err;
4140 +       if (file->f_flags & O_NONCAP ) {
4141 +               printk("Don't Support Non-capturing open \n");
4142 +               return 0;
4143 +       }
4144 +       file->private_data = cfg;
4145 +       camif_irq_request(cfg);
4146 +       camif_init_sensor(cfg);
4147 +       return 0;
4148 +}
4149 +
4150 +#if 0
4151 +static void print_pregs(void)
4152 +{
4153 +       printk(" CISRCFMT 0x%08X  \n", CISRCFMT);
4154 +       printk(" CIWDOFST 0x%08X  \n", CIWDOFST);
4155 +       printk(" CIGCTRL  0x%08X  \n", CIGCTRL);
4156 +       printk(" CIPRTRGFMT 0x%08X  \n", CIPRTRGFMT);
4157 +       printk(" CIPRCTRL 0x%08X  \n", CIPRCTRL);
4158 +       printk(" CIPRSCPRERATIO 0x%08X  \n", CIPRSCPRERATIO);
4159 +       printk(" CIPRSCPREDST 0x%08X  \n", CIPRSCPREDST);
4160 +       printk(" CIPRSCCTRL 0x%08X  \n", CIPRSCCTRL);
4161 +       printk(" CIPRTAREA 0x%08X  \n", CIPRTAREA);
4162 +       printk(" CIPRSTATUS 0x%08X  \n", CIPRSTATUS);
4163 +       printk(" CIIMGCPT 0x%08X  \n", CIIMGCPT);
4164 +}
4165 +
4166 +static void print_cregs(void)
4167 +{
4168 +       printk(" CISRCFMT 0x%08X  \n", CISRCFMT);
4169 +       printk(" CIWDOFST 0x%08X  \n", CIWDOFST);
4170 +       printk(" CIGCTRL  0x%08X  \n", CIGCTRL);
4171 +       printk(" CICOCTRL 0x%8X   \n", CICOCTRL);
4172 +       printk(" CICOSCPRERATIO 0x%08X  \n", CICOSCPRERATIO);
4173 +       printk(" CICOSCPREDST 0x%08X  \n", CICOSCPREDST);
4174 +       printk(" CICOSCCTRL 0x%08X  \n", CICOSCCTRL);
4175 +       printk(" CICOTAREA 0x%08X  \n", CICOTAREA);
4176 +       printk(" CICOSTATUS 0x%8X \n", CICOSTATUS);
4177 +       printk(" CIIMGCPT 0x%08X  \n", CIIMGCPT);
4178 +}
4179 +#endif
4180 +
4181 +
4182 +static int camif_release(struct inode *inode, struct file *file)
4183 +{
4184 +       camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
4185 +
4186 +       //DPRINTK(" cfg->status 0x%0X cfg->gc->status 0x%0X \n", cfg->status,cfg->gc->status );
4187 +       if (cfg->dma_type & CAMIF_PREVIEW) {
4188 +               if(down_interruptible(&cfg->gc->lock))
4189 +                       return -ERESTARTSYS;
4190 +               cfg->gc->status &= ~PWANT2START;
4191 +               cfg->gc->status |= PNOTWORKING;
4192 +               up(&cfg->gc->lock);
4193 +       }
4194 +       else {
4195 +               cfg->gc->status &= ~CWANT2START; /* No need semaphore */
4196 +       }
4197 +       camif_dynamic_close(cfg);
4198 +       camif_release_irq(cfg);
4199 +       video_exclusive_release(inode,file);
4200 +       camif_p_stop(cfg);
4201 +       cfg->gc->sensor->driver->command(cfg->gc->sensor, USER_EXIT, NULL);
4202 +       cfg->gc->user--;
4203 +       cfg->status = CAMIF_STOPPED;
4204 +       return 0;
4205 +}
4206 +
4207 +static void fimc_config(camif_cfg_t *cfg,u32 x, u32 y, int bpp)
4208 +{
4209 +       cfg->target_x = x;
4210 +       cfg->target_y = y;
4211 +
4212 +       switch (bpp) {
4213 +       case 16:
4214 +               cfg->fmt = CAMIF_RGB16;
4215 +               break;
4216 +       case 24:
4217 +               cfg->fmt = CAMIF_RGB24;
4218 +               break;
4219 +       case 420:
4220 +               cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
4221 +               break;
4222 +       case 422:
4223 +               cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR422;
4224 +               break;
4225 +       default:
4226 +               panic("Wrong BPP \n");
4227 +       }
4228 +}
4229 +
4230 +
4231 +static int
4232 +camif_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
4233 +{
4234 +       int ret = 0;
4235 +       camif_cfg_t *cfg  = file->private_data;
4236 +       camif_param_t par;
4237 +
4238 +       switch (cmd) {
4239 +               case CMD_CAMERA_INIT:
4240 +                       if (copy_from_user(&par,(camif_param_t *)arg,
4241 +                                               sizeof(camif_param_t)))
4242 +                               return -EFAULT;
4243 +                       fimc_config(cfg,par.dst_x, par.dst_y, par.bpp);
4244 +                       if (camif_dynamic_open(cfg)) {
4245 +                               printk(" Eror Happens \n");
4246 +                               ret = -1;
4247 +                       }
4248 +
4249 +                       switch (par.flip) {
4250 +                       case 3 :
4251 +                               cfg->flip = CAMIF_FLIP_MIRROR;
4252 +                               break;
4253 +                       case 1 :
4254 +                               cfg->flip = CAMIF_FLIP_X;
4255 +                               break;
4256 +                       case 2 :
4257 +                               cfg->flip = CAMIF_FLIP_Y;
4258 +                               break;
4259 +                       case 0 :
4260 +                       default:
4261 +                               cfg->flip = CAMIF_FLIP;
4262 +                       }
4263 +                       break;
4264 +       /* Todo
4265 +               case CMD_SENSOR_BRIGHTNESS:
4266 +                       cfg->gc->sensor->driver->command(cfg->gc->sensor, SENSOR_BRIGHTNESS, NULL);
4267 +                       break;
4268 +       */
4269 +               default:
4270 +                       ret = -EINVAL;
4271 +                       break;
4272 +       }
4273 +
4274 +       return ret;
4275 +}
4276 +
4277 +
4278 +#if 0
4279 +static int camif_ioctl(struct inode *inode, struct file *file,
4280 +                     unsigned int cmd, unsigned long arg)
4281 +{
4282 +//     camif_cfg_t *cfg  = file->private_data;
4283 +
4284 +
4285 +       switch (cmd) {
4286 +/*     case Some_other_action */
4287 +       default:
4288 +               return video_usercopy(inode, file, cmd, arg, camif_do_ioctl);
4289 +       }
4290 +}
4291 +#endif
4292 +
4293 +static struct file_operations camif_c_fops =
4294 +{
4295 +       .owner    = THIS_MODULE,
4296 +       .open     = camif_open,
4297 +       .release  = camif_release,
4298 +       .ioctl    = camif_ioctl,
4299 +       .read     = camif_c_read,
4300 +       .write    = camif_write,
4301 +};
4302 +
4303 +static struct file_operations camif_p_fops =
4304 +{
4305 +       .owner    = THIS_MODULE,
4306 +       .open     = camif_open,
4307 +       .release  = camif_release,
4308 +       .ioctl    = camif_ioctl,
4309 +#ifdef Z_API
4310 +       .read     = z_read,
4311 +       .write    = z_write,
4312 +#else
4313 +       .read     = camif_p_read,
4314 +       .write    = camif_write,
4315 +#endif
4316 +};
4317 +
4318 +static struct video_device codec_template =
4319 +{
4320 +       .name     = "CODEC_IF",
4321 +       .type     = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
4322 +       .hardware = VID_HARDWARE_SAMSUNG_FIMC20,
4323 +       .fops     = &camif_c_fops,
4324 +//     .release  = camif_release
4325 +       .minor    = -1,
4326 +};
4327 +
4328 +static struct video_device preview_template =
4329 +{
4330 +       .name     = "PREVIEW_IF",
4331 +       .type     = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
4332 +       .hardware = VID_HARDWARE_SAMSUNG_FIMC20,
4333 +       .fops     = &camif_p_fops,
4334 +       .minor    = -1,
4335 +};
4336 +
4337 +static int preview_init(camif_cfg_t *cfg)
4338 +{
4339 +       char name[16]="CAM_PREVIEW";
4340 +
4341 +       memset(cfg, 0, sizeof(camif_cfg_t));
4342 +       cfg->target_x = 640;
4343 +       cfg->target_y = 480;
4344 +       cfg->pp_num   = 4;
4345 +       cfg->dma_type = CAMIF_PREVIEW;
4346 +       cfg->fmt      = CAMIF_RGB16;
4347 +       cfg->flip     = CAMIF_FLIP_Y;
4348 +       cfg->v        = &preview_template;
4349 +       init_MUTEX(&cfg->v->lock);
4350 +       cfg->irq       = IRQ_CAM_P;
4351 +
4352 +       strcpy(cfg->shortname,name);
4353 +        init_waitqueue_head(&cfg->waitq);
4354 +       cfg->status = CAMIF_STOPPED;
4355 +       return cfg->status;
4356 +}
4357 +
4358 +static int codec_init(camif_cfg_t *cfg)
4359 +{
4360 +       char name[16]="CAM_CODEC";
4361 +
4362 +       memset(cfg, 0, sizeof(camif_cfg_t));
4363 +       cfg->target_x = 176;
4364 +       cfg->target_y = 144;
4365 +       cfg->pp_num   = 4;
4366 +       cfg->dma_type = CAMIF_CODEC;
4367 +       cfg->fmt      = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
4368 +       cfg->flip     = CAMIF_FLIP_X;
4369 +       cfg->v         = &codec_template;
4370 +       init_MUTEX(&cfg->v->lock);
4371 +       cfg->irq       = IRQ_CAM_C;
4372 +       strcpy(cfg->shortname,name);
4373 +       init_waitqueue_head(&cfg->waitq);
4374 +       cfg->status = CAMIF_STOPPED;
4375 +       return cfg->status;
4376 +}
4377 +
4378 +static void camif_init(void)
4379 +{
4380 +       camif_setup_sensor();
4381 +}
4382 +
4383 +
4384 +
4385 +static void print_version(void)
4386 +{
4387 +       printk(KERN_INFO"FIMC built:"__DATE__ " "__TIME__"\n%s\n%s\n%s\n",
4388 +                                       fimc_version, driver_version,fsm_version);
4389 +}
4390 +
4391 +
4392 +static int camif_m_in(void)
4393 +{
4394 +       int ret = 0;
4395 +       camif_cfg_t * cfg;
4396 +
4397 +       camif_init();
4398 +       cfg = get_camif(CODEC_MINOR);
4399 +       codec_init(cfg);
4400 +
4401 +       if (video_register_device(cfg->v,0,CODEC_MINOR)!=0) {
4402 +                       DPRINTK("Couldn't register codec driver.\n");
4403 +                       return 0;
4404 +       }
4405 +       cfg = get_camif(PREVIEW_MINOR);
4406 +       preview_init(cfg);
4407 +       if (video_register_device(cfg->v,0,PREVIEW_MINOR)!=0) {
4408 +                       DPRINTK("Couldn't register preview driver.\n");
4409 +                       return 0;
4410 +       }
4411 +
4412 +       print_version();
4413 +       return ret;
4414 +}
4415 +
4416 +static void unconfig_device(camif_cfg_t *cfg)
4417 +{
4418 +       video_unregister_device(cfg->v);
4419 +       camif_hw_close(cfg);
4420 +       //memset(cfg, 0, sizeof(camif_cfg_t));
4421 +}
4422 +
4423 +static void camif_m_out(void)  /* module out */
4424 +{
4425 +       camif_cfg_t *cfg;
4426 +
4427 +       cfg = get_camif(CODEC_MINOR);
4428 +       unconfig_device(cfg);
4429 +       cfg = get_camif(PREVIEW_MINOR);
4430 +       unconfig_device(cfg);
4431 +       return;
4432 +}
4433 +
4434 +void camif_register_decoder(struct i2c_client *ptr)
4435 +{
4436 +       camif_cfg_t *cfg;
4437 +
4438 +       cfg =get_camif(CODEC_MINOR);
4439 +       cfg->gc = (camif_gc_t *)(ptr->data);
4440 +
4441 +       cfg =get_camif(PREVIEW_MINOR);
4442 +       cfg->gc = (camif_gc_t *)(ptr->data);
4443 +
4444 +       sema_init(&cfg->gc->lock,1); /* global lock for both Codec and Preview */
4445 +       cfg->gc->status |= PNOTWORKING; /* Default Value */
4446 +       camif_hw_open(cfg->gc);
4447 +}
4448 +
4449 +void camif_unregister_decoder(struct i2c_client *ptr)
4450 +{
4451 +       camif_gc_t *gc;
4452 +
4453 +       gc = (camif_gc_t *)(ptr->data);
4454 +       gc->init_sensor = 0; /* need to modify */
4455 +}
4456 +
4457 +module_init(camif_m_in);
4458 +module_exit(camif_m_out);
4459 +
4460 +EXPORT_SYMBOL(camif_register_decoder);
4461 +EXPORT_SYMBOL(camif_unregister_decoder);
4462 +
4463 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
4464 +MODULE_DESCRIPTION("Video-Driver For Fimc2.0 MISC Drivers");
4465 +MODULE_LICENSE("GPL");
4466 +
4467 +
4468 +/*
4469 + * Local variables:
4470 + * c-basic-offset: 8
4471 + * End:
4472 + */
4473 diff --git a/arch/arm/mach-s3c2440/camera/videodev.c b/arch/arm/mach-s3c2440/camera/videodev.c
4474 new file mode 100644
4475 index 0000000..0b3498f
4476 --- /dev/null
4477 +++ b/arch/arm/mach-s3c2440/camera/videodev.c
4478 @@ -0,0 +1,342 @@
4479 +/*
4480 + * Video capture interface for Linux Character Device Driver.
4481 + *              based on
4482 + *              Alan Cox, <alan@redhat.com> video4linux
4483 + *
4484 + * Author:      SW.LEE <hitchcar@samsung.com>
4485 + *              2004 (C) Samsung Electronics
4486 + *              Modified for S3C2440/S3C24A0 Interface
4487 + *
4488 + * This file is released under the GPLv2
4489 + */
4490 +
4491 +
4492 +#include <linux/module.h>
4493 +#include <linux/types.h>
4494 +#include <linux/kernel.h>
4495 +#include <linux/sched.h>
4496 +#include <linux/smp_lock.h>
4497 +#include <linux/mm.h>
4498 +#include <linux/string.h>
4499 +#include <linux/errno.h>
4500 +#include <linux/init.h>
4501 +#include <linux/kmod.h>
4502 +#include <linux/slab.h>
4503 +#include <linux/devfs_fs_kernel.h>
4504 +#include <linux/miscdevice.h>
4505 +#include <asm/uaccess.h>
4506 +#include <asm/system.h>
4507 +#include <asm/semaphore.h>
4508 +
4509 +
4510 +
4511 +#include "camif.h"
4512 +#include "videodev.h"
4513 +#include "miscdevice.h"
4514 +
4515 +
4516 +static DECLARE_MUTEX(videodev_lock);
4517 +
4518 +const char *fimc_version = "$Id: videodev.c,v 1.1.1.1 2004/04/27 03:52:50 swlee Exp $";
4519 +
4520 +#define VIDEO_NAME              "video4linux"
4521 +
4522 +
4523 +static inline unsigned iminor(struct inode *inode)
4524 +{
4525 +        return MINOR(inode->i_rdev);
4526 +}
4527 +
4528 +static inline unsigned imajor(struct inode *inode)
4529 +{
4530 +        return MAJOR(inode->i_rdev);
4531 +}
4532 +
4533 +
4534 +#define VIDEO_NUM_DEVICES      2
4535 +static struct video_device *video_device[VIDEO_NUM_DEVICES];
4536 +
4537 +static inline struct video_device * get_vd(int nr)
4538 +{
4539 +       if ( nr == CODEC_MINOR)
4540 +               return video_device[0];
4541 +       else {
4542 +               assert ( nr & PREVIEW_MINOR);
4543 +               return video_device[1];
4544 +       }
4545 +}
4546 +
4547 +static inline void set_vd ( struct video_device * vd, int nr)
4548 +{
4549 +       if ( nr == CODEC_MINOR)
4550 +               video_device[0] = vd;
4551 +       else {
4552 +               assert ( nr & PREVIEW_MINOR);
4553 +               video_device[1] = vd;
4554 +       }
4555 +}
4556 +
4557 +static inline int video_release(struct inode *inode, struct file *f)
4558 +{
4559 +       int minor = MINOR(inode->i_rdev);
4560 +       struct video_device *vfd;
4561 +
4562 +       vfd = get_vd(minor);
4563 +#if 1 /* needed until all drivers are fixed */
4564 +       if (!vfd->release)
4565 +               return 0;
4566 +#endif
4567 +       vfd->release(vfd);
4568 +       return 0;
4569 +}
4570 +
4571 +struct video_device* video_devdata(struct file *file)
4572 +{
4573 +       return video_device[iminor(file->f_dentry->d_inode)];
4574 +}
4575 +
4576 +
4577 +/*
4578 + *     Open a video device.
4579 + */
4580 +static int video_open(struct inode *inode, struct file *file)
4581 +{
4582 +       int minor = MINOR(inode->i_rdev);
4583 +       int err = 0;
4584 +       struct video_device *vfl;
4585 +       struct file_operations *old_fops;
4586 +
4587 +       down(&videodev_lock);
4588 +
4589 +       vfl = get_vd(minor);
4590 +
4591 +       old_fops = file->f_op;
4592 +       file->f_op = fops_get(vfl->fops);
4593 +       if(file->f_op->open)
4594 +               err = file->f_op->open(inode,file);
4595 +       if (err) {
4596 +               fops_put(file->f_op);
4597 +               file->f_op = fops_get(old_fops);
4598 +       }
4599 +       fops_put(old_fops);
4600 +       up(&videodev_lock);
4601 +       return err;
4602 +}
4603 +
4604 +/*
4605 + * open/release helper functions -- handle exclusive opens
4606 + */
4607 +extern int video_exclusive_open(struct inode *inode, struct file *file)
4608 +{
4609 +       struct  video_device *vfl = get_vd(MINOR(inode->i_rdev));
4610 +       int retval = 0;
4611 +
4612 +       down(&vfl->lock);
4613 +       if (vfl->users) {
4614 +               retval = -EBUSY;
4615 +       } else {
4616 +               vfl->users++;
4617 +       }
4618 +       up(&vfl->lock);
4619 +       return retval;
4620 +}
4621 +
4622 +extern int video_exclusive_release(struct inode *inode, struct file *file)
4623 +{
4624 +       struct  video_device *vfl = get_vd(MINOR(inode->i_rdev));
4625 +       vfl->users--;
4626 +       return 0;
4627 +}
4628 +
4629 +int
4630 +video_usercopy(struct inode *inode, struct file *file,
4631 +              unsigned int cmd, unsigned long arg,
4632 +              int (*func)(struct inode *inode, struct file *file,
4633 +                          unsigned int cmd, void *arg))
4634 +{
4635 +       char    sbuf[128];
4636 +       void    *mbuf = NULL;
4637 +       void    *parg = NULL;
4638 +       int     err  = -EINVAL;
4639 +
4640 +       //      cmd = video_fix_command(cmd);
4641 +
4642 +       /*  Copy arguments into temp kernel buffer  */
4643 +       switch (_IOC_DIR(cmd)) {
4644 +       case _IOC_NONE:
4645 +               parg = (void *)arg;
4646 +               break;
4647 +       case _IOC_READ:
4648 +       case _IOC_WRITE:
4649 +       case (_IOC_WRITE | _IOC_READ):
4650 +               if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
4651 +                       parg = sbuf;
4652 +               } else {
4653 +                       /* too big to allocate from stack */
4654 +                       mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL);
4655 +                       if (NULL == mbuf)
4656 +                               return -ENOMEM;
4657 +                       parg = mbuf;
4658 +               }
4659 +
4660 +               err = -EFAULT;
4661 +               if (_IOC_DIR(cmd) & _IOC_WRITE)
4662 +                       if (copy_from_user(parg, (void *)arg, _IOC_SIZE(cmd)))
4663 +                               goto out;
4664 +               break;
4665 +       }
4666 +
4667 +       /* call driver */
4668 +       err = func(inode, file, cmd, parg);
4669 +       if (err == -ENOIOCTLCMD)
4670 +               err = -EINVAL;
4671 +       if (err < 0)
4672 +               goto out;
4673 +
4674 +       /*  Copy results into user buffer  */
4675 +       switch (_IOC_DIR(cmd))
4676 +       {
4677 +       case _IOC_READ:
4678 +       case (_IOC_WRITE | _IOC_READ):
4679 +               if (copy_to_user((void *)arg, parg, _IOC_SIZE(cmd)))
4680 +                       err = -EFAULT;
4681 +               break;
4682 +       }
4683 +
4684 +out:
4685 +       if (mbuf)
4686 +               kfree(mbuf);
4687 +       return err;
4688 +}
4689 +
4690 +
4691 +static struct file_operations video_fops=
4692 +{
4693 +       .owner          = THIS_MODULE,
4694 +       .llseek         = no_llseek,
4695 +       .open           = video_open,
4696 +       .release        = video_release,
4697 +};
4698 +
4699 +static struct miscdevice codec_dev = {
4700 +       minor: CODEC_MINOR,
4701 +       name : "codec",
4702 +       fops : &video_fops
4703 +};
4704 +
4705 +static struct miscdevice preview_dev = {
4706 +       minor: PREVIEW_MINOR,
4707 +       name : "preview",
4708 +       fops : &video_fops
4709 +};
4710 +
4711 +
4712 +/**
4713 + *     video_register_device - register video4linux devices
4714 + *     @vfd:  video device structure we want to register
4715 + *     @type: type of device to register
4716 + *     @nr:   minor number
4717 + *
4718 + *     Zero is returned on success.
4719 + *      type : ignored.
4720 + *      nr :
4721 + *           0 Codec index
4722 + *           1 Preview index
4723 + */
4724 +int video_register_device(struct video_device *vfd, int type, int nr)
4725 +{
4726 +       int ret=0;
4727 +
4728 +       /* pick a minor number */
4729 +       down(&videodev_lock);
4730 +       set_vd (vfd, nr);
4731 +       vfd->minor=nr;
4732 +       up(&videodev_lock);
4733 +
4734 +       switch (vfd->minor) {
4735 +               case CODEC_MINOR:
4736 +                       ret = misc_register(&codec_dev);
4737 +                       if (ret) {
4738 +                               printk(KERN_ERR
4739 +                                               "can't misc_register : codec on minor=%d\n", CODEC_MINOR);
4740 +                               panic(" Give me misc codec \n");
4741 +                       }
4742 +                       break;
4743 +               case PREVIEW_MINOR:
4744 +                       ret = misc_register(&preview_dev);
4745 +                       if (ret) {
4746 +                               printk(KERN_ERR
4747 +                                               "can't misc_register (preview) on minor=%d\n", PREVIEW_MINOR);
4748 +                               panic(" Give me misc codec \n");
4749 +                       }
4750 +                       break;
4751 +       }
4752 +
4753 +#if 0 /* needed until all drivers are fixed */
4754 +       if (!vfd->release)
4755 +               printk(KERN_WARNING "videodev: \"%s\" has no release callback. "
4756 +                               "Please fix your driver for proper sysfs support, see "
4757 +                               "http://lwn.net/Articles/36850/\n", vfd->name);
4758 +#endif
4759 +       return 0;
4760 +}
4761 +
4762 +/**
4763 + *     video_unregister_device - unregister a video4linux device
4764 + *     @vfd: the device to unregister
4765 + *
4766 + *     This unregisters the passed device and deassigns the minor
4767 + *     number. Future open calls will be met with errors.
4768 + */
4769 +
4770 +void video_unregister_device(struct video_device *vfd)
4771 +{
4772 +       down(&videodev_lock);
4773 +
4774 +       if(get_vd(vfd->minor)!=vfd)
4775 +               panic("videodev: bad unregister");
4776 +
4777 +       if (vfd->minor== CODEC_MINOR)
4778 +               misc_deregister(&codec_dev);
4779 +       else
4780 +               misc_deregister(&preview_dev);
4781 +       set_vd (NULL, vfd->minor);
4782 +       up(&videodev_lock);
4783 +}
4784 +
4785 +
4786 +/*
4787 + *     Initialise video for linux
4788 + */
4789 +
4790 +static int __init videodev_init(void)
4791 +{
4792 +//     printk(KERN_INFO "FIMC2.0 Built:"__DATE__" "__TIME__"\n%s\n",fimc_version);
4793 +       return 0;
4794 +}
4795 +
4796 +static void __exit videodev_exit(void)
4797 +{
4798 +}
4799 +
4800 +module_init(videodev_init)
4801 +module_exit(videodev_exit)
4802 +
4803 +EXPORT_SYMBOL(video_register_device);
4804 +EXPORT_SYMBOL(fimc_version);
4805 +EXPORT_SYMBOL(video_unregister_device);
4806 +EXPORT_SYMBOL(video_usercopy);
4807 +EXPORT_SYMBOL(video_exclusive_open);
4808 +EXPORT_SYMBOL(video_exclusive_release);
4809 +
4810 +
4811 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
4812 +MODULE_DESCRIPTION("VideoDev For FIMC2.0 MISC Drivers");
4813 +MODULE_LICENSE("GPL");
4814 +
4815 +
4816 +/*
4817 + * Local variables:
4818 + * c-basic-offset: 8
4819 + * End:
4820 + */
4821 diff --git a/arch/arm/mach-s3c2440/camera/videodev.h b/arch/arm/mach-s3c2440/camera/videodev.h
4822 new file mode 100644
4823 index 0000000..f12db43
4824 --- /dev/null
4825 +++ b/arch/arm/mach-s3c2440/camera/videodev.h
4826 @@ -0,0 +1,110 @@
4827 +#ifndef __LINUX_S3C_VIDEODEV_H
4828 +#define __LINUX_S3C_VIDEODEV_H
4829 +
4830 +#include <linux/types.h>
4831 +#include <linux/version.h>
4832 +#include "videodev2.h"
4833 +
4834 +
4835 +struct video_device
4836 +{
4837 +       /* device info */
4838 +       //      struct device *dev;
4839 +       char name[32];
4840 +       int type;       /* v4l1 */
4841 +       int type2;      /* v4l2 */
4842 +       int hardware;
4843 +       int minor;
4844 +
4845 +       /* device ops + callbacks */
4846 +       struct file_operations *fops;
4847 +       void (*release)(struct video_device *vfd);
4848 +
4849 +
4850 +#if 1 /* to be removed in 2.7.x */
4851 +       /* obsolete -- fops->owner is used instead */
4852 +       struct module *owner;
4853 +       /* dev->driver_data will be used instead some day.
4854 +        * Use the video_{get|set}_drvdata() helper functions,
4855 +        * so the switch over will be transparent for you.
4856 +        * Or use {pci|usb}_{get|set}_drvdata() directly. */
4857 +       void *priv;
4858 +#endif
4859 +
4860 +       /* for videodev.c intenal usage -- please don't touch */
4861 +       int users;                     /* video_exclusive_{open|close} ... */
4862 +       struct semaphore lock;         /* ... helper function uses these   */
4863 +       char devfs_name[64];           /* devfs */
4864 +       //      struct class_device class_dev; /* sysfs */
4865 +};
4866 +
4867 +#define VIDEO_MAJOR    81
4868 +
4869 +#define VFL_TYPE_GRABBER       0
4870 +
4871 +
4872 +extern int video_register_device(struct video_device *, int type, int nr);
4873 +extern void video_unregister_device(struct video_device *);
4874 +extern struct video_device* video_devdata(struct file*);
4875 +
4876 +
4877 +
4878 +struct video_picture
4879 +{
4880 +        __u16   brightness;
4881 +        __u16   hue;
4882 +        __u16   colour;
4883 +        __u16   contrast;
4884 +        __u16   whiteness;      /* Black and white only */
4885 +        __u16   depth;          /* Capture depth */
4886 +        __u16   palette;        /* Palette in use */
4887 +#define VIDEO_PALETTE_GREY      1       /* Linear greyscale */
4888 +#define VIDEO_PALETTE_HI240     2       /* High 240 cube (BT848) */
4889 +#define VIDEO_PALETTE_RGB565    3       /* 565 16 bit RGB */
4890 +#define VIDEO_PALETTE_RGB24     4       /* 24bit RGB */
4891 +#define VIDEO_PALETTE_RGB32     5       /* 32bit RGB */
4892 +#define VIDEO_PALETTE_RGB555    6       /* 555 15bit RGB */
4893 +#define VIDEO_PALETTE_YUV422    7       /* YUV422 capture */
4894 +#define VIDEO_PALETTE_YUYV      8
4895 +#define VIDEO_PALETTE_UYVY      9       /* The great thing about standards is ... */
4896 +#define VIDEO_PALETTE_YUV420    10
4897 +#define VIDEO_PALETTE_YUV411    11      /* YUV411 capture */
4898 +#define VIDEO_PALETTE_RAW       12      /* RAW capture (BT848) */
4899 +#define VIDEO_PALETTE_YUV422P   13      /* YUV 4:2:2 Planar */
4900 +#define VIDEO_PALETTE_YUV411P   14      /* YUV 4:1:1 Planar */
4901 +#define VIDEO_PALETTE_YUV420P   15      /* YUV 4:2:0 Planar */
4902 +#define VIDEO_PALETTE_YUV410P   16      /* YUV 4:1:0 Planar */
4903 +#define VIDEO_PALETTE_PLANAR    13      /* start of planar entries */
4904 +#define VIDEO_PALETTE_COMPONENT 7       /* start of component entries */
4905 +};
4906 +
4907 +extern int video_exclusive_open(struct inode *inode, struct file *file);
4908 +extern int video_exclusive_release(struct inode *inode, struct file *file);
4909 +extern int video_usercopy(struct inode *inode, struct file *file,
4910 +                          unsigned int cmd, unsigned long arg,
4911 +                          int (*func)(struct inode *inode, struct file *file,
4912 +                                      unsigned int cmd, void *arg));
4913 +
4914 +
4915 +
4916 +
4917 +#define VID_TYPE_CAPTURE        1       /* Can capture */
4918 +#define VID_TYPE_CLIPPING       32      /* Can clip */
4919 +#define VID_TYPE_FRAMERAM       64      /* Uses the frame buffer memory */
4920 +#define VID_TYPE_SCALES         128     /* Scalable */
4921 +#define VID_TYPE_SUBCAPTURE     512     /* Can capture subareas of the image */
4922 +
4923 +
4924 +
4925 +#define VID_HARDWARE_SAMSUNG_FIMC  255
4926 +
4927 +
4928 +
4929 +#endif
4930 +
4931 +
4932 +/*
4933 + * Local variables:
4934 + * c-basic-offset: 8
4935 + * End:
4936 + */
4937 diff --git a/arch/arm/mach-s3c2440/camera/videodev2.h b/arch/arm/mach-s3c2440/camera/videodev2.h
4938 new file mode 100644
4939 index 0000000..1bfc45a
4940 --- /dev/null
4941 +++ b/arch/arm/mach-s3c2440/camera/videodev2.h
4942 @@ -0,0 +1,938 @@
4943 +#ifndef __LINUX_VIDEODEV2_H
4944 +#define __LINUX_VIDEODEV2_H
4945 +/*
4946 + *     Video for Linux Two
4947 + *
4948 + *     Header file for v4l or V4L2 drivers and applications, for
4949 + *     Linux kernels 2.2.x or 2.4.x.
4950 + *
4951 + *     See http://bytesex.org/v4l/ for API specs and other
4952 + *     v4l2 documentation.
4953 + *
4954 + *     Author: Bill Dirks <bdirks@pacbell.net>
4955 + *             Justin Schoeman
4956 + *             et al.
4957 + */
4958 +#ifdef __KERNEL__
4959 +#include <linux/time.h> /* need struct timeval */
4960 +#endif
4961 +
4962 +/*
4963 + *     M I S C E L L A N E O U S
4964 + */
4965 +
4966 +/*  Four-character-code (FOURCC) */
4967 +#define v4l2_fourcc(a,b,c,d)\
4968 +        (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
4969 +
4970 +/*
4971 + *     E N U M S
4972 + */
4973 +enum v4l2_field {
4974 +       V4L2_FIELD_ANY        = 0, /* driver can choose from none,
4975 +                                     top, bottom, interlaced
4976 +                                     depending on whatever it thinks
4977 +                                     is approximate ... */
4978 +       V4L2_FIELD_NONE       = 1, /* this device has no fields ... */
4979 +       V4L2_FIELD_TOP        = 2, /* top field only */
4980 +       V4L2_FIELD_BOTTOM     = 3, /* bottom field only */
4981 +       V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */
4982 +       V4L2_FIELD_SEQ_TB     = 5, /* both fields sequential into one
4983 +                                     buffer, top-bottom order */
4984 +       V4L2_FIELD_SEQ_BT     = 6, /* same as above + bottom-top order */
4985 +       V4L2_FIELD_ALTERNATE  = 7, /* both fields alternating into
4986 +                                     separate buffers */
4987 +};
4988 +#define V4L2_FIELD_HAS_TOP(field)      \
4989 +       ((field) == V4L2_FIELD_TOP      ||\
4990 +        (field) == V4L2_FIELD_INTERLACED ||\
4991 +        (field) == V4L2_FIELD_SEQ_TB   ||\
4992 +        (field) == V4L2_FIELD_SEQ_BT)
4993 +#define V4L2_FIELD_HAS_BOTTOM(field)   \
4994 +       ((field) == V4L2_FIELD_BOTTOM   ||\
4995 +        (field) == V4L2_FIELD_INTERLACED ||\
4996 +        (field) == V4L2_FIELD_SEQ_TB   ||\
4997 +        (field) == V4L2_FIELD_SEQ_BT)
4998 +#define V4L2_FIELD_HAS_BOTH(field)     \
4999 +       ((field) == V4L2_FIELD_INTERLACED ||\
5000 +        (field) == V4L2_FIELD_SEQ_TB   ||\
5001 +        (field) == V4L2_FIELD_SEQ_BT)
5002 +
5003 +enum v4l2_buf_type {
5004 +       V4L2_BUF_TYPE_VIDEO_CAPTURE  = 1,
5005 +       V4L2_BUF_TYPE_VIDEO_OUTPUT   = 2,
5006 +       V4L2_BUF_TYPE_VIDEO_OVERLAY  = 3,
5007 +       V4L2_BUF_TYPE_VBI_CAPTURE    = 4,
5008 +       V4L2_BUF_TYPE_VBI_OUTPUT     = 5,
5009 +       V4L2_BUF_TYPE_PRIVATE        = 0x80,
5010 +};
5011 +
5012 +enum v4l2_ctrl_type {
5013 +       V4L2_CTRL_TYPE_INTEGER       = 1,
5014 +       V4L2_CTRL_TYPE_BOOLEAN       = 2,
5015 +       V4L2_CTRL_TYPE_MENU          = 3,
5016 +       V4L2_CTRL_TYPE_BUTTON        = 4,
5017 +};
5018 +
5019 +enum v4l2_tuner_type {
5020 +       V4L2_TUNER_RADIO             = 1,
5021 +       V4L2_TUNER_ANALOG_TV         = 2,
5022 +};
5023 +
5024 +enum v4l2_memory {
5025 +       V4L2_MEMORY_MMAP             = 1,
5026 +       V4L2_MEMORY_USERPTR          = 2,
5027 +       V4L2_MEMORY_OVERLAY          = 3,
5028 +};
5029 +
5030 +/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
5031 +enum v4l2_colorspace {
5032 +       /* ITU-R 601 -- broadcast NTSC/PAL */
5033 +       V4L2_COLORSPACE_SMPTE170M     = 1,
5034 +
5035 +       /* 1125-Line (US) HDTV */
5036 +       V4L2_COLORSPACE_SMPTE240M     = 2,
5037 +
5038 +       /* HD and modern captures. */
5039 +       V4L2_COLORSPACE_REC709        = 3,
5040 +
5041 +       /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */
5042 +       V4L2_COLORSPACE_BT878         = 4,
5043 +
5044 +       /* These should be useful.  Assume 601 extents. */
5045 +       V4L2_COLORSPACE_470_SYSTEM_M  = 5,
5046 +       V4L2_COLORSPACE_470_SYSTEM_BG = 6,
5047 +
5048 +       /* I know there will be cameras that send this.  So, this is
5049 +        * unspecified chromaticities and full 0-255 on each of the
5050 +        * Y'CbCr components
5051 +        */
5052 +       V4L2_COLORSPACE_JPEG          = 7,
5053 +
5054 +       /* For RGB colourspaces, this is probably a good start. */
5055 +       V4L2_COLORSPACE_SRGB          = 8,
5056 +};
5057 +
5058 +enum v4l2_priority {
5059 +       V4L2_PRIORITY_UNSET       = 0,  /* not initialized */
5060 +       V4L2_PRIORITY_BACKGROUND  = 1,
5061 +       V4L2_PRIORITY_INTERACTIVE = 2,
5062 +       V4L2_PRIORITY_RECORD      = 3,
5063 +       V4L2_PRIORITY_DEFAULT     = V4L2_PRIORITY_INTERACTIVE,
5064 +};
5065 +
5066 +struct v4l2_rect {
5067 +       __s32   left;
5068 +       __s32   top;
5069 +       __s32   width;
5070 +       __s32   height;
5071 +};
5072 +
5073 +struct v4l2_fract {
5074 +       __u32   numerator;
5075 +       __u32   denominator;
5076 +};
5077 +
5078 +/*
5079 + *     D R I V E R   C A P A B I L I T I E S
5080 + */
5081 +struct v4l2_capability
5082 +{
5083 +       __u8    driver[16];     /* i.e. "bttv" */
5084 +       __u8    card[32];       /* i.e. "Hauppauge WinTV" */
5085 +       __u8    bus_info[32];   /* "PCI:" + pci_name(pci_dev) */
5086 +       __u32   version;        /* should use KERNEL_VERSION() */
5087 +       __u32   capabilities;   /* Device capabilities */
5088 +       __u32   reserved[4];
5089 +};
5090 +
5091 +/* Values for 'capabilities' field */
5092 +#define V4L2_CAP_VIDEO_CAPTURE 0x00000001  /* Is a video capture device */
5093 +#define V4L2_CAP_VIDEO_OUTPUT  0x00000002  /* Is a video output device */
5094 +#define V4L2_CAP_VIDEO_OVERLAY 0x00000004  /* Can do video overlay */
5095 +#define V4L2_CAP_VBI_CAPTURE   0x00000010  /* Is a VBI capture device */
5096 +#define V4L2_CAP_VBI_OUTPUT    0x00000020  /* Is a VBI output device */
5097 +#define V4L2_CAP_RDS_CAPTURE   0x00000100  /* RDS data capture */
5098 +
5099 +#define V4L2_CAP_TUNER         0x00010000  /* has a tuner */
5100 +#define V4L2_CAP_AUDIO         0x00020000  /* has audio support */
5101 +#define V4L2_CAP_RADIO         0x00040000  /* is a radio device */
5102 +
5103 +#define V4L2_CAP_READWRITE      0x01000000  /* read/write systemcalls */
5104 +#define V4L2_CAP_ASYNCIO        0x02000000  /* async I/O */
5105 +#define V4L2_CAP_STREAMING      0x04000000  /* streaming I/O ioctls */
5106 +
5107 +/*
5108 + *     V I D E O   I M A G E   F O R M A T
5109 + */
5110 +
5111 +struct v4l2_pix_format
5112 +{
5113 +       __u32                   width;
5114 +       __u32                   height;
5115 +       __u32                   pixelformat;
5116 +       enum v4l2_field         field;
5117 +       __u32                   bytesperline;   /* for padding, zero if unused */
5118 +       __u32                   sizeimage;
5119 +        enum v4l2_colorspace   colorspace;
5120 +       __u32                   priv;           /* private data, depends on pixelformat */
5121 +};
5122 +
5123 +/*           Pixel format    FOURCC                  depth  Description   */
5124 +#define V4L2_PIX_FMT_RGB332  v4l2_fourcc('R','G','B','1') /*  8  RGB-3-3-2     */
5125 +#define V4L2_PIX_FMT_RGB555  v4l2_fourcc('R','G','B','O') /* 16  RGB-5-5-5     */
5126 +#define V4L2_PIX_FMT_RGB565  v4l2_fourcc('R','G','B','P') /* 16  RGB-5-6-5     */
5127 +#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16  RGB-5-5-5 BE  */
5128 +#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R','G','B','R') /* 16  RGB-5-6-5 BE  */
5129 +#define V4L2_PIX_FMT_BGR24   v4l2_fourcc('B','G','R','3') /* 24  BGR-8-8-8     */
5130 +#define V4L2_PIX_FMT_RGB24   v4l2_fourcc('R','G','B','3') /* 24  RGB-8-8-8     */
5131 +#define V4L2_PIX_FMT_BGR32   v4l2_fourcc('B','G','R','4') /* 32  BGR-8-8-8-8   */
5132 +#define V4L2_PIX_FMT_RGB32   v4l2_fourcc('R','G','B','4') /* 32  RGB-8-8-8-8   */
5133 +#define V4L2_PIX_FMT_GREY    v4l2_fourcc('G','R','E','Y') /*  8  Greyscale     */
5134 +#define V4L2_PIX_FMT_YVU410  v4l2_fourcc('Y','V','U','9') /*  9  YVU 4:1:0     */
5135 +#define V4L2_PIX_FMT_YVU420  v4l2_fourcc('Y','V','1','2') /* 12  YVU 4:2:0     */
5136 +#define V4L2_PIX_FMT_YUYV    v4l2_fourcc('Y','U','Y','V') /* 16  YUV 4:2:2     */
5137 +#define V4L2_PIX_FMT_UYVY    v4l2_fourcc('U','Y','V','Y') /* 16  YUV 4:2:2     */
5138 +#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16  YVU422 planar */
5139 +#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16  YVU411 planar */
5140 +#define V4L2_PIX_FMT_Y41P    v4l2_fourcc('Y','4','1','P') /* 12  YUV 4:1:1     */
5141 +
5142 +/* two planes -- one Y, one Cr + Cb interleaved  */
5143 +#define V4L2_PIX_FMT_NV12    v4l2_fourcc('N','V','1','2') /* 12  Y/CbCr 4:2:0  */
5144 +#define V4L2_PIX_FMT_NV21    v4l2_fourcc('N','V','2','1') /* 12  Y/CrCb 4:2:0  */
5145 +
5146 +/*  The following formats are not defined in the V4L2 specification */
5147 +#define V4L2_PIX_FMT_YUV410  v4l2_fourcc('Y','U','V','9') /*  9  YUV 4:1:0     */
5148 +#define V4L2_PIX_FMT_YUV420  v4l2_fourcc('Y','U','1','2') /* 12  YUV 4:2:0     */
5149 +#define V4L2_PIX_FMT_YYUV    v4l2_fourcc('Y','Y','U','V') /* 16  YUV 4:2:2     */
5150 +#define V4L2_PIX_FMT_HI240   v4l2_fourcc('H','I','2','4') /*  8  8-bit color   */
5151 +
5152 +/* compressed formats */
5153 +#define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M','J','P','G') /* Motion-JPEG   */
5154 +#define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J','P','E','G') /* JFIF JPEG     */
5155 +#define V4L2_PIX_FMT_DV       v4l2_fourcc('d','v','s','d') /* 1394          */
5156 +#define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M','P','E','G') /* MPEG          */
5157 +
5158 +/*  Vendor-specific formats   */
5159 +#define V4L2_PIX_FMT_WNVA     v4l2_fourcc('W','N','V','A') /* Winnov hw compress */
5160 +
5161 +/*
5162 + *     F O R M A T   E N U M E R A T I O N
5163 + */
5164 +struct v4l2_fmtdesc
5165 +{
5166 +       __u32               index;             /* Format number      */
5167 +       enum v4l2_buf_type  type;              /* buffer type        */
5168 +       __u32               flags;
5169 +       __u8                description[32];   /* Description string */
5170 +       __u32               pixelformat;       /* Format fourcc      */
5171 +       __u32               reserved[4];
5172 +};
5173 +
5174 +#define V4L2_FMT_FLAG_COMPRESSED 0x0001
5175 +
5176 +
5177 +/*
5178 + *     T I M E C O D E
5179 + */
5180 +struct v4l2_timecode
5181 +{
5182 +       __u32   type;
5183 +       __u32   flags;
5184 +       __u8    frames;
5185 +       __u8    seconds;
5186 +       __u8    minutes;
5187 +       __u8    hours;
5188 +       __u8    userbits[4];
5189 +};
5190 +
5191 +/*  Type  */
5192 +#define V4L2_TC_TYPE_24FPS             1
5193 +#define V4L2_TC_TYPE_25FPS             2
5194 +#define V4L2_TC_TYPE_30FPS             3
5195 +#define V4L2_TC_TYPE_50FPS             4
5196 +#define V4L2_TC_TYPE_60FPS             5
5197 +
5198 +/*  Flags  */
5199 +#define V4L2_TC_FLAG_DROPFRAME         0x0001 /* "drop-frame" mode */
5200 +#define V4L2_TC_FLAG_COLORFRAME                0x0002
5201 +#define V4L2_TC_USERBITS_field         0x000C
5202 +#define V4L2_TC_USERBITS_USERDEFINED   0x0000
5203 +#define V4L2_TC_USERBITS_8BITCHARS     0x0008
5204 +/* The above is based on SMPTE timecodes */
5205 +
5206 +
5207 +/*
5208 + *     C O M P R E S S I O N   P A R A M E T E R S
5209 + */
5210 +#if 0
5211 +/* ### generic compression settings don't work, there is too much
5212 + * ### codec-specific stuff.  Maybe reuse that for MPEG codec settings
5213 + * ### later ... */
5214 +struct v4l2_compression
5215 +{
5216 +       __u32   quality;
5217 +       __u32   keyframerate;
5218 +       __u32   pframerate;
5219 +       __u32   reserved[5];
5220 +
5221 +/*  what we'll need for MPEG, extracted from some postings on
5222 +    the v4l list (Gert Vervoort, PlasmaJohn).
5223 +
5224 +system stream:
5225 +  - type: elementary stream(ES), packatised elementary stream(s) (PES)
5226 +    program stream(PS), transport stream(TS)
5227 +  - system bitrate
5228 +  - PS packet size (DVD: 2048 bytes, VCD: 2324 bytes)
5229 +  - TS video PID
5230 +  - TS audio PID
5231 +  - TS PCR PID
5232 +  - TS system information tables (PAT, PMT, CAT, NIT and SIT)
5233 +  - (MPEG-1 systems stream vs. MPEG-2 program stream (TS not supported
5234 +    by MPEG-1 systems)
5235 +
5236 +audio:
5237 +  - type: MPEG (+Layer I,II,III), AC-3, LPCM
5238 +  - bitrate
5239 +  - sampling frequency (DVD: 48 Khz, VCD: 44.1 KHz, 32 kHz)
5240 +  - Trick Modes? (ff, rew)
5241 +  - Copyright
5242 +  - Inverse Telecine
5243 +
5244 +video:
5245 +  - picturesize (SIF, 1/2 D1, 2/3 D1, D1) and PAL/NTSC norm can be set
5246 +    through excisting V4L2 controls
5247 +  - noise reduction, parameters encoder specific?
5248 +  - MPEG video version: MPEG-1, MPEG-2
5249 +  - GOP (Group Of Pictures) definition:
5250 +    - N: number of frames per GOP
5251 +    - M: distance between reference (I,P) frames
5252 +    - open/closed GOP
5253 +  - quantiser matrix: inter Q matrix (64 bytes) and intra Q matrix (64 bytes)
5254 +  - quantiser scale: linear or logarithmic
5255 +  - scanning: alternate or zigzag
5256 +  - bitrate mode: CBR (constant bitrate) or VBR (variable bitrate).
5257 +  - target video bitrate for CBR
5258 +  - target video bitrate for VBR
5259 +  - maximum video bitrate for VBR - min. quantiser value for VBR
5260 +  - max. quantiser value for VBR
5261 +  - adaptive quantisation value
5262 +  - return the number of bytes per GOP or bitrate for bitrate monitoring
5263 +
5264 +*/
5265 +};
5266 +#endif
5267 +
5268 +struct v4l2_jpegcompression
5269 +{
5270 +       int quality;
5271 +
5272 +       int  APPn;              /* Number of APP segment to be written,
5273 +                                * must be 0..15 */
5274 +       int  APP_len;           /* Length of data in JPEG APPn segment */
5275 +       char APP_data[60];      /* Data in the JPEG APPn segment. */
5276 +
5277 +       int  COM_len;           /* Length of data in JPEG COM segment */
5278 +       char COM_data[60];      /* Data in JPEG COM segment */
5279 +
5280 +       __u32 jpeg_markers;     /* Which markers should go into the JPEG
5281 +                                * output. Unless you exactly know what
5282 +                                * you do, leave them untouched.
5283 +                                * Inluding less markers will make the
5284 +                                * resulting code smaller, but there will
5285 +                                * be fewer aplications which can read it.
5286 +                                * The presence of the APP and COM marker
5287 +                                * is influenced by APP_len and COM_len
5288 +                                * ONLY, not by this property! */
5289 +
5290 +#define V4L2_JPEG_MARKER_DHT (1<<3)    /* Define Huffman Tables */
5291 +#define V4L2_JPEG_MARKER_DQT (1<<4)    /* Define Quantization Tables */
5292 +#define V4L2_JPEG_MARKER_DRI (1<<5)    /* Define Restart Interval */
5293 +#define V4L2_JPEG_MARKER_COM (1<<6)    /* Comment segment */
5294 +#define V4L2_JPEG_MARKER_APP (1<<7)    /* App segment, driver will
5295 +                                        * allways use APP0 */
5296 +};
5297 +
5298 +
5299 +/*
5300 + *     M E M O R Y - M A P P I N G   B U F F E R S
5301 + */
5302 +struct v4l2_requestbuffers
5303 +{
5304 +       __u32                   count;
5305 +       enum v4l2_buf_type      type;
5306 +       enum v4l2_memory        memory;
5307 +       __u32                   reserved[2];
5308 +};
5309 +
5310 +struct v4l2_buffer
5311 +{
5312 +       __u32                   index;
5313 +       enum v4l2_buf_type      type;
5314 +       __u32                   bytesused;
5315 +       __u32                   flags;
5316 +       enum v4l2_field         field;
5317 +       struct timeval          timestamp;
5318 +       struct v4l2_timecode    timecode;
5319 +       __u32                   sequence;
5320 +
5321 +       /* memory location */
5322 +       enum v4l2_memory        memory;
5323 +       union {
5324 +               __u32           offset;
5325 +               unsigned long   userptr;
5326 +       } m;
5327 +       __u32                   length;
5328 +
5329 +       __u32                   reserved[2];
5330 +};
5331 +
5332 +/*  Flags for 'flags' field */
5333 +#define V4L2_BUF_FLAG_MAPPED   0x0001  /* Buffer is mapped (flag) */
5334 +#define V4L2_BUF_FLAG_QUEUED   0x0002  /* Buffer is queued for processing */
5335 +#define V4L2_BUF_FLAG_DONE     0x0004  /* Buffer is ready */
5336 +#define V4L2_BUF_FLAG_KEYFRAME 0x0008  /* Image is a keyframe (I-frame) */
5337 +#define V4L2_BUF_FLAG_PFRAME   0x0010  /* Image is a P-frame */
5338 +#define V4L2_BUF_FLAG_BFRAME   0x0020  /* Image is a B-frame */
5339 +#define V4L2_BUF_FLAG_TIMECODE 0x0100  /* timecode field is valid */
5340 +
5341 +/*
5342 + *     O V E R L A Y   P R E V I E W
5343 + */
5344 +struct v4l2_framebuffer
5345 +{
5346 +       __u32                   capability;
5347 +       __u32                   flags;
5348 +/* FIXME: in theory we should pass something like PCI device + memory
5349 + * region + offset instead of some physical address */
5350 +       void*                   base;
5351 +       struct v4l2_pix_format  fmt;
5352 +};
5353 +/*  Flags for the 'capability' field. Read only */
5354 +#define V4L2_FBUF_CAP_EXTERNOVERLAY    0x0001
5355 +#define V4L2_FBUF_CAP_CHROMAKEY                0x0002
5356 +#define V4L2_FBUF_CAP_LIST_CLIPPING     0x0004
5357 +#define V4L2_FBUF_CAP_BITMAP_CLIPPING  0x0008
5358 +/*  Flags for the 'flags' field. */
5359 +#define V4L2_FBUF_FLAG_PRIMARY         0x0001
5360 +#define V4L2_FBUF_FLAG_OVERLAY         0x0002
5361 +#define V4L2_FBUF_FLAG_CHROMAKEY       0x0004
5362 +
5363 +struct v4l2_clip
5364 +{
5365 +       struct v4l2_rect        c;
5366 +       struct v4l2_clip        *next;
5367 +};
5368 +
5369 +struct v4l2_window
5370 +{
5371 +       struct v4l2_rect        w;
5372 +       enum v4l2_field         field;
5373 +       __u32                   chromakey;
5374 +       struct v4l2_clip        *clips;
5375 +       __u32                   clipcount;
5376 +       void                    *bitmap;
5377 +};
5378 +
5379 +
5380 +/*
5381 + *     C A P T U R E   P A R A M E T E R S
5382 + */
5383 +struct v4l2_captureparm
5384 +{
5385 +       __u32              capability;    /*  Supported modes */
5386 +       __u32              capturemode;   /*  Current mode */
5387 +       struct v4l2_fract  timeperframe;  /*  Time per frame in .1us units */
5388 +       __u32              extendedmode;  /*  Driver-specific extensions */
5389 +       __u32              readbuffers;   /*  # of buffers for read */
5390 +       __u32              reserved[4];
5391 +};
5392 +/*  Flags for 'capability' and 'capturemode' fields */
5393 +#define V4L2_MODE_HIGHQUALITY  0x0001  /*  High quality imaging mode */
5394 +#define V4L2_CAP_TIMEPERFRAME  0x1000  /*  timeperframe field is supported */
5395 +
5396 +struct v4l2_outputparm
5397 +{
5398 +       __u32              capability;   /*  Supported modes */
5399 +       __u32              outputmode;   /*  Current mode */
5400 +       struct v4l2_fract  timeperframe; /*  Time per frame in seconds */
5401 +       __u32              extendedmode; /*  Driver-specific extensions */
5402 +       __u32              writebuffers; /*  # of buffers for write */
5403 +       __u32              reserved[4];
5404 +};
5405 +
5406 +/*
5407 + *     I N P U T   I M A G E   C R O P P I N G
5408 + */
5409 +
5410 +struct v4l2_cropcap {
5411 +       enum v4l2_buf_type      type;
5412 +        struct v4l2_rect        bounds;
5413 +        struct v4l2_rect        defrect;
5414 +        struct v4l2_fract       pixelaspect;
5415 +};
5416 +
5417 +struct v4l2_crop {
5418 +       enum v4l2_buf_type      type;
5419 +       struct v4l2_rect        c;
5420 +};
5421 +
5422 +/*
5423 + *      A N A L O G   V I D E O   S T A N D A R D
5424 + */
5425 +
5426 +typedef __u64 v4l2_std_id;
5427 +
5428 +/* one bit for each */
5429 +#define V4L2_STD_PAL_B          ((v4l2_std_id)0x00000001)
5430 +#define V4L2_STD_PAL_B1         ((v4l2_std_id)0x00000002)
5431 +#define V4L2_STD_PAL_G          ((v4l2_std_id)0x00000004)
5432 +#define V4L2_STD_PAL_H          ((v4l2_std_id)0x00000008)
5433 +#define V4L2_STD_PAL_I          ((v4l2_std_id)0x00000010)
5434 +#define V4L2_STD_PAL_D          ((v4l2_std_id)0x00000020)
5435 +#define V4L2_STD_PAL_D1         ((v4l2_std_id)0x00000040)
5436 +#define V4L2_STD_PAL_K          ((v4l2_std_id)0x00000080)
5437 +
5438 +#define V4L2_STD_PAL_M          ((v4l2_std_id)0x00000100)
5439 +#define V4L2_STD_PAL_N          ((v4l2_std_id)0x00000200)
5440 +#define V4L2_STD_PAL_Nc         ((v4l2_std_id)0x00000400)
5441 +#define V4L2_STD_PAL_60         ((v4l2_std_id)0x00000800)
5442 +
5443 +#define V4L2_STD_NTSC_M         ((v4l2_std_id)0x00001000)
5444 +#define V4L2_STD_NTSC_M_JP      ((v4l2_std_id)0x00002000)
5445 +
5446 +#define V4L2_STD_SECAM_B        ((v4l2_std_id)0x00010000)
5447 +#define V4L2_STD_SECAM_D        ((v4l2_std_id)0x00020000)
5448 +#define V4L2_STD_SECAM_G        ((v4l2_std_id)0x00040000)
5449 +#define V4L2_STD_SECAM_H        ((v4l2_std_id)0x00080000)
5450 +#define V4L2_STD_SECAM_K        ((v4l2_std_id)0x00100000)
5451 +#define V4L2_STD_SECAM_K1       ((v4l2_std_id)0x00200000)
5452 +#define V4L2_STD_SECAM_L        ((v4l2_std_id)0x00400000)
5453 +
5454 +/* ATSC/HDTV */
5455 +#define V4L2_STD_ATSC_8_VSB     ((v4l2_std_id)0x01000000)
5456 +#define V4L2_STD_ATSC_16_VSB    ((v4l2_std_id)0x02000000)
5457 +
5458 +/* some common needed stuff */
5459 +#define V4L2_STD_PAL_BG                (V4L2_STD_PAL_B         |\
5460 +                                V4L2_STD_PAL_B1        |\
5461 +                                V4L2_STD_PAL_G)
5462 +#define V4L2_STD_PAL_DK                (V4L2_STD_PAL_D         |\
5463 +                                V4L2_STD_PAL_D1        |\
5464 +                                V4L2_STD_PAL_K)
5465 +#define V4L2_STD_PAL           (V4L2_STD_PAL_BG        |\
5466 +                                V4L2_STD_PAL_DK        |\
5467 +                                V4L2_STD_PAL_H         |\
5468 +                                V4L2_STD_PAL_I)
5469 +#define V4L2_STD_NTSC           (V4L2_STD_NTSC_M       |\
5470 +                                V4L2_STD_NTSC_M_JP)
5471 +#define V4L2_STD_SECAM         (V4L2_STD_SECAM_B       |\
5472 +                                V4L2_STD_SECAM_D       |\
5473 +                                V4L2_STD_SECAM_G       |\
5474 +                                V4L2_STD_SECAM_H       |\
5475 +                                V4L2_STD_SECAM_K       |\
5476 +                                V4L2_STD_SECAM_K1      |\
5477 +                                V4L2_STD_SECAM_L)
5478 +
5479 +#define V4L2_STD_525_60                (V4L2_STD_PAL_M         |\
5480 +                                V4L2_STD_PAL_60        |\
5481 +                                V4L2_STD_NTSC)
5482 +#define V4L2_STD_625_50                (V4L2_STD_PAL           |\
5483 +                                V4L2_STD_PAL_N         |\
5484 +                                V4L2_STD_PAL_Nc        |\
5485 +                                V4L2_STD_SECAM)
5486 +
5487 +#define V4L2_STD_UNKNOWN        0
5488 +#define V4L2_STD_ALL            (V4L2_STD_525_60       |\
5489 +                                V4L2_STD_625_50)
5490 +
5491 +struct v4l2_standard
5492 +{
5493 +       __u32                index;
5494 +       v4l2_std_id          id;
5495 +       __u8                 name[24];
5496 +       struct v4l2_fract    frameperiod; /* Frames, not fields */
5497 +       __u32                framelines;
5498 +       __u32                reserved[4];
5499 +};
5500 +
5501 +
5502 +/*
5503 + *     V I D E O   I N P U T S
5504 + */
5505 +struct v4l2_input
5506 +{
5507 +       __u32        index;             /*  Which input */
5508 +       __u8         name[32];          /*  Label */
5509 +       __u32        type;              /*  Type of input */
5510 +       __u32        audioset;          /*  Associated audios (bitfield) */
5511 +       __u32        tuner;             /*  Associated tuner */
5512 +       v4l2_std_id  std;
5513 +       __u32        status;
5514 +       __u32        reserved[4];
5515 +};
5516 +/*  Values for the 'type' field */
5517 +#define V4L2_INPUT_TYPE_TUNER          1
5518 +#define V4L2_INPUT_TYPE_CAMERA         2
5519 +
5520 +/* field 'status' - general */
5521 +#define V4L2_IN_ST_NO_POWER    0x00000001  /* Attached device is off */
5522 +#define V4L2_IN_ST_NO_SIGNAL   0x00000002
5523 +#define V4L2_IN_ST_NO_COLOR    0x00000004
5524 +
5525 +/* field 'status' - analog */
5526 +#define V4L2_IN_ST_NO_H_LOCK   0x00000100  /* No horizontal sync lock */
5527 +#define V4L2_IN_ST_COLOR_KILL  0x00000200  /* Color killer is active */
5528 +
5529 +/* field 'status' - digital */
5530 +#define V4L2_IN_ST_NO_SYNC     0x00010000  /* No synchronization lock */
5531 +#define V4L2_IN_ST_NO_EQU      0x00020000  /* No equalizer lock */
5532 +#define V4L2_IN_ST_NO_CARRIER  0x00040000  /* Carrier recovery failed */
5533 +
5534 +/* field 'status' - VCR and set-top box */
5535 +#define V4L2_IN_ST_MACROVISION 0x01000000  /* Macrovision detected */
5536 +#define V4L2_IN_ST_NO_ACCESS   0x02000000  /* Conditional access denied */
5537 +#define V4L2_IN_ST_VTR         0x04000000  /* VTR time constant */
5538 +
5539 +/*
5540 + *     V I D E O   O U T P U T S
5541 + */
5542 +struct v4l2_output
5543 +{
5544 +       __u32        index;             /*  Which output */
5545 +       __u8         name[32];          /*  Label */
5546 +       __u32        type;              /*  Type of output */
5547 +       __u32        audioset;          /*  Associated audios (bitfield) */
5548 +       __u32        modulator;         /*  Associated modulator */
5549 +       v4l2_std_id  std;
5550 +       __u32        reserved[4];
5551 +};
5552 +/*  Values for the 'type' field */
5553 +#define V4L2_OUTPUT_TYPE_MODULATOR             1
5554 +#define V4L2_OUTPUT_TYPE_ANALOG                        2
5555 +#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY      3
5556 +
5557 +/*
5558 + *     C O N T R O L S
5559 + */
5560 +struct v4l2_control
5561 +{
5562 +       __u32                id;
5563 +       __s32                value;
5564 +};
5565 +
5566 +/*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
5567 +struct v4l2_queryctrl
5568 +{
5569 +       __u32                id;
5570 +       enum v4l2_ctrl_type  type;
5571 +       __u8                 name[32];  /* Whatever */
5572 +       __s32                minimum;   /* Note signedness */
5573 +       __s32                maximum;
5574 +       __s32                step;
5575 +       __s32                default_value;
5576 +       __u32                flags;
5577 +       __u32                reserved[2];
5578 +};
5579 +
5580 +/*  Used in the VIDIOC_QUERYMENU ioctl for querying menu items */
5581 +struct v4l2_querymenu
5582 +{
5583 +       __u32           id;
5584 +       __u32           index;
5585 +       __u8            name[32];       /* Whatever */
5586 +       __u32           reserved;
5587 +};
5588 +
5589 +/*  Control flags  */
5590 +#define V4L2_CTRL_FLAG_DISABLED                0x0001
5591 +#define V4L2_CTRL_FLAG_GRABBED         0x0002
5592 +
5593 +/*  Control IDs defined by V4L2 */
5594 +#define V4L2_CID_BASE                  0x00980900
5595 +/*  IDs reserved for driver specific controls */
5596 +#define V4L2_CID_PRIVATE_BASE          0x08000000
5597 +
5598 +#define V4L2_CID_BRIGHTNESS            (V4L2_CID_BASE+0)
5599 +#define V4L2_CID_CONTRAST              (V4L2_CID_BASE+1)
5600 +#define V4L2_CID_SATURATION            (V4L2_CID_BASE+2)
5601 +#define V4L2_CID_HUE                   (V4L2_CID_BASE+3)
5602 +#define V4L2_CID_AUDIO_VOLUME          (V4L2_CID_BASE+5)
5603 +#define V4L2_CID_AUDIO_BALANCE         (V4L2_CID_BASE+6)
5604 +#define V4L2_CID_AUDIO_BASS            (V4L2_CID_BASE+7)
5605 +#define V4L2_CID_AUDIO_TREBLE          (V4L2_CID_BASE+8)
5606 +#define V4L2_CID_AUDIO_MUTE            (V4L2_CID_BASE+9)
5607 +#define V4L2_CID_AUDIO_LOUDNESS                (V4L2_CID_BASE+10)
5608 +#define V4L2_CID_BLACK_LEVEL           (V4L2_CID_BASE+11)
5609 +#define V4L2_CID_AUTO_WHITE_BALANCE    (V4L2_CID_BASE+12)
5610 +#define V4L2_CID_DO_WHITE_BALANCE      (V4L2_CID_BASE+13)
5611 +#define V4L2_CID_RED_BALANCE           (V4L2_CID_BASE+14)
5612 +#define V4L2_CID_BLUE_BALANCE          (V4L2_CID_BASE+15)
5613 +#define V4L2_CID_GAMMA                 (V4L2_CID_BASE+16)
5614 +#define V4L2_CID_WHITENESS             (V4L2_CID_GAMMA) /* ? Not sure */
5615 +#define V4L2_CID_EXPOSURE              (V4L2_CID_BASE+17)
5616 +#define V4L2_CID_AUTOGAIN              (V4L2_CID_BASE+18)
5617 +#define V4L2_CID_GAIN                  (V4L2_CID_BASE+19)
5618 +#define V4L2_CID_HFLIP                 (V4L2_CID_BASE+20)
5619 +#define V4L2_CID_VFLIP                 (V4L2_CID_BASE+21)
5620 +#define V4L2_CID_HCENTER               (V4L2_CID_BASE+22)
5621 +#define V4L2_CID_VCENTER               (V4L2_CID_BASE+23)
5622 +#define V4L2_CID_LASTP1                        (V4L2_CID_BASE+24) /* last CID + 1 */
5623 +
5624 +/*
5625 + *     T U N I N G
5626 + */
5627 +struct v4l2_tuner
5628 +{
5629 +       __u32                   index;
5630 +       __u8                    name[32];
5631 +       enum v4l2_tuner_type    type;
5632 +       __u32                   capability;
5633 +       __u32                   rangelow;
5634 +       __u32                   rangehigh;
5635 +       __u32                   rxsubchans;
5636 +       __u32                   audmode;
5637 +       __s32                   signal;
5638 +       __s32                   afc;
5639 +       __u32                   reserved[4];
5640 +};
5641 +
5642 +struct v4l2_modulator
5643 +{
5644 +       __u32                   index;
5645 +       __u8                    name[32];
5646 +       __u32                   capability;
5647 +       __u32                   rangelow;
5648 +       __u32                   rangehigh;
5649 +       __u32                   txsubchans;
5650 +       __u32                   reserved[4];
5651 +};
5652 +
5653 +/*  Flags for the 'capability' field */
5654 +#define V4L2_TUNER_CAP_LOW             0x0001
5655 +#define V4L2_TUNER_CAP_NORM            0x0002
5656 +#define V4L2_TUNER_CAP_STEREO          0x0010
5657 +#define V4L2_TUNER_CAP_LANG2           0x0020
5658 +#define V4L2_TUNER_CAP_SAP             0x0020
5659 +#define V4L2_TUNER_CAP_LANG1           0x0040
5660 +
5661 +/*  Flags for the 'rxsubchans' field */
5662 +#define V4L2_TUNER_SUB_MONO            0x0001
5663 +#define V4L2_TUNER_SUB_STEREO          0x0002
5664 +#define V4L2_TUNER_SUB_LANG2           0x0004
5665 +#define V4L2_TUNER_SUB_SAP             0x0004
5666 +#define V4L2_TUNER_SUB_LANG1           0x0008
5667 +
5668 +/*  Values for the 'audmode' field */
5669 +#define V4L2_TUNER_MODE_MONO           0x0000
5670 +#define V4L2_TUNER_MODE_STEREO         0x0001
5671 +#define V4L2_TUNER_MODE_LANG2          0x0002
5672 +#define V4L2_TUNER_MODE_SAP            0x0002
5673 +#define V4L2_TUNER_MODE_LANG1          0x0003
5674 +
5675 +struct v4l2_frequency
5676 +{
5677 +       __u32                 tuner;
5678 +       enum v4l2_tuner_type  type;
5679 +        __u32                frequency;
5680 +       __u32                 reserved[8];
5681 +};
5682 +
5683 +/*
5684 + *     A U D I O
5685 + */
5686 +struct v4l2_audio
5687 +{
5688 +       __u32   index;
5689 +       __u8    name[32];
5690 +       __u32   capability;
5691 +       __u32   mode;
5692 +       __u32   reserved[2];
5693 +};
5694 +/*  Flags for the 'capability' field */
5695 +#define V4L2_AUDCAP_STEREO             0x00001
5696 +#define V4L2_AUDCAP_AVL                        0x00002
5697 +
5698 +/*  Flags for the 'mode' field */
5699 +#define V4L2_AUDMODE_AVL               0x00001
5700 +
5701 +struct v4l2_audioout
5702 +{
5703 +       __u32   index;
5704 +       __u8    name[32];
5705 +       __u32   capability;
5706 +       __u32   mode;
5707 +       __u32   reserved[2];
5708 +};
5709 +
5710 +/*
5711 + *     D A T A   S E R V I C E S   ( V B I )
5712 + *
5713 + *     Data services API by Michael Schimek
5714 + */
5715 +
5716 +struct v4l2_vbi_format
5717 +{
5718 +       __u32   sampling_rate;          /* in 1 Hz */
5719 +       __u32   offset;
5720 +       __u32   samples_per_line;
5721 +       __u32   sample_format;          /* V4L2_PIX_FMT_* */
5722 +       __s32   start[2];
5723 +       __u32   count[2];
5724 +       __u32   flags;                  /* V4L2_VBI_* */
5725 +       __u32   reserved[2];            /* must be zero */
5726 +};
5727 +
5728 +/*  VBI flags  */
5729 +#define V4L2_VBI_UNSYNC                (1<< 0)
5730 +#define V4L2_VBI_INTERLACED    (1<< 1)
5731 +
5732 +
5733 +/*
5734 + *     A G G R E G A T E   S T R U C T U R E S
5735 + */
5736 +
5737 +/*     Stream data format
5738 + */
5739 +struct v4l2_format
5740 +{
5741 +       enum v4l2_buf_type type;
5742 +       union
5743 +       {
5744 +               struct v4l2_pix_format  pix;  // V4L2_BUF_TYPE_VIDEO_CAPTURE
5745 +               struct v4l2_window      win;  // V4L2_BUF_TYPE_VIDEO_OVERLAY
5746 +               struct v4l2_vbi_format  vbi;  // V4L2_BUF_TYPE_VBI_CAPTURE
5747 +               __u8    raw_data[200];        // user-defined
5748 +       } fmt;
5749 +};
5750 +
5751 +
5752 +/*     Stream type-dependent parameters
5753 + */
5754 +struct v4l2_streamparm
5755 +{
5756 +       enum v4l2_buf_type type;
5757 +       union
5758 +       {
5759 +               struct v4l2_captureparm capture;
5760 +               struct v4l2_outputparm  output;
5761 +               __u8    raw_data[200];  /* user-defined */
5762 +       } parm;
5763 +};
5764 +
5765 +
5766 +
5767 +/*
5768 + *     I O C T L   C O D E S   F O R   V I D E O   D E V I C E S
5769 + *
5770 + */
5771 +#define VIDIOC_QUERYCAP                _IOR  ('V',  0, struct v4l2_capability)
5772 +#define VIDIOC_RESERVED                _IO   ('V',  1)
5773 +#define VIDIOC_ENUM_FMT         _IOWR ('V',  2, struct v4l2_fmtdesc)
5774 +#define VIDIOC_G_FMT           _IOWR ('V',  4, struct v4l2_format)
5775 +#define VIDIOC_S_FMT           _IOWR ('V',  5, struct v4l2_format)
5776 +#if 0
5777 +#define VIDIOC_G_COMP          _IOR  ('V',  6, struct v4l2_compression)
5778 +#define VIDIOC_S_COMP          _IOW  ('V',  7, struct v4l2_compression)
5779 +#endif
5780 +#define VIDIOC_REQBUFS         _IOWR ('V',  8, struct v4l2_requestbuffers)
5781 +#define VIDIOC_QUERYBUF                _IOWR ('V',  9, struct v4l2_buffer)
5782 +#define VIDIOC_G_FBUF          _IOR  ('V', 10, struct v4l2_framebuffer)
5783 +#define VIDIOC_S_FBUF          _IOW  ('V', 11, struct v4l2_framebuffer)
5784 +#define VIDIOC_OVERLAY         _IOW  ('V', 14, int)
5785 +#define VIDIOC_QBUF            _IOWR ('V', 15, struct v4l2_buffer)
5786 +#define VIDIOC_DQBUF           _IOWR ('V', 17, struct v4l2_buffer)
5787 +#define VIDIOC_STREAMON                _IOW  ('V', 18, int)
5788 +#define VIDIOC_STREAMOFF       _IOW  ('V', 19, int)
5789 +#define VIDIOC_G_PARM          _IOWR ('V', 21, struct v4l2_streamparm)
5790 +#define VIDIOC_S_PARM          _IOWR ('V', 22, struct v4l2_streamparm)
5791 +#define VIDIOC_G_STD           _IOR  ('V', 23, v4l2_std_id)
5792 +#define VIDIOC_S_STD           _IOW  ('V', 24, v4l2_std_id)
5793 +#define VIDIOC_ENUMSTD         _IOWR ('V', 25, struct v4l2_standard)
5794 +#define VIDIOC_ENUMINPUT       _IOWR ('V', 26, struct v4l2_input)
5795 +#define VIDIOC_G_CTRL          _IOWR ('V', 27, struct v4l2_control)
5796 +#define VIDIOC_S_CTRL          _IOWR ('V', 28, struct v4l2_control)
5797 +#define VIDIOC_G_TUNER         _IOWR ('V', 29, struct v4l2_tuner)
5798 +#define VIDIOC_S_TUNER         _IOW  ('V', 30, struct v4l2_tuner)
5799 +#define VIDIOC_G_AUDIO         _IOR  ('V', 33, struct v4l2_audio)
5800 +#define VIDIOC_S_AUDIO         _IOW  ('V', 34, struct v4l2_audio)
5801 +#define VIDIOC_QUERYCTRL       _IOWR ('V', 36, struct v4l2_queryctrl)
5802 +#define VIDIOC_QUERYMENU       _IOWR ('V', 37, struct v4l2_querymenu)
5803 +#define VIDIOC_G_INPUT         _IOR  ('V', 38, int)
5804 +#define VIDIOC_S_INPUT         _IOWR ('V', 39, int)
5805 +#define VIDIOC_G_OUTPUT                _IOR  ('V', 46, int)
5806 +#define VIDIOC_S_OUTPUT                _IOWR ('V', 47, int)
5807 +#define VIDIOC_ENUMOUTPUT      _IOWR ('V', 48, struct v4l2_output)
5808 +#define VIDIOC_G_AUDOUT                _IOR  ('V', 49, struct v4l2_audioout)
5809 +#define VIDIOC_S_AUDOUT                _IOW  ('V', 50, struct v4l2_audioout)
5810 +#define VIDIOC_G_MODULATOR     _IOWR ('V', 54, struct v4l2_modulator)
5811 +#define VIDIOC_S_MODULATOR     _IOW  ('V', 55, struct v4l2_modulator)
5812 +#define VIDIOC_G_FREQUENCY     _IOWR ('V', 56, struct v4l2_frequency)
5813 +#define VIDIOC_S_FREQUENCY     _IOW  ('V', 57, struct v4l2_frequency)
5814 +#define VIDIOC_CROPCAP         _IOR  ('V', 58, struct v4l2_cropcap)
5815 +#define VIDIOC_G_CROP          _IOWR ('V', 59, struct v4l2_crop)
5816 +#define VIDIOC_S_CROP          _IOW  ('V', 60, struct v4l2_crop)
5817 +#define VIDIOC_G_JPEGCOMP      _IOR  ('V', 61, struct v4l2_jpegcompression)
5818 +#define VIDIOC_S_JPEGCOMP      _IOW  ('V', 62, struct v4l2_jpegcompression)
5819 +#define VIDIOC_QUERYSTD        _IOR  ('V', 63, v4l2_std_id)
5820 +#define VIDIOC_TRY_FMT         _IOWR ('V', 64, struct v4l2_format)
5821 +#define VIDIOC_ENUMAUDIO       _IOWR ('V', 65, struct v4l2_audio)
5822 +#define VIDIOC_ENUMAUDOUT      _IOWR ('V', 66, struct v4l2_audioout)
5823 +#define VIDIOC_G_PRIORITY       _IOR  ('V', 67, enum v4l2_priority)
5824 +#define VIDIOC_S_PRIORITY       _IOW  ('V', 68, enum v4l2_priority)
5825 +
5826 +/* for compatibility, will go away some day */
5827 +#define VIDIOC_OVERLAY_OLD             _IOWR ('V', 14, int)
5828 +#define VIDIOC_S_PARM_OLD              _IOW  ('V', 22, struct v4l2_streamparm)
5829 +#define VIDIOC_S_CTRL_OLD              _IOW  ('V', 28, struct v4l2_control)
5830 +#define VIDIOC_G_AUDIO_OLD             _IOWR ('V', 33, struct v4l2_audio)
5831 +#define VIDIOC_G_AUDOUT_OLD            _IOWR ('V', 49, struct v4l2_audioout)
5832 +
5833 +#define BASE_VIDIOC_PRIVATE    192             /* 192-255 are private */
5834 +
5835 +
5836 +#ifdef __KERNEL__
5837 +/*
5838 + *
5839 + *     V 4 L 2   D R I V E R   H E L P E R   A P I
5840 + *
5841 + *     Some commonly needed functions for drivers (v4l2-common.o module)
5842 + */
5843 +#include <linux/fs.h>
5844 +
5845 +/*  Video standard functions  */
5846 +extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs);
5847 +extern int v4l2_video_std_construct(struct v4l2_standard *vs,
5848 +                                   int id, char *name);
5849 +
5850 +/* prority handling */
5851 +struct v4l2_prio_state {
5852 +       atomic_t prios[4];
5853 +};
5854 +int v4l2_prio_init(struct v4l2_prio_state *global);
5855 +int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
5856 +                    enum v4l2_priority new);
5857 +int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local);
5858 +int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local);
5859 +enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
5860 +int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local);
5861 +
5862 +/* names for fancy debug output */
5863 +extern char *v4l2_field_names[];
5864 +extern char *v4l2_type_names[];
5865 +extern char *v4l2_ioctl_names[];
5866 +
5867 +/*  Compatibility layer interface  --  v4l1-compat module */
5868 +typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file,
5869 +                          unsigned int cmd, void *arg);
5870 +int v4l_compat_translate_ioctl(struct inode *inode, struct file *file,
5871 +                              int cmd, void *arg, v4l2_kioctl driver_ioctl);
5872 +
5873 +#endif /* __KERNEL__ */
5874 +#endif /* __LINUX_VIDEODEV2_H */
5875 +
5876 +/*
5877 + * Local variables:
5878 + * c-basic-offset: 8
5879 + * End:
5880 + */
5881 --
5882 1.5.6.3
5883