2 * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
4 * Copyright (C) 2007 Openmoko, Inc, Andy Green <andy@openmoko.com>
5 * Based on S3C MMC driver that was:
6 * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/mmc/mmc.h>
15 #include <linux/mmc/sd.h>
16 #include <linux/mmc/host.h>
17 #include <linux/platform_device.h>
18 #include <linux/irq.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <linux/workqueue.h>
22 #include <linux/crc7.h>
23 #include <linux/scatterlist.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/mfd/glamo.h>
28 #include "glamo-core.h"
29 #include "glamo-regs.h"
31 #define DRIVER_NAME "glamo-mci"
33 struct glamo_mci_host {
34 struct glamo_mmc_platform_data *pdata;
35 struct platform_device *pdev;
36 struct glamo_core *core;
38 struct resource *mmio_mem;
39 struct resource *data_mem;
40 void __iomem *mmio_base;
41 u16 __iomem *data_base;
45 struct regulator *regulator;
46 struct mmc_request *mrq;
48 unsigned int clk_rate;
53 unsigned char request_counter;
55 struct timer_list disable_timer;
57 struct work_struct irq_work;
58 struct work_struct read_work;
60 unsigned clk_enabled : 1;
64 static void glamo_mci_send_request(struct mmc_host *mmc, struct mmc_request* mrq);
65 static void glamo_mci_send_command(struct glamo_mci_host *host,
66 struct mmc_command *cmd);
71 * held at /(3 + 1) due to concerns of 100R recommended series resistor
72 * allows 16MHz @ 4-bit --> 8MBytes/sec raw
74 * you can override this on kernel commandline using
76 * glamo_mci.sd_max_clk=10000000
81 static int sd_max_clk = 21000000;
82 module_param(sd_max_clk, int, 0644);
87 * you can override this on kernel commandline using
89 * glamo_mci.sd_slow_ratio=8
93 * platform callback is used to decide effective clock rate, if not
94 * defined then max is used, if defined and returns nonzero, rate is
95 * divided by this factor
98 static int sd_slow_ratio = 8;
99 module_param(sd_slow_ratio, int, 0644);
102 * Post-power SD clock rate
104 * you can override this on kernel commandline using
106 * glamo_mci.sd_post_power_clock=1000000
110 * After changing power to card, clock is held at this rate until first bulk
114 static int sd_post_power_clock = 1000000;
115 module_param(sd_post_power_clock, int, 0644);
118 static inline void glamo_reg_write(struct glamo_mci_host *glamo,
119 u_int16_t reg, u_int16_t val)
121 writew(val, glamo->mmio_base + reg);
124 static inline u_int16_t glamo_reg_read(struct glamo_mci_host *glamo,
127 return readw(glamo->mmio_base + reg);
130 static void glamo_reg_set_bit_mask(struct glamo_mci_host *glamo,
131 u_int16_t reg, u_int16_t mask,
138 tmp = glamo_reg_read(glamo, reg);
141 glamo_reg_write(glamo, reg, tmp);
144 static void glamo_mci_clock_disable(struct glamo_mci_host *host) {
145 if (host->clk_enabled) {
146 glamo_engine_suspend(host->core, GLAMO_ENGINE_MMC);
147 host->clk_enabled = 0;
151 static void glamo_mci_clock_enable(struct glamo_mci_host *host) {
152 del_timer_sync(&host->disable_timer);
154 if (!host->clk_enabled) {
155 glamo_engine_enable(host->core, GLAMO_ENGINE_MMC);
156 host->clk_enabled = 1;
160 static void glamo_mci_disable_timer(unsigned long data) {
161 struct glamo_mci_host *host = (struct glamo_mci_host *)data;
162 glamo_mci_clock_disable(host);
166 static void do_pio_read(struct glamo_mci_host *host, struct mmc_data *data)
168 struct scatterlist *sg;
169 u16 __iomem *from_ptr = host->data_base;
172 dev_dbg(&host->pdev->dev, "pio_read():\n");
173 for (sg = data->sg; sg; sg = sg_next(sg)) {
174 sg_pointer = page_address(sg_page(sg)) + sg->offset;
177 memcpy(sg_pointer, from_ptr, sg->length);
178 from_ptr += sg->length >> 1;
180 data->bytes_xfered += sg->length;
183 dev_dbg(&host->pdev->dev, "pio_read(): "
184 "complete (no more data).\n");
187 static void do_pio_write(struct glamo_mci_host *host, struct mmc_data *data)
189 struct scatterlist *sg;
190 u16 __iomem *to_ptr = host->data_base;
193 dev_dbg(&host->pdev->dev, "pio_write():\n");
194 for (sg = data->sg; sg; sg = sg_next(sg)) {
195 sg_pointer = page_address(sg_page(sg)) + sg->offset;
197 data->bytes_xfered += sg->length;
199 memcpy(to_ptr, sg_pointer, sg->length);
200 to_ptr += sg->length >> 1;
203 dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
206 static int glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq)
211 glamo_mci_clock_enable(host);
212 real_rate = glamo_engine_reclock(host->core, GLAMO_ENGINE_MMC, freq);
214 glamo_mci_clock_disable(host);
220 static void glamo_mci_request_done(struct glamo_mci_host *host, struct
222 mod_timer(&host->disable_timer, jiffies + HZ / 16);
223 mmc_request_done(host->mmc, mrq);
227 static void glamo_mci_irq_worker(struct work_struct *work)
229 struct glamo_mci_host *host = container_of(work, struct glamo_mci_host,
231 struct mmc_command *cmd;
233 if (!host->mrq || !host->mrq->cmd)
236 cmd = host->mrq->cmd;
239 if (cmd->data->flags & MMC_DATA_READ) {
244 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
245 dev_dbg(&host->pdev->dev, "status = 0x%04x\n", status);
247 /* we ignore a data timeout report if we are also told the data came */
248 if (status & GLAMO_STAT1_MMC_RB_DRDY)
249 status &= ~GLAMO_STAT1_MMC_DTOUT;
251 if (status & (GLAMO_STAT1_MMC_RTOUT | GLAMO_STAT1_MMC_DTOUT))
252 cmd->error = -ETIMEDOUT;
253 if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) {
254 cmd->error = -EILSEQ;
257 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
261 /* issue STOP if we have been given one to use */
262 if (host->mrq->stop) {
263 glamo_mci_send_command(host, host->mrq->stop);
266 if (cmd->data->flags & MMC_DATA_READ)
267 do_pio_read(host, cmd->data);
271 glamo_mci_request_done(host, cmd->mrq);
274 static void glamo_mci_read_worker(struct work_struct *work)
276 struct glamo_mci_host *host = container_of(work, struct glamo_mci_host,
278 struct mmc_command *cmd;
280 uint16_t blocks_ready;
281 size_t data_read = 0;
283 struct scatterlist *sg;
284 u16 __iomem *from_ptr = host->data_base;
288 cmd = host->mrq->cmd;
291 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
293 if (status & (GLAMO_STAT1_MMC_RTOUT | GLAMO_STAT1_MMC_DTOUT))
294 cmd->error = -ETIMEDOUT;
295 if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR))
296 cmd->error = -EILSEQ;
298 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
302 blocks_ready = glamo_reg_read(host, GLAMO_REG_MMC_RB_BLKCNT);
303 data_ready = blocks_ready * cmd->data->blksz;
305 if (data_ready == data_read)
308 while(sg && data_read + sg->length <= data_ready) {
309 sg_pointer = page_address(sg_page(sg)) + sg->offset;
310 memcpy(sg_pointer, from_ptr, sg->length);
311 from_ptr += sg->length >> 1;
313 data_read += sg->length;
318 cmd->data->bytes_xfered = data_read;
321 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
322 } while (!(status & GLAMO_STAT1_MMC_IDLE));
325 glamo_mci_send_command(host, host->mrq->stop);
328 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
329 } while (!(status & GLAMO_STAT1_MMC_IDLE));
332 glamo_mci_request_done(host, cmd->mrq);
335 static irqreturn_t glamo_mci_irq(int irq, void *devid)
337 struct glamo_mci_host *host = (struct glamo_mci_host*)devid;
338 schedule_work(&host->irq_work);
343 static void glamo_mci_send_command(struct glamo_mci_host *host,
344 struct mmc_command *cmd)
348 unsigned int timeout = 1000000;
349 u16 * reg_resp = (u16 *)(host->mmio_base + GLAMO_REG_MMC_CMD_RSP1);
351 int triggers_int = 1;
353 /* if we can't do it, reject as busy */
354 if (!glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1) &
355 GLAMO_STAT1_MMC_IDLE) {
360 /* create an array in wire order for CRC computation */
361 u8a[0] = 0x40 | (cmd->opcode & 0x3f);
362 u8a[1] = (u8)(cmd->arg >> 24);
363 u8a[2] = (u8)(cmd->arg >> 16);
364 u8a[3] = (u8)(cmd->arg >> 8);
365 u8a[4] = (u8)cmd->arg;
366 u8a[5] = (crc7(0, u8a, 5) << 1) | 0x01; /* crc7 on first 5 bytes of packet */
368 /* issue the wire-order array including CRC in register order */
369 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG1, ((u8a[4] << 8) | u8a[5]));
370 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG2, ((u8a[2] << 8) | u8a[3]));
371 glamo_reg_write(host, GLAMO_REG_MMC_CMD_REG3, ((u8a[0] << 8) | u8a[1]));
373 /* command index toggle */
374 fire |= (host->request_counter & 1) << 12;
376 /* set type of command */
377 switch (mmc_cmd_type(cmd)) {
379 fire |= GLAMO_FIRE_MMC_CMDT_BNR;
382 fire |= GLAMO_FIRE_MMC_CMDT_BR;
385 fire |= GLAMO_FIRE_MMC_CMDT_AND;
388 fire |= GLAMO_FIRE_MMC_CMDT_AD;
392 * if it expects a response, set the type expected
394 * R1, Length : 48bit, Normal response
395 * R1b, Length : 48bit, same R1, but added card busy status
396 * R2, Length : 136bit (really 128 bits with CRC snipped)
397 * R3, Length : 48bit (OCR register value)
398 * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
399 * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
400 * R6, Length : 48bit (RCA register)
401 * R7, Length : 48bit (interface condition, VHS(voltage supplied),
402 * check pattern, CRC7)
404 switch (mmc_resp_type(cmd)) {
405 case MMC_RSP_R1: /* same index as R6 and R7 */
406 fire |= GLAMO_FIRE_MMC_RSPT_R1;
409 fire |= GLAMO_FIRE_MMC_RSPT_R1b;
412 fire |= GLAMO_FIRE_MMC_RSPT_R2;
415 fire |= GLAMO_FIRE_MMC_RSPT_R3;
417 /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
420 * From the command index, set up the command class in the host ctrllr
422 * missing guys present on chip but couldn't figure out how to use yet:
424 * 0x9 "cancel running command"
426 switch (cmd->opcode) {
427 case MMC_READ_SINGLE_BLOCK:
428 fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
430 case MMC_SWITCH: /* 64 byte payload */
431 case SD_APP_SEND_SCR:
432 case MMC_READ_MULTIPLE_BLOCK:
433 /* we will get an interrupt off this */
435 /* multiblock no stop */
436 fire |= GLAMO_FIRE_MMC_CC_MBRNS;
438 /* multiblock with stop */
439 fire |= GLAMO_FIRE_MMC_CC_MBRS;
441 case MMC_WRITE_BLOCK:
442 fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
444 case MMC_WRITE_MULTIPLE_BLOCK:
446 /* multiblock with stop */
447 fire |= GLAMO_FIRE_MMC_CC_MBWS;
449 /* multiblock NO stop-- 'RESERVED'? */
450 fire |= GLAMO_FIRE_MMC_CC_MBWNS;
452 case MMC_STOP_TRANSMISSION:
453 fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
457 fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
463 host->mrq = cmd->mrq;
465 /* always largest timeout */
466 glamo_reg_write(host, GLAMO_REG_MMC_TIMEOUT, 0xfff);
468 /* Generate interrupt on txfer */
469 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC, 0xff36,
471 GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
472 GLAMO_BASIC_MMC_EN_COMPL_INT |
473 GLAMO_BASIC_MMC_EN_DATA_PUPS |
474 GLAMO_BASIC_MMC_EN_CMD_PUP);
476 /* send the command out on the wire */
477 /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
478 glamo_reg_write(host, GLAMO_REG_MMC_CMD_FIRE, fire);
480 /* we are deselecting card? because it isn't going to ack then... */
481 if ((cmd->opcode == 7) && (cmd->arg == 0))
485 * we must spin until response is ready or timed out
486 * -- we don't get interrupts unless there is a bulk rx
489 status = glamo_reg_read(host, GLAMO_REG_MMC_RB_STAT1);
490 while (((((status >> 15) & 1) != (host->request_counter & 1)) ||
491 (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
492 GLAMO_STAT1_MMC_RTOUT |
493 GLAMO_STAT1_MMC_DTOUT |
494 GLAMO_STAT1_MMC_BWERR |
495 GLAMO_STAT1_MMC_BRERR)))) && (timeout--));
497 if ((status & (GLAMO_STAT1_MMC_RTOUT |
498 GLAMO_STAT1_MMC_DTOUT)) ||
500 cmd->error = -ETIMEDOUT;
501 } else if (status & (GLAMO_STAT1_MMC_BWERR | GLAMO_STAT1_MMC_BRERR)) {
502 cmd->error = -EILSEQ;
505 if (cmd->flags & MMC_RSP_PRESENT) {
506 if (cmd->flags & MMC_RSP_136) {
507 cmd->resp[3] = readw(®_resp[0]) |
508 (readw(®_resp[1]) << 16);
509 cmd->resp[2] = readw(®_resp[2]) |
510 (readw(®_resp[3]) << 16);
511 cmd->resp[1] = readw(®_resp[4]) |
512 (readw(®_resp[5]) << 16);
513 cmd->resp[0] = readw(®_resp[6]) |
514 (readw(®_resp[7]) << 16);
516 cmd->resp[0] = (readw(®_resp[0]) >> 8) |
517 (readw(®_resp[1]) << 8) |
518 ((readw(®_resp[2])) << 24);
523 /* We'll only get an interrupt when all data has been transfered.
524 By starting to copy data when it's avaiable we can increase throughput by
526 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
527 schedule_work(&host->read_work);
532 static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
533 struct mmc_data *data)
535 /* set up the block info */
536 glamo_reg_write(host, GLAMO_REG_MMC_DATBLKLEN, data->blksz);
537 glamo_reg_write(host, GLAMO_REG_MMC_DATBLKCNT, data->blocks);
539 data->bytes_xfered = 0;
541 /* if write, prep the write into the shared RAM before the command */
542 if (data->flags & MMC_DATA_WRITE) {
543 do_pio_write(host, data);
546 dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
547 data->blksz, data->blocks);
551 static int glamo_mci_irq_poll(struct glamo_mci_host *host,
552 struct mmc_command *cmd)
554 int timeout = 1000000;
556 * if the glamo INT# line isn't wired (*cough* it can happen)
557 * I'm afraid we have to spin on the IRQ status bit and "be
561 * we have faith we will get an "interrupt"...
562 * but something insane like suspend problems can mean
563 * we spin here forever, so we timeout after a LONG time
565 while ((!(readw(host->core->base +
566 GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
570 if (cmd->data->error)
571 cmd->data->error = -ETIMEDOUT;
572 dev_err(&host->pdev->dev, "Payload timeout\n");
575 /* ack this interrupt source */
576 writew(GLAMO_IRQ_MMC, host->core->base +
577 GLAMO_REG_IRQ_CLEAR);
579 /* yay we are an interrupt controller! -- call the ISR
580 * it will stop clock to card
582 glamo_mci_irq(host->irq, host);
587 static void glamo_mci_send_request(struct mmc_host *mmc, struct mmc_request *mrq)
589 struct glamo_mci_host *host = mmc_priv(mmc);
590 struct mmc_command *cmd = mrq->cmd;
592 glamo_mci_clock_enable(host);
593 host->request_counter++;
595 if(glamo_mci_prepare_pio(host, cmd->data)) {
597 cmd->data->error = -EIO;
602 dev_dbg(&host->pdev->dev,"cmd 0x%x, "
603 "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
604 cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
607 glamo_mci_send_command(host, cmd);
610 * if we don't have bulk data to take care of, we're done
612 if (!cmd->data || cmd->error)
616 if (!host->core->irq_works) {
617 if (glamo_mci_irq_poll(host, mrq->cmd))
622 * Otherwise can can use the interrupt as async completion --
623 * if there is read data coming, or we wait for write data to complete,
624 * exit without mmc_request_done() as the payload interrupt
627 dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
630 glamo_mci_request_done(host, mrq);
633 static void glamo_mci_set_power_mode(struct glamo_mci_host *host,
634 unsigned char power_mode) {
637 if (power_mode == host->power_mode)
642 if (host->power_mode == MMC_POWER_OFF) {
643 ret = regulator_enable(host->regulator);
645 dev_err(&host->pdev->dev, "Failed to enable regulator: %d\n", ret);
652 glamo_engine_disable(host->core,
655 ret = regulator_disable(host->regulator);
657 dev_warn(&host->pdev->dev, "Failed to disable regulator: %d\n", ret);
660 host->power_mode = power_mode;
663 static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
665 struct glamo_mci_host *host = mmc_priv(mmc);
672 glamo_mci_set_power_mode(host, ios->power_mode);
674 if (host->vdd != ios->vdd) {
675 ret = mmc_regulator_set_ocr(host->regulator, ios->vdd);
677 dev_err(&host->pdev->dev, "Failed to set regulator voltage: %d\n", ret);
679 host->vdd = ios->vdd;
681 rate = glamo_mci_set_card_clock(host, ios->clock);
683 if ((ios->power_mode == MMC_POWER_ON) ||
684 (ios->power_mode == MMC_POWER_UP)) {
685 dev_info(&host->pdev->dev,
686 "powered (vdd = %hu) clk: %dkHz div=%hu (req: %ukHz). "
687 "Bus width=%d\n", ios->vdd,
689 ios->clock / 1000, (int)ios->bus_width);
691 dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
695 if (ios->bus_width == MMC_BUS_WIDTH_4)
696 bus_width = GLAMO_BASIC_MMC_EN_4BIT_DATA;
698 sd_drive = (rate * 4) / host->clk_rate;
702 glamo_reg_set_bit_mask(host, GLAMO_REG_MMC_BASIC,
703 GLAMO_BASIC_MMC_EN_4BIT_DATA | 0xb0,
704 bus_width | sd_drive << 6);
709 * no physical write protect supported by us
711 static int glamo_mci_get_ro(struct mmc_host *mmc)
716 static struct mmc_host_ops glamo_mci_ops = {
717 .request = glamo_mci_send_request,
718 .set_ios = glamo_mci_set_ios,
719 .get_ro = glamo_mci_get_ro,
722 static int glamo_mci_probe(struct platform_device *pdev)
724 struct mmc_host *mmc;
725 struct glamo_mci_host *host;
726 struct glamo_core *core = dev_get_drvdata(pdev->dev.parent);
729 dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
731 mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
737 host = mmc_priv(mmc);
741 host->pdata = core->pdata->mmc_data;
742 host->power_mode = MMC_POWER_OFF;
743 host->clk_enabled = 0;
745 host->irq = platform_get_irq(pdev, 0);
747 INIT_WORK(&host->irq_work, glamo_mci_irq_worker);
748 INIT_WORK(&host->read_work, glamo_mci_read_worker);
750 host->regulator = regulator_get(pdev->dev.parent, "SD_3V3");
751 if (!host->regulator) {
752 dev_err(&pdev->dev, "Cannot proceed without regulator.\n");
754 goto probe_free_host;
757 host->mmio_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
758 if (!host->mmio_mem) {
760 "failed to get io memory region resouce.\n");
762 goto probe_regulator_put;
765 host->mmio_mem = request_mem_region(host->mmio_mem->start,
766 resource_size(host->mmio_mem),
769 if (!host->mmio_mem) {
770 dev_err(&pdev->dev, "failed to request io memory region.\n");
772 goto probe_regulator_put;
775 host->mmio_base = ioremap(host->mmio_mem->start,
776 resource_size(host->mmio_mem));
777 if (!host->mmio_base) {
778 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
780 goto probe_free_mem_region_mmio;
784 /* Get ahold of our data buffer we use for data in and out on MMC */
785 host->data_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
786 if (!host->data_mem) {
788 "failed to get io memory region resource.\n");
790 goto probe_iounmap_mmio;
793 host->data_mem = request_mem_region(host->data_mem->start,
794 resource_size(host->data_mem),
797 if (!host->data_mem) {
798 dev_err(&pdev->dev, "failed to request io memory region.\n");
800 goto probe_iounmap_mmio;
802 host->data_base = ioremap(host->data_mem->start,
803 resource_size(host->data_mem));
805 if (host->data_base == 0) {
806 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
808 goto probe_free_mem_region_data;
811 ret = request_irq(host->irq, glamo_mci_irq, IRQF_SHARED,
814 dev_err(&pdev->dev, "failed to register irq.\n");
815 goto probe_iounmap_data;
820 host->clk_rate = glamo_pll_rate(host->core, GLAMO_PLL1);
822 /* explain our host controller capabilities */
823 mmc->ops = &glamo_mci_ops;
824 mmc->ocr_avail = mmc_regulator_get_ocrmask(host->regulator);
825 mmc->caps = MMC_CAP_4_BIT_DATA |
826 MMC_CAP_MMC_HIGHSPEED |
827 MMC_CAP_SD_HIGHSPEED;
828 mmc->f_min = host->clk_rate / 256;
829 mmc->f_max = sd_max_clk;
831 mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
832 mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
833 mmc->max_req_size = resource_size(host->data_mem);
834 mmc->max_seg_size = mmc->max_req_size;
835 mmc->max_phys_segs = 128;
836 mmc->max_hw_segs = 128;
838 if (mmc->ocr_avail < 0) {
839 dev_warn(&pdev->dev, "Failed to get ocr list for regulator: %d.\n",
841 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
844 platform_set_drvdata(pdev, mmc);
846 glamo_engine_enable(host->core, GLAMO_ENGINE_MMC);
847 glamo_engine_reset(host->core, GLAMO_ENGINE_MMC);
849 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS1,
850 (u16)(host->data_mem->start));
851 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS2,
852 (u16)(host->data_mem->start >> 16));
854 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS1,
855 (u16)(host->data_mem->start));
856 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS2,
857 (u16)(host->data_mem->start >> 16));
859 setup_timer(&host->disable_timer, glamo_mci_disable_timer,
860 (unsigned long)host);
862 if ((ret = mmc_add_host(mmc))) {
863 dev_err(&pdev->dev, "failed to add mmc host.\n");
867 dev_info(&pdev->dev,"initialisation done.\n");
871 free_irq(host->irq, host);
873 iounmap(host->data_base);
874 probe_free_mem_region_data:
875 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
877 iounmap(host->mmio_base);
878 probe_free_mem_region_mmio:
879 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
881 regulator_put(host->regulator);
888 static int glamo_mci_remove(struct platform_device *pdev)
890 struct mmc_host *mmc = platform_get_drvdata(pdev);
891 struct glamo_mci_host *host = mmc_priv(mmc);
893 free_irq(host->irq, host);
895 mmc_remove_host(mmc);
896 iounmap(host->mmio_base);
897 iounmap(host->data_base);
898 release_mem_region(host->mmio_mem->start, resource_size(host->mmio_mem));
899 release_mem_region(host->data_mem->start, resource_size(host->data_mem));
901 regulator_put(host->regulator);
905 glamo_engine_disable(host->core, GLAMO_ENGINE_MMC);
912 static int glamo_mci_suspend(struct device *dev)
914 struct mmc_host *mmc = dev_get_drvdata(dev);
915 struct glamo_mci_host *host = mmc_priv(mmc);
918 cancel_work_sync(&host->irq_work);
920 ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
922 glamo_engine_disable(host->core, GLAMO_ENGINE_MMC);
927 static int glamo_mci_resume(struct device *dev)
929 struct mmc_host *mmc = dev_get_drvdata(dev);
930 struct glamo_mci_host *host = mmc_priv(mmc);
933 glamo_engine_enable(host->core, GLAMO_ENGINE_MMC);
934 glamo_engine_reset(host->core, GLAMO_ENGINE_MMC);
936 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS1,
937 (u16)(host->data_mem->start));
938 glamo_reg_write(host, GLAMO_REG_MMC_WDATADS2,
939 (u16)(host->data_mem->start >> 16));
941 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS1,
942 (u16)(host->data_mem->start));
943 glamo_reg_write(host, GLAMO_REG_MMC_RDATADS2,
944 (u16)(host->data_mem->start >> 16));
947 ret = mmc_resume_host(host->mmc);
948 /* glamo_mci_clock_disable(host);*/
953 static struct dev_pm_ops glamo_mci_pm_ops = {
954 .suspend = glamo_mci_suspend,
955 .resume = glamo_mci_resume,
957 #define GLAMO_MCI_PM_OPS (&glamo_mci_pm_ops)
959 #else /* CONFIG_PM */
960 #define GLAMO_MCI_PM_OPS NULL
961 #endif /* CONFIG_PM */
964 static struct platform_driver glamo_mci_driver =
966 .probe = glamo_mci_probe,
967 .remove = glamo_mci_remove,
970 .owner = THIS_MODULE,
971 .pm = GLAMO_MCI_PM_OPS,
975 static int __init glamo_mci_init(void)
977 platform_driver_register(&glamo_mci_driver);
981 static void __exit glamo_mci_exit(void)
983 platform_driver_unregister(&glamo_mci_driver);
986 module_init(glamo_mci_init);
987 module_exit(glamo_mci_exit);
989 MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
990 MODULE_LICENSE("GPL");
991 MODULE_AUTHOR("Andy Green <andy@openmoko.com>");