1 From cf5a08f1f16913da8bb24a96afaa2969b29d0827 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 14 Dec 2015 22:25:57 +0100
4 Subject: [PATCH 513/513] net: mediatek: add swconfig driver for gsw_mt762x
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 drivers/net/ethernet/mediatek/Makefile | 4 +-
9 drivers/net/ethernet/mediatek/mt7530.c | 804 +++++++++++++++++++++++++++
10 drivers/net/ethernet/mediatek/mt7530.h | 20 +
11 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 9 +-
12 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
13 drivers/net/ethernet/mediatek/soc_mt7620.c | 1 +
14 6 files changed, 835 insertions(+), 4 deletions(-)
15 create mode 100644 drivers/net/ethernet/mediatek/mt7530.c
16 create mode 100644 drivers/net/ethernet/mediatek/mt7530.h
18 diff --git a/drivers/net/ethernet/mediatek/Makefile b/drivers/net/ethernet/mediatek/Makefile
19 index c4d2dfb..07ba4c2 100644
20 --- a/drivers/net/ethernet/mediatek/Makefile
21 +++ b/drivers/net/ethernet/mediatek/Makefile
22 @@ -15,6 +15,6 @@ mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7620) += soc_mt7620.o
23 mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7621) += soc_mt7621.o
25 obj-$(CONFIG_NET_MEDIATEK_ESW_RT3050) += esw_rt3050.o
26 -obj-$(CONFIG_NET_MEDIATEK_GSW_MT7620) += gsw_mt7620.o
27 -obj-$(CONFIG_NET_MEDIATEK_GSW_MT7621) += gsw_mt7621.o
28 +obj-$(CONFIG_NET_MEDIATEK_GSW_MT7620) += gsw_mt7620.o mt7530.o
29 +obj-$(CONFIG_NET_MEDIATEK_GSW_MT7621) += gsw_mt7621.o mt7530.o
30 obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk-eth-soc.o
31 diff --git a/drivers/net/ethernet/mediatek/mt7530.c b/drivers/net/ethernet/mediatek/mt7530.c
33 index 0000000..4d9980d
35 +++ b/drivers/net/ethernet/mediatek/mt7530.c
38 + * This program is free software; you can redistribute it and/or
39 + * modify it under the terms of the GNU General Public License
40 + * as published by the Free Software Foundation; either version 2
41 + * of the License, or (at your option) any later version.
43 + * This program is distributed in the hope that it will be useful,
44 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
45 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
46 + * GNU General Public License for more details.
48 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
51 +#include <linux/if.h>
52 +#include <linux/module.h>
53 +#include <linux/init.h>
54 +#include <linux/list.h>
55 +#include <linux/if_ether.h>
56 +#include <linux/skbuff.h>
57 +#include <linux/netdevice.h>
58 +#include <linux/netlink.h>
59 +#include <linux/bitops.h>
60 +#include <net/genetlink.h>
61 +#include <linux/switch.h>
62 +#include <linux/delay.h>
63 +#include <linux/phy.h>
64 +#include <linux/netdevice.h>
65 +#include <linux/etherdevice.h>
66 +#include <linux/lockdep.h>
67 +#include <linux/workqueue.h>
68 +#include <linux/of_device.h>
72 +#define MT7530_CPU_PORT 6
73 +#define MT7530_NUM_PORTS 8
74 +#define MT7530_NUM_VLANS 16
75 +#define MT7530_MAX_VID 4095
76 +#define MT7530_MIN_VID 0
79 +#define REG_ESW_VLAN_VTCR 0x90
80 +#define REG_ESW_VLAN_VAWD1 0x94
81 +#define REG_ESW_VLAN_VAWD2 0x98
82 +#define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
84 +#define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
85 +#define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
86 +#define REG_ESW_VLAN_VAWD1_VALID BIT(0)
88 +/* vlan egress mode */
90 + ETAG_CTRL_UNTAG = 0,
93 + ETAG_CTRL_STACK = 3,
96 +#define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
97 +#define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
98 +#define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
100 +#define REG_HWTRAP 0x7804
102 +#define MIB_DESC(_s , _o, _n) \
109 +struct mt7xxx_mib_desc {
111 + unsigned int offset;
115 +#define MT7621_MIB_COUNTER_BASE 0x4000
116 +#define MT7621_MIB_COUNTER_PORT_OFFSET 0x100
117 +#define MT7621_STATS_TDPC 0x00
118 +#define MT7621_STATS_TCRC 0x04
119 +#define MT7621_STATS_TUPC 0x08
120 +#define MT7621_STATS_TMPC 0x0C
121 +#define MT7621_STATS_TBPC 0x10
122 +#define MT7621_STATS_TCEC 0x14
123 +#define MT7621_STATS_TSCEC 0x18
124 +#define MT7621_STATS_TMCEC 0x1C
125 +#define MT7621_STATS_TDEC 0x20
126 +#define MT7621_STATS_TLCEC 0x24
127 +#define MT7621_STATS_TXCEC 0x28
128 +#define MT7621_STATS_TPPC 0x2C
129 +#define MT7621_STATS_TL64PC 0x30
130 +#define MT7621_STATS_TL65PC 0x34
131 +#define MT7621_STATS_TL128PC 0x38
132 +#define MT7621_STATS_TL256PC 0x3C
133 +#define MT7621_STATS_TL512PC 0x40
134 +#define MT7621_STATS_TL1024PC 0x44
135 +#define MT7621_STATS_TOC 0x48
136 +#define MT7621_STATS_RDPC 0x60
137 +#define MT7621_STATS_RFPC 0x64
138 +#define MT7621_STATS_RUPC 0x68
139 +#define MT7621_STATS_RMPC 0x6C
140 +#define MT7621_STATS_RBPC 0x70
141 +#define MT7621_STATS_RAEPC 0x74
142 +#define MT7621_STATS_RCEPC 0x78
143 +#define MT7621_STATS_RUSPC 0x7C
144 +#define MT7621_STATS_RFEPC 0x80
145 +#define MT7621_STATS_ROSPC 0x84
146 +#define MT7621_STATS_RJEPC 0x88
147 +#define MT7621_STATS_RPPC 0x8C
148 +#define MT7621_STATS_RL64PC 0x90
149 +#define MT7621_STATS_RL65PC 0x94
150 +#define MT7621_STATS_RL128PC 0x98
151 +#define MT7621_STATS_RL256PC 0x9C
152 +#define MT7621_STATS_RL512PC 0xA0
153 +#define MT7621_STATS_RL1024PC 0xA4
154 +#define MT7621_STATS_ROC 0xA8
155 +#define MT7621_STATS_RDPC_CTRL 0xB0
156 +#define MT7621_STATS_RDPC_ING 0xB4
157 +#define MT7621_STATS_RDPC_ARL 0xB8
159 +static const struct mt7xxx_mib_desc mt7621_mibs[] = {
160 + MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
161 + MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
162 + MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
163 + MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
164 + MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
165 + MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
166 + MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
167 + MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
168 + MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
169 + MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
170 + MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
171 + MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
172 + MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
173 + MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
174 + MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
175 + MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
176 + MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
177 + MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
178 + MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
179 + MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
180 + MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
181 + MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
182 + MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
183 + MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
184 + MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
185 + MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
186 + MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
187 + MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
188 + MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
189 + MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
190 + MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
191 + MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
192 + MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
193 + MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
194 + MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
195 + MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
196 + MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
197 + MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
198 + MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
199 + MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
200 + MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
204 + /* Global attributes. */
205 + MT7530_ATTR_ENABLE_VLAN,
208 +struct mt7530_port_entry {
212 +struct mt7530_vlan_entry {
218 +struct mt7530_priv {
219 + void __iomem *base;
220 + struct mii_bus *bus;
221 + struct switch_dev swdev;
223 + bool global_vlan_enable;
224 + struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
225 + struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
228 +struct mt7530_mapping {
230 + u16 pvids[MT7530_NUM_PORTS];
231 + u8 members[MT7530_NUM_VLANS];
232 + u8 etags[MT7530_NUM_VLANS];
233 + u16 vids[MT7530_NUM_VLANS];
234 +} mt7530_defaults[] = {
237 + .pvids = { 1, 1, 1, 1, 2, 1, 1 },
238 + .members = { 0, 0x6f, 0x50 },
239 + .etags = { 0, 0x40, 0x40 },
240 + .vids = { 0, 1, 2 },
243 + .pvids = { 2, 1, 1, 1, 1, 1, 1 },
244 + .members = { 0, 0x7e, 0x41 },
245 + .etags = { 0, 0x40, 0x40 },
246 + .vids = { 0, 1, 2 },
250 +struct mt7530_mapping*
251 +mt7530_find_mapping(struct device_node *np)
256 + if (of_property_read_string(np, "mediatek,portmap", &map))
259 + for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++)
260 + if (!strcmp(map, mt7530_defaults[i].name))
261 + return &mt7530_defaults[i];
267 +mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map)
271 + for (i = 0; i < MT7530_NUM_PORTS; i++)
272 + mt7530->port_entries[i].pvid = map->pvids[i];
274 + for (i = 0; i < MT7530_NUM_VLANS; i++) {
275 + mt7530->vlan_entries[i].member = map->members[i];
276 + mt7530->vlan_entries[i].etags = map->etags[i];
277 + mt7530->vlan_entries[i].vid = map->vids[i];
282 +mt7530_reset_switch(struct switch_dev *dev)
284 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
287 + memset(priv->port_entries, 0, sizeof(priv->port_entries));
288 + memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
290 + /* set default vid of each vlan to the same number of vlan, so the vid
291 + * won't need be set explicitly.
293 + for (i = 0; i < MT7530_NUM_VLANS; i++) {
294 + priv->vlan_entries[i].vid = i;
301 +mt7530_get_vlan_enable(struct switch_dev *dev,
302 + const struct switch_attr *attr,
303 + struct switch_val *val)
305 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
307 + val->value.i = priv->global_vlan_enable;
313 +mt7530_set_vlan_enable(struct switch_dev *dev,
314 + const struct switch_attr *attr,
315 + struct switch_val *val)
317 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
319 + priv->global_vlan_enable = val->value.i != 0;
325 +mt7530_r32(struct mt7530_priv *priv, u32 reg)
331 + mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
332 + low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
333 + high = mdiobus_read(priv->bus, 0x1f, 0x10);
335 + return (high << 16) | (low & 0xffff);
338 + val = ioread32(priv->base + reg);
339 + pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
345 +mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
348 + mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
349 + mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff);
350 + mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
354 + pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
355 + iowrite32(val, priv->base + reg);
359 +mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val)
363 + mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val);
365 + for (i = 0; i < 20; i++) {
366 + u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR);
368 + if ((val & BIT(31)) == 0)
374 + printk("mt7530: vtcr timeout\n");
378 +mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val)
380 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
382 + if (port >= MT7530_NUM_PORTS)
385 + *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
392 +mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid)
394 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
396 + if (port >= MT7530_NUM_PORTS)
399 + if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
402 + priv->port_entries[port].pvid = pvid;
408 +mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
410 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
417 + if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
420 + mt7530_vtcr(priv, 0, val->port_vlan);
422 + member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
426 + etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
428 + for (i = 0; i < MT7530_NUM_PORTS; i++) {
429 + struct switch_port *p;
432 + if (!(member & BIT(i)))
435 + p = &val->value.ports[val->len++];
438 + etag = (etags >> (i * 2)) & 0x3;
440 + if (etag == ETAG_CTRL_TAG)
441 + p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
442 + else if (etag != ETAG_CTRL_UNTAG)
443 + printk("vlan egress tag control neither untag nor tag.\n");
450 +mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
452 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
457 + if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
458 + val->len > MT7530_NUM_PORTS)
461 + for (i = 0; i < val->len; i++) {
462 + struct switch_port *p = &val->value.ports[i];
464 + if (p->id >= MT7530_NUM_PORTS)
467 + member |= BIT(p->id);
469 + if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
470 + etags |= BIT(p->id);
472 + priv->vlan_entries[val->port_vlan].member = member;
473 + priv->vlan_entries[val->port_vlan].etags = etags;
479 +mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
480 + struct switch_val *val)
482 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
486 + vlan = val->port_vlan;
487 + vid = (u16)val->value.i;
489 + if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
492 + if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
495 + priv->vlan_entries[vlan].vid = vid;
500 +mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
501 + struct switch_val *val)
503 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
507 + vlan = val->port_vlan;
509 + vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
514 + val->value.i = vid;
519 +mt7530_apply_config(struct switch_dev *dev)
521 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
526 + if (!priv->global_vlan_enable) {
527 + for (i = 0; i < MT7530_NUM_PORTS; i++)
528 + mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0000);
530 + for (i = 0; i < MT7530_NUM_PORTS; i++)
531 + mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0);
536 + /* set all ports as security mode */
537 + for (i = 0; i < MT7530_NUM_PORTS; i++)
538 + mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
540 + /* check if a port is used in tag/untag vlan egress mode */
544 + for (i = 0; i < MT7530_NUM_VLANS; i++) {
545 + u8 member = priv->vlan_entries[i].member;
546 + u8 etags = priv->vlan_entries[i].etags;
551 + for (j = 0; j < MT7530_NUM_PORTS; j++) {
552 + if (!(member & BIT(j)))
555 + if (etags & BIT(j))
556 + tag_ports |= 1u << j;
558 + untag_ports |= 1u << j;
562 + /* set all untag-only ports as transparent and the rest as user port */
563 + for (i = 0; i < MT7530_NUM_PORTS; i++) {
564 + u32 pvc_mode = 0x81000000;
566 + if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
567 + pvc_mode = 0x810000c0;
569 + mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode);
572 + for (i = 0; i < MT7530_NUM_VLANS; i++) {
573 + u16 vid = priv->vlan_entries[i].vid;
574 + u8 member = priv->vlan_entries[i].member;
575 + u8 etags = priv->vlan_entries[i].etags;
579 + val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(i));
585 + val |= (vid << 12);
587 + mt7530_w32(priv, REG_ESW_VLAN_VTIM(i), val);
589 + /* vlan port membership */
591 + mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
592 + REG_ESW_VLAN_VAWD1_VTAG_EN | (member << 16) |
593 + REG_ESW_VLAN_VAWD1_VALID);
595 + mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
599 + for (j = 0; j < MT7530_NUM_PORTS; j++) {
600 + if (etags & BIT(j))
601 + val |= ETAG_CTRL_TAG << (j * 2);
603 + val |= ETAG_CTRL_UNTAG << (j * 2);
605 + mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
607 + /* write to vlan table */
608 + mt7530_vtcr(priv, 1, i);
611 + /* Port Default PVID */
612 + for (i = 0; i < MT7530_NUM_PORTS; i++) {
614 + val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
616 + val |= priv->port_entries[i].pvid;
617 + mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
624 +mt7530_get_port_link(struct switch_dev *dev, int port,
625 + struct switch_port_link *link)
627 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
630 + if (port < 0 || port >= MT7530_NUM_PORTS)
633 + pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port));
635 + link->link = pmsr & 1;
636 + link->duplex = (pmsr >> 1) & 1;
637 + speed = (pmsr >> 2) & 3;
641 + link->speed = SWITCH_PORT_SPEED_10;
644 + link->speed = SWITCH_PORT_SPEED_100;
647 + case 3: /* forced gige speed can be 2 or 3 */
648 + link->speed = SWITCH_PORT_SPEED_1000;
651 + link->speed = SWITCH_PORT_SPEED_UNKNOWN;
658 +static const struct switch_attr mt7530_global[] = {
660 + .type = SWITCH_TYPE_INT,
661 + .name = "enable_vlan",
662 + .description = "VLAN mode (1:enabled)",
664 + .id = MT7530_ATTR_ENABLE_VLAN,
665 + .get = mt7530_get_vlan_enable,
666 + .set = mt7530_set_vlan_enable,
670 +static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
672 + unsigned int port_base;
675 + port_base = MT7621_MIB_COUNTER_BASE +
676 + MT7621_MIB_COUNTER_PORT_OFFSET * port;
678 + t = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
679 + if (mt7621_mibs[i].size == 2) {
682 + hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
689 +static int mt7621_sw_get_port_mib(struct switch_dev *dev,
690 + const struct switch_attr *attr,
691 + struct switch_val *val)
693 + static char buf[4096];
694 + struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
697 + if (val->port_vlan >= MT7530_NUM_PORTS)
700 + len += snprintf(buf + len, sizeof(buf) - len,
701 + "Port %d MIB counters\n", val->port_vlan);
703 + for (i = 0; i < sizeof(mt7621_mibs) / sizeof(*mt7621_mibs); ++i) {
705 + len += snprintf(buf + len, sizeof(buf) - len,
706 + "%-11s: ", mt7621_mibs[i].name);
707 + counter = get_mib_counter(priv, i, val->port_vlan);
708 + len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
712 + val->value.s = buf;
717 +static const struct switch_attr mt7621_port[] = {
719 + .type = SWITCH_TYPE_STRING,
721 + .description = "Get MIB counters for port",
722 + .get = mt7621_sw_get_port_mib,
727 +static const struct switch_attr mt7530_port[] = {
730 +static const struct switch_attr mt7530_vlan[] = {
732 + .type = SWITCH_TYPE_INT,
734 + .description = "VLAN ID (0-4094)",
735 + .set = mt7530_set_vid,
736 + .get = mt7530_get_vid,
741 +static const struct switch_dev_ops mt7621_ops = {
743 + .attr = mt7530_global,
744 + .n_attr = ARRAY_SIZE(mt7530_global),
747 + .attr = mt7621_port,
748 + .n_attr = ARRAY_SIZE(mt7621_port),
751 + .attr = mt7530_vlan,
752 + .n_attr = ARRAY_SIZE(mt7530_vlan),
754 + .get_vlan_ports = mt7530_get_vlan_ports,
755 + .set_vlan_ports = mt7530_set_vlan_ports,
756 + .get_port_pvid = mt7530_get_port_pvid,
757 + .set_port_pvid = mt7530_set_port_pvid,
758 + .get_port_link = mt7530_get_port_link,
759 + .apply_config = mt7530_apply_config,
760 + .reset_switch = mt7530_reset_switch,
763 +static const struct switch_dev_ops mt7530_ops = {
765 + .attr = mt7530_global,
766 + .n_attr = ARRAY_SIZE(mt7530_global),
769 + .attr = mt7530_port,
770 + .n_attr = ARRAY_SIZE(mt7530_port),
773 + .attr = mt7530_vlan,
774 + .n_attr = ARRAY_SIZE(mt7530_vlan),
776 + .get_vlan_ports = mt7530_get_vlan_ports,
777 + .set_vlan_ports = mt7530_set_vlan_ports,
778 + .get_port_pvid = mt7530_get_port_pvid,
779 + .set_port_pvid = mt7530_set_port_pvid,
780 + .get_port_link = mt7530_get_port_link,
781 + .apply_config = mt7530_apply_config,
782 + .reset_switch = mt7530_reset_switch,
786 +mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan)
788 + struct switch_dev *swdev;
789 + struct mt7530_priv *mt7530;
790 + struct mt7530_mapping *map;
793 + mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL);
797 + mt7530->base = base;
799 + mt7530->global_vlan_enable = vlan;
801 + swdev = &mt7530->swdev;
803 + swdev->alias = "mt7530";
804 + swdev->name = "mt7530";
805 + } else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
806 + swdev->alias = "mt7621";
807 + swdev->name = "mt7621";
809 + swdev->alias = "mt7620";
810 + swdev->name = "mt7620";
812 + swdev->cpu_port = MT7530_CPU_PORT;
813 + swdev->ports = MT7530_NUM_PORTS;
814 + swdev->vlans = MT7530_NUM_VLANS;
815 + if (IS_ENABLED(CONFIG_SOC_MT7621))
816 + swdev->ops = &mt7621_ops;
818 + swdev->ops = &mt7530_ops;
820 + ret = register_switch(swdev, NULL);
822 + dev_err(dev, "failed to register mt7530\n");
827 + map = mt7530_find_mapping(dev->of_node);
829 + mt7530_apply_mapping(mt7530, map);
830 + mt7530_apply_config(swdev);
833 + if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) {
834 + dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
835 + mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
837 + dev_info(dev, "loaded %s driver\n", swdev->name);
841 diff --git a/drivers/net/ethernet/mediatek/mt7530.h b/drivers/net/ethernet/mediatek/mt7530.h
843 index 0000000..1fc8c62
845 +++ b/drivers/net/ethernet/mediatek/mt7530.h
848 + * This program is free software; you can redistribute it and/or
849 + * modify it under the terms of the GNU General Public License
850 + * as published by the Free Software Foundation; either version 2
851 + * of the License, or (at your option) any later version.
853 + * This program is distributed in the hope that it will be useful,
854 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
855 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
856 + * GNU General Public License for more details.
858 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
864 +int mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan);
867 diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
868 index dae7147..6299f87 100644
869 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
870 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
871 @@ -1308,8 +1308,13 @@ static int __init fe_init(struct net_device *dev)
874 err = fe_hw_init(dev);
878 + goto err_phy_disconnect;
880 + if ((priv->flags & FE_FLAG_HAS_SWITCH) && priv->soc->switch_config)
881 + priv->soc->switch_config(priv);
887 diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
888 index ba5ba07..d5f8b87 100644
889 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
890 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
891 @@ -383,6 +383,7 @@ struct fe_soc_data {
892 int (*fwd_config)(struct fe_priv *priv);
893 void (*tx_dma)(struct fe_tx_dma *txd);
894 int (*switch_init)(struct fe_priv *priv);
895 + int (*switch_config)(struct fe_priv *priv);
896 void (*port_init)(struct fe_priv *priv, struct device_node *port);
897 int (*has_carrier)(struct fe_priv *priv);
898 int (*mdio_init)(struct fe_priv *priv);
899 diff --git a/drivers/net/ethernet/mediatek/soc_mt7620.c b/drivers/net/ethernet/mediatek/soc_mt7620.c
900 index 9ad6bc9..740dd90 100644
901 --- a/drivers/net/ethernet/mediatek/soc_mt7620.c
902 +++ b/drivers/net/ethernet/mediatek/soc_mt7620.c
903 @@ -313,6 +313,7 @@ static struct fe_soc_data mt7620_data = {
904 .fwd_config = mt7620_fwd_config,
905 .tx_dma = mt7620_tx_dma,
906 .switch_init = mtk_gsw_init,
907 + .switch_config = mt7620_gsw_config,
908 .port_init = mt7620_port_init,
909 .reg_table = mt7620_reg_table,
910 .pdma_glo_cfg = FE_PDMA_SIZE_16DWORDS,