target/linux/ramips/patches-3.8/0204-owrt-MIPS-ralink-add-usb-platform-support.patch

   1 From d7e679017ec92824145b275572f6ef83d461f076 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 19 Mar 2013 09:26:22 +0100
   4 Subject: [PATCH 204/208] owrt: MIPS: ralink: add usb platform support
   5
   6 Add code to load the platform ehci/ohci driver on Ralink SoC. For the usb core
   7 to work we need to populate the platform_data during boot, prior to the usb
   8 driver being loaded.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  arch/mips/ralink/Makefile     |    4 +-
  13  arch/mips/ralink/common.h     |    1 +
  14  arch/mips/ralink/mt7620.c     |    5 ++
  15  arch/mips/ralink/of.c         |    1 +
  16  arch/mips/ralink/rt305x-usb.c |  120 +++++++++++++++++++++++++++++++++++++++++
  17  arch/mips/ralink/rt3883-usb.c |  118 ++++++++++++++++++++++++++++++++++++++++
  18  6 files changed, 247 insertions(+), 2 deletions(-)
  19  create mode 100644 arch/mips/ralink/rt305x-usb.c
  20  create mode 100644 arch/mips/ralink/rt3883-usb.c
  21
  22 --- a/arch/mips/ralink/Makefile
  23 +++ b/arch/mips/ralink/Makefile
  24 @@ -9,8 +9,8 @@
  25  obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o timer.o
  26
  27  obj-$(CONFIG_SOC_RT288X) += rt288x.o
  28 -obj-$(CONFIG_SOC_RT305X) += rt305x.o
  29 -obj-$(CONFIG_SOC_RT3883) += rt3883.o
  30 +obj-$(CONFIG_SOC_RT305X) += rt305x.o rt305x-usb.o
  31 +obj-$(CONFIG_SOC_RT3883) += rt3883.o rt3883-usb.o
  32  obj-$(CONFIG_SOC_MT7620) += mt7620.o
  33
  34  obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
  35 --- a/arch/mips/ralink/common.h
  36 +++ b/arch/mips/ralink/common.h
  37 @@ -51,5 +51,6 @@ extern void prom_soc_init(struct ralink_
  38  __iomem void *plat_of_remap_node(const char *node);
  39
  40  void ralink_pinmux(void);
  41 +void ralink_usb_platform(void);
  42
  43  #endif /* _RALINK_COMMON_H__ */
  44 --- a/arch/mips/ralink/mt7620.c
  45 +++ b/arch/mips/ralink/mt7620.c
  46 @@ -140,6 +140,11 @@ struct ralink_pinmux rt_gpio_pinmux = {
  47         .uart_mask = MT7620_GPIO_MODE_GPIO,
  48  };
  49
  50 +void ralink_usb_platform(void)
  51 +{
  52 +
  53 +}
  54 +
  55  void __init ralink_clk_init(void)
  56  {
  57         unsigned long cpu_rate, sys_rate;
  58 --- a/arch/mips/ralink/of.c
  59 +++ b/arch/mips/ralink/of.c
  60 @@ -111,6 +111,7 @@ static int __init plat_of_setup(void)
  61                 panic("failed to populate DT\n");
  62
  63         ralink_pinmux();
  64 +       ralink_usb_platform();
  65
  66         return 0;
  67  }
  68 --- /dev/null
  69 +++ b/arch/mips/ralink/rt305x-usb.c
  70 @@ -0,0 +1,120 @@
  71 +/*
  72 + * This program is free software; you can redistribute it and/or modify it
  73 + * under the terms of the GNU General Public License version 2 as published
  74 + * by the Free Software Foundation.
  75 + *
  76 + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  77 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  78 + */
  79 +
  80 +#include <linux/kernel.h>
  81 +#include <linux/init.h>
  82 +#include <linux/module.h>
  83 +
  84 +#include <linux/delay.h>
  85 +#include <linux/of_platform.h>
  86 +#include <linux/dma-mapping.h>
  87 +#include <linux/usb/ehci_pdriver.h>
  88 +#include <linux/usb/ohci_pdriver.h>
  89 +
  90 +#include <asm/mach-ralink/ralink_regs.h>
  91 +#include <asm/mach-ralink/rt305x.h>
  92 +
  93 +static atomic_t rt3352_usb_pwr_ref = ATOMIC_INIT(0);
  94 +
  95 +static int rt3352_usb_power_on(struct platform_device *pdev)
  96 +{
  97 +
  98 +       if (atomic_inc_return(&rt3352_usb_pwr_ref) == 1) {
  99 +               u32 t;
 100 +
 101 +               t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
 102 +
 103 +               /* enable clock for port0's and port1's phys */
 104 +               t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
 105 +               t |= RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
 106 +               rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
 107 +               mdelay(500);
 108 +
 109 +               /* pull USBHOST and USBDEV out from reset */
 110 +               t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
 111 +               t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
 112 +               rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
 113 +               mdelay(500);
 114 +
 115 +               /* enable host mode */
 116 +               t = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG1);
 117 +               t |= RT3352_SYSCFG1_USB0_HOST_MODE;
 118 +               rt_sysc_w32(t, RT3352_SYSC_REG_SYSCFG1);
 119 +
 120 +               t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
 121 +       }
 122 +
 123 +       return 0;
 124 +}
 125 +
 126 +static void rt3352_usb_power_off(struct platform_device *pdev)
 127 +{
 128 +       if (atomic_dec_return(&rt3352_usb_pwr_ref) == 0) {
 129 +               u32 t;
 130 +
 131 +               /* put USBHOST and USBDEV into reset */
 132 +               t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
 133 +               t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
 134 +               rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
 135 +               udelay(10000);
 136 +
 137 +               /* disable clock for port0's and port1's phys*/
 138 +               t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
 139 +               t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
 140 +               rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
 141 +               udelay(10000);
 142 +       }
 143 +}
 144 +
 145 +static struct usb_ehci_pdata rt3352_ehci_data = {
 146 +       .power_on       = rt3352_usb_power_on,
 147 +       .power_off      = rt3352_usb_power_off,
 148 +};
 149 +
 150 +static struct usb_ohci_pdata rt3352_ohci_data = {
 151 +       .power_on       = rt3352_usb_power_on,
 152 +       .power_off      = rt3352_usb_power_off,
 153 +};
 154 +
 155 +static void ralink_add_usb(char *name, void *pdata, u64 *mask)
 156 +{
 157 +       struct device_node *node;
 158 +       struct platform_device *pdev;
 159 +
 160 +       node = of_find_compatible_node(NULL, NULL, name);
 161 +       if (!node)
 162 +               return;
 163 +
 164 +       pdev = of_find_device_by_node(node);
 165 +       if (!pdev)
 166 +               goto error_out;
 167 +
 168 +       if (pdata)
 169 +               pdev->dev.platform_data = pdata;
 170 +       if (mask) {
 171 +               pdev->dev.dma_mask = mask;
 172 +               pdev->dev.coherent_dma_mask = *mask;
 173 +       }
 174 +
 175 +error_out:
 176 +       of_node_put(node);
 177 +}
 178 +
 179 +static u64 rt3352_ohci_dmamask = DMA_BIT_MASK(32);
 180 +static u64 rt3352_ehci_dmamask = DMA_BIT_MASK(32);
 181 +
 182 +void ralink_usb_platform(void)
 183 +{
 184 +       if (soc_is_rt3352() || soc_is_rt5350()) {
 185 +               ralink_add_usb("ohci-platform",
 186 +                               &rt3352_ohci_data, &rt3352_ohci_dmamask);
 187 +               ralink_add_usb("ehci-platform",
 188 +                               &rt3352_ehci_data, &rt3352_ehci_dmamask);
 189 +       }
 190 +}
 191 --- /dev/null
 192 +++ b/arch/mips/ralink/rt3883-usb.c
 193 @@ -0,0 +1,118 @@
 194 +/*
 195 + * This program is free software; you can redistribute it and/or modify it
 196 + * under the terms of the GNU General Public License version 2 as published
 197 + * by the Free Software Foundation.
 198 + *
 199 + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 200 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 201 + */
 202 +
 203 +#include <linux/kernel.h>
 204 +#include <linux/init.h>
 205 +#include <linux/module.h>
 206 +
 207 +#include <linux/delay.h>
 208 +#include <linux/of_platform.h>
 209 +#include <linux/dma-mapping.h>
 210 +#include <linux/usb/ehci_pdriver.h>
 211 +#include <linux/usb/ohci_pdriver.h>
 212 +
 213 +#include <asm/mach-ralink/ralink_regs.h>
 214 +#include <asm/mach-ralink/rt3883.h>
 215 +
 216 +static atomic_t rt3883_usb_pwr_ref = ATOMIC_INIT(0);
 217 +
 218 +static int rt3883_usb_power_on(struct platform_device *pdev)
 219 +{
 220 +       if (atomic_inc_return(&rt3883_usb_pwr_ref) == 1) {
 221 +               u32 t;
 222 +
 223 +               t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
 224 +
 225 +               /* enable clock for port0's and port1's phys */
 226 +               t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
 227 +               t |= RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
 228 +               rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
 229 +               mdelay(500);
 230 +
 231 +               /* pull USBHOST and USBDEV out from reset */
 232 +               t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
 233 +               t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
 234 +               rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
 235 +               mdelay(500);
 236 +
 237 +               /* enable host mode */
 238 +               t = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG1);
 239 +               t |= RT3883_SYSCFG1_USB0_HOST_MODE;
 240 +               rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
 241 +
 242 +               t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
 243 +       }
 244 +
 245 +       return 0;
 246 +}
 247 +
 248 +static void rt3883_usb_power_off(struct platform_device *pdev)
 249 +{
 250 +       if (atomic_dec_return(&rt3883_usb_pwr_ref) == 0) {
 251 +               u32 t;
 252 +
 253 +               /* put USBHOST and USBDEV into reset */
 254 +               t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
 255 +               t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
 256 +               rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
 257 +               udelay(10000);
 258 +
 259 +               /* disable clock for port0's and port1's phys*/
 260 +               t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
 261 +               t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN |
 262 +               RT3883_CLKCFG1_UPHY1_CLK_EN);
 263 +               rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
 264 +               udelay(10000);
 265 +       }
 266 +}
 267 +
 268 +static struct usb_ohci_pdata rt3883_ohci_data = {
 269 +       .power_on       = rt3883_usb_power_on,
 270 +       .power_off      = rt3883_usb_power_off,
 271 +};
 272 +
 273 +static struct usb_ehci_pdata rt3883_ehci_data = {
 274 +       .power_on       = rt3883_usb_power_on,
 275 +       .power_off      = rt3883_usb_power_off,
 276 +};
 277 +
 278 +static void ralink_add_usb(char *name, void *pdata, u64 *mask)
 279 +{
 280 +       struct device_node *node;
 281 +       struct platform_device *pdev;
 282 +
 283 +       node = of_find_compatible_node(NULL, NULL, name);
 284 +       if (!node)
 285 +               return;
 286 +
 287 +       pdev = of_find_device_by_node(node);
 288 +       if (!pdev)
 289 +               goto error_out;
 290 +
 291 +       if (pdata)
 292 +               pdev->dev.platform_data = pdata;
 293 +       if (mask) {
 294 +               pdev->dev.dma_mask = mask;
 295 +               pdev->dev.coherent_dma_mask = *mask;
 296 +       }
 297 +
 298 +error_out:
 299 +       of_node_put(node);
 300 +}
 301 +
 302 +static u64 rt3883_ohci_dmamask = DMA_BIT_MASK(32);
 303 +static u64 rt3883_ehci_dmamask = DMA_BIT_MASK(32);
 304 +
 305 +void ralink_usb_platform(void)
 306 +{
 307 +       ralink_add_usb("ohci-platform",
 308 +                       &rt3883_ohci_data, &rt3883_ohci_dmamask);
 309 +       ralink_add_usb("ehci-platform",
 310 +                       &rt3883_ehci_data, &rt3883_ehci_dmamask);
 311 +}
 312 --- a/arch/mips/ralink/rt288x.c
 313 +++ b/arch/mips/ralink/rt288x.c
 314 @@ -74,6 +74,11 @@ struct ralink_pinmux rt_gpio_pinmux = {
 315         .wdt_reset = rt288x_wdt_reset,
 316  };
 317
 318 +void ralink_usb_platform(void)
 319 +{
 320 +
 321 +}
 322 +
 323  void __init ralink_clk_init(void)
 324  {
 325         unsigned long cpu_rate;