target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch

   1 From 5157985fbc0f071276b0c3381ac8ed191878358a Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 21 Mar 2013 19:01:49 +0100
   4 Subject: [PATCH 103/121] MIPS: ralink: add RT3352 usb register defines
   5
   6 Add a few missing defines that are needed to make USB work on the RT3352
   7 and RT5350.
   8
   9 Signed-off-by: John Crispin <blogic@openwrt.org>
  10 ---
  11  arch/mips/include/asm/mach-ralink/rt305x.h |   11 +++++++++++
  12  1 file changed, 11 insertions(+)
  13
  14 Index: linux-3.8.3/arch/mips/include/asm/mach-ralink/rt305x.h
  15 ===================================================================
  16 --- linux-3.8.3.orig/arch/mips/include/asm/mach-ralink/rt305x.h 2013-04-02 13:30:35.601424833 +0200
  17 +++ linux-3.8.3/arch/mips/include/asm/mach-ralink/rt305x.h      2013-04-02 13:39:37.721437754 +0200
  18 @@ -144,4 +144,18 @@
  19  #define RT305X_GPIO_MODE_SDRAM         BIT(8)
  20  #define RT305X_GPIO_MODE_RGMII         BIT(9)
  21
  22 +#define RT3352_SYSC_REG_SYSCFG1         0x014
  23 +#define RT3352_SYSC_REG_CLKCFG1         0x030
  24 +#define RT3352_SYSC_REG_RSTCTRL         0x034
  25 +#define RT3352_SYSC_REG_USB_PS          0x05c
  26 +
  27 +#define RT3352_CLKCFG1_UPHY0_CLK_EN    BIT(18)
  28 +#define RT3352_CLKCFG1_UPHY1_CLK_EN    BIT(20)
  29 +#define RT3352_RSTCTRL_UHST            BIT(22)
  30 +#define RT3352_RSTCTRL_UDEV            BIT(25)
  31 +#define RT3352_SYSCFG1_USB0_HOST_MODE  BIT(10)
  32 +
  33 +#define RT3352_SYSC_REG_SYSCFG0                0x010
  34 +#define        RT3352_CLKCFG0_XTAL_SEL         BIT(20)
  35 +
  36  #endif