preinit: move cmdline failsafe= handling ot the generic code
[openwrt.git] / target / linux / ramips / patches-3.8 / 0103-MIPS-ralink-add-RT3352-usb-register-defines.patch
1 From 5157985fbc0f071276b0c3381ac8ed191878358a Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 21 Mar 2013 19:01:49 +0100
4 Subject: [PATCH 103/121] MIPS: ralink: add RT3352 usb register defines
5
6 Add a few missing defines that are needed to make USB work on the RT3352
7 and RT5350.
8
9 Signed-off-by: John Crispin <blogic@openwrt.org>
10 ---
11  arch/mips/include/asm/mach-ralink/rt305x.h |   11 +++++++++++
12  1 file changed, 11 insertions(+)
13
14 --- a/arch/mips/include/asm/mach-ralink/rt305x.h
15 +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
16 @@ -144,4 +144,18 @@ static inline int soc_is_rt5350(void)
17  #define RT305X_GPIO_MODE_SDRAM         BIT(8)
18  #define RT305X_GPIO_MODE_RGMII         BIT(9)
19  
20 +#define RT3352_SYSC_REG_SYSCFG1         0x014
21 +#define RT3352_SYSC_REG_CLKCFG1         0x030
22 +#define RT3352_SYSC_REG_RSTCTRL         0x034
23 +#define RT3352_SYSC_REG_USB_PS          0x05c
24 +
25 +#define RT3352_CLKCFG1_UPHY0_CLK_EN    BIT(18)
26 +#define RT3352_CLKCFG1_UPHY1_CLK_EN    BIT(20)
27 +#define RT3352_RSTCTRL_UHST            BIT(22)
28 +#define RT3352_RSTCTRL_UDEV            BIT(25)
29 +#define RT3352_SYSCFG1_USB0_HOST_MODE  BIT(10)
30 +
31 +#define RT3352_SYSC_REG_SYSCFG0                0x010
32 +#define        RT3352_CLKCFG0_XTAL_SEL         BIT(20)
33 +
34  #endif