target/linux/ramips/patches-3.18/0065-mt7628-pww.patch

   1 --- a/drivers/pwm/Kconfig
   2 +++ b/drivers/pwm/Kconfig
   3 @@ -177,6 +177,15 @@ config PWM_LPSS_PLATFORM
   4           To compile this driver as a module, choose M here: the module
   5           will be called pwm-lpss-platform.
   6
   7 +config PWM_MEDIATEK
   8 +       tristate "Mediatek PWM support"
   9 +       depends on RALINK && OF
  10 +       help
  11 +         Generic PWM framework driver for Mediatek ARM SoC.
  12 +
  13 +         To compile this driver as a module, choose M here: the module
  14 +         will be called pwm-mxs.
  15 +
  16  config PWM_MXS
  17         tristate "Freescale MXS PWM support"
  18         depends on ARCH_MXS && OF
  19 --- a/drivers/pwm/Makefile
  20 +++ b/drivers/pwm/Makefile
  21 @@ -15,6 +15,7 @@ obj-$(CONFIG_PWM_LPC32XX)     += pwm-lpc32xx
  22  obj-$(CONFIG_PWM_LPSS)         += pwm-lpss.o
  23  obj-$(CONFIG_PWM_LPSS_PCI)     += pwm-lpss-pci.o
  24  obj-$(CONFIG_PWM_LPSS_PLATFORM)        += pwm-lpss-platform.o
  25 +obj-$(CONFIG_PWM_MEDIATEK)     += pwm-mediatek.o
  26  obj-$(CONFIG_PWM_MXS)          += pwm-mxs.o
  27  obj-$(CONFIG_PWM_PCA9685)      += pwm-pca9685.o
  28  obj-$(CONFIG_PWM_PUV3)         += pwm-puv3.o
  29 --- /dev/null
  30 +++ b/drivers/pwm/pwm-mediatek.c
  31 @@ -0,0 +1,173 @@
  32 +/*
  33 + * Mediatek Pulse Width Modulator driver
  34 + *
  35 + * Copyright (C) 2015 John Crispin <blogic@openwrt.org>
  36 + *
  37 + * This file is licensed under the terms of the GNU General Public
  38 + * License version 2. This program is licensed "as is" without any
  39 + * warranty of any kind, whether express or implied.
  40 + */
  41 +
  42 +#include <linux/err.h>
  43 +#include <linux/io.h>
  44 +#include <linux/ioport.h>
  45 +#include <linux/kernel.h>
  46 +#include <linux/module.h>
  47 +#include <linux/of.h>
  48 +#include <linux/platform_device.h>
  49 +#include <linux/pwm.h>
  50 +#include <linux/slab.h>
  51 +#include <linux/types.h>
  52 +
  53 +#define NUM_PWM                4
  54 +
  55 +/* PWM registers and bits definitions */
  56 +#define PWMCON                 0x00
  57 +#define PWMHDUR                        0x04
  58 +#define PWMLDUR                        0x08
  59 +#define PWMGDUR                        0x0c
  60 +#define PWMWAVENUM             0x28
  61 +#define PWMDWIDTH              0x2c
  62 +#define PWMTHRES               0x30
  63 +
  64 +/**
  65 + * struct mtk_pwm_chip - struct representing pwm chip
  66 + *
  67 + * @mmio_base: base address of pwm chip
  68 + * @chip: linux pwm chip representation
  69 + */
  70 +struct mtk_pwm_chip {
  71 +       void __iomem *mmio_base;
  72 +       struct pwm_chip chip;
  73 +};
  74 +
  75 +static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  76 +{
  77 +       return container_of(chip, struct mtk_pwm_chip, chip);
  78 +}
  79 +
  80 +static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
  81 +                                 unsigned long offset)
  82 +{
  83 +       return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset);
  84 +}
  85 +
  86 +static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
  87 +                                   unsigned int num, unsigned long offset,
  88 +                                   unsigned long val)
  89 +{
  90 +       iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset);
  91 +}
  92 +
  93 +static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  94 +                           int duty_ns, int period_ns)
  95 +{
  96 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
  97 +       u32 resolution = 100 / 4;
  98 +       u32 clkdiv = 0;
  99 +
 100 +       while (period_ns / resolution  > 8191) {
 101 +               clkdiv++;
 102 +               resolution *= 2;
 103 +       }
 104 +
 105 +       if (clkdiv > 7)
 106 +               return -1;
 107 +
 108 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv);
 109 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
 110 +       mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution);
 111 +       return 0;
 112 +}
 113 +
 114 +static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 115 +{
 116 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
 117 +       u32 val;
 118 +
 119 +       val = ioread32(pc->mmio_base);
 120 +       val |= BIT(pwm->hwpwm);
 121 +       iowrite32(val, pc->mmio_base);
 122 +
 123 +       return 0;
 124 +}
 125 +
 126 +static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 127 +{
 128 +       struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
 129 +       u32 val;
 130 +
 131 +       val = ioread32(pc->mmio_base);
 132 +       val &= ~BIT(pwm->hwpwm);
 133 +       iowrite32(val, pc->mmio_base);
 134 +}
 135 +
 136 +static const struct pwm_ops mtk_pwm_ops = {
 137 +       .config = mtk_pwm_config,
 138 +       .enable = mtk_pwm_enable,
 139 +       .disable = mtk_pwm_disable,
 140 +       .owner = THIS_MODULE,
 141 +};
 142 +
 143 +static int mtk_pwm_probe(struct platform_device *pdev)
 144 +{
 145 +       struct mtk_pwm_chip *pc;
 146 +       struct resource *r;
 147 +       int ret;
 148 +
 149 +       pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
 150 +       if (!pc)
 151 +               return -ENOMEM;
 152 +
 153 +       r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 154 +       pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
 155 +       if (IS_ERR(pc->mmio_base))
 156 +               return PTR_ERR(pc->mmio_base);
 157 +
 158 +       platform_set_drvdata(pdev, pc);
 159 +
 160 +       pc->chip.dev = &pdev->dev;
 161 +       pc->chip.ops = &mtk_pwm_ops;
 162 +       pc->chip.base = -1;
 163 +       pc->chip.npwm = NUM_PWM;
 164 +
 165 +       ret = pwmchip_add(&pc->chip);
 166 +       if (ret < 0)
 167 +               dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
 168 +
 169 +       return ret;
 170 +}
 171 +
 172 +static int mtk_pwm_remove(struct platform_device *pdev)
 173 +{
 174 +       struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);
 175 +       int i;
 176 +
 177 +       for (i = 0; i < NUM_PWM; i++)
 178 +               pwm_disable(&pc->chip.pwms[i]);
 179 +
 180 +       return pwmchip_remove(&pc->chip);
 181 +}
 182 +
 183 +static const struct of_device_id mtk_pwm_of_match[] = {
 184 +       { .compatible = "mediatek,mt7628-pwm" },
 185 +       { }
 186 +};
 187 +
 188 +MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
 189 +
 190 +static struct platform_driver mtk_pwm_driver = {
 191 +       .driver = {
 192 +               .name = "mtk-pwm",
 193 +               .owner = THIS_MODULE,
 194 +               .of_match_table = mtk_pwm_of_match,
 195 +       },
 196 +       .probe = mtk_pwm_probe,
 197 +       .remove = mtk_pwm_remove,
 198 +};
 199 +
 200 +module_platform_driver(mtk_pwm_driver);
 201 +
 202 +MODULE_LICENSE("GPL");
 203 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 204 +MODULE_ALIAS("platform:mtk-pwm");