target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h

   1
   2 #ifdef CONFIG_PCI
   3
   4 #define RT2880_PCI_SLOT1_BASE                   0x20000000
   5 #define RALINK_PCI_BASE                                 0xA0440000
   6 #define RT2880_PCI_PCICFG_ADDR                  ((unsigned long*)(RALINK_PCI_BASE + 0x0000))
   7 #define RT2880_PCI_ARBCTL                               ((unsigned long*)(RALINK_PCI_BASE + 0x0080))
   8 #define RT2880_PCI_BAR0SETUP_ADDR               ((unsigned long*)(RALINK_PCI_BASE + 0x0010))
   9 #define RT2880_PCI_CONFIG_ADDR                  ((unsigned long*)(RALINK_PCI_BASE + 0x0020))
  10 #define RT2880_PCI_CONFIG_DATA                  ((unsigned long*)(RALINK_PCI_BASE + 0x0024))
  11 #define RT2880_PCI_MEMBASE                              ((unsigned long*)(RALINK_PCI_BASE + 0x0028))
  12 #define RT2880_PCI_IOBASE                               ((unsigned long*)(RALINK_PCI_BASE + 0x002C))
  13 #define RT2880_PCI_IMBASEBAR0_ADDR              ((unsigned long*)(RALINK_PCI_BASE + 0x0018))
  14 #define RT2880_PCI_ID                                   ((unsigned long*)(RALINK_PCI_BASE + 0x0030))
  15 #define RT2880_PCI_CLASS                                ((unsigned long*)(RALINK_PCI_BASE + 0x0034))
  16 #define RT2880_PCI_SUBID                                ((unsigned long*)(RALINK_PCI_BASE + 0x0038))
  17 #define RT2880_PCI_PCIMSK_ADDR                  ((unsigned long*)(RALINK_PCI_BASE + 0x000C))
  18
  19 #endif