0a4cf1e4858f9ae28e8743d727abb729b6739912
[openwrt.git] / target / linux / ramips / dts / rt3050.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips24KEc";
9                 };
10         };
11
12         chosen {
13                 bootargs = "console=ttyS0,57600";
14         };
15
16         aliases {
17                 spi0 = &spi0;
18                 serial0 = &uartlite;
19         };
20
21         cpuintc: cpuintc@0 {
22                 #address-cells = <0>;
23                 #interrupt-cells = <1>;
24                 interrupt-controller;
25                 compatible = "mti,cpu-interrupt-controller";
26         };
27
28         palmbus@10000000 {
29                 compatible = "palmbus";
30                 reg = <0x10000000 0x200000>;
31                 ranges = <0x0 0x10000000 0x1FFFFF>;
32
33                 #address-cells = <1>;
34                 #size-cells = <1>;
35
36                 sysc@0 {
37                         compatible = "ralink,rt3050-sysc";
38                         reg = <0x0 0x100>;
39                 };
40
41                 timer@100 {
42                         compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
43                         reg = <0x100 0x20>;
44
45                         interrupt-parent = <&intc>;
46                         interrupts = <1>;
47                 };
48
49                 watchdog@120 {
50                         compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
51                         reg = <0x120 0x10>;
52
53                         resets = <&rstctrl 8>;
54                         reset-names = "wdt";
55
56                         interrupt-parent = <&intc>;
57                         interrupts = <1>;
58                 };
59
60                 intc: intc@200 {
61                         compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
62                         reg = <0x200 0x100>;
63
64                         resets = <&rstctrl 19>;
65                         reset-names = "intc";
66
67                         interrupt-controller;
68                         #interrupt-cells = <1>;
69
70                         interrupt-parent = <&cpuintc>;
71                         interrupts = <2>;
72                 };
73
74                 memc@300 {
75                         compatible = "ralink,rt3050-memc";
76                         reg = <0x300 0x100>;
77
78                         resets = <&rstctrl 20>;
79                         reset-names = "mc";
80
81                         interrupt-parent = <&intc>;
82                         interrupts = <3>;
83                 };
84
85                 uart@500 {
86                         compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
87                         reg = <0x500 0x100>;
88
89                         resets = <&rstctrl 12>;
90                         reset-names = "uart";
91
92                         interrupt-parent = <&intc>;
93                         interrupts = <5>;
94
95                         reg-shift = <2>;
96
97                         status = "disabled";
98                 };
99
100                 gpio0: gpio@600 {
101                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
102                         reg = <0x600 0x34>;
103
104                         gpio-controller;
105                         #gpio-cells = <2>;
106
107                         ralink,gpio-base = <0>;
108                         ralink,num-gpios = <24>;
109                         ralink,register-map = [ 00 04 08 0c
110                                                 20 24 28 2c
111                                                 30 34 ];
112
113                         resets = <&rstctrl 13>;
114                         reset-names = "pio";
115
116                         interrupt-parent = <&intc>;
117                         interrupts = <6>;
118                 };
119
120                 gpio1: gpio@638 {
121                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
122                         reg = <0x638 0x24>;
123
124                         gpio-controller;
125                         #gpio-cells = <2>;
126
127                         ralink,gpio-base = <24>;
128                         ralink,num-gpios = <16>;
129                         ralink,register-map = [ 00 04 08 0c
130                                                 10 14 18 1c
131                                                 20 24 ];
132
133                         status = "disabled";
134                 };
135
136                 gpio2: gpio@660 {
137                         compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
138                         reg = <0x660 0x24>;
139
140                         gpio-controller;
141                         #gpio-cells = <2>;
142
143                         ralink,gpio-base = <40>;
144                         ralink,num-gpios = <12>;
145                         ralink,register-map = [ 00 04 08 0c
146                                                 10 14 18 1c
147                                                 20 24 ];
148
149                         status = "disabled";
150                 };
151
152                 spi0: spi@b00 {
153                         compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
154                         reg = <0xb00 0x100>;
155
156                         resets = <&rstctrl 18>;
157                         reset-names = "spi";
158
159                         #address-cells = <1>;
160                         #size-cells = <0>;
161
162                         pinctrl-names = "default";
163                         pinctrl-0 = <&spi_pins>;
164
165                         status = "disabled";
166                 };
167
168                 uartlite: uartlite@c00 {
169                         compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
170                         reg = <0xc00 0x100>;
171
172                         resets = <&rstctrl 19>;
173                         reset-names = "uartl";
174
175                         interrupt-parent = <&intc>;
176                         interrupts = <12>;
177
178                         reg-shift = <2>;
179
180                         pinctrl-names = "default";
181                         pinctrl-0 = <&uartlite_pins>;
182                 };
183         };
184
185         pinctrl {
186                 compatible = "ralink,rt2880-pinmux";
187
188                 pinctrl-names = "default";
189                 pinctrl-0 = <&state_default>;
190
191                 state_default: pinctrl0 {
192                         sdram {
193                                 ralink,group = "sdram";
194                                 ralink,function = "sdram";
195                         };
196                 };
197
198                 spi_pins: spi {
199                         spi {
200                                 ralink,group = "spi";
201                                 ralink,function = "spi";
202                         };
203                 };
204
205                 uartlite_pins: uartlite {
206                         uart {
207                                 ralink,group = "uartlite";
208                                 ralink,function = "uartlite";
209                         };
210                 };
211         };
212
213         rstctrl: rstctrl {
214                 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
215                 #reset-cells = <1>;
216         };
217
218         ethernet@10100000 {
219                 compatible = "ralink,rt3050-eth";
220                 reg = <0x10100000 10000>;
221
222                 resets = <&rstctrl 21>;
223                 reset-names = "fe";
224
225                 interrupt-parent = <&cpuintc>;
226                 interrupts = <5>;
227
228                 mediatek,switch = <&esw>;
229         };
230
231         esw: esw@10110000 {
232                 compatible = "ralink,rt3050-esw";
233                 reg = <0x10110000 8000>;
234
235                 resets = <&rstctrl 23>;
236                 reset-names = "esw";
237
238                 interrupt-parent = <&intc>;
239                 interrupts = <17>;
240         };
241
242         wmac@10180000 {
243                 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
244                 reg = <0x10180000 40000>;
245
246                 interrupt-parent = <&cpuintc>;
247                 interrupts = <6>;
248
249                 ralink,eeprom = "soc_wmac.eeprom";
250         };
251
252         otg@101c0000 {
253                 compatible = "ralink,rt3050-otg", "snps,dwc2";
254                 reg = <0x101c0000 40000>;
255
256                 interrupt-parent = <&intc>;
257                 interrupts = <18>;
258
259                 resets = <&rstctrl 22>;
260                 reset-names = "otg";
261
262                 status = "disabled";
263         };
264 };