ralink: add FireWRT power button
[openwrt.git] / target / linux / ramips / dts / mt7628an.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "ralink,mtk7628an-soc";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips24KEc";
9                 };
10         };
11
12         chosen {
13                 bootargs = "console=ttyS0,57600";
14         };
15
16         cpuintc: cpuintc@0 {
17                 #address-cells = <0>;
18                 #interrupt-cells = <1>;
19                 interrupt-controller;
20                 compatible = "mti,cpu-interrupt-controller";
21         };
22
23         palmbus@10000000 {
24                 compatible = "palmbus";
25                 reg = <0x10000000 0x200000>;
26                 ranges = <0x0 0x10000000 0x1FFFFF>;
27
28                 #address-cells = <1>;
29                 #size-cells = <1>;
30
31                 sysc@0 {
32                         compatible = "ralink,mt7620a-sysc";
33                         reg = <0x0 0x100>;
34                 };
35
36                 watchdog@120 {
37                         compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
38                         reg = <0x120 0x10>;
39
40                         resets = <&rstctrl 8>;
41                         reset-names = "wdt";
42
43                         interrupt-parent = <&intc>;
44                         interrupts = <24>;
45                 };
46
47                 intc: intc@200 {
48                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
49                         reg = <0x200 0x100>;
50
51                         resets = <&rstctrl 9>;
52                         reset-names = "intc";
53
54                         interrupt-controller;
55                         #interrupt-cells = <1>;
56
57                         interrupt-parent = <&cpuintc>;
58                         interrupts = <2>;
59
60                         ralink,intc-registers = <0x9c 0xa0
61                                                  0x6c 0xa4
62                                                  0x80 0x78>;
63                 };
64
65                 memc@300 {
66                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
67                         reg = <0x300 0x100>;
68
69                         resets = <&rstctrl 20>;
70                         reset-names = "mc";
71
72                         interrupt-parent = <&intc>;
73                         interrupts = <3>;
74                 };
75
76                 gpio@600 {
77                         #address-cells = <1>;
78                         #size-cells = <0>;
79
80                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
81                         reg = <0x600 0x100>;
82
83                         gpio0: bank@0 {
84                                 reg = <0>;
85                                 compatible = "mtk,mt7621-gpio-bank";
86                                 gpio-controller;
87                                 #gpio-cells = <2>;
88                         };
89
90                         gpio1: bank@1 {
91                                 reg = <1>;
92                                 compatible = "mtk,mt7621-gpio-bank";
93                                 gpio-controller;
94                                 #gpio-cells = <2>;
95                         };
96
97                         gpio2: bank@2 {
98                                 reg = <2>;
99                                 compatible = "mtk,mt7621-gpio-bank";
100                                 gpio-controller;
101                                 #gpio-cells = <2>;
102                         };
103                 };
104
105                 spi@b00 {
106                         compatible = "ralink,mt7621-spi";
107                         reg = <0xb00 0x100>;
108
109                         resets = <&rstctrl 18>;
110                         reset-names = "spi";
111
112                         #address-cells = <1>;
113                         #size-cells = <1>;
114
115                         pinctrl-names = "default";
116                         pinctrl-0 = <&spi_pins>;
117
118                         status = "disabled";
119                 };
120
121                 uartlite@c00 {
122                         compatible = "ns16550a";
123                         reg = <0xc00 0x100>;
124
125                         reg-shift = <2>;
126                         reg-io-width = <4>;
127                         no-loopback-test;
128
129                         resets = <&rstctrl 12>;
130                         reset-names = "uartl";
131
132                         interrupt-parent = <&intc>;
133                         interrupts = <20>;
134
135                         pinctrl-names = "default";
136                         pinctrl-0 = <&uart0_pins>;
137                 };
138         };
139
140         pinctrl {
141                 compatible = "ralink,rt2880-pinmux";
142                 pinctrl-names = "default";
143                 pinctrl-0 = <&state_default>;
144                 state_default: pinctrl0 {
145                 };
146                 spi_pins: spi {
147                         spi {
148                                 ralink,group = "spi";
149                                 ralink,function = "spi";
150                         };
151                 };
152                 uart0_pins: uartlite {
153                         uart {
154                                 ralink,group = "uart0";
155                                 ralink,function = "uart";
156                         };
157                 };
158         };
159
160         rstctrl: rstctrl {
161                 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
162                 #reset-cells = <1>;
163         };
164
165         usbphy: usbphy {
166                 compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
167                 #phy-cells = <1>;
168
169                 resets = <&rstctrl 22>;
170                 reset-names = "host";
171         };
172
173         sdhci@10130000 {
174                 compatible = "ralink,mt7620-sdhci";
175                 reg = <0x10130000 4000>;
176
177                 interrupt-parent = <&intc>;
178                 interrupts = <14>;
179
180                 status = "disabled";
181         };
182
183         ehci@101c0000 {
184                 compatible = "ralink,rt3xxx-ehci";
185                 reg = <0x101c0000 0x1000>;
186
187                 phys = <&usbphy 1>;
188                 phy-names = "usb";
189
190                 interrupt-parent = <&intc>;
191                 interrupts = <18>;
192         };
193
194         ohci@101c1000 {
195                 compatible = "ralink,rt3xxx-ohci";
196                 reg = <0x101c1000 0x1000>;
197
198                 phys = <&usbphy 1>;
199                 phy-names = "usb";
200
201                 interrupt-parent = <&intc>;
202                 interrupts = <18>;
203         };
204
205         ethernet@10100000 {
206                 compatible = "ralink,rt5350-eth";
207                 reg = <0x10100000 10000>;
208
209                 interrupt-parent = <&cpuintc>;
210                 interrupts = <5>;
211
212                 resets = <&rstctrl 21 &rstctrl 23>;
213                 reset-names = "fe", "esw";
214         };
215
216         esw@10110000 {
217                 compatible = "ralink,rt3050-esw";
218                 reg = <0x10110000 8000>;
219
220                 resets = <&rstctrl 23>;
221                 reset-names = "esw";
222
223                 interrupt-parent = <&intc>;
224                 interrupts = <17>;
225         };
226
227         pcie@10140000 {
228                 compatible = "mediatek,mt7620-pci";
229                 reg = <0x10140000 0x100
230                         0x10142000 0x100>;
231
232                 #address-cells = <3>;
233                 #size-cells = <2>;
234
235                 resets = <&rstctrl 26>;
236                 reset-names = "pcie0";
237
238                 interrupt-parent = <&cpuintc>;
239                 interrupts = <4>;
240
241                 status = "disabled";
242
243                 device_type = "pci";
244
245                 bus-range = <0 255>;
246                 ranges = <
247                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
248                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
249                 >;
250
251                 pcie-bridge {
252                         reg = <0x0000 0 0 0 0>;
253
254                         #address-cells = <3>;
255                         #size-cells = <2>;
256
257                         device_type = "pci";
258                 };
259         };
260
261 };