ralink: few updates tot he sdhci probe code
[openwrt.git] / target / linux / ramips / dts / mt7621.dtsi
1 / {
2         #address-cells = <1>;
3         #size-cells = <1>;
4         compatible = "mediatek,mtk7621-soc";
5
6         cpus {
7                 cpu@0 {
8                         compatible = "mips,mips24KEc";
9                 };
10         };
11
12         cpuintc: cpuintc@0 {
13                 #address-cells = <0>;
14                 #interrupt-cells = <1>;
15                 interrupt-controller;
16                 compatible = "mti,cpu-interrupt-controller";
17         };
18
19         palmbus@1E000000 {
20                 compatible = "palmbus";
21                 reg = <0x1E000000 0x100000>;
22                 ranges = <0x0 0x1E000000 0x0FFFFF>;
23
24                 #address-cells = <1>;
25                 #size-cells = <1>;
26
27                 sysc@0 {
28                         compatible = "mtk,mt7621-sysc";
29                         reg = <0x0 0x100>;
30                 };
31
32                 wdt@100 {
33                         compatible = "mtk,mt7621-wdt";
34                         reg = <0x100 0x100>;
35                 };
36
37                 gpio@600 {
38                         #address-cells = <1>;
39                         #size-cells = <0>;
40
41                         compatible = "mtk,mt7621-gpio";
42                         reg = <0x600 0x100>;
43
44                         gpio0: bank@0 {
45                                 reg = <0>;
46                                 compatible = "mtk,mt7621-gpio-bank";
47                                 gpio-controller;
48                                 #gpio-cells = <2>;
49                         };
50
51                         gpio1: bank@1 {
52                                 reg = <1>;
53                                 compatible = "mtk,mt7621-gpio-bank";
54                                 gpio-controller;
55                                 #gpio-cells = <2>;
56                         };
57
58                         gpio2: bank@2 {
59                                 reg = <2>;
60                                 compatible = "mtk,mt7621-gpio-bank";
61                                 gpio-controller;
62                                 #gpio-cells = <2>;
63                         };
64                 };
65
66                 memc@5000 {
67                         compatible = "mtk,mt7621-memc";
68                         reg = <0x300 0x100>;
69                 };
70
71                 uartlite@c00 {
72                         compatible = "ns16550a";
73                         reg = <0xc00 0x100>;
74
75                         interrupt-parent = <&gic>;
76                         interrupts = <26>;
77
78                         reg-shift = <2>;
79                         reg-io-width = <4>;
80                         no-loopback-test;
81                 };
82
83                 spi@b00 {
84                         status = "okay";
85
86                         compatible = "ralink,mt7621-spi";
87                         reg = <0xb00 0x100>;
88
89                         resets = <&rstctrl 18>;
90                         reset-names = "spi";
91
92                         #address-cells = <1>;
93                         #size-cells = <1>;
94
95                         pinctrl-names = "default";
96                         pinctrl-0 = <&spi_pins>;
97
98                         m25p80@0 {
99                                 #address-cells = <1>;
100                                 #size-cells = <1>;
101                                 compatible = "en25q64";
102                                 reg = <0 0>;
103                                 linux,modalias = "m25p80", "en25q64";
104                                 spi-max-frequency = <10000000>;
105
106                                 m25p,chunked-io;
107
108                                 partition@0 {
109                                         label = "u-boot";
110                                         reg = <0x0 0x30000>;
111                                         read-only;
112                                 };
113
114                                 partition@30000 {
115                                         label = "u-boot-env";
116                                         reg = <0x30000 0x10000>;
117                                         read-only;
118                                 };
119
120                                 factory: partition@40000 {
121                                         label = "factory";
122                                         reg = <0x40000 0x10000>;
123                                         read-only;
124                                 };
125
126                                 partition@50000 {
127                                         label = "firmware";
128                                         reg = <0x50000 0x7a0000>;
129                                 };
130
131                                 partition@7f0000 {
132                                         label = "test";
133                                         reg = <0x7f0000 0x10000>;
134                                 };
135                         };
136                 };
137         };
138
139         pinctrl {
140                 compatible = "ralink,rt2880-pinmux";
141                 pinctrl-names = "default";
142                 pinctrl-0 = <&state_default>;
143                 state_default: pinctrl0 {
144                 };
145                 spi_pins: spi {
146                         spi {
147                                 ralink,group = "spi";
148                                 ralink,function = "spi";
149                         };
150                 };
151                 i2c_pins: i2c {
152                         i2c {
153                                 lantiq,group = "i2c";
154                                 lantiq,function = "i2c";
155                         };
156                 };
157                 uart1_pins: uart1 {
158                         uart1 {
159                                 ralink,group = "uart1";
160                                 ralink,function = "uart";
161                         };
162                 };
163                 uart2_pins: uart2 {
164                         uart2 {
165                                 ralink,group = "uart2";
166                                 ralink,function = "uart";
167                         };
168                 };
169                 uart3_pins: uart3 {
170                         uart3 {
171                                 ralink,group = "uart3";
172                                 ralink,function = "uart";
173                         };
174                 };
175                 rgmii1_pins: rgmii1 {
176                         rgmii1 {
177                                 ralink,group = "rgmii1";
178                                 ralink,function = "rgmii";
179                         };
180                 };
181                 rgmii2_pins: rgmii2 {
182                         rgmii2 {
183                                 ralink,group = "rgmii2";
184                                 ralink,function = "rgmii";
185                         };
186                 };
187                 mdio_pins: mdio {
188                         mdio {
189                                 ralink,group = "mdio";
190                                 ralink,function = "mdio";
191                         };
192                 };
193                 pcie_pins: pcie {
194                         pcie {
195                                 ralink,group = "pcie";
196                                 ralink,function = "pcie rst";
197                         };
198                 };
199                 nand_pins: nand {
200                         spi-nand {
201                                 ralink,group = "spi";
202                                 ralink,function = "nand";
203                         };
204                         sdhci-nand {
205                                 ralink,group = "sdhci";
206                                 ralink,function = "nand";
207                         };
208                 };
209                 sdhci_pins: sdhci {
210                         sdhci {
211                                 ralink,group = "sdhci";
212                                 ralink,function = "sdhci";
213                         };
214                 };
215         };
216
217         rstctrl: rstctrl {
218                 compatible = "ralink,rt2880-reset";
219                 #reset-cells = <1>;
220         };
221
222         sdhci@1E130000 {
223                 compatible = "ralink,mt7620-sdhci";
224                 reg = <0x1E130000 4000>;
225
226                 interrupt-parent = <&gic>;
227                 interrupts = <20>;
228         };
229
230         xhci@1E1C0000 {
231                 compatible = "xhci-platform";
232                 reg = <0x1E1C0000 4000>;
233
234                 interrupt-parent = <&gic>;
235                 interrupts = <22>;
236         };
237
238         gic: gic@1fbc0000 {
239                 #address-cells = <0>;
240                 #interrupt-cells = <1>;
241                 interrupt-controller;
242                 compatible = "ralink,mt7621-gic";
243                 reg = < 0x1fbc0000 0x80 /* gic */
244                         0x1fbf0000 0x8000 /* cpc */
245                         0x1fbf8000 0x8000 /* gpmc */
246                 >;
247         };
248
249         nand@1e003000 {
250                 compatible = "mtk,mt7621-nand";
251                 bank-width = <2>;
252                 reg = <0x1e003000 0x800
253                         0x1e003800 0x800>;
254                 #address-cells = <1>;
255                 #size-cells = <1>;
256
257                 partition@0 {
258                         label = "uboot";
259                         reg = <0x00000 0x80000>; /* 64 KB */
260                 };
261                 partition@80000 {
262                         label = "uboot_env";
263                         reg = <0x80000 0x80000>; /* 64 KB */
264                 };
265                 partition@100000 {
266                         label = "factory";
267                         reg = <0x100000 0x40000>;
268                 };
269                 partition@140000 {
270                         label = "rootfs";
271                         reg = <0x140000 0xec0000>;
272                 };
273         };
274
275         ethernet@1e100000 {
276                 compatible = "ralink,mt7621-eth";
277                 reg = <0x1e100000 10000>;
278
279                 #address-cells = <1>;
280                 #size-cells = <0>;
281
282                 interrupt-parent = <&gic>;
283                 interrupts = <3>;
284
285                 mdio-bus {
286                         #address-cells = <1>;
287                         #size-cells = <0>;
288
289                         phy1f: ethernet-phy@1f {
290                                 reg = <0x1f>;
291                                 phy-mode = "rgmii";
292                         };
293                 };
294         };
295
296         gsw@1e110000 {
297                 compatible = "ralink,mt7620a-gsw";
298                 reg = <0x1e110000 8000>;
299                 interrupt-parent = <&gic>;
300                 interrupts = <23>; 
301         };
302 };