target/linux/openmoko/patches-2.6.24/100-moko.patch

   1 Index: linux-2.6.24.7/arch/arm/configs/glofiish_defconfig
   2 ===================================================================
   3 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
   4 +++ linux-2.6.24.7/arch/arm/configs/glofiish_defconfig  2008-12-11 22:46:48.000000000 +0100
   5 @@ -0,0 +1,1728 @@
   6 +#
   7 +# Automatically generated make config: don't edit
   8 +# Linux kernel version: 2.6.24
   9 +# Wed Nov 12 00:27:24 2008
  10 +#
  11 +CONFIG_ARM=y
  12 +CONFIG_SYS_SUPPORTS_APM_EMULATION=y
  13 +CONFIG_GENERIC_GPIO=y
  14 +# CONFIG_GENERIC_TIME is not set
  15 +# CONFIG_GENERIC_CLOCKEVENTS is not set
  16 +CONFIG_MMU=y
  17 +CONFIG_NO_IOPORT=y
  18 +CONFIG_GENERIC_HARDIRQS=y
  19 +CONFIG_STACKTRACE_SUPPORT=y
  20 +CONFIG_LOCKDEP_SUPPORT=y
  21 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  22 +CONFIG_HARDIRQS_SW_RESEND=y
  23 +CONFIG_GENERIC_IRQ_PROBE=y
  24 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
  25 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
  26 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
  27 +CONFIG_GENERIC_HWEIGHT=y
  28 +CONFIG_GENERIC_CALIBRATE_DELAY=y
  29 +CONFIG_ZONE_DMA=y
  30 +CONFIG_VECTORS_BASE=0xffff0000
  31 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
  32 +
  33 +#
  34 +# General setup
  35 +#
  36 +CONFIG_EXPERIMENTAL=y
  37 +CONFIG_BROKEN_ON_SMP=y
  38 +CONFIG_LOCK_KERNEL=y
  39 +CONFIG_INIT_ENV_ARG_LIMIT=32
  40 +CONFIG_LOCALVERSION=""
  41 +# CONFIG_LOCALVERSION_AUTO is not set
  42 +CONFIG_SWAP=y
  43 +CONFIG_SYSVIPC=y
  44 +CONFIG_SYSVIPC_SYSCTL=y
  45 +# CONFIG_POSIX_MQUEUE is not set
  46 +# CONFIG_BSD_PROCESS_ACCT is not set
  47 +# CONFIG_TASKSTATS is not set
  48 +# CONFIG_USER_NS is not set
  49 +# CONFIG_PID_NS is not set
  50 +# CONFIG_AUDIT is not set
  51 +# CONFIG_IKCONFIG is not set
  52 +CONFIG_LOG_BUF_SHIFT=14
  53 +# CONFIG_CGROUPS is not set
  54 +# CONFIG_FAIR_GROUP_SCHED is not set
  55 +# CONFIG_SYSFS_DEPRECATED is not set
  56 +# CONFIG_RELAY is not set
  57 +CONFIG_BLK_DEV_INITRD=y
  58 +CONFIG_INITRAMFS_SOURCE=""
  59 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
  60 +CONFIG_SYSCTL=y
  61 +# CONFIG_EMBEDDED is not set
  62 +CONFIG_UID16=y
  63 +CONFIG_SYSCTL_SYSCALL=y
  64 +CONFIG_KALLSYMS=y
  65 +# CONFIG_KALLSYMS_ALL is not set
  66 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
  67 +CONFIG_HOTPLUG=y
  68 +CONFIG_PRINTK=y
  69 +CONFIG_BUG=y
  70 +CONFIG_ELF_CORE=y
  71 +CONFIG_BASE_FULL=y
  72 +CONFIG_FUTEX=y
  73 +CONFIG_ANON_INODES=y
  74 +CONFIG_EPOLL=y
  75 +CONFIG_SIGNALFD=y
  76 +CONFIG_EVENTFD=y
  77 +CONFIG_SHMEM=y
  78 +CONFIG_VM_EVENT_COUNTERS=y
  79 +CONFIG_SLAB=y
  80 +# CONFIG_SLUB is not set
  81 +# CONFIG_SLOB is not set
  82 +CONFIG_SLABINFO=y
  83 +CONFIG_RT_MUTEXES=y
  84 +# CONFIG_TINY_SHMEM is not set
  85 +CONFIG_BASE_SMALL=0
  86 +CONFIG_MODULES=y
  87 +CONFIG_MODULE_UNLOAD=y
  88 +CONFIG_MODULE_FORCE_UNLOAD=y
  89 +# CONFIG_MODVERSIONS is not set
  90 +# CONFIG_MODULE_SRCVERSION_ALL is not set
  91 +CONFIG_KMOD=y
  92 +CONFIG_BLOCK=y
  93 +# CONFIG_LBD is not set
  94 +# CONFIG_BLK_DEV_IO_TRACE is not set
  95 +# CONFIG_LSF is not set
  96 +# CONFIG_BLK_DEV_BSG is not set
  97 +
  98 +#
  99 +# IO Schedulers
 100 +#
 101 +CONFIG_IOSCHED_NOOP=y
 102 +CONFIG_IOSCHED_AS=m
 103 +CONFIG_IOSCHED_DEADLINE=y
 104 +CONFIG_IOSCHED_CFQ=m
 105 +# CONFIG_DEFAULT_AS is not set
 106 +CONFIG_DEFAULT_DEADLINE=y
 107 +# CONFIG_DEFAULT_CFQ is not set
 108 +# CONFIG_DEFAULT_NOOP is not set
 109 +CONFIG_DEFAULT_IOSCHED="deadline"
 110 +
 111 +#
 112 +# System Type
 113 +#
 114 +# CONFIG_ARCH_AAEC2000 is not set
 115 +# CONFIG_ARCH_INTEGRATOR is not set
 116 +# CONFIG_ARCH_REALVIEW is not set
 117 +# CONFIG_ARCH_VERSATILE is not set
 118 +# CONFIG_ARCH_AT91 is not set
 119 +# CONFIG_ARCH_CLPS7500 is not set
 120 +# CONFIG_ARCH_CLPS711X is not set
 121 +# CONFIG_ARCH_CO285 is not set
 122 +# CONFIG_ARCH_EBSA110 is not set
 123 +# CONFIG_ARCH_EP93XX is not set
 124 +# CONFIG_ARCH_FOOTBRIDGE is not set
 125 +# CONFIG_ARCH_NETX is not set
 126 +# CONFIG_ARCH_H720X is not set
 127 +# CONFIG_ARCH_IMX is not set
 128 +# CONFIG_ARCH_IOP13XX is not set
 129 +# CONFIG_ARCH_IOP32X is not set
 130 +# CONFIG_ARCH_IOP33X is not set
 131 +# CONFIG_ARCH_IXP23XX is not set
 132 +# CONFIG_ARCH_IXP2000 is not set
 133 +# CONFIG_ARCH_IXP4XX is not set
 134 +# CONFIG_ARCH_L7200 is not set
 135 +# CONFIG_ARCH_KS8695 is not set
 136 +# CONFIG_ARCH_NS9XXX is not set
 137 +# CONFIG_ARCH_MXC is not set
 138 +# CONFIG_ARCH_PNX4008 is not set
 139 +# CONFIG_ARCH_PXA is not set
 140 +# CONFIG_ARCH_RPC is not set
 141 +# CONFIG_ARCH_SA1100 is not set
 142 +CONFIG_ARCH_S3C2410=y
 143 +# CONFIG_ARCH_SHARK is not set
 144 +# CONFIG_ARCH_LH7A40X is not set
 145 +# CONFIG_ARCH_DAVINCI is not set
 146 +# CONFIG_ARCH_OMAP is not set
 147 +CONFIG_PLAT_S3C24XX=y
 148 +CONFIG_CPU_S3C244X=y
 149 +CONFIG_S3C2410_DMA=y
 150 +# CONFIG_S3C2410_DMA_DEBUG is not set
 151 +CONFIG_MACH_SMDK=y
 152 +CONFIG_PLAT_S3C=y
 153 +CONFIG_CPU_LLSERIAL_S3C2410=y
 154 +CONFIG_CPU_LLSERIAL_S3C2440=y
 155 +
 156 +#
 157 +# Boot options
 158 +#
 159 +# CONFIG_S3C_BOOT_WATCHDOG is not set
 160 +# CONFIG_S3C_BOOT_ERROR_RESET is not set
 161 +
 162 +#
 163 +# Power management
 164 +#
 165 +# CONFIG_S3C2410_PM_CHECK is not set
 166 +CONFIG_S3C_LOWLEVEL_UART_PORT=2
 167 +
 168 +#
 169 +# S3C2400 Machines
 170 +#
 171 +CONFIG_CPU_S3C2410=y
 172 +CONFIG_CPU_S3C2410_DMA=y
 173 +CONFIG_S3C2410_PM=y
 174 +CONFIG_S3C2410_GPIO=y
 175 +CONFIG_S3C2410_CLOCK=y
 176 +CONFIG_S3C2410_PWM=y
 177 +
 178 +#
 179 +# S3C2410 Machines
 180 +#
 181 +# CONFIG_ARCH_SMDK2410 is not set
 182 +# CONFIG_ARCH_H1940 is not set
 183 +# CONFIG_MACH_N30 is not set
 184 +# CONFIG_ARCH_BAST is not set
 185 +# CONFIG_MACH_OTOM is not set
 186 +# CONFIG_MACH_AML_M5900 is not set
 187 +# CONFIG_MACH_VR1000 is not set
 188 +CONFIG_MACH_QT2410=y
 189 +# CONFIG_MACH_NEO1973_GTA01 is not set
 190 +
 191 +#
 192 +# S3C2412 Machines
 193 +#
 194 +# CONFIG_MACH_SMDK2413 is not set
 195 +# CONFIG_MACH_SMDK2412 is not set
 196 +# CONFIG_MACH_VSTMS is not set
 197 +CONFIG_CPU_S3C2440=y
 198 +CONFIG_S3C2440_DMA=y
 199 +# CONFIG_S3C2440_C_FIQ is not set
 200 +
 201 +#
 202 +# S3C2440 Machines
 203 +#
 204 +# CONFIG_MACH_ANUBIS is not set
 205 +# CONFIG_MACH_OSIRIS is not set
 206 +# CONFIG_MACH_RX3715 is not set
 207 +CONFIG_ARCH_S3C2440=y
 208 +# CONFIG_MACH_NEXCODER_2440 is not set
 209 +CONFIG_SMDK2440_CPU2440=y
 210 +# CONFIG_MACH_HXD8 is not set
 211 +# CONFIG_MACH_NEO1973_GTA02 is not set
 212 +CONFIG_MACH_M800=y
 213 +CONFIG_CPU_S3C2442=y
 214 +
 215 +#
 216 +# S3C2442 Machines
 217 +#
 218 +CONFIG_SMDK2440_CPU2442=y
 219 +
 220 +#
 221 +# S3C2443 Machines
 222 +#
 223 +# CONFIG_MACH_SMDK2443 is not set
 224 +
 225 +#
 226 +# Processor Type
 227 +#
 228 +CONFIG_CPU_32=y
 229 +CONFIG_CPU_ARM920T=y
 230 +CONFIG_CPU_32v4T=y
 231 +CONFIG_CPU_ABRT_EV4T=y
 232 +CONFIG_CPU_CACHE_V4WT=y
 233 +CONFIG_CPU_CACHE_VIVT=y
 234 +CONFIG_CPU_COPY_V4WB=y
 235 +CONFIG_CPU_TLB_V4WBI=y
 236 +CONFIG_CPU_CP15=y
 237 +CONFIG_CPU_CP15_MMU=y
 238 +
 239 +#
 240 +# Processor Features
 241 +#
 242 +CONFIG_ARM_THUMB=y
 243 +# CONFIG_CPU_ICACHE_DISABLE is not set
 244 +# CONFIG_CPU_DCACHE_DISABLE is not set
 245 +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
 246 +# CONFIG_OUTER_CACHE is not set
 247 +
 248 +#
 249 +# Bus support
 250 +#
 251 +# CONFIG_PCI_SYSCALL is not set
 252 +# CONFIG_ARCH_SUPPORTS_MSI is not set
 253 +# CONFIG_PCCARD is not set
 254 +
 255 +#
 256 +# Kernel Features
 257 +#
 258 +# CONFIG_TICK_ONESHOT is not set
 259 +CONFIG_PREEMPT=y
 260 +CONFIG_NO_IDLE_HZ=y
 261 +CONFIG_HZ=200
 262 +CONFIG_AEABI=y
 263 +CONFIG_OABI_COMPAT=y
 264 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 265 +CONFIG_SELECT_MEMORY_MODEL=y
 266 +CONFIG_FLATMEM_MANUAL=y
 267 +# CONFIG_DISCONTIGMEM_MANUAL is not set
 268 +# CONFIG_SPARSEMEM_MANUAL is not set
 269 +CONFIG_FLATMEM=y
 270 +CONFIG_FLAT_NODE_MEM_MAP=y
 271 +# CONFIG_SPARSEMEM_STATIC is not set
 272 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 273 +CONFIG_SPLIT_PTLOCK_CPUS=4096
 274 +# CONFIG_RESOURCES_64BIT is not set
 275 +CONFIG_ZONE_DMA_FLAG=1
 276 +CONFIG_BOUNCE=y
 277 +CONFIG_VIRT_TO_BUS=y
 278 +CONFIG_ALIGNMENT_TRAP=y
 279 +
 280 +#
 281 +# Boot options
 282 +#
 283 +CONFIG_ZBOOT_ROM_TEXT=0x0
 284 +CONFIG_ZBOOT_ROM_BSS=0x0
 285 +CONFIG_CMDLINE="root=/dev/mmcblk0p1 rootdelay=5"
 286 +# CONFIG_XIP_KERNEL is not set
 287 +CONFIG_KEXEC=y
 288 +CONFIG_ATAGS_PROC=y
 289 +
 290 +#
 291 +# Floating point emulation
 292 +#
 293 +
 294 +#
 295 +# At least one emulation must be selected
 296 +#
 297 +CONFIG_FPE_NWFPE=y
 298 +# CONFIG_FPE_NWFPE_XP is not set
 299 +# CONFIG_FPE_FASTFPE is not set
 300 +
 301 +#
 302 +# Userspace binary formats
 303 +#
 304 +CONFIG_BINFMT_ELF=y
 305 +# CONFIG_BINFMT_AOUT is not set
 306 +# CONFIG_BINFMT_MISC is not set
 307 +
 308 +#
 309 +# Power management options
 310 +#
 311 +CONFIG_PM=y
 312 +CONFIG_PM_LEGACY=y
 313 +CONFIG_PM_DEBUG=y
 314 +# CONFIG_PM_VERBOSE is not set
 315 +CONFIG_PM_SLEEP=y
 316 +CONFIG_SUSPEND_UP_POSSIBLE=y
 317 +CONFIG_SUSPEND=y
 318 +CONFIG_APM_EMULATION=y
 319 +
 320 +#
 321 +# Networking
 322 +#
 323 +CONFIG_NET=y
 324 +
 325 +#
 326 +# Networking options
 327 +#
 328 +CONFIG_PACKET=y
 329 +CONFIG_PACKET_MMAP=y
 330 +CONFIG_UNIX=y
 331 +CONFIG_XFRM=y
 332 +# CONFIG_XFRM_USER is not set
 333 +# CONFIG_XFRM_SUB_POLICY is not set
 334 +CONFIG_XFRM_MIGRATE=y
 335 +CONFIG_NET_KEY=m
 336 +CONFIG_NET_KEY_MIGRATE=y
 337 +CONFIG_INET=y
 338 +CONFIG_IP_MULTICAST=y
 339 +CONFIG_IP_ADVANCED_ROUTER=y
 340 +CONFIG_ASK_IP_FIB_HASH=y
 341 +# CONFIG_IP_FIB_TRIE is not set
 342 +CONFIG_IP_FIB_HASH=y
 343 +CONFIG_IP_MULTIPLE_TABLES=y
 344 +# CONFIG_IP_ROUTE_MULTIPATH is not set
 345 +# CONFIG_IP_ROUTE_VERBOSE is not set
 346 +CONFIG_IP_PNP=y
 347 +CONFIG_IP_PNP_DHCP=y
 348 +# CONFIG_IP_PNP_BOOTP is not set
 349 +# CONFIG_IP_PNP_RARP is not set
 350 +CONFIG_NET_IPIP=m
 351 +CONFIG_NET_IPGRE=m
 352 +# CONFIG_NET_IPGRE_BROADCAST is not set
 353 +# CONFIG_IP_MROUTE is not set
 354 +# CONFIG_ARPD is not set
 355 +CONFIG_SYN_COOKIES=y
 356 +CONFIG_INET_AH=m
 357 +CONFIG_INET_ESP=m
 358 +CONFIG_INET_IPCOMP=m
 359 +CONFIG_INET_XFRM_TUNNEL=m
 360 +CONFIG_INET_TUNNEL=m
 361 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
 362 +CONFIG_INET_XFRM_MODE_TUNNEL=m
 363 +CONFIG_INET_XFRM_MODE_BEET=m
 364 +# CONFIG_INET_LRO is not set
 365 +CONFIG_INET_DIAG=y
 366 +CONFIG_INET_TCP_DIAG=y
 367 +# CONFIG_TCP_CONG_ADVANCED is not set
 368 +CONFIG_TCP_CONG_CUBIC=y
 369 +CONFIG_DEFAULT_TCP_CONG="cubic"
 370 +CONFIG_TCP_MD5SIG=y
 371 +# CONFIG_IP_VS is not set
 372 +CONFIG_IPV6=m
 373 +# CONFIG_IPV6_PRIVACY is not set
 374 +# CONFIG_IPV6_ROUTER_PREF is not set
 375 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
 376 +CONFIG_INET6_AH=m
 377 +CONFIG_INET6_ESP=m
 378 +CONFIG_INET6_IPCOMP=m
 379 +# CONFIG_IPV6_MIP6 is not set
 380 +CONFIG_INET6_XFRM_TUNNEL=m
 381 +CONFIG_INET6_TUNNEL=m
 382 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
 383 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
 384 +CONFIG_INET6_XFRM_MODE_BEET=m
 385 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
 386 +CONFIG_IPV6_SIT=m
 387 +CONFIG_IPV6_TUNNEL=m
 388 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
 389 +# CONFIG_NETWORK_SECMARK is not set
 390 +CONFIG_NETFILTER=y
 391 +# CONFIG_NETFILTER_DEBUG is not set
 392 +
 393 +#
 394 +# Core Netfilter Configuration
 395 +#
 396 +CONFIG_NETFILTER_NETLINK=m
 397 +CONFIG_NETFILTER_NETLINK_QUEUE=m
 398 +CONFIG_NETFILTER_NETLINK_LOG=m
 399 +CONFIG_NF_CONNTRACK_ENABLED=m
 400 +CONFIG_NF_CONNTRACK=m
 401 +CONFIG_NF_CT_ACCT=y
 402 +CONFIG_NF_CONNTRACK_MARK=y
 403 +CONFIG_NF_CONNTRACK_EVENTS=y
 404 +CONFIG_NF_CT_PROTO_GRE=m
 405 +CONFIG_NF_CT_PROTO_SCTP=m
 406 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
 407 +# CONFIG_NF_CONNTRACK_AMANDA is not set
 408 +CONFIG_NF_CONNTRACK_FTP=m
 409 +CONFIG_NF_CONNTRACK_H323=m
 410 +CONFIG_NF_CONNTRACK_IRC=m
 411 +CONFIG_NF_CONNTRACK_NETBIOS_NS=m
 412 +CONFIG_NF_CONNTRACK_PPTP=m
 413 +CONFIG_NF_CONNTRACK_SANE=m
 414 +CONFIG_NF_CONNTRACK_SIP=m
 415 +CONFIG_NF_CONNTRACK_TFTP=m
 416 +CONFIG_NF_CT_NETLINK=m
 417 +CONFIG_NETFILTER_XTABLES=m
 418 +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 419 +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
 420 +CONFIG_NETFILTER_XT_TARGET_DSCP=m
 421 +CONFIG_NETFILTER_XT_TARGET_MARK=m
 422 +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
 423 +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
 424 +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
 425 +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
 426 +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
 427 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
 428 +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
 429 +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
 430 +CONFIG_NETFILTER_XT_MATCH_DCCP=m
 431 +CONFIG_NETFILTER_XT_MATCH_DSCP=m
 432 +CONFIG_NETFILTER_XT_MATCH_ESP=m
 433 +CONFIG_NETFILTER_XT_MATCH_HELPER=m
 434 +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
 435 +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
 436 +CONFIG_NETFILTER_XT_MATCH_MAC=m
 437 +CONFIG_NETFILTER_XT_MATCH_MARK=m
 438 +CONFIG_NETFILTER_XT_MATCH_POLICY=m
 439 +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
 440 +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
 441 +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
 442 +CONFIG_NETFILTER_XT_MATCH_REALM=m
 443 +CONFIG_NETFILTER_XT_MATCH_SCTP=m
 444 +CONFIG_NETFILTER_XT_MATCH_STATE=m
 445 +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
 446 +CONFIG_NETFILTER_XT_MATCH_STRING=m
 447 +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
 448 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
 449 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
 450 +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
 451 +
 452 +#
 453 +# IP: Netfilter Configuration
 454 +#
 455 +CONFIG_NF_CONNTRACK_IPV4=m
 456 +CONFIG_NF_CONNTRACK_PROC_COMPAT=y
 457 +# CONFIG_IP_NF_QUEUE is not set
 458 +CONFIG_IP_NF_IPTABLES=m
 459 +CONFIG_IP_NF_MATCH_IPRANGE=m
 460 +CONFIG_IP_NF_MATCH_TOS=m
 461 +# CONFIG_IP_NF_MATCH_RECENT is not set
 462 +CONFIG_IP_NF_MATCH_ECN=m
 463 +CONFIG_IP_NF_MATCH_AH=m
 464 +CONFIG_IP_NF_MATCH_TTL=m
 465 +CONFIG_IP_NF_MATCH_OWNER=m
 466 +CONFIG_IP_NF_MATCH_ADDRTYPE=m
 467 +CONFIG_IP_NF_FILTER=m
 468 +CONFIG_IP_NF_TARGET_REJECT=m
 469 +CONFIG_IP_NF_TARGET_LOG=m
 470 +CONFIG_IP_NF_TARGET_ULOG=m
 471 +CONFIG_NF_NAT=m
 472 +CONFIG_NF_NAT_NEEDED=y
 473 +CONFIG_IP_NF_TARGET_MASQUERADE=m
 474 +CONFIG_IP_NF_TARGET_REDIRECT=m
 475 +CONFIG_IP_NF_TARGET_NETMAP=m
 476 +CONFIG_IP_NF_TARGET_SAME=m
 477 +CONFIG_NF_NAT_SNMP_BASIC=m
 478 +CONFIG_NF_NAT_PROTO_GRE=m
 479 +CONFIG_NF_NAT_FTP=m
 480 +CONFIG_NF_NAT_IRC=m
 481 +CONFIG_NF_NAT_TFTP=m
 482 +# CONFIG_NF_NAT_AMANDA is not set
 483 +CONFIG_NF_NAT_PPTP=m
 484 +CONFIG_NF_NAT_H323=m
 485 +CONFIG_NF_NAT_SIP=m
 486 +CONFIG_IP_NF_MANGLE=m
 487 +CONFIG_IP_NF_TARGET_TOS=m
 488 +CONFIG_IP_NF_TARGET_ECN=m
 489 +CONFIG_IP_NF_TARGET_TTL=m
 490 +CONFIG_IP_NF_TARGET_CLUSTERIP=m
 491 +# CONFIG_IP_NF_RAW is not set
 492 +# CONFIG_IP_NF_ARPTABLES is not set
 493 +
 494 +#
 495 +# IPv6: Netfilter Configuration (EXPERIMENTAL)
 496 +#
 497 +CONFIG_NF_CONNTRACK_IPV6=m
 498 +# CONFIG_IP6_NF_QUEUE is not set
 499 +CONFIG_IP6_NF_IPTABLES=m
 500 +CONFIG_IP6_NF_MATCH_RT=m
 501 +CONFIG_IP6_NF_MATCH_OPTS=m
 502 +CONFIG_IP6_NF_MATCH_FRAG=m
 503 +CONFIG_IP6_NF_MATCH_HL=m
 504 +CONFIG_IP6_NF_MATCH_OWNER=m
 505 +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
 506 +CONFIG_IP6_NF_MATCH_AH=m
 507 +CONFIG_IP6_NF_MATCH_MH=m
 508 +CONFIG_IP6_NF_MATCH_EUI64=m
 509 +CONFIG_IP6_NF_FILTER=m
 510 +CONFIG_IP6_NF_TARGET_LOG=m
 511 +CONFIG_IP6_NF_TARGET_REJECT=m
 512 +CONFIG_IP6_NF_MANGLE=m
 513 +CONFIG_IP6_NF_TARGET_HL=m
 514 +# CONFIG_IP6_NF_RAW is not set
 515 +# CONFIG_IP_DCCP is not set
 516 +# CONFIG_IP_SCTP is not set
 517 +# CONFIG_TIPC is not set
 518 +# CONFIG_ATM is not set
 519 +# CONFIG_BRIDGE is not set
 520 +# CONFIG_VLAN_8021Q is not set
 521 +# CONFIG_DECNET is not set
 522 +# CONFIG_LLC2 is not set
 523 +# CONFIG_IPX is not set
 524 +# CONFIG_ATALK is not set
 525 +# CONFIG_X25 is not set
 526 +# CONFIG_LAPB is not set
 527 +# CONFIG_ECONET is not set
 528 +# CONFIG_WAN_ROUTER is not set
 529 +CONFIG_NET_SCHED=y
 530 +
 531 +#
 532 +# Queueing/Scheduling
 533 +#
 534 +CONFIG_NET_SCH_CBQ=m
 535 +CONFIG_NET_SCH_HTB=m
 536 +CONFIG_NET_SCH_HFSC=m
 537 +CONFIG_NET_SCH_PRIO=m
 538 +# CONFIG_NET_SCH_RR is not set
 539 +CONFIG_NET_SCH_RED=m
 540 +CONFIG_NET_SCH_SFQ=m
 541 +CONFIG_NET_SCH_TEQL=m
 542 +CONFIG_NET_SCH_TBF=m
 543 +CONFIG_NET_SCH_GRED=m
 544 +CONFIG_NET_SCH_DSMARK=m
 545 +CONFIG_NET_SCH_NETEM=m
 546 +CONFIG_NET_SCH_INGRESS=m
 547 +
 548 +#
 549 +# Classification
 550 +#
 551 +CONFIG_NET_CLS=y
 552 +CONFIG_NET_CLS_BASIC=m
 553 +CONFIG_NET_CLS_TCINDEX=m
 554 +CONFIG_NET_CLS_ROUTE4=m
 555 +CONFIG_NET_CLS_ROUTE=y
 556 +CONFIG_NET_CLS_FW=m
 557 +CONFIG_NET_CLS_U32=m
 558 +CONFIG_CLS_U32_PERF=y
 559 +CONFIG_CLS_U32_MARK=y
 560 +CONFIG_NET_CLS_RSVP=m
 561 +CONFIG_NET_CLS_RSVP6=m
 562 +# CONFIG_NET_EMATCH is not set
 563 +# CONFIG_NET_CLS_ACT is not set
 564 +# CONFIG_NET_CLS_POLICE is not set
 565 +# CONFIG_NET_CLS_IND is not set
 566 +CONFIG_NET_SCH_FIFO=y
 567 +
 568 +#
 569 +# Network testing
 570 +#
 571 +# CONFIG_NET_PKTGEN is not set
 572 +# CONFIG_HAMRADIO is not set
 573 +# CONFIG_IRDA is not set
 574 +CONFIG_BT=m
 575 +CONFIG_BT_L2CAP=m
 576 +CONFIG_BT_SCO=m
 577 +CONFIG_BT_RFCOMM=m
 578 +CONFIG_BT_RFCOMM_TTY=y
 579 +CONFIG_BT_BNEP=m
 580 +CONFIG_BT_BNEP_MC_FILTER=y
 581 +CONFIG_BT_BNEP_PROTO_FILTER=y
 582 +CONFIG_BT_HIDP=m
 583 +
 584 +#
 585 +# Bluetooth device drivers
 586 +#
 587 +CONFIG_BT_HCIUSB=m
 588 +CONFIG_BT_HCIUSB_SCO=y
 589 +# CONFIG_BT_HCIBTSDIO is not set
 590 +# CONFIG_BT_HCIUART is not set
 591 +# CONFIG_BT_HCIBCM203X is not set
 592 +# CONFIG_BT_HCIBPA10X is not set
 593 +# CONFIG_BT_HCIBFUSB is not set
 594 +# CONFIG_BT_HCIVHCI is not set
 595 +# CONFIG_AF_RXRPC is not set
 596 +CONFIG_FIB_RULES=y
 597 +
 598 +#
 599 +# Wireless
 600 +#
 601 +# CONFIG_CFG80211 is not set
 602 +CONFIG_WIRELESS_EXT=y
 603 +# CONFIG_MAC80211 is not set
 604 +# CONFIG_IEEE80211 is not set
 605 +# CONFIG_RFKILL is not set
 606 +# CONFIG_NET_9P is not set
 607 +
 608 +#
 609 +# Device Drivers
 610 +#
 611 +
 612 +#
 613 +# Generic Driver Options
 614 +#
 615 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 616 +CONFIG_STANDALONE=y
 617 +CONFIG_PREVENT_FIRMWARE_BUILD=y
 618 +CONFIG_FW_LOADER=m
 619 +# CONFIG_DEBUG_DRIVER is not set
 620 +# CONFIG_DEBUG_DEVRES is not set
 621 +# CONFIG_SYS_HYPERVISOR is not set
 622 +CONFIG_CONNECTOR=m
 623 +CONFIG_MTD=y
 624 +# CONFIG_MTD_DEBUG is not set
 625 +# CONFIG_MTD_CONCAT is not set
 626 +CONFIG_MTD_PARTITIONS=y
 627 +# CONFIG_MTD_REDBOOT_PARTS is not set
 628 +CONFIG_MTD_CMDLINE_PARTS=y
 629 +# CONFIG_MTD_AFS_PARTS is not set
 630 +
 631 +#
 632 +# User Modules And Translation Layers
 633 +#
 634 +CONFIG_MTD_CHAR=y
 635 +CONFIG_MTD_BLKDEVS=y
 636 +CONFIG_MTD_BLOCK=y
 637 +# CONFIG_FTL is not set
 638 +# CONFIG_NFTL is not set
 639 +# CONFIG_INFTL is not set
 640 +# CONFIG_RFD_FTL is not set
 641 +# CONFIG_SSFDC is not set
 642 +# CONFIG_MTD_OOPS is not set
 643 +
 644 +#
 645 +# RAM/ROM/Flash chip drivers
 646 +#
 647 +CONFIG_MTD_CFI=y
 648 +# CONFIG_MTD_JEDECPROBE is not set
 649 +CONFIG_MTD_GEN_PROBE=y
 650 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 651 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
 652 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
 653 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
 654 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
 655 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
 656 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
 657 +CONFIG_MTD_CFI_I1=y
 658 +CONFIG_MTD_CFI_I2=y
 659 +# CONFIG_MTD_CFI_I4 is not set
 660 +# CONFIG_MTD_CFI_I8 is not set
 661 +CONFIG_MTD_CFI_INTELEXT=y
 662 +# CONFIG_MTD_CFI_AMDSTD is not set
 663 +# CONFIG_MTD_CFI_STAA is not set
 664 +CONFIG_MTD_CFI_UTIL=y
 665 +# CONFIG_MTD_RAM is not set
 666 +# CONFIG_MTD_ROM is not set
 667 +CONFIG_MTD_ABSENT=y
 668 +
 669 +#
 670 +# Mapping drivers for chip access
 671 +#
 672 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
 673 +CONFIG_MTD_PHYSMAP=y
 674 +CONFIG_MTD_PHYSMAP_START=0x8000000
 675 +CONFIG_MTD_PHYSMAP_LEN=0
 676 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 677 +# CONFIG_MTD_ARM_INTEGRATOR is not set
 678 +# CONFIG_MTD_PLATRAM is not set
 679 +
 680 +#
 681 +# Self-contained MTD device drivers
 682 +#
 683 +# CONFIG_MTD_DATAFLASH is not set
 684 +# CONFIG_MTD_M25P80 is not set
 685 +# CONFIG_MTD_SLRAM is not set
 686 +# CONFIG_MTD_PHRAM is not set
 687 +# CONFIG_MTD_MTDRAM is not set
 688 +# CONFIG_MTD_BLOCK2MTD is not set
 689 +
 690 +#
 691 +# Disk-On-Chip Device Drivers
 692 +#
 693 +# CONFIG_MTD_DOC2000 is not set
 694 +# CONFIG_MTD_DOC2001 is not set
 695 +# CONFIG_MTD_DOC2001PLUS is not set
 696 +CONFIG_MTD_NAND=y
 697 +CONFIG_MTD_NAND_VERIFY_WRITE=y
 698 +# CONFIG_MTD_NAND_ECC_SMC is not set
 699 +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
 700 +CONFIG_MTD_NAND_IDS=y
 701 +CONFIG_MTD_NAND_S3C2410=y
 702 +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
 703 +CONFIG_MTD_NAND_S3C2410_HWECC=y
 704 +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
 705 +# CONFIG_MTD_NAND_DISKONCHIP is not set
 706 +# CONFIG_MTD_NAND_NANDSIM is not set
 707 +# CONFIG_MTD_NAND_PLATFORM is not set
 708 +# CONFIG_MTD_ALAUDA is not set
 709 +# CONFIG_MTD_ONENAND is not set
 710 +
 711 +#
 712 +# UBI - Unsorted block images
 713 +#
 714 +# CONFIG_MTD_UBI is not set
 715 +# CONFIG_PARPORT is not set
 716 +CONFIG_BLK_DEV=y
 717 +# CONFIG_BLK_DEV_COW_COMMON is not set
 718 +CONFIG_BLK_DEV_LOOP=m
 719 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
 720 +# CONFIG_BLK_DEV_NBD is not set
 721 +CONFIG_BLK_DEV_UB=m
 722 +CONFIG_BLK_DEV_RAM=y
 723 +CONFIG_BLK_DEV_RAM_COUNT=16
 724 +CONFIG_BLK_DEV_RAM_SIZE=4096
 725 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
 726 +# CONFIG_CDROM_PKTCDVD is not set
 727 +# CONFIG_ATA_OVER_ETH is not set
 728 +CONFIG_MISC_DEVICES=y
 729 +# CONFIG_EEPROM_93CX6 is not set
 730 +# CONFIG_IDE is not set
 731 +
 732 +
 733 +#
 734 +# SCSI device support
 735 +#
 736 +# CONFIG_RAID_ATTRS is not set
 737 +CONFIG_SCSI=m
 738 +CONFIG_SCSI_DMA=y
 739 +# CONFIG_SCSI_TGT is not set
 740 +# CONFIG_SCSI_NETLINK is not set
 741 +CONFIG_SCSI_PROC_FS=y
 742 +
 743 +#
 744 +# SCSI support type (disk, tape, CD-ROM)
 745 +#
 746 +CONFIG_BLK_DEV_SD=m
 747 +# CONFIG_CHR_DEV_ST is not set
 748 +# CONFIG_CHR_DEV_OSST is not set
 749 +CONFIG_BLK_DEV_SR=m
 750 +# CONFIG_BLK_DEV_SR_VENDOR is not set
 751 +CONFIG_CHR_DEV_SG=m
 752 +# CONFIG_CHR_DEV_SCH is not set
 753 +
 754 +#
 755 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
 756 +#
 757 +# CONFIG_SCSI_MULTI_LUN is not set
 758 +# CONFIG_SCSI_CONSTANTS is not set
 759 +# CONFIG_SCSI_LOGGING is not set
 760 +CONFIG_SCSI_SCAN_ASYNC=y
 761 +CONFIG_SCSI_WAIT_SCAN=m
 762 +
 763 +#
 764 +# SCSI Transports
 765 +#
 766 +# CONFIG_SCSI_SPI_ATTRS is not set
 767 +# CONFIG_SCSI_FC_ATTRS is not set
 768 +# CONFIG_SCSI_ISCSI_ATTRS is not set
 769 +# CONFIG_SCSI_SAS_LIBSAS is not set
 770 +# CONFIG_SCSI_SRP_ATTRS is not set
 771 +CONFIG_SCSI_LOWLEVEL=y
 772 +# CONFIG_ISCSI_TCP is not set
 773 +# CONFIG_SCSI_DEBUG is not set
 774 +# CONFIG_ATA is not set
 775 +# CONFIG_MD is not set
 776 +CONFIG_NETDEVICES=y
 777 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
 778 +# CONFIG_DUMMY is not set
 779 +# CONFIG_BONDING is not set
 780 +# CONFIG_MACVLAN is not set
 781 +# CONFIG_EQUALIZER is not set
 782 +CONFIG_TUN=m
 783 +# CONFIG_VETH is not set
 784 +# CONFIG_PHYLIB is not set
 785 +CONFIG_NET_ETHERNET=y
 786 +CONFIG_MII=y
 787 +# CONFIG_AX88796 is not set
 788 +# CONFIG_SMC91X is not set
 789 +# CONFIG_DM9000 is not set
 790 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
 791 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
 792 +# CONFIG_IBM_NEW_EMAC_TAH is not set
 793 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
 794 +CONFIG_NET_PCI=y
 795 +# CONFIG_B44 is not set
 796 +CONFIG_CS89x0=m
 797 +# CONFIG_NETDEV_1000 is not set
 798 +# CONFIG_NETDEV_10000 is not set
 799 +
 800 +#
 801 +# Wireless LAN
 802 +#
 803 +# CONFIG_WLAN_PRE80211 is not set
 804 +# CONFIG_WLAN_80211 is not set
 805 +
 806 +#
 807 +# USB Network Adapters
 808 +#
 809 +CONFIG_USB_CATC=m
 810 +CONFIG_USB_KAWETH=m
 811 +CONFIG_USB_PEGASUS=m
 812 +CONFIG_USB_RTL8150=m
 813 +CONFIG_USB_USBNET=y
 814 +CONFIG_USB_NET_AX8817X=m
 815 +CONFIG_USB_NET_CDCETHER=m
 816 +CONFIG_USB_NET_DM9601=m
 817 +CONFIG_USB_NET_GL620A=m
 818 +CONFIG_USB_NET_NET1080=m
 819 +CONFIG_USB_NET_PLUSB=m
 820 +CONFIG_USB_NET_MCS7830=m
 821 +CONFIG_USB_NET_RNDIS_HOST=m
 822 +CONFIG_USB_NET_CDC_SUBSET=m
 823 +CONFIG_USB_ALI_M5632=y
 824 +CONFIG_USB_AN2720=y
 825 +CONFIG_USB_BELKIN=y
 826 +CONFIG_USB_ARMLINUX=y
 827 +CONFIG_USB_EPSON2888=y
 828 +CONFIG_USB_KC2190=y
 829 +CONFIG_USB_NET_ZAURUS=m
 830 +# CONFIG_WAN is not set
 831 +CONFIG_PPP=m
 832 +CONFIG_PPP_MULTILINK=y
 833 +CONFIG_PPP_FILTER=y
 834 +CONFIG_PPP_ASYNC=m
 835 +CONFIG_PPP_SYNC_TTY=m
 836 +CONFIG_PPP_DEFLATE=m
 837 +CONFIG_PPP_BSDCOMP=m
 838 +CONFIG_PPP_MPPE=m
 839 +# CONFIG_PPPOE is not set
 840 +# CONFIG_PPPOL2TP is not set
 841 +# CONFIG_SLIP is not set
 842 +CONFIG_SLHC=m
 843 +# CONFIG_SHAPER is not set
 844 +# CONFIG_NETCONSOLE is not set
 845 +# CONFIG_NETPOLL is not set
 846 +# CONFIG_NET_POLL_CONTROLLER is not set
 847 +# CONFIG_ISDN is not set
 848 +
 849 +#
 850 +# Input device support
 851 +#
 852 +CONFIG_INPUT=y
 853 +# CONFIG_INPUT_FF_MEMLESS is not set
 854 +# CONFIG_INPUT_POLLDEV is not set
 855 +
 856 +#
 857 +# Userland interfaces
 858 +#
 859 +CONFIG_INPUT_MOUSEDEV=y
 860 +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 861 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
 862 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
 863 +# CONFIG_INPUT_JOYDEV is not set
 864 +CONFIG_INPUT_EVDEV=y
 865 +# CONFIG_INPUT_EVBUG is not set
 866 +
 867 +#
 868 +# Input Device Drivers
 869 +#
 870 +CONFIG_INPUT_KEYBOARD=y
 871 +# CONFIG_KEYBOARD_ATKBD is not set
 872 +# CONFIG_KEYBOARD_SUNKBD is not set
 873 +# CONFIG_KEYBOARD_LKKBD is not set
 874 +# CONFIG_KEYBOARD_XTKBD is not set
 875 +# CONFIG_KEYBOARD_NEWTON is not set
 876 +CONFIG_KEYBOARD_STOWAWAY=m
 877 +CONFIG_KEYBOARD_GPIO=m
 878 +CONFIG_KEYBOARD_M800=y
 879 +CONFIG_KEYBOARD_QT2410=y
 880 +CONFIG_INPUT_MOUSE=y
 881 +# CONFIG_MOUSE_PS2 is not set
 882 +# CONFIG_MOUSE_SERIAL is not set
 883 +# CONFIG_MOUSE_APPLETOUCH is not set
 884 +# CONFIG_MOUSE_VSXXXAA is not set
 885 +# CONFIG_MOUSE_GPIO is not set
 886 +# CONFIG_INPUT_JOYSTICK is not set
 887 +# CONFIG_INPUT_TABLET is not set
 888 +CONFIG_INPUT_TOUCHSCREEN=y
 889 +# CONFIG_TOUCHSCREEN_ADS7846 is not set
 890 +# CONFIG_TOUCHSCREEN_FUJITSU is not set
 891 +CONFIG_TOUCHSCREEN_S3C2410=y
 892 +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
 893 +# CONFIG_TOUCHSCREEN_GUNZE is not set
 894 +# CONFIG_TOUCHSCREEN_ELO is not set
 895 +# CONFIG_TOUCHSCREEN_MTOUCH is not set
 896 +# CONFIG_TOUCHSCREEN_MK712 is not set
 897 +# CONFIG_TOUCHSCREEN_PENMOUNT is not set
 898 +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 899 +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 900 +# CONFIG_TOUCHSCREEN_UCB1400 is not set
 901 +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 902 +CONFIG_INPUT_MISC=y
 903 +# CONFIG_INPUT_ATI_REMOTE is not set
 904 +# CONFIG_INPUT_ATI_REMOTE2 is not set
 905 +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
 906 +# CONFIG_INPUT_POWERMATE is not set
 907 +# CONFIG_INPUT_YEALINK is not set
 908 +CONFIG_INPUT_UINPUT=m
 909 +CONFIG_INPUT_LIS302DL=y
 910 +
 911 +#
 912 +# Hardware I/O ports
 913 +#
 914 +CONFIG_SERIO=y
 915 +# CONFIG_SERIO_SERPORT is not set
 916 +# CONFIG_SERIO_RAW is not set
 917 +# CONFIG_GAMEPORT is not set
 918 +
 919 +#
 920 +# Character devices
 921 +#
 922 +CONFIG_VT=y
 923 +CONFIG_VT_CONSOLE=y
 924 +CONFIG_NR_TTY_DEVICES=4
 925 +CONFIG_HW_CONSOLE=y
 926 +CONFIG_VT_HW_CONSOLE_BINDING=y
 927 +# CONFIG_SERIAL_NONSTANDARD is not set
 928 +
 929 +#
 930 +# Serial drivers
 931 +#
 932 +# CONFIG_SERIAL_8250 is not set
 933 +
 934 +#
 935 +# Non-8250 serial port support
 936 +#
 937 +CONFIG_SERIAL_S3C2410=y
 938 +CONFIG_SERIAL_S3C2410_CONSOLE=y
 939 +CONFIG_SERIAL_CORE=y
 940 +CONFIG_SERIAL_CORE_CONSOLE=y
 941 +CONFIG_UNIX98_PTYS=y
 942 +# CONFIG_LEGACY_PTYS is not set
 943 +# CONFIG_IPMI_HANDLER is not set
 944 +# CONFIG_HW_RANDOM is not set
 945 +# CONFIG_NVRAM is not set
 946 +# CONFIG_R3964 is not set
 947 +# CONFIG_RAW_DRIVER is not set
 948 +# CONFIG_TCG_TPM is not set
 949 +CONFIG_I2C=y
 950 +CONFIG_I2C_BOARDINFO=y
 951 +CONFIG_I2C_CHARDEV=y
 952 +
 953 +#
 954 +# I2C Algorithms
 955 +#
 956 +# CONFIG_I2C_ALGOBIT is not set
 957 +# CONFIG_I2C_ALGOPCF is not set
 958 +# CONFIG_I2C_ALGOPCA is not set
 959 +
 960 +#
 961 +# I2C Hardware Bus support
 962 +#
 963 +# CONFIG_I2C_GPIO is not set
 964 +# CONFIG_I2C_OCORES is not set
 965 +# CONFIG_I2C_PARPORT_LIGHT is not set
 966 +CONFIG_I2C_S3C2410=y
 967 +# CONFIG_I2C_SIMTEC is not set
 968 +# CONFIG_I2C_TAOS_EVM is not set
 969 +# CONFIG_I2C_STUB is not set
 970 +# CONFIG_I2C_TINY_USB is not set
 971 +
 972 +#
 973 +# Miscellaneous I2C Chip support
 974 +#
 975 +# CONFIG_SENSORS_DS1337 is not set
 976 +# CONFIG_SENSORS_DS1374 is not set
 977 +# CONFIG_DS1682 is not set
 978 +# CONFIG_SENSORS_EEPROM is not set
 979 +CONFIG_SENSORS_PCF50606=y
 980 +CONFIG_SENSORS_PCF50633=y
 981 +# CONFIG_SENSORS_PCF8574 is not set
 982 +# CONFIG_SENSORS_PCA9539 is not set
 983 +# CONFIG_SENSORS_PCF8591 is not set
 984 +# CONFIG_SENSORS_MAX6875 is not set
 985 +# CONFIG_SENSORS_TSL2550 is not set
 986 +CONFIG_SENSORS_TSL256X=m
 987 +# CONFIG_PCA9632 is not set
 988 +# CONFIG_I2C_DEBUG_CORE is not set
 989 +# CONFIG_I2C_DEBUG_ALGO is not set
 990 +# CONFIG_I2C_DEBUG_BUS is not set
 991 +# CONFIG_I2C_DEBUG_CHIP is not set
 992 +
 993 +#
 994 +# SPI support
 995 +#
 996 +CONFIG_SPI=y
 997 +# CONFIG_SPI_DEBUG is not set
 998 +CONFIG_SPI_MASTER=y
 999 +
1000 +#
1001 +# SPI Master Controller Drivers
1002 +#
1003 +CONFIG_SPI_BITBANG=y
1004 +CONFIG_SPI_S3C24XX=y
1005 +CONFIG_SPI_S3C24XX_GPIO=y
1006 +
1007 +#
1008 +# SPI Protocol Masters
1009 +#
1010 +# CONFIG_SPI_AT25 is not set
1011 +# CONFIG_SPI_SPIDEV is not set
1012 +# CONFIG_SPI_TLE62X0 is not set
1013 +# CONFIG_W1 is not set
1014 +CONFIG_POWER_SUPPLY=y
1015 +# CONFIG_POWER_SUPPLY_DEBUG is not set
1016 +# CONFIG_PDA_POWER is not set
1017 +CONFIG_APM_POWER=y
1018 +# CONFIG_BATTERY_DS2760 is not set
1019 +CONFIG_BATTERY_BQ27000_HDQ=y
1020 +# CONFIG_HWMON is not set
1021 +CONFIG_WATCHDOG=y
1022 +# CONFIG_WATCHDOG_NOWAYOUT is not set
1023 +
1024 +#
1025 +# Watchdog Device Drivers
1026 +#
1027 +# CONFIG_SOFT_WATCHDOG is not set
1028 +CONFIG_S3C2410_WATCHDOG=m
1029 +
1030 +#
1031 +# USB-based Watchdog Cards
1032 +#
1033 +# CONFIG_USBPCWATCHDOG is not set
1034 +
1035 +#
1036 +# Sonics Silicon Backplane
1037 +#
1038 +CONFIG_SSB_POSSIBLE=y
1039 +# CONFIG_SSB is not set
1040 +
1041 +#
1042 +# Multifunction device drivers
1043 +#
1044 +# CONFIG_MFD_SM501 is not set
1045 +# CONFIG_MFD_GLAMO is not set
1046 +
1047 +#
1048 +# Multimedia devices
1049 +#
1050 +# CONFIG_VIDEO_DEV is not set
1051 +# CONFIG_DVB_CORE is not set
1052 +# CONFIG_DAB is not set
1053 +
1054 +#
1055 +# Graphics support
1056 +#
1057 +# CONFIG_VGASTATE is not set
1058 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1059 +CONFIG_FB=y
1060 +# CONFIG_FIRMWARE_EDID is not set
1061 +# CONFIG_FB_DDC is not set
1062 +CONFIG_FB_CFB_FILLRECT=y
1063 +CONFIG_FB_CFB_COPYAREA=y
1064 +CONFIG_FB_CFB_IMAGEBLIT=y
1065 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1066 +# CONFIG_FB_SYS_FILLRECT is not set
1067 +# CONFIG_FB_SYS_COPYAREA is not set
1068 +# CONFIG_FB_SYS_IMAGEBLIT is not set
1069 +# CONFIG_FB_SYS_FOPS is not set
1070 +CONFIG_FB_DEFERRED_IO=y
1071 +# CONFIG_FB_SVGALIB is not set
1072 +# CONFIG_FB_MACMODES is not set
1073 +# CONFIG_FB_BACKLIGHT is not set
1074 +# CONFIG_FB_MODE_HELPERS is not set
1075 +# CONFIG_FB_TILEBLITTING is not set
1076 +
1077 +#
1078 +# Frame buffer hardware drivers
1079 +#
1080 +# CONFIG_FB_UVESA is not set
1081 +# CONFIG_FB_S1D13XXX is not set
1082 +CONFIG_FB_S3C2410=y
1083 +# CONFIG_FB_S3C2410_DEBUG is not set
1084 +# CONFIG_FB_VIRTUAL is not set
1085 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
1086 +CONFIG_LCD_CLASS_DEVICE=y
1087 +# CONFIG_LCD_LTV350QV is not set
1088 +CONFIG_BACKLIGHT_CLASS_DEVICE=y
1089 +# CONFIG_BACKLIGHT_CORGI is not set
1090 +
1091 +#
1092 +# Display device support
1093 +#
1094 +# CONFIG_DISPLAY_SUPPORT is not set
1095 +CONFIG_DISPLAY_JBT6K74=y
1096 +
1097 +#
1098 +# Console display driver support
1099 +#
1100 +# CONFIG_VGA_CONSOLE is not set
1101 +CONFIG_DUMMY_CONSOLE=y
1102 +CONFIG_FRAMEBUFFER_CONSOLE=y
1103 +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1104 +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1105 +CONFIG_FONTS=y
1106 +# CONFIG_FONT_8x8 is not set
1107 +# CONFIG_FONT_8x16 is not set
1108 +CONFIG_FONT_6x11=y
1109 +# CONFIG_FONT_7x14 is not set
1110 +# CONFIG_FONT_PEARL_8x8 is not set
1111 +# CONFIG_FONT_ACORN_8x8 is not set
1112 +# CONFIG_FONT_MINI_4x6 is not set
1113 +# CONFIG_FONT_SUN8x16 is not set
1114 +# CONFIG_FONT_SUN12x22 is not set
1115 +# CONFIG_FONT_10x18 is not set
1116 +# CONFIG_LOGO is not set
1117 +
1118 +#
1119 +# Sound
1120 +#
1121 +CONFIG_SOUND=y
1122 +
1123 +#
1124 +# Advanced Linux Sound Architecture
1125 +#
1126 +CONFIG_SND=m
1127 +CONFIG_SND_TIMER=m
1128 +CONFIG_SND_PCM=m
1129 +CONFIG_SND_RAWMIDI=m
1130 +# CONFIG_SND_SEQUENCER is not set
1131 +CONFIG_SND_OSSEMUL=y
1132 +CONFIG_SND_MIXER_OSS=m
1133 +CONFIG_SND_PCM_OSS=m
1134 +CONFIG_SND_PCM_OSS_PLUGINS=y
1135 +# CONFIG_SND_DYNAMIC_MINORS is not set
1136 +CONFIG_SND_SUPPORT_OLD_API=y
1137 +CONFIG_SND_VERBOSE_PROCFS=y
1138 +# CONFIG_SND_VERBOSE_PRINTK is not set
1139 +# CONFIG_SND_DEBUG is not set
1140 +
1141 +#
1142 +# Generic devices
1143 +#
1144 +# CONFIG_SND_DUMMY is not set
1145 +# CONFIG_SND_MTPAV is not set
1146 +# CONFIG_SND_SERIAL_U16550 is not set
1147 +# CONFIG_SND_MPU401 is not set
1148 +
1149 +#
1150 +# ALSA ARM devices
1151 +#
1152 +
1153 +#
1154 +# SPI devices
1155 +#
1156 +
1157 +#
1158 +# USB devices
1159 +#
1160 +# CONFIG_SND_USB_AUDIO is not set
1161 +# CONFIG_SND_USB_CAIAQ is not set
1162 +
1163 +#
1164 +# System on Chip audio support
1165 +#
1166 +CONFIG_SND_SOC=m
1167 +CONFIG_SND_S3C24XX_SOC=m
1168 +
1169 +#
1170 +# SoC Audio support for SuperH
1171 +#
1172 +
1173 +#
1174 +# Open Sound System
1175 +#
1176 +# CONFIG_SOUND_PRIME is not set
1177 +CONFIG_HID_SUPPORT=y
1178 +CONFIG_HID=y
1179 +# CONFIG_HID_DEBUG is not set
1180 +# CONFIG_HIDRAW is not set
1181 +
1182 +#
1183 +# USB Input Devices
1184 +#
1185 +CONFIG_USB_HID=y
1186 +# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1187 +# CONFIG_HID_FF is not set
1188 +CONFIG_USB_HIDDEV=y
1189 +CONFIG_USB_SUPPORT=y
1190 +CONFIG_USB_ARCH_HAS_HCD=y
1191 +CONFIG_USB_ARCH_HAS_OHCI=y
1192 +# CONFIG_USB_ARCH_HAS_EHCI is not set
1193 +CONFIG_USB=y
1194 +# CONFIG_USB_DEBUG is not set
1195 +
1196 +#
1197 +# Miscellaneous USB options
1198 +#
1199 +CONFIG_USB_DEVICEFS=y
1200 +CONFIG_USB_DEVICE_CLASS=y
1201 +# CONFIG_USB_DYNAMIC_MINORS is not set
1202 +CONFIG_USB_SUSPEND=y
1203 +# CONFIG_USB_PERSIST is not set
1204 +# CONFIG_USB_OTG is not set
1205 +
1206 +#
1207 +# USB Host Controller Drivers
1208 +#
1209 +# CONFIG_USB_ISP116X_HCD is not set
1210 +CONFIG_USB_OHCI_HCD=m
1211 +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1212 +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1213 +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1214 +# CONFIG_USB_SL811_HCD is not set
1215 +# CONFIG_USB_R8A66597_HCD is not set
1216 +
1217 +#
1218 +# USB Device Class drivers
1219 +#
1220 +CONFIG_USB_ACM=m
1221 +CONFIG_USB_PRINTER=m
1222 +
1223 +#
1224 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1225 +#
1226 +
1227 +#
1228 +# may also be needed; see USB_STORAGE Help for more information
1229 +#
1230 +CONFIG_USB_STORAGE=m
1231 +# CONFIG_USB_STORAGE_DEBUG is not set
1232 +CONFIG_USB_STORAGE_DATAFAB=y
1233 +CONFIG_USB_STORAGE_FREECOM=y
1234 +# CONFIG_USB_STORAGE_ISD200 is not set
1235 +CONFIG_USB_STORAGE_DPCM=y
1236 +CONFIG_USB_STORAGE_USBAT=y
1237 +CONFIG_USB_STORAGE_SDDR09=y
1238 +CONFIG_USB_STORAGE_SDDR55=y
1239 +CONFIG_USB_STORAGE_JUMPSHOT=y
1240 +CONFIG_USB_STORAGE_ALAUDA=y
1241 +CONFIG_USB_STORAGE_KARMA=y
1242 +CONFIG_USB_LIBUSUAL=y
1243 +
1244 +#
1245 +# USB Imaging devices
1246 +#
1247 +# CONFIG_USB_MDC800 is not set
1248 +# CONFIG_USB_MICROTEK is not set
1249 +CONFIG_USB_MON=y
1250 +
1251 +#
1252 +# USB port drivers
1253 +#
1254 +
1255 +#
1256 +# USB Serial Converter support
1257 +#
1258 +CONFIG_USB_SERIAL=m
1259 +CONFIG_USB_SERIAL_GENERIC=y
1260 +CONFIG_USB_SERIAL_AIRCABLE=m
1261 +CONFIG_USB_SERIAL_AIRPRIME=m
1262 +CONFIG_USB_SERIAL_ARK3116=m
1263 +CONFIG_USB_SERIAL_BELKIN=m
1264 +# CONFIG_USB_SERIAL_CH341 is not set
1265 +CONFIG_USB_SERIAL_WHITEHEAT=m
1266 +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
1267 +CONFIG_USB_SERIAL_CP2101=m
1268 +CONFIG_USB_SERIAL_CYPRESS_M8=m
1269 +CONFIG_USB_SERIAL_EMPEG=m
1270 +CONFIG_USB_SERIAL_FTDI_SIO=m
1271 +CONFIG_USB_SERIAL_FUNSOFT=m
1272 +CONFIG_USB_SERIAL_VISOR=m
1273 +CONFIG_USB_SERIAL_IPAQ=m
1274 +CONFIG_USB_SERIAL_IR=m
1275 +CONFIG_USB_SERIAL_EDGEPORT=m
1276 +CONFIG_USB_SERIAL_EDGEPORT_TI=m
1277 +CONFIG_USB_SERIAL_GARMIN=m
1278 +CONFIG_USB_SERIAL_IPW=m
1279 +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
1280 +CONFIG_USB_SERIAL_KEYSPAN=m
1281 +CONFIG_USB_SERIAL_KEYSPAN_MPR=y
1282 +CONFIG_USB_SERIAL_KEYSPAN_USA28=y
1283 +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
1284 +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
1285 +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
1286 +CONFIG_USB_SERIAL_KEYSPAN_USA19=y
1287 +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
1288 +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
1289 +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
1290 +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
1291 +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
1292 +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
1293 +CONFIG_USB_SERIAL_KLSI=m
1294 +CONFIG_USB_SERIAL_KOBIL_SCT=m
1295 +CONFIG_USB_SERIAL_MCT_U232=m
1296 +CONFIG_USB_SERIAL_MOS7720=m
1297 +CONFIG_USB_SERIAL_MOS7840=m
1298 +CONFIG_USB_SERIAL_NAVMAN=m
1299 +CONFIG_USB_SERIAL_PL2303=m
1300 +# CONFIG_USB_SERIAL_OTI6858 is not set
1301 +CONFIG_USB_SERIAL_HP4X=m
1302 +CONFIG_USB_SERIAL_SAFE=m
1303 +CONFIG_USB_SERIAL_SAFE_PADDED=y
1304 +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
1305 +CONFIG_USB_SERIAL_TI=m
1306 +CONFIG_USB_SERIAL_CYBERJACK=m
1307 +CONFIG_USB_SERIAL_XIRCOM=m
1308 +CONFIG_USB_SERIAL_OPTION=m
1309 +CONFIG_USB_SERIAL_OMNINET=m
1310 +# CONFIG_USB_SERIAL_DEBUG is not set
1311 +CONFIG_USB_EZUSB=y
1312 +
1313 +#
1314 +# USB Miscellaneous drivers
1315 +#
1316 +# CONFIG_USB_EMI62 is not set
1317 +# CONFIG_USB_EMI26 is not set
1318 +# CONFIG_USB_ADUTUX is not set
1319 +# CONFIG_USB_AUERSWALD is not set
1320 +# CONFIG_USB_RIO500 is not set
1321 +# CONFIG_USB_LEGOTOWER is not set
1322 +# CONFIG_USB_LCD is not set
1323 +# CONFIG_USB_BERRY_CHARGE is not set
1324 +# CONFIG_USB_LED is not set
1325 +# CONFIG_USB_CYPRESS_CY7C63 is not set
1326 +# CONFIG_USB_CYTHERM is not set
1327 +# CONFIG_USB_PHIDGET is not set
1328 +# CONFIG_USB_IDMOUSE is not set
1329 +# CONFIG_USB_FTDI_ELAN is not set
1330 +# CONFIG_USB_APPLEDISPLAY is not set
1331 +# CONFIG_USB_LD is not set
1332 +# CONFIG_USB_TRANCEVIBRATOR is not set
1333 +# CONFIG_USB_IOWARRIOR is not set
1334 +# CONFIG_USB_TEST is not set
1335 +
1336 +#
1337 +# USB DSL modem support
1338 +#
1339 +
1340 +#
1341 +# USB Gadget Support
1342 +#
1343 +CONFIG_USB_GADGET=y
1344 +# CONFIG_USB_GADGET_DEBUG is not set
1345 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
1346 +CONFIG_USB_GADGET_SELECTED=y
1347 +# CONFIG_USB_GADGET_AMD5536UDC is not set
1348 +# CONFIG_USB_GADGET_ATMEL_USBA is not set
1349 +# CONFIG_USB_GADGET_FSL_USB2 is not set
1350 +# CONFIG_USB_GADGET_NET2280 is not set
1351 +# CONFIG_USB_GADGET_PXA2XX is not set
1352 +# CONFIG_USB_GADGET_M66592 is not set
1353 +# CONFIG_USB_GADGET_GOKU is not set
1354 +# CONFIG_USB_GADGET_LH7A40X is not set
1355 +# CONFIG_USB_GADGET_OMAP is not set
1356 +CONFIG_USB_GADGET_S3C2410=y
1357 +CONFIG_USB_S3C2410=y
1358 +# CONFIG_USB_S3C2410_DEBUG is not set
1359 +# CONFIG_USB_GADGET_AT91 is not set
1360 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
1361 +# CONFIG_USB_GADGET_DUALSPEED is not set
1362 +# CONFIG_USB_ZERO is not set
1363 +CONFIG_USB_ETH=y
1364 +CONFIG_USB_ETH_RNDIS=y
1365 +# CONFIG_USB_GADGETFS is not set
1366 +# CONFIG_USB_FILE_STORAGE is not set
1367 +# CONFIG_USB_G_SERIAL is not set
1368 +CONFIG_USB_MIDI_GADGET=m
1369 +
1370 +#
1371 +# SDIO support
1372 +#
1373 +# CONFIG_SDIO is not set
1374 +CONFIG_MMC=y
1375 +# CONFIG_MMC_DEBUG is not set
1376 +CONFIG_MMC_UNSAFE_RESUME=y
1377 +
1378 +#
1379 +# MMC/SD Card Drivers
1380 +#
1381 +CONFIG_MMC_BLOCK=y
1382 +CONFIG_MMC_BLOCK_BOUNCE=y
1383 +CONFIG_SDIO_UART=m
1384 +
1385 +#
1386 +# MMC/SD Host Controller Drivers
1387 +#
1388 +# CONFIG_MMC_SPI is not set
1389 +CONFIG_MMC_S3C=y
1390 +CONFIG_NEW_LEDS=y
1391 +CONFIG_LEDS_CLASS=y
1392 +
1393 +#
1394 +# LED drivers
1395 +#
1396 +CONFIG_LEDS_S3C24XX=m
1397 +# CONFIG_LEDS_GPIO is not set
1398 +
1399 +#
1400 +# LED Triggers
1401 +#
1402 +CONFIG_LEDS_TRIGGERS=y
1403 +CONFIG_LEDS_TRIGGER_TIMER=y
1404 +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1405 +CONFIG_RTC_LIB=y
1406 +CONFIG_RTC_CLASS=y
1407 +CONFIG_RTC_HCTOSYS=y
1408 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1409 +CONFIG_RTC_DEBUG=y
1410 +
1411 +#
1412 +# RTC interfaces
1413 +#
1414 +CONFIG_RTC_INTF_SYSFS=y
1415 +CONFIG_RTC_INTF_PROC=y
1416 +CONFIG_RTC_INTF_DEV=y
1417 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1418 +# CONFIG_RTC_DRV_TEST is not set
1419 +
1420 +#
1421 +# I2C RTC drivers
1422 +#
1423 +# CONFIG_RTC_DRV_DS1307 is not set
1424 +# CONFIG_RTC_DRV_DS1374 is not set
1425 +# CONFIG_RTC_DRV_DS1672 is not set
1426 +# CONFIG_RTC_DRV_MAX6900 is not set
1427 +# CONFIG_RTC_DRV_RS5C372 is not set
1428 +# CONFIG_RTC_DRV_ISL1208 is not set
1429 +# CONFIG_RTC_DRV_X1205 is not set
1430 +# CONFIG_RTC_DRV_PCF8563 is not set
1431 +# CONFIG_RTC_DRV_PCF8583 is not set
1432 +# CONFIG_RTC_DRV_M41T80 is not set
1433 +
1434 +#
1435 +# SPI RTC drivers
1436 +#
1437 +# CONFIG_RTC_DRV_RS5C348 is not set
1438 +# CONFIG_RTC_DRV_MAX6902 is not set
1439 +
1440 +#
1441 +# Platform RTC drivers
1442 +#
1443 +# CONFIG_RTC_DRV_CMOS is not set
1444 +# CONFIG_RTC_DRV_DS1553 is not set
1445 +# CONFIG_RTC_DRV_STK17TA8 is not set
1446 +# CONFIG_RTC_DRV_DS1742 is not set
1447 +# CONFIG_RTC_DRV_M48T86 is not set
1448 +# CONFIG_RTC_DRV_M48T59 is not set
1449 +# CONFIG_RTC_DRV_V3020 is not set
1450 +
1451 +#
1452 +# on-CPU RTC drivers
1453 +#
1454 +CONFIG_RTC_DRV_S3C=m
1455 +
1456 +#
1457 +# File systems
1458 +#
1459 +CONFIG_EXT2_FS=y
1460 +# CONFIG_EXT2_FS_XATTR is not set
1461 +# CONFIG_EXT2_FS_XIP is not set
1462 +CONFIG_EXT3_FS=y
1463 +# CONFIG_EXT3_FS_XATTR is not set
1464 +# CONFIG_EXT4DEV_FS is not set
1465 +CONFIG_JBD=y
1466 +# CONFIG_REISERFS_FS is not set
1467 +# CONFIG_JFS_FS is not set
1468 +CONFIG_FS_POSIX_ACL=y
1469 +# CONFIG_XFS_FS is not set
1470 +# CONFIG_GFS2_FS is not set
1471 +# CONFIG_OCFS2_FS is not set
1472 +# CONFIG_MINIX_FS is not set
1473 +CONFIG_ROMFS_FS=y
1474 +CONFIG_INOTIFY=y
1475 +CONFIG_INOTIFY_USER=y
1476 +# CONFIG_QUOTA is not set
1477 +CONFIG_DNOTIFY=y
1478 +# CONFIG_AUTOFS_FS is not set
1479 +CONFIG_AUTOFS4_FS=m
1480 +CONFIG_FUSE_FS=m
1481 +
1482 +#
1483 +# CD-ROM/DVD Filesystems
1484 +#
1485 +CONFIG_ISO9660_FS=m
1486 +CONFIG_JOLIET=y
1487 +# CONFIG_ZISOFS is not set
1488 +CONFIG_UDF_FS=m
1489 +CONFIG_UDF_NLS=y
1490 +
1491 +#
1492 +# DOS/FAT/NT Filesystems
1493 +#
1494 +CONFIG_FAT_FS=y
1495 +CONFIG_MSDOS_FS=y
1496 +CONFIG_VFAT_FS=y
1497 +CONFIG_FAT_DEFAULT_CODEPAGE=437
1498 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1499 +# CONFIG_NTFS_FS is not set
1500 +
1501 +#
1502 +# Pseudo filesystems
1503 +#
1504 +CONFIG_PROC_FS=y
1505 +CONFIG_PROC_SYSCTL=y
1506 +CONFIG_SYSFS=y
1507 +CONFIG_TMPFS=y
1508 +# CONFIG_TMPFS_POSIX_ACL is not set
1509 +# CONFIG_HUGETLB_PAGE is not set
1510 +CONFIG_CONFIGFS_FS=m
1511 +
1512 +#
1513 +# Miscellaneous filesystems
1514 +#
1515 +# CONFIG_ADFS_FS is not set
1516 +# CONFIG_AFFS_FS is not set
1517 +# CONFIG_HFS_FS is not set
1518 +# CONFIG_HFSPLUS_FS is not set
1519 +# CONFIG_BEFS_FS is not set
1520 +# CONFIG_BFS_FS is not set
1521 +# CONFIG_EFS_FS is not set
1522 +CONFIG_JFFS2_FS=y
1523 +CONFIG_JFFS2_FS_DEBUG=0
1524 +CONFIG_JFFS2_FS_WRITEBUFFER=y
1525 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1526 +CONFIG_JFFS2_SUMMARY=y
1527 +# CONFIG_JFFS2_FS_XATTR is not set
1528 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1529 +CONFIG_JFFS2_ZLIB=y
1530 +# CONFIG_JFFS2_LZO is not set
1531 +CONFIG_JFFS2_RTIME=y
1532 +# CONFIG_JFFS2_RUBIN is not set
1533 +CONFIG_CRAMFS=y
1534 +# CONFIG_VXFS_FS is not set
1535 +# CONFIG_HPFS_FS is not set
1536 +# CONFIG_QNX4FS_FS is not set
1537 +# CONFIG_SYSV_FS is not set
1538 +# CONFIG_UFS_FS is not set
1539 +CONFIG_NETWORK_FILESYSTEMS=y
1540 +CONFIG_NFS_FS=y
1541 +CONFIG_NFS_V3=y
1542 +# CONFIG_NFS_V3_ACL is not set
1543 +CONFIG_NFS_V4=y
1544 +# CONFIG_NFS_DIRECTIO is not set
1545 +CONFIG_NFSD=m
1546 +CONFIG_NFSD_V3=y
1547 +# CONFIG_NFSD_V3_ACL is not set
1548 +CONFIG_NFSD_V4=y
1549 +CONFIG_NFSD_TCP=y
1550 +CONFIG_ROOT_NFS=y
1551 +CONFIG_LOCKD=y
1552 +CONFIG_LOCKD_V4=y
1553 +CONFIG_EXPORTFS=m
1554 +CONFIG_NFS_COMMON=y
1555 +CONFIG_SUNRPC=y
1556 +CONFIG_SUNRPC_GSS=y
1557 +# CONFIG_SUNRPC_BIND34 is not set
1558 +CONFIG_RPCSEC_GSS_KRB5=y
1559 +# CONFIG_RPCSEC_GSS_SPKM3 is not set
1560 +# CONFIG_SMB_FS is not set
1561 +CONFIG_CIFS=m
1562 +# CONFIG_CIFS_STATS is not set
1563 +CONFIG_CIFS_WEAK_PW_HASH=y
1564 +# CONFIG_CIFS_XATTR is not set
1565 +# CONFIG_CIFS_DEBUG2 is not set
1566 +# CONFIG_CIFS_EXPERIMENTAL is not set
1567 +# CONFIG_NCP_FS is not set
1568 +# CONFIG_CODA_FS is not set
1569 +# CONFIG_AFS_FS is not set
1570 +
1571 +#
1572 +# Partition Types
1573 +#
1574 +# CONFIG_PARTITION_ADVANCED is not set
1575 +CONFIG_MSDOS_PARTITION=y
1576 +CONFIG_NLS=y
1577 +CONFIG_NLS_DEFAULT="iso8859-1"
1578 +CONFIG_NLS_CODEPAGE_437=y
1579 +# CONFIG_NLS_CODEPAGE_737 is not set
1580 +# CONFIG_NLS_CODEPAGE_775 is not set
1581 +CONFIG_NLS_CODEPAGE_850=m
1582 +# CONFIG_NLS_CODEPAGE_852 is not set
1583 +# CONFIG_NLS_CODEPAGE_855 is not set
1584 +# CONFIG_NLS_CODEPAGE_857 is not set
1585 +# CONFIG_NLS_CODEPAGE_860 is not set
1586 +# CONFIG_NLS_CODEPAGE_861 is not set
1587 +# CONFIG_NLS_CODEPAGE_862 is not set
1588 +# CONFIG_NLS_CODEPAGE_863 is not set
1589 +# CONFIG_NLS_CODEPAGE_864 is not set
1590 +# CONFIG_NLS_CODEPAGE_865 is not set
1591 +# CONFIG_NLS_CODEPAGE_866 is not set
1592 +# CONFIG_NLS_CODEPAGE_869 is not set
1593 +CONFIG_NLS_CODEPAGE_936=m
1594 +CONFIG_NLS_CODEPAGE_950=m
1595 +# CONFIG_NLS_CODEPAGE_932 is not set
1596 +# CONFIG_NLS_CODEPAGE_949 is not set
1597 +# CONFIG_NLS_CODEPAGE_874 is not set
1598 +# CONFIG_NLS_ISO8859_8 is not set
1599 +# CONFIG_NLS_CODEPAGE_1250 is not set
1600 +# CONFIG_NLS_CODEPAGE_1251 is not set
1601 +# CONFIG_NLS_ASCII is not set
1602 +CONFIG_NLS_ISO8859_1=y
1603 +# CONFIG_NLS_ISO8859_2 is not set
1604 +# CONFIG_NLS_ISO8859_3 is not set
1605 +# CONFIG_NLS_ISO8859_4 is not set
1606 +# CONFIG_NLS_ISO8859_5 is not set
1607 +# CONFIG_NLS_ISO8859_6 is not set
1608 +# CONFIG_NLS_ISO8859_7 is not set
1609 +# CONFIG_NLS_ISO8859_9 is not set
1610 +# CONFIG_NLS_ISO8859_13 is not set
1611 +# CONFIG_NLS_ISO8859_14 is not set
1612 +# CONFIG_NLS_ISO8859_15 is not set
1613 +# CONFIG_NLS_KOI8_R is not set
1614 +# CONFIG_NLS_KOI8_U is not set
1615 +CONFIG_NLS_UTF8=m
1616 +# CONFIG_DLM is not set
1617 +CONFIG_INSTRUMENTATION=y
1618 +CONFIG_PROFILING=y
1619 +CONFIG_OPROFILE=m
1620 +# CONFIG_MARKERS is not set
1621 +
1622 +#
1623 +# Kernel hacking
1624 +#
1625 +# CONFIG_PRINTK_TIME is not set
1626 +CONFIG_ENABLE_WARN_DEPRECATED=y
1627 +CONFIG_ENABLE_MUST_CHECK=y
1628 +CONFIG_MAGIC_SYSRQ=y
1629 +# CONFIG_UNUSED_SYMBOLS is not set
1630 +# CONFIG_DEBUG_FS is not set
1631 +# CONFIG_HEADERS_CHECK is not set
1632 +CONFIG_DEBUG_KERNEL=y
1633 +# CONFIG_DEBUG_SHIRQ is not set
1634 +CONFIG_DETECT_SOFTLOCKUP=y
1635 +# CONFIG_SCHED_DEBUG is not set
1636 +# CONFIG_SCHEDSTATS is not set
1637 +CONFIG_TIMER_STATS=y
1638 +# CONFIG_DEBUG_SLAB is not set
1639 +CONFIG_DEBUG_PREEMPT=y
1640 +# CONFIG_DEBUG_RT_MUTEXES is not set
1641 +# CONFIG_RT_MUTEX_TESTER is not set
1642 +# CONFIG_DEBUG_SPINLOCK is not set
1643 +# CONFIG_DEBUG_MUTEXES is not set
1644 +# CONFIG_DEBUG_LOCK_ALLOC is not set
1645 +# CONFIG_PROVE_LOCKING is not set
1646 +# CONFIG_LOCK_STAT is not set
1647 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1648 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1649 +# CONFIG_DEBUG_KOBJECT is not set
1650 +CONFIG_DEBUG_BUGVERBOSE=y
1651 +CONFIG_DEBUG_INFO=y
1652 +# CONFIG_DEBUG_VM is not set
1653 +# CONFIG_DEBUG_LIST is not set
1654 +# CONFIG_DEBUG_SG is not set
1655 +CONFIG_FRAME_POINTER=y
1656 +CONFIG_FORCED_INLINING=y
1657 +# CONFIG_BOOT_PRINTK_DELAY is not set
1658 +# CONFIG_RCU_TORTURE_TEST is not set
1659 +# CONFIG_FAULT_INJECTION is not set
1660 +# CONFIG_SAMPLES is not set
1661 +# CONFIG_DEBUG_USER is not set
1662 +CONFIG_DEBUG_ERRORS=y
1663 +# CONFIG_DEBUG_LL is not set
1664 +CONFIG_DEBUG_S3C_UART=2
1665 +
1666 +#
1667 +# Security options
1668 +#
1669 +# CONFIG_KEYS is not set
1670 +# CONFIG_SECURITY is not set
1671 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1672 +CONFIG_CRYPTO=y
1673 +CONFIG_CRYPTO_ALGAPI=y
1674 +CONFIG_CRYPTO_BLKCIPHER=y
1675 +CONFIG_CRYPTO_HASH=y
1676 +CONFIG_CRYPTO_MANAGER=y
1677 +CONFIG_CRYPTO_HMAC=y
1678 +CONFIG_CRYPTO_XCBC=m
1679 +CONFIG_CRYPTO_NULL=m
1680 +CONFIG_CRYPTO_MD4=m
1681 +CONFIG_CRYPTO_MD5=y
1682 +CONFIG_CRYPTO_SHA1=m
1683 +CONFIG_CRYPTO_SHA256=m
1684 +CONFIG_CRYPTO_SHA512=m
1685 +CONFIG_CRYPTO_WP512=m
1686 +CONFIG_CRYPTO_TGR192=m
1687 +CONFIG_CRYPTO_GF128MUL=m
1688 +CONFIG_CRYPTO_ECB=m
1689 +CONFIG_CRYPTO_CBC=y
1690 +CONFIG_CRYPTO_PCBC=m
1691 +CONFIG_CRYPTO_LRW=m
1692 +# CONFIG_CRYPTO_XTS is not set
1693 +# CONFIG_CRYPTO_CRYPTD is not set
1694 +CONFIG_CRYPTO_DES=y
1695 +CONFIG_CRYPTO_FCRYPT=m
1696 +CONFIG_CRYPTO_BLOWFISH=m
1697 +CONFIG_CRYPTO_TWOFISH=m
1698 +CONFIG_CRYPTO_TWOFISH_COMMON=m
1699 +CONFIG_CRYPTO_SERPENT=m
1700 +CONFIG_CRYPTO_AES=m
1701 +CONFIG_CRYPTO_CAST5=m
1702 +CONFIG_CRYPTO_CAST6=m
1703 +CONFIG_CRYPTO_TEA=m
1704 +CONFIG_CRYPTO_ARC4=m
1705 +CONFIG_CRYPTO_KHAZAD=m
1706 +CONFIG_CRYPTO_ANUBIS=m
1707 +# CONFIG_CRYPTO_SEED is not set
1708 +CONFIG_CRYPTO_DEFLATE=m
1709 +CONFIG_CRYPTO_MICHAEL_MIC=m
1710 +CONFIG_CRYPTO_CRC32C=m
1711 +CONFIG_CRYPTO_CAMELLIA=m
1712 +CONFIG_CRYPTO_TEST=m
1713 +# CONFIG_CRYPTO_AUTHENC is not set
1714 +CONFIG_CRYPTO_HW=y
1715 +
1716 +#
1717 +# Library routines
1718 +#
1719 +CONFIG_BITREVERSE=y
1720 +CONFIG_CRC_CCITT=m
1721 +CONFIG_CRC16=m
1722 +# CONFIG_CRC_ITU_T is not set
1723 +CONFIG_CRC32=y
1724 +# CONFIG_CRC7 is not set
1725 +CONFIG_LIBCRC32C=m
1726 +CONFIG_ZLIB_INFLATE=y
1727 +CONFIG_ZLIB_DEFLATE=y
1728 +CONFIG_TEXTSEARCH=y
1729 +CONFIG_TEXTSEARCH_KMP=m
1730 +CONFIG_TEXTSEARCH_BM=m
1731 +CONFIG_TEXTSEARCH_FSM=m
1732 +CONFIG_PLIST=y
1733 +CONFIG_HAS_IOMEM=y
1734 Index: linux-2.6.24.7/arch/arm/configs/gta02-moredrivers-defconfig
1735 ===================================================================
1736 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
1737 +++ linux-2.6.24.7/arch/arm/configs/gta02-moredrivers-defconfig 2008-12-11 22:46:48.000000000 +0100
1738 @@ -0,0 +1,1833 @@
1739 +#
1740 +# Automatically generated make config: don't edit
1741 +# Linux kernel version: 2.6.24
1742 +# Sat Mar  1 11:36:29 2008
1743 +#
1744 +CONFIG_ARM=y
1745 +CONFIG_SYS_SUPPORTS_APM_EMULATION=y
1746 +CONFIG_GENERIC_GPIO=y
1747 +# CONFIG_GENERIC_TIME is not set
1748 +# CONFIG_GENERIC_CLOCKEVENTS is not set
1749 +CONFIG_MMU=y
1750 +CONFIG_NO_IOPORT=y
1751 +CONFIG_GENERIC_HARDIRQS=y
1752 +CONFIG_STACKTRACE_SUPPORT=y
1753 +CONFIG_LOCKDEP_SUPPORT=y
1754 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1755 +CONFIG_HARDIRQS_SW_RESEND=y
1756 +CONFIG_GENERIC_IRQ_PROBE=y
1757 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
1758 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
1759 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
1760 +CONFIG_GENERIC_HWEIGHT=y
1761 +CONFIG_GENERIC_CALIBRATE_DELAY=y
1762 +CONFIG_ZONE_DMA=y
1763 +CONFIG_FIQ=y
1764 +CONFIG_VECTORS_BASE=0xffff0000
1765 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1766 +
1767 +#
1768 +# General setup
1769 +#
1770 +CONFIG_EXPERIMENTAL=y
1771 +CONFIG_BROKEN_ON_SMP=y
1772 +CONFIG_LOCK_KERNEL=y
1773 +CONFIG_INIT_ENV_ARG_LIMIT=32
1774 +CONFIG_LOCALVERSION="-mokodev"
1775 +# CONFIG_LOCALVERSION_AUTO is not set
1776 +CONFIG_SWAP=y
1777 +CONFIG_SYSVIPC=y
1778 +CONFIG_SYSVIPC_SYSCTL=y
1779 +# CONFIG_POSIX_MQUEUE is not set
1780 +# CONFIG_BSD_PROCESS_ACCT is not set
1781 +# CONFIG_TASKSTATS is not set
1782 +# CONFIG_USER_NS is not set
1783 +# CONFIG_PID_NS is not set
1784 +# CONFIG_AUDIT is not set
1785 +CONFIG_IKCONFIG=y
1786 +CONFIG_IKCONFIG_PROC=y
1787 +CONFIG_LOG_BUF_SHIFT=16
1788 +# CONFIG_CGROUPS is not set
1789 +CONFIG_FAIR_GROUP_SCHED=y
1790 +CONFIG_FAIR_USER_SCHED=y
1791 +# CONFIG_FAIR_CGROUP_SCHED is not set
1792 +# CONFIG_SYSFS_DEPRECATED is not set
1793 +# CONFIG_RELAY is not set
1794 +CONFIG_BLK_DEV_INITRD=y
1795 +CONFIG_INITRAMFS_SOURCE=""
1796 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
1797 +CONFIG_SYSCTL=y
1798 +# CONFIG_EMBEDDED is not set
1799 +CONFIG_UID16=y
1800 +CONFIG_SYSCTL_SYSCALL=y
1801 +CONFIG_KALLSYMS=y
1802 +CONFIG_KALLSYMS_ALL=y
1803 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
1804 +CONFIG_HOTPLUG=y
1805 +CONFIG_PRINTK=y
1806 +CONFIG_BUG=y
1807 +CONFIG_ELF_CORE=y
1808 +CONFIG_BASE_FULL=y
1809 +CONFIG_FUTEX=y
1810 +CONFIG_ANON_INODES=y
1811 +CONFIG_EPOLL=y
1812 +CONFIG_SIGNALFD=y
1813 +CONFIG_EVENTFD=y
1814 +CONFIG_SHMEM=y
1815 +CONFIG_VM_EVENT_COUNTERS=y
1816 +CONFIG_SLAB=y
1817 +# CONFIG_SLUB is not set
1818 +# CONFIG_SLOB is not set
1819 +CONFIG_SLABINFO=y
1820 +CONFIG_RT_MUTEXES=y
1821 +# CONFIG_TINY_SHMEM is not set
1822 +CONFIG_BASE_SMALL=0
1823 +CONFIG_MODULES=y
1824 +CONFIG_MODULE_UNLOAD=y
1825 +CONFIG_MODULE_FORCE_UNLOAD=y
1826 +# CONFIG_MODVERSIONS is not set
1827 +# CONFIG_MODULE_SRCVERSION_ALL is not set
1828 +CONFIG_KMOD=y
1829 +CONFIG_BLOCK=y
1830 +# CONFIG_LBD is not set
1831 +# CONFIG_BLK_DEV_IO_TRACE is not set
1832 +# CONFIG_LSF is not set
1833 +# CONFIG_BLK_DEV_BSG is not set
1834 +
1835 +#
1836 +# IO Schedulers
1837 +#
1838 +CONFIG_IOSCHED_NOOP=y
1839 +CONFIG_IOSCHED_AS=m
1840 +CONFIG_IOSCHED_DEADLINE=y
1841 +CONFIG_IOSCHED_CFQ=m
1842 +# CONFIG_DEFAULT_AS is not set
1843 +CONFIG_DEFAULT_DEADLINE=y
1844 +# CONFIG_DEFAULT_CFQ is not set
1845 +# CONFIG_DEFAULT_NOOP is not set
1846 +CONFIG_DEFAULT_IOSCHED="deadline"
1847 +
1848 +#
1849 +# System Type
1850 +#
1851 +# CONFIG_ARCH_AAEC2000 is not set
1852 +# CONFIG_ARCH_INTEGRATOR is not set
1853 +# CONFIG_ARCH_REALVIEW is not set
1854 +# CONFIG_ARCH_VERSATILE is not set
1855 +# CONFIG_ARCH_AT91 is not set
1856 +# CONFIG_ARCH_CLPS7500 is not set
1857 +# CONFIG_ARCH_CLPS711X is not set
1858 +# CONFIG_ARCH_CO285 is not set
1859 +# CONFIG_ARCH_EBSA110 is not set
1860 +# CONFIG_ARCH_EP93XX is not set
1861 +# CONFIG_ARCH_FOOTBRIDGE is not set
1862 +# CONFIG_ARCH_NETX is not set
1863 +# CONFIG_ARCH_H720X is not set
1864 +# CONFIG_ARCH_IMX is not set
1865 +# CONFIG_ARCH_IOP13XX is not set
1866 +# CONFIG_ARCH_IOP32X is not set
1867 +# CONFIG_ARCH_IOP33X is not set
1868 +# CONFIG_ARCH_IXP23XX is not set
1869 +# CONFIG_ARCH_IXP2000 is not set
1870 +# CONFIG_ARCH_IXP4XX is not set
1871 +# CONFIG_ARCH_L7200 is not set
1872 +# CONFIG_ARCH_KS8695 is not set
1873 +# CONFIG_ARCH_NS9XXX is not set
1874 +# CONFIG_ARCH_MXC is not set
1875 +# CONFIG_ARCH_PNX4008 is not set
1876 +# CONFIG_ARCH_PXA is not set
1877 +# CONFIG_ARCH_RPC is not set
1878 +# CONFIG_ARCH_SA1100 is not set
1879 +CONFIG_ARCH_S3C2410=y
1880 +# CONFIG_ARCH_SHARK is not set
1881 +# CONFIG_ARCH_LH7A40X is not set
1882 +# CONFIG_ARCH_DAVINCI is not set
1883 +# CONFIG_ARCH_OMAP is not set
1884 +CONFIG_PLAT_S3C24XX=y
1885 +CONFIG_CPU_S3C244X=y
1886 +CONFIG_S3C2410_DMA=y
1887 +# CONFIG_S3C2410_DMA_DEBUG is not set
1888 +CONFIG_MACH_SMDK=y
1889 +CONFIG_MACH_NEO1973=y
1890 +CONFIG_PLAT_S3C=y
1891 +CONFIG_CPU_LLSERIAL_S3C2410=y
1892 +CONFIG_CPU_LLSERIAL_S3C2440=y
1893 +
1894 +#
1895 +# Boot options
1896 +#
1897 +# CONFIG_S3C_BOOT_WATCHDOG is not set
1898 +# CONFIG_S3C_BOOT_ERROR_RESET is not set
1899 +
1900 +#
1901 +# Power management
1902 +#
1903 +# CONFIG_S3C2410_PM_DEBUG is not set
1904 +# CONFIG_S3C2410_PM_CHECK is not set
1905 +CONFIG_S3C_LOWLEVEL_UART_PORT=2
1906 +
1907 +#
1908 +# S3C2400 Machines
1909 +#
1910 +CONFIG_CPU_S3C2410=y
1911 +CONFIG_CPU_S3C2410_DMA=y
1912 +CONFIG_S3C2410_PM=y
1913 +CONFIG_S3C2410_GPIO=y
1914 +CONFIG_S3C2410_CLOCK=y
1915 +CONFIG_S3C2410_PWM=y
1916 +
1917 +#
1918 +# S3C2410 Machines
1919 +#
1920 +# CONFIG_ARCH_SMDK2410 is not set
1921 +# CONFIG_ARCH_H1940 is not set
1922 +# CONFIG_MACH_N30 is not set
1923 +# CONFIG_ARCH_BAST is not set
1924 +# CONFIG_MACH_OTOM is not set
1925 +# CONFIG_MACH_AML_M5900 is not set
1926 +# CONFIG_MACH_VR1000 is not set
1927 +CONFIG_MACH_QT2410=y
1928 +CONFIG_MACH_NEO1973_GTA01=y
1929 +
1930 +#
1931 +# S3C2412 Machines
1932 +#
1933 +# CONFIG_MACH_SMDK2413 is not set
1934 +# CONFIG_MACH_SMDK2412 is not set
1935 +# CONFIG_MACH_VSTMS is not set
1936 +CONFIG_CPU_S3C2440=y
1937 +CONFIG_S3C2440_DMA=y
1938 +CONFIG_S3C2440_C_FIQ=y
1939 +
1940 +#
1941 +# S3C2440 Machines
1942 +#
1943 +# CONFIG_MACH_ANUBIS is not set
1944 +# CONFIG_MACH_OSIRIS is not set
1945 +# CONFIG_MACH_RX3715 is not set
1946 +CONFIG_ARCH_S3C2440=y
1947 +# CONFIG_MACH_NEXCODER_2440 is not set
1948 +CONFIG_SMDK2440_CPU2440=y
1949 +CONFIG_MACH_HXD8=y
1950 +CONFIG_MACH_NEO1973_GTA02=y
1951 +# CONFIG_NEO1973_GTA02_2440 is not set
1952 +CONFIG_CPU_S3C2442=y
1953 +
1954 +#
1955 +# S3C2442 Machines
1956 +#
1957 +CONFIG_SMDK2440_CPU2442=y
1958 +
1959 +#
1960 +# S3C2443 Machines
1961 +#
1962 +# CONFIG_MACH_SMDK2443 is not set
1963 +
1964 +#
1965 +# Processor Type
1966 +#
1967 +CONFIG_CPU_32=y
1968 +CONFIG_CPU_ARM920T=y
1969 +CONFIG_CPU_32v4T=y
1970 +CONFIG_CPU_ABRT_EV4T=y
1971 +CONFIG_CPU_CACHE_V4WT=y
1972 +CONFIG_CPU_CACHE_VIVT=y
1973 +CONFIG_CPU_COPY_V4WB=y
1974 +CONFIG_CPU_TLB_V4WBI=y
1975 +CONFIG_CPU_CP15=y
1976 +CONFIG_CPU_CP15_MMU=y
1977 +
1978 +#
1979 +# Processor Features
1980 +#
1981 +CONFIG_ARM_THUMB=y
1982 +# CONFIG_CPU_ICACHE_DISABLE is not set
1983 +# CONFIG_CPU_DCACHE_DISABLE is not set
1984 +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
1985 +# CONFIG_OUTER_CACHE is not set
1986 +
1987 +#
1988 +# Bus support
1989 +#
1990 +# CONFIG_PCI_SYSCALL is not set
1991 +# CONFIG_ARCH_SUPPORTS_MSI is not set
1992 +# CONFIG_PCCARD is not set
1993 +
1994 +#
1995 +# Kernel Features
1996 +#
1997 +# CONFIG_TICK_ONESHOT is not set
1998 +CONFIG_PREEMPT=y
1999 +CONFIG_NO_IDLE_HZ=y
2000 +CONFIG_HZ=200
2001 +CONFIG_AEABI=y
2002 +CONFIG_OABI_COMPAT=y
2003 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
2004 +CONFIG_SELECT_MEMORY_MODEL=y
2005 +CONFIG_FLATMEM_MANUAL=y
2006 +# CONFIG_DISCONTIGMEM_MANUAL is not set
2007 +# CONFIG_SPARSEMEM_MANUAL is not set
2008 +CONFIG_FLATMEM=y
2009 +CONFIG_FLAT_NODE_MEM_MAP=y
2010 +# CONFIG_SPARSEMEM_STATIC is not set
2011 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
2012 +CONFIG_SPLIT_PTLOCK_CPUS=4096
2013 +# CONFIG_RESOURCES_64BIT is not set
2014 +CONFIG_ZONE_DMA_FLAG=1
2015 +CONFIG_BOUNCE=y
2016 +CONFIG_VIRT_TO_BUS=y
2017 +CONFIG_ALIGNMENT_TRAP=y
2018 +
2019 +#
2020 +# Boot options
2021 +#
2022 +CONFIG_ZBOOT_ROM_TEXT=0x0
2023 +CONFIG_ZBOOT_ROM_BSS=0x0
2024 +CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
2025 +# CONFIG_XIP_KERNEL is not set
2026 +CONFIG_KEXEC=y
2027 +CONFIG_ATAGS_PROC=y
2028 +
2029 +#
2030 +# Floating point emulation
2031 +#
2032 +
2033 +#
2034 +# At least one emulation must be selected
2035 +#
2036 +CONFIG_FPE_NWFPE=y
2037 +# CONFIG_FPE_NWFPE_XP is not set
2038 +# CONFIG_FPE_FASTFPE is not set
2039 +
2040 +#
2041 +# Userspace binary formats
2042 +#
2043 +CONFIG_BINFMT_ELF=y
2044 +# CONFIG_BINFMT_AOUT is not set
2045 +# CONFIG_BINFMT_MISC is not set
2046 +
2047 +#
2048 +# Power management options
2049 +#
2050 +CONFIG_PM=y
2051 +CONFIG_PM_LEGACY=y
2052 +CONFIG_PM_DEBUG=y
2053 +CONFIG_PM_VERBOSE=y
2054 +CONFIG_PM_SLEEP=y
2055 +CONFIG_SUSPEND_UP_POSSIBLE=y
2056 +CONFIG_SUSPEND=y
2057 +CONFIG_APM_EMULATION=y
2058 +
2059 +#
2060 +# Networking
2061 +#
2062 +CONFIG_NET=y
2063 +
2064 +#
2065 +# Networking options
2066 +#
2067 +CONFIG_PACKET=y
2068 +CONFIG_PACKET_MMAP=y
2069 +CONFIG_UNIX=y
2070 +CONFIG_XFRM=y
2071 +# CONFIG_XFRM_USER is not set
2072 +# CONFIG_XFRM_SUB_POLICY is not set
2073 +CONFIG_XFRM_MIGRATE=y
2074 +CONFIG_NET_KEY=m
2075 +CONFIG_NET_KEY_MIGRATE=y
2076 +CONFIG_INET=y
2077 +CONFIG_IP_MULTICAST=y
2078 +CONFIG_IP_ADVANCED_ROUTER=y
2079 +CONFIG_ASK_IP_FIB_HASH=y
2080 +# CONFIG_IP_FIB_TRIE is not set
2081 +CONFIG_IP_FIB_HASH=y
2082 +CONFIG_IP_MULTIPLE_TABLES=y
2083 +# CONFIG_IP_ROUTE_MULTIPATH is not set
2084 +# CONFIG_IP_ROUTE_VERBOSE is not set
2085 +CONFIG_IP_PNP=y
2086 +# CONFIG_IP_PNP_DHCP is not set
2087 +# CONFIG_IP_PNP_BOOTP is not set
2088 +# CONFIG_IP_PNP_RARP is not set
2089 +CONFIG_NET_IPIP=m
2090 +CONFIG_NET_IPGRE=m
2091 +# CONFIG_NET_IPGRE_BROADCAST is not set
2092 +# CONFIG_IP_MROUTE is not set
2093 +# CONFIG_ARPD is not set
2094 +CONFIG_SYN_COOKIES=y
2095 +CONFIG_INET_AH=m
2096 +CONFIG_INET_ESP=m
2097 +CONFIG_INET_IPCOMP=m
2098 +CONFIG_INET_XFRM_TUNNEL=m
2099 +CONFIG_INET_TUNNEL=m
2100 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
2101 +CONFIG_INET_XFRM_MODE_TUNNEL=m
2102 +CONFIG_INET_XFRM_MODE_BEET=m
2103 +# CONFIG_INET_LRO is not set
2104 +CONFIG_INET_DIAG=y
2105 +CONFIG_INET_TCP_DIAG=y
2106 +# CONFIG_TCP_CONG_ADVANCED is not set
2107 +CONFIG_TCP_CONG_CUBIC=y
2108 +CONFIG_DEFAULT_TCP_CONG="cubic"
2109 +CONFIG_TCP_MD5SIG=y
2110 +# CONFIG_IP_VS is not set
2111 +CONFIG_IPV6=m
2112 +# CONFIG_IPV6_PRIVACY is not set
2113 +# CONFIG_IPV6_ROUTER_PREF is not set
2114 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
2115 +CONFIG_INET6_AH=m
2116 +CONFIG_INET6_ESP=m
2117 +CONFIG_INET6_IPCOMP=m
2118 +# CONFIG_IPV6_MIP6 is not set
2119 +CONFIG_INET6_XFRM_TUNNEL=m
2120 +CONFIG_INET6_TUNNEL=m
2121 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
2122 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
2123 +CONFIG_INET6_XFRM_MODE_BEET=m
2124 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
2125 +CONFIG_IPV6_SIT=m
2126 +CONFIG_IPV6_TUNNEL=m
2127 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
2128 +# CONFIG_NETWORK_SECMARK is not set
2129 +CONFIG_NETFILTER=y
2130 +# CONFIG_NETFILTER_DEBUG is not set
2131 +CONFIG_BRIDGE_NETFILTER=y
2132 +
2133 +#
2134 +# Core Netfilter Configuration
2135 +#
2136 +CONFIG_NETFILTER_NETLINK=m
2137 +CONFIG_NETFILTER_NETLINK_QUEUE=m
2138 +CONFIG_NETFILTER_NETLINK_LOG=m
2139 +CONFIG_NF_CONNTRACK_ENABLED=m
2140 +CONFIG_NF_CONNTRACK=m
2141 +CONFIG_NF_CT_ACCT=y
2142 +CONFIG_NF_CONNTRACK_MARK=y
2143 +CONFIG_NF_CONNTRACK_EVENTS=y
2144 +CONFIG_NF_CT_PROTO_GRE=m
2145 +CONFIG_NF_CT_PROTO_SCTP=m
2146 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
2147 +# CONFIG_NF_CONNTRACK_AMANDA is not set
2148 +CONFIG_NF_CONNTRACK_FTP=m
2149 +CONFIG_NF_CONNTRACK_H323=m
2150 +CONFIG_NF_CONNTRACK_IRC=m
2151 +CONFIG_NF_CONNTRACK_NETBIOS_NS=m
2152 +CONFIG_NF_CONNTRACK_PPTP=m
2153 +CONFIG_NF_CONNTRACK_SANE=m
2154 +CONFIG_NF_CONNTRACK_SIP=m
2155 +CONFIG_NF_CONNTRACK_TFTP=m
2156 +CONFIG_NF_CT_NETLINK=m
2157 +CONFIG_NETFILTER_XTABLES=m
2158 +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
2159 +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
2160 +CONFIG_NETFILTER_XT_TARGET_DSCP=m
2161 +CONFIG_NETFILTER_XT_TARGET_MARK=m
2162 +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
2163 +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
2164 +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
2165 +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
2166 +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
2167 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
2168 +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
2169 +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
2170 +CONFIG_NETFILTER_XT_MATCH_DCCP=m
2171 +CONFIG_NETFILTER_XT_MATCH_DSCP=m
2172 +CONFIG_NETFILTER_XT_MATCH_ESP=m
2173 +CONFIG_NETFILTER_XT_MATCH_HELPER=m
2174 +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
2175 +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
2176 +CONFIG_NETFILTER_XT_MATCH_MAC=m
2177 +CONFIG_NETFILTER_XT_MATCH_MARK=m
2178 +CONFIG_NETFILTER_XT_MATCH_POLICY=m
2179 +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
2180 +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
2181 +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
2182 +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
2183 +CONFIG_NETFILTER_XT_MATCH_REALM=m
2184 +CONFIG_NETFILTER_XT_MATCH_SCTP=m
2185 +CONFIG_NETFILTER_XT_MATCH_STATE=m
2186 +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
2187 +CONFIG_NETFILTER_XT_MATCH_STRING=m
2188 +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
2189 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
2190 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
2191 +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
2192 +
2193 +#
2194 +# IP: Netfilter Configuration
2195 +#
2196 +CONFIG_NF_CONNTRACK_IPV4=m
2197 +CONFIG_NF_CONNTRACK_PROC_COMPAT=y
2198 +# CONFIG_IP_NF_QUEUE is not set
2199 +CONFIG_IP_NF_IPTABLES=m
2200 +CONFIG_IP_NF_MATCH_IPRANGE=m
2201 +CONFIG_IP_NF_MATCH_TOS=m
2202 +# CONFIG_IP_NF_MATCH_RECENT is not set
2203 +CONFIG_IP_NF_MATCH_ECN=m
2204 +CONFIG_IP_NF_MATCH_AH=m
2205 +CONFIG_IP_NF_MATCH_TTL=m
2206 +CONFIG_IP_NF_MATCH_OWNER=m
2207 +CONFIG_IP_NF_MATCH_ADDRTYPE=m
2208 +CONFIG_IP_NF_FILTER=m
2209 +CONFIG_IP_NF_TARGET_REJECT=m
2210 +CONFIG_IP_NF_TARGET_LOG=m
2211 +CONFIG_IP_NF_TARGET_ULOG=m
2212 +CONFIG_NF_NAT=m
2213 +CONFIG_NF_NAT_NEEDED=y
2214 +CONFIG_IP_NF_TARGET_MASQUERADE=m
2215 +CONFIG_IP_NF_TARGET_REDIRECT=m
2216 +CONFIG_IP_NF_TARGET_NETMAP=m
2217 +CONFIG_IP_NF_TARGET_SAME=m
2218 +CONFIG_NF_NAT_SNMP_BASIC=m
2219 +CONFIG_NF_NAT_PROTO_GRE=m
2220 +CONFIG_NF_NAT_FTP=m
2221 +CONFIG_NF_NAT_IRC=m
2222 +CONFIG_NF_NAT_TFTP=m
2223 +# CONFIG_NF_NAT_AMANDA is not set
2224 +CONFIG_NF_NAT_PPTP=m
2225 +CONFIG_NF_NAT_H323=m
2226 +CONFIG_NF_NAT_SIP=m
2227 +CONFIG_IP_NF_MANGLE=m
2228 +CONFIG_IP_NF_TARGET_TOS=m
2229 +CONFIG_IP_NF_TARGET_ECN=m
2230 +CONFIG_IP_NF_TARGET_TTL=m
2231 +CONFIG_IP_NF_TARGET_CLUSTERIP=m
2232 +# CONFIG_IP_NF_RAW is not set
2233 +# CONFIG_IP_NF_ARPTABLES is not set
2234 +
2235 +#
2236 +# IPv6: Netfilter Configuration (EXPERIMENTAL)
2237 +#
2238 +CONFIG_NF_CONNTRACK_IPV6=m
2239 +# CONFIG_IP6_NF_QUEUE is not set
2240 +CONFIG_IP6_NF_IPTABLES=m
2241 +CONFIG_IP6_NF_MATCH_RT=m
2242 +CONFIG_IP6_NF_MATCH_OPTS=m
2243 +CONFIG_IP6_NF_MATCH_FRAG=m
2244 +CONFIG_IP6_NF_MATCH_HL=m
2245 +CONFIG_IP6_NF_MATCH_OWNER=m
2246 +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
2247 +CONFIG_IP6_NF_MATCH_AH=m
2248 +CONFIG_IP6_NF_MATCH_MH=m
2249 +CONFIG_IP6_NF_MATCH_EUI64=m
2250 +CONFIG_IP6_NF_FILTER=m
2251 +CONFIG_IP6_NF_TARGET_LOG=m
2252 +CONFIG_IP6_NF_TARGET_REJECT=m
2253 +CONFIG_IP6_NF_MANGLE=m
2254 +CONFIG_IP6_NF_TARGET_HL=m
2255 +# CONFIG_IP6_NF_RAW is not set
2256 +
2257 +#
2258 +# Bridge: Netfilter Configuration
2259 +#
2260 +CONFIG_BRIDGE_NF_EBTABLES=m
2261 +CONFIG_BRIDGE_EBT_BROUTE=m
2262 +CONFIG_BRIDGE_EBT_T_FILTER=m
2263 +CONFIG_BRIDGE_EBT_T_NAT=m
2264 +CONFIG_BRIDGE_EBT_802_3=m
2265 +CONFIG_BRIDGE_EBT_AMONG=m
2266 +CONFIG_BRIDGE_EBT_ARP=m
2267 +CONFIG_BRIDGE_EBT_IP=m
2268 +CONFIG_BRIDGE_EBT_LIMIT=m
2269 +CONFIG_BRIDGE_EBT_MARK=m
2270 +CONFIG_BRIDGE_EBT_PKTTYPE=m
2271 +CONFIG_BRIDGE_EBT_STP=m
2272 +CONFIG_BRIDGE_EBT_VLAN=m
2273 +CONFIG_BRIDGE_EBT_ARPREPLY=m
2274 +CONFIG_BRIDGE_EBT_DNAT=m
2275 +CONFIG_BRIDGE_EBT_MARK_T=m
2276 +CONFIG_BRIDGE_EBT_REDIRECT=m
2277 +CONFIG_BRIDGE_EBT_SNAT=m
2278 +CONFIG_BRIDGE_EBT_LOG=m
2279 +CONFIG_BRIDGE_EBT_ULOG=m
2280 +# CONFIG_IP_DCCP is not set
2281 +# CONFIG_IP_SCTP is not set
2282 +# CONFIG_TIPC is not set
2283 +# CONFIG_ATM is not set
2284 +CONFIG_BRIDGE=y
2285 +# CONFIG_VLAN_8021Q is not set
2286 +# CONFIG_DECNET is not set
2287 +CONFIG_LLC=y
2288 +# CONFIG_LLC2 is not set
2289 +# CONFIG_IPX is not set
2290 +# CONFIG_ATALK is not set
2291 +# CONFIG_X25 is not set
2292 +# CONFIG_LAPB is not set
2293 +# CONFIG_ECONET is not set
2294 +# CONFIG_WAN_ROUTER is not set
2295 +CONFIG_NET_SCHED=y
2296 +
2297 +#
2298 +# Queueing/Scheduling
2299 +#
2300 +CONFIG_NET_SCH_CBQ=m
2301 +CONFIG_NET_SCH_HTB=m
2302 +CONFIG_NET_SCH_HFSC=m
2303 +CONFIG_NET_SCH_PRIO=m
2304 +# CONFIG_NET_SCH_RR is not set
2305 +CONFIG_NET_SCH_RED=m
2306 +CONFIG_NET_SCH_SFQ=m
2307 +CONFIG_NET_SCH_TEQL=m
2308 +CONFIG_NET_SCH_TBF=m
2309 +CONFIG_NET_SCH_GRED=m
2310 +CONFIG_NET_SCH_DSMARK=m
2311 +CONFIG_NET_SCH_NETEM=m
2312 +CONFIG_NET_SCH_INGRESS=m
2313 +
2314 +#
2315 +# Classification
2316 +#
2317 +CONFIG_NET_CLS=y
2318 +CONFIG_NET_CLS_BASIC=m
2319 +CONFIG_NET_CLS_TCINDEX=m
2320 +CONFIG_NET_CLS_ROUTE4=m
2321 +CONFIG_NET_CLS_ROUTE=y
2322 +CONFIG_NET_CLS_FW=m
2323 +CONFIG_NET_CLS_U32=m
2324 +CONFIG_CLS_U32_PERF=y
2325 +CONFIG_CLS_U32_MARK=y
2326 +CONFIG_NET_CLS_RSVP=m
2327 +CONFIG_NET_CLS_RSVP6=m
2328 +# CONFIG_NET_EMATCH is not set
2329 +# CONFIG_NET_CLS_ACT is not set
2330 +# CONFIG_NET_CLS_POLICE is not set
2331 +# CONFIG_NET_CLS_IND is not set
2332 +CONFIG_NET_SCH_FIFO=y
2333 +
2334 +#
2335 +# Network testing
2336 +#
2337 +# CONFIG_NET_PKTGEN is not set
2338 +# CONFIG_HAMRADIO is not set
2339 +# CONFIG_IRDA is not set
2340 +CONFIG_BT=y
2341 +CONFIG_BT_L2CAP=y
2342 +CONFIG_BT_SCO=y
2343 +CONFIG_BT_RFCOMM=y
2344 +CONFIG_BT_RFCOMM_TTY=y
2345 +CONFIG_BT_BNEP=y
2346 +CONFIG_BT_BNEP_MC_FILTER=y
2347 +CONFIG_BT_BNEP_PROTO_FILTER=y
2348 +CONFIG_BT_HIDP=y
2349 +
2350 +#
2351 +# Bluetooth device drivers
2352 +#
2353 +CONFIG_BT_HCIUSB=y
2354 +CONFIG_BT_HCIUSB_SCO=y
2355 +# CONFIG_BT_HCIBTSDIO is not set
2356 +# CONFIG_BT_HCIUART is not set
2357 +# CONFIG_BT_HCIBCM203X is not set
2358 +# CONFIG_BT_HCIBPA10X is not set
2359 +# CONFIG_BT_HCIBFUSB is not set
2360 +# CONFIG_BT_HCIVHCI is not set
2361 +# CONFIG_AF_RXRPC is not set
2362 +CONFIG_FIB_RULES=y
2363 +
2364 +#
2365 +# Wireless
2366 +#
2367 +# CONFIG_CFG80211 is not set
2368 +CONFIG_WIRELESS_EXT=y
2369 +# CONFIG_MAC80211 is not set
2370 +# CONFIG_IEEE80211 is not set
2371 +# CONFIG_RFKILL is not set
2372 +# CONFIG_NET_9P is not set
2373 +
2374 +#
2375 +# Device Drivers
2376 +#
2377 +
2378 +#
2379 +# Generic Driver Options
2380 +#
2381 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
2382 +CONFIG_STANDALONE=y
2383 +CONFIG_PREVENT_FIRMWARE_BUILD=y
2384 +CONFIG_FW_LOADER=m
2385 +# CONFIG_DEBUG_DRIVER is not set
2386 +# CONFIG_DEBUG_DEVRES is not set
2387 +# CONFIG_SYS_HYPERVISOR is not set
2388 +CONFIG_CONNECTOR=m
2389 +CONFIG_MTD=y
2390 +# CONFIG_MTD_DEBUG is not set
2391 +CONFIG_MTD_CONCAT=y
2392 +CONFIG_MTD_PARTITIONS=y
2393 +# CONFIG_MTD_REDBOOT_PARTS is not set
2394 +CONFIG_MTD_CMDLINE_PARTS=y
2395 +# CONFIG_MTD_AFS_PARTS is not set
2396 +
2397 +#
2398 +# User Modules And Translation Layers
2399 +#
2400 +CONFIG_MTD_CHAR=y
2401 +CONFIG_MTD_BLKDEVS=y
2402 +CONFIG_MTD_BLOCK=y
2403 +# CONFIG_FTL is not set
2404 +# CONFIG_NFTL is not set
2405 +# CONFIG_INFTL is not set
2406 +# CONFIG_RFD_FTL is not set
2407 +# CONFIG_SSFDC is not set
2408 +# CONFIG_MTD_OOPS is not set
2409 +
2410 +#
2411 +# RAM/ROM/Flash chip drivers
2412 +#
2413 +CONFIG_MTD_CFI=y
2414 +# CONFIG_MTD_JEDECPROBE is not set
2415 +CONFIG_MTD_GEN_PROBE=y
2416 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
2417 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
2418 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
2419 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
2420 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
2421 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
2422 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
2423 +CONFIG_MTD_CFI_I1=y
2424 +CONFIG_MTD_CFI_I2=y
2425 +# CONFIG_MTD_CFI_I4 is not set
2426 +# CONFIG_MTD_CFI_I8 is not set
2427 +CONFIG_MTD_CFI_INTELEXT=y
2428 +# CONFIG_MTD_CFI_AMDSTD is not set
2429 +# CONFIG_MTD_CFI_STAA is not set
2430 +CONFIG_MTD_CFI_UTIL=y
2431 +# CONFIG_MTD_RAM is not set
2432 +CONFIG_MTD_ROM=y
2433 +CONFIG_MTD_ABSENT=y
2434 +
2435 +#
2436 +# Mapping drivers for chip access
2437 +#
2438 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
2439 +CONFIG_MTD_PHYSMAP=y
2440 +CONFIG_MTD_PHYSMAP_START=0x0
2441 +CONFIG_MTD_PHYSMAP_LEN=0
2442 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
2443 +# CONFIG_MTD_ARM_INTEGRATOR is not set
2444 +# CONFIG_MTD_PLATRAM is not set
2445 +
2446 +#
2447 +# Self-contained MTD device drivers
2448 +#
2449 +# CONFIG_MTD_DATAFLASH is not set
2450 +# CONFIG_MTD_M25P80 is not set
2451 +# CONFIG_MTD_SLRAM is not set
2452 +# CONFIG_MTD_PHRAM is not set
2453 +# CONFIG_MTD_MTDRAM is not set
2454 +# CONFIG_MTD_BLOCK2MTD is not set
2455 +
2456 +#
2457 +# Disk-On-Chip Device Drivers
2458 +#
2459 +# CONFIG_MTD_DOC2000 is not set
2460 +# CONFIG_MTD_DOC2001 is not set
2461 +# CONFIG_MTD_DOC2001PLUS is not set
2462 +CONFIG_MTD_NAND=y
2463 +CONFIG_MTD_NAND_VERIFY_WRITE=y
2464 +# CONFIG_MTD_NAND_ECC_SMC is not set
2465 +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
2466 +CONFIG_MTD_NAND_IDS=y
2467 +CONFIG_MTD_NAND_S3C2410=y
2468 +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
2469 +CONFIG_MTD_NAND_S3C2410_HWECC=y
2470 +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
2471 +# CONFIG_MTD_NAND_DISKONCHIP is not set
2472 +# CONFIG_MTD_NAND_NANDSIM is not set
2473 +# CONFIG_MTD_NAND_PLATFORM is not set
2474 +# CONFIG_MTD_ALAUDA is not set
2475 +# CONFIG_MTD_ONENAND is not set
2476 +
2477 +#
2478 +# UBI - Unsorted block images
2479 +#
2480 +# CONFIG_MTD_UBI is not set
2481 +# CONFIG_PARPORT is not set
2482 +CONFIG_PNP=y
2483 +CONFIG_PNP_DEBUG=y
2484 +
2485 +#
2486 +# Protocols
2487 +#
2488 +# CONFIG_PNPACPI is not set
2489 +CONFIG_BLK_DEV=y
2490 +# CONFIG_BLK_DEV_COW_COMMON is not set
2491 +CONFIG_BLK_DEV_LOOP=m
2492 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
2493 +# CONFIG_BLK_DEV_NBD is not set
2494 +CONFIG_BLK_DEV_UB=m
2495 +CONFIG_BLK_DEV_RAM=y
2496 +CONFIG_BLK_DEV_RAM_COUNT=16
2497 +CONFIG_BLK_DEV_RAM_SIZE=4096
2498 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
2499 +# CONFIG_CDROM_PKTCDVD is not set
2500 +# CONFIG_ATA_OVER_ETH is not set
2501 +CONFIG_MISC_DEVICES=y
2502 +# CONFIG_EEPROM_93CX6 is not set
2503 +# CONFIG_IDE is not set
2504 +
2505 +#
2506 +# SCSI device support
2507 +#
2508 +# CONFIG_RAID_ATTRS is not set
2509 +CONFIG_SCSI=m
2510 +CONFIG_SCSI_DMA=y
2511 +# CONFIG_SCSI_TGT is not set
2512 +# CONFIG_SCSI_NETLINK is not set
2513 +CONFIG_SCSI_PROC_FS=y
2514 +
2515 +#
2516 +# SCSI support type (disk, tape, CD-ROM)
2517 +#
2518 +CONFIG_BLK_DEV_SD=m
2519 +# CONFIG_CHR_DEV_ST is not set
2520 +# CONFIG_CHR_DEV_OSST is not set
2521 +CONFIG_BLK_DEV_SR=m
2522 +# CONFIG_BLK_DEV_SR_VENDOR is not set
2523 +CONFIG_CHR_DEV_SG=m
2524 +# CONFIG_CHR_DEV_SCH is not set
2525 +
2526 +#
2527 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
2528 +#
2529 +# CONFIG_SCSI_MULTI_LUN is not set
2530 +# CONFIG_SCSI_CONSTANTS is not set
2531 +# CONFIG_SCSI_LOGGING is not set
2532 +CONFIG_SCSI_SCAN_ASYNC=y
2533 +CONFIG_SCSI_WAIT_SCAN=m
2534 +
2535 +#
2536 +# SCSI Transports
2537 +#
2538 +# CONFIG_SCSI_SPI_ATTRS is not set
2539 +# CONFIG_SCSI_FC_ATTRS is not set
2540 +# CONFIG_SCSI_ISCSI_ATTRS is not set
2541 +# CONFIG_SCSI_SAS_LIBSAS is not set
2542 +# CONFIG_SCSI_SRP_ATTRS is not set
2543 +CONFIG_SCSI_LOWLEVEL=y
2544 +# CONFIG_ISCSI_TCP is not set
2545 +# CONFIG_SCSI_DEBUG is not set
2546 +# CONFIG_ATA is not set
2547 +CONFIG_MD=y
2548 +# CONFIG_BLK_DEV_MD is not set
2549 +CONFIG_BLK_DEV_DM=m
2550 +# CONFIG_DM_DEBUG is not set
2551 +CONFIG_DM_CRYPT=m
2552 +CONFIG_DM_SNAPSHOT=m
2553 +# CONFIG_DM_MIRROR is not set
2554 +# CONFIG_DM_ZERO is not set
2555 +# CONFIG_DM_MULTIPATH is not set
2556 +# CONFIG_DM_DELAY is not set
2557 +# CONFIG_DM_UEVENT is not set
2558 +CONFIG_NETDEVICES=y
2559 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
2560 +# CONFIG_DUMMY is not set
2561 +# CONFIG_BONDING is not set
2562 +# CONFIG_MACVLAN is not set
2563 +# CONFIG_EQUALIZER is not set
2564 +CONFIG_TUN=m
2565 +# CONFIG_VETH is not set
2566 +# CONFIG_NET_SB1000 is not set
2567 +# CONFIG_PHYLIB is not set
2568 +CONFIG_NET_ETHERNET=y
2569 +CONFIG_MII=y
2570 +# CONFIG_AX88796 is not set
2571 +# CONFIG_SMC91X is not set
2572 +# CONFIG_DM9000 is not set
2573 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
2574 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
2575 +# CONFIG_IBM_NEW_EMAC_TAH is not set
2576 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
2577 +CONFIG_NET_PCI=y
2578 +# CONFIG_B44 is not set
2579 +CONFIG_CS89x0=m
2580 +# CONFIG_NETDEV_1000 is not set
2581 +# CONFIG_NETDEV_10000 is not set
2582 +
2583 +#
2584 +# Wireless LAN
2585 +#
2586 +# CONFIG_WLAN_PRE80211 is not set
2587 +# CONFIG_WLAN_80211 is not set
2588 +
2589 +#
2590 +# USB Network Adapters
2591 +#
2592 +CONFIG_USB_CATC=m
2593 +CONFIG_USB_KAWETH=m
2594 +CONFIG_USB_PEGASUS=m
2595 +CONFIG_USB_RTL8150=m
2596 +CONFIG_USB_USBNET=y
2597 +CONFIG_USB_NET_AX8817X=m
2598 +CONFIG_USB_NET_CDCETHER=m
2599 +CONFIG_USB_NET_DM9601=m
2600 +CONFIG_USB_NET_GL620A=m
2601 +CONFIG_USB_NET_NET1080=m
2602 +CONFIG_USB_NET_PLUSB=m
2603 +CONFIG_USB_NET_MCS7830=m
2604 +CONFIG_USB_NET_RNDIS_HOST=m
2605 +CONFIG_USB_NET_CDC_SUBSET=m
2606 +CONFIG_USB_ALI_M5632=y
2607 +CONFIG_USB_AN2720=y
2608 +CONFIG_USB_BELKIN=y
2609 +CONFIG_USB_ARMLINUX=y
2610 +CONFIG_USB_EPSON2888=y
2611 +CONFIG_USB_KC2190=y
2612 +CONFIG_USB_NET_ZAURUS=m
2613 +# CONFIG_WAN is not set
2614 +CONFIG_PPP=m
2615 +CONFIG_PPP_MULTILINK=y
2616 +CONFIG_PPP_FILTER=y
2617 +CONFIG_PPP_ASYNC=m
2618 +CONFIG_PPP_SYNC_TTY=m
2619 +CONFIG_PPP_DEFLATE=m
2620 +CONFIG_PPP_BSDCOMP=m
2621 +CONFIG_PPP_MPPE=m
2622 +# CONFIG_PPPOE is not set
2623 +# CONFIG_PPPOL2TP is not set
2624 +# CONFIG_SLIP is not set
2625 +CONFIG_SLHC=m
2626 +# CONFIG_SHAPER is not set
2627 +# CONFIG_NETCONSOLE is not set
2628 +# CONFIG_NETPOLL is not set
2629 +# CONFIG_NET_POLL_CONTROLLER is not set
2630 +# CONFIG_ISDN is not set
2631 +
2632 +#
2633 +# Input device support
2634 +#
2635 +CONFIG_INPUT=y
2636 +# CONFIG_INPUT_FF_MEMLESS is not set
2637 +# CONFIG_INPUT_POLLDEV is not set
2638 +
2639 +#
2640 +# Userland interfaces
2641 +#
2642 +CONFIG_INPUT_MOUSEDEV=y
2643 +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
2644 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
2645 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
2646 +# CONFIG_INPUT_JOYDEV is not set
2647 +CONFIG_INPUT_EVDEV=y
2648 +# CONFIG_INPUT_EVBUG is not set
2649 +
2650 +#
2651 +# Input Device Drivers
2652 +#
2653 +CONFIG_INPUT_KEYBOARD=y
2654 +# CONFIG_KEYBOARD_ATKBD is not set
2655 +# CONFIG_KEYBOARD_SUNKBD is not set
2656 +# CONFIG_KEYBOARD_LKKBD is not set
2657 +# CONFIG_KEYBOARD_XTKBD is not set
2658 +# CONFIG_KEYBOARD_NEWTON is not set
2659 +CONFIG_KEYBOARD_STOWAWAY=m
2660 +CONFIG_KEYBOARD_GPIO=m
2661 +CONFIG_KEYBOARD_NEO1973=y
2662 +CONFIG_KEYBOARD_QT2410=y
2663 +CONFIG_INPUT_MOUSE=y
2664 +# CONFIG_MOUSE_PS2 is not set
2665 +# CONFIG_MOUSE_SERIAL is not set
2666 +# CONFIG_MOUSE_APPLETOUCH is not set
2667 +# CONFIG_MOUSE_VSXXXAA is not set
2668 +# CONFIG_MOUSE_GPIO is not set
2669 +# CONFIG_INPUT_JOYSTICK is not set
2670 +# CONFIG_INPUT_TABLET is not set
2671 +CONFIG_INPUT_TOUCHSCREEN=y
2672 +# CONFIG_TOUCHSCREEN_ADS7846 is not set
2673 +# CONFIG_TOUCHSCREEN_FUJITSU is not set
2674 +CONFIG_TOUCHSCREEN_S3C2410=y
2675 +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
2676 +# CONFIG_TOUCHSCREEN_GUNZE is not set
2677 +# CONFIG_TOUCHSCREEN_ELO is not set
2678 +# CONFIG_TOUCHSCREEN_MTOUCH is not set
2679 +# CONFIG_TOUCHSCREEN_MK712 is not set
2680 +# CONFIG_TOUCHSCREEN_PENMOUNT is not set
2681 +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
2682 +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
2683 +# CONFIG_TOUCHSCREEN_UCB1400 is not set
2684 +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
2685 +CONFIG_INPUT_MISC=y
2686 +# CONFIG_INPUT_ATI_REMOTE is not set
2687 +# CONFIG_INPUT_ATI_REMOTE2 is not set
2688 +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
2689 +# CONFIG_INPUT_POWERMATE is not set
2690 +# CONFIG_INPUT_YEALINK is not set
2691 +CONFIG_INPUT_UINPUT=m
2692 +CONFIG_INPUT_LIS302DL=y
2693 +
2694 +#
2695 +# Hardware I/O ports
2696 +#
2697 +CONFIG_SERIO=y
2698 +# CONFIG_SERIO_SERPORT is not set
2699 +# CONFIG_SERIO_RAW is not set
2700 +# CONFIG_GAMEPORT is not set
2701 +
2702 +#
2703 +# Character devices
2704 +#
2705 +CONFIG_VT=y
2706 +CONFIG_VT_CONSOLE=y
2707 +CONFIG_NR_TTY_DEVICES=4
2708 +CONFIG_HW_CONSOLE=y
2709 +CONFIG_VT_HW_CONSOLE_BINDING=y
2710 +# CONFIG_SERIAL_NONSTANDARD is not set
2711 +
2712 +#
2713 +# Serial drivers
2714 +#
2715 +# CONFIG_SERIAL_8250 is not set
2716 +
2717 +#
2718 +# Non-8250 serial port support
2719 +#
2720 +CONFIG_SERIAL_S3C2410=y
2721 +CONFIG_SERIAL_S3C2410_CONSOLE=y
2722 +CONFIG_SERIAL_CORE=y
2723 +CONFIG_SERIAL_CORE_CONSOLE=y
2724 +CONFIG_UNIX98_PTYS=y
2725 +# CONFIG_LEGACY_PTYS is not set
2726 +# CONFIG_IPMI_HANDLER is not set
2727 +# CONFIG_HW_RANDOM is not set
2728 +# CONFIG_NVRAM is not set
2729 +# CONFIG_R3964 is not set
2730 +# CONFIG_RAW_DRIVER is not set
2731 +# CONFIG_TCG_TPM is not set
2732 +CONFIG_I2C=y
2733 +CONFIG_I2C_BOARDINFO=y
2734 +CONFIG_I2C_CHARDEV=y
2735 +
2736 +#
2737 +# I2C Algorithms
2738 +#
2739 +# CONFIG_I2C_ALGOBIT is not set
2740 +# CONFIG_I2C_ALGOPCF is not set
2741 +# CONFIG_I2C_ALGOPCA is not set
2742 +
2743 +#
2744 +# I2C Hardware Bus support
2745 +#
2746 +# CONFIG_I2C_GPIO is not set
2747 +# CONFIG_I2C_OCORES is not set
2748 +# CONFIG_I2C_PARPORT_LIGHT is not set
2749 +CONFIG_I2C_S3C2410=y
2750 +# CONFIG_I2C_SIMTEC is not set
2751 +# CONFIG_I2C_TAOS_EVM is not set
2752 +# CONFIG_I2C_STUB is not set
2753 +# CONFIG_I2C_TINY_USB is not set
2754 +
2755 +#
2756 +# Miscellaneous I2C Chip support
2757 +#
2758 +# CONFIG_SENSORS_DS1337 is not set
2759 +# CONFIG_SENSORS_DS1374 is not set
2760 +# CONFIG_DS1682 is not set
2761 +# CONFIG_SENSORS_EEPROM is not set
2762 +CONFIG_SENSORS_PCF50606=y
2763 +CONFIG_SENSORS_PCF50633=y
2764 +# CONFIG_SENSORS_PCF8574 is not set
2765 +# CONFIG_SENSORS_PCA9539 is not set
2766 +# CONFIG_SENSORS_PCF8591 is not set
2767 +# CONFIG_SENSORS_MAX6875 is not set
2768 +# CONFIG_SENSORS_TSL2550 is not set
2769 +CONFIG_SENSORS_TSL256X=m
2770 +# CONFIG_I2C_DEBUG_CORE is not set
2771 +# CONFIG_I2C_DEBUG_ALGO is not set
2772 +# CONFIG_I2C_DEBUG_BUS is not set
2773 +# CONFIG_I2C_DEBUG_CHIP is not set
2774 +
2775 +#
2776 +# SPI support
2777 +#
2778 +CONFIG_SPI=y
2779 +# CONFIG_SPI_DEBUG is not set
2780 +CONFIG_SPI_MASTER=y
2781 +
2782 +#
2783 +# SPI Master Controller Drivers
2784 +#
2785 +CONFIG_SPI_BITBANG=y
2786 +# CONFIG_SPI_S3C24XX is not set
2787 +CONFIG_SPI_S3C24XX_GPIO=y
2788 +
2789 +#
2790 +# SPI Protocol Masters
2791 +#
2792 +# CONFIG_SPI_AT25 is not set
2793 +# CONFIG_SPI_SPIDEV is not set
2794 +# CONFIG_SPI_TLE62X0 is not set
2795 +# CONFIG_W1 is not set
2796 +CONFIG_POWER_SUPPLY=y
2797 +CONFIG_POWER_SUPPLY_DEBUG=y
2798 +CONFIG_PDA_POWER=y
2799 +CONFIG_APM_POWER=y
2800 +# CONFIG_BATTERY_DS2760 is not set
2801 +# CONFIG_BATTERY_GTA01 is not set
2802 +CONFIG_BATTERY_BQ27000_HDQ=y
2803 +CONFIG_GTA02_HDQ=y
2804 +CONFIG_HWMON=y
2805 +# CONFIG_HWMON_VID is not set
2806 +# CONFIG_SENSORS_AD7418 is not set
2807 +# CONFIG_SENSORS_ADM1021 is not set
2808 +# CONFIG_SENSORS_ADM1025 is not set
2809 +# CONFIG_SENSORS_ADM1026 is not set
2810 +# CONFIG_SENSORS_ADM1029 is not set
2811 +# CONFIG_SENSORS_ADM1031 is not set
2812 +# CONFIG_SENSORS_ADM9240 is not set
2813 +# CONFIG_SENSORS_ADT7470 is not set
2814 +# CONFIG_SENSORS_ATXP1 is not set
2815 +# CONFIG_SENSORS_DS1621 is not set
2816 +# CONFIG_SENSORS_F71805F is not set
2817 +# CONFIG_SENSORS_F71882FG is not set
2818 +# CONFIG_SENSORS_F75375S is not set
2819 +# CONFIG_SENSORS_GL518SM is not set
2820 +# CONFIG_SENSORS_GL520SM is not set
2821 +# CONFIG_SENSORS_IT87 is not set
2822 +# CONFIG_SENSORS_LM63 is not set
2823 +# CONFIG_SENSORS_LM70 is not set
2824 +# CONFIG_SENSORS_LM75 is not set
2825 +# CONFIG_SENSORS_LM77 is not set
2826 +# CONFIG_SENSORS_LM78 is not set
2827 +# CONFIG_SENSORS_LM80 is not set
2828 +# CONFIG_SENSORS_LM83 is not set
2829 +# CONFIG_SENSORS_LM85 is not set
2830 +# CONFIG_SENSORS_LM87 is not set
2831 +# CONFIG_SENSORS_LM90 is not set
2832 +# CONFIG_SENSORS_LM92 is not set
2833 +# CONFIG_SENSORS_LM93 is not set
2834 +# CONFIG_SENSORS_MAX1619 is not set
2835 +# CONFIG_SENSORS_MAX6650 is not set
2836 +# CONFIG_SENSORS_PC87360 is not set
2837 +# CONFIG_SENSORS_PC87427 is not set
2838 +# CONFIG_SENSORS_DME1737 is not set
2839 +# CONFIG_SENSORS_SMSC47M1 is not set
2840 +# CONFIG_SENSORS_SMSC47M192 is not set
2841 +# CONFIG_SENSORS_SMSC47B397 is not set
2842 +# CONFIG_SENSORS_THMC50 is not set
2843 +# CONFIG_SENSORS_VT1211 is not set
2844 +# CONFIG_SENSORS_W83781D is not set
2845 +# CONFIG_SENSORS_W83791D is not set
2846 +# CONFIG_SENSORS_W83792D is not set
2847 +# CONFIG_SENSORS_W83793 is not set
2848 +# CONFIG_SENSORS_W83L785TS is not set
2849 +# CONFIG_SENSORS_W83627HF is not set
2850 +# CONFIG_SENSORS_W83627EHF is not set
2851 +# CONFIG_HWMON_DEBUG_CHIP is not set
2852 +CONFIG_WATCHDOG=y
2853 +# CONFIG_WATCHDOG_NOWAYOUT is not set
2854 +
2855 +#
2856 +# Watchdog Device Drivers
2857 +#
2858 +# CONFIG_SOFT_WATCHDOG is not set
2859 +CONFIG_S3C2410_WATCHDOG=m
2860 +
2861 +#
2862 +# USB-based Watchdog Cards
2863 +#
2864 +# CONFIG_USBPCWATCHDOG is not set
2865 +
2866 +#
2867 +# Sonics Silicon Backplane
2868 +#
2869 +CONFIG_SSB_POSSIBLE=y
2870 +# CONFIG_SSB is not set
2871 +
2872 +#
2873 +# Multifunction device drivers
2874 +#
2875 +# CONFIG_MFD_SM501 is not set
2876 +CONFIG_MFD_GLAMO=y
2877 +CONFIG_MFD_GLAMO_FB=y
2878 +CONFIG_MFD_GLAMO_SPI_GPIO=y
2879 +CONFIG_MFD_GLAMO_SPI_FB=y
2880 +CONFIG_MFD_GLAMO_MCI=y
2881 +
2882 +#
2883 +# Multimedia devices
2884 +#
2885 +# CONFIG_VIDEO_DEV is not set
2886 +# CONFIG_DVB_CORE is not set
2887 +CONFIG_DAB=y
2888 +# CONFIG_USB_DABUSB is not set
2889 +
2890 +#
2891 +# Graphics support
2892 +#
2893 +# CONFIG_VGASTATE is not set
2894 +CONFIG_VIDEO_OUTPUT_CONTROL=y
2895 +CONFIG_FB=y
2896 +# CONFIG_FIRMWARE_EDID is not set
2897 +# CONFIG_FB_DDC is not set
2898 +CONFIG_FB_CFB_FILLRECT=y
2899 +CONFIG_FB_CFB_COPYAREA=y
2900 +CONFIG_FB_CFB_IMAGEBLIT=y
2901 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
2902 +# CONFIG_FB_SYS_FILLRECT is not set
2903 +# CONFIG_FB_SYS_COPYAREA is not set
2904 +# CONFIG_FB_SYS_IMAGEBLIT is not set
2905 +# CONFIG_FB_SYS_FOPS is not set
2906 +CONFIG_FB_DEFERRED_IO=y
2907 +# CONFIG_FB_SVGALIB is not set
2908 +# CONFIG_FB_MACMODES is not set
2909 +# CONFIG_FB_BACKLIGHT is not set
2910 +# CONFIG_FB_MODE_HELPERS is not set
2911 +# CONFIG_FB_TILEBLITTING is not set
2912 +
2913 +#
2914 +# Frame buffer hardware drivers
2915 +#
2916 +# CONFIG_FB_UVESA is not set
2917 +# CONFIG_FB_S1D13XXX is not set
2918 +CONFIG_FB_S3C2410=y
2919 +# CONFIG_FB_S3C2410_DEBUG is not set
2920 +# CONFIG_FB_VIRTUAL is not set
2921 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
2922 +CONFIG_LCD_CLASS_DEVICE=y
2923 +CONFIG_LCD_LTV350QV=y
2924 +CONFIG_BACKLIGHT_CLASS_DEVICE=y
2925 +# CONFIG_BACKLIGHT_CORGI is not set
2926 +CONFIG_BACKLIGHT_GTA01=y
2927 +
2928 +#
2929 +# Display device support
2930 +#
2931 +CONFIG_DISPLAY_SUPPORT=y
2932 +
2933 +#
2934 +# Display hardware drivers
2935 +#
2936 +CONFIG_DISPLAY_JBT6K74=y
2937 +
2938 +#
2939 +# Console display driver support
2940 +#
2941 +# CONFIG_VGA_CONSOLE is not set
2942 +CONFIG_DUMMY_CONSOLE=y
2943 +CONFIG_FRAMEBUFFER_CONSOLE=y
2944 +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
2945 +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
2946 +CONFIG_FONTS=y
2947 +# CONFIG_FONT_8x8 is not set
2948 +# CONFIG_FONT_8x16 is not set
2949 +CONFIG_FONT_6x11=y
2950 +# CONFIG_FONT_7x14 is not set
2951 +# CONFIG_FONT_PEARL_8x8 is not set
2952 +# CONFIG_FONT_ACORN_8x8 is not set
2953 +# CONFIG_FONT_MINI_4x6 is not set
2954 +# CONFIG_FONT_SUN8x16 is not set
2955 +# CONFIG_FONT_SUN12x22 is not set
2956 +# CONFIG_FONT_10x18 is not set
2957 +# CONFIG_LOGO is not set
2958 +
2959 +#
2960 +# Sound
2961 +#
2962 +CONFIG_SOUND=y
2963 +
2964 +#
2965 +# Advanced Linux Sound Architecture
2966 +#
2967 +CONFIG_SND=y
2968 +CONFIG_SND_TIMER=y
2969 +CONFIG_SND_PCM=y
2970 +CONFIG_SND_HWDEP=y
2971 +CONFIG_SND_RAWMIDI=y
2972 +# CONFIG_SND_SEQUENCER is not set
2973 +CONFIG_SND_OSSEMUL=y
2974 +CONFIG_SND_MIXER_OSS=y
2975 +CONFIG_SND_PCM_OSS=y
2976 +CONFIG_SND_PCM_OSS_PLUGINS=y
2977 +# CONFIG_SND_DYNAMIC_MINORS is not set
2978 +CONFIG_SND_SUPPORT_OLD_API=y
2979 +CONFIG_SND_VERBOSE_PROCFS=y
2980 +# CONFIG_SND_VERBOSE_PRINTK is not set
2981 +# CONFIG_SND_DEBUG is not set
2982 +
2983 +#
2984 +# Generic devices
2985 +#
2986 +# CONFIG_SND_DUMMY is not set
2987 +# CONFIG_SND_MTPAV is not set
2988 +# CONFIG_SND_SERIAL_U16550 is not set
2989 +# CONFIG_SND_MPU401 is not set
2990 +
2991 +#
2992 +# ALSA ARM devices
2993 +#
2994 +
2995 +#
2996 +# SPI devices
2997 +#
2998 +
2999 +#
3000 +# USB devices
3001 +#
3002 +CONFIG_SND_USB_AUDIO=m
3003 +# CONFIG_SND_USB_CAIAQ is not set
3004 +
3005 +#
3006 +# System on Chip audio support
3007 +#
3008 +CONFIG_SND_SOC=y
3009 +CONFIG_SND_S3C24XX_SOC=y
3010 +CONFIG_SND_S3C24XX_SOC_I2S=y
3011 +# CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753 is not set
3012 +CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=y
3013 +
3014 +#
3015 +# SoC Audio support for SuperH
3016 +#
3017 +CONFIG_SND_SOC_WM8753=y
3018 +
3019 +#
3020 +# Open Sound System
3021 +#
3022 +# CONFIG_SOUND_PRIME is not set
3023 +CONFIG_HID_SUPPORT=y
3024 +CONFIG_HID=y
3025 +# CONFIG_HID_DEBUG is not set
3026 +# CONFIG_HIDRAW is not set
3027 +
3028 +#
3029 +# USB Input Devices
3030 +#
3031 +CONFIG_USB_HID=y
3032 +# CONFIG_USB_HIDINPUT_POWERBOOK is not set
3033 +# CONFIG_HID_FF is not set
3034 +CONFIG_USB_HIDDEV=y
3035 +CONFIG_USB_SUPPORT=y
3036 +CONFIG_USB_ARCH_HAS_HCD=y
3037 +CONFIG_USB_ARCH_HAS_OHCI=y
3038 +# CONFIG_USB_ARCH_HAS_EHCI is not set
3039 +CONFIG_USB=y
3040 +# CONFIG_USB_DEBUG is not set
3041 +
3042 +#
3043 +# Miscellaneous USB options
3044 +#
3045 +CONFIG_USB_DEVICEFS=y
3046 +CONFIG_USB_DEVICE_CLASS=y
3047 +# CONFIG_USB_DYNAMIC_MINORS is not set
3048 +CONFIG_USB_SUSPEND=y
3049 +CONFIG_USB_PERSIST=y
3050 +# CONFIG_USB_OTG is not set
3051 +
3052 +#
3053 +# USB Host Controller Drivers
3054 +#
3055 +# CONFIG_USB_ISP116X_HCD is not set
3056 +CONFIG_USB_OHCI_HCD=y
3057 +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
3058 +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
3059 +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
3060 +# CONFIG_USB_SL811_HCD is not set
3061 +# CONFIG_USB_R8A66597_HCD is not set
3062 +
3063 +#
3064 +# USB Device Class drivers
3065 +#
3066 +CONFIG_USB_ACM=m
3067 +CONFIG_USB_PRINTER=m
3068 +
3069 +#
3070 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
3071 +#
3072 +
3073 +#
3074 +# may also be needed; see USB_STORAGE Help for more information
3075 +#
3076 +CONFIG_USB_STORAGE=m
3077 +# CONFIG_USB_STORAGE_DEBUG is not set
3078 +CONFIG_USB_STORAGE_DATAFAB=y
3079 +CONFIG_USB_STORAGE_FREECOM=y
3080 +# CONFIG_USB_STORAGE_ISD200 is not set
3081 +CONFIG_USB_STORAGE_DPCM=y
3082 +CONFIG_USB_STORAGE_USBAT=y
3083 +CONFIG_USB_STORAGE_SDDR09=y
3084 +CONFIG_USB_STORAGE_SDDR55=y
3085 +CONFIG_USB_STORAGE_JUMPSHOT=y
3086 +CONFIG_USB_STORAGE_ALAUDA=y
3087 +CONFIG_USB_STORAGE_KARMA=y
3088 +CONFIG_USB_LIBUSUAL=y
3089 +
3090 +#
3091 +# USB Imaging devices
3092 +#
3093 +# CONFIG_USB_MDC800 is not set
3094 +# CONFIG_USB_MICROTEK is not set
3095 +CONFIG_USB_MON=y
3096 +
3097 +#
3098 +# USB port drivers
3099 +#
3100 +
3101 +#
3102 +# USB Serial Converter support
3103 +#
3104 +CONFIG_USB_SERIAL=y
3105 +CONFIG_USB_SERIAL_GENERIC=y
3106 +CONFIG_USB_SERIAL_AIRCABLE=m
3107 +CONFIG_USB_SERIAL_AIRPRIME=m
3108 +CONFIG_USB_SERIAL_ARK3116=m
3109 +CONFIG_USB_SERIAL_BELKIN=m
3110 +# CONFIG_USB_SERIAL_CH341 is not set
3111 +CONFIG_USB_SERIAL_WHITEHEAT=m
3112 +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
3113 +CONFIG_USB_SERIAL_CP2101=m
3114 +CONFIG_USB_SERIAL_CYPRESS_M8=m
3115 +CONFIG_USB_SERIAL_EMPEG=m
3116 +CONFIG_USB_SERIAL_FTDI_SIO=m
3117 +CONFIG_USB_SERIAL_FUNSOFT=m
3118 +CONFIG_USB_SERIAL_VISOR=m
3119 +CONFIG_USB_SERIAL_IPAQ=m
3120 +CONFIG_USB_SERIAL_IR=m
3121 +CONFIG_USB_SERIAL_EDGEPORT=m
3122 +CONFIG_USB_SERIAL_EDGEPORT_TI=m
3123 +CONFIG_USB_SERIAL_GARMIN=m
3124 +CONFIG_USB_SERIAL_IPW=m
3125 +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
3126 +CONFIG_USB_SERIAL_KEYSPAN=m
3127 +CONFIG_USB_SERIAL_KEYSPAN_MPR=y
3128 +CONFIG_USB_SERIAL_KEYSPAN_USA28=y
3129 +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
3130 +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
3131 +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
3132 +CONFIG_USB_SERIAL_KEYSPAN_USA19=y
3133 +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
3134 +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
3135 +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
3136 +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
3137 +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
3138 +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
3139 +CONFIG_USB_SERIAL_KLSI=m
3140 +CONFIG_USB_SERIAL_KOBIL_SCT=m
3141 +CONFIG_USB_SERIAL_MCT_U232=m
3142 +CONFIG_USB_SERIAL_MOS7720=m
3143 +CONFIG_USB_SERIAL_MOS7840=m
3144 +CONFIG_USB_SERIAL_NAVMAN=m
3145 +CONFIG_USB_SERIAL_PL2303=m
3146 +# CONFIG_USB_SERIAL_OTI6858 is not set
3147 +CONFIG_USB_SERIAL_HP4X=m
3148 +CONFIG_USB_SERIAL_SAFE=m
3149 +CONFIG_USB_SERIAL_SAFE_PADDED=y
3150 +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
3151 +CONFIG_USB_SERIAL_TI=m
3152 +CONFIG_USB_SERIAL_CYBERJACK=m
3153 +CONFIG_USB_SERIAL_XIRCOM=m
3154 +CONFIG_USB_SERIAL_OPTION=y
3155 +CONFIG_USB_SERIAL_OMNINET=m
3156 +# CONFIG_USB_SERIAL_DEBUG is not set
3157 +CONFIG_USB_EZUSB=y
3158 +
3159 +#
3160 +# USB Miscellaneous drivers
3161 +#
3162 +# CONFIG_USB_EMI62 is not set
3163 +# CONFIG_USB_EMI26 is not set
3164 +# CONFIG_USB_ADUTUX is not set
3165 +# CONFIG_USB_AUERSWALD is not set
3166 +# CONFIG_USB_RIO500 is not set
3167 +# CONFIG_USB_LEGOTOWER is not set
3168 +# CONFIG_USB_LCD is not set
3169 +CONFIG_USB_BERRY_CHARGE=m
3170 +# CONFIG_USB_LED is not set
3171 +# CONFIG_USB_CYPRESS_CY7C63 is not set
3172 +# CONFIG_USB_CYTHERM is not set
3173 +# CONFIG_USB_PHIDGET is not set
3174 +# CONFIG_USB_IDMOUSE is not set
3175 +# CONFIG_USB_FTDI_ELAN is not set
3176 +# CONFIG_USB_APPLEDISPLAY is not set
3177 +# CONFIG_USB_LD is not set
3178 +CONFIG_USB_TRANCEVIBRATOR=m
3179 +CONFIG_USB_IOWARRIOR=m
3180 +# CONFIG_USB_TEST is not set
3181 +
3182 +#
3183 +# USB DSL modem support
3184 +#
3185 +
3186 +#
3187 +# USB Gadget Support
3188 +#
3189 +CONFIG_USB_GADGET=y
3190 +# CONFIG_USB_GADGET_DEBUG is not set
3191 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
3192 +# CONFIG_USB_GADGET_DEBUG_FS is not set
3193 +CONFIG_USB_GADGET_SELECTED=y
3194 +# CONFIG_USB_GADGET_AMD5536UDC is not set
3195 +# CONFIG_USB_GADGET_ATMEL_USBA is not set
3196 +# CONFIG_USB_GADGET_FSL_USB2 is not set
3197 +# CONFIG_USB_GADGET_NET2280 is not set
3198 +# CONFIG_USB_GADGET_PXA2XX is not set
3199 +# CONFIG_USB_GADGET_M66592 is not set
3200 +# CONFIG_USB_GADGET_GOKU is not set
3201 +# CONFIG_USB_GADGET_LH7A40X is not set
3202 +# CONFIG_USB_GADGET_OMAP is not set
3203 +CONFIG_USB_GADGET_S3C2410=y
3204 +CONFIG_USB_S3C2410=y
3205 +# CONFIG_USB_S3C2410_DEBUG is not set
3206 +# CONFIG_USB_GADGET_AT91 is not set
3207 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
3208 +# CONFIG_USB_GADGET_DUALSPEED is not set
3209 +# CONFIG_USB_ZERO is not set
3210 +CONFIG_USB_ETH=y
3211 +CONFIG_USB_ETH_RNDIS=y
3212 +# CONFIG_USB_GADGETFS is not set
3213 +# CONFIG_USB_FILE_STORAGE is not set
3214 +# CONFIG_USB_G_SERIAL is not set
3215 +# CONFIG_USB_MIDI_GADGET is not set
3216 +
3217 +#
3218 +# SDIO support
3219 +#
3220 +CONFIG_SDIO=y
3221 +CONFIG_SDIO_S3C24XX=y
3222 +CONFIG_SDIO_S3C24XX_DMA=y
3223 +CONFIG_SDIO_AR6000_WLAN=y
3224 +CONFIG_MMC=y
3225 +# CONFIG_MMC_DEBUG is not set
3226 +CONFIG_MMC_UNSAFE_RESUME=y
3227 +
3228 +#
3229 +# MMC/SD Card Drivers
3230 +#
3231 +CONFIG_MMC_BLOCK=y
3232 +# CONFIG_MMC_BLOCK_BOUNCE is not set
3233 +# CONFIG_SDIO_UART is not set
3234 +
3235 +#
3236 +# MMC/SD Host Controller Drivers
3237 +#
3238 +# CONFIG_MMC_SPI is not set
3239 +# CONFIG_MMC_S3C is not set
3240 +CONFIG_NEW_LEDS=y
3241 +CONFIG_LEDS_CLASS=y
3242 +
3243 +#
3244 +# LED drivers
3245 +#
3246 +CONFIG_LEDS_S3C24XX=m
3247 +CONFIG_LEDS_GPIO=y
3248 +CONFIG_LEDS_NEO1973_VIBRATOR=y
3249 +CONFIG_LEDS_NEO1973_GTA02=y
3250 +
3251 +#
3252 +# LED Triggers
3253 +#
3254 +CONFIG_LEDS_TRIGGERS=y
3255 +CONFIG_LEDS_TRIGGER_TIMER=y
3256 +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
3257 +CONFIG_RTC_LIB=y
3258 +CONFIG_RTC_CLASS=y
3259 +CONFIG_RTC_HCTOSYS=y
3260 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
3261 +CONFIG_RTC_DEBUG=y
3262 +
3263 +#
3264 +# RTC interfaces
3265 +#
3266 +CONFIG_RTC_INTF_SYSFS=y
3267 +CONFIG_RTC_INTF_PROC=y
3268 +CONFIG_RTC_INTF_DEV=y
3269 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
3270 +# CONFIG_RTC_DRV_TEST is not set
3271 +
3272 +#
3273 +# I2C RTC drivers
3274 +#
3275 +# CONFIG_RTC_DRV_DS1307 is not set
3276 +# CONFIG_RTC_DRV_DS1374 is not set
3277 +# CONFIG_RTC_DRV_DS1672 is not set
3278 +# CONFIG_RTC_DRV_MAX6900 is not set
3279 +# CONFIG_RTC_DRV_RS5C372 is not set
3280 +# CONFIG_RTC_DRV_ISL1208 is not set
3281 +# CONFIG_RTC_DRV_X1205 is not set
3282 +# CONFIG_RTC_DRV_PCF8563 is not set
3283 +# CONFIG_RTC_DRV_PCF8583 is not set
3284 +# CONFIG_RTC_DRV_M41T80 is not set
3285 +
3286 +#
3287 +# SPI RTC drivers
3288 +#
3289 +# CONFIG_RTC_DRV_RS5C348 is not set
3290 +# CONFIG_RTC_DRV_MAX6902 is not set
3291 +
3292 +#
3293 +# Platform RTC drivers
3294 +#
3295 +# CONFIG_RTC_DRV_CMOS is not set
3296 +# CONFIG_RTC_DRV_DS1553 is not set
3297 +# CONFIG_RTC_DRV_STK17TA8 is not set
3298 +# CONFIG_RTC_DRV_DS1742 is not set
3299 +# CONFIG_RTC_DRV_M48T86 is not set
3300 +# CONFIG_RTC_DRV_M48T59 is not set
3301 +# CONFIG_RTC_DRV_V3020 is not set
3302 +
3303 +#
3304 +# on-CPU RTC drivers
3305 +#
3306 +CONFIG_RTC_DRV_S3C=m
3307 +
3308 +#
3309 +# File systems
3310 +#
3311 +CONFIG_EXT2_FS=y
3312 +# CONFIG_EXT2_FS_XATTR is not set
3313 +# CONFIG_EXT2_FS_XIP is not set
3314 +CONFIG_EXT3_FS=y
3315 +# CONFIG_EXT3_FS_XATTR is not set
3316 +# CONFIG_EXT4DEV_FS is not set
3317 +CONFIG_JBD=y
3318 +# CONFIG_JBD_DEBUG is not set
3319 +# CONFIG_REISERFS_FS is not set
3320 +# CONFIG_JFS_FS is not set
3321 +# CONFIG_FS_POSIX_ACL is not set
3322 +# CONFIG_XFS_FS is not set
3323 +# CONFIG_GFS2_FS is not set
3324 +# CONFIG_OCFS2_FS is not set
3325 +# CONFIG_MINIX_FS is not set
3326 +CONFIG_ROMFS_FS=y
3327 +CONFIG_INOTIFY=y
3328 +CONFIG_INOTIFY_USER=y
3329 +# CONFIG_QUOTA is not set
3330 +CONFIG_DNOTIFY=y
3331 +# CONFIG_AUTOFS_FS is not set
3332 +CONFIG_AUTOFS4_FS=m
3333 +CONFIG_FUSE_FS=m
3334 +
3335 +#
3336 +# CD-ROM/DVD Filesystems
3337 +#
3338 +CONFIG_ISO9660_FS=y
3339 +CONFIG_JOLIET=y
3340 +# CONFIG_ZISOFS is not set
3341 +CONFIG_UDF_FS=y
3342 +
3343 +#
3344 +# DOS/FAT/NT Filesystems
3345 +#
3346 +CONFIG_FAT_FS=y
3347 +CONFIG_MSDOS_FS=y
3348 +CONFIG_VFAT_FS=y
3349 +CONFIG_FAT_DEFAULT_CODEPAGE=437
3350 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
3351 +# CONFIG_NTFS_FS is not set
3352 +
3353 +#
3354 +# Pseudo filesystems
3355 +#
3356 +CONFIG_PROC_FS=y
3357 +CONFIG_PROC_SYSCTL=y
3358 +CONFIG_SYSFS=y
3359 +CONFIG_TMPFS=y
3360 +# CONFIG_TMPFS_POSIX_ACL is not set
3361 +# CONFIG_HUGETLB_PAGE is not set
3362 +CONFIG_CONFIGFS_FS=m
3363 +
3364 +#
3365 +# Miscellaneous filesystems
3366 +#
3367 +# CONFIG_ADFS_FS is not set
3368 +# CONFIG_AFFS_FS is not set
3369 +# CONFIG_HFS_FS is not set
3370 +# CONFIG_HFSPLUS_FS is not set
3371 +# CONFIG_BEFS_FS is not set
3372 +# CONFIG_BFS_FS is not set
3373 +# CONFIG_EFS_FS is not set
3374 +CONFIG_YAFFS_FS=y
3375 +CONFIG_YAFFS_YAFFS1=y
3376 +CONFIG_YAFFS_9BYTE_TAGS=y
3377 +CONFIG_YAFFS_YAFFS2=y
3378 +CONFIG_YAFFS_AUTO_YAFFS2=y
3379 +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
3380 +CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
3381 +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
3382 +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
3383 +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
3384 +CONFIG_JFFS2_FS=y
3385 +CONFIG_JFFS2_FS_DEBUG=0
3386 +CONFIG_JFFS2_FS_WRITEBUFFER=y
3387 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
3388 +CONFIG_JFFS2_SUMMARY=y
3389 +# CONFIG_JFFS2_FS_XATTR is not set
3390 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
3391 +CONFIG_JFFS2_ZLIB=y
3392 +# CONFIG_JFFS2_LZO is not set
3393 +CONFIG_JFFS2_RTIME=y
3394 +# CONFIG_JFFS2_RUBIN is not set
3395 +CONFIG_CRAMFS=y
3396 +# CONFIG_VXFS_FS is not set
3397 +# CONFIG_HPFS_FS is not set
3398 +# CONFIG_QNX4FS_FS is not set
3399 +# CONFIG_SYSV_FS is not set
3400 +# CONFIG_UFS_FS is not set
3401 +# CONFIG_NETWORK_FILESYSTEMS is not set
3402 +
3403 +#
3404 +# Partition Types
3405 +#
3406 +# CONFIG_PARTITION_ADVANCED is not set
3407 +CONFIG_MSDOS_PARTITION=y
3408 +CONFIG_NLS=y
3409 +CONFIG_NLS_DEFAULT="iso8859-1"
3410 +CONFIG_NLS_CODEPAGE_437=y
3411 +# CONFIG_NLS_CODEPAGE_737 is not set
3412 +# CONFIG_NLS_CODEPAGE_775 is not set
3413 +CONFIG_NLS_CODEPAGE_850=m
3414 +# CONFIG_NLS_CODEPAGE_852 is not set
3415 +# CONFIG_NLS_CODEPAGE_855 is not set
3416 +# CONFIG_NLS_CODEPAGE_857 is not set
3417 +# CONFIG_NLS_CODEPAGE_860 is not set
3418 +# CONFIG_NLS_CODEPAGE_861 is not set
3419 +# CONFIG_NLS_CODEPAGE_862 is not set
3420 +# CONFIG_NLS_CODEPAGE_863 is not set
3421 +# CONFIG_NLS_CODEPAGE_864 is not set
3422 +# CONFIG_NLS_CODEPAGE_865 is not set
3423 +# CONFIG_NLS_CODEPAGE_866 is not set
3424 +# CONFIG_NLS_CODEPAGE_869 is not set
3425 +CONFIG_NLS_CODEPAGE_936=m
3426 +CONFIG_NLS_CODEPAGE_950=m
3427 +# CONFIG_NLS_CODEPAGE_932 is not set
3428 +# CONFIG_NLS_CODEPAGE_949 is not set
3429 +# CONFIG_NLS_CODEPAGE_874 is not set
3430 +# CONFIG_NLS_ISO8859_8 is not set
3431 +# CONFIG_NLS_CODEPAGE_1250 is not set
3432 +# CONFIG_NLS_CODEPAGE_1251 is not set
3433 +# CONFIG_NLS_ASCII is not set
3434 +CONFIG_NLS_ISO8859_1=y
3435 +# CONFIG_NLS_ISO8859_2 is not set
3436 +# CONFIG_NLS_ISO8859_3 is not set
3437 +# CONFIG_NLS_ISO8859_4 is not set
3438 +# CONFIG_NLS_ISO8859_5 is not set
3439 +# CONFIG_NLS_ISO8859_6 is not set
3440 +# CONFIG_NLS_ISO8859_7 is not set
3441 +# CONFIG_NLS_ISO8859_9 is not set
3442 +# CONFIG_NLS_ISO8859_13 is not set
3443 +# CONFIG_NLS_ISO8859_14 is not set
3444 +# CONFIG_NLS_ISO8859_15 is not set
3445 +# CONFIG_NLS_KOI8_R is not set
3446 +# CONFIG_NLS_KOI8_U is not set
3447 +CONFIG_NLS_UTF8=m
3448 +# CONFIG_DLM is not set
3449 +CONFIG_INSTRUMENTATION=y
3450 +CONFIG_PROFILING=y
3451 +CONFIG_OPROFILE=m
3452 +CONFIG_MARKERS=y
3453 +
3454 +#
3455 +# Kernel hacking
3456 +#
3457 +CONFIG_PRINTK_TIME=y
3458 +CONFIG_ENABLE_WARN_DEPRECATED=y
3459 +CONFIG_ENABLE_MUST_CHECK=y
3460 +CONFIG_MAGIC_SYSRQ=y
3461 +# CONFIG_UNUSED_SYMBOLS is not set
3462 +CONFIG_DEBUG_FS=y
3463 +# CONFIG_HEADERS_CHECK is not set
3464 +CONFIG_DEBUG_KERNEL=y
3465 +CONFIG_DEBUG_SHIRQ=y
3466 +CONFIG_DETECT_SOFTLOCKUP=y
3467 +CONFIG_SCHED_DEBUG=y
3468 +# CONFIG_SCHEDSTATS is not set
3469 +CONFIG_TIMER_STATS=y
3470 +# CONFIG_DEBUG_SLAB is not set
3471 +CONFIG_DEBUG_PREEMPT=y
3472 +# CONFIG_DEBUG_RT_MUTEXES is not set
3473 +# CONFIG_RT_MUTEX_TESTER is not set
3474 +CONFIG_DEBUG_SPINLOCK=y
3475 +CONFIG_DEBUG_MUTEXES=y
3476 +CONFIG_DEBUG_LOCK_ALLOC=y
3477 +# CONFIG_PROVE_LOCKING is not set
3478 +CONFIG_LOCKDEP=y
3479 +CONFIG_LOCK_STAT=y
3480 +CONFIG_DEBUG_LOCKDEP=y
3481 +CONFIG_DEBUG_SPINLOCK_SLEEP=y
3482 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
3483 +CONFIG_STACKTRACE=y
3484 +# CONFIG_DEBUG_KOBJECT is not set
3485 +CONFIG_DEBUG_BUGVERBOSE=y
3486 +CONFIG_DEBUG_INFO=y
3487 +# CONFIG_DEBUG_VM is not set
3488 +# CONFIG_DEBUG_LIST is not set
3489 +CONFIG_DEBUG_SG=y
3490 +CONFIG_FRAME_POINTER=y
3491 +CONFIG_FORCED_INLINING=y
3492 +# CONFIG_BOOT_PRINTK_DELAY is not set
3493 +# CONFIG_RCU_TORTURE_TEST is not set
3494 +# CONFIG_FAULT_INJECTION is not set
3495 +# CONFIG_SAMPLES is not set
3496 +# CONFIG_DEBUG_USER is not set
3497 +CONFIG_DEBUG_ERRORS=y
3498 +# CONFIG_DEBUG_LL is not set
3499 +# CONFIG_DEBUG_ICEDCC is not set
3500 +# CONFIG_DEBUG_S3C_PORT is not set
3501 +CONFIG_DEBUG_S3C_UART=2
3502 +
3503 +#
3504 +# Security options
3505 +#
3506 +# CONFIG_KEYS is not set
3507 +# CONFIG_SECURITY is not set
3508 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
3509 +CONFIG_CRYPTO=y
3510 +CONFIG_CRYPTO_ALGAPI=y
3511 +CONFIG_CRYPTO_BLKCIPHER=y
3512 +CONFIG_CRYPTO_HASH=y
3513 +CONFIG_CRYPTO_MANAGER=y
3514 +CONFIG_CRYPTO_HMAC=y
3515 +CONFIG_CRYPTO_XCBC=m
3516 +CONFIG_CRYPTO_NULL=m
3517 +CONFIG_CRYPTO_MD4=m
3518 +CONFIG_CRYPTO_MD5=y
3519 +CONFIG_CRYPTO_SHA1=m
3520 +CONFIG_CRYPTO_SHA256=m
3521 +CONFIG_CRYPTO_SHA512=m
3522 +CONFIG_CRYPTO_WP512=m
3523 +CONFIG_CRYPTO_TGR192=m
3524 +CONFIG_CRYPTO_GF128MUL=m
3525 +CONFIG_CRYPTO_ECB=m
3526 +CONFIG_CRYPTO_CBC=y
3527 +CONFIG_CRYPTO_PCBC=m
3528 +CONFIG_CRYPTO_LRW=m
3529 +# CONFIG_CRYPTO_XTS is not set
3530 +# CONFIG_CRYPTO_CRYPTD is not set
3531 +CONFIG_CRYPTO_DES=y
3532 +CONFIG_CRYPTO_FCRYPT=m
3533 +CONFIG_CRYPTO_BLOWFISH=m
3534 +CONFIG_CRYPTO_TWOFISH=m
3535 +CONFIG_CRYPTO_TWOFISH_COMMON=m
3536 +CONFIG_CRYPTO_SERPENT=m
3537 +CONFIG_CRYPTO_AES=m
3538 +CONFIG_CRYPTO_CAST5=m
3539 +CONFIG_CRYPTO_CAST6=m
3540 +CONFIG_CRYPTO_TEA=m
3541 +CONFIG_CRYPTO_ARC4=m
3542 +CONFIG_CRYPTO_KHAZAD=m
3543 +CONFIG_CRYPTO_ANUBIS=m
3544 +# CONFIG_CRYPTO_SEED is not set
3545 +CONFIG_CRYPTO_DEFLATE=m
3546 +CONFIG_CRYPTO_MICHAEL_MIC=m
3547 +CONFIG_CRYPTO_CRC32C=m
3548 +CONFIG_CRYPTO_CAMELLIA=m
3549 +CONFIG_CRYPTO_TEST=m
3550 +# CONFIG_CRYPTO_AUTHENC is not set
3551 +CONFIG_CRYPTO_HW=y
3552 +
3553 +#
3554 +# Library routines
3555 +#
3556 +CONFIG_BITREVERSE=y
3557 +CONFIG_CRC_CCITT=m
3558 +CONFIG_CRC16=m
3559 +# CONFIG_CRC_ITU_T is not set
3560 +CONFIG_CRC32=y
3561 +# CONFIG_CRC7 is not set
3562 +CONFIG_LIBCRC32C=m
3563 +CONFIG_ZLIB_INFLATE=y
3564 +CONFIG_ZLIB_DEFLATE=y
3565 +CONFIG_TEXTSEARCH=y
3566 +CONFIG_TEXTSEARCH_KMP=m
3567 +CONFIG_TEXTSEARCH_BM=m
3568 +CONFIG_TEXTSEARCH_FSM=m
3569 +CONFIG_PLIST=y
3570 +CONFIG_HAS_IOMEM=y
3571 +CONFIG_HAS_DMA=y
3572 Index: linux-2.6.24.7/arch/arm/Kconfig
3573 ===================================================================
3574 --- linux-2.6.24.7.orig/arch/arm/Kconfig        2008-12-11 22:46:07.000000000 +0100
3575 +++ linux-2.6.24.7/arch/arm/Kconfig     2008-12-11 22:46:48.000000000 +0100
3576 @@ -865,6 +865,13 @@ config KEXEC
3577           initially work for you.  It may help to enable device hotplugging
3578           support.
3579
3580 +config ATAGS_PROC
3581 +       bool "Export atags in procfs"
3582 +       default n
3583 +       help
3584 +         Should the atags used to boot the kernel be exported in an "atags"
3585 +         file in procfs. Useful with kexec.
3586 +
3587  endmenu
3588
3589  if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
3590 @@ -1064,6 +1071,8 @@ source "drivers/hid/Kconfig"
3591
3592  source "drivers/usb/Kconfig"
3593
3594 +source "drivers/sdio/Kconfig"
3595 +
3596  source "drivers/mmc/Kconfig"
3597
3598  source "drivers/leds/Kconfig"
3599 Index: linux-2.6.24.7/arch/arm/kernel/atags.c
3600 ===================================================================
3601 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
3602 +++ linux-2.6.24.7/arch/arm/kernel/atags.c      2008-12-11 22:46:48.000000000 +0100
3603 @@ -0,0 +1,86 @@
3604 +#include <linux/slab.h>
3605 +#include <linux/kexec.h>
3606 +#include <linux/proc_fs.h>
3607 +#include <asm/setup.h>
3608 +#include <asm/types.h>
3609 +#include <asm/page.h>
3610 +
3611 +struct buffer {
3612 +       size_t size;
3613 +       char *data;
3614 +};
3615 +static struct buffer tags_buffer;
3616 +
3617 +static int
3618 +read_buffer(char* page, char** start, off_t off, int count,
3619 +       int* eof, void* data)
3620 +{
3621 +       struct buffer *buffer = (struct buffer *)data;
3622 +
3623 +       if (off >= buffer->size) {
3624 +               *eof = 1;
3625 +               return 0;
3626 +       }
3627 +
3628 +       count = min((int) (buffer->size - off), count);
3629 +
3630 +       memcpy(page, &buffer->data[off], count);
3631 +
3632 +       return count;
3633 +}
3634 +
3635 +
3636 +static int
3637 +create_proc_entries(void)
3638 +{
3639 +       struct proc_dir_entry* tags_entry;
3640 +
3641 +       tags_entry = create_proc_read_entry("atags", 0400, &proc_root, read_buffer, &tags_buffer);
3642 +       if (!tags_entry)
3643 +               return -ENOMEM;
3644 +
3645 +       return 0;
3646 +}
3647 +
3648 +
3649 +static char __initdata atags_copy_buf[KEXEC_BOOT_PARAMS_SIZE];
3650 +static char __initdata *atags_copy;
3651 +
3652 +void __init save_atags(const struct tag *tags)
3653 +{
3654 +       atags_copy = atags_copy_buf;
3655 +       memcpy(atags_copy, tags, KEXEC_BOOT_PARAMS_SIZE);
3656 +}
3657 +
3658 +
3659 +static int __init init_atags_procfs(void)
3660 +{
3661 +       struct tag *tag;
3662 +       int error;
3663 +
3664 +       if (!atags_copy) {
3665 +               printk(KERN_WARNING "Exporting ATAGs: No saved tags found\n");
3666 +               return -EIO;
3667 +       }
3668 +
3669 +       for (tag = (struct tag *) atags_copy; tag->hdr.size; tag = tag_next(tag))
3670 +               ;
3671 +
3672 +       tags_buffer.size = ((char *) tag - atags_copy) + sizeof(tag->hdr);
3673 +       tags_buffer.data = kmalloc(tags_buffer.size, GFP_KERNEL);
3674 +       if (tags_buffer.data == NULL)
3675 +               return -ENOMEM;
3676 +       memcpy(tags_buffer.data, atags_copy, tags_buffer.size);
3677 +
3678 +       error = create_proc_entries();
3679 +       if (error) {
3680 +               printk(KERN_ERR "Exporting ATAGs: not enough memory\n");
3681 +               kfree(tags_buffer.data);
3682 +               tags_buffer.size = 0;
3683 +               tags_buffer.data = NULL;
3684 +       }
3685 +
3686 +       return error;
3687 +}
3688 +
3689 +arch_initcall(init_atags_procfs);
3690 Index: linux-2.6.24.7/arch/arm/kernel/atags.h
3691 ===================================================================
3692 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
3693 +++ linux-2.6.24.7/arch/arm/kernel/atags.h      2008-12-11 22:46:48.000000000 +0100
3694 @@ -0,0 +1,5 @@
3695 +#ifdef CONFIG_ATAGS_PROC
3696 +extern void save_atags(struct tag *tags);
3697 +#else
3698 +static inline void save_atags(struct tag *tags) { }
3699 +#endif
3700 Index: linux-2.6.24.7/arch/arm/kernel/machine_kexec.c
3701 ===================================================================
3702 --- linux-2.6.24.7.orig/arch/arm/kernel/machine_kexec.c 2008-12-11 22:46:07.000000000 +0100
3703 +++ linux-2.6.24.7/arch/arm/kernel/machine_kexec.c      2008-12-11 22:46:48.000000000 +0100
3704 @@ -21,6 +21,7 @@ extern void setup_mm_for_reboot(char mod
3705  extern unsigned long kexec_start_address;
3706  extern unsigned long kexec_indirection_page;
3707  extern unsigned long kexec_mach_type;
3708 +extern unsigned long kexec_boot_atags;
3709
3710  /*
3711   * Provide a dummy crash_notes definition while crash dump arrives to arm.
3712 @@ -62,6 +63,7 @@ void machine_kexec(struct kimage *image)
3713         kexec_start_address = image->start;
3714         kexec_indirection_page = page_list;
3715         kexec_mach_type = machine_arch_type;
3716 +       kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
3717
3718         /* copy our kernel relocation code to the control code page */
3719         memcpy(reboot_code_buffer,
3720 Index: linux-2.6.24.7/arch/arm/kernel/Makefile
3721 ===================================================================
3722 --- linux-2.6.24.7.orig/arch/arm/kernel/Makefile        2008-12-11 22:46:07.000000000 +0100
3723 +++ linux-2.6.24.7/arch/arm/kernel/Makefile     2008-12-11 22:46:48.000000000 +0100
3724 @@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA)         += dma-isa.o
3725  obj-$(CONFIG_PCI)              += bios32.o isa.o
3726  obj-$(CONFIG_SMP)              += smp.o
3727  obj-$(CONFIG_KEXEC)            += machine_kexec.o relocate_kernel.o
3728 +obj-$(CONFIG_ATAGS_PROC)       += atags.o
3729  obj-$(CONFIG_OABI_COMPAT)      += sys_oabi-compat.o
3730
3731  obj-$(CONFIG_CRUNCH)           += crunch.o crunch-bits.o
3732 Index: linux-2.6.24.7/arch/arm/kernel/relocate_kernel.S
3733 ===================================================================
3734 --- linux-2.6.24.7.orig/arch/arm/kernel/relocate_kernel.S       2008-12-11 22:46:07.000000000 +0100
3735 +++ linux-2.6.24.7/arch/arm/kernel/relocate_kernel.S    2008-12-11 22:46:48.000000000 +0100
3736 @@ -7,23 +7,6 @@
3737         .globl relocate_new_kernel
3738  relocate_new_kernel:
3739
3740 -       /* Move boot params back to where the kernel expects them */
3741 -
3742 -       ldr     r0,kexec_boot_params_address
3743 -       teq     r0,#0
3744 -       beq     8f
3745 -
3746 -       ldr     r1,kexec_boot_params_copy
3747 -       mov     r6,#KEXEC_BOOT_PARAMS_SIZE/4
3748 -7:
3749 -       ldr     r5,[r1],#4
3750 -       str     r5,[r0],#4
3751 -       subs    r6,r6,#1
3752 -       bne     7b
3753 -
3754 -8:
3755 -       /* Boot params moved, now go on with the kernel */
3756 -
3757         ldr     r0,kexec_indirection_page
3758         ldr     r1,kexec_start_address
3759
3760 @@ -67,7 +50,7 @@ relocate_new_kernel:
3761         mov lr,r1
3762         mov r0,#0
3763         ldr r1,kexec_mach_type
3764 -       ldr r2,kexec_boot_params_address
3765 +       ldr r2,kexec_boot_atags
3766         mov pc,lr
3767
3768         .globl kexec_start_address
3769 @@ -82,14 +65,9 @@ kexec_indirection_page:
3770  kexec_mach_type:
3771         .long   0x0
3772
3773 -       /* phy addr where new kernel will expect to find boot params */
3774 -       .globl kexec_boot_params_address
3775 -kexec_boot_params_address:
3776 -       .long   0x0
3777 -
3778 -       /* phy addr where old kernel put a copy of orig boot params */
3779 -       .globl kexec_boot_params_copy
3780 -kexec_boot_params_copy:
3781 +       /* phy addr of the atags for the new kernel */
3782 +       .globl kexec_boot_atags
3783 +kexec_boot_atags:
3784         .long   0x0
3785
3786  relocate_new_kernel_end:
3787 Index: linux-2.6.24.7/arch/arm/kernel/setup.c
3788 ===================================================================
3789 --- linux-2.6.24.7.orig/arch/arm/kernel/setup.c 2008-12-11 22:46:07.000000000 +0100
3790 +++ linux-2.6.24.7/arch/arm/kernel/setup.c      2008-12-11 22:46:48.000000000 +0100
3791 @@ -24,7 +24,6 @@
3792  #include <linux/interrupt.h>
3793  #include <linux/smp.h>
3794  #include <linux/fs.h>
3795 -#include <linux/kexec.h>
3796
3797  #include <asm/cpu.h>
3798  #include <asm/elf.h>
3799 @@ -39,6 +38,7 @@
3800  #include <asm/mach/time.h>
3801
3802  #include "compat.h"
3803 +#include "atags.h"
3804
3805  #ifndef MEM_SIZE
3806  #define MEM_SIZE       (16*1024*1024)
3807 @@ -784,23 +784,6 @@ static int __init customize_machine(void
3808  }
3809  arch_initcall(customize_machine);
3810
3811 -#ifdef CONFIG_KEXEC
3812 -
3813 -/* Physical addr of where the boot params should be for this machine */
3814 -extern unsigned long kexec_boot_params_address;
3815 -
3816 -/* Physical addr of the buffer into which the boot params are copied */
3817 -extern unsigned long kexec_boot_params_copy;
3818 -
3819 -/* Pointer to the boot params buffer, for manipulation and display */
3820 -unsigned long kexec_boot_params;
3821 -EXPORT_SYMBOL(kexec_boot_params);
3822 -
3823 -/* The buffer itself - make sure it is sized correctly */
3824 -static unsigned long kexec_boot_params_buf[(KEXEC_BOOT_PARAMS_SIZE + 3) / 4];
3825 -
3826 -#endif
3827 -
3828  void __init setup_arch(char **cmdline_p)
3829  {
3830         struct tag *tags = (struct tag *)&init_tags;
3831 @@ -819,18 +802,6 @@ void __init setup_arch(char **cmdline_p)
3832         else if (mdesc->boot_params)
3833                 tags = phys_to_virt(mdesc->boot_params);
3834
3835 -#ifdef CONFIG_KEXEC
3836 -       kexec_boot_params_copy = virt_to_phys(kexec_boot_params_buf);
3837 -       kexec_boot_params = (unsigned long)kexec_boot_params_buf;
3838 -       if (__atags_pointer) {
3839 -               kexec_boot_params_address = __atags_pointer;
3840 -               memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
3841 -       } else if (mdesc->boot_params) {
3842 -               kexec_boot_params_address = mdesc->boot_params;
3843 -               memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE);
3844 -       }
3845 -#endif
3846 -
3847         /*
3848          * If we have the old style parameters, convert them to
3849          * a tag list.
3850 @@ -846,6 +817,7 @@ void __init setup_arch(char **cmdline_p)
3851         if (tags->hdr.tag == ATAG_CORE) {
3852                 if (meminfo.nr_banks != 0)
3853                         squash_mem_tags(tags);
3854 +               save_atags(tags);
3855                 parse_tags(tags);
3856         }
3857
3858 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/Kconfig
3859 ===================================================================
3860 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/Kconfig   2008-12-11 22:46:07.000000000 +0100
3861 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/Kconfig        2008-12-11 22:46:48.000000000 +0100
3862 @@ -9,6 +9,7 @@ config CPU_S3C2410
3863         depends on ARCH_S3C2410
3864         select S3C2410_CLOCK
3865         select S3C2410_GPIO
3866 +       select S3C2410_PWM
3867         select CPU_LLSERIAL_S3C2410
3868         select S3C2410_PM if PM
3869         help
3870 @@ -37,6 +38,11 @@ config S3C2410_CLOCK
3871         help
3872           Clock code for the S3C2410, and similar processors
3873
3874 +config S3C2410_PWM
3875 +       bool
3876 +       help
3877 +         PWM timer code for the S3C2410, and similar processors
3878 +
3879
3880  menu "S3C2410 Machines"
3881
3882 @@ -107,8 +113,17 @@ config MACH_VR1000
3883  config MACH_QT2410
3884         bool "QT2410"
3885         select CPU_S3C2410
3886 +       select DISPLAY_JBT6K74
3887         help
3888            Say Y here if you are using the Armzone QT2410
3889
3890 +config MACH_NEO1973_GTA01
3891 +       bool "FIC Neo1973 GSM Phone (GTA01 Hardware)"
3892 +       select CPU_S3C2410
3893 +       select MACH_NEO1973
3894 +       select SENSORS_PCF50606
3895 +       help
3896 +          Say Y here if you are using the FIC Neo1973 GSM Phone
3897 +
3898  endmenu
3899
3900 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-gta01.c
3901 ===================================================================
3902 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
3903 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-gta01.c   2008-12-11 22:46:48.000000000 +0100
3904 @@ -0,0 +1,763 @@
3905 +/*
3906 + * linux/arch/arm/mach-s3c2410/mach-gta01.c
3907 + *
3908 + * S3C2410 Machine Support for the FIC Neo1973 GTA01
3909 + *
3910 + * Copyright (C) 2006-2007 by Openmoko, Inc.
3911 + * Author: Harald Welte <laforge@openmoko.org>
3912 + * All rights reserved.
3913 + *
3914 + * This program is free software; you can redistribute it and/or
3915 + * modify it under the terms of the GNU General Public License as
3916 + * published by the Free Software Foundation; either version 2 of
3917 + * the License, or (at your option) any later version.
3918 + *
3919 + * This program is distributed in the hope that it will be useful,
3920 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3921 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
3922 + * GNU General Public License for more details.
3923 + *
3924 + * You should have received a copy of the GNU General Public License
3925 + * along with this program; if not, write to the Free Software
3926 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
3927 + * MA 02111-1307 USA
3928 + *
3929 + */
3930 +
3931 +#include <linux/kernel.h>
3932 +#include <linux/types.h>
3933 +#include <linux/interrupt.h>
3934 +#include <linux/list.h>
3935 +#include <linux/timer.h>
3936 +#include <linux/init.h>
3937 +#include <linux/workqueue.h>
3938 +#include <linux/platform_device.h>
3939 +#include <linux/serial_core.h>
3940 +#include <asm/arch/ts.h>
3941 +#include <linux/spi/spi.h>
3942 +#include <linux/spi/spi_bitbang.h>
3943 +#include <linux/mmc/mmc.h>
3944 +#include <linux/mmc/host.h>
3945 +
3946 +#include <linux/mtd/mtd.h>
3947 +#include <linux/mtd/nand.h>
3948 +#include <linux/mtd/nand_ecc.h>
3949 +#include <linux/mtd/partitions.h>
3950 +
3951 +#include <linux/mmc/host.h>
3952 +
3953 +#include <linux/pcf50606.h>
3954 +
3955 +#include <asm/mach/arch.h>
3956 +#include <asm/mach/map.h>
3957 +#include <asm/mach/irq.h>
3958 +
3959 +#include <asm/hardware.h>
3960 +#include <asm/io.h>
3961 +#include <asm/irq.h>
3962 +#include <asm/mach-types.h>
3963 +
3964 +#include <asm/arch/regs-gpio.h>
3965 +#include <asm/arch/fb.h>
3966 +#include <asm/arch/mci.h>
3967 +#include <asm/arch/spi.h>
3968 +#include <asm/arch/spi-gpio.h>
3969 +#include <asm/arch/usb-control.h>
3970 +
3971 +#include <asm/arch/gta01.h>
3972 +
3973 +#include <asm/plat-s3c/regs-serial.h>
3974 +#include <asm/plat-s3c/nand.h>
3975 +#include <asm/plat-s3c24xx/devs.h>
3976 +#include <asm/plat-s3c24xx/cpu.h>
3977 +#include <asm/plat-s3c24xx/pm.h>
3978 +#include <asm/plat-s3c24xx/udc.h>
3979 +#include <asm/plat-s3c24xx/neo1973.h>
3980 +#include <asm/arch-s3c2410/neo1973-pm-gsm.h>
3981 +
3982 +#include "../plat-s3c24xx/neo1973_pm_gps.h"
3983 +
3984 +#include <linux/jbt6k74.h>
3985 +
3986 +static struct map_desc gta01_iodesc[] __initdata = {
3987 +       {
3988 +               .virtual        = 0xe0000000,
3989 +               .pfn            = __phys_to_pfn(S3C2410_CS3+0x01000000),
3990 +               .length         = SZ_1M,
3991 +               .type           = MT_DEVICE
3992 +       },
3993 +};
3994 +
3995 +#define UCON S3C2410_UCON_DEFAULT
3996 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
3997 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
3998 +/* UFCON for the gta01 sets the FIFO trigger level at 4, not 8 */
3999 +#define UFCON_GTA01_PORT0 S3C2410_UFCON_FIFOMODE
4000 +
4001 +static struct s3c2410_uartcfg gta01_uartcfgs[] = {
4002 +       [0] = {
4003 +               .hwport      = 0,
4004 +               .flags       = 0,
4005 +               .ucon        = UCON,
4006 +               .ulcon       = ULCON,
4007 +               .ufcon       = UFCON_GTA01_PORT0,
4008 +       },
4009 +       [1] = {
4010 +               .hwport      = 1,
4011 +               .flags       = 0,
4012 +               .ucon        = UCON,
4013 +               .ulcon       = ULCON,
4014 +               .ufcon       = UFCON,
4015 +       },
4016 +};
4017 +
4018 +/* PMU driver info */
4019 +
4020 +static int pmu_callback(struct device *dev, unsigned int feature,
4021 +                       enum pmu_event event)
4022 +{
4023 +       switch (feature) {
4024 +       case PCF50606_FEAT_ACD:
4025 +               switch (event) {
4026 +               case PMU_EVT_INSERT:
4027 +                       pcf50606_charge_fast(pcf50606_global, 1);
4028 +                       break;
4029 +               case PMU_EVT_REMOVE:
4030 +                       pcf50606_charge_fast(pcf50606_global, 0);
4031 +                       break;
4032 +               default:
4033 +                       break;
4034 +               }
4035 +               break;
4036 +       default:
4037 +               break;
4038 +       }
4039 +
4040 +       return 0;
4041 +}
4042 +
4043 +static struct pcf50606_platform_data gta01_pcf_pdata = {
4044 +       .used_features  = PCF50606_FEAT_EXTON |
4045 +                         PCF50606_FEAT_MBC |
4046 +                         PCF50606_FEAT_BBC |
4047 +                         PCF50606_FEAT_RTC |
4048 +                         PCF50606_FEAT_WDT |
4049 +                         PCF50606_FEAT_CHGCUR |
4050 +                         PCF50606_FEAT_BATVOLT |
4051 +                         PCF50606_FEAT_BATTEMP,
4052 +       .onkey_seconds_required = 3,
4053 +       .cb             = &pmu_callback,
4054 +       .r_fix_batt     = 10000,
4055 +       .r_fix_batt_par = 10000,
4056 +       .r_sense_milli  = 220,
4057 +       .rails  = {
4058 +               [PCF50606_REGULATOR_D1REG] = {
4059 +                       .name           = "bt_3v15",
4060 +                       .voltage        = {
4061 +                               .init   = 3150,
4062 +                               .max    = 3150,
4063 +                       },
4064 +               },
4065 +               [PCF50606_REGULATOR_D2REG] = {
4066 +                       .name           = "gl_2v5",
4067 +                       .voltage        = {
4068 +                               .init   = 2500,
4069 +                               .max    = 2500,
4070 +                       },
4071 +               },
4072 +               [PCF50606_REGULATOR_D3REG] = {
4073 +                       .name           = "stby_1v8",
4074 +                       .flags          = PMU_VRAIL_F_SUSPEND_ON,
4075 +                       .voltage        = {
4076 +                               .init   = 1800,
4077 +                               .max    = 2100,
4078 +                       },
4079 +               },
4080 +               [PCF50606_REGULATOR_DCD] = {
4081 +                       .name           = "gl_1v5",
4082 +                       .voltage        = {
4083 +                               .init   = 1500,
4084 +                               .max    = 1500,
4085 +                       },
4086 +               },
4087 +               [PCF50606_REGULATOR_DCDE] = {
4088 +                       .name           = "io_3v3",
4089 +                       .flags          = PMU_VRAIL_F_SUSPEND_ON,
4090 +                       .voltage        = {
4091 +                               .init   = 3300,
4092 +                               .max    = 3330,
4093 +                       },
4094 +               },
4095 +               [PCF50606_REGULATOR_DCUD] = {
4096 +                       .name           = "core_1v8",
4097 +                       .flags          = PMU_VRAIL_F_SUSPEND_ON,
4098 +                       .voltage        = {
4099 +                               .init   = 2100,
4100 +                               .max    = 2100,
4101 +                       },
4102 +               },
4103 +               [PCF50606_REGULATOR_IOREG] = {
4104 +                       .name           = "codec_3v3",
4105 +                       .voltage        = {
4106 +                               .init   = 3300,
4107 +                               .max    = 3300,
4108 +                       },
4109 +               },
4110 +               [PCF50606_REGULATOR_LPREG] = {
4111 +                       .name           = "lcm_3v3",
4112 +                       .voltage        = {
4113 +                               .init   = 3300,
4114 +                               .max    = 3300,
4115 +                       },
4116 +               }
4117 +       },
4118 +};
4119 +
4120 +static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name,
4121 +                         unsigned int flags, unsigned int init,
4122 +                         unsigned int max)
4123 +{
4124 +       vrail->name = name;
4125 +       vrail->flags = flags;
4126 +       vrail->voltage.init = init;
4127 +       vrail->voltage.max = max;
4128 +}
4129 +
4130 +static void mangle_pmu_pdata_by_system_rev(void)
4131 +{
4132 +       switch (system_rev) {
4133 +       case GTA01Bv4_SYSTEM_REV:
4134 +               gta01_pcf_pdata.used_features |= PCF50606_FEAT_ACD;
4135 +               break;
4136 +       case GTA01Bv3_SYSTEM_REV:
4137 +       case GTA01Bv2_SYSTEM_REV:
4138 +               gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
4139 +                                       .name = "user1";
4140 +               gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
4141 +                                       .flags &= ~PMU_VRAIL_F_SUSPEND_ON;
4142 +               gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG]
4143 +                                       .flags = PMU_VRAIL_F_UNUSED;
4144 +               break;
4145 +       case GTA01v4_SYSTEM_REV:
4146 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
4147 +                             "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
4148 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
4149 +                             "vrf_3v", 0, 3000, 3000);
4150 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
4151 +                             "vtcxo_2v8", 0, 2800, 2800);
4152 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
4153 +                             "gl_3v5", 0, 3500, 3500);
4154 +               break;
4155 +       case GTA01v3_SYSTEM_REV:
4156 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG],
4157 +                             "vrf_3v", 0, 3000, 3000);
4158 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D2REG],
4159 +                             "sd_3v3", 0, 3300, 3300);
4160 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG],
4161 +                             "codec_3v3", 0, 3300, 3300);
4162 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCD],
4163 +                             "gpsio_3v3", 0, 3300, 3300);
4164 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD],
4165 +                             "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800);
4166 +               cfg_pmu_vrail(&gta01_pcf_pdata.rails[PCF50606_REGULATOR_IOREG],
4167 +                             "vtcxo_2v8", 0, 2800, 2800);
4168 +               break;
4169 +       }
4170 +}
4171 +
4172 +static struct resource gta01_pmu_resources[] = {
4173 +       [0] = {
4174 +               .flags  = IORESOURCE_IRQ,
4175 +               .start  = GTA01_IRQ_PCF50606,
4176 +               .end    = GTA01_IRQ_PCF50606,
4177 +       },
4178 +};
4179 +
4180 +struct platform_device gta01_pmu_dev = {
4181 +       .name           = "pcf50606",
4182 +       .num_resources  = ARRAY_SIZE(gta01_pmu_resources),
4183 +       .resource       = gta01_pmu_resources,
4184 +       .dev            = {
4185 +               .platform_data = &gta01_pcf_pdata,
4186 +       },
4187 +};
4188 +
4189 +/* LCD driver info */
4190 +
4191 +/* Configuration for 480x640 toppoly TD028TTEC1.
4192 + * Do not mark this as __initdata or it will break! */
4193 +static struct s3c2410fb_display gta01_displays[] =  {
4194 +       {
4195 +               .type           = S3C2410_LCDCON1_TFT,
4196 +               .width          = 43,
4197 +               .height         = 58,
4198 +               .xres           = 480,
4199 +               .yres           = 640,
4200 +               .bpp            = 16,
4201 +
4202 +               .pixclock       = 40000,        /* HCLK/4 */
4203 +               .left_margin    = 104,
4204 +               .right_margin   = 8,
4205 +               .hsync_len      = 8,
4206 +               .upper_margin   = 2,
4207 +               .lower_margin   = 16,
4208 +               .vsync_len      = 2,
4209 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
4210 +                                 S3C2410_LCDCON5_INVVCLK |
4211 +                                 S3C2410_LCDCON5_INVVLINE |
4212 +                                 S3C2410_LCDCON5_INVVFRAME |
4213 +                                 S3C2410_LCDCON5_PWREN |
4214 +                                 S3C2410_LCDCON5_HWSWP,
4215 +       },
4216 +       {
4217 +               .type           = S3C2410_LCDCON1_TFT,
4218 +               .width          = 43,
4219 +               .height         = 58,
4220 +               .xres           = 480,
4221 +               .yres           = 640,
4222 +               .bpp            = 32,
4223 +
4224 +               .pixclock       = 40000,        /* HCLK/4 */
4225 +               .left_margin    = 104,
4226 +               .right_margin   = 8,
4227 +               .hsync_len      = 8,
4228 +               .upper_margin   = 2,
4229 +               .lower_margin   = 16,
4230 +               .vsync_len      = 2,
4231 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
4232 +                                 S3C2410_LCDCON5_INVVCLK |
4233 +                                 S3C2410_LCDCON5_INVVLINE |
4234 +                                 S3C2410_LCDCON5_INVVFRAME |
4235 +                                 S3C2410_LCDCON5_PWREN |
4236 +                                 S3C2410_LCDCON5_HWSWP,
4237 +       },
4238 +       {
4239 +               .type           = S3C2410_LCDCON1_TFT,
4240 +               .width          = 43,
4241 +               .height         = 58,
4242 +               .xres           = 240,
4243 +               .yres           = 320,
4244 +               .bpp            = 16,
4245 +
4246 +               .pixclock       = 40000,        /* HCLK/4 */
4247 +               .left_margin    = 104,
4248 +               .right_margin   = 8,
4249 +               .hsync_len      = 8,
4250 +               .upper_margin   = 2,
4251 +               .lower_margin   = 16,
4252 +               .vsync_len      = 2,
4253 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
4254 +                                 S3C2410_LCDCON5_INVVCLK |
4255 +                                 S3C2410_LCDCON5_INVVLINE |
4256 +                                 S3C2410_LCDCON5_INVVFRAME |
4257 +                                 S3C2410_LCDCON5_PWREN |
4258 +                                 S3C2410_LCDCON5_HWSWP,
4259 +       },
4260 +};
4261 +
4262 +static struct s3c2410fb_mach_info gta01_lcd_cfg __initdata = {
4263 +       .displays       = gta01_displays,
4264 +       .num_displays   = ARRAY_SIZE(gta01_displays),
4265 +       .default_display = 0,
4266 +
4267 +       .lpcsel         = ((0xCE6) & ~7) | 1<<4,
4268 +};
4269 +
4270 +static struct platform_device *gta01_devices[] __initdata = {
4271 +       &s3c_device_usb,
4272 +       &s3c_device_lcd,
4273 +       &s3c_device_wdt,
4274 +       &s3c_device_i2c,
4275 +       &s3c_device_iis,
4276 +       &s3c_device_sdi,
4277 +       &s3c_device_usbgadget,
4278 +       &s3c_device_nand,
4279 +       &s3c_device_ts,
4280 +};
4281 +
4282 +static struct s3c2410_nand_set gta01_nand_sets[] = {
4283 +       [0] = {
4284 +               .name           = "neo1973-nand",
4285 +               .nr_chips       = 1,
4286 +               .flags          = S3C2410_NAND_BBT,
4287 +       },
4288 +};
4289 +
4290 +static struct s3c2410_platform_nand gta01_nand_info = {
4291 +       .tacls          = 20,
4292 +       .twrph0         = 60,
4293 +       .twrph1         = 20,
4294 +       .nr_sets        = ARRAY_SIZE(gta01_nand_sets),
4295 +       .sets           = gta01_nand_sets,
4296 +};
4297 +
4298 +static void gta01_mmc_set_power(unsigned char power_mode, unsigned short vdd)
4299 +{
4300 +       int bit;
4301 +       int mv = 1700; /* 1.7V for MMC_VDD_165_195 */
4302 +
4303 +       printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u)\n",
4304 +              power_mode, vdd);
4305 +
4306 +       switch (system_rev) {
4307 +       case GTA01v3_SYSTEM_REV:
4308 +               switch (power_mode) {
4309 +               case MMC_POWER_OFF:
4310 +                       pcf50606_onoff_set(pcf50606_global,
4311 +                                          PCF50606_REGULATOR_D2REG, 0);
4312 +                       break;
4313 +               case MMC_POWER_ON:
4314 +                       /* translate MMC_VDD_* VDD bit to mv */
4315 +                       for (bit = 8; bit != 24; bit++)
4316 +                               if (vdd == (1 << bit))
4317 +                                       mv += 100 * (bit - 4);
4318 +                       pcf50606_voltage_set(pcf50606_global,
4319 +                                            PCF50606_REGULATOR_D2REG, mv);
4320 +                       pcf50606_onoff_set(pcf50606_global,
4321 +                                          PCF50606_REGULATOR_D2REG, 1);
4322 +                       break;
4323 +               }
4324 +               break;
4325 +       case GTA01v4_SYSTEM_REV:
4326 +       case GTA01Bv2_SYSTEM_REV:
4327 +       case GTA01Bv3_SYSTEM_REV:
4328 +       case GTA01Bv4_SYSTEM_REV:
4329 +               switch (power_mode) {
4330 +               case MMC_POWER_OFF:
4331 +                       neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 1);
4332 +                       break;
4333 +               case MMC_POWER_ON:
4334 +                       neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 0);
4335 +                       break;
4336 +               }
4337 +               break;
4338 +       }
4339 +}
4340 +
4341 +static int gta01_mmc_use_slow(void)
4342 +{
4343 +       return neo1973_pm_gps_is_on();
4344 +}
4345 +
4346 +static struct s3c24xx_mci_pdata gta01_mmc_cfg = {
4347 +       .gpio_detect    = GTA01_GPIO_nSD_DETECT,
4348 +       .set_power      = &gta01_mmc_set_power,
4349 +       .use_slow       = &gta01_mmc_use_slow,
4350 +       .ocr_avail      = MMC_VDD_165_195|MMC_VDD_20_21|
4351 +                         MMC_VDD_21_22|MMC_VDD_22_23|MMC_VDD_23_24|
4352 +                         MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
4353 +                         MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
4354 +                         MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33,
4355 +};
4356 +
4357 +static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
4358 +{
4359 +       printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
4360 +
4361 +       switch (cmd) {
4362 +       case S3C2410_UDC_P_ENABLE:
4363 +               neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 1);
4364 +               break;
4365 +       case S3C2410_UDC_P_DISABLE:
4366 +               neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 0);
4367 +               break;
4368 +       default:
4369 +               break;
4370 +       }
4371 +}
4372 +
4373 +/* use a work queue, since I2C API inherently schedules
4374 + * and we get called in hardirq context from UDC driver */
4375 +
4376 +struct vbus_draw {
4377 +       struct work_struct work;
4378 +       int ma;
4379 +};
4380 +static struct vbus_draw gta01_udc_vbus_drawer;
4381 +
4382 +static void __gta01_udc_vbus_draw(struct work_struct *work)
4383 +{
4384 +       /* this is a fix to work around boot-time ordering problems if the
4385 +        * s3c2410_udc is initialized before the pcf50606 driver has defined
4386 +        * pcf50606_global */
4387 +       if (!pcf50606_global)
4388 +               return;
4389 +
4390 +       if (gta01_udc_vbus_drawer.ma >= 500) {
4391 +               /* enable fast charge */
4392 +               printk(KERN_DEBUG "udc: enabling fast charge\n");
4393 +               pcf50606_charge_fast(pcf50606_global, 1);
4394 +       } else {
4395 +               /* disable fast charge */
4396 +               printk(KERN_DEBUG "udc: disabling fast charge\n");
4397 +               pcf50606_charge_fast(pcf50606_global, 0);
4398 +       }
4399 +}
4400 +
4401 +static void gta01_udc_vbus_draw(unsigned int ma)
4402 +{
4403 +       gta01_udc_vbus_drawer.ma = ma;
4404 +       schedule_work(&gta01_udc_vbus_drawer.work);
4405 +}
4406 +
4407 +static struct s3c2410_udc_mach_info gta01_udc_cfg = {
4408 +       .vbus_draw      = gta01_udc_vbus_draw,
4409 +};
4410 +
4411 +static struct s3c2410_ts_mach_info gta01_ts_cfg = {
4412 +       .delay = 10000,
4413 +       .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
4414 +       /* simple averaging, 2^n samples */
4415 +       .oversampling_shift = 5,
4416 +       /* averaging filter length, 2^n */
4417 +       .excursion_filter_len_bits = 5,
4418 +       /* flagged for beauty contest on next sample if differs from
4419 +        * average more than this
4420 +        */
4421 +       .reject_threshold_vs_avg = 2,
4422 +};
4423 +
4424 +/* SPI */
4425 +
4426 +static void gta01_jbt6k74_reset(int devidx, int level)
4427 +{
4428 +       /* empty place holder; gta01 does not yet use this */
4429 +       printk(KERN_DEBUG "gta01_jbt6k74_reset\n");
4430 +}
4431 +
4432 +static void gta01_jbt6k74_resuming(int devidx)
4433 +{
4434 +       gta01bl_deferred_resume();
4435 +}
4436 +
4437 +const struct jbt6k74_platform_data gta01_jbt6k74_pdata = {
4438 +       .reset          = gta01_jbt6k74_reset,
4439 +       .resuming       = gta01_jbt6k74_resuming,
4440 +};
4441 +
4442 +static struct spi_board_info gta01_spi_board_info[] = {
4443 +       {
4444 +               .modalias       = "jbt6k74",
4445 +               .platform_data  = &gta01_jbt6k74_pdata,
4446 +               /* controller_data */
4447 +               /* irq */
4448 +               .max_speed_hz   = 10 * 1000 * 1000,
4449 +               .bus_num        = 1,
4450 +               /* chip_select */
4451 +       },
4452 +};
4453 +
4454 +static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
4455 +{
4456 +       switch (cs) {
4457 +       case BITBANG_CS_ACTIVE:
4458 +               s3c2410_gpio_setpin(S3C2410_GPG3, 0);
4459 +               break;
4460 +       case BITBANG_CS_INACTIVE:
4461 +               s3c2410_gpio_setpin(S3C2410_GPG3, 1);
4462 +               break;
4463 +       }
4464 +}
4465 +
4466 +static struct s3c2410_spigpio_info spi_gpio_cfg = {
4467 +       .pin_clk        = S3C2410_GPG7,
4468 +       .pin_mosi       = S3C2410_GPG6,
4469 +       .pin_miso       = S3C2410_GPG5,
4470 +       .board_size     = ARRAY_SIZE(gta01_spi_board_info),
4471 +       .board_info     = gta01_spi_board_info,
4472 +       .chip_select    = &spi_gpio_cs,
4473 +       .num_chipselect = 2,   /*** Should be 1 or 2 for gta01? ***/
4474 +};
4475 +
4476 +static struct resource s3c_spi_lcm_resource[] = {
4477 +       [0] = {
4478 +               .start = S3C2410_GPG3,
4479 +               .end   = S3C2410_GPG3,
4480 +       },
4481 +       [1] = {
4482 +               .start = S3C2410_GPG5,
4483 +               .end   = S3C2410_GPG5,
4484 +       },
4485 +       [2] = {
4486 +               .start = S3C2410_GPG6,
4487 +               .end   = S3C2410_GPG6,
4488 +       },
4489 +       [3] = {
4490 +               .start = S3C2410_GPG7,
4491 +               .end   = S3C2410_GPG7,
4492 +       },
4493 +};
4494 +
4495 +struct platform_device s3c_device_spi_lcm = {
4496 +       .name             = "spi_s3c24xx_gpio",
4497 +       .id               = 1,
4498 +       .num_resources    = ARRAY_SIZE(s3c_spi_lcm_resource),
4499 +       .resource         = s3c_spi_lcm_resource,
4500 +       .dev = {
4501 +               .platform_data = &spi_gpio_cfg,
4502 +       },
4503 +};
4504 +
4505 +static struct gta01bl_machinfo backlight_machinfo = {
4506 +       .default_intensity      = 1,
4507 +       .max_intensity          = 1,
4508 +       .limit_mask             = 1,
4509 +       .defer_resume_backlight = 1,
4510 +};
4511 +
4512 +static struct resource gta01_bl_resources[] = {
4513 +       [0] = {
4514 +               .start  = GTA01_GPIO_BACKLIGHT,
4515 +               .end    = GTA01_GPIO_BACKLIGHT,
4516 +       },
4517 +};
4518 +
4519 +struct platform_device gta01_bl_dev = {
4520 +       .name           = "gta01-bl",
4521 +       .num_resources  = ARRAY_SIZE(gta01_bl_resources),
4522 +       .resource       = gta01_bl_resources,
4523 +       .dev            = {
4524 +               .platform_data = &backlight_machinfo,
4525 +       },
4526 +};
4527 +
4528 +static struct resource gta01_led_resources[] = {
4529 +       [0] = {
4530 +               .start  = GTA01_GPIO_VIBRATOR_ON,
4531 +               .end    = GTA01_GPIO_VIBRATOR_ON,
4532 +       },
4533 +};
4534 +
4535 +struct platform_device gta01_led_dev = {
4536 +       .name           = "neo1973-vibrator",
4537 +       .num_resources  = ARRAY_SIZE(gta01_led_resources),
4538 +       .resource       = gta01_led_resources,
4539 +};
4540 +
4541 +static struct resource gta01_button_resources[] = {
4542 +       [0] = {
4543 +               .start = GTA01_GPIO_AUX_KEY,
4544 +               .end   = GTA01_GPIO_AUX_KEY,
4545 +       },
4546 +       [1] = {
4547 +               .start = GTA01_GPIO_HOLD_KEY,
4548 +               .end   = GTA01_GPIO_HOLD_KEY,
4549 +       },
4550 +       [2] = {
4551 +               .start = GTA01_GPIO_JACK_INSERT,
4552 +               .end   = GTA01_GPIO_JACK_INSERT,
4553 +       },
4554 +};
4555 +
4556 +struct platform_device gta01_button_dev = {
4557 +       .name           = "neo1973-button",
4558 +       .num_resources  = ARRAY_SIZE(gta01_button_resources),
4559 +       .resource       = gta01_button_resources,
4560 +};
4561 +
4562 +static struct platform_device gta01_pm_gsm_dev = {
4563 +       .name           = "neo1973-pm-gsm",
4564 +};
4565 +
4566 +/* USB */
4567 +static struct s3c2410_hcd_info gta01_usb_info = {
4568 +       .port[0]        = {
4569 +               .flags  = S3C_HCDFLG_USED,
4570 +       },
4571 +       .port[1]        = {
4572 +               .flags  = 0,
4573 +       },
4574 +};
4575 +
4576 +static void __init gta01_map_io(void)
4577 +{
4578 +       s3c24xx_init_io(gta01_iodesc, ARRAY_SIZE(gta01_iodesc));
4579 +       s3c24xx_init_clocks(12*1000*1000);
4580 +       s3c24xx_init_uarts(gta01_uartcfgs, ARRAY_SIZE(gta01_uartcfgs));
4581 +}
4582 +
4583 +static irqreturn_t gta01_modem_irq(int irq, void *param)
4584 +{
4585 +       printk(KERN_DEBUG "GSM wakeup interrupt (IRQ %d)\n", irq);
4586 +       gta_gsm_interrupts++;
4587 +       return IRQ_HANDLED;
4588 +}
4589 +
4590 +static void __init gta01_machine_init(void)
4591 +{
4592 +       int rc;
4593 +
4594 +       if (system_rev == GTA01v4_SYSTEM_REV ||
4595 +           system_rev == GTA01Bv2_SYSTEM_REV ||
4596 +           system_rev == GTA01Bv3_SYSTEM_REV ||
4597 +           system_rev == GTA01Bv4_SYSTEM_REV) {
4598 +               gta01_udc_cfg.udc_command = gta01_udc_command;
4599 +               gta01_mmc_cfg.ocr_avail = MMC_VDD_32_33;
4600 +       }
4601 +
4602 +       s3c_device_usb.dev.platform_data = &gta01_usb_info;
4603 +       s3c_device_nand.dev.platform_data = &gta01_nand_info;
4604 +       s3c_device_sdi.dev.platform_data = &gta01_mmc_cfg;
4605 +
4606 +       s3c24xx_fb_set_platdata(&gta01_lcd_cfg);
4607 +
4608 +       INIT_WORK(&gta01_udc_vbus_drawer.work, __gta01_udc_vbus_draw);
4609 +       s3c24xx_udc_set_platdata(&gta01_udc_cfg);
4610 +       set_s3c2410ts_info(&gta01_ts_cfg);
4611 +
4612 +       /* Set LCD_RESET / XRES to high */
4613 +       s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT);
4614 +       s3c2410_gpio_setpin(S3C2410_GPC6, 1);
4615 +
4616 +       /* SPI chip select is gpio output */
4617 +       s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPIO_OUTPUT);
4618 +       s3c2410_gpio_setpin(S3C2410_GPG3, 1);
4619 +       platform_device_register(&s3c_device_spi_lcm);
4620 +
4621 +       platform_device_register(&gta01_bl_dev);
4622 +       platform_device_register(&gta01_button_dev);
4623 +       platform_device_register(&gta01_pm_gsm_dev);
4624 +
4625 +       switch (system_rev) {
4626 +       case GTA01v3_SYSTEM_REV:
4627 +       case GTA01v4_SYSTEM_REV:
4628 +               /* just use the default (GTA01_IRQ_PCF50606) */
4629 +               break;
4630 +       case GTA01Bv2_SYSTEM_REV:
4631 +       case GTA01Bv3_SYSTEM_REV:
4632 +               /* just use the default (GTA01_IRQ_PCF50606) */
4633 +               gta01_led_resources[0].start =
4634 +                       gta01_led_resources[0].end = GTA01Bv2_GPIO_VIBRATOR_ON;
4635 +               break;
4636 +       case GTA01Bv4_SYSTEM_REV:
4637 +               gta01_pmu_resources[0].start =
4638 +                       gta01_pmu_resources[0].end = GTA01Bv4_IRQ_PCF50606;
4639 +               gta01_led_resources[0].start =
4640 +                       gta01_led_resources[0].end = GTA01Bv4_GPIO_VIBRATOR_ON;
4641 +               break;
4642 +       }
4643 +       mangle_pmu_pdata_by_system_rev();
4644 +       platform_device_register(&gta01_pmu_dev);
4645 +       platform_device_register(&gta01_led_dev);
4646 +
4647 +       platform_add_devices(gta01_devices, ARRAY_SIZE(gta01_devices));
4648 +
4649 +       s3c2410_pm_init();
4650 +
4651 +       set_irq_type(GTA01_IRQ_MODEM, IRQT_RISING);
4652 +       rc = request_irq(GTA01_IRQ_MODEM, gta01_modem_irq, IRQF_DISABLED,
4653 +                        "modem", NULL);
4654 +       enable_irq_wake(GTA01_IRQ_MODEM);
4655 +       printk(KERN_DEBUG  "Enabled GSM wakeup IRQ %d (rc=%d)\n",
4656 +              GTA01_IRQ_MODEM, rc);
4657 +}
4658 +
4659 +MACHINE_START(NEO1973_GTA01, "GTA01")
4660 +       .phys_io        = S3C2410_PA_UART,
4661 +       .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
4662 +       .boot_params    = S3C2410_SDRAM_PA + 0x100,
4663 +       .map_io         = gta01_map_io,
4664 +       .init_irq       = s3c24xx_init_irq,
4665 +       .init_machine   = gta01_machine_init,
4666 +       .timer          = &s3c24xx_timer,
4667 +MACHINE_END
4668 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-h1940.c
4669 ===================================================================
4670 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/mach-h1940.c      2008-12-11 22:46:07.000000000 +0100
4671 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-h1940.c   2008-12-11 22:46:48.000000000 +0100
4672 @@ -38,6 +38,7 @@
4673  #include <asm/arch/h1940.h>
4674  #include <asm/arch/h1940-latch.h>
4675  #include <asm/arch/fb.h>
4676 +#include <asm/arch/tc.h>
4677  #include <asm/plat-s3c24xx/udc.h>
4678
4679  #include <asm/plat-s3c24xx/clock.h>
4680 @@ -129,6 +130,11 @@ static struct s3c2410_udc_mach_info h194
4681         .vbus_pin_inverted      = 1,
4682  };
4683
4684 +static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
4685 +               .delay = 10000,
4686 +               .presc = 49,
4687 +               .oversampling_shift = 2,
4688 +};
4689
4690  /**
4691   * Set lcd on or off
4692 @@ -186,6 +192,7 @@ static struct platform_device *h1940_dev
4693         &s3c_device_i2c,
4694         &s3c_device_iis,
4695         &s3c_device_usbgadget,
4696 +       &s3c_device_ts,
4697         &s3c_device_leds,
4698         &s3c_device_bluetooth,
4699  };
4700 @@ -214,6 +221,7 @@ static void __init h1940_init(void)
4701         u32 tmp;
4702
4703         s3c24xx_fb_set_platdata(&h1940_fb_info);
4704 +       set_s3c2410ts_info(&h1940_ts_cfg);
4705         s3c24xx_udc_set_platdata(&h1940_udc_cfg);
4706
4707         /* Turn off suspend on both USB ports, and switch the
4708 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/mach-qt2410.c
4709 ===================================================================
4710 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/mach-qt2410.c     2008-12-11 22:46:07.000000000 +0100
4711 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/mach-qt2410.c  2008-12-11 22:46:48.000000000 +0100
4712 @@ -1,6 +1,6 @@
4713  /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
4714   *
4715 - * Copyright (C) 2006 by OpenMoko, Inc.
4716 + * Copyright (C) 2006 by Openmoko, Inc.
4717   * Author: Harald Welte <laforge@openmoko.org>
4718   * All rights reserved.
4719   *
4720 @@ -214,7 +214,7 @@ static struct platform_device qt2410_led
4721
4722  /* SPI */
4723
4724 -static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
4725 +static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
4726  {
4727         switch (cs) {
4728         case BITBANG_CS_ACTIVE:
4729 @@ -321,6 +321,24 @@ static int __init qt2410_tft_setup(char
4730
4731  __setup("tft=", qt2410_tft_setup);
4732
4733 +static struct resource qt2410_button_resources[] = {
4734 +       [0] = {
4735 +               .start = S3C2410_GPF0,
4736 +               .end   = S3C2410_GPF0,
4737 +       },
4738 +       [1] = {
4739 +               .start = S3C2410_GPF2,
4740 +               .end   = S3C2410_GPF2,
4741 +       },
4742 +};
4743 +
4744 +struct platform_device qt2410_button_dev = {
4745 +       .name           ="qt2410-button",
4746 +       .num_resources  = ARRAY_SIZE(qt2410_button_resources),
4747 +       .resource       = qt2410_button_resources,
4748 +};
4749 +
4750 +
4751  static void __init qt2410_map_io(void)
4752  {
4753         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
4754 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/Makefile
4755 ===================================================================
4756 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2410/Makefile  2008-12-11 22:46:07.000000000 +0100
4757 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/Makefile       2008-12-11 22:46:48.000000000 +0100
4758 @@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
4759  obj-$(CONFIG_S3C2410_PM)       += pm.o sleep.o
4760  obj-$(CONFIG_S3C2410_GPIO)     += gpio.o
4761  obj-$(CONFIG_S3C2410_CLOCK)    += clock.o
4762 +obj-$(CONFIG_S3C2410_PWM)      += pwm.o
4763
4764  # Machine support
4765
4766 @@ -29,3 +30,4 @@ obj-$(CONFIG_MACH_AML_M5900)  += mach-aml
4767  obj-$(CONFIG_BAST_PC104_IRQ)   += bast-irq.o
4768  obj-$(CONFIG_MACH_VR1000)      += mach-vr1000.o usb-simtec.o
4769  obj-$(CONFIG_MACH_QT2410)      += mach-qt2410.o
4770 +obj-$(CONFIG_MACH_NEO1973_GTA01)+= mach-gta01.o
4771 Index: linux-2.6.24.7/arch/arm/mach-s3c2410/pwm.c
4772 ===================================================================
4773 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
4774 +++ linux-2.6.24.7/arch/arm/mach-s3c2410/pwm.c  2008-12-11 22:46:48.000000000 +0100
4775 @@ -0,0 +1,277 @@
4776 +/*
4777 + * arch/arm/mach-s3c2410/3c2410-pwm.c
4778 + *
4779 + * Copyright (c) by Javi Roman <javiroman@kernel-labs.org>
4780 + *              for the Openmoko Project.
4781 + *
4782 + *     S3C2410A SoC PWM support
4783 + *
4784 + * This program is free software; you can redistribute it and/or modify
4785 + * it under the terms of the GNU General Public License as published by
4786 + * the Free Software Foundation; either version 2 of the License, or
4787 + * (at your option) any later version.
4788 + *
4789 + * You should have received a copy of the GNU General Public License
4790 + * along with this program; if not, write to the Free Software
4791 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
4792 + *
4793 + */
4794 +
4795 +#include <linux/kernel.h>
4796 +#include <linux/init.h>
4797 +#include <linux/clk.h>
4798 +#include <linux/device.h>
4799 +#include <asm/hardware.h>
4800 +#include <asm/plat-s3c/regs-timer.h>
4801 +#include <asm/arch/pwm.h>
4802 +
4803 +#ifdef CONFIG_PM
4804 +       static unsigned long standby_reg_tcon;
4805 +       static unsigned long standby_reg_tcfg0;
4806 +       static unsigned long standby_reg_tcfg1;
4807 +#endif
4808 +
4809 +int s3c2410_pwm_disable(struct s3c2410_pwm *pwm)
4810 +{
4811 +       unsigned long tcon;
4812 +
4813 +       /* stop timer */
4814 +       tcon = __raw_readl(S3C2410_TCON);
4815 +       tcon &= 0xffffff00;
4816 +       __raw_writel(tcon, S3C2410_TCON);
4817 +
4818 +       clk_disable(pwm->pclk);
4819 +       clk_put(pwm->pclk);
4820 +
4821 +       return 0;
4822 +}
4823 +EXPORT_SYMBOL_GPL(s3c2410_pwm_disable);
4824 +
4825 +int s3c2410_pwm_init(struct s3c2410_pwm *pwm)
4826 +{
4827 +       pwm->pclk = clk_get(NULL, "timers");
4828 +       if (IS_ERR(pwm->pclk))
4829 +               return PTR_ERR(pwm->pclk);
4830 +
4831 +       clk_enable(pwm->pclk);
4832 +       pwm->pclk_rate = clk_get_rate(pwm->pclk);
4833 +       return 0;
4834 +}
4835 +EXPORT_SYMBOL_GPL(s3c2410_pwm_init);
4836 +
4837 +int s3c2410_pwm_enable(struct s3c2410_pwm *pwm)
4838 +{
4839 +       unsigned long tcfg0, tcfg1, tcnt, tcmp;
4840 +
4841 +       /* control registers bits */
4842 +       tcfg1 = __raw_readl(S3C2410_TCFG1);
4843 +       tcfg0 = __raw_readl(S3C2410_TCFG0);
4844 +
4845 +       /* divider & scaler slection */
4846 +       switch (pwm->timerid) {
4847 +       case PWM0:
4848 +               tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK;
4849 +               tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
4850 +               break;
4851 +       case PWM1:
4852 +               tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK;
4853 +               tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
4854 +               break;
4855 +       case PWM2:
4856 +               tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK;
4857 +               tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
4858 +               break;
4859 +       case PWM3:
4860 +               tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK;
4861 +               tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
4862 +               break;
4863 +       case PWM4:
4864 +               /* timer four is not capable of doing PWM */
4865 +               break;
4866 +       default:
4867 +               clk_disable(pwm->pclk);
4868 +               clk_put(pwm->pclk);
4869 +               return -1;
4870 +       }
4871 +
4872 +       /* divider & scaler values */
4873 +       tcfg1 |= pwm->divider;
4874 +       __raw_writel(tcfg1, S3C2410_TCFG1);
4875 +
4876 +       switch (pwm->timerid) {
4877 +       case PWM0:
4878 +       case PWM1:
4879 +               tcfg0 |= pwm->prescaler;
4880 +               __raw_writel(tcfg0, S3C2410_TCFG0);
4881 +               break;
4882 +       default:
4883 +               if ((tcfg0 | pwm->prescaler) != tcfg0) {
4884 +                       printk(KERN_WARNING "not changing prescaler of PWM %u,"
4885 +                              " since it's shared with timer4 (clock tick)\n",
4886 +                              pwm->timerid);
4887 +               }
4888 +               break;
4889 +       }
4890 +
4891 +       /* timer count and compare buffer initial values */
4892 +       tcnt = pwm->counter;
4893 +       tcmp = pwm->comparer;
4894 +
4895 +       __raw_writel(tcnt, S3C2410_TCNTB(pwm->timerid));
4896 +       __raw_writel(tcmp, S3C2410_TCMPB(pwm->timerid));
4897 +
4898 +       /* ensure timer is stopped */
4899 +       s3c2410_pwm_stop(pwm);
4900 +
4901 +       return 0;
4902 +}
4903 +EXPORT_SYMBOL_GPL(s3c2410_pwm_enable);
4904 +
4905 +int s3c2410_pwm_start(struct s3c2410_pwm *pwm)
4906 +{
4907 +       unsigned long tcon;
4908 +
4909 +       tcon = __raw_readl(S3C2410_TCON);
4910 +
4911 +       switch (pwm->timerid) {
4912 +       case PWM0:
4913 +               tcon |= S3C2410_TCON_T0START;
4914 +               tcon &= ~S3C2410_TCON_T0MANUALUPD;
4915 +               break;
4916 +       case PWM1:
4917 +               tcon |= S3C2410_TCON_T1START;
4918 +               tcon &= ~S3C2410_TCON_T1MANUALUPD;
4919 +               break;
4920 +       case PWM2:
4921 +               tcon |= S3C2410_TCON_T2START;
4922 +               tcon &= ~S3C2410_TCON_T2MANUALUPD;
4923 +               break;
4924 +       case PWM3:
4925 +               tcon |= S3C2410_TCON_T3START;
4926 +               tcon &= ~S3C2410_TCON_T3MANUALUPD;
4927 +               break;
4928 +       case PWM4:
4929 +               /* timer four is not capable of doing PWM */
4930 +       default:
4931 +               return -ENODEV;
4932 +       }
4933 +
4934 +       __raw_writel(tcon, S3C2410_TCON);
4935 +
4936 +       return 0;
4937 +}
4938 +EXPORT_SYMBOL_GPL(s3c2410_pwm_start);
4939 +
4940 +int s3c2410_pwm_stop(struct s3c2410_pwm *pwm)
4941 +{
4942 +       unsigned long tcon;
4943 +
4944 +       tcon = __raw_readl(S3C2410_TCON);
4945 +
4946 +       switch (pwm->timerid) {
4947 +       case PWM0:
4948 +               tcon &= ~0x00000000;
4949 +               tcon |= S3C2410_TCON_T0RELOAD;
4950 +               tcon |= S3C2410_TCON_T0MANUALUPD;
4951 +               break;
4952 +       case PWM1:
4953 +               tcon &= ~0x00000080;
4954 +               tcon |= S3C2410_TCON_T1RELOAD;
4955 +               tcon |= S3C2410_TCON_T1MANUALUPD;
4956 +               break;
4957 +       case PWM2:
4958 +               tcon &= ~0x00000800;
4959 +               tcon |= S3C2410_TCON_T2RELOAD;
4960 +               tcon |= S3C2410_TCON_T2MANUALUPD;
4961 +               break;
4962 +       case PWM3:
4963 +               tcon &= ~0x00008000;
4964 +               tcon |= S3C2410_TCON_T3RELOAD;
4965 +               tcon |= S3C2410_TCON_T3MANUALUPD;
4966 +               break;
4967 +       case PWM4:
4968 +               /* timer four is not capable of doing PWM */
4969 +       default:
4970 +               return -ENODEV;
4971 +       }
4972 +
4973 +       __raw_writel(tcon, S3C2410_TCON);
4974 +
4975 +       return 0;
4976 +}
4977 +EXPORT_SYMBOL_GPL(s3c2410_pwm_stop);
4978 +
4979 +int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *pwm)
4980 +{
4981 +       __raw_writel(reg_value, S3C2410_TCMPB(pwm->timerid));
4982 +
4983 +       return 0;
4984 +}
4985 +EXPORT_SYMBOL_GPL(s3c2410_pwm_duty_cycle);
4986 +
4987 +int s3c2410_pwm_dumpregs(void)
4988 +{
4989 +       printk(KERN_INFO "TCON: %08lx, TCFG0: %08lx, TCFG1: %08lx\n",
4990 +                       (unsigned long) __raw_readl(S3C2410_TCON),
4991 +                       (unsigned long) __raw_readl(S3C2410_TCFG0),
4992 +                       (unsigned long) __raw_readl(S3C2410_TCFG1));
4993 +
4994 +       return 0;
4995 +}
4996 +EXPORT_SYMBOL_GPL(s3c2410_pwm_dumpregs);
4997 +
4998 +static int __init s3c24xx_pwm_probe(struct platform_device *pdev)
4999 +{
5000 +       dev_info(&pdev->dev, "s3c24xx_pwm is registered \n");
5001 +
5002 +       return 0;
5003 +}
5004 +
5005 +#ifdef CONFIG_PM
5006 +static int s3c24xx_pwm_suspend(struct platform_device *pdev, pm_message_t state)
5007 +{
5008 +       /* PWM config should be kept in suspending */
5009 +       standby_reg_tcon = __raw_readl(S3C2410_TCON);
5010 +       standby_reg_tcfg0 = __raw_readl(S3C2410_TCFG0);
5011 +       standby_reg_tcfg1 = __raw_readl(S3C2410_TCFG1);
5012 +
5013 +       return 0;
5014 +}
5015 +
5016 +static int s3c24xx_pwm_resume(struct platform_device *pdev)
5017 +{
5018 +       __raw_writel(standby_reg_tcon, S3C2410_TCON);
5019 +       __raw_writel(standby_reg_tcfg0, S3C2410_TCFG0);
5020 +       __raw_writel(standby_reg_tcfg1, S3C2410_TCFG1);
5021 +
5022 +       return 0;
5023 +}
5024 +#else
5025 +#define sc32440_pwm_suspend    NULL
5026 +#define sc32440_pwm_resume     NULL
5027 +#endif
5028 +
5029 +static struct platform_driver s3c24xx_pwm_driver = {
5030 +       .driver = {
5031 +               .name   = "s3c24xx_pwm",
5032 +               .owner  = THIS_MODULE,
5033 +       },
5034 +       .probe   = s3c24xx_pwm_probe,
5035 +       .suspend = s3c24xx_pwm_suspend,
5036 +       .resume  = s3c24xx_pwm_resume,
5037 +};
5038 +
5039 +static int __init s3c24xx_pwm_init(void)
5040 +{
5041 +       return platform_driver_register(&s3c24xx_pwm_driver);
5042 +}
5043 +
5044 +static void __exit s3c24xx_pwm_exit(void)
5045 +{
5046 +}
5047 +
5048 +MODULE_AUTHOR("Javi Roman <javiroman@kernel-labs.org>");
5049 +MODULE_LICENSE("GPL");
5050 +
5051 +module_init(s3c24xx_pwm_init);
5052 +module_exit(s3c24xx_pwm_exit);
5053 Index: linux-2.6.24.7/arch/arm/mach-s3c2412/s3c2412.c
5054 ===================================================================
5055 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2412/s3c2412.c 2008-12-11 22:46:07.000000000 +0100
5056 +++ linux-2.6.24.7/arch/arm/mach-s3c2412/s3c2412.c      2008-12-11 22:46:48.000000000 +0100
5057 @@ -214,5 +214,8 @@ int __init s3c2412_init(void)
5058  {
5059         printk("S3C2412: Initialising architecture\n");
5060
5061 +       /* make sure SD/MMC driver can distinguish 2412 from 2410 */
5062 +       s3c_device_sdi.name = "s3c2412-sdi";
5063 +
5064         return sysdev_register(&s3c2412_sysdev);
5065  }
5066 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/bits.h
5067 ===================================================================
5068 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
5069 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/bits.h  2008-12-11 22:46:48.000000000 +0100
5070 @@ -0,0 +1,48 @@
5071 +/*
5072 + *  Copyright (C) Samsung Electroincs  2003
5073 + *  Author: SW.LEE <hitchcar@samsung.com>
5074 + *
5075 + * This program is free software; you can redistribute it and/or modify
5076 + * it under the terms of the GNU General Public License as published by
5077 + * the Free Software Foundation; either version 2 of the License, or
5078 + * (at your option) any later version.
5079 + *
5080 + */
5081 +
5082 +#ifndef __SW_BITS_H
5083 +#define __SW_BITS_H
5084 +
5085 +#define BIT0                            0x00000001
5086 +#define BIT1                            0x00000002
5087 +#define BIT2                            0x00000004
5088 +#define BIT3                            0x00000008
5089 +#define BIT4                            0x00000010
5090 +#define BIT5                            0x00000020
5091 +#define BIT6                            0x00000040
5092 +#define BIT7                            0x00000080
5093 +#define BIT8                            0x00000100
5094 +#define BIT9                            0x00000200
5095 +#define BIT10                           0x00000400
5096 +#define BIT11                           0x00000800
5097 +#define BIT12                           0x00001000
5098 +#define BIT13                           0x00002000
5099 +#define BIT14                           0x00004000
5100 +#define BIT15                           0x00008000
5101 +#define BIT16                           0x00010000
5102 +#define BIT17                           0x00020000
5103 +#define BIT18                           0x00040000
5104 +#define BIT19                           0x00080000
5105 +#define BIT20                           0x00100000
5106 +#define BIT21                           0x00200000
5107 +#define BIT22                           0x00400000
5108 +#define BIT23                           0x00800000
5109 +#define BIT24                           0x01000000
5110 +#define BIT25                           0x02000000
5111 +#define BIT26                           0x04000000
5112 +#define BIT27                           0x08000000
5113 +#define BIT28                           0x10000000
5114 +#define BIT29                           0x20000000
5115 +#define BIT30                           0x40000000
5116 +#define BIT31                           0x80000000
5117 +
5118 +#endif
5119 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.c
5120 ===================================================================
5121 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
5122 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.c 2008-12-11 22:46:48.000000000 +0100
5123 @@ -0,0 +1,1047 @@
5124 +/*
5125 + *   Copyright (C) 2004 Samsung Electronics
5126 + *       SW.LEE <hitchcar@samsung.com>
5127 + *
5128 + * This file is subject to the terms and conditions of the GNU General Public
5129 + * License 2. See the file COPYING in the main directory of this archive
5130 + * for more details.
5131 + */
5132 +
5133 +#include <linux/module.h>
5134 +#include <linux/kernel.h>
5135 +#include <linux/init.h>
5136 +#include <linux/sched.h>
5137 +#include <linux/irq.h>
5138 +#include <linux/completion.h>
5139 +#include <linux/delay.h>
5140 +#include <linux/slab.h>
5141 +#include <linux/vmalloc.h>
5142 +#include <linux/miscdevice.h>
5143 +#include <linux/wait.h>
5144 +#include <linux/miscdevice.h>
5145 +#include <asm/io.h>
5146 +#include <asm/semaphore.h>
5147 +#include <asm/hardware.h>
5148 +#include <asm/uaccess.h>
5149 +#include <linux/device.h>
5150 +#include <linux/dma-mapping.h>
5151 +#include <linux/clk.h>
5152 +
5153 +#ifdef CONFIG_ARCH_S3C24A0A
5154 +#include <asm/arch/S3C24A0.h>
5155 +#include <asm/arch/clocks.h>
5156 +#else
5157 +#include <asm/arch/regs-gpio.h>
5158 +#include <asm/arch/regs-gpioj.h>
5159 +#include <asm/arch/regs-irq.h>
5160 +#endif
5161 +
5162 +#include "cam_reg.h"
5163 +//#define SW_DEBUG
5164 +#define CONFIG_VIDEO_V4L1_COMPAT
5165 +#include <linux/videodev.h>
5166 +#include "camif.h"
5167 +#include "miscdevice.h"
5168 +
5169 +static int camif_dma_burst(camif_cfg_t *);
5170 +static int camif_scaler(camif_cfg_t *);
5171 +
5172 +/* For SXGA Image */
5173 +#define RESERVE_MEM  15*1024*1024
5174 +#define YUV_MEM      10*1024*1024
5175 +#define RGB_MEM      (RESERVE_MEM - YUV_MEM)
5176 +
5177 +static int camif_malloc(camif_cfg_t *cfg)
5178 +{
5179 +       unsigned int t_size;
5180 +       unsigned int daon = cfg->target_x *cfg->target_y;
5181 +
5182 +       if(cfg->dma_type & CAMIF_CODEC) {
5183 +               if (cfg->fmt & CAMIF_OUT_YCBCR420) {
5184 +                       t_size = daon * 3 / 2 ;
5185 +               }
5186 +               else  { t_size = daon * 2; /* CAMIF_OUT_YCBCR422 */ }
5187 +               t_size = t_size *cfg->pp_num;
5188 +
5189 +#ifndef SAMSUNG_SXGA_CAM
5190 +               cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev,
5191 +                                                     t_size, &cfg->pp_phys_buf,
5192 +                                                     GFP_KERNEL);
5193 +#else
5194 +               printk(KERN_INFO "Reserving High RAM Addresses \n");
5195 +               cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM);
5196 +               cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf, YUV_MEM);
5197 +#endif
5198 +
5199 +               if ( !cfg->pp_virt_buf ) {
5200 +                       printk(KERN_ERR"CAMERA:Failed to request YCBCR MEM\n");
5201 +                       return -ENOMEM;
5202 +               }
5203 +               memset(cfg->pp_virt_buf, 0, t_size);
5204 +               cfg->pp_totalsize = t_size;
5205 +               return 0;
5206 +       }
5207 +       if ( cfg->dma_type & CAMIF_PREVIEW ) {
5208 +               if (cfg->fmt & CAMIF_RGB16)
5209 +                       t_size = daon * 2; /*  4byte per two pixel*/
5210 +               else {
5211 +                       assert(cfg->fmt & CAMIF_RGB24);
5212 +                       t_size = daon * 4; /* 4byte per one pixel */
5213 +               }
5214 +               t_size = t_size * cfg->pp_num;
5215 +#ifndef SAMSUNG_SXGA_CAM
5216 +               cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev,
5217 +                                                     t_size, &cfg->pp_phys_buf,
5218 +                                                     GFP_KERNEL);
5219 +#else
5220 +               printk(KERN_INFO "Reserving High RAM Addresses \n");
5221 +               cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM ) + YUV_MEM;
5222 +               cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf,RGB_MEM);
5223 +#endif
5224 +               if ( !cfg->pp_virt_buf ) {
5225 +                       printk(KERN_ERR"CAMERA:Failed to request RGB MEM\n");
5226 +                       return -ENOMEM;
5227 +               }
5228 +               memset(cfg->pp_virt_buf, 0, t_size);
5229 +               cfg->pp_totalsize = t_size;
5230 +               return 0;
5231 +       }
5232 +
5233 +       return 0;               /* Never come. */
5234 +}
5235 +
5236 +static int camif_demalloc(camif_cfg_t *cfg)
5237 +{
5238 +#ifndef SAMSUNG_SXGA_CAM
5239 +       if ( cfg->pp_virt_buf ) {
5240 +               dma_free_coherent(cfg->v->dev, cfg->pp_totalsize,
5241 +                                 cfg->pp_virt_buf, cfg->pp_phys_buf);
5242 +               cfg->pp_virt_buf = 0;
5243 +       }
5244 +#else
5245 +       iounmap(cfg->pp_virt_buf);
5246 +       cfg->pp_virt_buf = 0;
5247 +#endif
5248 +       return 0;
5249 +}
5250 +
5251 +/*
5252 + * advise a person to use this func in ISR
5253 + * index value indicates the next frame count to be used
5254 + */
5255 +int camif_g_frame_num(camif_cfg_t *cfg)
5256 +{
5257 +       int index = 0;
5258 +
5259 +       if (cfg->dma_type & CAMIF_CODEC ) {
5260 +               index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CICOSTATUS));
5261 +               DPRINTK("CAMIF_CODEC frame %d \n", index);
5262 +       }
5263 +       else {
5264 +               assert(cfg->dma_type & CAMIF_PREVIEW );
5265 +               index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CIPRSTATUS));
5266 +               DPRINTK("CAMIF_PREVIEW frame %d  0x%08X \n", index,
5267 +                       readl(camregs + S3C2440_CAM_REG_CIPRSTATUS));
5268 +       }
5269 +       cfg->now_frame_num = (index + 2) % 4; /* When 4 PingPong */
5270 +       return index; /* meaningless */
5271 +}
5272 +
5273 +static int camif_pp_codec(camif_cfg_t *cfg)
5274 +{
5275 +       u32 i, c_size; /* Cb,Cr size */
5276 +       u32 one_p_size;
5277 +       u32 daon = cfg->target_x * cfg->target_y;
5278 +       if (cfg->fmt & CAMIF_OUT_YCBCR420)
5279 +               c_size = daon / 4;
5280 +       else {
5281 +               assert(cfg->fmt & CAMIF_OUT_YCBCR422);
5282 +               c_size = daon / 2;
5283 +       }
5284 +       switch ( cfg->pp_num ) {
5285 +       case 1 :
5286 +               for (i =0 ; i < 4; i++) {
5287 +                       cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
5288 +                       cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
5289 +                       cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon;
5290 +                       cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon;
5291 +                       cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size;
5292 +                       cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size;
5293 +                       writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
5294 +                       writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
5295 +                       writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5296 +               }
5297 +               break;
5298 +       case 2:
5299 +#define  TRY   (( i%2 ) ? 1 :0)
5300 +               one_p_size = daon + 2*c_size;
5301 +               for (i = 0; i < 4  ; i++) {
5302 +                       cfg->img_buf[i].virt_y = cfg->pp_virt_buf + TRY * one_p_size;
5303 +                       cfg->img_buf[i].phys_y = cfg->pp_phys_buf + TRY * one_p_size;
5304 +                       cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + TRY * one_p_size;
5305 +                       cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + TRY * one_p_size;
5306 +                       cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + TRY * one_p_size;
5307 +                       cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + TRY * one_p_size;
5308 +                       writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
5309 +                       writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
5310 +                       writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5311 +               }
5312 +               break;
5313 +       case 4:
5314 +               one_p_size = daon + 2*c_size;
5315 +               for (i = 0; i < 4 ; i++) {
5316 +                       cfg->img_buf[i].virt_y = cfg->pp_virt_buf + i * one_p_size;
5317 +                       cfg->img_buf[i].phys_y = cfg->pp_phys_buf + i * one_p_size;
5318 +                       cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + i * one_p_size;
5319 +                       cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + i * one_p_size;
5320 +                       cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + i * one_p_size;
5321 +                       cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + i * one_p_size;
5322 +                       writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i));
5323 +                       writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i));
5324 +                       writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5325 +               }
5326 +               break;
5327 +       default:
5328 +               printk("Invalid PingPong Number %d \n",cfg->pp_num);
5329 +               panic("halt\n");
5330 +}
5331 +       return 0;
5332 +}
5333 +
5334 +/* RGB Buffer Allocation */
5335 +static int camif_pp_preview(camif_cfg_t *cfg)
5336 +{
5337 +       int i;
5338 +       u32 daon = cfg->target_x * cfg->target_y;
5339 +
5340 +       if(cfg->fmt & CAMIF_RGB24)
5341 +               daon = daon * 4 ;
5342 +       else {
5343 +               assert (cfg->fmt & CAMIF_RGB16);
5344 +               daon = daon *2;
5345 +       }
5346 +       switch ( cfg->pp_num ) {
5347 +               case 1:
5348 +                       for ( i = 0; i < 4 ; i++ ) {
5349 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf ;
5350 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf ;
5351 +                               writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5352 +                       }
5353 +                       break;
5354 +               case 2:
5355 +                       for ( i = 0; i < 4 ; i++) {
5356 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + TRY * daon;
5357 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + TRY * daon;
5358 +                               writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5359 +                       }
5360 +                       break;
5361 +               case 4:
5362 +                       for ( i = 0; i < 4 ; i++) {
5363 +                               cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * daon;
5364 +                               cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * daon;
5365 +                               writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i));
5366 +                       }
5367 +                       break;
5368 +               default:
5369 +                       printk("Invalid PingPong Number %d \n",cfg->pp_num);
5370 +                       panic("halt\n");
5371 +       }
5372 +       return 0;
5373 +}
5374 +
5375 +static int camif_pingpong(camif_cfg_t *cfg)
5376 +{
5377 +       if (cfg->dma_type & CAMIF_CODEC ) {
5378 +               camif_pp_codec(cfg);
5379 +       }
5380 +
5381 +       if ( cfg->dma_type & CAMIF_PREVIEW) {
5382 +               camif_pp_preview(cfg);
5383 +       }
5384 +       return 0;
5385 +}
5386 +
5387 +
5388 +/***********       Image Convert *******************************/
5389 +/*  Return Format
5390 + *  Supported by Hardware
5391 + *  V4L2_PIX_FMT_YUV420,
5392 + *  V4L2_PIX_FMT_YUV422P,
5393 + *  V4L2_PIX_FMT_BGR32 (BGR4)
5394 + * -----------------------------------
5395 + *  V4L2_PIX_FMT_RGB565(X)
5396 + *  Currenly 2byte --> BGR656 Format
5397 + *  S3C2440A,S3C24A0 supports vairants with reversed FMT_RGB565
5398 +    i.e  blue toward the least, red towards the most significant bit
5399 +    --  by SW.LEE
5400 + */
5401 +
5402 +
5403 +/*
5404 + * After calling camif_g_frame_num,
5405 + * this func must be called
5406 + */
5407 +u8 * camif_g_frame(camif_cfg_t *cfg)
5408 +{
5409 +       u8 * ret = NULL;
5410 +       int cnt = cfg->now_frame_num;
5411 +
5412 +       if(cfg->dma_type & CAMIF_PREVIEW) {
5413 +               ret = cfg->img_buf[cnt].virt_rgb;
5414 +       }
5415 +       if (cfg->dma_type & CAMIF_CODEC) {
5416 +               ret = cfg->img_buf[cnt].virt_y;
5417 +       }
5418 +       return ret;
5419 +}
5420 +
5421 +/* This function must be called in module initial time */
5422 +static int camif_source_fmt(camif_gc_t *gc)
5423 +{
5424 +       u32 cmd = 0;
5425 +
5426 +       /* Configure CISRCFMT --Source Format */
5427 +       if (gc->itu_fmt & CAMIF_ITU601) {
5428 +               cmd = CAMIF_ITU601;
5429 +       }
5430 +       else {
5431 +               assert ( gc->itu_fmt & CAMIF_ITU656);
5432 +               cmd = CAMIF_ITU656;
5433 +       }
5434 +       cmd  |= SOURCE_HSIZE(gc->source_x)| SOURCE_VSIZE(gc->source_y);
5435 +       /* Order422 */
5436 +       cmd |=  gc->order422;
5437 +       writel(cmd, camregs + S3C2440_CAM_REG_CISRCFMT);
5438 +
5439 +       return 0 ;
5440 +}
5441 +
5442 +
5443 +/*
5444 + * Codec Input YCBCR422 will be Fixed
5445 + */
5446 +static int camif_target_fmt(camif_cfg_t *cfg)
5447 +{
5448 +       u32 cmd = 0;
5449 +
5450 +       if (cfg->dma_type & CAMIF_CODEC) {
5451 +               /* YCBCR setting */
5452 +               cmd = TARGET_HSIZE(cfg->target_x)| TARGET_VSIZE(cfg->target_y);
5453 +               if ( cfg->fmt & CAMIF_OUT_YCBCR420 ) {
5454 +                       cmd |= OUT_YCBCR420|IN_YCBCR422;
5455 +               }
5456 +               else {
5457 +                       assert(cfg->fmt & CAMIF_OUT_YCBCR422);
5458 +                       cmd |= OUT_YCBCR422|IN_YCBCR422;
5459 +               }
5460 +               writel(cmd | cfg->flip, camregs + S3C2440_CAM_REG_CICOTRGFMT);
5461 +
5462 +       } else {
5463 +               assert(cfg->dma_type & CAMIF_PREVIEW);
5464 +               writel(TARGET_HSIZE(cfg->target_x)|TARGET_VSIZE(cfg->target_y)|cfg->flip,
5465 +                       camregs + S3C2440_CAM_REG_CIPRTRGFMT);
5466 +       }
5467 +       return 0;
5468 +}
5469 +
5470 +void camif_change_flip(camif_cfg_t *cfg)
5471 +{
5472 +       u32 cmd = readl(camregs + S3C2440_CAM_REG_CICOTRGFMT);
5473 +
5474 +       cmd &= ~(BIT14|BIT15);
5475 +       cmd |= cfg->flip;
5476 +
5477 +       writel(cmd, camregs + S3C2440_CAM_REG_CICOTRGFMT);
5478 +}
5479 +
5480 +
5481 +
5482 +/* Must:
5483 + * Before calling this function,
5484 + * you must use "camif_dynamic_open"
5485 + * If you want to enable both CODEC and preview
5486 + *  you must do it at the same time.
5487 + */
5488 +int camif_capture_start(camif_cfg_t *cfg)
5489 +{
5490 +       u32 n_cmd = 0;          /* Next Command */
5491 +
5492 +       switch(cfg->exec) {
5493 +       case CAMIF_BOTH_DMA_ON:
5494 +               camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */
5495 +               writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) |
5496 +                            SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
5497 +               writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) |
5498 +                            SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
5499 +               n_cmd = CAMIF_CAP_PREVIEW_ON | CAMIF_CAP_CODEC_ON;
5500 +               break;
5501 +       case CAMIF_DMA_ON:
5502 +               camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */
5503 +               if (cfg->dma_type&CAMIF_CODEC) {
5504 +                       writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) |
5505 +                            SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
5506 +                       n_cmd = CAMIF_CAP_CODEC_ON;
5507 +               } else {
5508 +                       writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) |
5509 +                            SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
5510 +                       n_cmd = CAMIF_CAP_PREVIEW_ON;
5511 +               }
5512 +
5513 +               /* wait until Sync Time expires */
5514 +               /* First settting, to wait VSYNC fall  */
5515 +               /* By VESA spec,in 640x480 @60Hz
5516 +                       MAX Delay Time is around 64us which "while" has.*/
5517 +               while(VSYNC & readl(camregs + S3C2440_CAM_REG_CICOSTATUS));
5518 +               break;
5519 +       default:
5520 +               break;
5521 +}
5522 +       writel(n_cmd | CAMIF_CAP_ON, camregs + S3C2440_CAM_REG_CIIMGCPT);
5523 +       return 0;
5524 +}
5525 +
5526 +
5527 +int camif_capture_stop(camif_cfg_t *cfg)
5528 +{
5529 +       u32 n_cmd = readl(camregs + S3C2440_CAM_REG_CIIMGCPT);  /* Next Command */
5530 +
5531 +       switch(cfg->exec) {
5532 +       case CAMIF_BOTH_DMA_OFF:
5533 +               writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) &
5534 +                       ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
5535 +               writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) &
5536 +                       ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
5537 +               n_cmd = 0;
5538 +               break;
5539 +       case CAMIF_DMA_OFF_L_IRQ: /* fall thru */
5540 +       case CAMIF_DMA_OFF:
5541 +               if (cfg->dma_type&CAMIF_CODEC) {
5542 +                       writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) &
5543 +                           ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL);
5544 +                       n_cmd &= ~CAMIF_CAP_CODEC_ON;
5545 +                       if (!(n_cmd & CAMIF_CAP_PREVIEW_ON))
5546 +                               n_cmd = 0;
5547 +               } else {
5548 +                       writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) &
5549 +                           ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL);
5550 +                       n_cmd &= ~CAMIF_CAP_PREVIEW_ON;
5551 +                       if (!(n_cmd & CAMIF_CAP_CODEC_ON))
5552 +                               n_cmd = 0;
5553 +               }
5554 +               break;
5555 +       default:
5556 +               panic("Unexpected \n");
5557 +       }
5558 +       writel(n_cmd, camregs + S3C2440_CAM_REG_CIIMGCPT);
5559 +
5560 +       if (cfg->exec == CAMIF_DMA_OFF_L_IRQ) { /* Last IRQ  */
5561 +               if (cfg->dma_type & CAMIF_CODEC)
5562 +                       writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) |
5563 +                            LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL);
5564 +               else
5565 +                       writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) |
5566 +                            LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL);
5567 +       }
5568 +#if 0
5569 +       else {                          /* to make internal state machine of CAMERA stop */
5570 +               camif_reset(CAMIF_RESET, 0);
5571 +       }
5572 +#endif
5573 +       return 0;
5574 +}
5575 +
5576 +
5577 +/* LastIRQEn is autoclear */
5578 +void camif_last_irq_en(camif_cfg_t *cfg)
5579 +{
5580 +       if ((cfg->exec == CAMIF_BOTH_DMA_ON) || (cfg->dma_type & CAMIF_CODEC))
5581 +               writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) |
5582 +                       LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL);
5583 +
5584 +       if ((cfg->exec == CAMIF_BOTH_DMA_ON) || !(cfg->dma_type & CAMIF_CODEC))
5585 +               writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) |
5586 +                       LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL);
5587 +}
5588 +
5589 +static int
5590 +camif_scaler_internal(u32 srcWidth, u32 dstWidth, u32 *ratio, u32 *shift)
5591 +{
5592 +       if(srcWidth>=64*dstWidth){
5593 +               printk(KERN_ERR"CAMERA:out of prescaler range: srcWidth /dstWidth = %d(< 64)\n",
5594 +                        srcWidth/dstWidth);
5595 +               return 1;
5596 +       }
5597 +       else if(srcWidth>=32*dstWidth){
5598 +               *ratio=32;
5599 +               *shift=5;
5600 +       }
5601 +       else if(srcWidth>=16*dstWidth){
5602 +               *ratio=16;
5603 +               *shift=4;
5604 +       }
5605 +       else if(srcWidth>=8*dstWidth){
5606 +               *ratio=8;
5607 +               *shift=3;
5608 +       }
5609 +       else if(srcWidth>=4*dstWidth){
5610 +               *ratio=4;
5611 +               *shift=2;
5612 +       }
5613 +       else if(srcWidth>=2*dstWidth){
5614 +               *ratio=2;
5615 +               *shift=1;
5616 +       }
5617 +       else {
5618 +               *ratio=1;
5619 +               *shift=0;
5620 +       }
5621 +       return 0;
5622 +}
5623 +
5624 +
5625 +int camif_g_fifo_status(camif_cfg_t *cfg)
5626 +{
5627 +       u32 reg;
5628 +
5629 +       if (cfg->dma_type & CAMIF_CODEC) {
5630 +               u32 flag = CO_OVERFLOW_Y | CO_OVERFLOW_CB | CO_OVERFLOW_CR;
5631 +               reg = readl(camregs + S3C2440_CAM_REG_CICOSTATUS);
5632 +               if (reg & flag) {
5633 +                       printk("CODEC: FIFO error(0x%08x) and corrected\n",reg);
5634 +                       /* FIFO Error Count ++  */
5635 +                       writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) |
5636 +                               CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR,
5637 +                               camregs + S3C2440_CAM_REG_CIWDOFST);
5638 +
5639 +                       writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) &
5640 +                               ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR),
5641 +                               camregs + S3C2440_CAM_REG_CIWDOFST);
5642 +                       return 1; /* Error */
5643 +               }
5644 +       }
5645 +       if (cfg->dma_type & CAMIF_PREVIEW) {
5646 +               u32 flag = PR_OVERFLOW_CB | PR_OVERFLOW_CR;
5647 +               reg = readl(camregs + S3C2440_CAM_REG_CIPRSTATUS);
5648 +               if (reg & flag) {
5649 +                       printk("PREVIEW:FIFO error(0x%08x) and corrected\n",reg);
5650 +                       writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) |
5651 +                               CO_FIFO_CB | CO_FIFO_CR,
5652 +                               camregs + S3C2440_CAM_REG_CIWDOFST);
5653 +
5654 +                       writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) &
5655 +                               ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR),
5656 +                               camregs + S3C2440_CAM_REG_CIWDOFST);
5657 +                       /* FIFO Error Count ++  */
5658 +                       return 1; /* Error */
5659 +               }
5660 +       }
5661 +       return 0;               /* No Error */
5662 +}
5663 +
5664 +
5665 +/* Policy:
5666 + * if codec or preview define the win offset,
5667 + *    other must follow that value.
5668 + */
5669 +int camif_win_offset(camif_gc_t *gc )
5670 +{
5671 +       u32 h = gc->win_hor_ofst;
5672 +       u32 v = gc->win_ver_ofst;
5673 +
5674 +       /*Clear Overflow */
5675 +       writel(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR | PR_FIFO_CB | PR_FIFO_CB,
5676 +               camregs + S3C2440_CAM_REG_CIWDOFST);
5677 +       writel(0, camregs + S3C2440_CAM_REG_CIWDOFST);
5678 +
5679 +       if (!h && !v)   {
5680 +               writel(0, camregs + S3C2440_CAM_REG_CIWDOFST);
5681 +               return 0;
5682 +       }
5683 +
5684 +       writel(WINOFEN | WINHOROFST(h) | WINVEROFST(v), camregs + S3C2440_CAM_REG_CIWDOFST);
5685 +       return 0;
5686 +}
5687 +
5688 +/*
5689 + * when you change the resolution in a specific camera,
5690 + * sometimes, it is necessary to change the polarity
5691 + *                                       -- SW.LEE
5692 + */
5693 +static void camif_polarity(camif_gc_t *gc)
5694 +{
5695 +       u32 cmd = readl(camregs + S3C2440_CAM_REG_CIGCTRL);;
5696 +
5697 +       cmd = cmd & ~(BIT26|BIT25|BIT24); /* clear polarity */
5698 +       if (gc->polarity_pclk)
5699 +               cmd |= GC_INVPOLPCLK;
5700 +       if (gc->polarity_vsync)
5701 +               cmd |= GC_INVPOLVSYNC;
5702 +       if (gc->polarity_href)
5703 +               cmd |= GC_INVPOLHREF;
5704 +       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
5705 +              cmd, camregs + S3C2440_CAM_REG_CIGCTRL);
5706 +}
5707 +
5708 +
5709 +int camif_dynamic_open(camif_cfg_t *cfg)
5710 +{
5711 +       camif_win_offset(cfg->gc);
5712 +       camif_polarity(cfg->gc);
5713 +
5714 +       if(camif_scaler(cfg)) {
5715 +               printk(KERN_ERR "CAMERA:Preview Scaler, Change WinHorOfset or Target Size\n");
5716 +               return 1;
5717 +       }
5718 +       camif_target_fmt(cfg);
5719 +       if (camif_dma_burst(cfg)) {
5720 +               printk(KERN_ERR "CAMERA:DMA Busrt Length Error \n");
5721 +               return 1;
5722 +       }
5723 +       if(camif_malloc(cfg) ) {
5724 +               printk(KERN_ERR "    Instead of using consistent_alloc()\n"
5725 +                               "    lease use dedicated memory allocation for DMA memory\n");
5726 +               return -1;
5727 +       }
5728 +       camif_pingpong(cfg);
5729 +       return 0;
5730 +}
5731 +
5732 +int camif_dynamic_close(camif_cfg_t *cfg)
5733 +{
5734 +       camif_demalloc(cfg);
5735 +       return 0;
5736 +}
5737 +
5738 +static int camif_target_area(camif_cfg_t *cfg)
5739 +{
5740 +       u32 rect = cfg->target_x * cfg->target_y;
5741 +
5742 +       if (cfg->dma_type & CAMIF_CODEC)
5743 +               writel(rect, camregs + S3C2440_CAM_REG_CICOTAREA);
5744 +
5745 +       if (cfg->dma_type & CAMIF_PREVIEW)
5746 +               writel(rect, camregs + S3C2440_CAM_REG_CIPRTAREA);
5747 +
5748 +       return 0;
5749 +}
5750 +
5751 +static int inline camif_hw_reg(camif_cfg_t *cfg)
5752 +{
5753 +       u32 cmd = 0;
5754 +
5755 +       if (cfg->dma_type & CAMIF_CODEC) {
5756 +               writel(PRE_SHIFT(cfg->sc.shfactor) |
5757 +                      PRE_HRATIO(cfg->sc.prehratio) |
5758 +                      PRE_VRATIO(cfg->sc.prevratio),
5759 +                      camregs + S3C2440_CAM_REG_CICOSCPRERATIO);
5760 +               writel(PRE_DST_WIDTH(cfg->sc.predst_x) |
5761 +                      PRE_DST_HEIGHT(cfg->sc.predst_y),
5762 +                      camregs + S3C2440_CAM_REG_CICOSCPREDST);
5763 +
5764 +               /* Differ from Preview */
5765 +               if (cfg->sc.scalerbypass)
5766 +                       cmd |= SCALERBYPASS;
5767 +               if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
5768 +                       cmd |= BIT30|BIT29;
5769 +               writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) |
5770 +                      MAIN_VRATIO(cfg->sc.mainvratio),
5771 +                      camregs + S3C2440_CAM_REG_CICOSCCTRL);
5772 +               return 0;
5773 +       }
5774 +       if (cfg->dma_type & CAMIF_PREVIEW) {
5775 +               writel(PRE_SHIFT(cfg->sc.shfactor) |
5776 +                      PRE_HRATIO(cfg->sc.prehratio) |
5777 +                      PRE_VRATIO(cfg->sc.prevratio),
5778 +                      camregs + S3C2440_CAM_REG_CIPRSCPRERATIO);
5779 +               writel(PRE_DST_WIDTH(cfg->sc.predst_x) |
5780 +                      PRE_DST_HEIGHT(cfg->sc.predst_y),
5781 +                      camregs + S3C2440_CAM_REG_CIPRSCPREDST);
5782 +               /* Differ from Codec */
5783 +               if (cfg->fmt & CAMIF_RGB24)
5784 +                       cmd |= RGB_FMT24;
5785 +               if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
5786 +                       cmd |= BIT29 | BIT28;
5787 +               writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) | S_METHOD |
5788 +                      MAIN_VRATIO(cfg->sc.mainvratio),
5789 +                      camregs + S3C2440_CAM_REG_CIPRSCCTRL);
5790 +               return 0;
5791 +       }
5792 +
5793 +       panic("CAMERA:DMA_TYPE Wrong \n");
5794 +       return 0;
5795 +}
5796 +
5797 +
5798 +/* Configure Pre-scaler control  & main scaler control register */
5799 +static int camif_scaler(camif_cfg_t *cfg)
5800 +{
5801 +       int tx = cfg->target_x, ty = cfg->target_y;
5802 +       int sx, sy;
5803 +
5804 +       if (tx <= 0 || ty <= 0)
5805 +               panic("CAMERA: Invalid target size \n");
5806 +
5807 +       sx = cfg->gc->source_x - 2 * cfg->gc->win_hor_ofst;
5808 +       sy = cfg->gc->source_y - 2 * cfg->gc->win_ver_ofst;
5809 +       if (sx <= 0 || sy <= 0)
5810 +               panic("CAMERA: Invalid source size \n");
5811 +
5812 +       cfg->sc.modified_src_x = sx;
5813 +       cfg->sc.modified_src_y = sy;
5814 +
5815 +       /* Pre-scaler control register 1 */
5816 +       camif_scaler_internal(sx, tx, &cfg->sc.prehratio, &cfg->sc.hfactor);
5817 +       camif_scaler_internal(sy, ty, &cfg->sc.prevratio, &cfg->sc.vfactor);
5818 +
5819 +       if (cfg->dma_type & CAMIF_PREVIEW)
5820 +               if ((sx / cfg->sc.prehratio) > 640) {
5821 +                       printk(KERN_INFO "CAMERA: Internal Preview line "
5822 +                                        "buffer is 640 pixels\n");
5823 +                       return 1; /* Error */
5824 +               }
5825 +
5826 +       cfg->sc.shfactor = 10 - (cfg->sc.hfactor + cfg->sc.vfactor);
5827 +       /* Pre-scaler control register 2 */
5828 +       cfg->sc.predst_x = sx / cfg->sc.prehratio;
5829 +       cfg->sc.predst_y = sy / cfg->sc.prevratio;
5830 +
5831 +       /* Main-scaler control register */
5832 +       cfg->sc.mainhratio = (sx << 8) / (tx << cfg->sc.hfactor);
5833 +       cfg->sc.mainvratio = (sy << 8) / (ty << cfg->sc.vfactor);
5834 +       DPRINTK(" sx %d, sy %d tx %d ty %d  \n", sx, sy, tx, ty);
5835 +       DPRINTK(" hfactor %d  vfactor %d \n",cfg->sc.hfactor, cfg->sc.vfactor);
5836 +
5837 +       cfg->sc.scaleup_h  = (sx <= tx) ? 1: 0;
5838 +       cfg->sc.scaleup_v  = (sy <= ty) ? 1: 0;
5839 +       if (cfg->sc.scaleup_h != cfg->sc.scaleup_v)
5840 +               printk(KERN_ERR "scaleup_h must be same to scaleup_v \n");
5841 +
5842 +       camif_hw_reg(cfg);
5843 +       camif_target_area(cfg);
5844 +
5845 +       return 0;
5846 +}
5847 +
5848 +/******************************************************
5849 + CalculateBurstSize - Calculate the busrt lengths
5850 + Description:
5851 + - dstHSize: the number of the byte of H Size.
5852 +********************************************************/
5853 +static void camif_g_bsize(u32 hsize, u32 *mburst, u32 *rburst)
5854 +{
5855 +       u32 tmp;
5856 +
5857 +       tmp = (hsize / 4) % 16;
5858 +       switch(tmp) {
5859 +       case 0:
5860 +               *mburst=16;
5861 +               *rburst=16;
5862 +               break;
5863 +       case 4:
5864 +               *mburst=16;
5865 +               *rburst=4;
5866 +               break;
5867 +       case 8:
5868 +               *mburst=16;
5869 +               *rburst=8;
5870 +               break;
5871 +       default:
5872 +               tmp=(hsize / 4) % 8;
5873 +               switch(tmp) {
5874 +               case 0:
5875 +                       *mburst = 8;
5876 +                       *rburst = 8;
5877 +                       break;
5878 +               case 4:
5879 +                       *mburst = 8;
5880 +                       *rburst = 4;
5881 +               default:
5882 +                       *mburst = 4;
5883 +                       tmp = (hsize / 4) % 4;
5884 +                       *rburst= (tmp) ? tmp: 4;
5885 +                       break;
5886 +       }
5887 +               break;
5888 +       }
5889 +}
5890 +
5891 +/* SXGA 1028x1024*/
5892 +/* XGA 1024x768 */
5893 +/* SVGA 800x600 */
5894 +/* VGA 640x480 */
5895 +/* CIF 352x288 */
5896 +/* QVGA 320x240 */
5897 +/* QCIF 176x144 */
5898 +/* ret val
5899 +        1 : DMA Size Error
5900 +*/
5901 +#define BURST_ERR 1
5902 +static int camif_dma_burst(camif_cfg_t *cfg)
5903 +{
5904 +       int width = cfg->target_x;
5905 +
5906 +       if (cfg->dma_type & CAMIF_CODEC ) {
5907 +               u32 yburst_m, yburst_r;
5908 +               u32 cburst_m, cburst_r;
5909 +               /* CODEC DMA WIDHT is multiple of 16 */
5910 +               if (width % 16)
5911 +                       return BURST_ERR;   /* DMA Burst Length Error */
5912 +               camif_g_bsize(width, &yburst_m, &yburst_r);
5913 +               camif_g_bsize(width / 2, &cburst_m, &cburst_r);
5914 +
5915 +               writel(YBURST_M(yburst_m) | CBURST_M(cburst_m) |
5916 +                      YBURST_R(yburst_r) | CBURST_R(cburst_r),
5917 +                      camregs + S3C2440_CAM_REG_CICOCTRL);
5918 +       }
5919 +
5920 +       if (cfg->dma_type & CAMIF_PREVIEW) {
5921 +               u32 rgburst_m, rgburst_r;
5922 +               if(cfg->fmt == CAMIF_RGB24) {
5923 +                       if (width % 2)
5924 +                               return BURST_ERR;   /* DMA Burst Length Error */
5925 +                       camif_g_bsize(width*4,&rgburst_m,&rgburst_r);
5926 +               } else {                /* CAMIF_RGB16 */
5927 +                       if ((width / 2) %2)
5928 +                               return BURST_ERR; /* DMA Burst Length Error */
5929 +                       camif_g_bsize(width*2,&rgburst_m,&rgburst_r);
5930 +               }
5931 +
5932 +               writel(RGBURST_M(rgburst_m) | RGBURST_R(rgburst_r),
5933 +                      camregs + S3C2440_CAM_REG_CIPRCTRL);
5934 +       }
5935 +       return 0;
5936 +}
5937 +
5938 +static int camif_gpio_init(void)
5939 +{
5940 +#ifdef CONFIG_ARCH_S3C24A0A
5941 +       /* S3C24A0A has the dedicated signal pins for Camera */
5942 +#else
5943 +       s3c2410_gpio_cfgpin(S3C2440_GPJ0, S3C2440_GPJ0_CAMDATA0);
5944 +       s3c2410_gpio_cfgpin(S3C2440_GPJ1, S3C2440_GPJ1_CAMDATA1);
5945 +       s3c2410_gpio_cfgpin(S3C2440_GPJ2, S3C2440_GPJ2_CAMDATA2);
5946 +       s3c2410_gpio_cfgpin(S3C2440_GPJ3, S3C2440_GPJ3_CAMDATA3);
5947 +       s3c2410_gpio_cfgpin(S3C2440_GPJ4, S3C2440_GPJ4_CAMDATA4);
5948 +       s3c2410_gpio_cfgpin(S3C2440_GPJ5, S3C2440_GPJ5_CAMDATA5);
5949 +       s3c2410_gpio_cfgpin(S3C2440_GPJ6, S3C2440_GPJ6_CAMDATA6);
5950 +       s3c2410_gpio_cfgpin(S3C2440_GPJ7, S3C2440_GPJ7_CAMDATA7);
5951 +
5952 +       s3c2410_gpio_cfgpin(S3C2440_GPJ8, S3C2440_GPJ8_CAMPCLK);
5953 +       s3c2410_gpio_cfgpin(S3C2440_GPJ9, S3C2440_GPJ9_CAMVSYNC);
5954 +       s3c2410_gpio_cfgpin(S3C2440_GPJ10, S3C2440_GPJ10_CAMHREF);
5955 +       s3c2410_gpio_cfgpin(S3C2440_GPJ11, S3C2440_GPJ11_CAMCLKOUT);
5956 +       s3c2410_gpio_cfgpin(S3C2440_GPJ12, S3C2440_GPJ12_CAMRESET);
5957 +#endif
5958 +        return 0;
5959 +}
5960 +
5961 +
5962 +#define ROUND_ADD 0x100000
5963 +
5964 +#ifdef CONFIG_ARCH_S3C24A0A
5965 +int camif_clock_init(camif_gc_t *gc)
5966 +{
5967 +       unsigned int upll, camclk_div, camclk;
5968 +
5969 +       if (!gc) camclk = 24000000;
5970 +       else  {
5971 +               camclk = gc->camclk;
5972 +               if (camclk > 48000000)
5973 +                       printk(KERN_ERR "Wrong Camera Clock\n");
5974 +       }
5975 +
5976 +       CLKCON |= CLKCON_CAM_UPLL | CLKCON_CAM_HCLK;
5977 +       upll = get_bus_clk(GET_UPLL);
5978 +       printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
5979 +       UPLLCON = FInsrt(56, fPLL_MDIV) | FInsrt(2, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
5980 +       upll = get_bus_clk(GET_UPLL);
5981 +
5982 +       camclk_div = (upll+ROUND_ADD) / camclk - 1;
5983 +       CLKDIVN = (CLKDIVN & 0xFF) | CLKDIVN_CAM(camclk_div);
5984 +       printk(KERN_INFO"CAMERA:upll %d MACRO 0x%08X CLKDIVN 0x%08X \n",
5985 +                               upll, CLKDIVN_CAM(camclk_div), CLKDIVN);
5986 +       writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);  /* Dummy ? */
5987 +
5988 +       return 0;
5989 +}
5990 +#else
5991 +int camif_clock_init(camif_gc_t *gc)
5992 +{
5993 +       unsigned int camclk;
5994 +       struct clk *clk_camif = clk_get(NULL, "camif");
5995 +       struct clk *clk_camif_upll = clk_get(NULL, "camif-upll");
5996 +
5997 +       if (!gc)
5998 +               camclk = 24000000;
5999 +       else {
6000 +               camclk = gc->camclk;
6001 +               if (camclk > 48000000)
6002 +                       printk(KERN_ERR "Wrong Camera Clock\n");
6003 +       }
6004 +
6005 +       clk_set_rate(clk_camif, camclk);
6006 +
6007 +       clk_enable(clk_camif);
6008 +       clk_enable(clk_camif_upll);
6009 +
6010 +
6011 +#if 0
6012 +       CLKCON |= CLKCON_CAMIF;
6013 +       upll = elfin_get_bus_clk(GET_UPLL);
6014 +       printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll);
6015 +       {
6016 +               UPLLCON = FInsrt(60, fPLL_MDIV) | FInsrt(4, fPLL_PDIV)| FInsrt(1, fPLL_SDIV);
6017 +               CLKDIVN |= DIVN_UPLL;   /* For USB */
6018 +               upll = elfin_get_bus_clk(GET_UPLL);
6019 +       }
6020 +
6021 +       camclk_div = (upll+ROUND_ADD) /(camclk * 2) -1;
6022 +       CAMDIVN = CAMCLK_SET_DIV|(camclk_div&0xf);
6023 +       printk(KERN_INFO "CAMERA:upll %08d  cam_clk %08d CAMDIVN 0x%08x \n",upll,camclk, CAMDIVN);
6024 +#endif
6025 +       writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);  /* Dummy ? */
6026 +
6027 +       return 0;
6028 +}
6029 +#endif
6030 +
6031 +/*
6032 +   Reset Camera IP in CPU
6033 +   Reset External Sensor
6034 + */
6035 +void camif_reset(int is, int delay)
6036 +{
6037 +       switch (is) {
6038 +               case CAMIF_RESET:
6039 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
6040 +                              GC_SWRST,
6041 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6042 +                       mdelay(1);
6043 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
6044 +                              ~GC_SWRST,
6045 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6046 +                       break;
6047 +               case CAMIF_EX_RESET_AH: /*Active High */
6048 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
6049 +                              ~GC_CAMRST,
6050 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6051 +                       udelay(200);
6052 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
6053 +                              GC_CAMRST,
6054 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6055 +                       udelay(delay);
6056 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
6057 +                              ~GC_CAMRST,
6058 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6059 +                       break;
6060 +               case CAMIF_EX_RESET_AL: /*Active Low */
6061 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
6062 +                              GC_CAMRST,
6063 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6064 +                       udelay(200);
6065 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) &
6066 +                              ~GC_CAMRST,
6067 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6068 +                       udelay(delay);
6069 +                       writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) |
6070 +                              GC_CAMRST,
6071 +                              camregs + S3C2440_CAM_REG_CIGCTRL);
6072 +                       break;
6073 +               default:
6074 +                       break;
6075 +       }
6076 +}
6077 +
6078 +/* For Camera Operation,
6079 + * we can give the high priority to REQ2 of ARBITER1
6080 + */
6081 +
6082 +/* Please move me into proper place
6083 + *  camif_gc_t is not because "rmmod imgsenor" will delete the instance of camif_gc_t
6084 + */
6085 +static u32 old_priority;
6086 +
6087 +static void camif_bus_priority(int flag)
6088 +{
6089 +       if (flag) {
6090 +#ifdef CONFIG_ARCH_S3C24A0A
6091 +               old_priority = PRIORITY0;
6092 +               PRIORITY0 = PRIORITY_I_FIX;
6093 +               PRIORITY1 = PRIORITY_I_FIX;
6094 +
6095 +#else
6096 +               old_priority = readl(S3C2410_PRIORITY);
6097 +               writel(readl(S3C2410_PRIORITY) & ~(3<<7), S3C2410_PRIORITY);
6098 +               writel(readl(S3C2410_PRIORITY) |  (1<<7), S3C2410_PRIORITY); /* Arbiter 1, REQ2 first */
6099 +               writel(readl(S3C2410_PRIORITY) & ~(1<<1), S3C2410_PRIORITY); /* Disable Priority Rotate */
6100 +#endif
6101 +       }
6102 +       else {
6103 +#ifdef CONFIG_ARCH_S3C24A0A
6104 +               PRIORITY0 = old_priority;
6105 +               PRIORITY1 = old_priority;
6106 +#else
6107 +               writel(old_priority, S3C2410_PRIORITY);
6108 +#endif
6109 +       }
6110 +}
6111 +
6112 +static void inline camif_clock_off(void)
6113 +{
6114 +#if defined (CONFIG_ARCH_S3C24A0A)
6115 +       writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);
6116 +
6117 +       CLKCON &= ~CLKCON_CAM_UPLL;
6118 +       CLKCON &= ~CLKCON_CAM_HCLK;
6119 +#else
6120 +       struct clk *clk_camif = clk_get(NULL, "camif");
6121 +       struct clk *clk_camif_upll = clk_get(NULL, "camif-upll");
6122 +
6123 +       writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT);
6124 +
6125 +       clk_disable(clk_camif);
6126 +       clk_disable(clk_camif_upll);
6127 +#endif
6128 +}
6129 +
6130 +
6131 +/* Init external image sensor
6132 + *  Before make some value into image senor,
6133 + *  you must set up the pixel clock.
6134 + */
6135 +void camif_setup_sensor(void)
6136 +{
6137 +       camif_reset(CAMIF_RESET, 0);
6138 +       camif_gpio_init();
6139 +       camif_clock_init(NULL);
6140 +/* Sometimes ,Before loading I2C module, we need the reset signal */
6141 +#ifdef CONFIG_ARCH_S3C24A0A
6142 +       camif_reset(CAMIF_EX_RESET_AL,1000);
6143 +#else
6144 +       camif_reset(CAMIF_EX_RESET_AH,1000);
6145 +#endif
6146 +}
6147 +
6148 +void camif_hw_close(camif_cfg_t *cfg)
6149 +{
6150 +       camif_bus_priority(0);
6151 +       camif_clock_off();
6152 +}
6153 +
6154 +void camif_hw_open(camif_gc_t *gc)
6155 +{
6156 +       camif_source_fmt(gc);
6157 +       camif_win_offset(gc);
6158 +       camif_bus_priority(1);
6159 +}
6160 +
6161 +
6162 +
6163 +/*
6164 + * Local variables:
6165 + * tab-width: 8
6166 + *  c-indent-level: 8
6167 + *  c-basic-offset: 8
6168 + *  c-set-style: "K&R"
6169 + * End:
6170 + */
6171 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif_fsm.c
6172 ===================================================================
6173 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
6174 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif_fsm.c     2008-12-11 22:46:48.000000000 +0100
6175 @@ -0,0 +1,432 @@
6176 +/*
6177 +    Copyright (C) 2004 Samsung Electronics
6178 +                     SW.LEE <hitchcar@sec.samsung.com>
6179 +
6180 +    This program is free software; you can redistribute it and/or modify
6181 +    it under the terms of the GNU General Public License as published by
6182 +    the Free Software Foundation; either version 2 of the License, or
6183 +    (at your option) any later version.
6184 +*/
6185 +
6186 +#include <linux/version.h>
6187 +#include <linux/module.h>
6188 +#include <linux/delay.h>
6189 +#include <linux/errno.h>
6190 +#include <linux/fs.h>
6191 +#include <linux/kernel.h>
6192 +#include <linux/major.h>
6193 +#include <linux/slab.h>
6194 +#include <linux/poll.h>
6195 +#include <linux/signal.h>
6196 +#include <linux/ioport.h>
6197 +#include <linux/sched.h>
6198 +#include <linux/types.h>
6199 +#include <linux/interrupt.h>
6200 +#include <linux/kmod.h>
6201 +#include <linux/vmalloc.h>
6202 +#include <linux/init.h>
6203 +#include <linux/pagemap.h>
6204 +#include <asm/io.h>
6205 +#include <asm/irq.h>
6206 +#include <asm/semaphore.h>
6207 +#include <linux/miscdevice.h>
6208 +
6209 +#define CONFIG_VIDEO_V4L1_COMPAT
6210 +#include <linux/videodev.h>
6211 +#include "camif.h"
6212 +
6213 +//#define SW_DEBUG
6214 +static void camif_start_p_with_c(camif_cfg_t *cfg);
6215 +
6216 +#include "camif.h"
6217 +const char *fsm_version =
6218 +        "$Id: camif_fsm.c,v 1.3 2004/04/27 10:26:28 swlee Exp $";
6219 +
6220 +
6221 +/*
6222 + * FSM function is the place where Synchronization in not necessary
6223 + * because IRS calls this functions.
6224 + */
6225 +
6226 +ssize_t camif_p_1fsm_start(camif_cfg_t *cfg)
6227 +{
6228 +       //camif_reset(CAMIF_RESET,0);
6229 +       cfg->exec = CAMIF_DMA_ON;
6230 +       camif_capture_start(cfg);
6231 +       camif_last_irq_en(cfg);
6232 +       cfg->status = CAMIF_STARTED;
6233 +       cfg->fsm = CAMIF_1nd_INT;
6234 +       return 0;
6235 +}
6236 +
6237 +
6238 +ssize_t camif_p_2fsm_start(camif_cfg_t *cfg)
6239 +{
6240 +       camif_reset(CAMIF_RESET,0);/* FIFO Count goes to zero */
6241 +       cfg->exec = CAMIF_DMA_ON;
6242 +       camif_capture_start(cfg);
6243 +       cfg->status = CAMIF_STARTED;
6244 +       cfg->fsm = CAMIF_1nd_INT;
6245 +       return 0;
6246 +}
6247 +
6248 +
6249 +ssize_t camif_4fsm_start(camif_cfg_t *cfg)
6250 +{
6251 +       camif_reset(CAMIF_RESET,0); /* FIFO Count goes to zero */
6252 +       cfg->exec = CAMIF_DMA_ON;
6253 +       camif_capture_start(cfg);
6254 +       cfg->status = CAMIF_STARTED;
6255 +       cfg->fsm = CAMIF_1nd_INT;
6256 +       cfg->perf.frames = 0;
6257 +       return 0;
6258 +}
6259 +
6260 +
6261 +/* Policy:
6262 +     cfg->perf.frames  set in camif_fsm.c
6263 +     cfg->status set in video-driver.c
6264 + */
6265 +
6266 +/*
6267 + * Don't insert camif_reset(CAM_RESET, 0 ) into this func
6268 + */
6269 +ssize_t camif_p_stop(camif_cfg_t *cfg)
6270 +{
6271 +       cfg->exec = CAMIF_DMA_OFF;
6272 +//     cfg->status = CAMIF_STOPPED;
6273 +       camif_capture_stop(cfg);
6274 +       cfg->perf.frames = 0;   /* Dupplicated ? */
6275 +       return 0;
6276 +}
6277 +
6278 +/* When C working, P asks C to play togehter */
6279 +/* Only P must call this function */
6280 +void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other)
6281 +{
6282 +//     cfg->gc->other = get_camif(CODEC_MINOR);
6283 +       cfg->gc->other = other;
6284 +       camif_start_p_with_c(cfg);
6285 +}
6286 +
6287 +static void camif_start_p_with_c(camif_cfg_t *cfg)
6288 +{
6289 +       camif_cfg_t *other = (camif_cfg_t *)cfg->gc->other;
6290 +       /* Preview Stop */
6291 +       cfg->exec = CAMIF_DMA_OFF;
6292 +       camif_capture_stop(cfg);
6293 +       /* Start P and C */
6294 +       camif_reset(CAMIF_RESET, 0);
6295 +       cfg->exec =CAMIF_BOTH_DMA_ON;
6296 +       camif_capture_start(cfg);
6297 +       cfg->fsm = CAMIF_1nd_INT; /* For Preview */
6298 +       if(!other) panic("Unexpected Error \n");
6299 +       other->fsm = CAMIF_1nd_INT; /* For Preview */
6300 +}
6301 +
6302 +static void camif_auto_restart(camif_cfg_t *cfg)
6303 +{
6304 +//     if (cfg->dma_type & CAMIF_CODEC) return;
6305 +       if (cfg->auto_restart)
6306 +               camif_start_p_with_c(cfg);
6307 +}
6308 +
6309 +
6310 +/* Supposed that PREVIEW already running
6311 + * request PREVIEW to start with Codec
6312 + */
6313 +static int camif_check_global(camif_cfg_t *cfg)
6314 +{
6315 +       int ret = 0;
6316 +
6317 +        if (down_interruptible(&cfg->gc->lock))
6318 +                       return -ERESTARTSYS;
6319 +        if ( cfg->gc->status & CWANT2START ) {
6320 +               cfg->gc->status &= ~CWANT2START;
6321 +               cfg->auto_restart = 1;
6322 +               ret = 1;
6323 +       }
6324 +       else {
6325 +               ret = 0; /* There is no codec */
6326 +               cfg->auto_restart = 0; /* Duplicated ..Dummy */
6327 +       }
6328 +
6329 +       up(&cfg->gc->lock);
6330 +
6331 +        return ret;
6332 +}
6333 +
6334 +/*
6335 + *    1nd INT : Start Interrupt
6336 + *    Xnd INT : enable Last IRQ : pingpong get the valid data
6337 + *    Ynd INT : Stop Codec or Preview : pingpong get the valid data
6338 + *    Znd INT : Last IRQ : valid data
6339 + */
6340 +#define CHECK_FREQ 5
6341 +int camif_enter_p_4fsm(camif_cfg_t *cfg)
6342 +{
6343 +       int ret = 0;
6344 +
6345 +       cfg->perf.frames++;
6346 +       if (cfg->fsm == CAMIF_NORMAL_INT)
6347 +       if (cfg->perf.frames % CHECK_FREQ == 0)
6348 +               ret = camif_check_global(cfg);
6349 +       if (ret > 0) cfg->fsm = CAMIF_Xnd_INT; /* Codec wait for Preview */
6350 +
6351 +       switch (cfg->fsm) {
6352 +               case CAMIF_1nd_INT:           /* Start IRQ */
6353 +                       cfg->fsm = CAMIF_NORMAL_INT;
6354 +                       ret = INSTANT_SKIP;
6355 +                       DPRINTK(KERN_INFO "1nd INT \n");
6356 +                       break;
6357 +               case CAMIF_NORMAL_INT:
6358 +                       cfg->status = CAMIF_INT_HAPPEN;
6359 +                       cfg->fsm = CAMIF_NORMAL_INT;
6360 +                       ret = INSTANT_GO;
6361 +                       DPRINTK(KERN_INFO "NORMAL INT \n");
6362 +                       break;
6363 +               case CAMIF_Xnd_INT:
6364 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
6365 +                       cfg->status = CAMIF_INT_HAPPEN;
6366 +                       cfg->fsm = CAMIF_Ynd_INT;
6367 +                       ret = INSTANT_GO;
6368 +                       DPRINTK(KERN_INFO "Xnd INT \n");
6369 +                       break;
6370 +               case CAMIF_Ynd_INT:        /* Capture Stop */
6371 +                       cfg->exec = CAMIF_DMA_OFF;
6372 +                       cfg->status = CAMIF_INT_HAPPEN;
6373 +                       camif_capture_stop(cfg);
6374 +                       cfg->fsm = CAMIF_Znd_INT;
6375 +                       ret = INSTANT_GO;
6376 +                       DPRINTK(KERN_INFO "Ynd INT \n");
6377 +                       break;
6378 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
6379 +                       cfg->fsm = CAMIF_DUMMY_INT;
6380 +                       cfg->status = CAMIF_INT_HAPPEN;
6381 +                       ret = INSTANT_GO;
6382 +                       camif_auto_restart(cfg);  /* Automatically Restart Camera */
6383 +                       DPRINTK(KERN_INFO "Znd INT \n");
6384 +                       break;
6385 +               case CAMIF_DUMMY_INT:
6386 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
6387 +                       ret = INSTANT_SKIP;
6388 +//                     DPRINTK(KERN_INFO "Dummy INT \n");
6389 +                       break;
6390 +               default:
6391 +                       printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
6392 +                       ret = INSTANT_SKIP;
6393 +                       break;
6394 +       }
6395 +       return ret;
6396 +}
6397 +
6398 +
6399 +/*
6400 + * NO autorestart included in this function
6401 + */
6402 +int camif_enter_c_4fsm(camif_cfg_t *cfg)
6403 +{
6404 +       int ret;
6405 +
6406 +       cfg->perf.frames++;
6407 +#if 0
6408 +       if (   (cfg->fsm==CAMIF_NORMAL_INT)
6409 +           && (cfg->perf.frames>cfg->restart_limit-1)
6410 +          )
6411 +               cfg->fsm = CAMIF_Xnd_INT;
6412 +#endif
6413 +       switch (cfg->fsm) {
6414 +               case CAMIF_1nd_INT:           /* Start IRQ */
6415 +                       cfg->fsm = CAMIF_NORMAL_INT;
6416 +//                     cfg->status = CAMIF_STARTED; /* need this to meet auto-restart */
6417 +                       ret = INSTANT_SKIP;
6418 +                       DPRINTK(KERN_INFO "1nd INT \n");
6419 +                       break;
6420 +               case CAMIF_NORMAL_INT:
6421 +                       cfg->status = CAMIF_INT_HAPPEN;
6422 +                       cfg->fsm = CAMIF_NORMAL_INT;
6423 +                       ret = INSTANT_GO;
6424 +                       DPRINTK(KERN_INFO "NORMALd INT \n");
6425 +                       break;
6426 +               case CAMIF_Xnd_INT:
6427 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
6428 +                       cfg->status = CAMIF_INT_HAPPEN;
6429 +                       cfg->fsm = CAMIF_Ynd_INT;
6430 +                       ret = INSTANT_GO;
6431 +                       DPRINTK(KERN_INFO "Xnd INT \n");
6432 +                       break;
6433 +               case CAMIF_Ynd_INT:        /* Capture Stop */
6434 +                       cfg->exec = CAMIF_DMA_OFF;
6435 +                       cfg->status = CAMIF_INT_HAPPEN;
6436 +                       camif_capture_stop(cfg);
6437 +                       cfg->fsm = CAMIF_Znd_INT;
6438 +                       ret = INSTANT_GO;
6439 +                       DPRINTK(KERN_INFO "Ynd INT \n");
6440 +                       break;
6441 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
6442 +                       cfg->fsm = CAMIF_DUMMY_INT;
6443 +                       cfg->status = CAMIF_INT_HAPPEN;
6444 +                       ret = INSTANT_GO;
6445 +                       DPRINTK(KERN_INFO "Znd INT \n");
6446 +                       break;
6447 +               case CAMIF_DUMMY_INT:
6448 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
6449 +                       ret = INSTANT_SKIP;
6450 +                       break;
6451 +               default:
6452 +                       printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm);
6453 +                       ret = INSTANT_SKIP;
6454 +                       break;
6455 +       }
6456 +       return ret;
6457 +}
6458 +
6459 +/* 4 Interrups State Machine is for two pingpong
6460 + *    1nd INT : Start Interrupt
6461 + *    Xnd INT : enable Last IRQ : pingpong get the valid data
6462 + *    Ynd INT : Stop Codec or Preview : pingpong get the valid data
6463 + *    Znd INT : Last IRQ : valid data
6464 + *
6465 + * Note:
6466 + *    Before calling this func, you must call camif_reset
6467 + */
6468 +
6469 +int camif_enter_2fsm(camif_cfg_t *cfg) /* Codec FSM */
6470 +{
6471 +       int ret;
6472 +
6473 +       cfg->perf.frames++;
6474 +       switch (cfg->fsm) {
6475 +               case CAMIF_1nd_INT:           /* Start IRQ */
6476 +                       cfg->fsm = CAMIF_Xnd_INT;
6477 +                       ret = INSTANT_SKIP;
6478 +//                     printk(KERN_INFO "1nd INT \n");
6479 +                       break;
6480 +               case CAMIF_Xnd_INT:
6481 +                       camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */
6482 +                       cfg->now_frame_num = 0;
6483 +                       cfg->status = CAMIF_INT_HAPPEN;
6484 +                       cfg->fsm = CAMIF_Ynd_INT;
6485 +                       ret = INSTANT_GO;
6486 +//                     printk(KERN_INFO "2nd INT \n");
6487 +                       break;
6488 +               case CAMIF_Ynd_INT:        /* Capture Stop */
6489 +                       cfg->exec = CAMIF_DMA_OFF;
6490 +                       cfg->now_frame_num = 1;
6491 +                       cfg->status = CAMIF_INT_HAPPEN;
6492 +                       camif_capture_stop(cfg);
6493 +                       cfg->fsm = CAMIF_Znd_INT;
6494 +                       ret = INSTANT_GO;
6495 +//                     printk(KERN_INFO "Ynd INT \n");
6496 +                       break;
6497 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
6498 +                       cfg->now_frame_num = 0;
6499 +//                     cfg->fsm = CAMIF_DUMMY_INT;
6500 +                       cfg->status = CAMIF_INT_HAPPEN;
6501 +                       ret = INSTANT_GO;
6502 +//                     printk(KERN_INFO "Znd INT \n");
6503 +                       break;
6504 +               case CAMIF_DUMMY_INT:
6505 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
6506 +                       ret = INSTANT_SKIP;
6507 +                       printk(KERN_INFO "Dummy INT \n");
6508 +                       break;
6509 +               default:  /* CAMIF_PENDING_INT */
6510 +                       printk(KERN_INFO "Unexpect INT \n");
6511 +                       ret = INSTANT_SKIP;
6512 +                       break;
6513 +       }
6514 +       return ret;
6515 +}
6516 +
6517 +
6518 +/* 2 Interrups State Machine is for one pingpong
6519 + *    1nd INT : Stop Codec or Preview : pingpong get the valid data
6520 + *    2nd INT : Last IRQ : dummy data
6521 + */
6522 +int camif_enter_1fsm(camif_cfg_t *cfg) /* Codec FSM */
6523 +{
6524 +       int ret;
6525 +
6526 +       cfg->perf.frames++;
6527 +       switch (cfg->fsm) {
6528 +               case CAMIF_Ynd_INT:             /* IRQ for Enabling LAST IRQ */
6529 +                       cfg->exec = CAMIF_DMA_OFF;
6530 +                       camif_capture_stop(cfg);
6531 +                       cfg->fsm = CAMIF_Znd_INT;
6532 +                       ret = INSTANT_SKIP;
6533 +       //              printk(KERN_INFO "Ynd INT \n");
6534 +                       break;
6535 +               case CAMIF_Znd_INT:             /*  LAST IRQ (Dummy IRQ */
6536 +                       cfg->fsm = CAMIF_DUMMY_INT;
6537 +                       cfg->status = CAMIF_INT_HAPPEN;
6538 +                       ret = INSTANT_GO;
6539 +       //              printk(KERN_INFO "Znd INT \n");
6540 +                       break;
6541 +               case CAMIF_DUMMY_INT:
6542 +                       cfg->status = CAMIF_STOPPED; /* Dupplicate ? */
6543 +                       ret = INSTANT_SKIP;
6544 +                       printk(KERN_INFO "Dummy INT \n");
6545 +                       break;
6546 +               default:
6547 +                       printk(KERN_INFO "Unexpect INT \n");
6548 +                       ret = INSTANT_SKIP;
6549 +                       break;
6550 +       }
6551 +       return ret;
6552 +}
6553 +
6554 +
6555 +/*
6556 + *  GLOBAL STATUS CONTROL FUNCTION
6557 + *
6558 + */
6559 +
6560 +
6561 +/* Supposed that PREVIEW already running
6562 + * request PREVIEW to start with Codec
6563 + */
6564 +int camif_callback_start(camif_cfg_t *cfg)
6565 +{
6566 +        int  doit = 1;
6567 +        while (doit) {
6568 +                if (down_interruptible(&cfg->gc->lock)) {
6569 +                        return -ERESTARTSYS;
6570 +                }
6571 +                cfg->gc->status = CWANT2START;
6572 +                cfg->gc->other = cfg;
6573 +                up(&cfg->gc->lock);
6574 +                doit = 0;
6575 +        }
6576 +        return 0;
6577 +}
6578 +
6579 +/*
6580 + * Return status of Preview Machine
6581 +  ret value :
6582 +      0: Preview is not working
6583 +      X: Codec must follow PREVIEW start
6584 +*/
6585 +int camif_check_preview(camif_cfg_t *cfg)
6586 +{
6587 +        int ret = 0;
6588 +
6589 +        if (down_interruptible(&cfg->gc->lock)) {
6590 +                        ret = -ERESTARTSYS;
6591 +                        return ret;
6592 +        }
6593 +        if (cfg->gc->user == 1) ret = 0;
6594 +     //   else if (cfg->gc->status & PNOTWORKING) ret = 0;
6595 +        else ret = 1;
6596 +        up(&cfg->gc->lock);
6597 +        return ret;
6598 +}
6599 +
6600 +
6601 +
6602 +
6603 +/*
6604 + * Local variables:
6605 + * c-basic-offset: 8
6606 + * End:
6607 + */
6608 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.h
6609 ===================================================================
6610 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
6611 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/camif.h 2008-12-11 22:46:48.000000000 +0100
6612 @@ -0,0 +1,304 @@
6613 +/*
6614 +    FIMC2.0  Camera Header File
6615 +
6616 +    Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
6617 +
6618 +       Author : SW.LEE <hitchcar@samsung.com>
6619 +
6620 +    This program is free software; you can redistribute it and/or modify
6621 +    it under the terms of the GNU General Public License as published by
6622 +    the Free Software Foundation; either version 2 of the License, or
6623 +    (at your option) any later version.
6624 +*
6625 +*/
6626 +
6627 +
6628 +#ifndef __FIMC20_CAMIF_H_
6629 +#define __FIMC20_CAMIF_H_
6630 +
6631 +#ifdef __KERNEL__
6632 +
6633 +#include "bits.h"
6634 +#include "videodev.h"
6635 +#include <asm/types.h>
6636 +#include <linux/i2c.h>
6637 +
6638 +#endif  /* __KERNEL__ */
6639 +
6640 +#ifndef O_NONCAP
6641 +#define O_NONCAP O_TRUNC
6642 +#endif
6643 +
6644 +/* Codec or Preview Status */
6645 +#define CAMIF_STARTED         BIT1
6646 +#define CAMIF_STOPPED         BIT2
6647 +#define CAMIF_INT_HAPPEN      BIT3
6648 +
6649 +/* Codec or Preview  : Interrupt FSM */
6650 +#define CAMIF_1nd_INT         BIT7
6651 +#define CAMIF_Xnd_INT         BIT8
6652 +#define CAMIF_Ynd_INT         BIT9
6653 +#define CAMIF_Znd_INT         BIT10
6654 +#define CAMIF_NORMAL_INT      BIT11
6655 +#define CAMIF_DUMMY_INT       BIT12
6656 +#define CAMIF_PENDING_INT     0
6657 +
6658 +
6659 +/* CAMIF RESET Definition */
6660 +#define CAMIF_RESET           BIT0
6661 +#define CAMIF_EX_RESET_AL     BIT1     /* Active Low */
6662 +#define CAMIF_EX_RESET_AH     BIT2     /* Active High */
6663 +
6664 +
6665 +enum camif_itu_fmt {
6666 +       CAMIF_ITU601 = BIT31,
6667 +       CAMIF_ITU656 = 0
6668 +};
6669 +
6670 +/* It is possbie to use two device simultaneously */
6671 +enum camif_dma_type {
6672 +       CAMIF_PREVIEW = BIT0,
6673 +       CAMIF_CODEC   = BIT1,
6674 +};
6675 +
6676 +enum camif_order422 {
6677 +       CAMIF_YCBYCR = 0,
6678 +       CAMIF_YCRYCB = BIT14,
6679 +       CAMIF_CBYCRY = BIT15,
6680 +       CAMIF_CRYCBY = BIT14 | BIT15
6681 +};
6682 +
6683 +enum flip_mode {
6684 +        CAMIF_FLIP   = 0,
6685 +        CAMIF_FLIP_X = BIT14,
6686 +        CAMIF_FLIP_Y = BIT15,
6687 +        CAMIF_FLIP_MIRROR = BIT14 |BIT15,
6688 +};
6689 +
6690 +enum camif_codec_fmt {
6691 +       /* Codec part */
6692 +        CAMIF_IN_YCBCR420  = BIT0, /* Currently IN_YCBCR format fixed */
6693 +        CAMIF_IN_YCBCR422  = BIT1,
6694 +        CAMIF_OUT_YCBCR420 = BIT4,
6695 +        CAMIF_OUT_YCBCR422 = BIT5,
6696 +       /* Preview Part */
6697 +       CAMIF_RGB16        = BIT2,
6698 +       CAMIF_RGB24        = BIT3,
6699 +};
6700 +
6701 +enum camif_capturing {
6702 +        CAMIF_BOTH_DMA_ON  = BIT4,
6703 +       CAMIF_DMA_ON       = BIT3,
6704 +       CAMIF_BOTH_DMA_OFF = BIT1,
6705 +       CAMIF_DMA_OFF      = BIT0,
6706 +       /*------------------------*/
6707 +       CAMIF_DMA_OFF_L_IRQ= BIT5,
6708 +};
6709 +
6710 +typedef struct camif_performance
6711 +{
6712 +       int     frames;
6713 +       int     framesdropped;
6714 +       __u64   bytesin;
6715 +       __u64   bytesout;
6716 +       __u32   reserved[4];
6717 +} camif_perf_t;
6718 +
6719 +
6720 +typedef struct {
6721 +        dma_addr_t  phys_y;
6722 +        dma_addr_t  phys_cb;
6723 +        dma_addr_t  phys_cr;
6724 +        u8          *virt_y;
6725 +        u8          *virt_cb;
6726 +        u8          *virt_cr;
6727 +        dma_addr_t  phys_rgb;
6728 +        u8          *virt_rgb;
6729 +}img_buf_t;
6730 +
6731 +
6732 +/* this structure convers the CIWDOFFST, prescaler, mainscaler */
6733 +typedef struct {
6734 +       u32 modified_src_x;     /* After windows applyed to source_x */
6735 +       u32 modified_src_y;
6736 +       u32 hfactor;
6737 +       u32 vfactor;
6738 +       u32 shfactor;           /* SHfactor = 10 - ( hfactor + vfactor ) */
6739 +       u32 prehratio;
6740 +       u32 prevratio;
6741 +       u32 predst_x;
6742 +       u32 predst_y;
6743 +       u32 scaleup_h;
6744 +       u32 scaleup_v;
6745 +       u32 mainhratio;
6746 +       u32 mainvratio;
6747 +       u32 scalerbypass;       /* only codec */
6748 +} scaler_t;
6749 +
6750 +
6751 +enum v4l2_status {
6752 +        CAMIF_V4L2_INIT    = BIT0,
6753 +        CAMIF_v4L2_DIRTY   = BIT1,
6754 +};
6755 +
6756 +
6757 +/* Global Status Definition */
6758 +#define PWANT2START   BIT0
6759 +#define CWANT2START   BIT1
6760 +#define BOTH_STARTED  (PWANT2START|CWANT2START)
6761 +#define PNOTWORKING   BIT4
6762 +#define C_WORKING     BIT5
6763 +
6764 +typedef struct {
6765 +       struct semaphore         lock;
6766 +        enum camif_itu_fmt       itu_fmt;
6767 +        enum camif_order422      order422;
6768 +       u32                      win_hor_ofst;
6769 +       u32                      win_ver_ofst;
6770 +        u32                      camclk;  /* External Image Sensor Camera Clock */
6771 +        u32                      source_x;
6772 +        u32                      source_y;
6773 +       u32                      polarity_pclk;
6774 +       u32                      polarity_vsync;
6775 +       u32                      polarity_href;
6776 +       struct i2c_client        *sensor;
6777 +       u32                      user; /* MAX 2 (codec, preview) */
6778 +       u32                      old_priority; /* BUS PRIORITY register */
6779 +       u32                      status;
6780 +       u32                      init_sensor;/* initializing sensor */
6781 +       void                     *other;    /* Codec camif_cfg_t */
6782 +       u32                      reset_type;    /* External Sensor Reset  Type */
6783 +       u32                      reset_udelay;
6784 +} camif_gc_t;                  /* gobal control register */
6785 +
6786 +
6787 +/* when  App want to change v4l2 parameter,
6788 + * we instantly store it into v4l2_t v2
6789 + * and then reflect it to hardware
6790 + */
6791 +typedef struct v4l2 {
6792 +       struct v4l2_fmtdesc     *fmtdesc;
6793 +       struct v4l2_pix_format   fmt; /* current pixel format */
6794 +       struct v4l2_input        input;
6795 +        struct video_picture     picture;
6796 +       enum v4l2_status         status;
6797 +       int     used_fmt ;      /* used format index  */
6798 +} v4l2_t;
6799 +
6800 +
6801 +typedef struct camif_c_t {
6802 +        struct video_device      *v;
6803 +       /* V4L2 param only for v4l2 driver */
6804 +       v4l2_t                    v2;
6805 +       camif_gc_t               *gc; /* Common between Codec and Preview */
6806 +       /* logical parameter */
6807 +       wait_queue_head_t        waitq;
6808 +       u32                      status; /* Start/Stop */
6809 +       u32                      fsm; /* Start/Stop */
6810 +       u32                      open_count; /* duplicated */
6811 +       int                      irq;
6812 +       char                     shortname[16];
6813 +        u32                      target_x;
6814 +        u32                      target_y;
6815 +       scaler_t                 sc;
6816 +       enum flip_mode           flip;
6817 +        enum camif_dma_type      dma_type;
6818 +       /* 4 pingpong Frame memory */
6819 +        u8                       *pp_virt_buf;
6820 +        dma_addr_t               pp_phys_buf;
6821 +        u32                      pp_totalsize;
6822 +       u32                      pp_num; /* used pingpong memory number */
6823 +        img_buf_t                img_buf[4];
6824 +        enum camif_codec_fmt     fmt;
6825 +        enum camif_capturing     exec;
6826 +       camif_perf_t             perf;
6827 +       u32                      now_frame_num;
6828 +       u32                      auto_restart; /* Only For Preview */
6829 +} camif_cfg_t;
6830 +
6831 +#ifdef SW_DEBUG
6832 +#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
6833 +#else
6834 +#define DPRINTK(fmt, args...)
6835 +#endif
6836 +
6837 +
6838 +#ifdef SW_DEBUG
6839 +#define assert(expr) \
6840 +        if(!(expr)) {                                   \
6841 +        printk( "Assertion failed! %s,%s,%s,line=%d\n", \
6842 +        #expr,__FILE__,__FUNCTION__,__LINE__);          \
6843 +        }
6844 +#else
6845 +#define assert(expr)
6846 +#endif
6847 +
6848 +
6849 +
6850 +extern int camif_capture_start(camif_cfg_t *);
6851 +extern int camif_capture_stop(camif_cfg_t *);
6852 +extern int camif_g_frame_num(camif_cfg_t *);
6853 +extern u8 * camif_g_frame(camif_cfg_t *);
6854 +extern int  camif_win_offset(camif_gc_t *);
6855 +extern void camif_hw_open(camif_gc_t *);
6856 +extern void camif_hw_close(camif_cfg_t *);
6857 +extern int camif_dynamic_open(camif_cfg_t *);
6858 +extern int camif_dynamic_close(camif_cfg_t *);
6859 +extern void camif_reset(int,int);
6860 +extern void camif_setup_sensor(void);
6861 +extern int camif_g_fifo_status(camif_cfg_t *);
6862 +extern void camif_last_irq_en(camif_cfg_t *);
6863 +extern void camif_change_flip(camif_cfg_t *);
6864 +
6865 +
6866 +/* Todo
6867 + *  API Interface function to both Character and V4L2 Drivers
6868 + */
6869 +extern int camif_do_write(struct file *,const char *, size_t, loff_t *);
6870 +extern int camif_do_ioctl(struct inode *, struct file *,unsigned int, void *);
6871 +
6872 +
6873 +/*
6874 + * API for Decoder (S5x532, OV7620..)
6875 + */
6876 +void camif_register_decoder(struct i2c_client *);
6877 +void camif_unregister_decoder(struct i2c_client*);
6878 +
6879 +
6880 +
6881 +/* API for FSM */
6882 +#define INSTANT_SKIP 0
6883 +#define INSTANT_GO   1
6884 +
6885 +extern ssize_t camif_p_1fsm_start(camif_cfg_t *);
6886 +extern ssize_t camif_p_2fsm_start(camif_cfg_t *);
6887 +extern ssize_t camif_4fsm_start(camif_cfg_t *);
6888 +extern ssize_t camif_p_stop(camif_cfg_t *);
6889 +extern int camif_enter_p_4fsm(camif_cfg_t *);
6890 +extern int camif_enter_c_4fsm(camif_cfg_t *);
6891 +extern int camif_enter_2fsm(camif_cfg_t *);
6892 +extern int camif_enter_1fsm(camif_cfg_t *);
6893 +extern int camif_check_preview(camif_cfg_t *);
6894 +extern int camif_callback_start(camif_cfg_t *);
6895 +extern int camif_clock_init(camif_gc_t *);
6896 +
6897 +/*
6898 + *  V4L2 Part
6899 + */
6900 +#define VID_HARDWARE_SAMSUNG_FIMC20   236
6901 +
6902 +
6903 +
6904 +
6905 +
6906 +#endif
6907 +
6908 +
6909 +/*
6910 + * Local variables:
6911 + * tab-width: 8
6912 + *  c-indent-level: 8
6913 + *  c-basic-offset: 8
6914 + *  c-set-style: "K&R"
6915 + * End:
6916 + */
6917 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/cam_reg.h
6918 ===================================================================
6919 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
6920 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/cam_reg.h       2008-12-11 22:46:48.000000000 +0100
6921 @@ -0,0 +1,234 @@
6922 + /*----------------------------------------------------------
6923 +  *   (C) 2004 Samsung Electronics
6924 +  *   SW.LEE < hitchcar@samsung.com>
6925 +  *
6926 +  ----------------------------------------------------------- */
6927 +
6928 +#ifndef __FIMC20_CAMERA_H__
6929 +#define __FIMC20_CAMERA_H__
6930 +
6931 +extern u32 * camregs;
6932 +
6933 +#ifdef CONFIG_ARCH_S3C24A0
6934 +#define CAM_BASE_ADD             0x48000000
6935 +#else /* S3C2440A */
6936 +#define CAM_BASE_ADD             0x4F000000
6937 +#endif
6938 +
6939 +#if ! defined(FExtr)
6940 +#define UData(Data)     ((unsigned long) (Data))
6941 +#define FExtr(Data, Field) \
6942 +                        ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
6943 +#define FInsrt(Value, Field) \
6944 +                        (UData (Value) << FShft (Field))
6945 +#define FSize(Field)    ((Field) >> 16)
6946 +#define FShft(Field)    ((Field) & 0x0000FFFF)
6947 +#define FMsk(Field)     (((UData (1) << FSize (Field)) - 1) << FShft (Field))
6948 +#define FAlnMsk(Field)  ((UData (1) << FSize (Field)) - 1)
6949 +#define F1stBit(Field)  (UData (1) << FShft (Field))
6950 +#define Fld(Size, Shft) (((Size) << 16) + (Shft))
6951 +#endif
6952 +
6953 +/*
6954 + * CAMERA IP
6955 + * P-port is used as RGB Capturing device which including scale and crop
6956 + *  those who want to see(preview ) the image on display needs RGB image.
6957 + *
6958 + * C-port is used as YCbCr(4:2:0, 4:2:2) Capturing device which including the scale and crop
6959 + *   the prefix of C-port have the meaning of "Codec" ex. mpeg4, h263.. which requries the
6960 +     YCBCB format not RGB
6961 + */
6962 +
6963 +#define S3C2440_CAM_REG_CISRCFMT            (0x00) // RW Input Source Format
6964 +#define S3C2440_CAM_REG_CIWDOFST            (0x04) // Window offset register
6965 +#define S3C2440_CAM_REG_CIGCTRL             (0x08) // Global control register
6966 +#define S3C2440_CAM_REG_CICOYSA0            (0x18) // Y 1 st frame start ads
6967 +#define S3C2440_CAM_REG_CICOYSA1            (0x1C) // Y 2 nd frame start ads
6968 +#define S3C2440_CAM_REG_CICOYSA2            (0x20) // Y 3 rd frame start ads
6969 +#define S3C2440_CAM_REG_CICOYSA3            (0x24) // Y 4 th frame start ads
6970 +#define S3C2440_CAM_REG_CICOCBSA0           (0x28) // Cb 1 st frame start ads
6971 +#define S3C2440_CAM_REG_CICOCBSA1           (0x2C) // Cb 2 nd frame start ads
6972 +#define S3C2440_CAM_REG_CICOCBSA2           (0x30) // Cb 3 rd frame start ads
6973 +#define S3C2440_CAM_REG_CICOCBSA3           (0x34) // Cb 4 th frame start ads
6974 +#define S3C2440_CAM_REG_CICOCRSA0           (0x38) // Cr 1 st frame start ads
6975 +#define S3C2440_CAM_REG_CICOCRSA1           (0x3C) // Cr 2 nd frame start ads
6976 +#define S3C2440_CAM_REG_CICOCRSA2           (0x40) // Cr 3 rd frame start ads
6977 +#define S3C2440_CAM_REG_CICOCRSA3           (0x44) // Cr 4 th frame start ads
6978 +#define S3C2440_CAM_REG_CICOTRGFMT          (0x48) // Target img format of codec
6979 +#define S3C2440_CAM_REG_CICOCTRL            (0x4C) // Codec DMA control related
6980 +#define S3C2440_CAM_REG_CICOSCPRERATIO      (0x50) // Codec pre-scaler ratio
6981 +#define S3C2440_CAM_REG_CICOSCPREDST        (0x54) // Codec pre-scaler dest
6982 +#define S3C2440_CAM_REG_CICOSCCTRL          (0x58) // Codec main-scaler control
6983 +#define S3C2440_CAM_REG_CICOTAREA           (0x5C) // Codec pre-scaler dest
6984 +#define S3C2440_CAM_REG_CICOSTATUS          (0x64) // Codec path status
6985 +#define S3C2440_CAM_REG_CIPRCLRSA0          (0x6C) // RGB 1 st frame start ads
6986 +#define S3C2440_CAM_REG_CIPRCLRSA1          (0x70) // RGB 2 nd frame start ads
6987 +#define S3C2440_CAM_REG_CIPRCLRSA2          (0x74) // RGB 3 rd frame start ads
6988 +#define S3C2440_CAM_REG_CIPRCLRSA3          (0x78) // RGB 4 th frame start ads
6989 +#define S3C2440_CAM_REG_CIPRTRGFMT          (0x7C) // Target img fmt of preview
6990 +#define S3C2440_CAM_REG_CIPRCTRL            (0x80) // Preview DMA ctl related
6991 +#define S3C2440_CAM_REG_CIPRSCPRERATIO      (0x84) // Preview pre-scaler ratio
6992 +#define S3C2440_CAM_REG_CIPRSCPREDST        (0x88) // Preview pre-scaler dest
6993 +#define S3C2440_CAM_REG_CIPRSCCTRL          (0x8C) // Preview main-scaler ctl
6994 +#define S3C2440_CAM_REG_CIPRTAREA           (0x90) // Preview pre-scaler dest
6995 +#define S3C2440_CAM_REG_CIPRSTATUS          (0x98) // Preview path status
6996 +#define S3C2440_CAM_REG_CIIMGCPT            (0xA0) // Image capture enable cmd
6997 +
6998 +#define S3C2440_CAM_REG_CICOYSA(__x)        (0x18 + (__x)*4 )
6999 +#define S3C2440_CAM_REG_CICOCBSA(__x)       (0x28 + (__x)*4 )
7000 +#define S3C2440_CAM_REG_CICOCRSA(__x)       (0x38 + (__x)*4 )
7001 +#define S3C2440_CAM_REG_CIPRCLRSA(__x)      (0x6C + (__x)*4 )
7002 +
7003 +/* CISRCFMT BitField */
7004 +#define SRCFMT_ITU601       BIT31
7005 +#define SRCFMT_ITU656       0
7006 +#define SRCFMT_UVOFFSET_128 BIT30
7007 +#define fCAM_SIZE_H         Fld(13, 16)
7008 +#define fCAM_SIZE_V         Fld(13, 0)
7009 +#define SOURCE_HSIZE(x)     FInsrt((x), fCAM_SIZE_H)
7010 +#define SOURCE_VSIZE(x)     FInsrt((x), fCAM_SIZE_V)
7011 +
7012 +
7013 +/* Window Option Register */
7014 +#define WINOFEN             BIT31
7015 +#define CO_FIFO_Y           BIT30
7016 +#define CO_FIFO_CB          BIT15
7017 +#define CO_FIFO_CR          BIT14
7018 +#define PR_FIFO_CB          BIT13
7019 +#define PR_FIFO_CR          BIT12
7020 +#define fWINHOR             Fld(11, 16)
7021 +#define fWINVER             Fld(11, 0)
7022 +#define WINHOROFST(x)       FInsrt((x), fWINHOR)
7023 +#define WINVEROFST(x)       FInsrt((x), fWINVER)
7024 +
7025 +/* Global Control Register */
7026 +#define GC_SWRST            BIT31
7027 +#define GC_CAMRST           BIT30
7028 +#define GC_INVPOLPCLK       BIT26
7029 +#define GC_INVPOLVSYNC      BIT25
7030 +#define GC_INVPOLHREF       BIT24
7031 +
7032 +/*--------------------------------------------------
7033 +                REGISTER BIT FIELD DEFINITION TO
7034 +                          YCBCR and RGB
7035 +----------------------------------------------------*/
7036 +/* Codec Target Format Register */
7037 +#define IN_YCBCR420         0
7038 +#define IN_YCBCR422         BIT31
7039 +#define OUT_YCBCR420        0
7040 +#define OUT_YCBCR422        BIT30
7041 +
7042 +#if 0
7043 +#define FLIP_NORMAL        0
7044 +#define FLIP_X              (BIT14)
7045 +#define FLIP_Y              (BIT15)
7046 +#define FLIP_MIRROR         (BIT14|BIT15)
7047 +#endif
7048 +
7049 +/**  BEGIN    ************************************/
7050 +/* Cotents: Common in both P and C port          */
7051 +#define fTARGET_HSIZE       Fld(13,16)
7052 +#define TARGET_HSIZE(x)     FInsrt((x), fTARGET_HSIZE)
7053 +#define fTARGET_VSIZE       Fld(13,0)
7054 +#define TARGET_VSIZE(x)     FInsrt((x), fTARGET_VSIZE)
7055 +#define FLIP_X_MIRROR       BIT14
7056 +#define FLIP_Y_MIRROR       BIT15
7057 +#define FLIP_180_MIRROR     (BIT14 | BIT15)
7058 +/**  END     *************************************/
7059 +
7060 +/* Codec DMA Control Register */
7061 +#define fYBURST_M           Fld(5,19)
7062 +#define fYBURST_R           Fld(5,14)
7063 +#define fCBURST_M           Fld(5,9)
7064 +#define fCBURST_R           Fld(5,4)
7065 +#define YBURST_M(x)         FInsrt((x), fYBURST_M)
7066 +#define CBURST_M(x)         FInsrt((x), fCBURST_M)
7067 +#define YBURST_R(x)         FInsrt((x), fYBURST_R)
7068 +#define CBURST_R(x)         FInsrt((x), fCBURST_R)
7069 +#define LAST_IRQ_EN         BIT2              /* Common in both P and C port */
7070 +/*
7071 + *  Check the done signal of capturing image for JPEG
7072 + *  !!! AutoClear Bit
7073 + */
7074 +
7075 +
7076 +/* (Codec, Preview ) Pre-Scaler Control Register 1 */
7077 +#define fSHIFT              Fld(4,28)
7078 +#define PRE_SHIFT(x)        FInsrt((x), fSHIFT)
7079 +#define fRATIO_H            Fld(7,16)
7080 +#define PRE_HRATIO(x)       FInsrt((x), fRATIO_H)
7081 +#define fRATIO_V            Fld(7,0)
7082 +#define PRE_VRATIO(x)       FInsrt((x), fRATIO_V)
7083 +
7084 +/* (Codec, Preview ) Pre-Scaler Control Register 2*/
7085 +#define fDST_WIDTH          Fld(12,16)
7086 +#define fDST_HEIGHT         Fld(12,0)
7087 +#define PRE_DST_WIDTH(x)    FInsrt((x), fDST_WIDTH)
7088 +#define PRE_DST_HEIGHT(x)   FInsrt((x), fDST_HEIGHT)
7089 +
7090 +
7091 +/* (Codec, Preview) Main-scaler control Register */
7092 +#define S_METHOD            BIT31  /* Sampling method only for P-port */
7093 +#define SCALERSTART         BIT15
7094 +/* Codec scaler bypass for upper 2048x2048
7095 +   where ImgCptEn_CoSC and ImgCptEn_PrSC should be 0
7096 +*/
7097 +
7098 +#define SCALERBYPASS        BIT31
7099 +#define RGB_FMT24           BIT30
7100 +#define RGB_FMT16           0
7101 +
7102 +/*
7103 +#define SCALE_UP_H          BIT29
7104 +#define SCALE_UP_V          BIT28
7105 +*/
7106 +
7107 +#define fMAIN_HRATIO        Fld(9, 16)
7108 +#define MAIN_HRATIO(x)      FInsrt((x), fMAIN_HRATIO)
7109 +
7110 +#define SCALER_START        BIT15
7111 +
7112 +#define fMAIN_VRATIO        Fld(9, 0)
7113 +#define MAIN_VRATIO(x)      FInsrt((x), fMAIN_VRATIO)
7114 +
7115 +/* (Codec, Preview ) DMA Target AREA Register */
7116 +#define fCICOTAREA          Fld(26,0)
7117 +#define TARGET_DMA_AREA(x)  FInsrt((x), fCICOTAREA)
7118 +
7119 +/* Preview DMA Control Register */
7120 +#define fRGBURST_M          Fld(5,19)
7121 +#define fRGBURST_R          Fld(5,14)
7122 +#define RGBURST_M(x)        FInsrt((x), fRGBURST_M)
7123 +#define RGBURST_R(x)        FInsrt((x), fRGBURST_R)
7124 +
7125 +
7126 +/* (Codec, Preview) Status Register */
7127 +#define CO_OVERFLOW_Y       BIT31
7128 +#define CO_OVERFLOW_CB      BIT30
7129 +#define CO_OVERFLOW_CR      BIT29
7130 +#define PR_OVERFLOW_CB      BIT31
7131 +#define PR_OVERFLOW_CR      BIT30
7132 +
7133 +#define VSYNC               BIT28
7134 +
7135 +#define fFRAME_CNT          Fld(2,26)
7136 +#define FRAME_CNT(x)        FExtr((x),fFRAME_CNT)
7137 +
7138 +#define WIN_OFF_EN          BIT25
7139 +#define fFLIP_MODE          Fld(2,23)
7140 +#define FLIP_MODE(x)        EExtr((x), fFLIP_MODE)
7141 +#define CAP_STATUS_CAMIF    BIT22
7142 +#define CAP_STATUS_CODEC    BIT21
7143 +#define CAP_STATUS_PREVIEW  BIT21
7144 +#define VSYNC_A             BIT20
7145 +#define VSYNC_B             BIT19
7146 +
7147 +/* Image Capture Enable Regiser */
7148 +#define        CAMIF_CAP_ON         BIT31
7149 +#define CAMIF_CAP_CODEC_ON   BIT30
7150 +#define CAMIF_CAP_PREVIEW_ON BIT29
7151 +
7152 +
7153 +
7154 +
7155 +#endif /* S3C2440_CAMER_H */
7156 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/imgsensor.c
7157 ===================================================================
7158 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7159 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/imgsensor.c     2008-12-11 22:46:48.000000000 +0100
7160 @@ -0,0 +1,250 @@
7161 +/*
7162 + *  Copyright (C) 2004 Samsung Electronics
7163 + *             SW.LEE <hitchcar@samsung.com>
7164 + *
7165 + *  Copyright (C) 2000 Russell King : pcf8583.c
7166 + *
7167 + * This program is free software; you can redistribute it and/or modify
7168 + * it under the terms of the GNU General Public License version 2 as
7169 + * published by the Free Software Foundation.
7170 + *
7171 + *  Driver for FIMC20 Camera Decoder
7172 + */
7173 +
7174 +
7175 +#include <linux/module.h>
7176 +#include <linux/kernel.h>
7177 +#include <linux/init.h>
7178 +#include <linux/i2c.h>
7179 +#include <linux/slab.h>
7180 +#include <linux/string.h>
7181 +#include <linux/init.h>
7182 +#include <linux/delay.h>
7183 +
7184 +
7185 +#ifdef CONFIG_ARCH_S3C24A0A
7186 +#else
7187 +//#include <asm/arch/S3C2440.h>
7188 +#endif
7189 +
7190 +#define SW_DEBUG
7191 +#define CONFIG_VIDEO_V4L1_COMPAT
7192 +#include <linux/videodev.h>
7193 +#include "camif.h"
7194 +#include "sensor.h"
7195 +
7196 +#ifndef SAMSUNG_SXGA_CAM
7197 +#include "s5x532_rev36.h"
7198 +#else
7199 +#include "sxga.h"
7200 +#endif
7201 +
7202 +static struct i2c_driver s5x532_driver;
7203 +static camif_gc_t data = {
7204 +       itu_fmt:      CAMIF_ITU601,
7205 +       order422:     CAMIF_YCBYCR,
7206 +       camclk:       24000000,
7207 +#ifndef SAMSUNG_SXGA_CAM
7208 +       source_x:     640,
7209 +       source_y:     480,
7210 +       win_hor_ofst: 112,
7211 +       win_ver_ofst: 20,
7212 +#else
7213 +       source_x:     1280,
7214 +       source_y:     1024,
7215 +       win_hor_ofst: 0,
7216 +       win_ver_ofst: 0,
7217 +#endif
7218 +       polarity_pclk:1,
7219 +       polarity_href:0,
7220 +#ifdef CONFIG_ARCH_S3C24A0A
7221 +       reset_type:CAMIF_EX_RESET_AL, /* Active Low */
7222 +#else
7223 +       reset_type:CAMIF_EX_RESET_AH, /* Ref board has inverted signal */
7224 +#endif
7225 +       reset_udelay:2000,
7226 +};
7227 +
7228 +#define CAM_ID 0x5a
7229 +
7230 +static unsigned short ignore = I2C_CLIENT_END;
7231 +static unsigned short normal_addr[] = { (CAM_ID>>1), I2C_CLIENT_END };
7232 +static struct i2c_client_address_data addr_data = {
7233 +       normal_i2c:             normal_addr,
7234 +       probe:                  &ignore,
7235 +       ignore:                 &ignore,
7236 +};
7237 +
7238 +s5x532_t s5x532_regs_mirror[S5X532_REGS];
7239 +
7240 +unsigned char
7241 +s5x532_read(struct i2c_client *client, unsigned char subaddr)
7242 +{
7243 +       int ret;
7244 +       unsigned char buf[1];
7245 +       struct i2c_msg msg ={ client->addr, 0, 1, buf};
7246 +       buf[0] = subaddr;
7247 +
7248 +       ret = i2c_transfer(client->adapter,&msg, 1) == 1 ? 0 : -EIO;
7249 +       if (ret == -EIO) {
7250 +         printk(" I2C write Error \n");
7251 +         return -EIO;
7252 +       }
7253 +
7254 +       msg.flags = I2C_M_RD;
7255 +       ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
7256 +
7257 +       return buf[0];
7258 +}
7259 +
7260 +
7261 +static int
7262 +s5x532_write(struct i2c_client *client,
7263 +                 unsigned char subaddr, unsigned char val)
7264 +{
7265 +       unsigned char buf[2];
7266 +       struct i2c_msg msg = { client->addr, 0, 2, buf};
7267 +
7268 +       buf[0]= subaddr;
7269 +       buf[1]= val;
7270 +
7271 +       return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
7272 +}
7273 +
7274 +void inline s5x532_init(struct i2c_client *sam_client)
7275 +{
7276 +       int i;
7277 +
7278 +       printk(KERN_ERR "s5x532_init  \n");
7279 +       for (i = 0; i < S5X532_INIT_REGS; i++) {
7280 +               s5x532_write(sam_client,
7281 +                             s5x532_reg[i].subaddr, s5x532_reg[i].value );
7282 +       }
7283 +
7284 +#ifdef YOU_WANT_TO_CHECK_IMG_SENSOR
7285 +       for (i = 0; i < S5X532_INIT_REGS;i++) {
7286 +               if ( s5x532_reg[i].subaddr == PAGE_ADDRESS ) {
7287 +                       s5x532_write(sam_client,
7288 +                             s5x532_reg[i].subaddr, s5x532_reg[i].value);
7289 +
7290 +                       printk(KERN_ERR "Page: Subaddr %02x = 0x%02x\n",
7291 +                              s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
7292 +
7293 +
7294 +               } else
7295 +               {
7296 +                       s5x532_regs_mirror[i].subaddr = s5x532_reg[i].subaddr;
7297 +                       s5x532_regs_mirror[i].value =
7298 +                       s5x532_read(sam_client,s5x532_reg[i].subaddr);
7299 +                       printk(KERN_ERR "Subaddr %02x = 0x%02x\n",
7300 +                              s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value);
7301 +               }
7302 +       }
7303 +#endif
7304 +
7305 +}
7306 +
7307 +static int
7308 +s5x532_attach(struct i2c_adapter *adap, int addr, int kind)
7309 +{
7310 +       struct i2c_client *c;
7311 +
7312 +       c = kmalloc(sizeof(*c), GFP_KERNEL);
7313 +       if (!c) return -ENOMEM;
7314 +
7315 +       strcpy(c->name, "S5X532");
7316 +//     c->id           = s5x532_driver.id;
7317 +       c->flags        = 0 /* I2C_CLIENT_ALLOW_USE */;
7318 +       c->addr         = addr;
7319 +       c->adapter      = adap;
7320 +       c->driver       = &s5x532_driver;
7321 +       data.sensor     = c;
7322 +       i2c_set_clientdata(c, &data);
7323 +
7324 +       camif_register_decoder(c);
7325 +       return i2c_attach_client(c);
7326 +}
7327 +
7328 +static int s5x532_probe(struct i2c_adapter *adap)
7329 +{
7330 +       return i2c_probe(adap, &addr_data, s5x532_attach);
7331 +}
7332 +
7333 +static int s5x532_detach(struct i2c_client *client)
7334 +{
7335 +       i2c_detach_client(client);
7336 +       camif_unregister_decoder(client);
7337 +       return 0;
7338 +}
7339 +
7340 +static int
7341 +s5x532_command(struct i2c_client *client, unsigned int cmd, void *arg)
7342 +{
7343 +        switch (cmd) {
7344 +        case SENSOR_INIT:
7345 +                 s5x532_init(client);
7346 +                printk(KERN_INFO "CAMERA: S5X532 Sensor initialized\n");
7347 +                break;
7348 +       case USER_ADD:
7349 +               /* MOD_INC_USE_COUNT; uh.. 2.6 deals with this, old-timer */
7350 +               break;
7351 +       case USER_EXIT:
7352 +               /* MOD_DEC_USE_COUNT; */
7353 +               break;
7354 +/* Todo
7355 +       case SENSOR_BRIGHTNESS:
7356 +               change_sensor();
7357 +               break;
7358 +*/
7359 +       default:
7360 +               panic("Unexpect Sensor Command \n");
7361 +               break;
7362 +        }
7363 +       return 0;
7364 +}
7365 +
7366 +static struct i2c_driver s5x532_driver = {
7367 +       driver:         { name:         "S5X532" },
7368 +       id:             0, /* optional in i2c-id.h I2C_ALGO_S3C, */
7369 +       attach_adapter: s5x532_probe,
7370 +       detach_client:  s5x532_detach,
7371 +       command:        s5x532_command
7372 +};
7373 +
7374 +static void iic_gpio_port(void)
7375 +{
7376 +/*    FIXME: no gpio config for i2c !!!
7377 +#ifdef CONFIG_ARCH_S3C24A0A
7378 +#else
7379 +       GPECON &=  ~(0xf <<28);
7380 +       GPECON |=    0xa <<28;
7381 +#endif
7382 +*/
7383 +}
7384 +
7385 +static __init int camif_sensor_init(void)
7386 +{
7387 +        iic_gpio_port();
7388 +       return i2c_add_driver(&s5x532_driver);
7389 +}
7390 +
7391 +
7392 +static __init void camif_sensor_exit(void)
7393 +{
7394 +       i2c_del_driver(&s5x532_driver);
7395 +}
7396 +
7397 +module_init(camif_sensor_init)
7398 +module_exit(camif_sensor_exit)
7399 +
7400 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
7401 +MODULE_DESCRIPTION("I2C Client Driver For Fimc2.0 MISC Driver");
7402 +MODULE_LICENSE("GPL");
7403 +
7404 +
7405 +
7406 +/*
7407 + * Local variables:
7408 + * c-basic-offset: 8
7409 + * End:
7410 + */
7411 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Kconfig
7412 ===================================================================
7413 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7414 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Kconfig 2008-12-11 22:46:48.000000000 +0100
7415 @@ -0,0 +1,7 @@
7416 +
7417 +config S3C2440_CAMERA
7418 +       bool "S3C24xx Camera interface"
7419 +       depends on ARCH_S3C2410
7420 +       help
7421 +         Camera driver for S3C2440 camera unit
7422 +
7423 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Makefile
7424 ===================================================================
7425 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7426 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/Makefile        2008-12-11 22:46:48.000000000 +0100
7427 @@ -0,0 +1,8 @@
7428 +obj-$(CONFIG_S3C2440_CAMERA) += \
7429 +       videodev.o \
7430 +       imgsensor.o \
7431 +       video-driver.o \
7432 +       camif.o \
7433 +       camif_fsm.o \
7434 +       qt-driver.o
7435 +
7436 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/miscdevice.h
7437 ===================================================================
7438 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7439 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/miscdevice.h    2008-12-11 22:46:48.000000000 +0100
7440 @@ -0,0 +1,18 @@
7441 +
7442 + /*----------------------------------------------------------
7443 +  *   (C) 2004 Samsung Electronics
7444 +  *   SW.LEE < hitchcar@samsung.com>
7445 +  *
7446 +  ----------------------------------------------------------- */
7447 +
7448 +#ifndef _LINUX_S3C_MISCDEVICE_H
7449 +#define _LINUX_S3C_MISCDEVICE_H
7450 +
7451 +#define CODEC_MINOR 212
7452 +#define PREVIEW_MINOR 213
7453 +
7454 +
7455 +
7456 +
7457 +
7458 +#endif
7459 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt-driver.c
7460 ===================================================================
7461 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7462 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt-driver.c     2008-12-11 22:46:48.000000000 +0100
7463 @@ -0,0 +1,172 @@
7464 +/*
7465 + * SW.LEE <hitchcar@samsung.com>
7466 + *
7467 + * This file is subject to the terms and conditions of the GNU General Public
7468 + * License 2. See the file COPYING in the main directory of this archive
7469 + * for more details.
7470 + */
7471 +
7472 +#include <linux/version.h>
7473 +#include <linux/module.h>
7474 +#include <linux/delay.h>
7475 +#include <linux/errno.h>
7476 +#include <linux/fs.h>
7477 +#include <linux/kernel.h>
7478 +#include <linux/major.h>
7479 +#include <linux/slab.h>
7480 +#include <linux/poll.h>
7481 +#include <linux/signal.h>
7482 +#include <linux/ioport.h>
7483 +#include <linux/sched.h>
7484 +#include <linux/types.h>
7485 +#include <linux/interrupt.h>
7486 +#include <linux/kmod.h>
7487 +#include <linux/vmalloc.h>
7488 +#include <linux/init.h>
7489 +#include <asm/io.h>
7490 +#include <asm/page.h>
7491 +#include <asm/irq.h>
7492 +#include <asm/semaphore.h>
7493 +#include <linux/miscdevice.h>
7494 +
7495 +//#define SW_DEBUG
7496 +
7497 +#define CONFIG_VIDEO_V4L1_COMPAT
7498 +#include <linux/videodev.h>
7499 +#include "camif.h"
7500 +#include "miscdevice.h"
7501 +#include "cam_reg.h"
7502 +#include "sensor.h"
7503 +#include "userapp.h"
7504 +
7505 +extern camif_cfg_t * get_camif(int nr);
7506 +
7507 +
7508 +/************************* Sharp Zarus API **************************
7509 +* refering to Camera Driver API for SL-5000D/SL-5600 revision 1.00
7510 +*                              April 11, 2002.
7511 +  SW.LEE <hitchcar@sec.samsung.com>
7512 +               I want to use Sharp Camera Application.
7513 +*
7514 +*/
7515 +
7516 +#define READ_MODE_STATUS       0x1
7517 +#define READ_MODE_IMAGE                0x0
7518 +#define CAPTURE_SPEED
7519 +#define        H_FLIP
7520 +#define V_FLIP
7521 +typedef enum sharp_readmode
7522 +{
7523 +        IMAGE = 0, STATUS = 1,
7524 +        FASTER = 0, BETTER = 2,
7525 +        XNOFLIP = 0, XFLIP = 4,
7526 +        YNOFLIP = 0, YFLIP = 8,
7527 +        AUTOMATICFLIP = -1
7528 +} ReadMode_t;
7529 +
7530 +
7531 +static struct sharp_param_t {
7532 +       ReadMode_t readMode;
7533 +       char CameraStatus[4];
7534 +} sharp_param = { STATUS, {'s','m','c','A'}};
7535 +
7536 +
7537 +camif_param_t qt_parm = { 640,480,240,320,16,0};
7538 +
7539 +static void setReadMode(const char *b,size_t count)
7540 +{
7541 +       int i =   *(b+2) - 48 ;
7542 +       if ( 4 == count ) {
7543 +               i = (*(b+3) - 48)  + i * 10;
7544 +       }
7545 +
7546 +       //      DPRINTK(" setReadMode %s conversion value %d \n",b , i);
7547 +       if ( i & STATUS ) {
7548 +       //      DPRINTK(" STATUS MODE \n");
7549 +               sharp_param.readMode = i;
7550 +       }
7551 +       else  {
7552 +       //      DPRINTK(" IMAGE MODE \n");
7553 +               sharp_param.readMode = i;
7554 +       }
7555 +}
7556 +
7557 +
7558 +
7559 +
7560 +extern ssize_t camif_p_read(struct file *, char *, size_t , loff_t *);
7561 +
7562 +ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos)
7563 +{
7564 +       size_t end;
7565 +
7566 +       if (sharp_param.readMode & STATUS ) {
7567 +               buf[0] = sharp_param.CameraStatus[0];
7568 +               buf[1] = sharp_param.CameraStatus[1];
7569 +               buf[2] = sharp_param.CameraStatus[2];
7570 +               buf[3] = sharp_param.CameraStatus[3];
7571 +               end = 4;
7572 +               return end;
7573 +       }
7574 +       else {  /* Image ReadMode */
7575 +               /*
7576 +               if (( sharp_param.readMode & (BETTER|X  FLIP|YFLIP)))
7577 +                       DPRINTK("  Not Supporting BETTER|XFLIP|YFLIP\n");
7578 +               */
7579 +               return camif_p_read(f,buf,count,pos);
7580 +       }
7581 +}
7582 +
7583 +static void z_config(camif_cfg_t *cfg,int x, int y)
7584 +{
7585 +       cfg->target_x = x;
7586 +       cfg->target_y = y;
7587 +       cfg->fmt = CAMIF_RGB16;
7588 +       if (camif_dynamic_open(cfg)) {
7589 +               panic(" Eror Happens \n");
7590 +       }
7591 +}
7592 +
7593 +
7594 +ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos)
7595 +{
7596 +       int array[5];
7597 +       int zoom = 1;
7598 +       camif_cfg_t *cfg;
7599 +
7600 +       cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
7601 +//     DPRINTK(" param %s count %d \n",b, c );
7602 +
7603 +       switch(*b) {
7604 +       case 'M':
7605 +               setReadMode(b, c);
7606 +               break;
7607 +       case 'B':       /* Clear the latch flag of shutter button */
7608 +               DPRINTK("  clear latch flag of camera's shutter button\n");
7609 +               sharp_param.CameraStatus[0]='s';
7610 +               break;
7611 +       case 'Y':       /* I don't know how to set Shutter pressed */
7612 +               DPRINTK("  set latch flag n");
7613 +               sharp_param.CameraStatus[0]='S';
7614 +               break;
7615 +       case 'S':       /* Camera Image Resolution */
7616 +       case 'R':       /* Donot support Rotation */
7617 +       DPRINTK(" param %s count %d \n",b, c );
7618 +               get_options((char *)(b+2), 5, array);
7619 +               if ( array[3] == 512 ) zoom = 2;
7620 +               z_config(cfg, array[1] * zoom , array[2] * zoom );
7621 +               camif_4fsm_start(cfg);
7622 +               break;
7623 +       case 'C':
7624 +       DPRINTK(" param %s count %d \n",b, c );
7625 +               DPRINTK("  Start the camera to capture \n");
7626 +               sharp_param.CameraStatus[2]='C';
7627 +               camif_4fsm_start(cfg);
7628 +               break;
7629 +       default:
7630 +               printk("Unexpected  param %s count %d \n",b, c );
7631 +       }
7632 +
7633 +       return c;
7634 +}
7635 +
7636 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt.h
7637 ===================================================================
7638 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7639 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/qt.h    2008-12-11 22:46:48.000000000 +0100
7640 @@ -0,0 +1,18 @@
7641 +/*
7642 + * SW.LEE <hitchcar@samsung.com>
7643 + *
7644 + * This file is subject to the terms and conditions of the GNU General Public
7645 + * License 2. See the file COPYING in the main directory of this archive
7646 + * for more details.
7647 + */
7648 +
7649 +#ifndef __Z_API_H_
7650 +#define __Z_API_H_
7651 +
7652 +extern ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos);
7653 +extern ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos);
7654 +
7655 +
7656 +
7657 +#endif
7658 +
7659 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532.h
7660 ===================================================================
7661 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7662 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532.h        2008-12-11 22:46:48.000000000 +0100
7663 @@ -0,0 +1,143 @@
7664 +/*
7665 + * 2004 (C) Samsung Electronics
7666 + *  SW.LEE <hitchcar@sec.samsung.com>
7667 + * This file is subject to the terms and conditions of the GNU General Public
7668 + * License 2. See the file COPYING in the main directory of this archive
7669 + * for more details.
7670 + */
7671 +
7672 +
7673 +#ifndef _SMDK2440_S5X532_H_
7674 +#define _SMDK2440_S5X532_H_
7675 +
7676 +
7677 +#define CHIP_DELAY 0xFF
7678 +
7679 +typedef struct samsung_t{
7680 +       unsigned char subaddr;
7681 +       unsigned char value;
7682 +       unsigned char page;
7683 +} s5x532_t;
7684 +
7685 +s5x532_t s5x532_reg[] = {
7686 +       // page 5
7687 +       {0xec,0x05},
7688 +       {0x08,0x55,0x5},
7689 +       {0x0a,0x75,0x5},
7690 +       {0x0c,0x90,0x5},
7691 +       {0x0e,0x18,0x5},
7692 +       {0x12,0x09,0x5},
7693 +       {0x14,0x9d,0x5},
7694 +       {0x16,0x90,0x5},
7695 +       {0x1a,0x18,0x5},
7696 +       {0x1c,0x0c,0x5},
7697 +       {0x1e,0x09,0x5},
7698 +       {0x20,0x06,0x5},
7699 +       {0x22,0x20,0x5},
7700 +       {0x2a,0x00,0x5},
7701 +       {0x2d,0x04,0x5},
7702 +       {0x12,0x24,0x5},
7703 +       // page 3
7704 +       {0xec,0x03,0x3},
7705 +       {0x0c,0x09,0x3},
7706 +       {0x6c,0x09,0x3},
7707 +       {0x2b,0x10,0x3}, // momo clock inversion
7708 +       // page 2
7709 +       {0xec,0x02,0x2},
7710 +       {0x03,0x09,0x2},
7711 +       {0x05,0x08,0x2},
7712 +       {0x06,0x01,0x2},
7713 +       {0x07,0xf8,0x2},
7714 +       {0x15,0x25,0x2},
7715 +       {0x30,0x29,0x2},
7716 +       {0x36,0x12,0x2},
7717 +       {0x38,0x04,0x2},
7718 +       {0x1b,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
7719 +       {0x1c,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22
7720 +       // page 1
7721 +       {0xec,0x01,0x1},
7722 +       {0x00,0x03,0x1}, //
7723 +       {0x0a,0x08,0x1}, // 0x0-QQVGA, 0x06-CIF, 0x02-QCIF, 0x08-VGA, 0x04-QVGA, 0x0a-SXGA
7724 +       {0x0c,0x00,0x1}, // Pattern selectio. 0-CIS, 1-Color bar, 2-Ramp, 3-Blue screen
7725 +       {0x10,0x27,0x1},
7726 +       // 0x21-ITU-R656(CrYCbY), 0x25-ITU-R601(CrYCbY), 0x26-ITU-R601(YCbYCr)
7727 +       {0x50,0x21,0x1},                // Hblank
7728 +       {0x51,0x00,0x1},                // Hblank
7729 +       {0x52,0xA1,0x1},                // Hblank
7730 +       {0x53,0x02,0x1},                // Hblank
7731 +       {0x54,0x01,0x1},                // Vblank
7732 +       {0x55,0x00,0x1},                // Vblank
7733 +       {0x56,0xE1,0x1},                // Vblank
7734 +       {0x57,0x01,0x1},                // Vblank
7735 +       {0x58,0x21,0x1},                // Hsync
7736 +       {0x59,0x00,0x1},                // Hsync
7737 +       {0x5a,0xA1,0x1},                // Hsync
7738 +       {0x5b,0x02,0x1},                // Hsync
7739 +       {0x5c,0x03,0x1},                // Vref
7740 +       {0x5d,0x00,0x1},                // Vref
7741 +       {0x5e,0x05,0x1},                // Vref
7742 +       {0x5f,0x00,0x1},                // Vref
7743 +       {0x70,0x0E,0x1},
7744 +       {0x71,0xD6,0x1},
7745 +       {0x72,0x30,0x1},
7746 +       {0x73,0xDB,0x1},
7747 +       {0x74,0x0E,0x1},
7748 +       {0x75,0xD6,0x1},
7749 +       {0x76,0x18,0x1},
7750 +       {0x77,0xF5,0x1},
7751 +       {0x78,0x0E,0x1},
7752 +       {0x79,0xD6,0x1},
7753 +       {0x7a,0x28,0x1},
7754 +       {0x7b,0xE6,0x1},
7755 +       {0x50,0x00,0x1},
7756 +       {0x5c,0x00,0x1},
7757 +
7758 +       // page 0
7759 +       {0xec,0x00,0x0},
7760 +       {0x79,0x01,0x0},
7761 +       {0x58,0x90,0x0},
7762 +       {0x59,0xA0,0x0},
7763 +       {0x5a,0x50,0x0},
7764 +       {0x5b,0x70,0x0},
7765 +       {0x5c,0xD0,0x0},
7766 +       {0x5d,0xC0,0x0},
7767 +       {0x5e,0x28,0x0},
7768 +       {0x5f,0x08,0x0},
7769 +       {0x50,0x90,0x0},
7770 +       {0x51,0xA0,0x0},
7771 +       {0x52,0x50,0x0},
7772 +       {0x53,0x70,0x0},
7773 +       {0x54,0xD0,0x0},
7774 +       {0x55,0xC0,0x0},
7775 +       {0x56,0x28,0x0},
7776 +       {0x57,0x00,0x0},
7777 +       {0x48,0x90,0x0},
7778 +       {0x49,0xA0,0x0},
7779 +       {0x4a,0x50,0x0},
7780 +       {0x4b,0x70,0x0},
7781 +       {0x4c,0xD0,0x0},
7782 +       {0x4d,0xC0,0x0},
7783 +       {0x4e,0x28,0x0},
7784 +       {0x4f,0x08,0x0},
7785 +       {0x72,0x82,0x0}, // main clock = 24MHz:0xd2, 16M:0x82, 12M:0x54
7786 +       {0x75,0x05,0x0} // absolute vertical mirror.  junon
7787 +
7788 +};
7789 +
7790 +
7791 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
7792 +#define S5X532_RISC_REGS 0xEB
7793 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
7794 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
7795 +
7796 +
7797 +#define PAGE_ADDRESS      0xEC
7798 +
7799 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
7800 +#define S5X532_REGS (0x1000)
7801 +
7802 +
7803 +
7804 +#endif
7805 +
7806 +
7807 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532_rev36.h
7808 ===================================================================
7809 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
7810 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/s5x532_rev36.h  2008-12-11 22:46:48.000000000 +0100
7811 @@ -0,0 +1,208 @@
7812 +/*
7813 + * 2004 (C) Samsung Electronics
7814 + *  SW.LEE <hitchcar@sec.samsung.com>
7815 + * This file is subject to the terms and conditions of the GNU General Public
7816 + * License 2. See the file COPYING in the main directory of this archive
7817 + * for more details.
7818 + */
7819 +
7820 +
7821 +#ifndef _SMDK2440_S5X532_H_
7822 +#define _SMDK2440_S5X532_H_
7823 +
7824 +
7825 +#define CHIP_DELAY 0xFF
7826 +
7827 +typedef struct samsung_t{
7828 +       unsigned char subaddr;
7829 +       unsigned char value;
7830 +       unsigned char page;
7831 +} s5x532_t;
7832 +
7833 +s5x532_t s5x532_reg[] = {
7834 +
7835 +       //=============== page0 ===============//
7836 +       {0xec,0x00,0x00},
7837 +       {0x02,0x00,0x00},
7838 +       {0x14,0x60,0x00},
7839 +       {0x15,0x60,0x00},
7840 +       {0x16,0x60,0x00},
7841 +       {0x1b,0x20,0x00},
7842 +       {0x1c,0x20,0x00},
7843 +       {0x1d,0x20,0x00},
7844 +       {0x1e,0x20,0x00},
7845 +       {0x72,0xdc,0x00},
7846 +       {0x73,0x11,0x00},
7847 +       {0x76,0x82,0x00},
7848 +       {0x77,0x90,0x00},
7849 +       {0x78,0x6c,0x00},
7850 +       {0x0a,0x02,0x00},
7851 +       {0x34,0x0d,0x00},
7852 +       {0x35,0x0a,0x00},
7853 +       {0x36,0x05,0x00},
7854 +       {0x37,0x05,0x00},
7855 +       {0x38,0x06,0x00},
7856 +       {0x39,0x08,0x00},
7857 +       {0x3A,0x0d,0x00},
7858 +       {0x3B,0x0d,0x00},
7859 +       {0x3C,0x18,0x00},
7860 +       {0x3D,0xE0,0x00},
7861 +       {0x3E,0x20,0x00},
7862 +       {0x66,0x02,0x00},
7863 +       {0x6c,0x40,0x00},
7864 +       {0x7c,0x01,0x00},
7865 +       {0x0D,0x24,0x00},
7866 +       {0x40,0x1B,0x00},
7867 +       {0x41,0x4F,0x00},
7868 +       {0x42,0x24,0x00},
7869 +       {0x43,0x3E,0x00},
7870 +       {0x44,0x32,0x00},
7871 +       {0x45,0x30,0x00},
7872 +       {0x48,0xa0,0x00},
7873 +       {0x49,0xd0,0x00},
7874 +       {0x4A,0x28,0x00},
7875 +       {0x4B,0x7d,0x00},
7876 +       {0x4C,0xd0,0x00},
7877 +       {0x4D,0xe0,0x00},
7878 +       {0x4E,0x1a,0x00},
7879 +       {0x4F,0xa0,0x00},
7880 +       {0x50,0xc0,0x00},
7881 +       {0x51,0xc0,0x00},
7882 +       {0x52,0x42,0x00},
7883 +       {0x53,0x7e,0x00},
7884 +       {0x54,0xc0,0x00},
7885 +       {0x55,0xf0,0x00},
7886 +       {0x56,0x1e,0x00},
7887 +       {0x57,0xe0,0x00},
7888 +       {0x58,0xc0,0x00},
7889 +       {0x59,0xa0,0x00},
7890 +       {0x5A,0x4a,0x00},
7891 +       {0x5B,0x7e,0x00},
7892 +       {0x5C,0xc0,0x00},
7893 +       {0x5D,0xf0,0x00},
7894 +       {0x5E,0x2a,0x00},
7895 +       {0x5F,0x10,0x00},
7896 +       {0x79,0x00,0x00},
7897 +       {0x7a,0x00,0x00},
7898 +       {0xe0,0x0f,0x00},
7899 +       {0xe3,0x14,0x00},
7900 +       {0xe5,0x48,0x00},
7901 +       {0xe7,0x58,0x00},
7902 +
7903 +       //=============== page1 ===============//
7904 +       {0xec,0x01,0x01},
7905 +       {0x10,0x05,0x01},
7906 +       {0x20,0xde,0x01},
7907 +       {0x0b,0x06,0x01},
7908 +       {0x30,0x00,0x01},
7909 +       {0x31,0x00,0x01},
7910 +       {0x32,0x00,0x01},
7911 +       {0x24,0x28,0x01},
7912 +       {0x25,0x3F,0x01},
7913 +       {0x26,0x65,0x01},
7914 +       {0x27,0xA1,0x01},
7915 +       {0x28,0xFF,0x01},
7916 +       {0x29,0x96,0x01},
7917 +       {0x2A,0x85,0x01},
7918 +       {0x2B,0xFF,0x01},
7919 +       {0x2C,0x00,0x01},
7920 +       {0x2D,0x1B,0x01},
7921 +       {0xB0,0x28,0x01},
7922 +       {0xB1,0x3F,0x01},
7923 +       {0xB2,0x65,0x01},
7924 +       {0xB3,0xA1,0x01},
7925 +       {0xB4,0xFF,0x01},
7926 +       {0xB5,0x96,0x01},
7927 +       {0xB6,0x85,0x01},
7928 +       {0xB7,0xFF,0x01},
7929 +       {0xB8,0x00,0x01},
7930 +       {0xB9,0x1B,0x01},
7931 +       {0x15,0x15,0x01},
7932 +       {0x18,0x85,0x01},
7933 +       {0x1f,0x05,0x01},
7934 +       {0x87,0x40,0x01},
7935 +       {0x37,0x60,0x01},
7936 +       {0x38,0xd5,0x01},
7937 +       {0x48,0xa0,0x01},
7938 +       {0x61,0x54,0x01},
7939 +       {0x62,0x54,0x01},
7940 +       {0x63,0x14,0x01},
7941 +       {0x64,0x14,0x01},
7942 +       {0x6d,0x12,0x01},
7943 +       {0x78,0x09,0x01},
7944 +       {0x79,0xD7,0x01},
7945 +       {0x7A,0x14,0x01},
7946 +       {0x7B,0xEE,0x01},
7947 +
7948 +       //=============== page2 ===============//
7949 +       {0xec,0x02,0x02},
7950 +       {0x2c,0x76,0x02},
7951 +       {0x25,0x25,0x02},
7952 +       {0x27,0x27,0x02},
7953 +       {0x30,0x29,0x02},
7954 +       {0x36,0x08,0x02},
7955 +       {0x38,0x04,0x02},
7956 +
7957 +       //=============== page3 ===============//
7958 +       {0xec,0x03,0x03},
7959 +       {0x08,0x00,0x03},
7960 +       {0x09,0x33,0x03},
7961 +
7962 +       //=============== page4 ===============//
7963 +       {0xec,0x04,0x04},
7964 +       {0x00,0x21,0x04},
7965 +       {0x01,0x00,0x04},
7966 +       {0x02,0x9d,0x04},
7967 +       {0x03,0x02,0x04},
7968 +       {0x04,0x04,0x04},
7969 +       {0x05,0x00,0x04},
7970 +       {0x06,0x1f,0x04},
7971 +       {0x07,0x02,0x04},
7972 +       {0x08,0x21,0x04},
7973 +       {0x09,0x00,0x04},
7974 +       {0x0a,0x9d,0x04},
7975 +       {0x0b,0x02,0x04},
7976 +       {0x0c,0x04,0x04},
7977 +       {0x0d,0x00,0x04},
7978 +       {0x0e,0x20,0x04},
7979 +       {0x0f,0x02,0x04},
7980 +       {0x1b,0x3c,0x04},
7981 +       {0x1c,0x3c,0x04},
7982 +
7983 +       //=============== page5 ===============//
7984 +       {0xec,0x05,0x05},
7985 +       {0x1f,0x00,0x05},
7986 +       {0x08,0x59,0x05},
7987 +       {0x0a,0x71,0x05},
7988 +       {0x1e,0x23,0x05},
7989 +       {0x0e,0x3c,0x05},
7990 +
7991 +       //=============== page7 ===============//
7992 +       {0xec,0x07,0x07},
7993 +       {0x11,0xfe,0x07},
7994 +
7995 +       // added by junon
7996 +       {0xec,0x01,0x07},
7997 +       {0x10,0x26,0x07},
7998 +       // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb)
7999 +
8000 +
8001 +};
8002 +
8003 +
8004 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
8005 +#define S5X532_RISC_REGS 0xEB
8006 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
8007 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
8008 +
8009 +
8010 +#define PAGE_ADDRESS      0xEC
8011 +
8012 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
8013 +#define S5X532_REGS (0x1000)
8014 +
8015 +
8016 +
8017 +#endif
8018 +
8019 +
8020 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sensor.h
8021 ===================================================================
8022 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
8023 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sensor.h        2008-12-11 22:46:48.000000000 +0100
8024 @@ -0,0 +1,20 @@
8025 +/*
8026 + *
8027 + *  Copyright (C) 2004 Samsung Electronics
8028 + *            SW.LEE <hitchcar@sec.samsung.com>
8029 + *
8030 + * This program is free software; you can redistribute it and/or modify
8031 + * it under the terms of the GNU General Public License version 2 as
8032 + * published by the Free Software Foundation.
8033 + */
8034 +
8035 +#ifndef __SENSOR_CMD_H_
8036 +#define __SENSOR_CMD_H_
8037 +
8038 +#include "bits.h"
8039 +
8040 +#define SENSOR_INIT    BIT0
8041 +#define USER_ADD        BIT1
8042 +#define USER_EXIT       BIT2
8043 +
8044 +#endif
8045 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sxga.h
8046 ===================================================================
8047 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
8048 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/sxga.h  2008-12-11 22:46:48.000000000 +0100
8049 @@ -0,0 +1,504 @@
8050 +/*
8051 + * 2004 (C) Samsung Electronics
8052 + *  SW.LEE <hitchcar@sec.samsung.com>
8053 + * This file is subject to the terms and conditions of the GNU General Public
8054 + * License 2. See the file COPYING in the main directory of this archive
8055 + * for more details.
8056 + */
8057 +
8058 +
8059 +#ifndef _SAMSUNG_SXGA_H_
8060 +#define _SAMSUNG_SXGA_H_
8061 +
8062 +
8063 +#define CHIP_DELAY 0xFF
8064 +
8065 +typedef struct samsung_t{
8066 +       unsigned char subaddr;
8067 +       unsigned char value;
8068 +       unsigned char page;
8069 +} s5x532_t;
8070 +
8071 +s5x532_t s5x532_reg[] = {
8072 +       // page 0
8073 +       {0xec,0x00,0x0},
8074 +       {0x0c,0x38,0x0},
8075 +       {0x0d,0x24,0x0},
8076 +       {0x13,0x10,0x0},
8077 +       {0x14,0x10,0x0},
8078 +       {0x15,0x10,0x0},
8079 +       {0x16,0x10,0x0},
8080 +       {0x17,0x20,0x0},
8081 +       {0x18,0x30,0x0},
8082 +       {0x19,0x30,0x0},
8083 +       {0x1a,0x10,0x0},
8084 +       {0x1b,0x10,0x0},
8085 +
8086 +       {0x2d,0x40,0x0},
8087 +       {0x3e,0x10,0x0},
8088 +       {0x34,0x0a,0x0},
8089 +       {0x39,0x04,0x0},
8090 +       {0x3a,0x02,0x0},
8091 +       {0x31,0x05,0x0},
8092 +
8093 +       {0x40,0x1d,0x0},
8094 +       {0x41,0x50,0x0},
8095 +       {0x42,0x24,0x0},
8096 +       {0x43,0x3f,0x0},
8097 +       {0x44,0x30,0x0},
8098 +       {0x45,0x31,0x0},
8099 +
8100 +       {0x48,0xa0,0x0},
8101 +       {0x49,0xc0,0x0},
8102 +       {0x4a,0x58,0x0},
8103 +       {0x4b,0x50,0x0},
8104 +       {0x4c,0xb0,0x0},
8105 +       {0x4d,0xc0,0x0},
8106 +       {0x4e,0x30,0x0},
8107 +       {0x4f,0x20,0x0},
8108 +
8109 +       {0x50,0xa0,0x0},
8110 +       {0x51,0xc0,0x0},
8111 +       {0x52,0x50,0x0},
8112 +       {0x53,0x60,0x0},
8113 +       {0x54,0xb0,0x0},
8114 +       {0x55,0xc0,0x0},
8115 +       {0x56,0x20,0x0},
8116 +       {0x57,0x08,0x0},
8117 +//     {0x72,0x50,0x0}, // Clock 16
8118 +       {0x72,0x78,0x0}, // Clock 24Mhz
8119 +//     {0x72,0xf0,0x0}, // Clock 48Mhz
8120 +       // page 1
8121 +       {0xec,0x01,0x1},
8122 +       {0x10,0x17,0x1}, // ITU-R601
8123 +                        /*
8124 +                          [3:2] : out_sel
8125 +                            00 : 656
8126 +                            01 : 601
8127 +                            10 : RGB
8128 +                            11 : CIS
8129 +                          [1] : YC_SEL
8130 +                          [0] : CBCR_SEL
8131 +                        */
8132 +
8133 +       {0x0b,0x06,0x1}, // 6
8134 +       {0x20,0xa8,0x1}, //b0); // Highlight C Supp 040215
8135 +       {0x22,0x26,0x1}, //2f); 040225
8136 +
8137 +       {0x24,0x08,0x1}, //00); //1F); 040226
8138 +       {0x25,0x10,0x1}, //10); //34);
8139 +       {0x26,0x40,0x1}, //56);
8140 +       {0x27,0x80,0x1}, //8D);
8141 +       {0x28,0x2c,0x1}, //E7);
8142 +       {0x29,0xd6,0x1}, //7C);
8143 +       {0x2A,0x0c,0x1}, //70);
8144 +       {0x2B,0xFF,0x1}, //FF);
8145 +       {0x2C,0x00,0x1}, //00);
8146 +       {0x2D,0x5f,0x1}, //1B);
8147 +       //
8148 +       {0xB0,0x08,0x1}, //00); //1F); 040226
8149 +       {0xB1,0x10,0x1}, //10); //34);50
8150 +       {0xB2,0x40,0x1}, //36);
8151 +       {0xB3,0x80,0x1}, //6D);
8152 +       {0xB4,0x2c,0x1}, //b7);
8153 +       {0xB5,0xd6,0x1}, //7C);
8154 +       {0xB6,0x0c,0x1}, //70);
8155 +       {0xB7,0xFF,0x1}, //FF);
8156 +       {0xB8,0x00,0x1}, //00);
8157 +       {0xB9,0x5f,0x1}, //1B);
8158 +
8159 +
8160 +       {0xc2,0x01,0x1}, // shading On
8161 +       {0xc3,0x80,0x1},
8162 +       {0xc4,0x02,0x1},
8163 +       {0xc5,0x00,0x1},
8164 +       {0xc6,0x01,0x1},
8165 +       {0xc7,0x00,0x1},
8166 +       {0xc8,0x05,0x1},
8167 +       {0xc9,0x00,0x1},
8168 +       {0xca,0x04,0x1},
8169 +
8170 +       // shading 5
8171 +       {0xd0,0xb5,0x1},
8172 +       {0xd1,0x9c,0x1},
8173 +       {0xd2,0x8d,0x1},
8174 +       {0xd3,0x84,0x1},
8175 +       {0xd4,0x84,0x1},
8176 +       {0xd5,0x91,0x1},
8177 +       {0xd6,0xa0,0x1},
8178 +       {0xd7,0xb5,0x1},
8179 +
8180 +       {0xd8,0xc0,0x1},
8181 +       {0xd9,0xa6,0x1},
8182 +       {0xda,0x93,0x1},
8183 +       {0xdb,0x85,0x1},
8184 +       {0xdc,0x85,0x1},
8185 +       {0xdd,0x90,0x1},
8186 +       {0xde,0xa0,0x1},
8187 +       {0xdf,0xb8,0x1},
8188 +
8189 +       // Page 2
8190 +       {0xec,0x02,0x02},
8191 +
8192 +       {0x2d,0x02,0x02},
8193 +       {0x20,0x13,0x02},
8194 +       {0x21,0x13,0x2},
8195 +       {0x22,0x13,0x2},
8196 +       {0x23,0x13,0x2},
8197 +       {0x2e,0x85,0x2},
8198 +       {0x2f,0x34,0x2},
8199 +       {0x30,0x00,0x2},
8200 +       {0x28,0x94,0x2},
8201 +
8202 +
8203 +       // page 3
8204 +       {0xec,0x03,0x03},
8205 +       {0x10,0x00,0x3},
8206 +       {0x20,0x00,0x3},
8207 +       {0x21,0x20,0x3},
8208 +       {0x22,0x00,0x3},
8209 +       {0x23,0x00,0x3},
8210 +       {0x40,0x20,0x3},
8211 +       {0x41,0x20,0x3},
8212 +       {0x42,0x20,0x3},
8213 +       {0x43,0x20,0x3},
8214 +       {0x60,0x00,0x3},
8215 +       {0x61,0x00,0x3},
8216 +       {0x62,0x00,0x3},
8217 +       {0x63,0x00,0x3},
8218 +       {0x64,0x04,0x3},
8219 +       {0x65,0x1C,0x3},
8220 +       {0x66,0x05,0x3},
8221 +       {0x67,0x1C,0x3},
8222 +       {0x68,0x00,0x3},
8223 +       {0x69,0x2D,0x3},
8224 +       {0x6a,0x00,0x3},
8225 +       {0x6b,0x72,0x3},
8226 +       {0x6c,0x00,0x3},
8227 +       {0x6d,0x00,0x3},
8228 +       {0x6e,0x16,0x3}, // 2.38
8229 +       {0x6f,0x16,0x3}, // 2.38
8230 +       {0x70,0x00,0x3},
8231 +       {0x71,0x00,0x3},
8232 +       {0x72,0x45,0x3},
8233 +       {0x73,0x00,0x3},
8234 +       {0x74,0x1C,0x3},
8235 +       {0x75,0x05,0x3},
8236 +
8237 +       {0x80,0x00,0x3},  //for 0.02 _ 44
8238 +       {0x81,0x00,0x3},
8239 +       {0x82,0x00,0x3},
8240 +       {0x83,0x00,0x3},
8241 +       {0x84,0x04,0x3},
8242 +       {0x85,0x1c,0x3},
8243 +       {0x86,0x05,0x3},
8244 +       {0x87,0x1c,0x3},
8245 +       {0x88,0x00,0x3},
8246 +       {0x89,0x2d,0x3},
8247 +       {0x8a,0x00,0x3},
8248 +       {0x8b,0xcc,0x3},
8249 +       {0x8c,0x00,0x3},
8250 +       {0x8d,0x00,0x3},
8251 +       {0x8e,0x08,0x3},
8252 +       {0x8f,0x08,0x3},
8253 +       {0x90,0x01,0x3},
8254 +       {0x91,0x00,0x3},
8255 +       {0x92,0x91,0x3},
8256 +       {0x93,0x00,0x3},
8257 +       {0x94,0x88,0x3},
8258 +       {0x95,0x02,0x3},
8259 +
8260 +
8261 +
8262 +       // page 4
8263 +       {0xec,0x04,0x04},
8264 +       {0x3f,0x09,0x04}, // VGA : old board :0x08 , new board ; 0X09
8265 +       {0x18,0x00,0x04},  // sxga
8266 +       {0x1c,0x41,0x04},
8267 +       {0x20,0x41,0x04}, // vga center 040215
8268 +       {0x22,0xc1,0x04},// a1);
8269 +       {0x23,0x02,0x04},
8270 +       {0x28,0x41,0x04},
8271 +       {0x2a,0xc1,0x04},// a1);
8272 +       {0x2b,0x02,0x04},
8273 +
8274 +       {0x3c,0x0b,0x04}, //f);  // vga
8275 +       {0x58,0x11,0x04},
8276 +       {0x5c,0x14,0x04},
8277 +       {0x60,0x21,0x04},
8278 +       {0x61,0x00,0x04},
8279 +       {0x62,0xB1,0x04},
8280 +       {0x63,0x02,0x04},
8281 +       {0x64,0x01,0x04},
8282 +       {0x65,0x00,0x04},
8283 +       {0x66,0x01,0x04},
8284 +       {0x67,0x02,0x04},
8285 +       {0x68,0x21,0x04},
8286 +       {0x69,0x00,0x04},
8287 +       {0x6a,0xB1,0x04},
8288 +       {0x6b,0x02,0x04},
8289 +       {0x6c,0x01,0x04},
8290 +       {0x6d,0x00,0x04},
8291 +       {0x6e,0x01,0x04},
8292 +       {0x6f,0x02,0x04},
8293 +       {0x70,0x2D,0x04},
8294 +       {0x71,0x00,0x04},
8295 +       {0x72,0xd3,0x04}, // 14
8296 +       {0x73,0x05,0x04}, // 15
8297 +       {0x74,0x1C,0x04},
8298 +       {0x75,0x05,0x04},
8299 +       {0x76,0x1b,0x04}, // HendL
8300 +       {0x77,0x0b,0x04}, // HendH
8301 +       {0x78,0x01,0x04}, // 5.00
8302 +       {0x79,0x80,0x04}, // 5.2a
8303 +       {0x7a,0x33,0x04},
8304 +       {0x7b,0x00,0x04},
8305 +       {0x7c,0x38,0x04}, // 5.0e
8306 +       {0x7d,0x03,0x04},
8307 +       {0x7e,0x00,0x04},
8308 +       {0x7f,0x0A,0x04},
8309 +
8310 +       {0x80,0x2e,0x04},
8311 +       {0x81,0x00,0x04},
8312 +       {0x82,0xae,0x04},
8313 +       {0x83,0x02,0x04},
8314 +       {0x84,0x00,0x04},
8315 +       {0x85,0x00,0x04},
8316 +       {0x86,0x01,0x04},
8317 +       {0x87,0x02,0x04},
8318 +       {0x88,0x2e,0x04},
8319 +       {0x89,0x00,0x04},
8320 +       {0x8a,0xae,0x04},
8321 +       {0x8b,0x02,0x04},
8322 +       {0x8c,0x1c,0x04},
8323 +       {0x8d,0x00,0x04},
8324 +       {0x8e,0x04,0x04},
8325 +       {0x8f,0x02,0x04},
8326 +       {0x90,0x2d,0x04},
8327 +       {0x91,0x00,0x04},
8328 +       {0x92,0xa5,0x04},
8329 +       {0x93,0x00,0x04},
8330 +       {0x94,0x88,0x04},
8331 +       {0x95,0x02,0x04},
8332 +       {0x96,0xb3,0x04},
8333 +       {0x97,0x06,0x04},
8334 +       {0x98,0x01,0x04},
8335 +       {0x99,0x00,0x04},
8336 +       {0x9a,0x33,0x04},
8337 +       {0x9b,0x30,0x04},
8338 +       {0x9c,0x50,0x04},
8339 +       {0x9d,0x30,0x04},
8340 +       {0x9e,0x01,0x04},
8341 +       {0x9f,0x08,0x04},
8342 +
8343 +       // page 5
8344 +       {0xec,0x05,0x05},
8345 +       {0x5a,0x22,0x05},
8346 +
8347 +       // page 6
8348 +       {0xec,0x06,0x06},
8349 +       {0x14,0x1e,0x06},
8350 +       {0x15,0xb4,0x04},
8351 +       {0x16,0x25,0x04},
8352 +       {0x17,0x74,0x04},
8353 +
8354 +       {0x10,0x48,0x04},
8355 +       {0x11,0xa0,0x04},
8356 +       {0x12,0x40,0x04},  // 040216  AE1 window ÁÙÀÓ
8357 +       {0x13,0x70,0x04},
8358 +
8359 +       {0x1a,0x29,0x04},  // 040217  AWB window ÁÙÀÓ
8360 +       {0x30,0x40,0x04},
8361 +       {0x31,0xa2,0x04},
8362 +       {0x32,0x50,0x04},
8363 +       {0x33,0xbc,0x04},
8364 +       {0x34,0x10,0x04},
8365 +       {0x35,0xd2,0x04},
8366 +       {0x36,0x18,0x04},
8367 +       {0x37,0xf5,0x04},
8368 +       {0x38,0x10,0x04},
8369 +       {0x39,0xd3,0x04},
8370 +       {0x3a,0x1a,0x04},
8371 +       {0x3b,0xf0,0x04},
8372 +
8373 +       // page 7
8374 +       {0xec,0x07,0x07},
8375 +       {0x08,0xff,0x7},
8376 +       {0x38,0x01,0x7}, //07); 040315
8377 +       {0x39,0x01,0x7}, //02); //4);  040223   040315
8378 +       {0x11,0xfe,0x7},  //fe);   // green -2  040303
8379 +       {0x2a,0x20,0x7},
8380 +       {0x2b,0x20,0x7},
8381 +       {0x2c,0x10,0x7},
8382 +       {0x2d,0x00,0x7},
8383 +       {0x2e,0xf0,0x7},
8384 +       {0x2f,0xd0,0x7},
8385 +       {0x3a,0xf0,0x7},
8386 +       {0x23,0x07,0x7},  //  for ESD
8387 +
8388 +       // page 0
8389 +       {0xec,0x00,0x00},
8390 +       {0x8a,0x04,0x00},
8391 +
8392 +       // page 1
8393 +       {0xec,0x01,0x01},
8394 +       {0xe5,0xb0,0x01},
8395 +       {0xe5,0xb0,0x01},
8396 +       {0xc2,0x01,0x01},
8397 +
8398 +       {0x61,0x7b,0x01},
8399 +       {0x62,0x7b,0x01},
8400 +       {0x63,0x1b,0x01},
8401 +       {0x64,0x1b,0x01},
8402 +
8403 +       // page 0
8404 +       {0xec,0x00,0x00},
8405 +       {0x7e,0x04,0x00},
8406 +
8407 +       // page 4
8408 +       {0xec,0x04,0x04},
8409 +       {0x04,0x02,0x04},
8410 +       {0x06,0x02,0x04},
8411 +
8412 +       // page 1
8413 +       {0xec,0x01,0x01},
8414 +       {0x10,0x05,0x01},
8415 +       {0x54,0x02,0x01},
8416 +       {0x56,0x02,0x01},
8417 +
8418 +       // page 3
8419 +       {0xec,0x03,0x03},
8420 +       {0x0e,0x08,0x03},
8421 +       {0x0f,0x08,0x03},
8422 +
8423 +       // page 4
8424 +       {0xec,0x04,0x04},
8425 +       {0x00,0x30,0x04},
8426 +       {0x0a,0x30,0x04},
8427 +
8428 +       // page 5
8429 +       {0xec,0x05,0x05},
8430 +       {0x08,0x33,0x05},
8431 +
8432 +       // page 0
8433 +       {0xec,0x00,0x00},
8434 +       {0x02,0x00,0x00},
8435 +
8436 +       // page 4
8437 +//scale out
8438 +       {0xec,0x04,0x04},
8439 +       {0x02,0x20,0x04},
8440 +       {0x1c,0x4f,0x04},
8441 +
8442 +       // page 1
8443 +       {0xec,0x01,0x01},
8444 +       {0x52,0x20,0x01},
8445 +
8446 +       // page 5
8447 +       {0xec,0x05,0x05},
8448 +       {0x0e,0x4f,0x05},
8449 +
8450 +//ae speed
8451 +       // page 0
8452 +       {0xec,0x00,0x00},
8453 +       {0x92,0x80,0x00},
8454 +       {0x93,0x02,0x00},
8455 +       {0x94,0x04,0x00},
8456 +       {0x95,0x04,0x00},
8457 +       {0x96,0x04,0x00},
8458 +       {0x97,0x04,0x00},
8459 +       {0x9b,0x47,0x00},
8460 +
8461 +       {0xec,0x00,0x00},
8462 +       {0x40,0x17,0x00},
8463 +       {0x41,0x4c,0x00},
8464 +       {0x42,0x1d,0x00},
8465 +       {0x43,0x3e,0x00},
8466 +       {0x44,0x2a,0x00},
8467 +       {0x45,0x2d,0x00},
8468 +
8469 +       {0xec,0x01,0x01},
8470 +       {0x20,0xd0,0x01},   //high light color reference
8471 +
8472 +       {0xec,0x00,0x00},
8473 +       {0x7e,0x00,0x00},
8474 +       {0x73,0x11,0x00}, // 41
8475 +       {0x78,0x78,0x00},
8476 +
8477 +       {0xec,0x07,0x07},
8478 +       {0x1b,0x3e,0x07},
8479 +
8480 +       {0xec,0x00,0x00},
8481 +       {0x48,0xA0,0x00}, //s48C0
8482 +       {0x49,0xB0,0x00}, //s49B0
8483 +       {0x4a,0x30,0x00}, //s4a20
8484 +       {0x4b,0x70,0x00}, //s4b70
8485 +       {0x4c,0xD0,0x00}, //s4cA0
8486 +       {0x4d,0xB0,0x00}, //s4dB0
8487 +       {0x4e,0x30,0x00}, //s4e30
8488 +       {0x4f,0xF0,0x00}, //s4fF0
8489 +       {0x50,0xA0,0x00}, //s50D0
8490 +       {0x51,0xB0,0x00}, //s51B0
8491 +       {0x52,0x25,0x00}, //s5210
8492 +       {0x53,0x70,0x00}, //s5370
8493 +       {0x54,0xD0,0x00}, //s5490
8494 +       {0x55,0xD0,0x00}, //s55B0
8495 +       {0x56,0x3A,0x00}, //s5640
8496 +       {0x57,0xD0,0x00}, //s57D0
8497 +       {0x58,0xA0,0x00}, //s58D0
8498 +       {0x59,0xA0,0x00}, //s59B0
8499 +       {0x5a,0x32,0x00}, //s5a0A
8500 +       {0x5b,0x7A,0x00}, //s5b7A
8501 +       {0x5c,0xB0,0x00}, //s5c90
8502 +       {0x5d,0xC0,0x00}, //s5dC0
8503 +       {0x5e,0x3E,0x00}, //s5e4A
8504 +       {0x5f,0xfa,0x00}, //s5fD0
8505 +
8506 +       // gamma
8507 +       {0xec,0x01,0x01},
8508 +       {0x24,0x31,0x01},
8509 +       {0x25,0x4C,0x01},
8510 +       {0x26,0x75,0x01},
8511 +       {0x27,0xB5,0x01},
8512 +       {0x28,0x17,0x01},
8513 +       {0x29,0xAE,0x01},
8514 +       {0x2A,0x97,0x01},
8515 +       {0x2B,0xFF,0x01},
8516 +       {0x2C,0x00,0x01},
8517 +       {0x2D,0x5B,0x01},
8518 +
8519 +       {0xB0,0x31,0x01},
8520 +       {0xB1,0x4C,0x01},
8521 +       {0xB2,0x75,0x01},
8522 +       {0xB3,0xB5,0x01},
8523 +       {0xB4,0x17,0x01},
8524 +       {0xB5,0xAE,0x01},
8525 +       {0xB6,0x97,0x01},
8526 +       {0xB7,0xFF,0x01},
8527 +       {0xB8,0x00,0x01},
8528 +       {0xB9,0x5B,0x01},
8529 +
8530 +       {0xec,0x00,0x00},
8531 +       {0x77,0xb0,0x00},
8532 +       {0x39,0x06,0x00},
8533 +       {0x3a,0x08,0x00},
8534 +
8535 +};
8536 +
8537 +
8538 +#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0]))
8539 +#define S5X532_RISC_REGS 0xEB
8540 +#define S5X532_ISP_REGS 0xFB /* S5C7323X */
8541 +#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */
8542 +
8543 +
8544 +#define PAGE_ADDRESS      0xEC
8545 +
8546 +//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS)
8547 +#define S5X532_REGS (0x1000)
8548 +
8549 +
8550 +
8551 +#endif
8552 +
8553 +
8554 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/userapp.h
8555 ===================================================================
8556 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
8557 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/userapp.h       2008-12-11 22:46:48.000000000 +0100
8558 @@ -0,0 +1,44 @@
8559 +/*
8560 +    Character Driver API Interface
8561 +
8562 +    Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com)
8563 +
8564 +    This program is free software; you can redistribute it and/or modify
8565 +    it under the terms of the GNU General Public License as published by
8566 +    the Free Software Foundation; either version 2 of the License, or
8567 +    (at your option) any later version.
8568 +
8569 +*/
8570 +
8571 +#ifndef __FIMC20_CAMIF_USR_APP_H_
8572 +#define __FIMC20_CAMIF_USR_APP_H_
8573 +
8574 +
8575 +/*
8576 + * IOCTL Command for Character Driver
8577 + */
8578 +
8579 +#define CMD_CAMERA_INIT   0x23
8580 +/*  Test Application Usage */
8581 +typedef struct {
8582 +        int src_x;
8583 +        int src_y;
8584 +        int dst_x;
8585 +        int dst_y;
8586 +        int bpp;
8587 +        int flip;
8588 +} camif_param_t;
8589 +
8590 +
8591 +
8592 +#endif
8593 +
8594 +
8595 +/*
8596 + * Local variables:
8597 + * tab-width: 8
8598 + *  c-indent-level: 8
8599 + *  c-basic-offset: 8
8600 + *  c-set-style: "K&R"
8601 + * End:
8602 + */
8603 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/v4l2_api.c
8604 ===================================================================
8605 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
8606 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/v4l2_api.c      2008-12-11 22:46:48.000000000 +0100
8607 @@ -0,0 +1,311 @@
8608 +/*
8609 + * . 2004-01-03: SW.LEE <hitchcar@sec.samsung.com>
8610 + *
8611 + * This file is subject to the terms and conditions of the GNU General Public
8612 + * License 2. See the file COPYING in the main directory of this archive
8613 + * for more details.
8614 + */
8615 +
8616 +#include <linux/config.h>
8617 +#include <linux/module.h>
8618 +#include <linux/kernel.h>
8619 +#include <linux/init.h>
8620 +#include <linux/sched.h>
8621 +#include <linux/irq.h>
8622 +#include <linux/tqueue.h>
8623 +#include <linux/locks.h>
8624 +#include <linux/completion.h>
8625 +#include <linux/delay.h>
8626 +#include <linux/slab.h>
8627 +#include <linux/vmalloc.h>
8628 +#include <linux/miscdevice.h>
8629 +#include <linux/wait.h>
8630 +
8631 +#include <asm/io.h>
8632 +#include <asm/semaphore.h>
8633 +#include <asm/hardware.h>
8634 +#include <asm/uaccess.h>
8635 +
8636 +#include <asm/arch/cpu_s3c2440.h>
8637 +#include <asm/arch/S3C2440.h>
8638 +
8639 +#include "camif.h"
8640 +#include "videodev.h"
8641 +
8642 +/*
8643 +  Codec_formats/Preview_format[0] must be same to initial value of
8644 +  preview_init_param/codec_init_param
8645 +*/
8646 +
8647 +const struct v4l2_fmtdesc codec_formats[] = {
8648 +       {
8649 +               .index     = 0,
8650 +               .type      = V4L2_BUF_TYPE_VIDEO_CAPTURE,
8651 +//             .flags     = FORMAT_FLAGS_PLANAR,
8652 +               .description = "4:2:2, planar, Y-Cb-Cr",
8653 +               .pixelformat = V4L2_PIX_FMT_YUV422P,
8654 +
8655 +       },{
8656 +               .index    = 1,
8657 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
8658 +//             .flags    = FORMAT_FLAGS_PLANAR,
8659 +               .name     = "4:2:0, planar, Y-Cb-Cr",
8660 +               .fourcc   = V4L2_PIX_FMT_YUV420,
8661 +       }
8662 +};
8663 +
8664 +
8665 +/* Todo
8666 +   FIMC V4L2_PIX_FMT_RGB565 is not same to that of V4L2spec
8667 +   and so we need image convert to FIMC V4l2_PIX_FMT_RGB565.
8668 +*/
8669 +const struct v4l2_fmtdesc preview_formats[] = {
8670 +       {
8671 +               .index    = 1,
8672 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
8673 +               .description = "16 bpp RGB, le",
8674 +               .fourcc   = V4L2_PIX_FMT_RGB565,
8675 +//             .flags    = FORMAT_FLAGS_PACKED,
8676 +       },
8677 +       {
8678 +               .index    = 0,
8679 +               .type     = V4L2_BUF_TYPE_VIDEO_CAPTURE,
8680 +//             .flags    = FORMAT_FLAGS_PACKED,
8681 +               .description = "32 bpp RGB, le",
8682 +               .fourcc   = V4L2_PIX_FMT_BGR32,
8683 +       }
8684 +}
8685 +
8686 +#define NUM_F       ARRARY_SIZE(preview_formats)
8687 +
8688 +
8689 +/*
8690 + * This function and v4l2 structure made for V4L2 API functions
8691 + *     App <--> v4l2 <--> logical param <--> hardware
8692 + */
8693 +static int camif_get_v4l2(camif_cfg_t *cfg)
8694 +{
8695 +       return 0;
8696 +}
8697 +
8698 +
8699 +/*
8700 +** Gives the depth of a video4linux2 fourcc aka pixel format in bits.
8701 +*/
8702 +static int pixfmt2depth(int pixfmt,int *fmtptr)
8703 +{
8704 +       int fmt, depth;
8705 +
8706 +       switch (pixfmt) {
8707 +       case V4L2_PIX_FMT_RGB565:
8708 +       case V4L2_PIX_FMT_RGB565X:
8709 +               fmt = CAMIF_RGB_16;
8710 +               depth = 16;
8711 +               break;
8712 +       case V4L2_PIX_FMT_BGR24: /* Not tested */
8713 +       case V4L2_PIX_FMT_RGB24:
8714 +               fmt = CAMIF_RGB_24;
8715 +               depth = 24;
8716 +               break;
8717 +       case V4L2_PIX_FMT_BGR32:
8718 +       case V4L2_PIX_FMT_RGB32:
8719 +               fmt = CAMIF_RGB_24;
8720 +               depth 32;
8721 +               break;
8722 +       case V4L2_PIX_FMT_GREY: /* Not tested  */
8723 +               fmt = CAMIF_OUT_YCBCR420;
8724 +               depth = 8;
8725 +               break;
8726 +       case V4L2_PIX_FMT_YUYV:
8727 +       case V4L2_PIX_FMT_UYVY:
8728 +       case V4L2_PIX_FMT_YUV422P:
8729 +               fmt = CAMIF_OUT_YCBCR422;
8730 +               depth = 16;
8731 +               break;
8732 +       case V4L2_PIX_FMT_YUV420:
8733 +               fmt = CAMIF_OUT_YCBCR420;
8734 +               depth = 12;
8735 +               break;
8736 +       }
8737 +       if (fmtptr) *fmtptr = fmt;
8738 +       return depth;
8739 +}
8740 +
8741 +
8742 +
8743 +static int camif_s_v4l2(camif_cfg_t *cfg)
8744 +{
8745 +       int num = cfg->v2.used_fmt;
8746 +
8747 +       if ( !(cfg->v2.status&CAMIF_V4L2_INIT)) {
8748 +               int depth;
8749 +               int fourcc = v2.fmtdesc[num].pixelformat;
8750 +
8751 +               /* To define v4l2_fmtsdesc */
8752 +               if (cfg->dma_type == CAMIF_CODEC)
8753 +                       cfg->v2->fmtdesc = codec_formats;
8754 +               else
8755 +                       cfg->v2->fmtdesc = preview_formats;
8756 +
8757 +               /* To define v4l2_format used currently */
8758 +               cfg->v2.fmt.width    = cfg->target_x;
8759 +               cfg->v2.fmt.height   = cfg->target_y;
8760 +               cfg->v2.fmt.field    = V4L2_FIELD_NONE;
8761 +               cfg->v2.fmt.pixelformat = fourcc;
8762 +               depth       = pixfmt2depth(fourcc,NULL);
8763 +               cfg->v2.fmt.bytesperline= cfg->v2.fmt.width*depth >> 3;
8764 +               cfg->v2.fmt.sizeimage =
8765 +                       cfg->v2.fmt.height * cfg->v2.fmt.bytesperline;
8766 +
8767 +               /* To define v4l2_input */
8768 +               cfg->v2.input.index  = 0;
8769 +               if (cfg->dma_type == CAMIF_CODEC)
8770 +                       snprintf(cfg->v2.input.name, 31, "CAMIF CODEC");
8771 +               else
8772 +                       snprintf(cfg->v2.input.name, 31, "CAMIF PREVIEW");
8773 +               cfg->v2.input.type = V4L2_INPUT_TYPE_CAMERA;
8774 +
8775 +               /* Write the Status of v4l2 machine */
8776 +               cfg->v2.status |= CAMIF_V4L2_INIT;
8777 +        }
8778 +       return 0;
8779 +}
8780 +
8781 +
8782 +static int camif_g_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
8783 +{
8784 +       int size = sizeof(struct v4l2_pix_format);
8785 +
8786 +       switch (f->type) {
8787 +       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
8788 +               memset(&f->fmt.pix,0,size);
8789 +               memcpy(&f->fmt.pix,&cfg->v2.fmt,size);
8790 +               return 0;
8791 +       default:
8792 +               return -EINVAL;
8793 +       }
8794 +}
8795 +
8796 +
8797 +/* Copy v4l2 parameter into other element of camif_cfg_t */
8798 +static int camif_s_try(camif_cfg_t *cfg, int f)
8799 +{
8800 +       int fmt;
8801 +       cfg->target_x = cfg->v2.fmt.width;
8802 +       cfg->target_y = cfg->v2.fmt.height;
8803 +       pixfmt2depth(cfg->v2.fmt.pixelformat,&fmt);
8804 +       cfg->fmt = fmt;
8805 +       camif_dynamic_conf(cfg);
8806 +}
8807 +
8808 +
8809 +static int camif_s_fmt(camif_cfg_t *cfg, struct v4l2_format *f)
8810 +{
8811 +       int retval;
8812 +
8813 +       switch (f->type) {
8814 +       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
8815 +       {
8816 +               /* update our state informations */
8817 +//             down(&fh->cap.lock);
8818 +               cfg->v2.fmt          = f->pix;
8819 +               cfg->v2.status       |= CAMIF_v4L2_DIRTY;
8820 +               camif_dynamic_conf(cfg);
8821 +               cfg->v2.status      &= ~CAMIF_v4L2_DIRTY; /* dummy ? */
8822 +//             up(&fh->cap.lock);
8823 +
8824 +               return 0;
8825 +       }
8826 +       default:
8827 +               return -EINVAL;
8828 +       }
8829 +
8830 +}
8831 +
8832 +/* Refer ioctl of  videodeX.c  and bttv-driver.c */
8833 +int camif_do_ioctl
8834 +(struct inode *inode, struct file *file,unsigned int cmd, void * arg)
8835 +{
8836 +       camif_cfg_t *cfg = file->private_data;
8837 +       int ret = 0;
8838 +
8839 +       switch (cmd) {
8840 +        case VIDIOC_QUERYCAP:
8841 +               {
8842 +                       struct v4l2_capability *cap = arg;
8843 +
8844 +                       strcpy(cap->driver,"Fimc Camera");
8845 +                       strlcpy(cap->card,cfg->v->name,sizeof(cap->card));
8846 +                       sprintf(cap->bus_info,"FIMC 2.0 AHB Bus");
8847 +                       cap->version = 0;
8848 +                       cap->capabilities =
8849 +                               V4L2_CAP_VIDEO_CAPTURE |V4L2_CAP_READWRITE;
8850 +                       return 0;
8851 +               }
8852 +       case VIDIOC_G_FMT:
8853 +               {
8854 +                       struct v4l2_format *f = arg;
8855 +                       return camif_g_fmt(cfg,f);
8856 +               }
8857 +       case VIDIOC_S_FMT:
8858 +               {
8859 +                       struct v4l2_format *f = arg;
8860 +                       return camif_s_fmt(cfg,f);
8861 +               }
8862 +
8863 +       case VIDIOC_ENUM_FMT:
8864 +               {
8865 +                       struct v4l2_fmtdesc *f = arg;
8866 +                       enum v4l2_buf_type type = f->type;
8867 +                       int index = f->index;
8868 +
8869 +                       if (index >= NUM_F)
8870 +                               return -EINVAL;
8871 +                       switch (f->type) {
8872 +                       case V4L2_BUF_TYPE_VIDEO_CAPTURE:
8873 +                               break;
8874 +                       case V4L2_BUF_TYPE_VIDEO_OVERLAY:
8875 +                       case V4L2_BUF_TYPE_VBI_CAPTURE:
8876 +                                       default:
8877 +                       return -EINVAL;
8878 +                       }
8879 +                       memset(f,0,sizeof(*f));
8880 +                       memcpy(f,cfg->v2.fmtdesc+index,sizeof(*f));
8881 +                       return 0;
8882 +               }
8883 +       case VIDIOC_G_INPUT:
8884 +               {
8885 +                       u32 *i = arg;
8886 +                       *i = cfg->v2.input;
8887 +                       return 0;
8888 +               }
8889 +       case VIDIOC_S_INPUT:
8890 +               {
8891 +                       int index = *((int *)arg);
8892 +                       if (index != 0)
8893 +                               return -EINVAL;
8894 +                       cfg->v2.input.index = index;
8895 +                       return 0;
8896 +               }
8897 +
8898 +       default:
8899 +               return -ENOIOCTLCMD; /* errno.h */
8900 +       } /* End of Switch  */
8901 +
8902 +
8903 +}
8904 +
8905 +
8906 +
8907 +
8908 +
8909 +
8910 +
8911 +/*
8912 + * Local variables:
8913 + * tab-width: 8
8914 + *  c-indent-level: 8
8915 + *  c-basic-offset: 8
8916 + *  c-set-style: "K&R"
8917 + * End:
8918 + */
8919 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev2.h
8920 ===================================================================
8921 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
8922 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev2.h     2008-12-11 22:46:49.000000000 +0100
8923 @@ -0,0 +1,938 @@
8924 +#ifndef __LINUX_VIDEODEV2_H
8925 +#define __LINUX_VIDEODEV2_H
8926 +/*
8927 + *     Video for Linux Two
8928 + *
8929 + *     Header file for v4l or V4L2 drivers and applications, for
8930 + *     Linux kernels 2.2.x or 2.4.x.
8931 + *
8932 + *     See http://bytesex.org/v4l/ for API specs and other
8933 + *     v4l2 documentation.
8934 + *
8935 + *     Author: Bill Dirks <bdirks@pacbell.net>
8936 + *             Justin Schoeman
8937 + *             et al.
8938 + */
8939 +#ifdef __KERNEL__
8940 +#include <linux/time.h> /* need struct timeval */
8941 +#endif
8942 +
8943 +/*
8944 + *     M I S C E L L A N E O U S
8945 + */
8946 +
8947 +/*  Four-character-code (FOURCC) */
8948 +#define v4l2_fourcc(a,b,c,d)\
8949 +        (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
8950 +
8951 +/*
8952 + *     E N U M S
8953 + */
8954 +enum v4l2_field {
8955 +       V4L2_FIELD_ANY        = 0, /* driver can choose from none,
8956 +                                     top, bottom, interlaced
8957 +                                     depending on whatever it thinks
8958 +                                     is approximate ... */
8959 +       V4L2_FIELD_NONE       = 1, /* this device has no fields ... */
8960 +       V4L2_FIELD_TOP        = 2, /* top field only */
8961 +       V4L2_FIELD_BOTTOM     = 3, /* bottom field only */
8962 +       V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */
8963 +       V4L2_FIELD_SEQ_TB     = 5, /* both fields sequential into one
8964 +                                     buffer, top-bottom order */
8965 +       V4L2_FIELD_SEQ_BT     = 6, /* same as above + bottom-top order */
8966 +       V4L2_FIELD_ALTERNATE  = 7, /* both fields alternating into
8967 +                                     separate buffers */
8968 +};
8969 +#define V4L2_FIELD_HAS_TOP(field)      \
8970 +       ((field) == V4L2_FIELD_TOP      ||\
8971 +        (field) == V4L2_FIELD_INTERLACED ||\
8972 +        (field) == V4L2_FIELD_SEQ_TB   ||\
8973 +        (field) == V4L2_FIELD_SEQ_BT)
8974 +#define V4L2_FIELD_HAS_BOTTOM(field)   \
8975 +       ((field) == V4L2_FIELD_BOTTOM   ||\
8976 +        (field) == V4L2_FIELD_INTERLACED ||\
8977 +        (field) == V4L2_FIELD_SEQ_TB   ||\
8978 +        (field) == V4L2_FIELD_SEQ_BT)
8979 +#define V4L2_FIELD_HAS_BOTH(field)     \
8980 +       ((field) == V4L2_FIELD_INTERLACED ||\
8981 +        (field) == V4L2_FIELD_SEQ_TB   ||\
8982 +        (field) == V4L2_FIELD_SEQ_BT)
8983 +
8984 +enum v4l2_buf_type {
8985 +       V4L2_BUF_TYPE_VIDEO_CAPTURE  = 1,
8986 +       V4L2_BUF_TYPE_VIDEO_OUTPUT   = 2,
8987 +       V4L2_BUF_TYPE_VIDEO_OVERLAY  = 3,
8988 +       V4L2_BUF_TYPE_VBI_CAPTURE    = 4,
8989 +       V4L2_BUF_TYPE_VBI_OUTPUT     = 5,
8990 +       V4L2_BUF_TYPE_PRIVATE        = 0x80,
8991 +};
8992 +
8993 +enum v4l2_ctrl_type {
8994 +       V4L2_CTRL_TYPE_INTEGER       = 1,
8995 +       V4L2_CTRL_TYPE_BOOLEAN       = 2,
8996 +       V4L2_CTRL_TYPE_MENU          = 3,
8997 +       V4L2_CTRL_TYPE_BUTTON        = 4,
8998 +};
8999 +
9000 +enum v4l2_tuner_type {
9001 +       V4L2_TUNER_RADIO             = 1,
9002 +       V4L2_TUNER_ANALOG_TV         = 2,
9003 +};
9004 +
9005 +enum v4l2_memory {
9006 +       V4L2_MEMORY_MMAP             = 1,
9007 +       V4L2_MEMORY_USERPTR          = 2,
9008 +       V4L2_MEMORY_OVERLAY          = 3,
9009 +};
9010 +
9011 +/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
9012 +enum v4l2_colorspace {
9013 +       /* ITU-R 601 -- broadcast NTSC/PAL */
9014 +       V4L2_COLORSPACE_SMPTE170M     = 1,
9015 +
9016 +       /* 1125-Line (US) HDTV */
9017 +       V4L2_COLORSPACE_SMPTE240M     = 2,
9018 +
9019 +       /* HD and modern captures. */
9020 +       V4L2_COLORSPACE_REC709        = 3,
9021 +
9022 +       /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */
9023 +       V4L2_COLORSPACE_BT878         = 4,
9024 +
9025 +       /* These should be useful.  Assume 601 extents. */
9026 +       V4L2_COLORSPACE_470_SYSTEM_M  = 5,
9027 +       V4L2_COLORSPACE_470_SYSTEM_BG = 6,
9028 +
9029 +       /* I know there will be cameras that send this.  So, this is
9030 +        * unspecified chromaticities and full 0-255 on each of the
9031 +        * Y'CbCr components
9032 +        */
9033 +       V4L2_COLORSPACE_JPEG          = 7,
9034 +
9035 +       /* For RGB colourspaces, this is probably a good start. */
9036 +       V4L2_COLORSPACE_SRGB          = 8,
9037 +};
9038 +
9039 +enum v4l2_priority {
9040 +       V4L2_PRIORITY_UNSET       = 0,  /* not initialized */
9041 +       V4L2_PRIORITY_BACKGROUND  = 1,
9042 +       V4L2_PRIORITY_INTERACTIVE = 2,
9043 +       V4L2_PRIORITY_RECORD      = 3,
9044 +       V4L2_PRIORITY_DEFAULT     = V4L2_PRIORITY_INTERACTIVE,
9045 +};
9046 +
9047 +struct v4l2_rect {
9048 +       __s32   left;
9049 +       __s32   top;
9050 +       __s32   width;
9051 +       __s32   height;
9052 +};
9053 +
9054 +struct v4l2_fract {
9055 +       __u32   numerator;
9056 +       __u32   denominator;
9057 +};
9058 +
9059 +/*
9060 + *     D R I V E R   C A P A B I L I T I E S
9061 + */
9062 +struct v4l2_capability
9063 +{
9064 +       __u8    driver[16];     /* i.e. "bttv" */
9065 +       __u8    card[32];       /* i.e. "Hauppauge WinTV" */
9066 +       __u8    bus_info[32];   /* "PCI:" + pci_name(pci_dev) */
9067 +       __u32   version;        /* should use KERNEL_VERSION() */
9068 +       __u32   capabilities;   /* Device capabilities */
9069 +       __u32   reserved[4];
9070 +};
9071 +
9072 +/* Values for 'capabilities' field */
9073 +#define V4L2_CAP_VIDEO_CAPTURE 0x00000001  /* Is a video capture device */
9074 +#define V4L2_CAP_VIDEO_OUTPUT  0x00000002  /* Is a video output device */
9075 +#define V4L2_CAP_VIDEO_OVERLAY 0x00000004  /* Can do video overlay */
9076 +#define V4L2_CAP_VBI_CAPTURE   0x00000010  /* Is a VBI capture device */
9077 +#define V4L2_CAP_VBI_OUTPUT    0x00000020  /* Is a VBI output device */
9078 +#define V4L2_CAP_RDS_CAPTURE   0x00000100  /* RDS data capture */
9079 +
9080 +#define V4L2_CAP_TUNER         0x00010000  /* has a tuner */
9081 +#define V4L2_CAP_AUDIO         0x00020000  /* has audio support */
9082 +#define V4L2_CAP_RADIO         0x00040000  /* is a radio device */
9083 +
9084 +#define V4L2_CAP_READWRITE      0x01000000  /* read/write systemcalls */
9085 +#define V4L2_CAP_ASYNCIO        0x02000000  /* async I/O */
9086 +#define V4L2_CAP_STREAMING      0x04000000  /* streaming I/O ioctls */
9087 +
9088 +/*
9089 + *     V I D E O   I M A G E   F O R M A T
9090 + */
9091 +
9092 +struct v4l2_pix_format
9093 +{
9094 +       __u32                   width;
9095 +       __u32                   height;
9096 +       __u32                   pixelformat;
9097 +       enum v4l2_field         field;
9098 +       __u32                   bytesperline;   /* for padding, zero if unused */
9099 +       __u32                   sizeimage;
9100 +        enum v4l2_colorspace   colorspace;
9101 +       __u32                   priv;           /* private data, depends on pixelformat */
9102 +};
9103 +
9104 +/*           Pixel format    FOURCC                  depth  Description   */
9105 +#define V4L2_PIX_FMT_RGB332  v4l2_fourcc('R','G','B','1') /*  8  RGB-3-3-2     */
9106 +#define V4L2_PIX_FMT_RGB555  v4l2_fourcc('R','G','B','O') /* 16  RGB-5-5-5     */
9107 +#define V4L2_PIX_FMT_RGB565  v4l2_fourcc('R','G','B','P') /* 16  RGB-5-6-5     */
9108 +#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16  RGB-5-5-5 BE  */
9109 +#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R','G','B','R') /* 16  RGB-5-6-5 BE  */
9110 +#define V4L2_PIX_FMT_BGR24   v4l2_fourcc('B','G','R','3') /* 24  BGR-8-8-8     */
9111 +#define V4L2_PIX_FMT_RGB24   v4l2_fourcc('R','G','B','3') /* 24  RGB-8-8-8     */
9112 +#define V4L2_PIX_FMT_BGR32   v4l2_fourcc('B','G','R','4') /* 32  BGR-8-8-8-8   */
9113 +#define V4L2_PIX_FMT_RGB32   v4l2_fourcc('R','G','B','4') /* 32  RGB-8-8-8-8   */
9114 +#define V4L2_PIX_FMT_GREY    v4l2_fourcc('G','R','E','Y') /*  8  Greyscale     */
9115 +#define V4L2_PIX_FMT_YVU410  v4l2_fourcc('Y','V','U','9') /*  9  YVU 4:1:0     */
9116 +#define V4L2_PIX_FMT_YVU420  v4l2_fourcc('Y','V','1','2') /* 12  YVU 4:2:0     */
9117 +#define V4L2_PIX_FMT_YUYV    v4l2_fourcc('Y','U','Y','V') /* 16  YUV 4:2:2     */
9118 +#define V4L2_PIX_FMT_UYVY    v4l2_fourcc('U','Y','V','Y') /* 16  YUV 4:2:2     */
9119 +#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16  YVU422 planar */
9120 +#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16  YVU411 planar */
9121 +#define V4L2_PIX_FMT_Y41P    v4l2_fourcc('Y','4','1','P') /* 12  YUV 4:1:1     */
9122 +
9123 +/* two planes -- one Y, one Cr + Cb interleaved  */
9124 +#define V4L2_PIX_FMT_NV12    v4l2_fourcc('N','V','1','2') /* 12  Y/CbCr 4:2:0  */
9125 +#define V4L2_PIX_FMT_NV21    v4l2_fourcc('N','V','2','1') /* 12  Y/CrCb 4:2:0  */
9126 +
9127 +/*  The following formats are not defined in the V4L2 specification */
9128 +#define V4L2_PIX_FMT_YUV410  v4l2_fourcc('Y','U','V','9') /*  9  YUV 4:1:0     */
9129 +#define V4L2_PIX_FMT_YUV420  v4l2_fourcc('Y','U','1','2') /* 12  YUV 4:2:0     */
9130 +#define V4L2_PIX_FMT_YYUV    v4l2_fourcc('Y','Y','U','V') /* 16  YUV 4:2:2     */
9131 +#define V4L2_PIX_FMT_HI240   v4l2_fourcc('H','I','2','4') /*  8  8-bit color   */
9132 +
9133 +/* compressed formats */
9134 +#define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M','J','P','G') /* Motion-JPEG   */
9135 +#define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J','P','E','G') /* JFIF JPEG     */
9136 +#define V4L2_PIX_FMT_DV       v4l2_fourcc('d','v','s','d') /* 1394          */
9137 +#define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M','P','E','G') /* MPEG          */
9138 +
9139 +/*  Vendor-specific formats   */
9140 +#define V4L2_PIX_FMT_WNVA     v4l2_fourcc('W','N','V','A') /* Winnov hw compress */
9141 +
9142 +/*
9143 + *     F O R M A T   E N U M E R A T I O N
9144 + */
9145 +struct v4l2_fmtdesc
9146 +{
9147 +       __u32               index;             /* Format number      */
9148 +       enum v4l2_buf_type  type;              /* buffer type        */
9149 +       __u32               flags;
9150 +       __u8                description[32];   /* Description string */
9151 +       __u32               pixelformat;       /* Format fourcc      */
9152 +       __u32               reserved[4];
9153 +};
9154 +
9155 +#define V4L2_FMT_FLAG_COMPRESSED 0x0001
9156 +
9157 +
9158 +/*
9159 + *     T I M E C O D E
9160 + */
9161 +struct v4l2_timecode
9162 +{
9163 +       __u32   type;
9164 +       __u32   flags;
9165 +       __u8    frames;
9166 +       __u8    seconds;
9167 +       __u8    minutes;
9168 +       __u8    hours;
9169 +       __u8    userbits[4];
9170 +};
9171 +
9172 +/*  Type  */
9173 +#define V4L2_TC_TYPE_24FPS             1
9174 +#define V4L2_TC_TYPE_25FPS             2
9175 +#define V4L2_TC_TYPE_30FPS             3
9176 +#define V4L2_TC_TYPE_50FPS             4
9177 +#define V4L2_TC_TYPE_60FPS             5
9178 +
9179 +/*  Flags  */
9180 +#define V4L2_TC_FLAG_DROPFRAME         0x0001 /* "drop-frame" mode */
9181 +#define V4L2_TC_FLAG_COLORFRAME                0x0002
9182 +#define V4L2_TC_USERBITS_field         0x000C
9183 +#define V4L2_TC_USERBITS_USERDEFINED   0x0000
9184 +#define V4L2_TC_USERBITS_8BITCHARS     0x0008
9185 +/* The above is based on SMPTE timecodes */
9186 +
9187 +
9188 +/*
9189 + *     C O M P R E S S I O N   P A R A M E T E R S
9190 + */
9191 +#if 0
9192 +/* ### generic compression settings don't work, there is too much
9193 + * ### codec-specific stuff.  Maybe reuse that for MPEG codec settings
9194 + * ### later ... */
9195 +struct v4l2_compression
9196 +{
9197 +       __u32   quality;
9198 +       __u32   keyframerate;
9199 +       __u32   pframerate;
9200 +       __u32   reserved[5];
9201 +
9202 +/*  what we'll need for MPEG, extracted from some postings on
9203 +    the v4l list (Gert Vervoort, PlasmaJohn).
9204 +
9205 +system stream:
9206 +  - type: elementary stream(ES), packatised elementary stream(s) (PES)
9207 +    program stream(PS), transport stream(TS)
9208 +  - system bitrate
9209 +  - PS packet size (DVD: 2048 bytes, VCD: 2324 bytes)
9210 +  - TS video PID
9211 +  - TS audio PID
9212 +  - TS PCR PID
9213 +  - TS system information tables (PAT, PMT, CAT, NIT and SIT)
9214 +  - (MPEG-1 systems stream vs. MPEG-2 program stream (TS not supported
9215 +    by MPEG-1 systems)
9216 +
9217 +audio:
9218 +  - type: MPEG (+Layer I,II,III), AC-3, LPCM
9219 +  - bitrate
9220 +  - sampling frequency (DVD: 48 Khz, VCD: 44.1 KHz, 32 kHz)
9221 +  - Trick Modes? (ff, rew)
9222 +  - Copyright
9223 +  - Inverse Telecine
9224 +
9225 +video:
9226 +  - picturesize (SIF, 1/2 D1, 2/3 D1, D1) and PAL/NTSC norm can be set
9227 +    through excisting V4L2 controls
9228 +  - noise reduction, parameters encoder specific?
9229 +  - MPEG video version: MPEG-1, MPEG-2
9230 +  - GOP (Group Of Pictures) definition:
9231 +    - N: number of frames per GOP
9232 +    - M: distance between reference (I,P) frames
9233 +    - open/closed GOP
9234 +  - quantiser matrix: inter Q matrix (64 bytes) and intra Q matrix (64 bytes)
9235 +  - quantiser scale: linear or logarithmic
9236 +  - scanning: alternate or zigzag
9237 +  - bitrate mode: CBR (constant bitrate) or VBR (variable bitrate).
9238 +  - target video bitrate for CBR
9239 +  - target video bitrate for VBR
9240 +  - maximum video bitrate for VBR - min. quantiser value for VBR
9241 +  - max. quantiser value for VBR
9242 +  - adaptive quantisation value
9243 +  - return the number of bytes per GOP or bitrate for bitrate monitoring
9244 +
9245 +*/
9246 +};
9247 +#endif
9248 +
9249 +struct v4l2_jpegcompression
9250 +{
9251 +       int quality;
9252 +
9253 +       int  APPn;              /* Number of APP segment to be written,
9254 +                                * must be 0..15 */
9255 +       int  APP_len;           /* Length of data in JPEG APPn segment */
9256 +       char APP_data[60];      /* Data in the JPEG APPn segment. */
9257 +
9258 +       int  COM_len;           /* Length of data in JPEG COM segment */
9259 +       char COM_data[60];      /* Data in JPEG COM segment */
9260 +
9261 +       __u32 jpeg_markers;     /* Which markers should go into the JPEG
9262 +                                * output. Unless you exactly know what
9263 +                                * you do, leave them untouched.
9264 +                                * Inluding less markers will make the
9265 +                                * resulting code smaller, but there will
9266 +                                * be fewer aplications which can read it.
9267 +                                * The presence of the APP and COM marker
9268 +                                * is influenced by APP_len and COM_len
9269 +                                * ONLY, not by this property! */
9270 +
9271 +#define V4L2_JPEG_MARKER_DHT (1<<3)    /* Define Huffman Tables */
9272 +#define V4L2_JPEG_MARKER_DQT (1<<4)    /* Define Quantization Tables */
9273 +#define V4L2_JPEG_MARKER_DRI (1<<5)    /* Define Restart Interval */
9274 +#define V4L2_JPEG_MARKER_COM (1<<6)    /* Comment segment */
9275 +#define V4L2_JPEG_MARKER_APP (1<<7)    /* App segment, driver will
9276 +                                        * allways use APP0 */
9277 +};
9278 +
9279 +
9280 +/*
9281 + *     M E M O R Y - M A P P I N G   B U F F E R S
9282 + */
9283 +struct v4l2_requestbuffers
9284 +{
9285 +       __u32                   count;
9286 +       enum v4l2_buf_type      type;
9287 +       enum v4l2_memory        memory;
9288 +       __u32                   reserved[2];
9289 +};
9290 +
9291 +struct v4l2_buffer
9292 +{
9293 +       __u32                   index;
9294 +       enum v4l2_buf_type      type;
9295 +       __u32                   bytesused;
9296 +       __u32                   flags;
9297 +       enum v4l2_field         field;
9298 +       struct timeval          timestamp;
9299 +       struct v4l2_timecode    timecode;
9300 +       __u32                   sequence;
9301 +
9302 +       /* memory location */
9303 +       enum v4l2_memory        memory;
9304 +       union {
9305 +               __u32           offset;
9306 +               unsigned long   userptr;
9307 +       } m;
9308 +       __u32                   length;
9309 +
9310 +       __u32                   reserved[2];
9311 +};
9312 +
9313 +/*  Flags for 'flags' field */
9314 +#define V4L2_BUF_FLAG_MAPPED   0x0001  /* Buffer is mapped (flag) */
9315 +#define V4L2_BUF_FLAG_QUEUED   0x0002  /* Buffer is queued for processing */
9316 +#define V4L2_BUF_FLAG_DONE     0x0004  /* Buffer is ready */
9317 +#define V4L2_BUF_FLAG_KEYFRAME 0x0008  /* Image is a keyframe (I-frame) */
9318 +#define V4L2_BUF_FLAG_PFRAME   0x0010  /* Image is a P-frame */
9319 +#define V4L2_BUF_FLAG_BFRAME   0x0020  /* Image is a B-frame */
9320 +#define V4L2_BUF_FLAG_TIMECODE 0x0100  /* timecode field is valid */
9321 +
9322 +/*
9323 + *     O V E R L A Y   P R E V I E W
9324 + */
9325 +struct v4l2_framebuffer
9326 +{
9327 +       __u32                   capability;
9328 +       __u32                   flags;
9329 +/* FIXME: in theory we should pass something like PCI device + memory
9330 + * region + offset instead of some physical address */
9331 +       void*                   base;
9332 +       struct v4l2_pix_format  fmt;
9333 +};
9334 +/*  Flags for the 'capability' field. Read only */
9335 +#define V4L2_FBUF_CAP_EXTERNOVERLAY    0x0001
9336 +#define V4L2_FBUF_CAP_CHROMAKEY                0x0002
9337 +#define V4L2_FBUF_CAP_LIST_CLIPPING     0x0004
9338 +#define V4L2_FBUF_CAP_BITMAP_CLIPPING  0x0008
9339 +/*  Flags for the 'flags' field. */
9340 +#define V4L2_FBUF_FLAG_PRIMARY         0x0001
9341 +#define V4L2_FBUF_FLAG_OVERLAY         0x0002
9342 +#define V4L2_FBUF_FLAG_CHROMAKEY       0x0004
9343 +
9344 +struct v4l2_clip
9345 +{
9346 +       struct v4l2_rect        c;
9347 +       struct v4l2_clip        *next;
9348 +};
9349 +
9350 +struct v4l2_window
9351 +{
9352 +       struct v4l2_rect        w;
9353 +       enum v4l2_field         field;
9354 +       __u32                   chromakey;
9355 +       struct v4l2_clip        *clips;
9356 +       __u32                   clipcount;
9357 +       void                    *bitmap;
9358 +};
9359 +
9360 +
9361 +/*
9362 + *     C A P T U R E   P A R A M E T E R S
9363 + */
9364 +struct v4l2_captureparm
9365 +{
9366 +       __u32              capability;    /*  Supported modes */
9367 +       __u32              capturemode;   /*  Current mode */
9368 +       struct v4l2_fract  timeperframe;  /*  Time per frame in .1us units */
9369 +       __u32              extendedmode;  /*  Driver-specific extensions */
9370 +       __u32              readbuffers;   /*  # of buffers for read */
9371 +       __u32              reserved[4];
9372 +};
9373 +/*  Flags for 'capability' and 'capturemode' fields */
9374 +#define V4L2_MODE_HIGHQUALITY  0x0001  /*  High quality imaging mode */
9375 +#define V4L2_CAP_TIMEPERFRAME  0x1000  /*  timeperframe field is supported */
9376 +
9377 +struct v4l2_outputparm
9378 +{
9379 +       __u32              capability;   /*  Supported modes */
9380 +       __u32              outputmode;   /*  Current mode */
9381 +       struct v4l2_fract  timeperframe; /*  Time per frame in seconds */
9382 +       __u32              extendedmode; /*  Driver-specific extensions */
9383 +       __u32              writebuffers; /*  # of buffers for write */
9384 +       __u32              reserved[4];
9385 +};
9386 +
9387 +/*
9388 + *     I N P U T   I M A G E   C R O P P I N G
9389 + */
9390 +
9391 +struct v4l2_cropcap {
9392 +       enum v4l2_buf_type      type;
9393 +        struct v4l2_rect        bounds;
9394 +        struct v4l2_rect        defrect;
9395 +        struct v4l2_fract       pixelaspect;
9396 +};
9397 +
9398 +struct v4l2_crop {
9399 +       enum v4l2_buf_type      type;
9400 +       struct v4l2_rect        c;
9401 +};
9402 +
9403 +/*
9404 + *      A N A L O G   V I D E O   S T A N D A R D
9405 + */
9406 +
9407 +typedef __u64 v4l2_std_id;
9408 +
9409 +/* one bit for each */
9410 +#define V4L2_STD_PAL_B          ((v4l2_std_id)0x00000001)
9411 +#define V4L2_STD_PAL_B1         ((v4l2_std_id)0x00000002)
9412 +#define V4L2_STD_PAL_G          ((v4l2_std_id)0x00000004)
9413 +#define V4L2_STD_PAL_H          ((v4l2_std_id)0x00000008)
9414 +#define V4L2_STD_PAL_I          ((v4l2_std_id)0x00000010)
9415 +#define V4L2_STD_PAL_D          ((v4l2_std_id)0x00000020)
9416 +#define V4L2_STD_PAL_D1         ((v4l2_std_id)0x00000040)
9417 +#define V4L2_STD_PAL_K          ((v4l2_std_id)0x00000080)
9418 +
9419 +#define V4L2_STD_PAL_M          ((v4l2_std_id)0x00000100)
9420 +#define V4L2_STD_PAL_N          ((v4l2_std_id)0x00000200)
9421 +#define V4L2_STD_PAL_Nc         ((v4l2_std_id)0x00000400)
9422 +#define V4L2_STD_PAL_60         ((v4l2_std_id)0x00000800)
9423 +
9424 +#define V4L2_STD_NTSC_M         ((v4l2_std_id)0x00001000)
9425 +#define V4L2_STD_NTSC_M_JP      ((v4l2_std_id)0x00002000)
9426 +
9427 +#define V4L2_STD_SECAM_B        ((v4l2_std_id)0x00010000)
9428 +#define V4L2_STD_SECAM_D        ((v4l2_std_id)0x00020000)
9429 +#define V4L2_STD_SECAM_G        ((v4l2_std_id)0x00040000)
9430 +#define V4L2_STD_SECAM_H        ((v4l2_std_id)0x00080000)
9431 +#define V4L2_STD_SECAM_K        ((v4l2_std_id)0x00100000)
9432 +#define V4L2_STD_SECAM_K1       ((v4l2_std_id)0x00200000)
9433 +#define V4L2_STD_SECAM_L        ((v4l2_std_id)0x00400000)
9434 +
9435 +/* ATSC/HDTV */
9436 +#define V4L2_STD_ATSC_8_VSB     ((v4l2_std_id)0x01000000)
9437 +#define V4L2_STD_ATSC_16_VSB    ((v4l2_std_id)0x02000000)
9438 +
9439 +/* some common needed stuff */
9440 +#define V4L2_STD_PAL_BG                (V4L2_STD_PAL_B         |\
9441 +                                V4L2_STD_PAL_B1        |\
9442 +                                V4L2_STD_PAL_G)
9443 +#define V4L2_STD_PAL_DK                (V4L2_STD_PAL_D         |\
9444 +                                V4L2_STD_PAL_D1        |\
9445 +                                V4L2_STD_PAL_K)
9446 +#define V4L2_STD_PAL           (V4L2_STD_PAL_BG        |\
9447 +                                V4L2_STD_PAL_DK        |\
9448 +                                V4L2_STD_PAL_H         |\
9449 +                                V4L2_STD_PAL_I)
9450 +#define V4L2_STD_NTSC           (V4L2_STD_NTSC_M       |\
9451 +                                V4L2_STD_NTSC_M_JP)
9452 +#define V4L2_STD_SECAM         (V4L2_STD_SECAM_B       |\
9453 +                                V4L2_STD_SECAM_D       |\
9454 +                                V4L2_STD_SECAM_G       |\
9455 +                                V4L2_STD_SECAM_H       |\
9456 +                                V4L2_STD_SECAM_K       |\
9457 +                                V4L2_STD_SECAM_K1      |\
9458 +                                V4L2_STD_SECAM_L)
9459 +
9460 +#define V4L2_STD_525_60                (V4L2_STD_PAL_M         |\
9461 +                                V4L2_STD_PAL_60        |\
9462 +                                V4L2_STD_NTSC)
9463 +#define V4L2_STD_625_50                (V4L2_STD_PAL           |\
9464 +                                V4L2_STD_PAL_N         |\
9465 +                                V4L2_STD_PAL_Nc        |\
9466 +                                V4L2_STD_SECAM)
9467 +
9468 +#define V4L2_STD_UNKNOWN        0
9469 +#define V4L2_STD_ALL            (V4L2_STD_525_60       |\
9470 +                                V4L2_STD_625_50)
9471 +
9472 +struct v4l2_standard
9473 +{
9474 +       __u32                index;
9475 +       v4l2_std_id          id;
9476 +       __u8                 name[24];
9477 +       struct v4l2_fract    frameperiod; /* Frames, not fields */
9478 +       __u32                framelines;
9479 +       __u32                reserved[4];
9480 +};
9481 +
9482 +
9483 +/*
9484 + *     V I D E O   I N P U T S
9485 + */
9486 +struct v4l2_input
9487 +{
9488 +       __u32        index;             /*  Which input */
9489 +       __u8         name[32];          /*  Label */
9490 +       __u32        type;              /*  Type of input */
9491 +       __u32        audioset;          /*  Associated audios (bitfield) */
9492 +       __u32        tuner;             /*  Associated tuner */
9493 +       v4l2_std_id  std;
9494 +       __u32        status;
9495 +       __u32        reserved[4];
9496 +};
9497 +/*  Values for the 'type' field */
9498 +#define V4L2_INPUT_TYPE_TUNER          1
9499 +#define V4L2_INPUT_TYPE_CAMERA         2
9500 +
9501 +/* field 'status' - general */
9502 +#define V4L2_IN_ST_NO_POWER    0x00000001  /* Attached device is off */
9503 +#define V4L2_IN_ST_NO_SIGNAL   0x00000002
9504 +#define V4L2_IN_ST_NO_COLOR    0x00000004
9505 +
9506 +/* field 'status' - analog */
9507 +#define V4L2_IN_ST_NO_H_LOCK   0x00000100  /* No horizontal sync lock */
9508 +#define V4L2_IN_ST_COLOR_KILL  0x00000200  /* Color killer is active */
9509 +
9510 +/* field 'status' - digital */
9511 +#define V4L2_IN_ST_NO_SYNC     0x00010000  /* No synchronization lock */
9512 +#define V4L2_IN_ST_NO_EQU      0x00020000  /* No equalizer lock */
9513 +#define V4L2_IN_ST_NO_CARRIER  0x00040000  /* Carrier recovery failed */
9514 +
9515 +/* field 'status' - VCR and set-top box */
9516 +#define V4L2_IN_ST_MACROVISION 0x01000000  /* Macrovision detected */
9517 +#define V4L2_IN_ST_NO_ACCESS   0x02000000  /* Conditional access denied */
9518 +#define V4L2_IN_ST_VTR         0x04000000  /* VTR time constant */
9519 +
9520 +/*
9521 + *     V I D E O   O U T P U T S
9522 + */
9523 +struct v4l2_output
9524 +{
9525 +       __u32        index;             /*  Which output */
9526 +       __u8         name[32];          /*  Label */
9527 +       __u32        type;              /*  Type of output */
9528 +       __u32        audioset;          /*  Associated audios (bitfield) */
9529 +       __u32        modulator;         /*  Associated modulator */
9530 +       v4l2_std_id  std;
9531 +       __u32        reserved[4];
9532 +};
9533 +/*  Values for the 'type' field */
9534 +#define V4L2_OUTPUT_TYPE_MODULATOR             1
9535 +#define V4L2_OUTPUT_TYPE_ANALOG                        2
9536 +#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY      3
9537 +
9538 +/*
9539 + *     C O N T R O L S
9540 + */
9541 +struct v4l2_control
9542 +{
9543 +       __u32                id;
9544 +       __s32                value;
9545 +};
9546 +
9547 +/*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
9548 +struct v4l2_queryctrl
9549 +{
9550 +       __u32                id;
9551 +       enum v4l2_ctrl_type  type;
9552 +       __u8                 name[32];  /* Whatever */
9553 +       __s32                minimum;   /* Note signedness */
9554 +       __s32                maximum;
9555 +       __s32                step;
9556 +       __s32                default_value;
9557 +       __u32                flags;
9558 +       __u32                reserved[2];
9559 +};
9560 +
9561 +/*  Used in the VIDIOC_QUERYMENU ioctl for querying menu items */
9562 +struct v4l2_querymenu
9563 +{
9564 +       __u32           id;
9565 +       __u32           index;
9566 +       __u8            name[32];       /* Whatever */
9567 +       __u32           reserved;
9568 +};
9569 +
9570 +/*  Control flags  */
9571 +#define V4L2_CTRL_FLAG_DISABLED                0x0001
9572 +#define V4L2_CTRL_FLAG_GRABBED         0x0002
9573 +
9574 +/*  Control IDs defined by V4L2 */
9575 +#define V4L2_CID_BASE                  0x00980900
9576 +/*  IDs reserved for driver specific controls */
9577 +#define V4L2_CID_PRIVATE_BASE          0x08000000
9578 +
9579 +#define V4L2_CID_BRIGHTNESS            (V4L2_CID_BASE+0)
9580 +#define V4L2_CID_CONTRAST              (V4L2_CID_BASE+1)
9581 +#define V4L2_CID_SATURATION            (V4L2_CID_BASE+2)
9582 +#define V4L2_CID_HUE                   (V4L2_CID_BASE+3)
9583 +#define V4L2_CID_AUDIO_VOLUME          (V4L2_CID_BASE+5)
9584 +#define V4L2_CID_AUDIO_BALANCE         (V4L2_CID_BASE+6)
9585 +#define V4L2_CID_AUDIO_BASS            (V4L2_CID_BASE+7)
9586 +#define V4L2_CID_AUDIO_TREBLE          (V4L2_CID_BASE+8)
9587 +#define V4L2_CID_AUDIO_MUTE            (V4L2_CID_BASE+9)
9588 +#define V4L2_CID_AUDIO_LOUDNESS                (V4L2_CID_BASE+10)
9589 +#define V4L2_CID_BLACK_LEVEL           (V4L2_CID_BASE+11)
9590 +#define V4L2_CID_AUTO_WHITE_BALANCE    (V4L2_CID_BASE+12)
9591 +#define V4L2_CID_DO_WHITE_BALANCE      (V4L2_CID_BASE+13)
9592 +#define V4L2_CID_RED_BALANCE           (V4L2_CID_BASE+14)
9593 +#define V4L2_CID_BLUE_BALANCE          (V4L2_CID_BASE+15)
9594 +#define V4L2_CID_GAMMA                 (V4L2_CID_BASE+16)
9595 +#define V4L2_CID_WHITENESS             (V4L2_CID_GAMMA) /* ? Not sure */
9596 +#define V4L2_CID_EXPOSURE              (V4L2_CID_BASE+17)
9597 +#define V4L2_CID_AUTOGAIN              (V4L2_CID_BASE+18)
9598 +#define V4L2_CID_GAIN                  (V4L2_CID_BASE+19)
9599 +#define V4L2_CID_HFLIP                 (V4L2_CID_BASE+20)
9600 +#define V4L2_CID_VFLIP                 (V4L2_CID_BASE+21)
9601 +#define V4L2_CID_HCENTER               (V4L2_CID_BASE+22)
9602 +#define V4L2_CID_VCENTER               (V4L2_CID_BASE+23)
9603 +#define V4L2_CID_LASTP1                        (V4L2_CID_BASE+24) /* last CID + 1 */
9604 +
9605 +/*
9606 + *     T U N I N G
9607 + */
9608 +struct v4l2_tuner
9609 +{
9610 +       __u32                   index;
9611 +       __u8                    name[32];
9612 +       enum v4l2_tuner_type    type;
9613 +       __u32                   capability;
9614 +       __u32                   rangelow;
9615 +       __u32                   rangehigh;
9616 +       __u32                   rxsubchans;
9617 +       __u32                   audmode;
9618 +       __s32                   signal;
9619 +       __s32                   afc;
9620 +       __u32                   reserved[4];
9621 +};
9622 +
9623 +struct v4l2_modulator
9624 +{
9625 +       __u32                   index;
9626 +       __u8                    name[32];
9627 +       __u32                   capability;
9628 +       __u32                   rangelow;
9629 +       __u32                   rangehigh;
9630 +       __u32                   txsubchans;
9631 +       __u32                   reserved[4];
9632 +};
9633 +
9634 +/*  Flags for the 'capability' field */
9635 +#define V4L2_TUNER_CAP_LOW             0x0001
9636 +#define V4L2_TUNER_CAP_NORM            0x0002
9637 +#define V4L2_TUNER_CAP_STEREO          0x0010
9638 +#define V4L2_TUNER_CAP_LANG2           0x0020
9639 +#define V4L2_TUNER_CAP_SAP             0x0020
9640 +#define V4L2_TUNER_CAP_LANG1           0x0040
9641 +
9642 +/*  Flags for the 'rxsubchans' field */
9643 +#define V4L2_TUNER_SUB_MONO            0x0001
9644 +#define V4L2_TUNER_SUB_STEREO          0x0002
9645 +#define V4L2_TUNER_SUB_LANG2           0x0004
9646 +#define V4L2_TUNER_SUB_SAP             0x0004
9647 +#define V4L2_TUNER_SUB_LANG1           0x0008
9648 +
9649 +/*  Values for the 'audmode' field */
9650 +#define V4L2_TUNER_MODE_MONO           0x0000
9651 +#define V4L2_TUNER_MODE_STEREO         0x0001
9652 +#define V4L2_TUNER_MODE_LANG2          0x0002
9653 +#define V4L2_TUNER_MODE_SAP            0x0002
9654 +#define V4L2_TUNER_MODE_LANG1          0x0003
9655 +
9656 +struct v4l2_frequency
9657 +{
9658 +       __u32                 tuner;
9659 +       enum v4l2_tuner_type  type;
9660 +        __u32                frequency;
9661 +       __u32                 reserved[8];
9662 +};
9663 +
9664 +/*
9665 + *     A U D I O
9666 + */
9667 +struct v4l2_audio
9668 +{
9669 +       __u32   index;
9670 +       __u8    name[32];
9671 +       __u32   capability;
9672 +       __u32   mode;
9673 +       __u32   reserved[2];
9674 +};
9675 +/*  Flags for the 'capability' field */
9676 +#define V4L2_AUDCAP_STEREO             0x00001
9677 +#define V4L2_AUDCAP_AVL                        0x00002
9678 +
9679 +/*  Flags for the 'mode' field */
9680 +#define V4L2_AUDMODE_AVL               0x00001
9681 +
9682 +struct v4l2_audioout
9683 +{
9684 +       __u32   index;
9685 +       __u8    name[32];
9686 +       __u32   capability;
9687 +       __u32   mode;
9688 +       __u32   reserved[2];
9689 +};
9690 +
9691 +/*
9692 + *     D A T A   S E R V I C E S   ( V B I )
9693 + *
9694 + *     Data services API by Michael Schimek
9695 + */
9696 +
9697 +struct v4l2_vbi_format
9698 +{
9699 +       __u32   sampling_rate;          /* in 1 Hz */
9700 +       __u32   offset;
9701 +       __u32   samples_per_line;
9702 +       __u32   sample_format;          /* V4L2_PIX_FMT_* */
9703 +       __s32   start[2];
9704 +       __u32   count[2];
9705 +       __u32   flags;                  /* V4L2_VBI_* */
9706 +       __u32   reserved[2];            /* must be zero */
9707 +};
9708 +
9709 +/*  VBI flags  */
9710 +#define V4L2_VBI_UNSYNC                (1<< 0)
9711 +#define V4L2_VBI_INTERLACED    (1<< 1)
9712 +
9713 +
9714 +/*
9715 + *     A G G R E G A T E   S T R U C T U R E S
9716 + */
9717 +
9718 +/*     Stream data format
9719 + */
9720 +struct v4l2_format
9721 +{
9722 +       enum v4l2_buf_type type;
9723 +       union
9724 +       {
9725 +               struct v4l2_pix_format  pix;  // V4L2_BUF_TYPE_VIDEO_CAPTURE
9726 +               struct v4l2_window      win;  // V4L2_BUF_TYPE_VIDEO_OVERLAY
9727 +               struct v4l2_vbi_format  vbi;  // V4L2_BUF_TYPE_VBI_CAPTURE
9728 +               __u8    raw_data[200];        // user-defined
9729 +       } fmt;
9730 +};
9731 +
9732 +
9733 +/*     Stream type-dependent parameters
9734 + */
9735 +struct v4l2_streamparm
9736 +{
9737 +       enum v4l2_buf_type type;
9738 +       union
9739 +       {
9740 +               struct v4l2_captureparm capture;
9741 +               struct v4l2_outputparm  output;
9742 +               __u8    raw_data[200];  /* user-defined */
9743 +       } parm;
9744 +};
9745 +
9746 +
9747 +
9748 +/*
9749 + *     I O C T L   C O D E S   F O R   V I D E O   D E V I C E S
9750 + *
9751 + */
9752 +#define VIDIOC_QUERYCAP                _IOR  ('V',  0, struct v4l2_capability)
9753 +#define VIDIOC_RESERVED                _IO   ('V',  1)
9754 +#define VIDIOC_ENUM_FMT         _IOWR ('V',  2, struct v4l2_fmtdesc)
9755 +#define VIDIOC_G_FMT           _IOWR ('V',  4, struct v4l2_format)
9756 +#define VIDIOC_S_FMT           _IOWR ('V',  5, struct v4l2_format)
9757 +#if 0
9758 +#define VIDIOC_G_COMP          _IOR  ('V',  6, struct v4l2_compression)
9759 +#define VIDIOC_S_COMP          _IOW  ('V',  7, struct v4l2_compression)
9760 +#endif
9761 +#define VIDIOC_REQBUFS         _IOWR ('V',  8, struct v4l2_requestbuffers)
9762 +#define VIDIOC_QUERYBUF                _IOWR ('V',  9, struct v4l2_buffer)
9763 +#define VIDIOC_G_FBUF          _IOR  ('V', 10, struct v4l2_framebuffer)
9764 +#define VIDIOC_S_FBUF          _IOW  ('V', 11, struct v4l2_framebuffer)
9765 +#define VIDIOC_OVERLAY         _IOW  ('V', 14, int)
9766 +#define VIDIOC_QBUF            _IOWR ('V', 15, struct v4l2_buffer)
9767 +#define VIDIOC_DQBUF           _IOWR ('V', 17, struct v4l2_buffer)
9768 +#define VIDIOC_STREAMON                _IOW  ('V', 18, int)
9769 +#define VIDIOC_STREAMOFF       _IOW  ('V', 19, int)
9770 +#define VIDIOC_G_PARM          _IOWR ('V', 21, struct v4l2_streamparm)
9771 +#define VIDIOC_S_PARM          _IOWR ('V', 22, struct v4l2_streamparm)
9772 +#define VIDIOC_G_STD           _IOR  ('V', 23, v4l2_std_id)
9773 +#define VIDIOC_S_STD           _IOW  ('V', 24, v4l2_std_id)
9774 +#define VIDIOC_ENUMSTD         _IOWR ('V', 25, struct v4l2_standard)
9775 +#define VIDIOC_ENUMINPUT       _IOWR ('V', 26, struct v4l2_input)
9776 +#define VIDIOC_G_CTRL          _IOWR ('V', 27, struct v4l2_control)
9777 +#define VIDIOC_S_CTRL          _IOWR ('V', 28, struct v4l2_control)
9778 +#define VIDIOC_G_TUNER         _IOWR ('V', 29, struct v4l2_tuner)
9779 +#define VIDIOC_S_TUNER         _IOW  ('V', 30, struct v4l2_tuner)
9780 +#define VIDIOC_G_AUDIO         _IOR  ('V', 33, struct v4l2_audio)
9781 +#define VIDIOC_S_AUDIO         _IOW  ('V', 34, struct v4l2_audio)
9782 +#define VIDIOC_QUERYCTRL       _IOWR ('V', 36, struct v4l2_queryctrl)
9783 +#define VIDIOC_QUERYMENU       _IOWR ('V', 37, struct v4l2_querymenu)
9784 +#define VIDIOC_G_INPUT         _IOR  ('V', 38, int)
9785 +#define VIDIOC_S_INPUT         _IOWR ('V', 39, int)
9786 +#define VIDIOC_G_OUTPUT                _IOR  ('V', 46, int)
9787 +#define VIDIOC_S_OUTPUT                _IOWR ('V', 47, int)
9788 +#define VIDIOC_ENUMOUTPUT      _IOWR ('V', 48, struct v4l2_output)
9789 +#define VIDIOC_G_AUDOUT                _IOR  ('V', 49, struct v4l2_audioout)
9790 +#define VIDIOC_S_AUDOUT                _IOW  ('V', 50, struct v4l2_audioout)
9791 +#define VIDIOC_G_MODULATOR     _IOWR ('V', 54, struct v4l2_modulator)
9792 +#define VIDIOC_S_MODULATOR     _IOW  ('V', 55, struct v4l2_modulator)
9793 +#define VIDIOC_G_FREQUENCY     _IOWR ('V', 56, struct v4l2_frequency)
9794 +#define VIDIOC_S_FREQUENCY     _IOW  ('V', 57, struct v4l2_frequency)
9795 +#define VIDIOC_CROPCAP         _IOR  ('V', 58, struct v4l2_cropcap)
9796 +#define VIDIOC_G_CROP          _IOWR ('V', 59, struct v4l2_crop)
9797 +#define VIDIOC_S_CROP          _IOW  ('V', 60, struct v4l2_crop)
9798 +#define VIDIOC_G_JPEGCOMP      _IOR  ('V', 61, struct v4l2_jpegcompression)
9799 +#define VIDIOC_S_JPEGCOMP      _IOW  ('V', 62, struct v4l2_jpegcompression)
9800 +#define VIDIOC_QUERYSTD        _IOR  ('V', 63, v4l2_std_id)
9801 +#define VIDIOC_TRY_FMT         _IOWR ('V', 64, struct v4l2_format)
9802 +#define VIDIOC_ENUMAUDIO       _IOWR ('V', 65, struct v4l2_audio)
9803 +#define VIDIOC_ENUMAUDOUT      _IOWR ('V', 66, struct v4l2_audioout)
9804 +#define VIDIOC_G_PRIORITY       _IOR  ('V', 67, enum v4l2_priority)
9805 +#define VIDIOC_S_PRIORITY       _IOW  ('V', 68, enum v4l2_priority)
9806 +
9807 +/* for compatibility, will go away some day */
9808 +#define VIDIOC_OVERLAY_OLD             _IOWR ('V', 14, int)
9809 +#define VIDIOC_S_PARM_OLD              _IOW  ('V', 22, struct v4l2_streamparm)
9810 +#define VIDIOC_S_CTRL_OLD              _IOW  ('V', 28, struct v4l2_control)
9811 +#define VIDIOC_G_AUDIO_OLD             _IOWR ('V', 33, struct v4l2_audio)
9812 +#define VIDIOC_G_AUDOUT_OLD            _IOWR ('V', 49, struct v4l2_audioout)
9813 +
9814 +#define BASE_VIDIOC_PRIVATE    192             /* 192-255 are private */
9815 +
9816 +
9817 +#ifdef __KERNEL__
9818 +/*
9819 + *
9820 + *     V 4 L 2   D R I V E R   H E L P E R   A P I
9821 + *
9822 + *     Some commonly needed functions for drivers (v4l2-common.o module)
9823 + */
9824 +#include <linux/fs.h>
9825 +
9826 +/*  Video standard functions  */
9827 +extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs);
9828 +extern int v4l2_video_std_construct(struct v4l2_standard *vs,
9829 +                                   int id, char *name);
9830 +
9831 +/* prority handling */
9832 +struct v4l2_prio_state {
9833 +       atomic_t prios[4];
9834 +};
9835 +int v4l2_prio_init(struct v4l2_prio_state *global);
9836 +int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local,
9837 +                    enum v4l2_priority new);
9838 +int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local);
9839 +int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local);
9840 +enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global);
9841 +int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local);
9842 +
9843 +/* names for fancy debug output */
9844 +extern char *v4l2_field_names[];
9845 +extern char *v4l2_type_names[];
9846 +extern char *v4l2_ioctl_names[];
9847 +
9848 +/*  Compatibility layer interface  --  v4l1-compat module */
9849 +typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file,
9850 +                          unsigned int cmd, void *arg);
9851 +int v4l_compat_translate_ioctl(struct inode *inode, struct file *file,
9852 +                              int cmd, void *arg, v4l2_kioctl driver_ioctl);
9853 +
9854 +#endif /* __KERNEL__ */
9855 +#endif /* __LINUX_VIDEODEV2_H */
9856 +
9857 +/*
9858 + * Local variables:
9859 + * c-basic-offset: 8
9860 + * End:
9861 + */
9862 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.c
9863 ===================================================================
9864 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
9865 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.c      2008-12-11 22:46:49.000000000 +0100
9866 @@ -0,0 +1,332 @@
9867 +/*
9868 + * Video capture interface for Linux Character Device Driver.
9869 + *              based on
9870 + *              Alan Cox, <alan@redhat.com> video4linux
9871 + *
9872 + * Author:      SW.LEE <hitchcar@samsung.com>
9873 + *              2004 (C) Samsung Electronics
9874 + *              Modified for S3C2440/S3C24A0 Interface
9875 + *
9876 + * This file is released under the GPLv2
9877 + */
9878 +
9879 +
9880 +#include <linux/module.h>
9881 +#include <linux/types.h>
9882 +#include <linux/kernel.h>
9883 +#include <linux/sched.h>
9884 +#include <linux/smp_lock.h>
9885 +#include <linux/mm.h>
9886 +#include <linux/string.h>
9887 +#include <linux/errno.h>
9888 +#include <linux/init.h>
9889 +#include <linux/kmod.h>
9890 +#include <linux/slab.h>
9891 +/* #include <linux/devfs_fs_kernel.h> */
9892 +#include <linux/miscdevice.h>
9893 +#include <asm/uaccess.h>
9894 +#include <asm/system.h>
9895 +#include <asm/semaphore.h>
9896 +
9897 +
9898 +
9899 +#define CONFIG_VIDEO_V4L1_COMPAT
9900 +#include <linux/videodev.h>
9901 +#include "camif.h"
9902 +#include "miscdevice.h"
9903 +
9904 +
9905 +static DECLARE_MUTEX(videodev_lock);
9906 +
9907 +const char *fimc_version = "$Id: videodev.c,v 1.1.1.1 2004/04/27 03:52:50 swlee Exp $";
9908 +
9909 +#define VIDEO_NAME              "video4linux"
9910 +
9911 +
9912 +#define VIDEO_NUM_DEVICES      2
9913 +static struct video_device *video_device[VIDEO_NUM_DEVICES];
9914 +
9915 +static inline struct video_device * get_vd(int nr)
9916 +{
9917 +       if ( nr == CODEC_MINOR)
9918 +               return video_device[0];
9919 +       else {
9920 +               assert ( nr & PREVIEW_MINOR);
9921 +               return video_device[1];
9922 +       }
9923 +}
9924 +
9925 +static inline void set_vd ( struct video_device * vd, int nr)
9926 +{
9927 +       if ( nr == CODEC_MINOR)
9928 +               video_device[0] = vd;
9929 +       else {
9930 +               assert ( nr & PREVIEW_MINOR);
9931 +               video_device[1] = vd;
9932 +       }
9933 +}
9934 +
9935 +static inline int video_release(struct inode *inode, struct file *f)
9936 +{
9937 +       int minor = MINOR(inode->i_rdev);
9938 +       struct video_device *vfd;
9939 +
9940 +       vfd = get_vd(minor);
9941 +#if 1 /* needed until all drivers are fixed */
9942 +       if (!vfd->release)
9943 +               return 0;
9944 +#endif
9945 +       vfd->release(vfd);
9946 +       return 0;
9947 +}
9948 +
9949 +struct video_device* video_devdata(struct file *file)
9950 +{
9951 +       return video_device[iminor(file->f_dentry->d_inode)];
9952 +}
9953 +
9954 +
9955 +/*
9956 + *     Open a video device.
9957 + */
9958 +static int video_open(struct inode *inode, struct file *file)
9959 +{
9960 +       int minor = MINOR(inode->i_rdev);
9961 +       int err = 0;
9962 +       struct video_device *vfl;
9963 +       struct file_operations const *old_fops;
9964 +
9965 +       down(&videodev_lock);
9966 +
9967 +       vfl = get_vd(minor);
9968 +
9969 +       old_fops = file->f_op;
9970 +       file->f_op = fops_get(vfl->fops);
9971 +       if(file->f_op->open)
9972 +               err = file->f_op->open(inode,file);
9973 +       if (err) {
9974 +               fops_put(file->f_op);
9975 +               file->f_op = fops_get(old_fops);
9976 +       }
9977 +       fops_put(old_fops);
9978 +       up(&videodev_lock);
9979 +       return err;
9980 +}
9981 +
9982 +/*
9983 + * open/release helper functions -- handle exclusive opens
9984 + */
9985 +extern int video_exclusive_open(struct inode *inode, struct file *file)
9986 +{
9987 +       struct  video_device *vfl = get_vd(MINOR(inode->i_rdev));
9988 +       int retval = 0;
9989 +
9990 +       mutex_lock(&vfl->lock);
9991 +       if (vfl->users) {
9992 +               retval = -EBUSY;
9993 +       } else {
9994 +               vfl->users++;
9995 +       }
9996 +       mutex_unlock(&vfl->lock);
9997 +       return retval;
9998 +}
9999 +
10000 +extern int video_exclusive_release(struct inode *inode, struct file *file)
10001 +{
10002 +       struct  video_device *vfl = get_vd(MINOR(inode->i_rdev));
10003 +       vfl->users--;
10004 +       return 0;
10005 +}
10006 +
10007 +int
10008 +video_usercopy(struct inode *inode, struct file *file,
10009 +              unsigned int cmd, unsigned long arg,
10010 +              int (*func)(struct inode *inode, struct file *file,
10011 +                          unsigned int cmd, void *arg))
10012 +{
10013 +       char    sbuf[128];
10014 +       void    *mbuf = NULL;
10015 +       void    *parg = NULL;
10016 +       int     err  = -EINVAL;
10017 +
10018 +       //      cmd = video_fix_command(cmd);
10019 +
10020 +       /*  Copy arguments into temp kernel buffer  */
10021 +       switch (_IOC_DIR(cmd)) {
10022 +       case _IOC_NONE:
10023 +               parg = (void *)arg;
10024 +               break;
10025 +       case _IOC_READ:
10026 +       case _IOC_WRITE:
10027 +       case (_IOC_WRITE | _IOC_READ):
10028 +               if (_IOC_SIZE(cmd) <= sizeof(sbuf)) {
10029 +                       parg = sbuf;
10030 +               } else {
10031 +                       /* too big to allocate from stack */
10032 +                       mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL);
10033 +                       if (NULL == mbuf)
10034 +                               return -ENOMEM;
10035 +                       parg = mbuf;
10036 +               }
10037 +
10038 +               err = -EFAULT;
10039 +               if (_IOC_DIR(cmd) & _IOC_WRITE)
10040 +                       if (copy_from_user(parg, (void *)arg, _IOC_SIZE(cmd)))
10041 +                               goto out;
10042 +               break;
10043 +       }
10044 +
10045 +       /* call driver */
10046 +       err = func(inode, file, cmd, parg);
10047 +       if (err == -ENOIOCTLCMD)
10048 +               err = -EINVAL;
10049 +       if (err < 0)
10050 +               goto out;
10051 +
10052 +       /*  Copy results into user buffer  */
10053 +       switch (_IOC_DIR(cmd))
10054 +       {
10055 +       case _IOC_READ:
10056 +       case (_IOC_WRITE | _IOC_READ):
10057 +               if (copy_to_user((void *)arg, parg, _IOC_SIZE(cmd)))
10058 +                       err = -EFAULT;
10059 +               break;
10060 +       }
10061 +
10062 +out:
10063 +       if (mbuf)
10064 +               kfree(mbuf);
10065 +       return err;
10066 +}
10067 +
10068 +
10069 +static struct file_operations video_fops=
10070 +{
10071 +       .owner          = THIS_MODULE,
10072 +       .llseek         = no_llseek,
10073 +       .open           = video_open,
10074 +       .release        = video_release,
10075 +};
10076 +
10077 +static struct miscdevice codec_dev = {
10078 +       minor: CODEC_MINOR,
10079 +       name : "codec",
10080 +       fops : &video_fops
10081 +};
10082 +
10083 +static struct miscdevice preview_dev = {
10084 +       minor: PREVIEW_MINOR,
10085 +       name : "preview",
10086 +       fops : &video_fops
10087 +};
10088 +
10089 +
10090 +/**
10091 + *     video_register_device - register video4linux devices
10092 + *     @vfd:  video device structure we want to register
10093 + *     @type: type of device to register
10094 + *     @nr:   minor number
10095 + *
10096 + *     Zero is returned on success.
10097 + *      type : ignored.
10098 + *      nr :
10099 + *           0 Codec index
10100 + *           1 Preview index
10101 + */
10102 +int video_register_device(struct video_device *vfd, int type, int nr)
10103 +{
10104 +       int ret=0;
10105 +
10106 +       /* pick a minor number */
10107 +       down(&videodev_lock);
10108 +       set_vd (vfd, nr);
10109 +       vfd->minor=nr;
10110 +       up(&videodev_lock);
10111 +
10112 +       switch (vfd->minor) {
10113 +               case CODEC_MINOR:
10114 +                       ret = misc_register(&codec_dev);
10115 +                       if (ret) {
10116 +                               printk(KERN_ERR
10117 +                                               "can't misc_register : codec on minor=%d\n", CODEC_MINOR);
10118 +                               panic(" Give me misc codec \n");
10119 +                       }
10120 +                       break;
10121 +               case PREVIEW_MINOR:
10122 +                       ret = misc_register(&preview_dev);
10123 +                       if (ret) {
10124 +                               printk(KERN_ERR
10125 +                                               "can't misc_register (preview) on minor=%d\n", PREVIEW_MINOR);
10126 +                               panic(" Give me misc codec \n");
10127 +                       }
10128 +                       break;
10129 +       }
10130 +
10131 +#if 0 /* needed until all drivers are fixed */
10132 +       if (!vfd->release)
10133 +               printk(KERN_WARNING "videodev: \"%s\" has no release callback. "
10134 +                               "Please fix your driver for proper sysfs support, see "
10135 +                               "http://lwn.net/Articles/36850/\n", vfd->name);
10136 +#endif
10137 +       return 0;
10138 +}
10139 +
10140 +/**
10141 + *     video_unregister_device - unregister a video4linux device
10142 + *     @vfd: the device to unregister
10143 + *
10144 + *     This unregisters the passed device and deassigns the minor
10145 + *     number. Future open calls will be met with errors.
10146 + */
10147 +
10148 +void video_unregister_device(struct video_device *vfd)
10149 +{
10150 +       down(&videodev_lock);
10151 +
10152 +       if(get_vd(vfd->minor)!=vfd)
10153 +               panic("videodev: bad unregister");
10154 +
10155 +       if (vfd->minor== CODEC_MINOR)
10156 +               misc_deregister(&codec_dev);
10157 +       else
10158 +               misc_deregister(&preview_dev);
10159 +       set_vd (NULL, vfd->minor);
10160 +       up(&videodev_lock);
10161 +}
10162 +
10163 +
10164 +/*
10165 + *     Initialise video for linux
10166 + */
10167 +
10168 +static int __init videodev_init(void)
10169 +{
10170 +//     printk(KERN_INFO "FIMC2.0 Built:"__DATE__" "__TIME__"\n%s\n",fimc_version);
10171 +       return 0;
10172 +}
10173 +
10174 +static void __exit videodev_exit(void)
10175 +{
10176 +}
10177 +
10178 +module_init(videodev_init)
10179 +module_exit(videodev_exit)
10180 +
10181 +EXPORT_SYMBOL(video_register_device);
10182 +EXPORT_SYMBOL(fimc_version);
10183 +EXPORT_SYMBOL(video_unregister_device);
10184 +EXPORT_SYMBOL(video_usercopy);
10185 +EXPORT_SYMBOL(video_exclusive_open);
10186 +EXPORT_SYMBOL(video_exclusive_release);
10187 +
10188 +
10189 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
10190 +MODULE_DESCRIPTION("VideoDev For FIMC2.0 MISC Drivers");
10191 +MODULE_LICENSE("GPL");
10192 +
10193 +
10194 +/*
10195 + * Local variables:
10196 + * c-basic-offset: 8
10197 + * End:
10198 + */
10199 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.h
10200 ===================================================================
10201 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
10202 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/videodev.h      2008-12-11 22:46:49.000000000 +0100
10203 @@ -0,0 +1,108 @@
10204 +//#ifndef __LINUX_S3C_VIDEODEV_H
10205 +//#define __LINUX_S3C_VIDEODEV_H
10206 +
10207 +#include <linux/types.h>
10208 +#include <linux/version.h>
10209 +#include <media/v4l2-dev.h>
10210 +
10211 +#if 0
10212 +struct video_device
10213 +{
10214 +       /* device info */
10215 +       //      struct device *dev;
10216 +       char name[32];
10217 +       int type;       /* v4l1 */
10218 +       int type2;      /* v4l2 */
10219 +       int hardware;
10220 +       int minor;
10221 +
10222 +       /* device ops + callbacks */
10223 +       struct file_operations *fops;
10224 +       void (*release)(struct video_device *vfd);
10225 +
10226 +
10227 +#if 1 /* to be removed in 2.7.x */
10228 +       /* obsolete -- fops->owner is used instead */
10229 +       struct module *owner;
10230 +       /* dev->driver_data will be used instead some day.
10231 +        * Use the video_{get|set}_drvdata() helper functions,
10232 +        * so the switch over will be transparent for you.
10233 +        * Or use {pci|usb}_{get|set}_drvdata() directly. */
10234 +       void *priv;
10235 +#endif
10236 +
10237 +       /* for videodev.c intenal usage -- please don't touch */
10238 +       int users;                     /* video_exclusive_{open|close} ... */
10239 +       struct semaphore lock;         /* ... helper function uses these   */
10240 +       char devfs_name[64];           /* devfs */
10241 +       //      struct class_device class_dev; /* sysfs */
10242 +};
10243 +
10244 +#define VIDEO_MAJOR    81
10245 +
10246 +#define VFL_TYPE_GRABBER       0
10247 +
10248 +
10249 +extern int video_register_device(struct video_device *, int type, int nr);
10250 +extern void video_unregister_device(struct video_device *);
10251 +extern struct video_device* video_devdata(struct file*);
10252 +
10253 +
10254 +
10255 +struct video_picture
10256 +{
10257 +        __u16   brightness;
10258 +        __u16   hue;
10259 +        __u16   colour;
10260 +        __u16   contrast;
10261 +        __u16   whiteness;      /* Black and white only */
10262 +        __u16   depth;          /* Capture depth */
10263 +        __u16   palette;        /* Palette in use */
10264 +#define VIDEO_PALETTE_GREY      1       /* Linear greyscale */
10265 +#define VIDEO_PALETTE_HI240     2       /* High 240 cube (BT848) */
10266 +#define VIDEO_PALETTE_RGB565    3       /* 565 16 bit RGB */
10267 +#define VIDEO_PALETTE_RGB24     4       /* 24bit RGB */
10268 +#define VIDEO_PALETTE_RGB32     5       /* 32bit RGB */
10269 +#define VIDEO_PALETTE_RGB555    6       /* 555 15bit RGB */
10270 +#define VIDEO_PALETTE_YUV422    7       /* YUV422 capture */
10271 +#define VIDEO_PALETTE_YUYV      8
10272 +#define VIDEO_PALETTE_UYVY      9       /* The great thing about standards is ... */
10273 +#define VIDEO_PALETTE_YUV420    10
10274 +#define VIDEO_PALETTE_YUV411    11      /* YUV411 capture */
10275 +#define VIDEO_PALETTE_RAW       12      /* RAW capture (BT848) */
10276 +#define VIDEO_PALETTE_YUV422P   13      /* YUV 4:2:2 Planar */
10277 +#define VIDEO_PALETTE_YUV411P   14      /* YUV 4:1:1 Planar */
10278 +#define VIDEO_PALETTE_YUV420P   15      /* YUV 4:2:0 Planar */
10279 +#define VIDEO_PALETTE_YUV410P   16      /* YUV 4:1:0 Planar */
10280 +#define VIDEO_PALETTE_PLANAR    13      /* start of planar entries */
10281 +#define VIDEO_PALETTE_COMPONENT 7       /* start of component entries */
10282 +};
10283 +
10284 +extern int video_exclusive_open(struct inode *inode, struct file *file);
10285 +extern int video_exclusive_release(struct inode *inode, struct file *file);
10286 +extern int video_usercopy(struct inode *inode, struct file *file,
10287 +                          unsigned int cmd, unsigned long arg,
10288 +                          int (*func)(struct inode *inode, struct file *file,
10289 +                                      unsigned int cmd, void *arg));
10290 +
10291 +
10292 +
10293 +
10294 +#define VID_TYPE_CAPTURE        1       /* Can capture */
10295 +#define VID_TYPE_CLIPPING       32      /* Can clip */
10296 +#define VID_TYPE_FRAMERAM       64      /* Uses the frame buffer memory */
10297 +#define VID_TYPE_SCALES         128     /* Scalable */
10298 +#define VID_TYPE_SUBCAPTURE     512     /* Can capture subareas of the image */
10299 +
10300 +
10301 +
10302 +#endif
10303 +//#endif
10304 +
10305 +#define VID_HARDWARE_SAMSUNG_FIMC  255
10306 +
10307 +/*
10308 + * Local variables:
10309 + * c-basic-offset: 8
10310 + * End:
10311 + */
10312 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/camera/video-driver.c
10313 ===================================================================
10314 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
10315 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/camera/video-driver.c  2008-12-11 22:46:49.000000000 +0100
10316 @@ -0,0 +1,624 @@
10317 +/*
10318 +    Copyright (C) 2004 Samsung Electronics
10319 +                     SW.LEE <hitchcar@sec.samsung.com>
10320 +    This program is free software; you can redistribute it and/or modify
10321 +    it under the terms of the GNU General Public License as published by
10322 +    the Free Software Foundation; either version 2 of the License, or
10323 +    (at your option) any later version.
10324 +*/
10325 +
10326 +#include <linux/version.h>
10327 +#include <linux/module.h>
10328 +#include <linux/delay.h>
10329 +#include <linux/errno.h>
10330 +#include <linux/fs.h>
10331 +#include <linux/kernel.h>
10332 +#include <linux/major.h>
10333 +#include <linux/slab.h>
10334 +#include <linux/poll.h>
10335 +#include <linux/signal.h>
10336 +#include <linux/ioport.h>
10337 +#include <linux/sched.h>
10338 +#include <linux/types.h>
10339 +#include <linux/interrupt.h>
10340 +#include <linux/kmod.h>
10341 +#include <linux/vmalloc.h>
10342 +#include <linux/init.h>
10343 +#include <asm/io.h>
10344 +#include <asm/page.h>
10345 +#include <asm/irq.h>
10346 +#include <asm/semaphore.h>
10347 +#include <linux/miscdevice.h>
10348 +#include <asm/arch/irqs.h>
10349 +
10350 +//#define SW_DEBUG
10351 +#define CONFIG_VIDEO_V4L1_COMPAT
10352 +#include <linux/videodev.h>
10353 +#include "camif.h"
10354 +#include "miscdevice.h"
10355 +#include "cam_reg.h"
10356 +#include "sensor.h"
10357 +#include "userapp.h"
10358 +
10359 +#ifdef Z_API
10360 +#include "qt.h"
10361 +#endif
10362 +
10363 +/* Codec and Preview */
10364 +#define CAMIF_NUM  2
10365 +static camif_cfg_t  fimc[CAMIF_NUM];
10366 +u32 *camregs;
10367 +
10368 +static const char *driver_version =
10369 +       "$Id: video-driver.c,v 1.9 2004/06/02 03:10:36 swlee Exp $";
10370 +extern const char *fimc_version;
10371 +extern const char *fsm_version;
10372 +
10373 +extern void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other);
10374 +
10375 +camif_cfg_t * get_camif(int nr)
10376 +{
10377 +       camif_cfg_t *ret = NULL;
10378 +       switch(nr) {
10379 +       case CODEC_MINOR:
10380 +               ret = &fimc[0];
10381 +               break;
10382 +       case PREVIEW_MINOR:
10383 +               ret = &fimc[1];
10384 +               break;
10385 +       default:
10386 +               panic("Unknow Minor Number \n");
10387 +       }
10388 +       return ret;
10389 +}
10390 +
10391 +
10392 +static int camif_codec_start(camif_cfg_t *cfg)
10393 +{
10394 +       int  ret = 0;
10395 +       ret =camif_check_preview(cfg);
10396 +       switch(ret) {
10397 +       case 0:                 /* Play alone */
10398 +               DPRINTK("Start Alone \n");
10399 +               camif_4fsm_start(cfg);
10400 +               cfg->gc->status |= C_WORKING;
10401 +               break;
10402 +       case -ERESTARTSYS:       /* Busy , retry */
10403 +               //DPRINTK("Error \n");
10404 +               printk("Error \n");
10405 +               break;
10406 +       case 1:
10407 +               DPRINTK("need callback \n");
10408 +               ret = camif_callback_start(cfg);
10409 +               if(ret < 0 ) {
10410 +                       printk(KERN_INFO "Busy RESTART \n");
10411 +                       return ret; /* Busy, retry */
10412 +               }
10413 +               break;
10414 +       }
10415 +       return ret;
10416 +}
10417 +
10418 +
10419 +ssize_t camif_write (struct file *f, const char *b, size_t c,loff_t *offset)
10420 +{
10421 +       camif_cfg_t *cfg;
10422 +
10423 +       c = 0;                  /* return value */
10424 +       DPRINTK("\n");
10425 +       cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev));
10426 +       switch (*b) {
10427 +               case 'O':
10428 +                       if (cfg->dma_type & CAMIF_PREVIEW) {
10429 +                               if (cfg->gc->status & C_WORKING) {
10430 +                                       camif_start_c_with_p(cfg,get_camif(CODEC_MINOR));
10431 +                               }
10432 +                               else  {
10433 +                                       camif_4fsm_start(cfg);
10434 +                               }
10435 +                       }
10436 +                       else{
10437 +                               c = camif_codec_start(cfg);
10438 +                               if(c < 0) c = 1; /* Error and neet to retry */
10439 +                       }
10440 +
10441 +                       break;
10442 +               case 'X':
10443 +                       camif_p_stop(cfg);
10444 +                       break;
10445 +               default:
10446 +                       panic("CAMERA:camif_write: Unexpected Param\n");
10447 +       }
10448 +       DPRINTK("end\n");
10449 +
10450 +       return c;
10451 +}
10452 +
10453 +
10454 +ssize_t camif_p_read(struct file *file, char *buf, size_t count, loff_t *pos)
10455 +{
10456 +       camif_cfg_t *cfg = NULL;
10457 +       size_t end;
10458 +
10459 +       cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
10460 +       cfg->status = CAMIF_STARTED;
10461 +
10462 +       if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
10463 +               return -ERESTARTSYS;
10464 +
10465 +       cfg->status = CAMIF_STOPPED;
10466 +       end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
10467 +       if (copy_to_user(buf, camif_g_frame(cfg), end))
10468 +               return -EFAULT;
10469 +
10470 +       return end;
10471 +}
10472 +
10473 +
10474 +static ssize_t
10475 +camif_c_read(struct file *file, char *buf, size_t count, loff_t *pos)
10476 +{
10477 +       camif_cfg_t *cfg = NULL;
10478 +       size_t end;
10479 +
10480 +       /* cfg = file->private_data; */
10481 +       cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev));
10482 +#if 0
10483 +       if(file->f_flags & O_NONBLOCK) {
10484 +               printk(KERN_ERR"Don't Support NON_BLOCK \n");
10485 +       }
10486 +#endif
10487 +
10488 +      /* Change the below wait_event_interruptible func */
10489 +       if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN))
10490 +              return -ERESTARTSYS;
10491 +       cfg->status = CAMIF_STOPPED;
10492 +       end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count);
10493 +       if (copy_to_user(buf, camif_g_frame(cfg), end))
10494 +              return -EFAULT;
10495 +       return end;
10496 +}
10497 +
10498 +
10499 +static irqreturn_t camif_c_irq(int irq, void *dev_id)
10500 +{
10501 +        camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
10502 +
10503 +       DPRINTK("\n");
10504 +       camif_g_fifo_status(cfg);
10505 +       camif_g_frame_num(cfg);
10506 +       if(camif_enter_c_4fsm(cfg) != INSTANT_SKIP)
10507 +               wake_up_interruptible(&cfg->waitq);
10508 +
10509 +       return IRQ_HANDLED;
10510 +}
10511 +
10512 +static irqreturn_t camif_p_irq(int irq, void *dev_id)
10513 +{
10514 +        camif_cfg_t *cfg = (camif_cfg_t *)dev_id;
10515 +
10516 +       DPRINTK("\n");
10517 +       camif_g_fifo_status(cfg);
10518 +       camif_g_frame_num(cfg);
10519 +       if(camif_enter_p_4fsm(cfg) != INSTANT_SKIP)
10520 +               wake_up_interruptible(&cfg->waitq);
10521 +#if 0
10522 +       if( (cfg->perf.frames % 5) == 0)
10523 +               DPRINTK("5\n");
10524 +#endif
10525 +
10526 +       return IRQ_HANDLED;
10527 +}
10528 +
10529 +static void camif_release_irq(camif_cfg_t *cfg)
10530 +{
10531 +       disable_irq(cfg->irq);
10532 +       free_irq(cfg->irq, cfg);
10533 +}
10534 +
10535 +static int camif_irq_request(camif_cfg_t *cfg)
10536 +{
10537 +       int ret = 0;
10538 +
10539 +       if (cfg->dma_type & CAMIF_CODEC) {
10540 +               if ((ret = request_irq(cfg->irq, camif_c_irq,
10541 +                              0, cfg->shortname, cfg))) {
10542 +                       printk("request_irq(CAM_C) failed.\n");
10543 +               }
10544 +       }
10545 +       if (cfg->dma_type & CAMIF_PREVIEW) {
10546 +               if ((ret = request_irq(cfg->irq, camif_p_irq,
10547 +                              0, cfg->shortname, cfg))) {
10548 +                       printk("request_irq(CAM_P) failed.\n");
10549 +               }
10550 +       }
10551 +       return 0;
10552 +}
10553 +
10554 +static void camif_init_sensor(camif_cfg_t *cfg)
10555 +{
10556 +       camif_gc_t *gc =  cfg->gc;
10557 +       if (!gc->sensor)
10558 +               panic("CAMERA:I2C Client(Img Sensor)Not registered\n");
10559 +       if(!gc->init_sensor) {
10560 +               camif_reset(gc->reset_type, gc->reset_udelay);
10561 +               gc->sensor->driver->command(gc->sensor,SENSOR_INIT,NULL);
10562 +               gc->init_sensor = 1; /*sensor init done */
10563 +       }
10564 +       gc->sensor->driver->command(gc->sensor, USER_ADD, NULL);
10565 +}
10566 +
10567 +static int camif_open(struct inode *inode, struct file *file)
10568 +{
10569 +       int err;
10570 +       camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
10571 +
10572 +       if(cfg->dma_type & CAMIF_PREVIEW) {
10573 +               if(down_interruptible(&cfg->gc->lock))
10574 +                       return -ERESTARTSYS;
10575 +               if (cfg->dma_type & CAMIF_PREVIEW) {
10576 +                       cfg->gc->status &= ~PNOTWORKING;
10577 +               }
10578 +               up(&cfg->gc->lock);
10579 +       }
10580 +       err = video_exclusive_open(inode,file);
10581 +       cfg->gc->user++;
10582 +       cfg->status = CAMIF_STOPPED;
10583 +       if (err < 0)  return err;
10584 +       if (file->f_flags & O_NONCAP ) {
10585 +               printk("Don't Support Non-capturing open \n");
10586 +               return 0;
10587 +       }
10588 +       file->private_data = cfg;
10589 +       camif_irq_request(cfg);
10590 +       camif_init_sensor(cfg);
10591 +       return 0;
10592 +}
10593 +
10594 +#if 0
10595 +static void print_pregs(void)
10596 +{
10597 +       printk(" CISRCFMT 0x%08X  \n", CISRCFMT);
10598 +       printk(" CIWDOFST 0x%08X  \n", CIWDOFST);
10599 +       printk(" CIGCTRL  0x%08X  \n", CIGCTRL);
10600 +       printk(" CIPRTRGFMT 0x%08X  \n", CIPRTRGFMT);
10601 +       printk(" CIPRCTRL 0x%08X  \n", CIPRCTRL);
10602 +       printk(" CIPRSCPRERATIO 0x%08X  \n", CIPRSCPRERATIO);
10603 +       printk(" CIPRSCPREDST 0x%08X  \n", CIPRSCPREDST);
10604 +       printk(" CIPRSCCTRL 0x%08X  \n", CIPRSCCTRL);
10605 +       printk(" CIPRTAREA 0x%08X  \n", CIPRTAREA);
10606 +       printk(" CIPRSTATUS 0x%08X  \n", CIPRSTATUS);
10607 +       printk(" CIIMGCPT 0x%08X  \n", CIIMGCPT);
10608 +}
10609 +
10610 +static void print_cregs(void)
10611 +{
10612 +       printk(" CISRCFMT 0x%08X  \n", CISRCFMT);
10613 +       printk(" CIWDOFST 0x%08X  \n", CIWDOFST);
10614 +       printk(" CIGCTRL  0x%08X  \n", CIGCTRL);
10615 +       printk(" CICOCTRL 0x%8X   \n", CICOCTRL);
10616 +       printk(" CICOSCPRERATIO 0x%08X  \n", CICOSCPRERATIO);
10617 +       printk(" CICOSCPREDST 0x%08X  \n", CICOSCPREDST);
10618 +       printk(" CICOSCCTRL 0x%08X  \n", CICOSCCTRL);
10619 +       printk(" CICOTAREA 0x%08X  \n", CICOTAREA);
10620 +       printk(" CICOSTATUS 0x%8X \n", CICOSTATUS);
10621 +       printk(" CIIMGCPT 0x%08X  \n", CIIMGCPT);
10622 +}
10623 +#endif
10624 +
10625 +
10626 +static int camif_release(struct inode *inode, struct file *file)
10627 +{
10628 +       camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev));
10629 +
10630 +       //DPRINTK(" cfg->status 0x%0X cfg->gc->status 0x%0X \n", cfg->status,cfg->gc->status );
10631 +       if (cfg->dma_type & CAMIF_PREVIEW) {
10632 +               if(down_interruptible(&cfg->gc->lock))
10633 +                       return -ERESTARTSYS;
10634 +               cfg->gc->status &= ~PWANT2START;
10635 +               cfg->gc->status |= PNOTWORKING;
10636 +               up(&cfg->gc->lock);
10637 +       }
10638 +       else {
10639 +               cfg->gc->status &= ~CWANT2START; /* No need semaphore */
10640 +       }
10641 +       camif_dynamic_close(cfg);
10642 +       camif_release_irq(cfg);
10643 +       video_exclusive_release(inode,file);
10644 +       camif_p_stop(cfg);
10645 +       cfg->gc->sensor->driver->command(cfg->gc->sensor, USER_EXIT, NULL);
10646 +       cfg->gc->user--;
10647 +       cfg->status = CAMIF_STOPPED;
10648 +       return 0;
10649 +}
10650 +
10651 +static void fimc_config(camif_cfg_t *cfg,u32 x, u32 y, int bpp)
10652 +{
10653 +       cfg->target_x = x;
10654 +       cfg->target_y = y;
10655 +
10656 +       switch (bpp) {
10657 +       case 16:
10658 +               cfg->fmt = CAMIF_RGB16;
10659 +               break;
10660 +       case 24:
10661 +               cfg->fmt = CAMIF_RGB24;
10662 +               break;
10663 +       case 420:
10664 +               cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
10665 +               break;
10666 +       case 422:
10667 +               cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR422;
10668 +               break;
10669 +       default:
10670 +               panic("Wrong BPP \n");
10671 +       }
10672 +}
10673 +
10674 +
10675 +static int
10676 +camif_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
10677 +{
10678 +       int ret = 0;
10679 +       camif_cfg_t *cfg  = file->private_data;
10680 +       camif_param_t par;
10681 +
10682 +       switch (cmd) {
10683 +               case CMD_CAMERA_INIT:
10684 +                       if (copy_from_user(&par,(camif_param_t *)arg,
10685 +                                               sizeof(camif_param_t)))
10686 +                               return -EFAULT;
10687 +                       fimc_config(cfg,par.dst_x, par.dst_y, par.bpp);
10688 +                       if (camif_dynamic_open(cfg)) {
10689 +                               printk(" Eror Happens \n");
10690 +                               ret = -1;
10691 +                       }
10692 +
10693 +                       switch (par.flip) {
10694 +                       case 3 :
10695 +                               cfg->flip = CAMIF_FLIP_MIRROR;
10696 +                               break;
10697 +                       case 1 :
10698 +                               cfg->flip = CAMIF_FLIP_X;
10699 +                               break;
10700 +                       case 2 :
10701 +                               cfg->flip = CAMIF_FLIP_Y;
10702 +                               break;
10703 +                       case 0 :
10704 +                       default:
10705 +                               cfg->flip = CAMIF_FLIP;
10706 +                       }
10707 +                       break;
10708 +       /* Todo
10709 +               case CMD_SENSOR_BRIGHTNESS:
10710 +                       cfg->gc->sensor->driver->command(cfg->gc->sensor, SENSOR_BRIGHTNESS, NULL);
10711 +                       break;
10712 +       */
10713 +               default:
10714 +                       ret = -EINVAL;
10715 +                       break;
10716 +       }
10717 +
10718 +       return ret;
10719 +}
10720 +
10721 +
10722 +#if 0
10723 +static int camif_ioctl(struct inode *inode, struct file *file,
10724 +                     unsigned int cmd, unsigned long arg)
10725 +{
10726 +//     camif_cfg_t *cfg  = file->private_data;
10727 +
10728 +
10729 +       switch (cmd) {
10730 +/*     case Some_other_action */
10731 +       default:
10732 +               return video_usercopy(inode, file, cmd, arg, camif_do_ioctl);
10733 +       }
10734 +}
10735 +#endif
10736 +
10737 +static struct file_operations camif_c_fops =
10738 +{
10739 +       .owner    = THIS_MODULE,
10740 +       .open     = camif_open,
10741 +       .release  = camif_release,
10742 +       .ioctl    = camif_ioctl,
10743 +       .read     = camif_c_read,
10744 +       .write    = camif_write,
10745 +};
10746 +
10747 +static struct file_operations camif_p_fops =
10748 +{
10749 +       .owner    = THIS_MODULE,
10750 +       .open     = camif_open,
10751 +       .release  = camif_release,
10752 +       .ioctl    = camif_ioctl,
10753 +#ifdef Z_API
10754 +       .read     = z_read,
10755 +       .write    = z_write,
10756 +#else
10757 +       .read     = camif_p_read,
10758 +       .write    = camif_write,
10759 +#endif
10760 +};
10761 +
10762 +static struct video_device codec_template =
10763 +{
10764 +       .name     = "CODEC_IF",
10765 +       .type     = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
10766 +/*     .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */
10767 +       .fops     = &camif_c_fops,
10768 +//     .release  = camif_release
10769 +       .minor    = -1,
10770 +};
10771 +
10772 +static struct video_device preview_template =
10773 +{
10774 +       .name     = "PREVIEW_IF",
10775 +       .type     = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES,
10776 +/*     .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */
10777 +       .fops     = &camif_p_fops,
10778 +       .minor    = -1,
10779 +};
10780 +
10781 +static int preview_init(camif_cfg_t *cfg)
10782 +{
10783 +       char name[16]="CAM_PREVIEW";
10784 +
10785 +       memset(cfg, 0, sizeof(camif_cfg_t));
10786 +       cfg->target_x = 640;
10787 +       cfg->target_y = 480;
10788 +       cfg->pp_num   = 4;
10789 +       cfg->dma_type = CAMIF_PREVIEW;
10790 +       cfg->fmt      = CAMIF_RGB16;
10791 +       cfg->flip     = CAMIF_FLIP_Y;
10792 +       cfg->v        = &preview_template;
10793 +       mutex_init(&cfg->v->lock);
10794 +       cfg->irq       = IRQ_S3C2440_CAM_P;
10795 +
10796 +       strcpy(cfg->shortname,name);
10797 +        init_waitqueue_head(&cfg->waitq);
10798 +       cfg->status = CAMIF_STOPPED;
10799 +       return cfg->status;
10800 +}
10801 +
10802 +static int codec_init(camif_cfg_t *cfg)
10803 +{
10804 +       char name[16]="CAM_CODEC";
10805 +
10806 +       memset(cfg, 0, sizeof(camif_cfg_t));
10807 +       cfg->target_x = 176;
10808 +       cfg->target_y = 144;
10809 +       cfg->pp_num   = 4;
10810 +       cfg->dma_type = CAMIF_CODEC;
10811 +       cfg->fmt      = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420;
10812 +       cfg->flip     = CAMIF_FLIP_X;
10813 +       cfg->v         = &codec_template;
10814 +       mutex_init(&cfg->v->lock);
10815 +       cfg->irq       = IRQ_S3C2440_CAM_C;
10816 +       strcpy(cfg->shortname,name);
10817 +       init_waitqueue_head(&cfg->waitq);
10818 +       cfg->status = CAMIF_STOPPED;
10819 +       return cfg->status;
10820 +}
10821 +
10822 +static void camif_init(void)
10823 +{
10824 +       camif_setup_sensor();
10825 +}
10826 +
10827 +
10828 +
10829 +static void print_version(void)
10830 +{
10831 +       printk(KERN_INFO"FIMC built:"__DATE__ " "__TIME__"\n%s\n%s\n%s\n",
10832 +                                       fimc_version, driver_version,fsm_version);
10833 +}
10834 +
10835 +
10836 +static int camif_m_in(void)
10837 +{
10838 +       int ret = -EINVAL;
10839 +       camif_cfg_t * cfg;
10840 +
10841 +       printk(KERN_INFO"Starting S3C2440 Camera Driver\n");
10842 +
10843 +       camregs = ioremap(CAM_BASE_ADD, 0x100);
10844 +       if (!camregs) {
10845 +               printk(KERN_ERR"Unable to map camera regs\n");
10846 +               ret = -ENOMEM;
10847 +               goto bail1;
10848 +       }
10849 +
10850 +       camif_init();
10851 +       cfg = get_camif(CODEC_MINOR);
10852 +       codec_init(cfg);
10853 +
10854 +       ret = video_register_device(cfg->v,0,CODEC_MINOR);
10855 +       if (ret) {
10856 +                       printk(KERN_ERR"Couldn't register codec driver.\n");
10857 +                       goto bail2;
10858 +       }
10859 +       cfg = get_camif(PREVIEW_MINOR);
10860 +       preview_init(cfg);
10861 +       ret = video_register_device(cfg->v,0,PREVIEW_MINOR);
10862 +       if (ret) {
10863 +                       printk(KERN_ERR"Couldn't register preview driver.\n");
10864 +                       goto bail3; /* hm seems it us unregistered the once */
10865 +       }
10866 +
10867 +       print_version();
10868 +       return 0;
10869 +
10870 +bail3:
10871 +       video_unregister_device(cfg->v);
10872 +bail2:
10873 +       iounmap(camregs);
10874 +       camregs = NULL;
10875 +bail1:
10876 +       return ret;
10877 +}
10878 +
10879 +static void unconfig_device(camif_cfg_t *cfg)
10880 +{
10881 +       video_unregister_device(cfg->v);
10882 +       camif_hw_close(cfg);
10883 +       iounmap(camregs);
10884 +       //memset(cfg, 0, sizeof(camif_cfg_t));
10885 +       camregs = NULL;
10886 +}
10887 +
10888 +static void camif_m_out(void)  /* module out */
10889 +{
10890 +       camif_cfg_t *cfg;
10891 +
10892 +       cfg = get_camif(CODEC_MINOR);
10893 +       unconfig_device(cfg);
10894 +       cfg = get_camif(PREVIEW_MINOR);
10895 +       unconfig_device(cfg);
10896 +
10897 +       return;
10898 +}
10899 +
10900 +void camif_register_decoder(struct i2c_client *ptr)
10901 +{
10902 +       camif_cfg_t *cfg;
10903 +       void * data = i2c_get_clientdata(ptr);
10904 +
10905 +       cfg =get_camif(CODEC_MINOR);
10906 +       cfg->gc = (camif_gc_t *)(data);
10907 +
10908 +       cfg =get_camif(PREVIEW_MINOR);
10909 +       cfg->gc = (camif_gc_t *)(data);
10910 +
10911 +       sema_init(&cfg->gc->lock, 1); /* global lock for both Codec and Preview */
10912 +       cfg->gc->status |= PNOTWORKING; /* Default Value */
10913 +       camif_hw_open(cfg->gc);
10914 +}
10915 +
10916 +void camif_unregister_decoder(struct i2c_client *ptr)
10917 +{
10918 +       camif_gc_t *gc;
10919 +       void * data = i2c_get_clientdata(ptr);
10920 +
10921 +       gc = (camif_gc_t *)(data);
10922 +       gc->init_sensor = 0; /* need to modify */
10923 +}
10924 +
10925 +module_init(camif_m_in);
10926 +module_exit(camif_m_out);
10927 +
10928 +EXPORT_SYMBOL(camif_register_decoder);
10929 +EXPORT_SYMBOL(camif_unregister_decoder);
10930 +
10931 +MODULE_AUTHOR("SW.LEE <hitchcar@sec.samsung.com>");
10932 +MODULE_DESCRIPTION("Video-Driver For Fimc2.0 MISC Drivers");
10933 +MODULE_LICENSE("GPL");
10934 +
10935 +
10936 +/*
10937 + * Local variables:
10938 + * c-basic-offset: 8
10939 + * End:
10940 + */
10941 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.c
10942 ===================================================================
10943 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
10944 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.c    2008-12-11 22:46:49.000000000 +0100
10945 @@ -0,0 +1,291 @@
10946 +/*
10947 + * Copyright 2007  Andy Green <andy@warmcat.com>
10948 + * S3C modfifications
10949 + * Copyright 2008 Andy Green <andy@openmoko.com>
10950 + */
10951 +
10952 +#include <linux/module.h>
10953 +#include <linux/kernel.h>
10954 +#include <asm/hardware.h>
10955 +#include <asm/fiq.h>
10956 +#include "fiq_c_isr.h"
10957 +#include <linux/sysfs.h>
10958 +#include <linux/device.h>
10959 +#include <linux/platform_device.h>
10960 +
10961 +#include <asm/io.h>
10962 +
10963 +#include <asm/plat-s3c24xx/cpu.h>
10964 +#include <asm/plat-s3c24xx/irq.h>
10965 +
10966 +#include <asm/arch/pwm.h>
10967 +#include <asm/plat-s3c/regs-timer.h>
10968 +
10969 +/*
10970 + * Major Caveats for using FIQ
10971 + * ---------------------------
10972 + *
10973 + * 1) it CANNOT touch any vmalloc()'d memory, only memory
10974 + *    that was kmalloc()'d.  Static allocations in the monolithic kernel
10975 + *    are kmalloc()'d so they are okay.  You can touch memory-mapped IO, but
10976 + *    the pointer for it has to have been stored in kmalloc'd memory.  The
10977 + *    reason for this is simple: every now and then Linux turns off interrupts
10978 + *    and reorders the paging tables.  If a FIQ happens during this time, the
10979 + *    virtual memory space can be partly or entirely disordered or missing.
10980 + *
10981 + * 2) Because vmalloc() is used when a module is inserted, THIS FIQ
10982 + *    ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module.  But the way
10983 + *    it is set up, you can all to enable and disable it from your module
10984 + *    and intercommunicate with it through struct fiq_ipc
10985 + *    fiq_ipc which you can define in
10986 + *    asm/archfiq_ipc_type.h.  The reason is the same as above, a
10987 + *    FIQ could happen while even the ISR is not present in virtual memory
10988 + *    space due to pagetables being changed at the time.
10989 + *
10990 + * 3) You can't call any Linux API code except simple macros
10991 + *    - understand that FIQ can come in at any time, no matter what
10992 + *      state of undress the kernel may privately be in, thinking it
10993 + *      locked the door by turning off interrupts... FIQ is an
10994 + *      unstoppable monster force (which is its value)
10995 + *    - they are not vmalloc()'d memory safe
10996 + *    - they might do crazy stuff like sleep: FIQ pisses fire and
10997 + *      is not interested in 'sleep' that the weak seem to need
10998 + *    - calling APIs from FIQ can re-enter un-renterable things
10999 + *    - summary: you cannot interoperate with linux APIs directly in the FIQ ISR
11000 + *
11001 + * If you follow these rules, it is fantastic, an extremely powerful, solid,
11002 + * genuine hard realtime feature.
11003 + *
11004 + */
11005 +
11006 +/* more than enough to cover our jump instruction to the isr */
11007 +#define SIZEOF_FIQ_JUMP 8
11008 +/* more than enough to cover s3c2440_fiq_isr() in 4K blocks */
11009 +#define SIZEOF_FIQ_ISR 0x2000
11010 +/* increase the size of the stack that is active during FIQ as needed */
11011 +static u8 u8aFiqStack[4096];
11012 +
11013 +/* only one FIQ ISR possible, okay to do these here */
11014 +u32 _fiq_ack_mask; /* used by isr exit define */
11015 +unsigned long _fiq_count_fiqs; /* used by isr exit define */
11016 +static int _fiq_irq; /* private ; irq index we were started with, or 0 */
11017 +struct s3c2410_pwm pwm_timer_fiq;
11018 +int _fiq_timer_index;
11019 +u16 _fiq_timer_divisor;
11020 +
11021 +
11022 +/* this function must live in the monolithic kernel somewhere!  A module is
11023 + * NOT good enough!
11024 + */
11025 +extern void __attribute__ ((naked)) s3c2440_fiq_isr(void);
11026 +
11027 +
11028 +/* this is copied into the hard FIQ vector during init */
11029 +
11030 +static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void)
11031 +{
11032 +       asm __volatile__ (
11033 +               "mov pc, r8 ; "
11034 +       );
11035 +}
11036 +
11037 +/* sysfs */
11038 +
11039 +static ssize_t show_count(struct device *dev, struct device_attribute *attr,
11040 +                        char *buf)
11041 +{
11042 +       return sprintf(buf, "%ld\n", _fiq_count_fiqs);
11043 +}
11044 +
11045 +static DEVICE_ATTR(count, 0444, show_count, NULL);
11046 +
11047 +static struct attribute *s3c2440_fiq_sysfs_entries[] = {
11048 +       &dev_attr_count.attr,
11049 +       NULL
11050 +};
11051 +
11052 +static struct attribute_group s3c2440_fiq_attr_group = {
11053 +       .name   = "fiq",
11054 +       .attrs  = s3c2440_fiq_sysfs_entries,
11055 +};
11056 +
11057 +/*
11058 + * call this from your kernel module to set up the FIQ ISR to service FIQs,
11059 + * You need to have configured your FIQ input pin before anything will happen
11060 + *
11061 + * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h
11062 + *
11063 + * you still need to clear the source interrupt in S3C2410_INTMSK to get
11064 + * anything good happening
11065 + */
11066 +static int fiq_init_irq_source(int irq_index_fiq)
11067 +{
11068 +       int rc = 0;
11069 +
11070 +       if (!irq_index_fiq) /* no interrupt */
11071 +               goto bail;
11072 +
11073 +       local_fiq_disable();
11074 +
11075 +       _fiq_irq = irq_index_fiq;
11076 +       _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
11077 +       _fiq_timer_index = (irq_index_fiq - IRQ_TIMER0);
11078 +
11079 +       /* set up the timer to operate as a pwm device */
11080 +
11081 +       rc = s3c2410_pwm_init(&pwm_timer_fiq);
11082 +       if (rc)
11083 +               goto bail;
11084 +
11085 +       pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index;
11086 +       pwm_timer_fiq.prescaler = (6 - 1) / 2;
11087 +       pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2;
11088 +       /* default rate == ~32us */
11089 +       pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000;
11090 +
11091 +       rc = s3c2410_pwm_enable(&pwm_timer_fiq);
11092 +       if (rc)
11093 +               goto bail;
11094 +
11095 +       s3c2410_pwm_start(&pwm_timer_fiq);
11096 +
11097 +       _fiq_timer_divisor = 0xffff; /* so kick will work initially */
11098 +
11099 +       /* let our selected interrupt be a magic FIQ interrupt */
11100 +       __raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
11101 +
11102 +       /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
11103 +       local_fiq_enable();
11104 +bail:
11105 +       return rc;
11106 +}
11107 +
11108 +
11109 +/* call this from your kernel module to disable generation of FIQ actions */
11110 +static void fiq_disable_irq_source(void)
11111 +{
11112 +       /* nothing makes FIQ any more */
11113 +       __raw_writel(0, S3C2410_INTMOD);
11114 +       local_fiq_disable();
11115 +       _fiq_irq = 0; /* no active source interrupt now either */
11116 +}
11117 +
11118 +/*
11119 + * fiq_kick() forces a FIQ event to happen shortly after leaving the routine
11120 + */
11121 +void fiq_kick(void)
11122 +{
11123 +       unsigned long flags;
11124 +       u32 tcon;
11125 +
11126 +       /* we have to take care about FIQ because this modification is
11127 +        * non-atomic, FIQ could come in after the read and before the
11128 +        * writeback and its changes to the register would be lost
11129 +        * (platform INTMSK mod code is taken care of already)
11130 +        */
11131 +       local_save_flags(flags);
11132 +       local_fiq_disable();
11133 +       /* allow FIQs to resume */
11134 +       __raw_writel(__raw_readl(S3C2410_INTMSK) &
11135 +                    ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
11136 +                    S3C2410_INTMSK);
11137 +       tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
11138 +       /* fake the timer to a count of 1 */
11139 +       __raw_writel(1, S3C2410_TCNTB(_fiq_timer_index));
11140 +       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
11141 +       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
11142 +                    S3C2410_TCON);
11143 +       __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON);
11144 +       local_irq_restore(flags);
11145 +}
11146 +EXPORT_SYMBOL_GPL(fiq_kick);
11147 +
11148 +
11149 +
11150 +
11151 +static int __init sc32440_fiq_probe(struct platform_device *pdev)
11152 +{
11153 +       struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
11154 +
11155 +       if (!r)
11156 +               return -EIO;
11157 +
11158 +       /* configure for the interrupt we are meant to use */
11159 +       printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start);
11160 +
11161 +       fiq_init_irq_source(r->start);
11162 +
11163 +       return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
11164 +}
11165 +
11166 +static int sc32440_fiq_remove(struct platform_device *pdev)
11167 +{
11168 +       fiq_disable_irq_source();
11169 +       sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
11170 +       return 0;
11171 +}
11172 +
11173 +static void fiq_set_vector_and_regs(void)
11174 +{
11175 +       struct pt_regs regs;
11176 +
11177 +       /* prep the special FIQ mode regs */
11178 +       memset(&regs, 0, sizeof(regs));
11179 +       regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr;
11180 +       regs.ARM_sp = (unsigned long)u8aFiqStack + sizeof(u8aFiqStack) - 4;
11181 +       /* set up the special FIQ-mode-only registers from our regs */
11182 +       set_fiq_regs(&regs);
11183 +       /* copy our jump to the real ISR into the hard vector address */
11184 +       set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP);
11185 +}
11186 +
11187 +#ifdef CONFIG_PM
11188 +static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state)
11189 +{
11190 +       /* nothing makes FIQ any more */
11191 +       __raw_writel(0, S3C2410_INTMOD);
11192 +       local_fiq_disable();
11193 +
11194 +       return 0;
11195 +}
11196 +
11197 +static int sc32440_fiq_resume(struct platform_device *pdev)
11198 +{
11199 +       fiq_set_vector_and_regs();
11200 +       fiq_init_irq_source(_fiq_irq);
11201 +       return 0;
11202 +}
11203 +#else
11204 +#define sc32440_fiq_suspend    NULL
11205 +#define sc32440_fiq_resume     NULL
11206 +#endif
11207 +
11208 +static struct platform_driver sc32440_fiq_driver = {
11209 +       .driver = {
11210 +               .name   = "sc32440_fiq",
11211 +               .owner  = THIS_MODULE,
11212 +       },
11213 +
11214 +       .probe   = sc32440_fiq_probe,
11215 +       .remove  = __devexit_p(sc32440_fiq_remove),
11216 +       .suspend = sc32440_fiq_suspend,
11217 +       .resume  = sc32440_fiq_resume,
11218 +};
11219 +
11220 +static int __init sc32440_fiq_init(void)
11221 +{
11222 +       fiq_set_vector_and_regs();
11223 +
11224 +       return platform_driver_register(&sc32440_fiq_driver);
11225 +}
11226 +
11227 +static void __exit sc32440_fiq_exit(void)
11228 +{
11229 +       fiq_disable_irq_source();
11230 +}
11231 +
11232 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
11233 +MODULE_LICENSE("GPL");
11234 +
11235 +module_init(sc32440_fiq_init);
11236 +module_exit(sc32440_fiq_exit);
11237 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.h
11238 ===================================================================
11239 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
11240 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/fiq_c_isr.h    2008-12-11 22:46:49.000000000 +0100
11241 @@ -0,0 +1,66 @@
11242 +#ifndef _LINUX_FIQ_C_ISR_H
11243 +#define _LINUX_FIQ_C_ISR_H
11244 +
11245 +#include <asm/arch-s3c2410/regs-irq.h>
11246 +
11247 +extern unsigned long _fiq_count_fiqs;
11248 +extern u32 _fiq_ack_mask;
11249 +extern int _fiq_timer_index;
11250 +extern u16 _fiq_timer_divisor;
11251 +
11252 +/* This CANNOT be implemented in a module -- it has to be used in code
11253 + * included in the monolithic kernel
11254 + */
11255 +
11256 +#define FIQ_HANDLER_START() \
11257 +void __attribute__ ((naked)) s3c2440_fiq_isr(void) \
11258 +{\
11259 +       /*\
11260 +        * you can declare local vars here, take care to set the frame size\
11261 +        *  below accordingly if there are more than a few dozen bytes of them\
11262 +        */\
11263 +
11264 +/* stick your locals here :-)
11265 + * Do NOT initialize them here!  define them and initialize them after
11266 + * FIQ_HANDLER_ENTRY() is done.
11267 + */
11268 +
11269 +#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \
11270 +       const int _FIQ_FRAME_SIZE = FRAME; \
11271 +       /* entry takes care to store registers we will be treading on here */\
11272 +       asm __volatile__ (\
11273 +               "mov     ip, sp ;"\
11274 +               /* stash FIQ and r0-r8 normal regs */\
11275 +               "stmdb  sp!, {r0-r12, lr};"\
11276 +               /* allow SP to get some space */\
11277 +               "sub     sp, sp, %1 ;"\
11278 +               /* !! THIS SETS THE FRAME, adjust to > sizeof locals */\
11279 +               "sub     fp, sp, %0 ;"\
11280 +               :\
11281 +               : "rI" (LOCALS), "rI" (FRAME)\
11282 +               :"r9"\
11283 +       );
11284 +
11285 +/* stick your ISR code here and then end with... */
11286 +
11287 +#define FIQ_HANDLER_END() \
11288 +       _fiq_count_fiqs++;\
11289 +       __raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\
11290 +\
11291 +       /* exit back to normal mode restoring everything */\
11292 +       asm __volatile__ (\
11293 +               /* pop our allocation */\
11294 +               "add     sp, sp, %0 ;"\
11295 +               /* return FIQ regs back to pristine state\
11296 +                * and get normal regs back\
11297 +                */\
11298 +               "ldmia  sp!, {r0-r12, lr};"\
11299 +\
11300 +               /* return */\
11301 +               "subs   pc, lr, #4;"\
11302 +               : \
11303 +               : "rI" (_FIQ_FRAME_SIZE) \
11304 +       );\
11305 +}
11306 +
11307 +#endif /* _LINUX_FIQ_C_ISR_H */
11308 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/Kconfig
11309 ===================================================================
11310 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/Kconfig   2008-12-11 22:46:07.000000000 +0100
11311 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/Kconfig        2008-12-11 22:46:49.000000000 +0100
11312 @@ -22,6 +22,13 @@ config S3C2440_DMA
11313         help
11314           Support for S3C2440 specific DMA code5A
11315
11316 +config S3C2440_C_FIQ
11317 +       bool "FIQ ISR support in C"
11318 +       depends on ARCH_S3C2410
11319 +       select FIQ
11320 +       help
11321 +         Support for S3C2440 FIQ support in C -- see
11322 +         ./arch/arm/macs3c2440/fiq_c_isr.c
11323
11324  menu "S3C2440 Machines"
11325
11326 @@ -67,6 +74,37 @@ config SMDK2440_CPU2440
11327         default y if ARCH_S3C2440
11328         select CPU_S3C2440
11329
11330 +config MACH_HXD8
11331 +       bool "FIC HXD8"
11332 +       select CPU_S3C2440
11333 +       select SENSORS_PCF50606
11334 +       help
11335 +          Say Y here if you are using the FIC Neo1973 GSM Phone
11336 +
11337 +config MACH_NEO1973_GTA02
11338 +       bool "FIC Neo1973 GSM Phone (GTA02 Hardware)"
11339 +       select CPU_S3C2442
11340 +       select SENSORS_PCF50633
11341 +       select POWER_SUPPLY
11342 +       select GTA02_HDQ
11343 +       help
11344 +          Say Y here if you are using the FIC Neo1973 GSM Phone
11345 +
11346 +config NEO1973_GTA02_2440
11347 +       bool "Old FIC Neo1973 GTA02 hardware using S3C2440 CPU"
11348 +       depends on MACH_NEO1973_GTA02
11349 +       select CPU_S3C2440
11350 +       help
11351 +          Say Y here if you are using an early hardware revision
11352 +          of the FIC/Openmoko Neo1973 GTA02 GSM Phone.
11353 +
11354 +config MACH_M800
11355 +       bool "E-TEN glofiish M800/X800"
11356 +       select CPU_S3C2442
11357 +       help
11358 +          Say Y here if you are using the E-TEN glofiish M800/X800.
11359 +
11360
11361  endmenu
11362
11363 +#source "arch/arm/mach-s3c2440/camera/Kconfig"
11364 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-glofiish.c
11365 ===================================================================
11366 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
11367 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-glofiish.c        2008-12-11 22:46:49.000000000 +0100
11368 @@ -0,0 +1,620 @@
11369 +/*
11370 + * linux/arch/arm/mach-s3c2440/mach-glofiish.c
11371 + *
11372 + * S3C2440 Machine Support for the E-TEN glofiish X800/M800
11373 + *
11374 + * Copyright (C) 2008 by Harald Welte <laforge@gnumonks.org>
11375 + * All rights reserved.
11376 + *
11377 + * This program is free software; you can redistribute it and/or
11378 + * modify it under the terms of the GNU General Public License as
11379 + * published by the Free Software Foundation; either version 2 of
11380 + * the License, or (at your option) any later version.
11381 + *
11382 + * This program is distributed in the hope that it will be useful,
11383 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
11384 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11385 + * GNU General Public License for more details.
11386 + *
11387 + * You should have received a copy of the GNU General Public License
11388 + * along with this program; if not, write to the Free Software
11389 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
11390 + * MA 02111-1307 USA
11391 + *
11392 + */
11393 +
11394 +#include <linux/kernel.h>
11395 +#include <linux/types.h>
11396 +#include <linux/interrupt.h>
11397 +#include <linux/list.h>
11398 +#include <linux/delay.h>
11399 +#include <linux/timer.h>
11400 +#include <linux/init.h>
11401 +#include <linux/workqueue.h>
11402 +#include <linux/platform_device.h>
11403 +#include <linux/serial_core.h>
11404 +#include <linux/spi/spi.h>
11405 +#include <linux/spi/spi_bitbang.h>
11406 +#include <linux/mmc/host.h>
11407 +
11408 +#include <linux/mtd/mtd.h>
11409 +#include <linux/mtd/nand.h>
11410 +#include <linux/mtd/nand_ecc.h>
11411 +#include <linux/mtd/partitions.h>
11412 +#include <linux/mtd/physmap.h>
11413 +
11414 +#include <asm/mach/arch.h>
11415 +#include <asm/mach/map.h>
11416 +#include <asm/mach/irq.h>
11417 +
11418 +#include <asm/hardware.h>
11419 +#include <asm/io.h>
11420 +#include <asm/irq.h>
11421 +#include <asm/mach-types.h>
11422 +
11423 +#include <asm/arch-s3c2410/regs-irq.h>
11424 +#include <asm/arch/regs-gpio.h>
11425 +#include <asm/arch/regs-gpioj.h>
11426 +#include <asm/arch/fb.h>
11427 +#include <asm/arch/mci.h>
11428 +#include <asm/arch/ts.h>
11429 +#include <asm/arch/spi.h>
11430 +#include <asm/arch/spi-gpio.h>
11431 +#include <asm/arch/usb-control.h>
11432 +
11433 +#include <asm/arch/glofiish.h>
11434 +#include <asm/arch/gta01.h>
11435 +
11436 +#include <asm/plat-s3c/regs-serial.h>
11437 +#include <asm/plat-s3c/nand.h>
11438 +#include <asm/plat-s3c24xx/devs.h>
11439 +#include <asm/plat-s3c24xx/cpu.h>
11440 +#include <asm/plat-s3c24xx/pm.h>
11441 +#include <asm/plat-s3c24xx/udc.h>
11442 +
11443 +#include <linux/jbt6k74.h>
11444 +
11445 +/*
11446 + * this gets called every 1ms when we paniced.
11447 + */
11448 +
11449 +static long glofiish_panic_blink(long count)
11450 +{
11451 +       long delay = 0;
11452 +       static long last_blink;
11453 +       static char led;
11454 +
11455 +       if (count - last_blink < 100) /* 200ms period, fast blink */
11456 +               return 0;
11457 +
11458 +       /* FIXME */
11459 +#if 0
11460 +       led ^= 1;
11461 +       s3c2410_gpio_cfgpin(GTA02_GPIO_AUX_LED, S3C2410_GPIO_OUTPUT);
11462 +       neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, led);
11463 +
11464 +       last_blink = count;
11465 +#endif
11466 +       return delay;
11467 +}
11468 +
11469 +struct platform_device gta02_version_device = {
11470 +       .name           = "neo1973-version",
11471 +       .num_resources  = 0,
11472 +};
11473 +
11474 +struct platform_device gta02_resume_reason_device = {
11475 +       .name           = "neo1973-resume",
11476 +       .num_resources  = 0,
11477 +};
11478 +
11479 +struct platform_device gta02_memconfig_device = {
11480 +       .name           = "neo1973-memconfig",
11481 +       .num_resources  = 0,
11482 +};
11483 +
11484 +static struct map_desc m800_iodesc[] __initdata = {
11485 +       {
11486 +               .virtual        = 0xe0000000,
11487 +               .pfn            = __phys_to_pfn(S3C2410_CS3+0x01000000),
11488 +               .length         = SZ_1M,
11489 +               .type           = MT_DEVICE
11490 +       },
11491 +};
11492 +
11493 +#define UCON S3C2410_UCON_DEFAULT
11494 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
11495 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
11496 +
11497 +static struct s3c2410_uartcfg m800_uartcfgs[] = {
11498 +       [0] = {
11499 +               .hwport      = 0,
11500 +               .flags       = 0,
11501 +               .ucon        = UCON,
11502 +               .ulcon       = ULCON,
11503 +               .ufcon       = UFCON,
11504 +       },
11505 +       [1] = {
11506 +               .hwport      = 1,
11507 +               .flags       = 0,
11508 +               .ucon        = UCON,
11509 +               .ulcon       = ULCON,
11510 +               .ufcon       = UFCON,
11511 +       },
11512 +       [2] = {
11513 +               .hwport      = 2,
11514 +               .flags       = 0,
11515 +               .ucon        = UCON,
11516 +               .ulcon       = ULCON,
11517 +               .ufcon       = UFCON,
11518 +       },
11519 +
11520 +};
11521 +
11522 +/* Configuration for 480x640 toppoly TD028TTEC1.
11523 + * Do not mark this as __initdata or it will break! */
11524 +static struct s3c2410fb_display glofiish_displays[] =  {
11525 +       {
11526 +               .type           = S3C2410_LCDCON1_TFT,
11527 +               .width          = 43,
11528 +               .height         = 58,
11529 +               .xres           = 480,
11530 +               .yres           = 640,
11531 +               .bpp            = 16,
11532 +
11533 +               .pixclock       = 40000,        /* HCLK/4 */
11534 +               .left_margin    = 2,
11535 +               .right_margin   = 2,
11536 +               .hsync_len      = 2,
11537 +               .upper_margin   = 2,
11538 +               .lower_margin   = 66,
11539 +               .vsync_len      = 2,
11540 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
11541 +                                 S3C2410_LCDCON5_INVVCLK |
11542 +                                 S3C2410_LCDCON5_INVVLINE |
11543 +                                 S3C2410_LCDCON5_INVVFRAME |
11544 +                                 S3C2410_LCDCON5_PWREN |
11545 +                                 S3C2410_LCDCON5_HWSWP,
11546 +       },
11547 +       {
11548 +               .type           = S3C2410_LCDCON1_TFT,
11549 +               .width          = 43,
11550 +               .height         = 58,
11551 +               .xres           = 480,
11552 +               .yres           = 640,
11553 +               .bpp            = 32,
11554 +
11555 +               .pixclock       = 40000,        /* HCLK/4 */
11556 +               .left_margin    = 104,
11557 +               .right_margin   = 8,
11558 +               .hsync_len      = 8,
11559 +               .upper_margin   = 2,
11560 +               .lower_margin   = 16,
11561 +               .vsync_len      = 2,
11562 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
11563 +                                 S3C2410_LCDCON5_INVVCLK |
11564 +                                 S3C2410_LCDCON5_INVVLINE |
11565 +                                 S3C2410_LCDCON5_INVVFRAME |
11566 +                                 S3C2410_LCDCON5_PWREN |
11567 +                                 S3C2410_LCDCON5_HWSWP,
11568 +       },
11569 +       {
11570 +               .type           = S3C2410_LCDCON1_TFT,
11571 +               .width          = 43,
11572 +               .height         = 58,
11573 +               .xres           = 240,
11574 +               .yres           = 320,
11575 +               .bpp            = 16,
11576 +
11577 +               .pixclock       = 40000,        /* HCLK/4 */
11578 +               .left_margin    = 104,
11579 +               .right_margin   = 8,
11580 +               .hsync_len      = 8,
11581 +               .upper_margin   = 2,
11582 +               .lower_margin   = 16,
11583 +               .vsync_len      = 2,
11584 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
11585 +                                 S3C2410_LCDCON5_INVVCLK |
11586 +                                 S3C2410_LCDCON5_INVVLINE |
11587 +                                 S3C2410_LCDCON5_INVVFRAME |
11588 +                                 S3C2410_LCDCON5_PWREN |
11589 +                                 S3C2410_LCDCON5_HWSWP,
11590 +       },
11591 +};
11592 +
11593 +static struct s3c2410fb_mach_info glofiish_lcd_cfg __initdata = {
11594 +       .displays       = glofiish_displays,
11595 +       .num_displays   = ARRAY_SIZE(glofiish_displays),
11596 +       .default_display = 0,
11597 +
11598 +       .lpcsel         = ((0xCE6) & ~7) | 1<<4,
11599 +};
11600 +
11601 +
11602 +static struct resource m800_sdio_resources[] = {
11603 +       [0] = {
11604 +               .flags  = IORESOURCE_IRQ,
11605 +               .start  = IRQ_SDI,
11606 +               .end    = IRQ_SDI,
11607 +       },
11608 +       [1] = {
11609 +               .flags = IORESOURCE_MEM,
11610 +               .start = S3C2410_PA_SDI,
11611 +               .end   = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
11612 +       },
11613 +       [2] = {
11614 +               .flags = IORESOURCE_DMA,
11615 +               .start = 0, /* Channel 0 for SDI */
11616 +               .end = 0,
11617 +       },
11618 +};
11619 +
11620 +static struct platform_device *glofiish_devices[] __initdata = {
11621 +       &s3c_device_usb,
11622 +       &s3c_device_lcd,
11623 +       &s3c_device_wdt,
11624 +       &s3c_device_i2c,
11625 +       &s3c_device_iis,
11626 +       &s3c_device_sdi,
11627 +       &s3c_device_usbgadget,
11628 +       &s3c_device_nand,
11629 +       &s3c_device_ts,
11630 +};
11631 +
11632 +static struct s3c2410_nand_set glofiish_nand_sets[] = {
11633 +       [0] = {
11634 +               .name           = "glofiish-nand",
11635 +               .nr_chips       = 1,
11636 +               .flags          = S3C2410_NAND_BBT,
11637 +       },
11638 +};
11639 +
11640 +/* choose a set of timings derived from S3C@2442B MCP54
11641 + * data sheet (K5D2G13ACM-D075 MCP Memory)
11642 + */
11643 +
11644 +static struct s3c2410_platform_nand glofiish_nand_info = {
11645 +       .tacls          = 0,
11646 +       .twrph0         = 25,
11647 +       .twrph1         = 15,
11648 +       .nr_sets        = ARRAY_SIZE(glofiish_nand_sets),
11649 +       .sets           = glofiish_nand_sets,
11650 +       .software_ecc   = 1,
11651 +};
11652 +
11653 +static struct s3c24xx_mci_pdata glofiish_mmc_cfg = {
11654 +       .gpio_detect    = M800_GPIO_nSD_DETECT,
11655 +       .set_power      = NULL,
11656 +       .ocr_avail      = MMC_VDD_32_33,
11657 +};
11658 +
11659 +static void glofiish_udc_command(enum s3c2410_udc_cmd_e cmd)
11660 +{
11661 +       printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
11662 +
11663 +       switch (cmd) {
11664 +       case S3C2410_UDC_P_ENABLE:
11665 +               s3c2410_gpio_setpin(M800_GPIO_USB_PULLUP, 1);
11666 +               break;
11667 +       case S3C2410_UDC_P_DISABLE:
11668 +               s3c2410_gpio_setpin(M800_GPIO_USB_PULLUP, 0);
11669 +               break;
11670 +       case S3C2410_UDC_P_RESET:
11671 +               /* FIXME! */
11672 +               break;
11673 +       default:
11674 +               break;
11675 +       }
11676 +}
11677 +
11678 +/* get PMU to set USB current limit accordingly */
11679 +
11680 +static void glofiish_udc_vbus_draw(unsigned int ma)
11681 +{
11682 +       //pcf50633_notify_usb_current_limit_change(pcf50633_global, ma);
11683 +}
11684 +
11685 +static struct s3c2410_udc_mach_info glofiish_udc_cfg = {
11686 +       .vbus_draw      = glofiish_udc_vbus_draw,
11687 +       .udc_command    = glofiish_udc_command,
11688 +
11689 +};
11690 +
11691 +static struct s3c2410_ts_mach_info glofiish_ts_cfg = {
11692 +       .delay = 10000,
11693 +       .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
11694 +       /* simple averaging, 2^n samples */
11695 +       .oversampling_shift = 5,
11696 +        /* averaging filter length, 2^n */
11697 +       .excursion_filter_len_bits = 5,
11698 +       /* flagged for beauty contest on next sample if differs from
11699 +        * average more than this
11700 +        */
11701 +       .reject_threshold_vs_avg = 2,
11702 +};
11703 +
11704 +
11705 +/* SPI: LCM control interface attached to Glamo3362 */
11706 +
11707 +static void m800_jbt6k74_reset(int devidx, int level)
11708 +{
11709 +       //glamo_lcm_reset(level);
11710 +       printk(KERN_DEBUG "gta01_jbt6k74_reset\n");
11711 +}
11712 +
11713 +/* finally bring up deferred backlight resume now LCM is resumed itself */
11714 +
11715 +static void m800_jbt6k74_resuming(int devidx)
11716 +{
11717 +       //pcf50633_backlight_resume(pcf50633_global);
11718 +       //gta01bl_deferred_resume();
11719 +}
11720 +
11721 +const struct jbt6k74_platform_data jbt6k74_pdata = {
11722 +       .reset          = m800_jbt6k74_reset,
11723 +       .resuming       = m800_jbt6k74_resuming,
11724 +};
11725 +
11726 +static struct spi_board_info glofiish_spi_board_info[] = {
11727 +       {
11728 +               .modalias       = "jbt6k74",
11729 +               /* platform_data */
11730 +               .platform_data  = &jbt6k74_pdata,
11731 +               /* controller_data */
11732 +               /* irq */
11733 +               .max_speed_hz   = 10 * 1000 * 1000,
11734 +               .bus_num        = 2,
11735 +               /* chip_select */
11736 +       },
11737 +};
11738 +
11739 +static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs)
11740 +{
11741 +       switch (cs) {
11742 +       case BITBANG_CS_ACTIVE:
11743 +               s3c2410_gpio_setpin(S3C2410_GPG3, 0);
11744 +               break;
11745 +       case BITBANG_CS_INACTIVE:
11746 +               s3c2410_gpio_setpin(S3C2410_GPG3, 1);
11747 +               break;
11748 +       }
11749 +}
11750 +
11751 +static struct s3c2410_spigpio_info spi_gpio_cfg = {
11752 +       .pin_clk        = S3C2410_GPG7,
11753 +       .pin_mosi       = S3C2410_GPG6,
11754 +       .pin_miso       = S3C2410_GPG5,
11755 +       .board_size     = ARRAY_SIZE(glofiish_spi_board_info),
11756 +       .board_info     = glofiish_spi_board_info,
11757 +       .chip_select    = &spi_gpio_cs,
11758 +       .num_chipselect = 2,   /*** Should be 1 or 2 for gta01? ***/
11759 +};
11760 +
11761 +static struct resource s3c_spi_lcm_resource[] = {
11762 +       [0] = {
11763 +               .start = S3C2410_GPG3,
11764 +               .end   = S3C2410_GPG3,
11765 +       },
11766 +       [1] = {
11767 +               .start = S3C2410_GPG5,
11768 +               .end   = S3C2410_GPG5,
11769 +       },
11770 +       [2] = {
11771 +               .start = S3C2410_GPG6,
11772 +               .end   = S3C2410_GPG6,
11773 +       },
11774 +       [3] = {
11775 +               .start = S3C2410_GPG7,
11776 +               .end   = S3C2410_GPG7,
11777 +       },
11778 +};
11779 +
11780 +struct platform_device s3c_device_spi_lcm = {
11781 +       .name             = "spi_s3c24xx_gpio",
11782 +       .id               = 1,
11783 +       .num_resources    = ARRAY_SIZE(s3c_spi_lcm_resource),
11784 +       .resource         = s3c_spi_lcm_resource,
11785 +       .dev = {
11786 +               .platform_data = &spi_gpio_cfg,
11787 +       },
11788 +};
11789 +
11790 +static struct gta01bl_machinfo backlight_machinfo = {
11791 +       .default_intensity      = 1,
11792 +       .max_intensity          = 1,
11793 +       .limit_mask             = 1,
11794 +       .defer_resume_backlight = 1,
11795 +};
11796 +
11797 +static struct resource gta01_bl_resources[] = {
11798 +       [0] = {
11799 +               .start  = M800_GPIO_BACKLIGHT,
11800 +               .end    = M800_GPIO_BACKLIGHT,
11801 +       },
11802 +};
11803 +
11804 +struct platform_device gta01_bl_dev = {
11805 +       .name           = "gta01-bl",
11806 +       .num_resources  = ARRAY_SIZE(gta01_bl_resources),
11807 +       .resource       = gta01_bl_resources,
11808 +       .dev            = {
11809 +               .platform_data = &backlight_machinfo,
11810 +       },
11811 +};
11812 +
11813 +
11814 +#if 0 /* currently this is not used and we use gpio spi */
11815 +static struct glamo_spi_info glamo_spi_cfg = {
11816 +       .board_size     = ARRAY_SIZE(gta02_spi_board_info),
11817 +       .board_info     = gta02_spi_board_info,
11818 +};
11819 +#endif /* 0 */
11820 +
11821 +#if 0
11822 +static struct resource gta02_vibrator_resources[] = {
11823 +       [0] = {
11824 +               .start  = GTA02_GPIO_VIBRATOR_ON,
11825 +               .end    = GTA02_GPIO_VIBRATOR_ON,
11826 +       },
11827 +};
11828 +
11829 +static struct platform_device gta02_vibrator_dev = {
11830 +       .name           = "neo1973-vibrator",
11831 +       .num_resources  = ARRAY_SIZE(gta02_vibrator_resources),
11832 +       .resource       = gta02_vibrator_resources,
11833 +};
11834 +
11835 +static struct resource gta02_led_resources[] = {
11836 +       {
11837 +               .name   = "gta02-power:orange",
11838 +               .start  = GTA02_GPIO_PWR_LED1,
11839 +               .end    = GTA02_GPIO_PWR_LED1,
11840 +       }, {
11841 +               .name   = "gta02-power:blue",
11842 +               .start  = GTA02_GPIO_PWR_LED2,
11843 +               .end    = GTA02_GPIO_PWR_LED2,
11844 +       }, {
11845 +               .name   = "gta02-aux:red",
11846 +               .start  = GTA02_GPIO_AUX_LED,
11847 +               .end    = GTA02_GPIO_AUX_LED,
11848 +       },
11849 +};
11850 +
11851 +struct platform_device gta02_led_dev = {
11852 +       .name           = "gta02-led",
11853 +       .num_resources  = ARRAY_SIZE(gta02_led_resources),
11854 +       .resource       = gta02_led_resources,
11855 +};
11856 +
11857 +static struct resource gta02_button_resources[] = {
11858 +       [0] = {
11859 +               .start = GTA02_GPIO_AUX_KEY,
11860 +               .end   = GTA02_GPIO_AUX_KEY,
11861 +       },
11862 +       [1] = {
11863 +               .start = GTA02_GPIO_HOLD_KEY,
11864 +               .end   = GTA02_GPIO_HOLD_KEY,
11865 +       },
11866 +       [2] = {
11867 +               .start = GTA02_GPIO_JACK_INSERT,
11868 +               .end   = GTA02_GPIO_JACK_INSERT,
11869 +       },
11870 +};
11871 +
11872 +static struct platform_device gta02_button_dev = {
11873 +       .name           = "neo1973-button",
11874 +       .num_resources  = ARRAY_SIZE(gta02_button_resources),
11875 +       .resource       = gta02_button_resources,
11876 +};
11877 +#endif
11878 +
11879 +/* USB */
11880 +static struct s3c2410_hcd_info glofiish_usb_info = {
11881 +       .port[0]        = {
11882 +               .flags  = S3C_HCDFLG_USED,
11883 +       },
11884 +       .port[1]        = {
11885 +               .flags  = 0,
11886 +       },
11887 +};
11888 +
11889 +static struct resource m800_button_resources[] = {
11890 +       [0] = {
11891 +               .start = M800_GPIO_nKEY_POWER,
11892 +               .end   = M800_GPIO_nKEY_POWER,
11893 +       },
11894 +       [1] = {
11895 +               .start = M800_GPIO_nKEY_CAMERA,
11896 +               .end   = M800_GPIO_nKEY_CAMERA,
11897 +       },
11898 +       [3] = {
11899 +               .start = M800_GPIO_nKEY_RECORD,
11900 +               .end   = M800_GPIO_nKEY_RECORD,
11901 +       },
11902 +       [2] = {
11903 +               .start = M800_GPIO_SLIDE,
11904 +               .end   = M800_GPIO_SLIDE,
11905 +       },
11906 +};
11907 +
11908 +static struct platform_device m800_button_dev = {
11909 +       .name           = "m800-button",
11910 +       .num_resources  = ARRAY_SIZE(m800_button_resources),
11911 +       .resource       = m800_button_resources,
11912 +};
11913 +
11914 +static struct platform_device m800_pm_bt_dev = {
11915 +       .name           = "neo1973-pm-bt",
11916 +};
11917 +
11918 +static void __init glofiish_map_io(void)
11919 +{
11920 +       s3c24xx_init_io(m800_iodesc, ARRAY_SIZE(m800_iodesc));
11921 +       s3c24xx_init_clocks(16934400);
11922 +       s3c24xx_init_uarts(m800_uartcfgs, ARRAY_SIZE(m800_uartcfgs));
11923 +}
11924 +
11925 +static irqreturn_t gta02_modem_irq(int irq, void *param)
11926 +{
11927 +       printk(KERN_DEBUG "modem wakeup interrupt\n");
11928 +       return IRQ_HANDLED;
11929 +}
11930 +
11931 +static irqreturn_t ar6000_wow_irq(int irq, void *param)
11932 +{
11933 +       printk(KERN_DEBUG "ar6000_wow interrupt\n");
11934 +       return IRQ_HANDLED;
11935 +}
11936 +
11937 +/*
11938 + * hardware_ecc=1|0
11939 + */
11940 +static char hardware_ecc_str[4] __initdata = "";
11941 +
11942 +static int __init hardware_ecc_setup(char *str)
11943 +{
11944 +       if (str)
11945 +               strlcpy(hardware_ecc_str, str, sizeof(hardware_ecc_str));
11946 +       return 1;
11947 +}
11948 +
11949 +__setup("hardware_ecc=", hardware_ecc_setup);
11950 +
11951 +static void __init glofiish_machine_init(void)
11952 +{
11953 +       int rc;
11954 +
11955 +       /* set the panic callback to make AUX blink fast */
11956 +       panic_blink = glofiish_panic_blink;
11957 +
11958 +       /* do not force soft ecc if we are asked to use hardware_ecc */
11959 +       if (hardware_ecc_str[0] == '1')
11960 +               glofiish_nand_info.software_ecc = 0;
11961 +
11962 +       s3c_device_usb.dev.platform_data = &glofiish_usb_info;
11963 +       s3c_device_nand.dev.platform_data = &glofiish_nand_info;
11964 +       s3c_device_sdi.dev.platform_data = &glofiish_mmc_cfg;
11965 +
11966 +       s3c24xx_fb_set_platdata(&glofiish_lcd_cfg);
11967 +       s3c24xx_udc_set_platdata(&glofiish_udc_cfg);
11968 +       set_s3c2410ts_info(&glofiish_ts_cfg);
11969 +
11970 +       platform_device_register(&gta01_bl_dev);
11971 +       platform_device_register(&m800_pm_bt_dev);
11972 +       platform_device_register(&m800_button_dev);
11973 +       platform_device_register(&s3c_device_spi_lcm);
11974 +
11975 +       platform_add_devices(glofiish_devices, ARRAY_SIZE(glofiish_devices));
11976 +
11977 +       s3c2410_pm_init();
11978 +}
11979 +
11980 +MACHINE_START(M800, "Glofiish M800")
11981 +       .phys_io        = S3C2410_PA_UART,
11982 +       .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
11983 +       .boot_params    = S3C2410_SDRAM_PA + 0x100,
11984 +       .map_io         = glofiish_map_io,
11985 +       .init_irq       = s3c24xx_init_irq,
11986 +       .init_machine   = glofiish_machine_init,
11987 +       .timer          = &s3c24xx_timer,
11988 +MACHINE_END
11989 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-gta02.c
11990 ===================================================================
11991 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
11992 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-gta02.c   2008-12-11 22:46:49.000000000 +0100
11993 @@ -0,0 +1,1656 @@
11994 +/*
11995 + * linux/arch/arm/mach-s3c2440/mach-gta02.c
11996 + *
11997 + * S3C2440 Machine Support for the FIC GTA02 (Neo1973)
11998 + *
11999 + * Copyright (C) 2006-2007 by Openmoko, Inc.
12000 + * Author: Harald Welte <laforge@openmoko.org>
12001 + * All rights reserved.
12002 + *
12003 + * This program is free software; you can redistribute it and/or
12004 + * modify it under the terms of the GNU General Public License as
12005 + * published by the Free Software Foundation; either version 2 of
12006 + * the License, or (at your option) any later version.
12007 + *
12008 + * This program is distributed in the hope that it will be useful,
12009 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
12010 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12011 + * GNU General Public License for more details.
12012 + *
12013 + * You should have received a copy of the GNU General Public License
12014 + * along with this program; if not, write to the Free Software
12015 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
12016 + * MA 02111-1307 USA
12017 + *
12018 + */
12019 +
12020 +#include <linux/kernel.h>
12021 +#include <linux/types.h>
12022 +#include <linux/interrupt.h>
12023 +#include <linux/list.h>
12024 +#include <linux/delay.h>
12025 +#include <linux/timer.h>
12026 +#include <linux/init.h>
12027 +#include <linux/workqueue.h>
12028 +#include <linux/platform_device.h>
12029 +#include <linux/serial_core.h>
12030 +#include <linux/spi/spi.h>
12031 +#include <linux/spi/glamo.h>
12032 +#include <linux/spi/spi_bitbang.h>
12033 +#include <linux/mmc/host.h>
12034 +
12035 +#include <linux/mtd/mtd.h>
12036 +#include <linux/mtd/nand.h>
12037 +#include <linux/mtd/nand_ecc.h>
12038 +#include <linux/mtd/partitions.h>
12039 +#include <linux/mtd/physmap.h>
12040 +
12041 +#include <linux/pcf50633.h>
12042 +#include <linux/lis302dl.h>
12043 +
12044 +#include <asm/mach/arch.h>
12045 +#include <asm/mach/map.h>
12046 +#include <asm/mach/irq.h>
12047 +
12048 +#include <asm/hardware.h>
12049 +#include <asm/io.h>
12050 +#include <asm/irq.h>
12051 +#include <asm/mach-types.h>
12052 +
12053 +#include <asm/arch-s3c2410/regs-irq.h>
12054 +#include <asm/arch/regs-gpio.h>
12055 +#include <asm/arch/regs-gpioj.h>
12056 +#include <asm/arch/fb.h>
12057 +#include <asm/arch/mci.h>
12058 +#include <asm/arch/ts.h>
12059 +#include <asm/arch/spi.h>
12060 +#include <asm/arch/spi-gpio.h>
12061 +#include <asm/arch/usb-control.h>
12062 +
12063 +#include <asm/arch/gta02.h>
12064 +
12065 +#include <asm/plat-s3c/regs-serial.h>
12066 +#include <asm/plat-s3c/nand.h>
12067 +#include <asm/plat-s3c24xx/devs.h>
12068 +#include <asm/plat-s3c24xx/cpu.h>
12069 +#include <asm/plat-s3c24xx/pm.h>
12070 +#include <asm/plat-s3c24xx/udc.h>
12071 +#include <asm/plat-s3c24xx/neo1973.h>
12072 +#include <asm/arch-s3c2410/neo1973-pm-gsm.h>
12073 +
12074 +#include <linux/jbt6k74.h>
12075 +
12076 +#include <linux/glamofb.h>
12077 +
12078 +#include <asm/arch/fiq_ipc_gta02.h>
12079 +#include "fiq_c_isr.h"
12080 +#include <linux/gta02_hdq.h>
12081 +#include <linux/bq27000_battery.h>
12082 +
12083 +#include "../plat-s3c24xx/neo1973_pm_gps.h"
12084 +
12085 +/* arbitrates which sensor IRQ owns the shared SPI bus */
12086 +static spinlock_t motion_irq_lock;
12087 +
12088 +/* the dependency of jbt / LCM on pcf50633 resume */
12089 +struct resume_dependency resume_dep_jbt_pcf;
12090 +/* the dependency of jbt / LCM on glamo resume */
12091 +struct resume_dependency resume_dep_jbt_glamo;
12092 +/* the dependency of Glamo MCI on pcf50633 resume (has to power SD slot) */
12093 +struct resume_dependency resume_dep_glamo_mci_pcf;
12094 +
12095 +
12096 +static int gta02_charger_online_status;
12097 +static int gta02_charger_active_status;
12098 +
12099 +/* define FIQ IPC struct */
12100 +/*
12101 + * contains stuff FIQ ISR modifies and normal kernel code can see and use
12102 + * this is defined in <asm/arch/fiq_ipc_gta02.h>, you should customize
12103 + * the definition in there and include the same definition in your kernel
12104 + * module that wants to interoperate with your FIQ code.
12105 + */
12106 +struct fiq_ipc fiq_ipc;
12107 +EXPORT_SYMBOL(fiq_ipc);
12108 +
12109 +#define DIVISOR_FROM_US(x) ((x) << 1)
12110 +
12111 +#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100)
12112 +
12113 +#ifdef CONFIG_GTA02_HDQ
12114 +/* HDQ specific */
12115 +#define HDQ_SAMPLE_PERIOD_US 20
12116 +/* private HDQ FSM state -- all other info interesting for caller in fiq_ipc */
12117 +static enum hdq_bitbang_states hdq_state;
12118 +static u8 hdq_ctr;
12119 +static u8 hdq_ctr2;
12120 +static u8 hdq_bit;
12121 +static u8 hdq_shifter;
12122 +static u8 hdq_tx_data_done;
12123 +
12124 +#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(HDQ_SAMPLE_PERIOD_US)
12125 +#endif
12126 +/* define FIQ ISR */
12127 +
12128 +FIQ_HANDLER_START()
12129 +/* define your locals here -- no initializers though */
12130 +       u16 divisor;
12131 +FIQ_HANDLER_ENTRY(256, 512)
12132 +/* Your ISR here :-) */
12133 +       divisor = 0xffff;
12134 +
12135 +       /* Vibrator servicing */
12136 +
12137 +       if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */
12138 +               if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched)
12139 +                       neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 0);
12140 +               if (((u8)_fiq_count_fiqs) == 0) {
12141 +                       fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm;
12142 +                       if (fiq_ipc.vib_pwm_latched)
12143 +                               neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 1);
12144 +               }
12145 +               divisor = FIQ_DIVISOR_VIBRATOR;
12146 +       }
12147 +
12148 +#ifdef CONFIG_GTA02_HDQ
12149 +       /* HDQ servicing */
12150 +
12151 +       switch (hdq_state) {
12152 +       case HDQB_IDLE:
12153 +               if (fiq_ipc.hdq_request_ctr == fiq_ipc.hdq_transaction_ctr)
12154 +                       break;
12155 +               hdq_ctr = 210 / HDQ_SAMPLE_PERIOD_US;
12156 +               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
12157 +               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
12158 +               hdq_tx_data_done = 0;
12159 +               hdq_state = HDQB_TX_BREAK;
12160 +               break;
12161 +
12162 +       case HDQB_TX_BREAK: /* issue low for > 190us */
12163 +               if (--hdq_ctr == 0) {
12164 +                       hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
12165 +                       hdq_state = HDQB_TX_BREAK_RECOVERY;
12166 +                       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
12167 +               }
12168 +               break;
12169 +
12170 +       case HDQB_TX_BREAK_RECOVERY: /* issue low for > 40us */
12171 +               if (--hdq_ctr)
12172 +                       break;
12173 +               hdq_shifter = fiq_ipc.hdq_ads;
12174 +               hdq_bit = 8; /* 8 bits of ads / rw */
12175 +               hdq_tx_data_done = 0; /* doing ads */
12176 +               /* fallthru on last one */
12177 +       case HDQB_ADS_CALC:
12178 +               if (hdq_shifter & 1)
12179 +                       hdq_ctr = 50 / HDQ_SAMPLE_PERIOD_US;
12180 +               else
12181 +                       hdq_ctr = 120 / HDQ_SAMPLE_PERIOD_US;
12182 +               /* carefully precompute the other phase length */
12183 +               hdq_ctr2 = (210 - (hdq_ctr * HDQ_SAMPLE_PERIOD_US)) /
12184 +                               HDQ_SAMPLE_PERIOD_US;
12185 +               hdq_state = HDQB_ADS_LOW;
12186 +               hdq_shifter >>= 1;
12187 +               hdq_bit--;
12188 +               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
12189 +               break;
12190 +
12191 +       case HDQB_ADS_LOW:
12192 +               if (--hdq_ctr)
12193 +                       break;
12194 +               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
12195 +               hdq_state = HDQB_ADS_HIGH;
12196 +               break;
12197 +
12198 +       case HDQB_ADS_HIGH:
12199 +               if (--hdq_ctr2 > 1) /* account for HDQB_ADS_CALC */
12200 +                       break;
12201 +               if (hdq_bit) { /* more bits to do */
12202 +                       hdq_state = HDQB_ADS_CALC;
12203 +                       break;
12204 +               }
12205 +               /* no more bits, wait it out until hdq_ctr2 exhausted */
12206 +               if (hdq_ctr2)
12207 +                       break;
12208 +               /* ok no more bits and very last state */
12209 +               hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
12210 +               /* FIXME 0 = read */
12211 +               if (fiq_ipc.hdq_ads & 0x80) { /* write the byte out */
12212 +                        /* set delay before payload */
12213 +                       hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
12214 +                       /* already high, no need to write */
12215 +                       hdq_state = HDQB_WAIT_TX;
12216 +                       break;
12217 +               }
12218 +               /* read the next byte */
12219 +               hdq_bit = 8; /* 8 bits of data */
12220 +               hdq_ctr = 3000 / HDQ_SAMPLE_PERIOD_US;
12221 +               hdq_state = HDQB_WAIT_RX;
12222 +               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
12223 +               break;
12224 +
12225 +       case HDQB_WAIT_TX: /* issue low for > 40us */
12226 +               if (--hdq_ctr)
12227 +                       break;
12228 +               if (!hdq_tx_data_done) { /* was that the data sent? */
12229 +                       hdq_tx_data_done++;
12230 +                       hdq_shifter = fiq_ipc.hdq_tx_data;
12231 +                       hdq_bit = 8; /* 8 bits of data */
12232 +                       hdq_state = HDQB_ADS_CALC; /* start sending */
12233 +                       break;
12234 +               }
12235 +               fiq_ipc.hdq_error = 0;
12236 +               fiq_ipc.hdq_transaction_ctr++;
12237 +               hdq_state = HDQB_IDLE; /* all tx is done */
12238 +               /* idle in input mode, it's pulled up by 10K */
12239 +               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
12240 +               break;
12241 +
12242 +       case HDQB_WAIT_RX: /* wait for battery to talk to us */
12243 +               if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin) == 0) {
12244 +                       /* it talks to us! */
12245 +                       hdq_ctr2 = 1;
12246 +                       hdq_bit = 8; /* 8 bits of data */
12247 +                       /* timeout */
12248 +                       hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
12249 +                       hdq_state = HDQB_DATA_RX_LOW;
12250 +                       break;
12251 +               }
12252 +               if (--hdq_ctr == 0) { /* timed out, error */
12253 +                       fiq_ipc.hdq_error = 1;
12254 +                       fiq_ipc.hdq_transaction_ctr++;
12255 +                       hdq_state = HDQB_IDLE; /* abort */
12256 +               }
12257 +               break;
12258 +
12259 +       /*
12260 +        * HDQ basically works by measuring the low time of the bit cell
12261 +        * 32-50us --> '1', 80 - 145us --> '0'
12262 +        */
12263 +
12264 +       case HDQB_DATA_RX_LOW:
12265 +               if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
12266 +                       fiq_ipc.hdq_rx_data >>= 1;
12267 +                       if (hdq_ctr2 <= (65 / HDQ_SAMPLE_PERIOD_US))
12268 +                               fiq_ipc.hdq_rx_data |= 0x80;
12269 +
12270 +                       if (--hdq_bit == 0) {
12271 +                               fiq_ipc.hdq_error = 0;
12272 +                               fiq_ipc.hdq_transaction_ctr++; /* done */
12273 +                               hdq_state = HDQB_IDLE;
12274 +                       } else
12275 +                               hdq_state = HDQB_DATA_RX_HIGH;
12276 +                       /* timeout */
12277 +                       hdq_ctr = 1000 / HDQ_SAMPLE_PERIOD_US;
12278 +                       hdq_ctr2 = 1;
12279 +                       break;
12280 +               }
12281 +               hdq_ctr2++;
12282 +               if (--hdq_ctr)
12283 +                       break;
12284 +                /* timed out, error */
12285 +               fiq_ipc.hdq_error = 2;
12286 +               fiq_ipc.hdq_transaction_ctr++;
12287 +               hdq_state = HDQB_IDLE; /* abort */
12288 +               break;
12289 +
12290 +       case HDQB_DATA_RX_HIGH:
12291 +               if (!s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
12292 +                       /* it talks to us! */
12293 +                       hdq_ctr2 = 1;
12294 +                       /* timeout */
12295 +                       hdq_ctr = 400 / HDQ_SAMPLE_PERIOD_US;
12296 +                       hdq_state = HDQB_DATA_RX_LOW;
12297 +                       break;
12298 +               }
12299 +               if (--hdq_ctr)
12300 +                       break;
12301 +               /* timed out, error */
12302 +               fiq_ipc.hdq_error = 3;
12303 +               fiq_ipc.hdq_transaction_ctr++;
12304 +               /* we're in input mode already */
12305 +               hdq_state = HDQB_IDLE; /* abort */
12306 +               break;
12307 +       }
12308 +
12309 +       if (hdq_state != HDQB_IDLE) /* ie, not idle */
12310 +               if (divisor > FIQ_DIVISOR_HDQ)
12311 +                       divisor = FIQ_DIVISOR_HDQ; /* keep us going */
12312 +#endif
12313 +
12314 +       /* disable further timer interrupts if nobody has any work
12315 +        * or adjust rate according to who still has work
12316 +        *
12317 +        * CAUTION: it means forground code must disable FIQ around
12318 +        * its own non-atomic S3C2410_INTMSK changes... not common
12319 +        * thankfully and taken care of by the fiq-basis patch
12320 +        */
12321 +       if (divisor == 0xffff) /* mask the fiq irq source */
12322 +               __raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask,
12323 +                            S3C2410_INTMSK);
12324 +       else /* still working, maybe at a different rate */
12325 +               __raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index));
12326 +       _fiq_timer_divisor = divisor;
12327 +
12328 +FIQ_HANDLER_END()
12329 +
12330 +
12331 +/*
12332 + * this gets called every 1ms when we paniced.
12333 + */
12334 +
12335 +static long gta02_panic_blink(long count)
12336 +{
12337 +       long delay = 0;
12338 +       static long last_blink;
12339 +       static char led;
12340 +
12341 +       if (count - last_blink < 100) /* 200ms period, fast blink */
12342 +               return 0;
12343 +
12344 +       led ^= 1;
12345 +       s3c2410_gpio_cfgpin(GTA02_GPIO_AUX_LED, S3C2410_GPIO_OUTPUT);
12346 +       neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, led);
12347 +
12348 +       last_blink = count;
12349 +       return delay;
12350 +}
12351 +
12352 +
12353 +/**
12354 + * returns PCB revision information in b9,b8 and b2,b1,b0
12355 + * Pre-GTA02 A6 returns 0x000
12356 + *     GTA02 A6 returns 0x101
12357 + *     ...
12358 + */
12359 +
12360 +int gta02_get_pcb_revision(void)
12361 +{
12362 +       int n;
12363 +       int u = 0;
12364 +       static unsigned long pinlist[] = {
12365 +               GTA02_PCB_ID1_0,
12366 +               GTA02_PCB_ID1_1,
12367 +               GTA02_PCB_ID1_2,
12368 +               GTA02_PCB_ID2_0,
12369 +               GTA02_PCB_ID2_1,
12370 +       };
12371 +       static int pin_offset[] = {
12372 +               0, 1, 2, 8, 9
12373 +       };
12374 +
12375 +       for (n = 0 ; n < ARRAY_SIZE(pinlist); n++) {
12376 +               /*
12377 +                * set the PCB version GPIO to be pulled-down input
12378 +                * force low briefly first
12379 +                */
12380 +               s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT);
12381 +               s3c2410_gpio_setpin(pinlist[n], 0);
12382 +               /* misnomer: it is a pullDOWN in 2442 */
12383 +               s3c2410_gpio_pullup(pinlist[n], 1);
12384 +               s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_INPUT);
12385 +
12386 +               udelay(10);
12387 +
12388 +               if (s3c2410_gpio_getpin(pinlist[n]))
12389 +                       u |= 1 << pin_offset[n];
12390 +
12391 +               /*
12392 +               * when not being interrogated, all of the revision GPIO
12393 +               * are set to output HIGH without pulldown so no current flows
12394 +               * if they are NC or pulled up.
12395 +               */
12396 +               s3c2410_gpio_setpin(pinlist[n], 1);
12397 +               s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT);
12398 +               /* misnomer: it is a pullDOWN in 2442 */
12399 +               s3c2410_gpio_pullup(pinlist[n], 0);
12400 +       }
12401 +
12402 +       return u;
12403 +}
12404 +
12405 +struct platform_device gta02_version_device = {
12406 +       .name           = "neo1973-version",
12407 +       .num_resources  = 0,
12408 +};
12409 +
12410 +struct platform_device gta02_resume_reason_device = {
12411 +       .name           = "neo1973-resume",
12412 +       .num_resources  = 0,
12413 +};
12414 +
12415 +struct platform_device gta02_memconfig_device = {
12416 +       .name           = "neo1973-memconfig",
12417 +       .num_resources  = 0,
12418 +};
12419 +
12420 +static struct map_desc gta02_iodesc[] __initdata = {
12421 +       {
12422 +               .virtual        = 0xe0000000,
12423 +               .pfn            = __phys_to_pfn(S3C2410_CS3+0x01000000),
12424 +               .length         = SZ_1M,
12425 +               .type           = MT_DEVICE
12426 +       },
12427 +};
12428 +
12429 +#define UCON S3C2410_UCON_DEFAULT
12430 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
12431 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
12432 +
12433 +static struct s3c2410_uartcfg gta02_uartcfgs[] = {
12434 +       [0] = {
12435 +               .hwport      = 0,
12436 +               .flags       = 0,
12437 +               .ucon        = UCON,
12438 +               .ulcon       = ULCON,
12439 +               .ufcon       = UFCON,
12440 +       },
12441 +       [1] = {
12442 +               .hwport      = 1,
12443 +               .flags       = 0,
12444 +               .ucon        = UCON,
12445 +               .ulcon       = ULCON,
12446 +               .ufcon       = UFCON,
12447 +       },
12448 +       [2] = {
12449 +               .hwport      = 2,
12450 +               .flags       = 0,
12451 +               .ucon        = UCON,
12452 +               .ulcon       = ULCON,
12453 +               .ufcon       = UFCON,
12454 +       },
12455 +
12456 +};
12457 +
12458 +/* BQ27000 Battery */
12459 +
12460 +static int gta02_get_charger_online_status(void)
12461 +{
12462 +       return gta02_charger_online_status;
12463 +}
12464 +
12465 +static int gta02_get_charger_active_status(void)
12466 +{
12467 +       return gta02_charger_active_status;
12468 +}
12469 +
12470 +
12471 +struct bq27000_platform_data bq27000_pdata = {
12472 +       .name = "bat",
12473 +       .rsense_mohms = 20,
12474 +       .hdq_read = gta02hdq_read,
12475 +       .hdq_write = gta02hdq_write,
12476 +       .hdq_initialized = gta02hdq_initialized,
12477 +       .get_charger_online_status = gta02_get_charger_online_status,
12478 +       .get_charger_active_status = gta02_get_charger_active_status
12479 +};
12480 +
12481 +struct platform_device bq27000_battery_device = {
12482 +       .name           = "bq27000-battery",
12483 +       .dev = {
12484 +               .platform_data = &bq27000_pdata,
12485 +       },
12486 +};
12487 +
12488 +
12489 +/* PMU driver info */
12490 +
12491 +static int pmu_callback(struct device *dev, unsigned int feature,
12492 +                       enum pmu_event event)
12493 +{
12494 +       switch (feature) {
12495 +       case PCF50633_FEAT_MBC:
12496 +               switch (event) {
12497 +               case PMU_EVT_CHARGER_IDLE:
12498 +                       gta02_charger_active_status = 0;
12499 +                       break;
12500 +               case PMU_EVT_CHARGER_ACTIVE:
12501 +                       gta02_charger_active_status = 1;
12502 +                       break;
12503 +               case PMU_EVT_USB_INSERT:
12504 +                       gta02_charger_online_status = 1;
12505 +                       break;
12506 +               case PMU_EVT_USB_REMOVE:
12507 +                       gta02_charger_online_status = 0;
12508 +                       break;
12509 +               case PMU_EVT_INSERT: /* adapter is unsused */
12510 +               case PMU_EVT_REMOVE: /* adapter is unused */
12511 +                       break;
12512 +               default:
12513 +                       break;
12514 +               }
12515 +               break;
12516 +       default:
12517 +               break;
12518 +       }
12519 +
12520 +       bq27000_charging_state_change(&bq27000_battery_device);
12521 +       return 0;
12522 +}
12523 +
12524 +static struct platform_device gta01_pm_gps_dev = {
12525 +       .name           = "neo1973-pm-gps",
12526 +};
12527 +
12528 +static struct platform_device gta01_pm_bt_dev = {
12529 +       .name           = "neo1973-pm-bt",
12530 +};
12531 +
12532 +/* this is called when pc50633 is probed, unfortunately quite late in the
12533 + * day since it is an I2C bus device.  Here we can belatedly define some
12534 + * platform devices with the advantage that we can mark the pcf50633 as the
12535 + * parent.  This makes them get suspended and resumed with their parent
12536 + * the pcf50633 still around.
12537 + */
12538 +
12539 +static void gta02_pcf50633_attach_child_devices(struct device *parent_device)
12540 +{
12541 +       gta01_pm_gps_dev.dev.parent = parent_device;
12542 +       gta01_pm_bt_dev.dev.parent = parent_device;
12543 +       platform_device_register(&gta01_pm_bt_dev);
12544 +       platform_device_register(&gta01_pm_gps_dev);
12545 +}
12546 +
12547 +static struct pcf50633_platform_data gta02_pcf_pdata = {
12548 +       .used_features  = PCF50633_FEAT_MBC |
12549 +                         PCF50633_FEAT_BBC |
12550 +                         PCF50633_FEAT_RTC |
12551 +                         PCF50633_FEAT_CHGCUR |
12552 +                         PCF50633_FEAT_BATVOLT |
12553 +                         PCF50633_FEAT_BATTEMP |
12554 +                         PCF50633_FEAT_PWM_BL,
12555 +       .onkey_seconds_sig_init = 4,
12556 +       .onkey_seconds_shutdown = 8,
12557 +       .cb             = &pmu_callback,
12558 +       .r_fix_batt     = 10000,
12559 +       .r_fix_batt_par = 10000,
12560 +       .r_sense_milli  = 220,
12561 +       .flag_use_apm_emulation = 0,
12562 +       .resumers = {
12563 +               [0] = PCF50633_INT1_USBINS |
12564 +                     PCF50633_INT1_USBREM |
12565 +                     PCF50633_INT1_ALARM,
12566 +               [1] = PCF50633_INT2_ONKEYF,
12567 +               [2] = PCF50633_INT3_ONKEY1S
12568 +       },
12569 +       /* warning: these get rewritten during machine init below
12570 +        * depending on pcb variant
12571 +        */
12572 +       .rails  = {
12573 +               [PCF50633_REGULATOR_AUTO] = {
12574 +                       .name           = "io_3v3",
12575 +                       .flags          = PMU_VRAIL_F_SUSPEND_ON,
12576 +                       .voltage        = {
12577 +                               .init   = 3300,
12578 +                               .max    = 3300,
12579 +                       },
12580 +               },
12581 +               [PCF50633_REGULATOR_DOWN1] = {
12582 +                       .name           = "core_1v3",
12583 +                       /* Wow, when we are going into suspend, after pcf50633
12584 +                        * runs its suspend (which happens real early since it
12585 +                        * is an i2c device) we are running out of the 22uF cap
12586 +                        * on core_1v3 rail !!!!
12587 +                        */
12588 +                       .voltage        = {
12589 +                               .init   = 1300,
12590 +                               .max    = 1600,
12591 +                       },
12592 +               },
12593 +               [PCF50633_REGULATOR_DOWN2] = {
12594 +                       .name           = "core_1v8",
12595 +                       .flags          = PMU_VRAIL_F_SUSPEND_ON,
12596 +                       .voltage        = {
12597 +                               .init   = 1800,
12598 +                               .max    = 1800,
12599 +                       },
12600 +               },
12601 +               [PCF50633_REGULATOR_HCLDO] = {
12602 +                       .name           = "sd_3v3",
12603 +                       .voltage        = {
12604 +                               .init   = 2000,
12605 +                               .max    = 3300,
12606 +                       },
12607 +               },
12608 +               [PCF50633_REGULATOR_LDO1] = {
12609 +                       .name           = "gsensor_3v3",
12610 +                       .voltage        = {
12611 +                               .init   = 1300,
12612 +                               .max    = 1330,
12613 +                       },
12614 +               },
12615 +               [PCF50633_REGULATOR_LDO2] = {
12616 +                       .name           = "codec_3v3",
12617 +                       .voltage        = {
12618 +                               .init   = 3300,
12619 +                               .max    = 3300,
12620 +                       },
12621 +               },
12622 +               [PCF50633_REGULATOR_LDO3] = {
12623 +                       .name           = "unused3",
12624 +                       .voltage        = {
12625 +                               .init   = 3000,
12626 +                               .max    = 3000,
12627 +                       },
12628 +               },
12629 +               [PCF50633_REGULATOR_LDO4] = {
12630 +                       .name           = "bt_3v2",
12631 +                       .voltage        = {
12632 +                               .init   = 2500,
12633 +                               .max    = 3300,
12634 +                       },
12635 +               },
12636 +               [PCF50633_REGULATOR_LDO5] = {
12637 +                       .name           = "rf3v",
12638 +                       .voltage        = {
12639 +                               .init   = 1500,
12640 +                               .max    = 1500,
12641 +                       },
12642 +               },
12643 +               [PCF50633_REGULATOR_LDO6] = {
12644 +                       .name           = "lcm_3v",
12645 +                       .flags = PMU_VRAIL_F_SUSPEND_ON,
12646 +                       .voltage        = {
12647 +                               .init   = 0,
12648 +                               .max    = 3300,
12649 +                       },
12650 +               },
12651 +               [PCF50633_REGULATOR_MEMLDO] = {
12652 +                       .name           = "memldo",
12653 +                       .flags = PMU_VRAIL_F_SUSPEND_ON,
12654 +                       .voltage        = {
12655 +                               .init   = 1800,
12656 +                               .max    = 1800,
12657 +                       },
12658 +               },
12659 +       },
12660 +       .defer_resume_backlight = 1,
12661 +       .resume_backlight_ramp_speed = 5,
12662 +       .attach_child_devices = gta02_pcf50633_attach_child_devices
12663 +
12664 +};
12665 +
12666 +#if 0 /* currently unused */
12667 +static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name,
12668 +                         unsigned int flags, unsigned int init,
12669 +                         unsigned int max)
12670 +{
12671 +       vrail->name = name;
12672 +       vrail->flags = flags;
12673 +       vrail->voltage.init = init;
12674 +       vrail->voltage.max = max;
12675 +}
12676 +#endif
12677 +
12678 +static void mangle_pmu_pdata_by_system_rev(void)
12679 +{
12680 +       switch (system_rev) {
12681 +       case GTA02v1_SYSTEM_REV:
12682 +               /* FIXME: this is only in v1 due to wrong PMU variant */
12683 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags =
12684 +                                                       PMU_VRAIL_F_SUSPEND_ON;
12685 +               break;
12686 +       case GTA02v2_SYSTEM_REV:
12687 +       case GTA02v3_SYSTEM_REV:
12688 +       case GTA02v4_SYSTEM_REV:
12689 +       case GTA02v5_SYSTEM_REV:
12690 +       case GTA02v6_SYSTEM_REV:
12691 +               /* we need to keep the 1.8V going since this is the SDRAM
12692 +                * self-refresh voltage */
12693 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].flags =
12694 +                                                       PMU_VRAIL_F_SUSPEND_ON;
12695 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_DOWN2].name =
12696 +                                                       "io_1v8",
12697 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].name =
12698 +                                                       "gsensor_3v3",
12699 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.init =
12700 +                                                       3300;
12701 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].voltage.max =
12702 +                                                       3300;
12703 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO1].flags &=
12704 +                                                       ~PMU_VRAIL_F_SUSPEND_ON;
12705 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO3].flags =
12706 +                                                       PMU_VRAIL_F_UNUSED;
12707 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO5] = ((struct pmu_voltage_rail) {
12708 +                                                       .name = "rf_3v",
12709 +                                                       .voltage = {
12710 +                                                               .init = 0,
12711 +                                                               .max = 3000,
12712 +                                                       }
12713 +                                               });
12714 +               gta02_pcf_pdata.rails[PCF50633_REGULATOR_LDO6] =
12715 +                                       ((struct pmu_voltage_rail) {
12716 +                                               .name = "lcm_3v",
12717 +                                               .flags = PMU_VRAIL_F_SUSPEND_ON,
12718 +                                               .voltage = {
12719 +                                                       .init = 3000,
12720 +                                                       .max = 3000,
12721 +                                               }
12722 +                                       });
12723 +               break;
12724 +       default:
12725 +               break;
12726 +       }
12727 +}
12728 +
12729 +static struct resource gta02_pmu_resources[] = {
12730 +       [0] = {
12731 +               .flags  = IORESOURCE_IRQ,
12732 +               .start  = GTA02_IRQ_PCF50633,
12733 +               .end    = GTA02_IRQ_PCF50633,
12734 +       },
12735 +};
12736 +
12737 +struct platform_device gta02_pmu_dev = {
12738 +       .name           = "pcf50633",
12739 +       .num_resources  = ARRAY_SIZE(gta02_pmu_resources),
12740 +       .resource       = gta02_pmu_resources,
12741 +       .dev            = {
12742 +               .platform_data = &gta02_pcf_pdata,
12743 +       },
12744 +};
12745 +
12746 +/* FIQ */
12747 +
12748 +static struct resource sc32440_fiq_resources[] = {
12749 +       [0] = {
12750 +               .flags  = IORESOURCE_IRQ,
12751 +               .start  = IRQ_TIMER3,
12752 +               .end    = IRQ_TIMER3,
12753 +       },
12754 +};
12755 +
12756 +struct platform_device sc32440_fiq_device = {
12757 +       .name           = "sc32440_fiq",
12758 +       .num_resources  = 1,
12759 +       .resource       = sc32440_fiq_resources,
12760 +};
12761 +
12762 +#ifdef CONFIG_GTA02_HDQ
12763 +/* HDQ */
12764 +
12765 +static struct resource gta02_hdq_resources[] = {
12766 +       [0] = {
12767 +               .start  = GTA02v5_GPIO_HDQ,
12768 +               .end    = GTA02v5_GPIO_HDQ,
12769 +       },
12770 +};
12771 +
12772 +struct platform_device gta02_hdq_device = {
12773 +       .name           = "gta02-hdq",
12774 +       .num_resources  = 1,
12775 +       .resource       = gta02_hdq_resources,
12776 +};
12777 +#endif
12778 +
12779 +
12780 +/* NOR Flash */
12781 +
12782 +#define GTA02_FLASH_BASE       0x18000000 /* GCS3 */
12783 +#define GTA02_FLASH_SIZE       0x200000 /* 2MBytes */
12784 +
12785 +static struct physmap_flash_data gta02_nor_flash_data = {
12786 +       .width          = 2,
12787 +};
12788 +
12789 +static struct resource gta02_nor_flash_resource = {
12790 +       .start          = GTA02_FLASH_BASE,
12791 +       .end            = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,
12792 +       .flags          = IORESOURCE_MEM,
12793 +};
12794 +
12795 +static struct platform_device gta02_nor_flash = {
12796 +       .name           = "physmap-flash",
12797 +       .id             = 0,
12798 +       .dev            = {
12799 +                               .platform_data  = &gta02_nor_flash_data,
12800 +                       },
12801 +       .resource       = &gta02_nor_flash_resource,
12802 +       .num_resources  = 1,
12803 +};
12804 +
12805 +
12806 +
12807 +static struct resource gta02_sdio_resources[] = {
12808 +       [0] = {
12809 +               .flags  = IORESOURCE_IRQ,
12810 +               .start  = IRQ_SDI,
12811 +               .end    = IRQ_SDI,
12812 +       },
12813 +       [1] = {
12814 +               .flags = IORESOURCE_MEM,
12815 +               .start = S3C2410_PA_SDI,
12816 +               .end   = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
12817 +       },
12818 +       [2] = {
12819 +               .flags = IORESOURCE_DMA,
12820 +               .start = 0, /* Channel 0 for SDI */
12821 +               .end = 0,
12822 +       },
12823 +};
12824 +
12825 +
12826 +static struct platform_device gta02_sdio_dev = {
12827 +        .name           = "s3c24xx-sdio",
12828 +        .id             = -1,
12829 +        .dev            = {
12830 +                                .coherent_dma_mask      = 0xffffffff,
12831 +        },
12832 +        .resource       = gta02_sdio_resources,
12833 +        .num_resources  = ARRAY_SIZE(gta02_sdio_resources),
12834 +};
12835 +
12836 +struct platform_device s3c24xx_pwm_device = {
12837 +       .name           = "s3c24xx_pwm",
12838 +       .num_resources  = 0,
12839 +};
12840 +
12841 +
12842 +static struct platform_device *gta02_devices[] __initdata = {
12843 +       &s3c_device_usb,
12844 +       &s3c_device_wdt,
12845 +       &s3c_device_i2c,
12846 +       &s3c_device_iis,
12847 +       // &s3c_device_sdi, /* FIXME: temporary disable to avoid s3cmci bind */
12848 +       &s3c_device_usbgadget,
12849 +       &s3c_device_nand,
12850 +       &s3c_device_ts,
12851 +       &gta02_nor_flash,
12852 +       &sc32440_fiq_device,
12853 +       &gta02_version_device,
12854 +       &gta02_memconfig_device,
12855 +       &gta02_resume_reason_device,
12856 +       &s3c24xx_pwm_device,
12857 +
12858 +};
12859 +
12860 +static struct s3c2410_nand_set gta02_nand_sets[] = {
12861 +       [0] = {
12862 +               .name           = "neo1973-nand",
12863 +               .nr_chips       = 1,
12864 +               .flags          = S3C2410_NAND_BBT,
12865 +       },
12866 +};
12867 +
12868 +/* choose a set of timings derived from S3C@2442B MCP54
12869 + * data sheet (K5D2G13ACM-D075 MCP Memory)
12870 + */
12871 +
12872 +static struct s3c2410_platform_nand gta02_nand_info = {
12873 +       .tacls          = 0,
12874 +       .twrph0         = 25,
12875 +       .twrph1         = 15,
12876 +       .nr_sets        = ARRAY_SIZE(gta02_nand_sets),
12877 +       .sets           = gta02_nand_sets,
12878 +       .software_ecc   = 1,
12879 +};
12880 +
12881 +static struct s3c24xx_mci_pdata gta02_mmc_cfg = {
12882 +       .gpio_detect    = GTA02v1_GPIO_nSD_DETECT,
12883 +       .set_power      = NULL,
12884 +       .ocr_avail      = MMC_VDD_32_33,
12885 +};
12886 +
12887 +static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd)
12888 +{
12889 +       printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
12890 +
12891 +       switch (cmd) {
12892 +       case S3C2410_UDC_P_ENABLE:
12893 +               neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 1);
12894 +               break;
12895 +       case S3C2410_UDC_P_DISABLE:
12896 +               neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 0);
12897 +               break;
12898 +       case S3C2410_UDC_P_RESET:
12899 +               /* FIXME! */
12900 +               break;
12901 +       default:
12902 +               break;
12903 +       }
12904 +}
12905 +
12906 +/* get PMU to set USB current limit accordingly */
12907 +
12908 +static void gta02_udc_vbus_draw(unsigned int ma)
12909 +{
12910 +        if (!pcf50633_global)
12911 +               return;
12912 +
12913 +       pcf50633_notify_usb_current_limit_change(pcf50633_global, ma);
12914 +}
12915 +
12916 +static struct s3c2410_udc_mach_info gta02_udc_cfg = {
12917 +       .vbus_draw      = gta02_udc_vbus_draw,
12918 +       .udc_command    = gta02_udc_command,
12919 +
12920 +};
12921 +
12922 +static struct s3c2410_ts_mach_info gta02_ts_cfg = {
12923 +       .delay = 10000,
12924 +       .presc = 50000000 / 1000000, /* 50 MHz PCLK / 1MHz */
12925 +       /* simple averaging, 2^n samples */
12926 +       .oversampling_shift = 5,
12927 +        /* averaging filter length, 2^n */
12928 +       .excursion_filter_len_bits = 5,
12929 +       /* flagged for beauty contest on next sample if differs from
12930 +        * average more than this
12931 +        */
12932 +       .reject_threshold_vs_avg = 2,
12933 +};
12934 +
12935 +
12936 +/* SPI: LCM control interface attached to Glamo3362 */
12937 +
12938 +static void gta02_jbt6k74_reset(int devidx, int level)
12939 +{
12940 +       glamo_lcm_reset(level);
12941 +}
12942 +
12943 +/* finally bring up deferred backlight resume now LCM is resumed itself */
12944 +
12945 +static void gta02_jbt6k74_resuming(int devidx)
12946 +{
12947 +       pcf50633_backlight_resume(pcf50633_global);
12948 +}
12949 +
12950 +static int gta02_jbt6k74_all_dependencies_resumed(int devidx)
12951 +{
12952 +       if (!resume_dep_jbt_pcf.called_flag)
12953 +               return 0;
12954 +
12955 +       if (!resume_dep_jbt_glamo.called_flag)
12956 +               return 0;
12957 +
12958 +       return 1;
12959 +}
12960 +
12961 +/* register jbt resume action to be dependent on pcf50633 and glamo resume */
12962 +
12963 +static void gta02_jbt6k74_suspending(int devindex, struct spi_device *spi)
12964 +{
12965 +       void jbt6k74_resume(void *spi); /* little white lies about types */
12966 +
12967 +       resume_dep_jbt_pcf.callback = jbt6k74_resume;
12968 +       resume_dep_jbt_pcf.context = (void *)spi;
12969 +       pcf50633_register_resume_dependency(pcf50633_global,
12970 +                                                          &resume_dep_jbt_pcf);
12971 +       resume_dep_jbt_glamo.callback = jbt6k74_resume;
12972 +       resume_dep_jbt_glamo.context = (void *)spi;
12973 +       glamo_register_resume_dependency(&resume_dep_jbt_glamo);
12974 +}
12975 +
12976 +
12977 +const struct jbt6k74_platform_data jbt6k74_pdata = {
12978 +       .reset          = gta02_jbt6k74_reset,
12979 +       .resuming       = gta02_jbt6k74_resuming,
12980 +       .suspending     = gta02_jbt6k74_suspending,
12981 +       .all_dependencies_resumed = gta02_jbt6k74_all_dependencies_resumed,
12982 +};
12983 +
12984 +static struct spi_board_info gta02_spi_board_info[] = {
12985 +       {
12986 +               .modalias       = "jbt6k74",
12987 +               /* platform_data */
12988 +               .platform_data  = &jbt6k74_pdata,
12989 +               /* controller_data */
12990 +               /* irq */
12991 +               .max_speed_hz   = 10 * 1000 * 1000,
12992 +               .bus_num        = 2,
12993 +               /* chip_select */
12994 +       },
12995 +};
12996 +
12997 +#if 0 /* currently this is not used and we use gpio spi */
12998 +static struct glamo_spi_info glamo_spi_cfg = {
12999 +       .board_size     = ARRAY_SIZE(gta02_spi_board_info),
13000 +       .board_info     = gta02_spi_board_info,
13001 +};
13002 +#endif /* 0 */
13003 +
13004 +static struct glamo_spigpio_info glamo_spigpio_cfg = {
13005 +       .pin_clk        = GLAMO_GPIO10_OUTPUT,
13006 +       .pin_mosi       = GLAMO_GPIO11_OUTPUT,
13007 +       .pin_cs         = GLAMO_GPIO12_OUTPUT,
13008 +       .pin_miso       = 0,
13009 +       .board_size     = ARRAY_SIZE(gta02_spi_board_info),
13010 +       .board_info     = gta02_spi_board_info,
13011 +};
13012 +
13013 +static struct resource gta02_vibrator_resources[] = {
13014 +       [0] = {
13015 +               .start  = GTA02_GPIO_VIBRATOR_ON,
13016 +               .end    = GTA02_GPIO_VIBRATOR_ON,
13017 +       },
13018 +};
13019 +
13020 +static struct platform_device gta02_vibrator_dev = {
13021 +       .name           = "neo1973-vibrator",
13022 +       .num_resources  = ARRAY_SIZE(gta02_vibrator_resources),
13023 +       .resource       = gta02_vibrator_resources,
13024 +};
13025 +
13026 +/* SPI: Accelerometers attached to SPI of s3c244x */
13027 +
13028 +/*
13029 + * Situation is that Linux SPI can't work in an interrupt context, so we
13030 + * implement our own bitbang here.  Arbitration is needed because not only
13031 + * can this interrupt happen at any time even if foreground wants to use
13032 + * the bitbang API from Linux, but multiple motion sensors can be on the
13033 + * same SPI bus, and multiple interrupts can happen.
13034 + *
13035 + * Foreground / interrupt arbitration is okay because the interrupts are
13036 + * disabled around all the foreground SPI code.
13037 + *
13038 + * Interrupt / Interrupt arbitration is evidently needed, otherwise we
13039 + * lose edge-triggered service after a while due to the two sensors sharing
13040 + * the SPI bus having irqs at the same time eventually.
13041 + *
13042 + * Servicing is typ 75 - 100us at 400MHz.
13043 + */
13044 +
13045 +/* #define DEBUG_SPEW_MS */
13046 +
13047 +struct lis302dl_platform_data lis302_pdata_top;
13048 +struct lis302dl_platform_data lis302_pdata_bottom;
13049 +
13050 +/*
13051 + * generic SPI RX and TX bitbang
13052 + * only call with interrupts off!
13053 + */
13054 +
13055 +static void gta02_lis302dl_bitbang(struct lis302dl_info *lis, u8 *tx,
13056 +                                            int tx_bytes, u8 *rx, int rx_bytes)
13057 +{
13058 +       struct lis302dl_platform_data *pdata = lis->pdata;
13059 +       int n;
13060 +       u8 shifter = 0;
13061 +       unsigned long other_cs;
13062 +
13063 +       /*
13064 +        * Huh.. "quirk"... CS on this device is not really "CS" like you can
13065 +        * expect.  Instead when 1 it selects I2C interface mode.  Because we
13066 +        * have 2 devices on one interface, the "disabled" device when we talk
13067 +        * to an "enabled" device sees the clocks as I2C clocks, creating
13068 +        * havoc.
13069 +        *
13070 +        * I2C sees MOSI going LOW while CLK HIGH as a START action, we must
13071 +        * ensure this is never issued.
13072 +        */
13073 +
13074 +       if (&lis302_pdata_top == pdata)
13075 +               other_cs = lis302_pdata_bottom.pin_chip_select;
13076 +       else
13077 +               other_cs = lis302_pdata_top.pin_chip_select;
13078 +
13079 +       s3c2410_gpio_setpin(other_cs, 1);
13080 +       s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
13081 +       s3c2410_gpio_setpin(pdata->pin_clk, 1);
13082 +       s3c2410_gpio_setpin(pdata->pin_chip_select, 0);
13083 +
13084 +       /* send the register index, r/w and autoinc bits */
13085 +       for (n = 0; n < (tx_bytes << 3); n++) {
13086 +               if (!(n & 7))
13087 +                       shifter = tx[n >> 3];
13088 +               s3c2410_gpio_setpin(pdata->pin_clk, 0);
13089 +               s3c2410_gpio_setpin(pdata->pin_mosi, (shifter >> 7) & 1);
13090 +               s3c2410_gpio_setpin(pdata->pin_clk, 0);
13091 +               s3c2410_gpio_setpin(pdata->pin_clk, 1);
13092 +               s3c2410_gpio_setpin(pdata->pin_clk, 1);
13093 +               shifter <<= 1;
13094 +       }
13095 +
13096 +       for (n = 0; n < (rx_bytes << 3); n++) { /* 8 bits each */
13097 +               s3c2410_gpio_setpin(pdata->pin_clk, 0);
13098 +               s3c2410_gpio_setpin(pdata->pin_clk, 0);
13099 +               shifter <<= 1;
13100 +               if (s3c2410_gpio_getpin(pdata->pin_miso))
13101 +                       shifter |= 1;
13102 +               if ((n & 7) == 7)
13103 +                       rx[n >> 3] = shifter;
13104 +               s3c2410_gpio_setpin(pdata->pin_clk, 1);
13105 +               s3c2410_gpio_setpin(pdata->pin_clk, 1);
13106 +       }
13107 +       s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
13108 +       s3c2410_gpio_setpin(other_cs, 1);
13109 +}
13110 +
13111 +
13112 +static int gta02_lis302dl_bitbang_read_reg(struct lis302dl_info *lis, u8 reg)
13113 +{
13114 +       u8 data = 0xc0 | reg; /* read, autoincrement */
13115 +       unsigned long flags;
13116 +
13117 +       local_irq_save(flags);
13118 +
13119 +       gta02_lis302dl_bitbang(lis, &data, 1, &data, 1);
13120 +
13121 +       local_irq_restore(flags);
13122 +
13123 +       return data;
13124 +}
13125 +
13126 +static void gta02_lis302dl_bitbang_write_reg(struct lis302dl_info *lis, u8 reg,
13127 +                                                                        u8 val)
13128 +{
13129 +       u8 data[2] = { 0x00 | reg, val }; /* write, no autoincrement */
13130 +       unsigned long flags;
13131 +
13132 +       local_irq_save(flags);
13133 +
13134 +       gta02_lis302dl_bitbang(lis, &data[0], 2, NULL, 0);
13135 +
13136 +       local_irq_restore(flags);
13137 +
13138 +}
13139 +
13140 +
13141 +void gta02_lis302dl_suspend_io(struct lis302dl_info *lis, int resume)
13142 +{
13143 +       struct lis302dl_platform_data *pdata = lis->pdata;
13144 +
13145 +       if (!resume) {
13146 +                /*
13147 +                * we don't want to power them with a high level
13148 +                * because GSENSOR_3V3 is not up during suspend
13149 +                */
13150 +               s3c2410_gpio_setpin(pdata->pin_chip_select, 0);
13151 +               s3c2410_gpio_setpin(pdata->pin_clk, 0);
13152 +               s3c2410_gpio_setpin(pdata->pin_mosi, 0);
13153 +               /* misnomer: it is a pullDOWN in 2442 */
13154 +               s3c2410_gpio_pullup(pdata->pin_miso, 1);
13155 +               return;
13156 +       }
13157 +
13158 +       /* back to normal */
13159 +       s3c2410_gpio_setpin(pdata->pin_chip_select, 1);
13160 +       s3c2410_gpio_setpin(pdata->pin_clk, 1);
13161 +       /* misnomer: it is a pullDOWN in 2442 */
13162 +       s3c2410_gpio_pullup(pdata->pin_miso, 0);
13163 +
13164 +       s3c2410_gpio_cfgpin(pdata->pin_chip_select, S3C2410_GPIO_OUTPUT);
13165 +       s3c2410_gpio_cfgpin(pdata->pin_clk, S3C2410_GPIO_OUTPUT);
13166 +       s3c2410_gpio_cfgpin(pdata->pin_mosi, S3C2410_GPIO_OUTPUT);
13167 +       s3c2410_gpio_cfgpin(pdata->pin_miso, S3C2410_GPIO_INPUT);
13168 +
13169 +}
13170 +
13171 +
13172 +
13173 +struct lis302dl_platform_data lis302_pdata_top = {
13174 +               .name           = "lis302-1 (top)",
13175 +               .pin_chip_select= S3C2410_GPD12,
13176 +               .pin_clk        = S3C2410_GPG7,
13177 +               .pin_mosi       = S3C2410_GPG6,
13178 +               .pin_miso       = S3C2410_GPG5,
13179 +               .interrupt      = GTA02_IRQ_GSENSOR_1,
13180 +               .open_drain     = 1, /* altered at runtime by PCB rev */
13181 +               .lis302dl_bitbang = gta02_lis302dl_bitbang,
13182 +               .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg,
13183 +               .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg,
13184 +               .lis302dl_suspend_io = gta02_lis302dl_suspend_io,
13185 +};
13186 +
13187 +struct lis302dl_platform_data lis302_pdata_bottom = {
13188 +               .name           = "lis302-2 (bottom)",
13189 +               .pin_chip_select= S3C2410_GPD13,
13190 +               .pin_clk        = S3C2410_GPG7,
13191 +               .pin_mosi       = S3C2410_GPG6,
13192 +               .pin_miso       = S3C2410_GPG5,
13193 +               .interrupt      = GTA02_IRQ_GSENSOR_2,
13194 +               .open_drain     = 1, /* altered at runtime by PCB rev */
13195 +               .lis302dl_bitbang = gta02_lis302dl_bitbang,
13196 +               .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg,
13197 +               .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg,
13198 +               .lis302dl_suspend_io = gta02_lis302dl_suspend_io,
13199 +};
13200 +
13201 +
13202 +static struct platform_device s3c_device_spi_acc1 = {
13203 +       .name             = "lis302dl",
13204 +       .id               = 1,
13205 +       .dev = {
13206 +               .platform_data = &lis302_pdata_top,
13207 +       },
13208 +};
13209 +
13210 +static struct platform_device s3c_device_spi_acc2 = {
13211 +       .name             = "lis302dl",
13212 +       .id               = 2,
13213 +       .dev = {
13214 +               .platform_data = &lis302_pdata_bottom,
13215 +       },
13216 +};
13217 +
13218 +static struct resource gta02_led_resources[] = {
13219 +       {
13220 +               .name   = "gta02-power:orange",
13221 +               .start  = GTA02_GPIO_PWR_LED1,
13222 +               .end    = GTA02_GPIO_PWR_LED1,
13223 +       }, {
13224 +               .name   = "gta02-power:blue",
13225 +               .start  = GTA02_GPIO_PWR_LED2,
13226 +               .end    = GTA02_GPIO_PWR_LED2,
13227 +       }, {
13228 +               .name   = "gta02-aux:red",
13229 +               .start  = GTA02_GPIO_AUX_LED,
13230 +               .end    = GTA02_GPIO_AUX_LED,
13231 +       },
13232 +};
13233 +
13234 +struct platform_device gta02_led_dev = {
13235 +       .name           = "gta02-led",
13236 +       .num_resources  = ARRAY_SIZE(gta02_led_resources),
13237 +       .resource       = gta02_led_resources,
13238 +};
13239 +
13240 +static struct resource gta02_button_resources[] = {
13241 +       [0] = {
13242 +               .start = GTA02_GPIO_AUX_KEY,
13243 +               .end   = GTA02_GPIO_AUX_KEY,
13244 +       },
13245 +       [1] = {
13246 +               .start = GTA02_GPIO_HOLD_KEY,
13247 +               .end   = GTA02_GPIO_HOLD_KEY,
13248 +       },
13249 +       [2] = {
13250 +               .start = GTA02_GPIO_JACK_INSERT,
13251 +               .end   = GTA02_GPIO_JACK_INSERT,
13252 +       },
13253 +};
13254 +
13255 +static struct platform_device gta02_button_dev = {
13256 +       .name           = "neo1973-button",
13257 +       .num_resources  = ARRAY_SIZE(gta02_button_resources),
13258 +       .resource       = gta02_button_resources,
13259 +};
13260 +
13261 +static struct platform_device gta02_pm_gsm_dev = {
13262 +       .name           = "neo1973-pm-gsm",
13263 +};
13264 +
13265 +static struct platform_device gta02_pm_usbhost_dev = {
13266 +       .name           = "neo1973-pm-host",
13267 +};
13268 +
13269 +
13270 +/* USB */
13271 +static struct s3c2410_hcd_info gta02_usb_info = {
13272 +       .port[0]        = {
13273 +               .flags  = S3C_HCDFLG_USED,
13274 +       },
13275 +       .port[1]        = {
13276 +               .flags  = 0,
13277 +       },
13278 +};
13279 +
13280 +static int glamo_irq_is_wired(void)
13281 +{
13282 +       int rc;
13283 +       int count = 0;
13284 +
13285 +       /*
13286 +       * GTA02 S-Media IRQs prior to A5 are broken due to a lack of
13287 +       * a pullup on the INT# line.  Check for the bad behaviour.
13288 +       */
13289 +       s3c2410_gpio_setpin(S3C2410_GPG4, 0);
13290 +       s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP);
13291 +       s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP);
13292 +       /*
13293 +       * we force it low ourselves for a moment and resume being input.
13294 +       * If there is a pullup, it won't stay low for long.  But if the
13295 +       * level converter is there as on < A5 revision, the weak keeper
13296 +       * on the input of the LC will hold the line low indefinitiely
13297 +       */
13298 +       do
13299 +               rc = s3c2410_gpio_getpin(S3C2410_GPG4);
13300 +       while ((!rc) && ((count++) < 10));
13301 +       if (rc) { /* it got pulled back up, it's good */
13302 +               printk(KERN_INFO "Detected S-Media IRQ# pullup, "
13303 +               "enabling interrupt\n");
13304 +               return 0;
13305 +       } else  /* Gah we can't work with this level converter */
13306 +               printk(KERN_WARNING "** Detected bad IRQ# circuit found"
13307 +               " on pre-A5 GTA02: S-Media interrupt disabled **\n");
13308 +       return -ENODEV;
13309 +}
13310 +
13311 +
13312 +static void
13313 +gta02_glamo_mmc_set_power(unsigned char power_mode, unsigned short vdd)
13314 +{
13315 +       int mv = 1650;
13316 +       int timeout = 500;
13317 +
13318 +       printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u\n",
13319 +              power_mode, vdd);
13320 +
13321 +       switch (system_rev) {
13322 +       case GTA02v1_SYSTEM_REV:
13323 +       case GTA02v2_SYSTEM_REV:
13324 +               break;
13325 +       case GTA02v3_SYSTEM_REV:
13326 +       case GTA02v4_SYSTEM_REV:
13327 +       case GTA02v5_SYSTEM_REV:
13328 +       case GTA02v6_SYSTEM_REV:
13329 +               switch (power_mode) {
13330 +               case MMC_POWER_ON:
13331 +               case MMC_POWER_UP:
13332 +                       /* depend on pcf50633 driver init + not suspended */
13333 +                       while (pcf50633_ready(pcf50633_global) && (timeout--))
13334 +                               msleep(5);
13335 +
13336 +                       if (timeout < 0) {
13337 +                               printk(KERN_ERR"gta02_glamo_mmc_set_power "
13338 +                                            "BAILING on timeout\n");
13339 +                               return;
13340 +                       }
13341 +                       /* select and set the voltage */
13342 +                       if (vdd > 7)
13343 +                               mv += 350 + 100 * (vdd - 8);
13344 +                       printk(KERN_INFO "SD power -> %dmV\n", mv);
13345 +                       pcf50633_voltage_set(pcf50633_global,
13346 +                                            PCF50633_REGULATOR_HCLDO, mv);
13347 +                       pcf50633_onoff_set(pcf50633_global,
13348 +                                          PCF50633_REGULATOR_HCLDO, 1);
13349 +                       break;
13350 +               case MMC_POWER_OFF:
13351 +                       /* power off happens during suspend, when pcf50633 can
13352 +                        * be already gone and not coming back... just forget
13353 +                        * the action then because pcf50633 suspend already
13354 +                        * dealt with it, otherwise we spin forever
13355 +                        */
13356 +                       if (pcf50633_ready(pcf50633_global))
13357 +                               return;
13358 +                       pcf50633_onoff_set(pcf50633_global,
13359 +                                          PCF50633_REGULATOR_HCLDO, 0);
13360 +                       break;
13361 +               }
13362 +               break;
13363 +       }
13364 +}
13365 +
13366 +
13367 +static int gta02_glamo_mci_all_dependencies_resumed(struct platform_device *dev)
13368 +{
13369 +       return resume_dep_glamo_mci_pcf.called_flag;
13370 +}
13371 +
13372 +/* register jbt resume action to be dependent on pcf50633 and glamo resume */
13373 +
13374 +static void gta02_glamo_mci_suspending(struct platform_device *dev)
13375 +{
13376 +       int glamo_mci_resume(struct platform_device *dev);
13377 +
13378 +#if defined(CONFIG_MFD_GLAMO_MCI) && defined(CONFIG_PM)
13379 +       resume_dep_glamo_mci_pcf.callback = (void (*)(void *))glamo_mci_resume;
13380 +       resume_dep_glamo_mci_pcf.context = (void *)dev;
13381 +       pcf50633_register_resume_dependency(pcf50633_global,
13382 +                                                    &resume_dep_glamo_mci_pcf);
13383 +#endif
13384 +}
13385 +
13386 +
13387 +
13388 +/* Smedia Glamo 3362 */
13389 +
13390 +/*
13391 + * we crank down SD Card clock dynamically when GPS is powered
13392 + */
13393 +
13394 +static int gta02_glamo_mci_use_slow(void)
13395 +{
13396 +       return neo1973_pm_gps_is_on();
13397 +}
13398 +
13399 +static struct glamofb_platform_data gta02_glamo_pdata = {
13400 +       .width          = 43,
13401 +       .height         = 58,
13402 +        /* 24.5MHz --> 40.816ns */
13403 +       .pixclock       = 40816,
13404 +       .left_margin    = 8,
13405 +       .right_margin   = 16,
13406 +       .upper_margin   = 2,
13407 +       .lower_margin   = 16,
13408 +       .hsync_len      = 8,
13409 +       .vsync_len      = 2,
13410 +       .fb_mem_size    = 0x400000, /* glamo has 8 megs of SRAM. we use 4 */
13411 +       .xres           = {
13412 +               .min    = 240,
13413 +               .max    = 640,
13414 +               .defval = 480,
13415 +       },
13416 +       .yres           = {
13417 +               .min    = 320,
13418 +               .max    = 640,
13419 +               .defval = 640,
13420 +       },
13421 +       .bpp            = {
13422 +               .min    = 16,
13423 +               .max    = 16,
13424 +               .defval = 16,
13425 +       },
13426 +       //.spi_info     = &glamo_spi_cfg,
13427 +       .spigpio_info   = &glamo_spigpio_cfg,
13428 +
13429 +       /* glamo MMC function platform data */
13430 +       .glamo_set_mci_power = gta02_glamo_mmc_set_power,
13431 +       .glamo_mci_use_slow = gta02_glamo_mci_use_slow,
13432 +       .glamo_irq_is_wired = glamo_irq_is_wired,
13433 +       .mci_suspending = gta02_glamo_mci_suspending,
13434 +       .mci_all_dependencies_resumed =
13435 +                                     gta02_glamo_mci_all_dependencies_resumed,
13436 +};
13437 +
13438 +static struct resource gta02_glamo_resources[] = {
13439 +       [0] = {
13440 +               .start  = S3C2410_CS1,
13441 +               .end    = S3C2410_CS1 + 0x1000000 - 1,
13442 +               .flags  = IORESOURCE_MEM,
13443 +       },
13444 +       [1] = {
13445 +               .start  = GTA02_IRQ_3D,
13446 +               .end    = GTA02_IRQ_3D,
13447 +               .flags  = IORESOURCE_IRQ,
13448 +       },
13449 +       [2] = {
13450 +               .start = GTA02v1_GPIO_3D_RESET,
13451 +               .end   = GTA02v1_GPIO_3D_RESET,
13452 +       },
13453 +};
13454 +
13455 +static struct platform_device gta02_glamo_dev = {
13456 +       .name           = "glamo3362",
13457 +       .num_resources  = ARRAY_SIZE(gta02_glamo_resources),
13458 +       .resource       = gta02_glamo_resources,
13459 +       .dev            = {
13460 +               .platform_data  = &gta02_glamo_pdata,
13461 +       },
13462 +};
13463 +
13464 +static void mangle_glamo_res_by_system_rev(void)
13465 +{
13466 +       switch (system_rev) {
13467 +       case GTA02v1_SYSTEM_REV:
13468 +               break;
13469 +       default:
13470 +               gta02_glamo_resources[2].start = GTA02_GPIO_3D_RESET;
13471 +               gta02_glamo_resources[2].end = GTA02_GPIO_3D_RESET;
13472 +               break;
13473 +       }
13474 +
13475 +       switch (system_rev) {
13476 +       case GTA02v1_SYSTEM_REV:
13477 +       case GTA02v2_SYSTEM_REV:
13478 +       case GTA02v3_SYSTEM_REV:
13479 +       /* case GTA02v4_SYSTEM_REV: - FIXME: handle this later */
13480 +               /* The hardware is missing a pull-up resistor and thus can't
13481 +                * support the Smedia Glamo IRQ */
13482 +               gta02_glamo_resources[1].start = 0;
13483 +               gta02_glamo_resources[1].end = 0;
13484 +               break;
13485 +       }
13486 +}
13487 +
13488 +static void __init gta02_map_io(void)
13489 +{
13490 +       s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
13491 +       s3c24xx_init_clocks(12000000);
13492 +       s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs));
13493 +}
13494 +
13495 +static irqreturn_t gta02_modem_irq(int irq, void *param)
13496 +{
13497 +       printk(KERN_DEBUG "modem wakeup interrupt\n");
13498 +       gta_gsm_interrupts++;
13499 +       return IRQ_HANDLED;
13500 +}
13501 +
13502 +static irqreturn_t ar6000_wow_irq(int irq, void *param)
13503 +{
13504 +       printk(KERN_DEBUG "ar6000_wow interrupt\n");
13505 +       return IRQ_HANDLED;
13506 +}
13507 +
13508 +/*
13509 + * hardware_ecc=1|0
13510 + */
13511 +static char hardware_ecc_str[4] __initdata = "";
13512 +
13513 +static int __init hardware_ecc_setup(char *str)
13514 +{
13515 +       if (str)
13516 +               strlcpy(hardware_ecc_str, str, sizeof(hardware_ecc_str));
13517 +       return 1;
13518 +}
13519 +
13520 +__setup("hardware_ecc=", hardware_ecc_setup);
13521 +
13522 +static void __init gta02_machine_init(void)
13523 +{
13524 +       int rc;
13525 +
13526 +       /* set the panic callback to make AUX blink fast */
13527 +       panic_blink = gta02_panic_blink;
13528 +
13529 +       switch (system_rev) {
13530 +       case GTA02v6_SYSTEM_REV:
13531 +               /* we need push-pull interrupt from motion sensors */
13532 +               lis302_pdata_top.open_drain = 0;
13533 +               lis302_pdata_bottom.open_drain = 0;
13534 +               break;
13535 +       default:
13536 +               break;
13537 +       }
13538 +
13539 +       spin_lock_init(&motion_irq_lock);
13540 +
13541 +       /* do not force soft ecc if we are asked to use hardware_ecc */
13542 +       if (hardware_ecc_str[0] == '1')
13543 +               gta02_nand_info.software_ecc = 0;
13544 +
13545 +       s3c_device_usb.dev.platform_data = &gta02_usb_info;
13546 +       s3c_device_nand.dev.platform_data = &gta02_nand_info;
13547 +       s3c_device_sdi.dev.platform_data = &gta02_mmc_cfg;
13548 +
13549 +       /* Only GTA02v1 has a SD_DETECT GPIO.  Since the slot is not
13550 +        * hot-pluggable, this is not required anyway */
13551 +       switch (system_rev) {
13552 +       case GTA02v1_SYSTEM_REV:
13553 +               break;
13554 +       default:
13555 +               gta02_mmc_cfg.gpio_detect = 0;
13556 +               break;
13557 +       }
13558 +
13559 +       /* acc sensor chip selects */
13560 +       s3c2410_gpio_setpin(S3C2410_GPD12, 1);
13561 +       s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPIO_OUTPUT);
13562 +       s3c2410_gpio_setpin(S3C2410_GPD13, 1);
13563 +       s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPIO_OUTPUT);
13564 +
13565 +       s3c24xx_udc_set_platdata(&gta02_udc_cfg);
13566 +       set_s3c2410ts_info(&gta02_ts_cfg);
13567 +
13568 +       /* FIXME: hardcoded WLAN module power-up */
13569 +       s3c2410_gpio_cfgpin(GTA02_CHIP_PWD, S3C2410_GPIO_OUTPUT);
13570 +
13571 +       /* Power is down */
13572 +       s3c2410_gpio_setpin(GTA02_CHIP_PWD, 1);
13573 +       mdelay(100);
13574 +
13575 +       switch (system_rev) {
13576 +       case GTA02v1_SYSTEM_REV:
13577 +               s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0);
13578 +               break;
13579 +       default:
13580 +               /* Chip is in reset state */
13581 +               s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 0);
13582 +               s3c2410_gpio_cfgpin(GTA02_GPIO_nWLAN_RESET, S3C2410_GPIO_OUTPUT);
13583 +               mdelay(100);
13584 +               /* Power is up */
13585 +               s3c2410_gpio_setpin(GTA02_CHIP_PWD, 0);
13586 +               mdelay(100);
13587 +               /* Chip is out of reset */
13588 +               s3c2410_gpio_setpin(GTA02_GPIO_nWLAN_RESET, 1);
13589 +               break;
13590 +       }
13591 +       mangle_glamo_res_by_system_rev();
13592 +       platform_device_register(&gta02_glamo_dev);
13593 +
13594 +       platform_device_register(&s3c_device_spi_acc1);
13595 +       platform_device_register(&s3c_device_spi_acc2);
13596 +       platform_device_register(&gta02_button_dev);
13597 +       platform_device_register(&gta02_pm_gsm_dev);
13598 +       platform_device_register(&gta02_pm_usbhost_dev);
13599 +
13600 +       mangle_pmu_pdata_by_system_rev();
13601 +       platform_device_register(&gta02_pmu_dev);
13602 +       platform_device_register(&gta02_vibrator_dev);
13603 +       platform_device_register(&gta02_led_dev);
13604 +
13605 +
13606 +       platform_device_register(&gta02_sdio_dev);
13607 +
13608 +       platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices));
13609 +
13610 +#ifdef CONFIG_GTA02_HDQ
13611 +       switch (system_rev) {
13612 +       case GTA02v5_SYSTEM_REV:
13613 +       case GTA02v6_SYSTEM_REV:
13614 +               platform_device_register(&gta02_hdq_device);
13615 +               platform_device_register(&bq27000_battery_device);
13616 +               break;
13617 +       default:
13618 +               break;
13619 +       }
13620 +#endif
13621 +       s3c2410_pm_init();
13622 +
13623 +       /* Make sure the modem can wake us up */
13624 +       set_irq_type(GTA02_IRQ_MODEM, IRQT_RISING);
13625 +       rc = request_irq(GTA02_IRQ_MODEM, gta02_modem_irq, IRQF_DISABLED,
13626 +                        "modem", NULL);
13627 +       if (rc < 0)
13628 +               printk(KERN_ERR "GTA02: can't request GSM modem wakeup IRQ\n");
13629 +       enable_irq_wake(GTA02_IRQ_MODEM);
13630 +
13631 +       /* Make sure the wifi module can wake us up*/
13632 +       set_irq_type(GTA02_IRQ_WLAN_GPIO1, IRQT_RISING);
13633 +       rc = request_irq(GTA02_IRQ_WLAN_GPIO1, ar6000_wow_irq, IRQF_DISABLED,
13634 +                       "ar6000", NULL);
13635 +
13636 +       if (rc < 0)
13637 +               printk(KERN_ERR "GTA02: can't request ar6k wakeup IRQ\n");
13638 +       enable_irq_wake(GTA02_IRQ_WLAN_GPIO1);
13639 +}
13640 +
13641 +MACHINE_START(NEO1973_GTA02, "GTA02")
13642 +       .phys_io        = S3C2410_PA_UART,
13643 +       .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
13644 +       .boot_params    = S3C2410_SDRAM_PA + 0x100,
13645 +       .map_io         = gta02_map_io,
13646 +       .init_irq       = s3c24xx_init_irq,
13647 +       .init_machine   = gta02_machine_init,
13648 +       .timer          = &s3c24xx_timer,
13649 +MACHINE_END
13650 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/mach-hxd8.c
13651 ===================================================================
13652 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
13653 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/mach-hxd8.c    2008-12-11 22:46:49.000000000 +0100
13654 @@ -0,0 +1,381 @@
13655 +/* linux/arch/arm/mach-s3c2440/mach-hxd8.c
13656 + *
13657 + * S3C2440 Machine Support for the FIC HXD8
13658 + *
13659 + * Copyright (c) 2007 Openmoko, Inc.
13660 + * Author: Harald Welte <laforge@openmoko.org>
13661 + * All rights reserved.
13662 + *
13663 + * This program is free software; you can redistribute it and/or
13664 + * modify it under the terms of the GNU General Public License as
13665 + * published by the Free Software Foundation; either version 2 of
13666 + * the License, or (at your option) any later version.
13667 + *
13668 + * This program is distributed in the hope that it will be useful,
13669 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
13670 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13671 + * GNU General Public License for more details.
13672 + *
13673 + * You should have received a copy of the GNU General Public License
13674 + * along with this program; if not, write to the Free Software
13675 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
13676 + * MA 02111-1307 USA
13677 + *
13678 + */
13679 +
13680 +#include <linux/kernel.h>
13681 +#include <linux/types.h>
13682 +#include <linux/interrupt.h>
13683 +#include <linux/list.h>
13684 +#include <linux/timer.h>
13685 +#include <linux/init.h>
13686 +#include <linux/workqueue.h>
13687 +#include <linux/serial_core.h>
13688 +#include <linux/platform_device.h>
13689 +#include <linux/mmc/host.h>
13690 +
13691 +#include <linux/mtd/mtd.h>
13692 +#include <linux/mtd/nand.h>
13693 +#include <linux/mtd/nand_ecc.h>
13694 +#include <linux/mtd/partitions.h>
13695 +
13696 +#include <linux/pcf50606.h>
13697 +
13698 +#include <asm/mach/arch.h>
13699 +#include <asm/mach/map.h>
13700 +#include <asm/mach/irq.h>
13701 +
13702 +#include <asm/hardware.h>
13703 +#include <asm/hardware/iomd.h>
13704 +#include <asm/io.h>
13705 +#include <asm/irq.h>
13706 +#include <asm/mach-types.h>
13707 +
13708 +//#include <asm/debug-ll.h>
13709 +#include <asm/arch/regs-gpio.h>
13710 +#include <asm/arch/regs-lcd.h>
13711 +#include <asm/arch/idle.h>
13712 +#include <asm/arch/fb.h>
13713 +#include <asm/arch/mci.h>
13714 +#include <asm/arch/ts.h>
13715 +#include <asm/arch/spi.h>
13716 +#include <asm/arch/spi-gpio.h>
13717 +#include <asm/arch/usb-control.h>
13718 +
13719 +#include <asm/arch-s3c2440/hxd8.h>
13720 +#include <asm/arch/gta01.h>
13721 +
13722 +//#include "s3c2410.h"
13723 +//#include "s3c2440.h"
13724 +//#include "clock.h"
13725 +#include <asm/plat-s3c/regs-serial.h>
13726 +#include <asm/plat-s3c/nand.h>
13727 +#include <asm/plat-s3c24xx/devs.h>
13728 +#include <asm/plat-s3c24xx/cpu.h>
13729 +#include <asm/plat-s3c24xx/pm.h>
13730 +#include <asm/plat-s3c24xx/udc.h>
13731 +
13732 +static struct map_desc hxd8_iodesc[] __initdata = {
13733 +       /* ISA IO Space map (memory space selected by A24) */
13734 +
13735 +       {
13736 +               .virtual        = (u32)S3C24XX_VA_ISA_WORD,
13737 +               .pfn            = __phys_to_pfn(S3C2410_CS2),
13738 +               .length         = 0x10000,
13739 +               .type           = MT_DEVICE,
13740 +       }, {
13741 +               .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
13742 +               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
13743 +               .length         = SZ_4M,
13744 +               .type           = MT_DEVICE,
13745 +       }, {
13746 +               .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
13747 +               .pfn            = __phys_to_pfn(S3C2410_CS2),
13748 +               .length         = 0x10000,
13749 +               .type           = MT_DEVICE,
13750 +       }, {
13751 +               .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
13752 +               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
13753 +               .length         = SZ_4M,
13754 +               .type           = MT_DEVICE,
13755 +       }
13756 +};
13757 +
13758 +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
13759 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
13760 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
13761 +
13762 +static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = {
13763 +       [0] = {
13764 +               .hwport      = 0,
13765 +               .flags       = 0,
13766 +               .ucon        = 0x3c5,
13767 +               .ulcon       = 0x03,
13768 +               .ufcon       = 0x51,
13769 +       },
13770 +       [1] = {
13771 +               .hwport      = 1,
13772 +               .flags       = 0,
13773 +               .ucon        = 0x3c5,
13774 +               .ulcon       = 0x03,
13775 +               .ufcon       = 0x51,
13776 +       },
13777 +       [2] = {
13778 +               .hwport      = 2,
13779 +               .flags       = 0,
13780 +               .ucon        = 0x3c5,
13781 +               .ulcon       = 0x03,
13782 +               .ufcon       = 0x51,
13783 +       }
13784 +};
13785 +
13786 +static struct s3c2410_nand_set hxd8_nand_sets[] = {
13787 +       [0] = {
13788 +               .name           = "hxd8-nand",
13789 +               .nr_chips       = 1,
13790 +               .flags          = S3C2410_NAND_BBT,
13791 +       },
13792 +       [1] = {
13793 +               .name           = "hxd8-nand-1",
13794 +               .nr_chips       = 1,
13795 +               .flags          = S3C2410_NAND_BBT,
13796 +       },
13797 +       [2] = {
13798 +               .name           = "hxd8-nand-2",
13799 +               .nr_chips       = 1,
13800 +               .flags          = S3C2410_NAND_BBT,
13801 +       },
13802 +};
13803 +
13804 +/* choose a set of timings which should suit most 512Mbit
13805 + * chips and beyond.
13806 +*/
13807 +
13808 +static struct s3c2410_platform_nand hxd8_nand_info = {
13809 +       .tacls          = 20,
13810 +       .twrph0         = 60,
13811 +       .twrph1         = 20,
13812 +       .nr_sets        = ARRAY_SIZE(hxd8_nand_sets),
13813 +       .sets           = hxd8_nand_sets,
13814 +};
13815 +
13816 +/* PMU configuration */
13817 +
13818 +static struct pcf50606_platform_data hxd8_pcf_pdata = {
13819 +       .used_features  = PCF50606_FEAT_EXTON |
13820 +                         PCF50606_FEAT_BBC |
13821 +                         PCF50606_FEAT_WDT |
13822 +                         PCF50606_FEAT_RTC |
13823 +                         PCF50606_FEAT_PWM |
13824 +                         PCF50606_FEAT_PWM_BL |
13825 +                         PCF50606_FEAT_BATVOLT,
13826 +       .onkey_seconds_required = 5,
13827 +       .init_brightness = 8,
13828 +       .rails  = {
13829 +               [PCF50606_REGULATOR_D1REG] = {
13830 +                       .name           = "rc_3v3",
13831 +                       .voltage        = {
13832 +                               .init   = 3300,
13833 +                               .max    = 3300,
13834 +                       },
13835 +               },
13836 +               [PCF50606_REGULATOR_D2REG] = {
13837 +                       .name           = "gps_3v3",
13838 +                       .voltage        = {
13839 +                               .init   = 3300,
13840 +                               .max    = 3300,
13841 +                       },
13842 +               },
13843 +               [PCF50606_REGULATOR_D3REG] = {
13844 +                       .name           = "io2_3v3",
13845 +                       .voltage        = {
13846 +                               .init   = 3300,
13847 +                               .max    = 3300,
13848 +                       },
13849 +               },
13850 +               [PCF50606_REGULATOR_DCD] = {
13851 +                       .name           = "core_1v3",
13852 +                       .voltage        = {
13853 +                               .init   = 1300,
13854 +                               .max    = 1500,
13855 +                       },
13856 +               },
13857 +               [PCF50606_REGULATOR_DCDE] = {
13858 +                       .name           = "io1_3v3",
13859 +                       .voltage        = {
13860 +                               .init   = 3300,
13861 +                               .max    = 3300,
13862 +                       },
13863 +               },
13864 +               [PCF50606_REGULATOR_DCUD] = {
13865 +                       .name           = "rf_3v3",
13866 +                       .voltage        = {
13867 +                               .init   = 3300,
13868 +                               .max    = 3300,
13869 +                       },
13870 +               },
13871 +               [PCF50606_REGULATOR_IOREG] = {
13872 +                       .name           = "audio_3v3",
13873 +                       .voltage        = {
13874 +                               .init   = 3300,
13875 +                               .max    = 3300,
13876 +                       },
13877 +               },
13878 +               [PCF50606_REGULATOR_LPREG] = {
13879 +                       .name           = "lcm_3v3",
13880 +                       .voltage        = {
13881 +                               .init   = 3300,
13882 +                               .max    = 3300,
13883 +                       },
13884 +               },
13885 +       },
13886 +};
13887 +
13888 +static struct resource hxd8_pmu_resources[] = {
13889 +       [0] = {
13890 +               .flags  = IORESOURCE_IRQ,
13891 +               .start  = HXD8_IRQ_PCF50606,
13892 +               .end    = HXD8_IRQ_PCF50606,
13893 +       },
13894 +};
13895 +
13896 +static struct platform_device hxd8_pmu_dev = {
13897 +       .name           = "pcf50606",
13898 +       .num_resources  = ARRAY_SIZE(hxd8_pmu_resources),
13899 +       .resource       = hxd8_pmu_resources,
13900 +       .dev            = {
13901 +               .platform_data = &hxd8_pcf_pdata,
13902 +       },
13903 +};
13904 +
13905 +/* LCD driver info */
13906 +
13907 +static struct s3c2410fb_display hxd8_displays[] __initdata =  {
13908 +       {
13909 +               .type           = S3C2410_LCDCON1_TFT,
13910 +               .width          = 480,
13911 +               .height         = 272,
13912 +               .xres           = 480,
13913 +               .yres           = 272,
13914 +               .bpp            = 16,
13915 +
13916 +               .pixclock       = 40000,        /* HCLK/4 */
13917 +               .left_margin    = 2,
13918 +               .right_margin   = 2,
13919 +               .hsync_len      = 41,
13920 +               .upper_margin   = 2,
13921 +               .lower_margin   = 2,
13922 +               .vsync_len      = 10,
13923 +               .lcdcon5        = S3C2410_LCDCON5_FRM565 |
13924 +                                 S3C2410_LCDCON5_INVVLINE |
13925 +                                 S3C2410_LCDCON5_INVVFRAME,
13926 +       },
13927 +};
13928 +
13929 +static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = {
13930 +       .displays       = hxd8_displays,
13931 +       .num_displays   = ARRAY_SIZE(hxd8_displays),
13932 +       .default_display = 1,
13933 +
13934 +       .lpcsel         = ((0xCE6) & ~7),
13935 +};
13936 +
13937 +static struct platform_device hxd8_pm_gsm_dev = {
13938 +       .name           = "neo1973-pm-gsm",
13939 +};
13940 +
13941 +static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
13942 +{
13943 +       printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
13944 +
13945 +       switch (cmd) {
13946 +       case S3C2410_UDC_P_ENABLE:
13947 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1);
13948 +               break;
13949 +       case S3C2410_UDC_P_DISABLE:
13950 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0);
13951 +               break;
13952 +       case S3C2410_UDC_P_RESET:
13953 +               /* FIXME! */
13954 +               break;
13955 +       default:
13956 +               break;
13957 +       }
13958 +}
13959 +
13960 +/* USB Charger */
13961 +
13962 +static void hxd8_udc_vbus_draw(unsigned int ma)
13963 +{
13964 +       if (ma >= 500) {
13965 +               /* enable fast charge */
13966 +               printk(KERN_DEBUG "udc: enabling fast charge\n");
13967 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1);
13968 +       } else {
13969 +               /* disable fast charge */
13970 +               printk(KERN_DEBUG "udc: disabling fast charge\n");
13971 +               s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0);
13972 +       }
13973 +}
13974 +
13975 +static struct s3c2410_udc_mach_info hxd8_udc_cfg = {
13976 +       .vbus_draw      = hxd8_udc_vbus_draw,
13977 +};
13978 +
13979 +/* Touch Screen */
13980 +static struct s3c2410_ts_mach_info hxd8_ts_cfg = {
13981 +       .delay = 10000,
13982 +       .presc = 49,
13983 +       .oversampling_shift = 4,
13984 +};
13985 +
13986 +static struct platform_device *hxd8_devices[] __initdata = {
13987 +       &s3c_device_usb,
13988 +       &s3c_device_lcd,
13989 +       &s3c_device_wdt,
13990 +       &s3c_device_i2c,
13991 +       &s3c_device_iis,
13992 +       &s3c_device_sdi,
13993 +       &s3c_device_usbgadget,
13994 +       &s3c_device_nand,
13995 +       &s3c_device_ts,
13996 +};
13997 +
13998 +static void __init hxd8_map_io(void)
13999 +{
14000 +       s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc));
14001 +       s3c24xx_init_clocks(16934400);
14002 +       s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs));
14003 +}
14004 +
14005 +static void __init hxd8_machine_init(void)
14006 +{
14007 +       hxd8_udc_cfg.udc_command = gta01_udc_command;
14008 +       s3c_device_nand.dev.platform_data = &hxd8_nand_info;
14009 +
14010 +       s3c24xx_fb_set_platdata(&hxd8_lcd_cfg);
14011 +
14012 +       s3c24xx_udc_set_platdata(&hxd8_udc_cfg);
14013 +       set_s3c2410ts_info(&hxd8_ts_cfg);
14014 +
14015 +       //platform_device_register(&gta01_button_dev);
14016 +       platform_device_register(&hxd8_pm_gsm_dev);
14017 +
14018 +       platform_device_register(&hxd8_pmu_dev);
14019 +
14020 +       platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices));
14021 +
14022 +       s3c2410_pm_init();
14023 +}
14024 +
14025 +MACHINE_START(HXD8, "HXD8")
14026 +       /* Maintainer: Harald Welte <laforge@openmoko.org> */
14027 +       .phys_io        = S3C2410_PA_UART,
14028 +       .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
14029 +       .boot_params    = S3C2410_SDRAM_PA + 0x100,
14030 +
14031 +       .init_irq       = s3c24xx_init_irq,
14032 +       .map_io         = hxd8_map_io,
14033 +       .init_machine   = hxd8_machine_init,
14034 +       .timer          = &s3c24xx_timer,
14035 +MACHINE_END
14036 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/Makefile
14037 ===================================================================
14038 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/Makefile  2008-12-11 22:46:07.000000000 +0100
14039 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/Makefile       2008-12-11 22:46:49.000000000 +0100
14040 @@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_S3C2440)     += s3c2440.o d
14041  obj-$(CONFIG_CPU_S3C2440)      += irq.o
14042  obj-$(CONFIG_CPU_S3C2440)      += clock.o
14043  obj-$(CONFIG_S3C2440_DMA)      += dma.o
14044 +obj-$(CONFIG_S3C2440_C_FIQ)    += fiq_c_isr.o
14045
14046  # Machine support
14047
14048 @@ -21,3 +22,6 @@ obj-$(CONFIG_MACH_OSIRIS)     += mach-osiris
14049  obj-$(CONFIG_MACH_RX3715)      += mach-rx3715.o
14050  obj-$(CONFIG_ARCH_S3C2440)     += mach-smdk2440.o
14051  obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
14052 +obj-$(CONFIG_MACH_HXD8)                += mach-hxd8.o
14053 +obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
14054 +obj-$(CONFIG_MACH_M800)                += mach-glofiish.o
14055 Index: linux-2.6.24.7/arch/arm/mach-s3c2440/s3c2440.c
14056 ===================================================================
14057 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2440/s3c2440.c 2008-12-11 22:46:07.000000000 +0100
14058 +++ linux-2.6.24.7/arch/arm/mach-s3c2440/s3c2440.c      2008-12-11 22:46:49.000000000 +0100
14059 @@ -46,6 +46,9 @@ int __init s3c2440_init(void)
14060         s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
14061         s3c_device_wdt.resource[1].end   = IRQ_S3C2440_WDT;
14062
14063 +       /* make sure SD/MMC driver can distinguish 2440 from 2410 */
14064 +       s3c_device_sdi.name = "s3c2440-sdi";
14065 +
14066         /* register our system device for everything else */
14067
14068         return sysdev_register(&s3c2440_sysdev);
14069 Index: linux-2.6.24.7/arch/arm/mach-s3c2442/Kconfig
14070 ===================================================================
14071 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2442/Kconfig   2008-12-11 22:46:07.000000000 +0100
14072 +++ linux-2.6.24.7/arch/arm/mach-s3c2442/Kconfig        2008-12-11 22:46:49.000000000 +0100
14073 @@ -6,10 +6,11 @@
14074
14075  config CPU_S3C2442
14076         bool
14077 -       depends on ARCH_S3C2410
14078 +       depends on CPU_S3C2440
14079         select S3C2410_CLOCK
14080         select S3C2410_GPIO
14081         select S3C2410_PM if PM
14082 +       select S3C2440_DMA if S3C2410_DMA
14083         select CPU_S3C244X
14084         select CPU_LLSERIAL_S3C2440
14085         help
14086 Index: linux-2.6.24.7/arch/arm/mach-s3c2442/s3c2442.c
14087 ===================================================================
14088 --- linux-2.6.24.7.orig/arch/arm/mach-s3c2442/s3c2442.c 2008-12-11 22:46:07.000000000 +0100
14089 +++ linux-2.6.24.7/arch/arm/mach-s3c2442/s3c2442.c      2008-12-11 22:46:49.000000000 +0100
14090 @@ -21,6 +21,7 @@
14091
14092  #include <asm/plat-s3c24xx/s3c2442.h>
14093  #include <asm/plat-s3c24xx/cpu.h>
14094 +#include <asm/plat-s3c24xx/devs.h>
14095
14096  static struct sys_device s3c2442_sysdev = {
14097         .cls            = &s3c2442_sysclass,
14098 @@ -30,5 +31,8 @@ int __init s3c2442_init(void)
14099  {
14100         printk("S3C2442: Initialising architecture\n");
14101
14102 +       /* make sure SD/MMC driver can distinguish 2440 from 2410 */
14103 +       s3c_device_sdi.name = "s3c2440-sdi";
14104 +
14105         return sysdev_register(&s3c2442_sysdev);
14106  }
14107 Index: linux-2.6.24.7/arch/arm/plat-s3c/Kconfig
14108 ===================================================================
14109 --- linux-2.6.24.7.orig/arch/arm/plat-s3c/Kconfig       2008-12-11 22:46:07.000000000 +0100
14110 +++ linux-2.6.24.7/arch/arm/plat-s3c/Kconfig    2008-12-11 22:46:49.000000000 +0100
14111 @@ -61,7 +61,7 @@ comment "Power management"
14112
14113  config S3C2410_PM_DEBUG
14114         bool "S3C2410 PM Suspend debug"
14115 -       depends on PLAT_S3C && PM
14116 +       depends on PLAT_S3C && PM && DEBUG_LL
14117         help
14118           Say Y here if you want verbose debugging from the PM Suspend and
14119           Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
14120 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/cpu.c
14121 ===================================================================
14122 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/cpu.c     2008-12-11 22:46:07.000000000 +0100
14123 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/cpu.c  2008-12-11 22:46:49.000000000 +0100
14124 @@ -68,6 +68,7 @@ static const char name_s3c2410[]  = "S3C
14125  static const char name_s3c2412[]  = "S3C2412";
14126  static const char name_s3c2440[]  = "S3C2440";
14127  static const char name_s3c2442[]  = "S3C2442";
14128 +static const char name_s3c2442b[]  = "S3C2442B";
14129  static const char name_s3c2443[]  = "S3C2443";
14130  static const char name_s3c2410a[] = "S3C2410A";
14131  static const char name_s3c2440a[] = "S3C2440A";
14132 @@ -119,6 +120,15 @@ static struct cpu_table cpu_ids[] __init
14133                 .name           = name_s3c2442
14134         },
14135         {
14136 +               .idcode         = 0x32440aab,
14137 +               .idmask         = 0xffffffff,
14138 +               .map_io         = s3c244x_map_io,
14139 +               .init_clocks    = s3c244x_init_clocks,
14140 +               .init_uarts     = s3c244x_init_uarts,
14141 +               .init           = s3c2442_init,
14142 +               .name           = name_s3c2442b
14143 +       },
14144 +       {
14145                 .idcode         = 0x32412001,
14146                 .idmask         = 0xffffffff,
14147                 .map_io         = s3c2412_map_io,
14148 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/devs.c
14149 ===================================================================
14150 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/devs.c    2008-12-11 22:46:07.000000000 +0100
14151 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/devs.c 2008-12-11 22:46:49.000000000 +0100
14152 @@ -24,6 +24,7 @@
14153  #include <asm/mach/map.h>
14154  #include <asm/mach/irq.h>
14155  #include <asm/arch/fb.h>
14156 +#include <asm/arch/ts.h>
14157  #include <asm/hardware.h>
14158  #include <asm/io.h>
14159  #include <asm/irq.h>
14160 @@ -207,6 +208,23 @@ struct platform_device s3c_device_nand =
14161
14162  EXPORT_SYMBOL(s3c_device_nand);
14163
14164 +/* Touchscreen */
14165 +struct platform_device s3c_device_ts = {
14166 +       .name             = "s3c2410-ts",
14167 +       .id               = -1,
14168 +};
14169 +
14170 +EXPORT_SYMBOL(s3c_device_ts);
14171 +
14172 +static struct s3c2410_ts_mach_info s3c2410ts_info;
14173 +
14174 +void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
14175 +{
14176 +       memcpy(&s3c2410ts_info,hard_s3c2410ts_info,sizeof(struct s3c2410_ts_mach_info));
14177 +       s3c_device_ts.dev.platform_data = &s3c2410ts_info;
14178 +}
14179 +EXPORT_SYMBOL(set_s3c2410ts_info);
14180 +
14181  /* USB Device (Gadget)*/
14182
14183  static struct resource s3c_usbgadget_resource[] = {
14184 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/gpio.c
14185 ===================================================================
14186 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/gpio.c    2008-12-11 22:46:07.000000000 +0100
14187 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/gpio.c 2008-12-11 22:46:49.000000000 +0100
14188 @@ -32,6 +32,7 @@
14189  #include <asm/io.h>
14190
14191  #include <asm/arch/regs-gpio.h>
14192 +#include <asm/arch/regs-gpioj.h>
14193
14194  void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
14195  {
14196 @@ -186,3 +187,439 @@ int s3c2410_gpio_getirq(unsigned int pin
14197  }
14198
14199  EXPORT_SYMBOL(s3c2410_gpio_getirq);
14200 +
14201 +int s3c2410_irq_to_gpio(unsigned int irq)
14202 +{
14203 +       /* not valid interrupts */
14204 +       if (irq > 15 + IRQ_EINT8)
14205 +               return -1;
14206 +
14207 +       if (irq < IRQ_EINT4)
14208 +               return (irq - IRQ_EINT0) + S3C2410_GPF0;
14209 +
14210 +       if (irq < IRQ_EINT8)
14211 +               return (irq - IRQ_EINT4) + S3C2410_GPF4;
14212 +
14213 +       return (irq - IRQ_EINT8) + S3C2410_GPG0;
14214 +}
14215 +
14216 +EXPORT_SYMBOL(s3c2410_irq_to_gpio);
14217 +
14218 +static void pretty_dump(u32 cfg, u32 state, u32 pull,
14219 +                       const char ** function_names_2,
14220 +                       const char ** function_names_3,
14221 +                       const char * prefix,
14222 +                       int count)
14223 +{
14224 +       int n;
14225 +       const char *tag_type = NULL,
14226 +                  *tag_state = NULL,
14227 +                  *tag_pulldown = NULL,
14228 +                  * level0 = "0",
14229 +                  * level1 = "1";
14230 +
14231 +       for (n = 0; n < count; n++) {
14232 +               switch ((cfg >> (2 * n)) & 3) {
14233 +               case 0:
14234 +                       tag_type = "input      ";
14235 +                       break;
14236 +               case 1:
14237 +                       tag_type = "OUTPUT     ";
14238 +                       break;
14239 +               case 2:
14240 +                       if (function_names_2) {
14241 +                               if (function_names_2[n])
14242 +                                       tag_type = function_names_2[n];
14243 +                               else
14244 +                                       tag_type = "*** ILLEGAL CFG (2) *** ";
14245 +                       } else
14246 +                               tag_type = "(function) ";
14247 +                       break;
14248 +               default:
14249 +                       if (function_names_3) {
14250 +                               if (function_names_3[n])
14251 +                                       tag_type = function_names_3[n];
14252 +                               else
14253 +                                       tag_type = "*** ILLEGAL CFG (3) *** ";
14254 +                       } else
14255 +                               tag_type = "(function) ";
14256 +                       break;
14257 +               }
14258 +               if ((state >> n) & 1)
14259 +                       tag_state = level1;
14260 +               else
14261 +                       tag_state = level0;
14262 +
14263 +               if (((pull >> n) & 1))
14264 +                       tag_pulldown = "";
14265 +               else
14266 +                       tag_pulldown = "(pulldown)";
14267 +
14268 +               printk(KERN_INFO"%s%02d: %s %s %s\n", prefix, n, tag_type,
14269 +                                                     tag_state, tag_pulldown);
14270 +       }
14271 +       printk(KERN_INFO"\n");
14272 +}
14273 +
14274 +static void pretty_dump_a(u32 cfg, u32 state,
14275 +                         const char ** function_names,
14276 +                         const char * prefix,
14277 +                         int count)
14278 +{
14279 +       int n;
14280 +       const char *tag_type = NULL,
14281 +                  *tag_state = NULL,
14282 +                  * level0 = "0",
14283 +                  * level1 = "1";
14284 +
14285 +       for (n = 0; n < count; n++) {
14286 +               switch ((cfg >> n) & 1) {
14287 +               case 0:
14288 +                       tag_type = "OUTPUT     ";
14289 +                       break;
14290 +               default:
14291 +                       if (function_names) {
14292 +                               if (function_names[n])
14293 +                                       tag_type = function_names[n];
14294 +                               else
14295 +                                       tag_type = "*** ILLEGAL CFG *** ";
14296 +                       } else
14297 +                               tag_type = "(function) ";
14298 +                       break;
14299 +               }
14300 +               if ((state >> n) & 1)
14301 +                       tag_state = level1;
14302 +               else
14303 +                       tag_state = level0;
14304 +
14305 +               printk(KERN_INFO"%s%02d: %s %s\n", prefix, n, tag_type,
14306 +                                                  tag_state);
14307 +       }
14308 +       printk(KERN_INFO"\n");
14309 +}
14310 +
14311 +static const char * funcs_a[] = {
14312 +       "ADDR0      ",
14313 +       "ADDR16     ",
14314 +       "ADDR17     ",
14315 +       "ADDR18     ",
14316 +       "ADDR19     ",
14317 +       "ADDR20     ",
14318 +       "ADDR21     ",
14319 +       "ADDR22     ",
14320 +       "ADDR23     ",
14321 +       "ADDR24     ",
14322 +       "ADDR25     ",
14323 +       "ADDR26     ",
14324 +       "nGCS[1]    ",
14325 +       "nGCS[2]    ",
14326 +       "nGCS[3]    ",
14327 +       "nGCS[4]    ",
14328 +       "nGCS[5]    ",
14329 +       "CLE        ",
14330 +       "ALE        ",
14331 +       "nFWE       ",
14332 +       "nFRE       ",
14333 +       "nRSTOUT    ",
14334 +       "nFCE       ",
14335 +       NULL,
14336 +       NULL
14337 +};
14338 +
14339 +
14340 +static const char * funcs_b2[] = {
14341 +       "TOUT0      ",
14342 +       "TOUT1      ",
14343 +       "TOUT2      ",
14344 +       "TOUT3      ",
14345 +       "TCLK[0]    ",
14346 +       "nXBACK     ",
14347 +       "nXBREQ     ",
14348 +       "nXDACK1    ",
14349 +       "nXDREQ1    ",
14350 +       "nXDACK0    ",
14351 +       "nXDREQ0    ",
14352 +};
14353 +static const char * funcs_b3[] = {
14354 +       NULL,
14355 +       NULL,
14356 +       NULL,
14357 +       NULL,
14358 +       NULL,
14359 +       NULL,
14360 +       NULL,
14361 +       NULL,
14362 +       NULL,
14363 +       NULL,
14364 +       NULL,
14365 +};
14366 +
14367 +static const char * funcs_c2[] = {
14368 +       "LEND       ",
14369 +       "VCLK       ",
14370 +       "VLINE      ",
14371 +       "VFRAME     ",
14372 +       "VM         ",
14373 +       "LCD_LPCOE  ",
14374 +       "LCD_LPCREV ",
14375 +       "LCD_LPCREVB",
14376 +       "VD[0]      ",
14377 +       "VD[1]      ",
14378 +       "VD[2]      ",
14379 +       "VD[3]      ",
14380 +       "VD[4]      ",
14381 +       "VD[5]      ",
14382 +       "VD[6]      ",
14383 +       "VD[7]      ",
14384 +};
14385 +static const char * funcs_c3[] = {
14386 +       NULL,
14387 +       NULL,
14388 +       NULL,
14389 +       NULL,
14390 +       "I2SSDI     ",
14391 +       NULL,
14392 +       NULL,
14393 +       NULL,
14394 +       NULL,
14395 +       NULL,
14396 +       NULL,
14397 +       NULL,
14398 +       NULL,
14399 +       NULL,
14400 +       NULL,
14401 +       NULL,
14402 +};
14403 +
14404 +static const char * funcs_d2[] = {
14405 +       "VD[8]      ",
14406 +       "VD[9]      ",
14407 +       "VD[10]     ",
14408 +       "VD[11]     ",
14409 +       "VD[12]     ",
14410 +       "VD[13]     ",
14411 +       "VD[14]     ",
14412 +       "VD[15]     ",
14413 +       "VD[16]     ",
14414 +       "VD[17]     ",
14415 +       "VD[18]     ",
14416 +       "VD[19]     ",
14417 +       "VD[20]     ",
14418 +       "VD[21]     ",
14419 +       "VD[22]     ",
14420 +       "VD[23]     ",
14421 +};
14422 +static const char * funcs_d3[] = {
14423 +       "nSPICS1    ",
14424 +       "SPICLK1    ",
14425 +       NULL,
14426 +       NULL,
14427 +       NULL,
14428 +       NULL,
14429 +       NULL,
14430 +       NULL,
14431 +       "SPIMISO1   ",
14432 +       "SPIMOSI1   ",
14433 +       "SPICLK1    ",
14434 +       NULL,
14435 +       NULL,
14436 +       NULL,
14437 +       "nSS1       ",
14438 +       "nSS0       ",
14439 +};
14440 +
14441 +static const char * funcs_e2[] = {
14442 +       "I2SLRCK    ",
14443 +       "I2SSCLK    ",
14444 +       "CDCLK      ",
14445 +       "I2SDI      ",
14446 +       "I2SDO      ",
14447 +       "SDCLK      ",
14448 +       "SDCMD      ",
14449 +       "SDDAT0     ",
14450 +       "SDDAT1     ",
14451 +       "SDDAT2     ",
14452 +       "SDDAT3     ",
14453 +       "SPIMISO0   ",
14454 +       "SPIMOSI0   ",
14455 +       "SPICLK0    ",
14456 +       "IICSCL     ",
14457 +       "IICSDA     ",
14458 +};
14459 +static const char * funcs_e3[] = {
14460 +       NULL,
14461 +       NULL,
14462 +       NULL,
14463 +       NULL,
14464 +       NULL,
14465 +       NULL,
14466 +       NULL,
14467 +       NULL,
14468 +       NULL,
14469 +       NULL,
14470 +       NULL,
14471 +       NULL,
14472 +       NULL,
14473 +       NULL,
14474 +       NULL,
14475 +       NULL,
14476 +};
14477 +
14478 +static const char * funcs_f2[] = {
14479 +       "EINT[0]    ",
14480 +       "EINT[1]    ",
14481 +       "EINT[2]    ",
14482 +       "EINT[3]    ",
14483 +       "EINT[4]    ",
14484 +       "EINT[5]    ",
14485 +       "EINT[6]    ",
14486 +       "EINT[7]    ",
14487 +};
14488 +static const char * funcs_f3[] = {
14489 +       NULL,
14490 +       NULL,
14491 +       NULL,
14492 +       NULL,
14493 +       NULL,
14494 +       NULL,
14495 +       NULL,
14496 +       NULL,
14497 +};
14498 +
14499 +
14500 +static const char * funcs_g2[] = {
14501 +       "EINT[8]    ",
14502 +       "EINT[9]    ",
14503 +       "EINT[10]   ",
14504 +       "EINT[11]   ",
14505 +       "EINT[12]   ",
14506 +       "EINT[13]   ",
14507 +       "EINT[14]   ",
14508 +       "EINT[15]   ",
14509 +       "EINT[16]   ",
14510 +       "EINT[17]   ",
14511 +       "EINT[18]   ",
14512 +       "EINT[19]   ",
14513 +       "EINT[20]   ",
14514 +       "EINT[21]   ",
14515 +       "EINT[22]   ",
14516 +       "EINT[23]   ",
14517 +};
14518 +static const char * funcs_g3[] = {
14519 +       NULL,
14520 +       NULL,
14521 +       "nSS0       ",
14522 +       "nSS1       ",
14523 +       "LCD_PWRDN  ",
14524 +       "SPIMISO1   ",
14525 +       "SPIMOSI1   ",
14526 +       "SPICLK1    ",
14527 +       NULL,
14528 +       "nRTS1      ",
14529 +       "nCTS1      ",
14530 +       "TCLK[1]    ",
14531 +       "nSPICS0    ",
14532 +       NULL,
14533 +       NULL,
14534 +       NULL,
14535 +};
14536 +
14537 +static const char * funcs_h2[] = {
14538 +       "nCTS0      ",
14539 +       "nRTS0      ",
14540 +       "TXD[0]     ",
14541 +       "RXD[0]     ",
14542 +       "TXD[1]     ",
14543 +       "RXD[1]     ",
14544 +       "TXD[2]     ",
14545 +       "RXD[2]     ",
14546 +       "UEXTCLK    ",
14547 +       "CLKOUT0    ",
14548 +       "CLKOUT1    ",
14549 +};
14550 +static const char * funcs_h3[] = {
14551 +       NULL,
14552 +       NULL,
14553 +       NULL,
14554 +       NULL,
14555 +       NULL,
14556 +       NULL,
14557 +       "nRTS1      ",
14558 +       "nCTS1      ",
14559 +       NULL,
14560 +       "nSPICS0    ",
14561 +       NULL,
14562 +};
14563 +
14564 +static const char * funcs_j2[] = {
14565 +       "CAMDATA[0] ",
14566 +       "CAMDATA[1] ",
14567 +       "CAMDATA[2] ",
14568 +       "CAMDATA[3] ",
14569 +       "CAMDATA[4] ",
14570 +       "CAMDATA[5] ",
14571 +       "CAMDATA[6] ",
14572 +       "CAMDATA[7] ",
14573 +       "CAMPCLK    ",
14574 +       "CAMVSYNC   ",
14575 +       "CAMHREF    ",
14576 +       "CAMCLKOUT  ",
14577 +       "CAMRESET   ",
14578 +};
14579 +static const char * funcs_j3[] = {
14580 +       NULL,
14581 +       NULL,
14582 +       NULL,
14583 +       NULL,
14584 +       NULL,
14585 +       NULL,
14586 +       NULL,
14587 +       NULL,
14588 +       NULL,
14589 +       NULL,
14590 +       NULL,
14591 +       NULL,
14592 +       NULL,
14593 +};
14594 +
14595 +/* used to dump GPIO states at suspend */
14596 +void s3c24xx_dump_gpio_states(void)
14597 +{
14598 +       pretty_dump_a(__raw_readl(S3C2410_GPACON),
14599 +                     __raw_readl(S3C2410_GPADAT),
14600 +                     funcs_a, "GPA", 25);
14601 +       pretty_dump(__raw_readl(S3C2410_GPBCON),
14602 +                   __raw_readl(S3C2410_GPBDAT),
14603 +                   __raw_readl(S3C2410_GPBUP),
14604 +                   funcs_b2, funcs_b3, "GPB", 11);
14605 +       pretty_dump(__raw_readl(S3C2410_GPCCON),
14606 +                   __raw_readl(S3C2410_GPCDAT),
14607 +                   __raw_readl(S3C2410_GPCUP),
14608 +                   funcs_c2, funcs_c3, "GPC", 16);
14609 +       pretty_dump(__raw_readl(S3C2410_GPDCON),
14610 +                   __raw_readl(S3C2410_GPDDAT),
14611 +                   __raw_readl(S3C2410_GPDUP),
14612 +                   funcs_d2, funcs_d3, "GPD", 16);
14613 +       pretty_dump(__raw_readl(S3C2410_GPECON),
14614 +                   __raw_readl(S3C2410_GPEDAT),
14615 +                   __raw_readl(S3C2410_GPEUP),
14616 +                   funcs_e2, funcs_e3, "GPE", 16);
14617 +       pretty_dump(__raw_readl(S3C2410_GPFCON),
14618 +                   __raw_readl(S3C2410_GPFDAT),
14619 +                   __raw_readl(S3C2410_GPFUP),
14620 +                   funcs_f2, funcs_f3, "GPF", 8);
14621 +       pretty_dump(__raw_readl(S3C2410_GPGCON),
14622 +                   __raw_readl(S3C2410_GPGDAT),
14623 +                   __raw_readl(S3C2410_GPGUP),
14624 +                   funcs_g2, funcs_g3, "GPG", 16);
14625 +       pretty_dump(__raw_readl(S3C2410_GPHCON),
14626 +                   __raw_readl(S3C2410_GPHDAT),
14627 +                   __raw_readl(S3C2410_GPHUP),
14628 +                   funcs_h2, funcs_h3, "GPH", 11);
14629 +       pretty_dump(__raw_readl(S3C2440_GPJCON),
14630 +                   __raw_readl(S3C2440_GPJDAT),
14631 +                   __raw_readl(S3C2440_GPJUP),
14632 +                   funcs_j2, funcs_j3, "GPJ", 13);
14633 +
14634 +}
14635 +EXPORT_SYMBOL(s3c24xx_dump_gpio_states);
14636 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/irq.c
14637 ===================================================================
14638 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/irq.c     2008-12-11 22:46:07.000000000 +0100
14639 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/irq.c  2008-12-11 22:46:49.000000000 +0100
14640 @@ -133,12 +133,20 @@ static void
14641  s3c_irq_mask(unsigned int irqno)
14642  {
14643         unsigned long mask;
14644 -
14645 +#ifdef CONFIG_S3C2440_C_FIQ
14646 +       unsigned long flags;
14647 +#endif
14648         irqno -= IRQ_EINT0;
14649 -
14650 +#ifdef CONFIG_S3C2440_C_FIQ
14651 +       local_save_flags(flags);
14652 +       local_fiq_disable();
14653 +#endif
14654         mask = __raw_readl(S3C2410_INTMSK);
14655         mask |= 1UL << irqno;
14656         __raw_writel(mask, S3C2410_INTMSK);
14657 +#ifdef CONFIG_S3C2440_C_FIQ
14658 +       local_irq_restore(flags);
14659 +#endif
14660  }
14661
14662  static inline void
14663 @@ -155,9 +163,19 @@ s3c_irq_maskack(unsigned int irqno)
14664  {
14665         unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
14666         unsigned long mask;
14667 +#ifdef CONFIG_S3C2440_C_FIQ
14668 +       unsigned long flags;
14669 +#endif
14670
14671 +#ifdef CONFIG_S3C2440_C_FIQ
14672 +       local_save_flags(flags);
14673 +       local_fiq_disable();
14674 +#endif
14675         mask = __raw_readl(S3C2410_INTMSK);
14676         __raw_writel(mask|bitval, S3C2410_INTMSK);
14677 +#ifdef CONFIG_S3C2440_C_FIQ
14678 +       local_irq_restore(flags);
14679 +#endif
14680
14681         __raw_writel(bitval, S3C2410_SRCPND);
14682         __raw_writel(bitval, S3C2410_INTPND);
14683 @@ -168,15 +186,25 @@ static void
14684  s3c_irq_unmask(unsigned int irqno)
14685  {
14686         unsigned long mask;
14687 +#ifdef CONFIG_S3C2440_C_FIQ
14688 +       unsigned long flags;
14689 +#endif
14690
14691         if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
14692                 irqdbf2("s3c_irq_unmask %d\n", irqno);
14693
14694         irqno -= IRQ_EINT0;
14695
14696 +#ifdef CONFIG_S3C2440_C_FIQ
14697 +       local_save_flags(flags);
14698 +       local_fiq_disable();
14699 +#endif
14700         mask = __raw_readl(S3C2410_INTMSK);
14701         mask &= ~(1UL << irqno);
14702         __raw_writel(mask, S3C2410_INTMSK);
14703 +#ifdef CONFIG_S3C2440_C_FIQ
14704 +       local_irq_restore(flags);
14705 +#endif
14706  }
14707
14708  struct irq_chip s3c_irq_level_chip = {
14709 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/Kconfig
14710 ===================================================================
14711 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/Kconfig   2008-12-11 22:46:07.000000000 +0100
14712 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/Kconfig        2008-12-11 22:46:49.000000000 +0100
14713 @@ -16,7 +16,7 @@ if PLAT_S3C24XX
14714
14715  config CPU_S3C244X
14716         bool
14717 -       depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
14718 +       default y if CPU_S3C2440 || CPU_S3C2442
14719         help
14720           Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
14721
14722 @@ -46,4 +46,9 @@ config MACH_SMDK
14723         help
14724           Common machine code for SMDK2410 and SMDK2440
14725
14726 +config MACH_NEO1973
14727 +       bool
14728 +       help
14729 +         Common machine code for Neo1973 hardware
14730 +
14731  endif
14732 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/Makefile
14733 ===================================================================
14734 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/Makefile  2008-12-11 22:46:07.000000000 +0100
14735 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/Makefile       2008-12-11 22:46:49.000000000 +0100
14736 @@ -28,3 +28,11 @@ obj-$(CONFIG_PM)             += pm.o
14737  obj-$(CONFIG_PM)               += sleep.o
14738  obj-$(CONFIG_S3C2410_DMA)      += dma.o
14739  obj-$(CONFIG_MACH_SMDK)                += common-smdk.o
14740 +obj-$(CONFIG_MACH_NEO1973)     += neo1973_version.o \
14741 +                                  neo1973_pm_host.o \
14742 +                                  neo1973_pm_gsm.o \
14743 +                                  neo1973_pm_gps.o \
14744 +                                  neo1973_pm_bt.o  \
14745 +                                  neo1973_shadow.o \
14746 +                                  neo1973_pm_resume_reason.o \
14747 +                                  neo1973_memconfig.o
14748 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_memconfig.c
14749 ===================================================================
14750 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
14751 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_memconfig.c    2008-12-11 22:46:49.000000000 +0100
14752 @@ -0,0 +1,186 @@
14753 +/*
14754 + * Memory access timing control sysfs for the s3c24xx based device
14755 + *
14756 + * (C) 2008 by Openmoko Inc.
14757 + * Author: Andy Green <andy@openmoko.com>
14758 + * All rights reserved.
14759 + *
14760 + * This program is free software; you can redistribute it and/or modify
14761 + * it under the terms of the GNU General Public License version 2 as
14762 + * published by the Free Software Foundation
14763 + *
14764 + */
14765 +
14766 +#include <linux/module.h>
14767 +#include <linux/init.h>
14768 +#include <linux/kernel.h>
14769 +#include <linux/platform_device.h>
14770 +
14771 +#include <asm/hardware.h>
14772 +#include <asm/mach-types.h>
14773 +#include <asm/arch/regs-mem.h>
14774 +
14775 +static ssize_t neo1973_memconfig_read(struct device *dev,
14776 +                                      struct device_attribute *attr, char *buf)
14777 +{
14778 +       int index = attr->attr.name[strlen(attr->attr.name) - 1] - '0';
14779 +       u32 reg = *((u32 *)(S3C2410_MEMREG(((index + 1) << 2))));
14780 +       static const char *meaning[][8] = {
14781 +               {
14782 +                       [0] = "normal (1 data)",
14783 +                       [1] = "4 data",
14784 +                       [2] = "8 data",
14785 +                       [3] = "16 data",
14786 +               }, {
14787 +                       [0] = "2 clocks",
14788 +                       [1] = "3 clocks",
14789 +                       [2] = "4 clocks",
14790 +                       [3] = "6 clocks",
14791 +               }, {
14792 +                       [0] = "0 clocks",
14793 +                       [1] = "1 clock",
14794 +                       [2] = "2 clocks",
14795 +                       [3] = "4 clocks",
14796 +               }, {
14797 +                       [0] = "1 clock",
14798 +                       [1] = "2 clocks",
14799 +                       [2] = "3 clocks",
14800 +                       [3] = "4 clocks",
14801 +                       [4] = "6 clocks",
14802 +                       [5] = "8 clocks",
14803 +                       [6] = "10 clocks",
14804 +                       [7] = "14 clocks",
14805 +               }, { /* after this, only for CS6 and CS7 */
14806 +                       [0] = "ROM / SRAM",
14807 +                       [1] = "(illegal)",
14808 +                       [2] = "(illegal)",
14809 +                       [3] = "Sync DRAM",
14810 +               }, {
14811 +                       [0] = "8 Column bits",
14812 +                       [1] = "9 Column bits",
14813 +                       [2] = "10 Column bits",
14814 +                       [3] = "(illegal)",
14815 +               }, {
14816 +                       [0] = "2 clocks",
14817 +                       [1] = "3 clocks",
14818 +                       [2] = "4 clocks",
14819 +                       [3] = "(illegal)",
14820 +               }
14821 +       };
14822 +
14823 +       if (index >= 6)
14824 +               if (((reg >> 15) & 3) == 3) /* DRAM */
14825 +                       return sprintf(buf, "BANKCON%d = 0x%08X\n DRAM:\n"
14826 +                                           "  Trcd = %s\n  SCAN = %s\n", index,
14827 +                                           reg, meaning[5][reg & 3],
14828 +                                           meaning[1][(reg >> 2) & 3]);
14829 +
14830 +       return sprintf(buf, "BANKCON%d = 0x%08X\n Type = %s\n PMC  = %s\n"
14831 +                           " Tacp = %s\n Tcah = %s\n Tcoh = %s\n Tacc = %s\n"
14832 +                           " Tcos = %s\n Tacs = %s\n",
14833 +                           index, reg, meaning[4][(reg >> 15) & 3],
14834 +                           meaning[0][reg & 3],
14835 +                           meaning[1][(reg >> 2) & 3],
14836 +                           meaning[2][(reg >> 4) & 3],
14837 +                           meaning[2][(reg >> 6) & 3],
14838 +                           meaning[3][(reg >> 8) & 7],
14839 +                           meaning[2][(reg >> 11) & 3],
14840 +                           meaning[2][(reg >> 13) & 3]);
14841 +}
14842 +
14843 +static ssize_t neo1973_memconfig_write(struct device *dev,
14844 +                  struct device_attribute *attr, const char *buf, size_t count)
14845 +{
14846 +       int index = attr->attr.name[strlen(attr->attr.name) - 1] - '0';
14847 +       unsigned long val = simple_strtoul(buf, NULL, 16);
14848 +
14849 +       dev_info(dev, "setting BANKCON%d <- 0x%08X\n", index, (u32)val);
14850 +
14851 +       *((u32 *)(S3C2410_MEMREG(((index + 1) << 2)))) = (u32)val;
14852 +
14853 +       return count;
14854 +}
14855 +
14856 +
14857 +static DEVICE_ATTR(BANKCON0, 0644, neo1973_memconfig_read,
14858 +                                                      neo1973_memconfig_write);
14859 +static DEVICE_ATTR(BANKCON1, 0644, neo1973_memconfig_read,
14860 +                                                      neo1973_memconfig_write);
14861 +static DEVICE_ATTR(BANKCON2, 0644, neo1973_memconfig_read,
14862 +                                                      neo1973_memconfig_write);
14863 +static DEVICE_ATTR(BANKCON3, 0644, neo1973_memconfig_read,
14864 +                                                      neo1973_memconfig_write);
14865 +static DEVICE_ATTR(BANKCON4, 0644, neo1973_memconfig_read,
14866 +                                                      neo1973_memconfig_write);
14867 +static DEVICE_ATTR(BANKCON5, 0644, neo1973_memconfig_read,
14868 +                                                      neo1973_memconfig_write);
14869 +static DEVICE_ATTR(BANKCON6, 0644, neo1973_memconfig_read,
14870 +                                                      neo1973_memconfig_write);
14871 +static DEVICE_ATTR(BANKCON7, 0644, neo1973_memconfig_read,
14872 +                                                      neo1973_memconfig_write);
14873 +
14874 +static struct attribute *neo1973_memconfig_sysfs_entries[] = {
14875 +       &dev_attr_BANKCON0.attr,
14876 +       &dev_attr_BANKCON1.attr,
14877 +       &dev_attr_BANKCON2.attr,
14878 +       &dev_attr_BANKCON3.attr,
14879 +       &dev_attr_BANKCON4.attr,
14880 +       &dev_attr_BANKCON5.attr,
14881 +       &dev_attr_BANKCON6.attr,
14882 +       &dev_attr_BANKCON7.attr,
14883 +       NULL
14884 +};
14885 +
14886 +static struct attribute_group neo1973_memconfig_attr_group = {
14887 +       .name   = NULL,
14888 +       .attrs  = neo1973_memconfig_sysfs_entries,
14889 +};
14890 +
14891 +static int __init neo1973_memconfig_probe(struct platform_device *pdev)
14892 +{
14893 +       dev_info(&pdev->dev, "starting\n");
14894 +
14895 +       switch (machine_arch_type) {
14896 +#ifdef CONFIG_MACH_NEO1973_GTA01
14897 +       case MACH_TYPE_NEO1973_GTA01:
14898 +               return -EINVAL;
14899 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
14900 +       default:
14901 +               break;
14902 +       }
14903 +
14904 +       return sysfs_create_group(&pdev->dev.kobj,
14905 +                                                &neo1973_memconfig_attr_group);
14906 +}
14907 +
14908 +static int neo1973_memconfig_remove(struct platform_device *pdev)
14909 +{
14910 +       sysfs_remove_group(&pdev->dev.kobj, &neo1973_memconfig_attr_group);
14911 +       return 0;
14912 +}
14913 +
14914 +static struct platform_driver neo1973_memconfig_driver = {
14915 +       .probe          = neo1973_memconfig_probe,
14916 +       .remove         = neo1973_memconfig_remove,
14917 +       .driver         = {
14918 +               .name           = "neo1973-memconfig",
14919 +       },
14920 +};
14921 +
14922 +static int __devinit neo1973_memconfig_init(void)
14923 +{
14924 +       return platform_driver_register(&neo1973_memconfig_driver);
14925 +}
14926 +
14927 +static void neo1973_memconfig_exit(void)
14928 +{
14929 +       platform_driver_unregister(&neo1973_memconfig_driver);
14930 +}
14931 +
14932 +module_init(neo1973_memconfig_init);
14933 +module_exit(neo1973_memconfig_exit);
14934 +
14935 +MODULE_LICENSE("GPL");
14936 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
14937 +MODULE_DESCRIPTION("neo1973 memconfig");
14938 +
14939 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_bt.c
14940 ===================================================================
14941 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
14942 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_bt.c        2008-12-11 22:46:49.000000000 +0100
14943 @@ -0,0 +1,265 @@
14944 +/*
14945 + * Bluetooth PM code for the FIC Neo1973 GSM Phone
14946 + *
14947 + * (C) 2007 by Openmoko Inc.
14948 + * Author: Harald Welte <laforge@openmoko.org>
14949 + * All rights reserved.
14950 + *
14951 + * This program is free software; you can redistribute it and/or modify
14952 + * it under the terms of the GNU General Public License version 2 as
14953 + * published by the Free Software Foundation
14954 + *
14955 + */
14956 +
14957 +#include <linux/module.h>
14958 +#include <linux/init.h>
14959 +#include <linux/kernel.h>
14960 +#include <linux/platform_device.h>
14961 +
14962 +#include <asm/hardware.h>
14963 +#include <asm/mach-types.h>
14964 +#include <asm/plat-s3c24xx/neo1973.h>
14965 +
14966 +#ifdef CONFIG_MACH_NEO1973_GTA01
14967 +#include <asm/arch/gta01.h>
14968 +#include <linux/pcf50606.h>
14969 +#endif
14970 +
14971 +#ifdef CONFIG_MACH_NEO1973_GTA02
14972 +#include <asm/arch/gta02.h>
14973 +#include <linux/pcf50633.h>
14974 +#endif
14975 +
14976 +#ifdef CONFIG_MACH_M800
14977 +#include <asm/arch/glofiish.h>
14978 +#endif
14979 +
14980 +#define DRVMSG "FIC Neo1973 Bluetooth Power Management"
14981 +
14982 +static ssize_t bt_read(struct device *dev, struct device_attribute *attr,
14983 +                      char *buf)
14984 +{
14985 +       if (!strcmp(attr->attr.name, "power_on")) {
14986 +               switch (machine_arch_type) {
14987 +
14988 +#ifdef CONFIG_MACH_NEO1973_GTA01
14989 +               case MACH_TYPE_NEO1973_GTA01:
14990 +                       if (pcf50606_onoff_get(pcf50606_global,
14991 +                                               PCF50606_REGULATOR_D1REG) &&
14992 +                           pcf50606_voltage_get(pcf50606_global,
14993 +                                                PCF50606_REGULATOR_D1REG) == 3100)
14994 +                               goto out_1;
14995 +                       break;
14996 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
14997 +
14998 +#ifdef CONFIG_MACH_NEO1973_GTA02
14999 +               case MACH_TYPE_NEO1973_GTA02:
15000 +                       if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN))
15001 +                               goto out_1;
15002 +                       break;
15003 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15004 +
15005 +#ifdef CONFIG_MACH_M800
15006 +               case MACH_TYPE_M800:
15007 +                       if (s3c2410_gpio_getpin(M800_GPIO_BT_POWER_1) &&
15008 +                           s3c2410_gpio_getpin(M800_GPIO_BT_POWER_2))
15009 +                               goto out_1;
15010 +                       break;
15011 +#endif /* CONFIG_MACH_M800 */
15012 +
15013 +               }
15014 +       } else if (!strcmp(attr->attr.name, "reset")) {
15015 +               switch (machine_arch_type) {
15016 +
15017 +#ifdef CONFIG_MACH_NEO1973_GTA01
15018 +               case MACH_TYPE_NEO1973_GTA01:
15019 +                       if (s3c2410_gpio_getpin(GTA01_GPIO_BT_EN) == 0)
15020 +                               goto out_1;
15021 +                       break;
15022 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15023 +
15024 +#ifdef CONFIG_MACH_NEO1973_GTA02
15025 +               case MACH_TYPE_NEO1973_GTA02:
15026 +                       if (s3c2410_gpio_getpin(GTA02_GPIO_BT_EN) == 0)
15027 +                               goto out_1;
15028 +                       break;
15029 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15030 +
15031 +               }
15032 +       }
15033 +
15034 +       return strlcpy(buf, "0\n", 3);
15035 +out_1:
15036 +       return strlcpy(buf, "1\n", 3);
15037 +}
15038 +
15039 +static ssize_t bt_write(struct device *dev, struct device_attribute *attr,
15040 +                       const char *buf, size_t count)
15041 +{
15042 +       unsigned long on = simple_strtoul(buf, NULL, 10);
15043 +       unsigned int vol;
15044 +
15045 +       if (!strcmp(attr->attr.name, "power_on")) {
15046 +               switch (machine_arch_type) {
15047 +
15048 +#ifdef CONFIG_MACH_NEO1973_GTA01
15049 +               case MACH_TYPE_NEO1973_GTA01:
15050 +                       /* if we are powering up, assert reset, then power,
15051 +                        * then release reset */
15052 +                       if (on) {
15053 +                               neo1973_gpb_setpin(GTA01_GPIO_BT_EN, 0);
15054 +                               pcf50606_voltage_set(pcf50606_global,
15055 +                                                    PCF50606_REGULATOR_D1REG,
15056 +                                                    3100);
15057 +                       }
15058 +                       pcf50606_onoff_set(pcf50606_global,
15059 +                                          PCF50606_REGULATOR_D1REG, on);
15060 +                       neo1973_gpb_setpin(GTA01_GPIO_BT_EN, on);
15061 +                       break;
15062 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15063 +
15064 +#ifdef CONFIG_MACH_NEO1973_GTA02
15065 +               case MACH_TYPE_NEO1973_GTA02:
15066 +                       neo1973_gpb_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1);
15067 +                       if (on)
15068 +                               pcf50633_voltage_set(pcf50633_global,
15069 +                                       PCF50633_REGULATOR_LDO4, 3200);
15070 +                       pcf50633_onoff_set(pcf50633_global,
15071 +                               PCF50633_REGULATOR_LDO4, on);
15072 +                       vol = pcf50633_voltage_get(pcf50633_global,
15073 +                               PCF50633_REGULATOR_LDO4);
15074 +                       dev_info(dev, "GTA02 Set PCF50633 LDO4 = %d\n", vol);
15075 +                       break;
15076 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15077 +
15078 +#ifdef CONFIG_MACH_M800
15079 +               case MACH_TYPE_M800:
15080 +                       s3c2410_gpio_setpin(M800_GPIO_BT_POWER_1, on);
15081 +                       s3c2410_gpio_setpin(M800_GPIO_BT_POWER_2, on);
15082 +                       break;
15083 +#endif /* CONFIG_MACH_M800 */
15084 +               }
15085 +       } else if (!strcmp(attr->attr.name, "reset")) {
15086 +               /* reset is low-active, so we need to invert */
15087 +               switch (machine_arch_type) {
15088 +
15089 +#ifdef CONFIG_MACH_NEO1973_GTA01
15090 +               case MACH_TYPE_NEO1973_GTA01:
15091 +                       neo1973_gpb_setpin(GTA01_GPIO_BT_EN, on ? 0 : 1);
15092 +                       break;
15093 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15094 +
15095 +#ifdef CONFIG_MACH_NEO1973_GTA02
15096 +               case MACH_TYPE_NEO1973_GTA02:
15097 +                       neo1973_gpb_setpin(GTA02_GPIO_BT_EN, on ? 0 : 1);
15098 +                       break;
15099 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15100 +
15101 +               }
15102 +       }
15103 +
15104 +       return count;
15105 +}
15106 +
15107 +static DEVICE_ATTR(power_on, 0644, bt_read, bt_write);
15108 +static DEVICE_ATTR(reset, 0644, bt_read, bt_write);
15109 +
15110 +#ifdef CONFIG_PM
15111 +static int gta01_bt_suspend(struct platform_device *pdev, pm_message_t state)
15112 +{
15113 +       dev_dbg(&pdev->dev, DRVMSG ": suspending\n");
15114 +       /* FIXME: The PMU should save the PMU status, and the GPIO code should
15115 +        * preserve the GPIO level, so there shouldn't be anything left to do
15116 +        * for us, should there? */
15117 +
15118 +       return 0;
15119 +}
15120 +
15121 +static int gta01_bt_resume(struct platform_device *pdev)
15122 +{
15123 +       dev_dbg(&pdev->dev, DRVMSG ": resuming\n");
15124 +
15125 +       return 0;
15126 +}
15127 +#else
15128 +#define gta01_bt_suspend       NULL
15129 +#define gta01_bt_resume                NULL
15130 +#endif
15131 +
15132 +static struct attribute *gta01_bt_sysfs_entries[] = {
15133 +       &dev_attr_power_on.attr,
15134 +       &dev_attr_reset.attr,
15135 +       NULL
15136 +};
15137 +
15138 +static struct attribute_group gta01_bt_attr_group = {
15139 +       .name   = NULL,
15140 +       .attrs  = gta01_bt_sysfs_entries,
15141 +};
15142 +
15143 +static int __init gta01_bt_probe(struct platform_device *pdev)
15144 +{
15145 +       dev_info(&pdev->dev, DRVMSG ": starting\n");
15146 +
15147 +       switch (machine_arch_type) {
15148 +
15149 +#ifdef CONFIG_MACH_NEO1973_GTA01
15150 +       case MACH_TYPE_NEO1973_GTA01:
15151 +               /* we make sure that the voltage is off */
15152 +               pcf50606_onoff_set(pcf50606_global,
15153 +                                  PCF50606_REGULATOR_D1REG, 0);
15154 +               /* we pull reset to low to make sure that the chip doesn't
15155 +                * drain power through the reset line */
15156 +               neo1973_gpb_setpin(GTA01_GPIO_BT_EN, 0);
15157 +               break;
15158 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15159 +
15160 +#ifdef CONFIG_MACH_NEO1973_GTA02
15161 +       case MACH_TYPE_NEO1973_GTA02:
15162 +               /* we make sure that the voltage is off */
15163 +               pcf50633_onoff_set(pcf50633_global,
15164 +                                    PCF50633_REGULATOR_LDO4, 0);
15165 +               /* we pull reset to low to make sure that the chip doesn't
15166 +                * drain power through the reset line */
15167 +               neo1973_gpb_setpin(GTA02_GPIO_BT_EN, 0);
15168 +               break;
15169 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15170 +
15171 +       }
15172 +
15173 +       return sysfs_create_group(&pdev->dev.kobj, &gta01_bt_attr_group);
15174 +}
15175 +
15176 +static int gta01_bt_remove(struct platform_device *pdev)
15177 +{
15178 +       sysfs_remove_group(&pdev->dev.kobj, &gta01_bt_attr_group);
15179 +
15180 +       return 0;
15181 +}
15182 +
15183 +static struct platform_driver gta01_bt_driver = {
15184 +       .probe          = gta01_bt_probe,
15185 +       .remove         = gta01_bt_remove,
15186 +       .suspend        = gta01_bt_suspend,
15187 +       .resume         = gta01_bt_resume,
15188 +       .driver         = {
15189 +               .name           = "neo1973-pm-bt",
15190 +       },
15191 +};
15192 +
15193 +static int __devinit gta01_bt_init(void)
15194 +{
15195 +       return platform_driver_register(&gta01_bt_driver);
15196 +}
15197 +
15198 +static void gta01_bt_exit(void)
15199 +{
15200 +       platform_driver_unregister(&gta01_bt_driver);
15201 +}
15202 +
15203 +module_init(gta01_bt_init);
15204 +module_exit(gta01_bt_exit);
15205 +
15206 +MODULE_LICENSE("GPL");
15207 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
15208 +MODULE_DESCRIPTION(DRVMSG);
15209 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.c
15210 ===================================================================
15211 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
15212 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.c       2008-12-11 22:46:49.000000000 +0100
15213 @@ -0,0 +1,689 @@
15214 +/*
15215 + * GPS Power Management code for the FIC Neo1973 GSM Phone
15216 + *
15217 + * (C) 2007 by Openmoko Inc.
15218 + * Author: Harald Welte <laforge@openmoko.org>
15219 + * All rights reserved.
15220 + *
15221 + * This program is free software; you can redistribute it and/or modify
15222 + * it under the terms of the GNU General Public License version 2 as
15223 + * published by the Free Software Foundation
15224 + *
15225 + */
15226 +
15227 +#include <linux/module.h>
15228 +#include <linux/init.h>
15229 +#include <linux/kernel.h>
15230 +#include <linux/delay.h>
15231 +#include <linux/platform_device.h>
15232 +
15233 +#include <asm/hardware.h>
15234 +
15235 +#include <asm/mach-types.h>
15236 +
15237 +#include <asm/plat-s3c24xx/neo1973.h>
15238 +
15239 +#ifdef CONFIG_MACH_NEO1973_GTA01
15240 +#include <asm/arch/gta01.h>
15241 +#include <linux/pcf50606.h>
15242 +#endif
15243 +
15244 +#ifdef CONFIG_MACH_NEO1973_GTA02
15245 +#include <asm/arch/gta02.h>
15246 +#include <linux/pcf50633.h>
15247 +#endif
15248 +
15249 +struct neo1973_pm_gps_data {
15250 +       int power_was_on;
15251 +};
15252 +
15253 +static struct neo1973_pm_gps_data neo1973_gps;
15254 +
15255 +int neo1973_pm_gps_is_on(void)
15256 +{
15257 +       return neo1973_gps.power_was_on;
15258 +}
15259 +EXPORT_SYMBOL_GPL(neo1973_pm_gps_is_on);
15260 +
15261 +/* This is the 2.8V supply for the RTC crystal, the mail clock crystal and
15262 + * the input to VDD_RF */
15263 +static void gps_power_2v8_set(int on)
15264 +{
15265 +       switch (system_rev) {
15266 +       case GTA01v3_SYSTEM_REV:
15267 +       case GTA01v4_SYSTEM_REV:
15268 +               if (on)
15269 +                       pcf50606_voltage_set(pcf50606_global,
15270 +                                            PCF50606_REGULATOR_IOREG, 2800);
15271 +               pcf50606_onoff_set(pcf50606_global,
15272 +                                  PCF50606_REGULATOR_IOREG, on);
15273 +               break;
15274 +       case GTA01Bv2_SYSTEM_REV:
15275 +               s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_2V8, on);
15276 +                       break;
15277 +       case GTA01Bv3_SYSTEM_REV:
15278 +       case GTA01Bv4_SYSTEM_REV:
15279 +               break;
15280 +       }
15281 +}
15282 +
15283 +static int gps_power_2v8_get(void)
15284 +{
15285 +       int ret = 0;
15286 +
15287 +       switch (system_rev) {
15288 +       case GTA01v3_SYSTEM_REV:
15289 +       case GTA01v4_SYSTEM_REV:
15290 +               if (pcf50606_onoff_get(pcf50606_global,
15291 +                                       PCF50606_REGULATOR_IOREG) &&
15292 +                   pcf50606_voltage_get(pcf50606_global,
15293 +                                        PCF50606_REGULATOR_IOREG) == 2800)
15294 +                       ret = 1;
15295 +               break;
15296 +       case GTA01Bv2_SYSTEM_REV:
15297 +               if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_2V8))
15298 +                       ret = 1;
15299 +               break;
15300 +       case GTA01Bv3_SYSTEM_REV:
15301 +       case GTA01Bv4_SYSTEM_REV:
15302 +               break;
15303 +       }
15304 +
15305 +       return ret;
15306 +}
15307 +
15308 +/* This is the 3V supply (AVDD) for the external RF frontend (LNA bias) */
15309 +static void gps_power_3v_set(int on)
15310 +{
15311 +       switch (system_rev) {
15312 +       case GTA01v3_SYSTEM_REV:
15313 +       case GTA01v4_SYSTEM_REV:
15314 +               if (on)
15315 +                       pcf50606_voltage_set(pcf50606_global,
15316 +                                            PCF50606_REGULATOR_D1REG, 3000);
15317 +               pcf50606_onoff_set(pcf50606_global,
15318 +                                  PCF50606_REGULATOR_D1REG, on);
15319 +               break;
15320 +       case GTA01Bv2_SYSTEM_REV:
15321 +       case GTA01Bv3_SYSTEM_REV:
15322 +       case GTA01Bv4_SYSTEM_REV:
15323 +               s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V, on);
15324 +               break;
15325 +       }
15326 +}
15327 +
15328 +static int gps_power_3v_get(void)
15329 +{
15330 +       int ret = 0;
15331 +
15332 +       switch (system_rev) {
15333 +       case GTA01v3_SYSTEM_REV:
15334 +       case GTA01v4_SYSTEM_REV:
15335 +               if (pcf50606_onoff_get(pcf50606_global,
15336 +                                      PCF50606_REGULATOR_D1REG) &&
15337 +                   pcf50606_voltage_get(pcf50606_global,
15338 +                                        PCF50606_REGULATOR_D1REG) == 3000)
15339 +                       ret = 1;
15340 +               break;
15341 +       case GTA01Bv2_SYSTEM_REV:
15342 +       case GTA01Bv3_SYSTEM_REV:
15343 +       case GTA01Bv4_SYSTEM_REV:
15344 +               if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V))
15345 +                       ret = 1;
15346 +               break;
15347 +       }
15348 +
15349 +       return ret;
15350 +}
15351 +
15352 +/* This is the 3.3V supply for VDD_IO and VDD_LPREG input */
15353 +static void gps_power_3v3_set(int on)
15354 +{
15355 +       switch (system_rev) {
15356 +       case GTA01v3_SYSTEM_REV:
15357 +       case GTA01v4_SYSTEM_REV:
15358 +       case GTA01Bv2_SYSTEM_REV:
15359 +               if (on)
15360 +                       pcf50606_voltage_set(pcf50606_global,
15361 +                                            PCF50606_REGULATOR_DCD, 3300);
15362 +               pcf50606_onoff_set(pcf50606_global,
15363 +                                  PCF50606_REGULATOR_DCD, on);
15364 +               break;
15365 +       case GTA01Bv3_SYSTEM_REV:
15366 +       case GTA01Bv4_SYSTEM_REV:
15367 +               s3c2410_gpio_setpin(GTA01_GPIO_GPS_EN_3V3, on);
15368 +               break;
15369 +       }
15370 +}
15371 +
15372 +static int gps_power_3v3_get(void)
15373 +{
15374 +       int ret = 0;
15375 +
15376 +       switch (system_rev) {
15377 +       case GTA01v3_SYSTEM_REV:
15378 +       case GTA01v4_SYSTEM_REV:
15379 +       case GTA01Bv2_SYSTEM_REV:
15380 +               if (pcf50606_onoff_get(pcf50606_global,
15381 +                                      PCF50606_REGULATOR_DCD) &&
15382 +                   pcf50606_voltage_get(pcf50606_global,
15383 +                                        PCF50606_REGULATOR_DCD) == 3300)
15384 +                       ret = 1;
15385 +               break;
15386 +       case GTA01Bv3_SYSTEM_REV:
15387 +       case GTA01Bv4_SYSTEM_REV:
15388 +               if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_EN_3V3))
15389 +                       ret = 1;
15390 +               break;
15391 +       }
15392 +
15393 +       return ret;
15394 +}
15395 +
15396 +/* This is the 2.5V supply for VDD_PLLREG and VDD_COREREG input */
15397 +static void gps_power_2v5_set(int on)
15398 +{
15399 +       switch (system_rev) {
15400 +       case GTA01v3_SYSTEM_REV:
15401 +               /* This is CORE_1V8 and cannot be disabled */
15402 +               break;
15403 +       case GTA01v4_SYSTEM_REV:
15404 +       case GTA01Bv2_SYSTEM_REV:
15405 +       case GTA01Bv3_SYSTEM_REV:
15406 +       case GTA01Bv4_SYSTEM_REV:
15407 +               if (on)
15408 +                       pcf50606_voltage_set(pcf50606_global,
15409 +                                            PCF50606_REGULATOR_D2REG, 2500);
15410 +               pcf50606_onoff_set(pcf50606_global,
15411 +                                  PCF50606_REGULATOR_D2REG, on);
15412 +               break;
15413 +       }
15414 +}
15415 +
15416 +static int gps_power_2v5_get(void)
15417 +{
15418 +       int ret = 0;
15419 +
15420 +       switch (system_rev) {
15421 +       case GTA01v3_SYSTEM_REV:
15422 +               /* This is CORE_1V8 and cannot be disabled */
15423 +               ret = 1;
15424 +               break;
15425 +       case GTA01v4_SYSTEM_REV:
15426 +       case GTA01Bv2_SYSTEM_REV:
15427 +       case GTA01Bv3_SYSTEM_REV:
15428 +       case GTA01Bv4_SYSTEM_REV:
15429 +               if (pcf50606_onoff_get(pcf50606_global,
15430 +                                      PCF50606_REGULATOR_D2REG) &&
15431 +                   pcf50606_voltage_get(pcf50606_global,
15432 +                                        PCF50606_REGULATOR_D2REG) == 2500)
15433 +                       ret = 1;
15434 +               break;
15435 +       }
15436 +
15437 +       return ret;
15438 +}
15439 +
15440 +/* This is the 1.5V supply for VDD_CORE */
15441 +static void gps_power_1v5_set(int on)
15442 +{
15443 +       switch (system_rev) {
15444 +       case GTA01v3_SYSTEM_REV:
15445 +       case GTA01v4_SYSTEM_REV:
15446 +       case GTA01Bv2_SYSTEM_REV:
15447 +               /* This is switched via 2v5 */
15448 +               break;
15449 +       case GTA01Bv3_SYSTEM_REV:
15450 +       case GTA01Bv4_SYSTEM_REV:
15451 +               if (on)
15452 +                       pcf50606_voltage_set(pcf50606_global,
15453 +                                            PCF50606_REGULATOR_DCD, 1500);
15454 +               pcf50606_onoff_set(pcf50606_global,
15455 +                                  PCF50606_REGULATOR_DCD, on);
15456 +               break;
15457 +       }
15458 +}
15459 +
15460 +static int gps_power_1v5_get(void)
15461 +{
15462 +       int ret = 0;
15463 +
15464 +       switch (system_rev) {
15465 +       case GTA01v3_SYSTEM_REV:
15466 +       case GTA01v4_SYSTEM_REV:
15467 +       case GTA01Bv2_SYSTEM_REV:
15468 +               /* This is switched via 2v5 */
15469 +               ret = 1;
15470 +               break;
15471 +       case GTA01Bv3_SYSTEM_REV:
15472 +       case GTA01Bv4_SYSTEM_REV:
15473 +               if (pcf50606_onoff_get(pcf50606_global,
15474 +                                      PCF50606_REGULATOR_DCD) &&
15475 +                   pcf50606_voltage_get(pcf50606_global,
15476 +                                        PCF50606_REGULATOR_DCD) == 1500)
15477 +                       ret = 1;
15478 +               break;
15479 +       }
15480 +
15481 +       return ret;
15482 +}
15483 +
15484 +/* This is the POWERON pin */
15485 +static void gps_pwron_set(int on)
15486 +{
15487 +
15488 +       neo1973_gps.power_was_on = !!on;
15489 +
15490 +#ifdef CONFIG_MACH_NEO1973_GTA01
15491 +       if (machine_is_neo1973_gta01())
15492 +               neo1973_gpb_setpin(GTA01_GPIO_GPS_PWRON, on);
15493 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15494 +
15495 +#ifdef CONFIG_MACH_NEO1973_GTA02
15496 +       if (machine_is_neo1973_gta02()) {
15497 +               if (on) {
15498 +                       pcf50633_voltage_set(pcf50633_global,
15499 +                               PCF50633_REGULATOR_LDO5, 3000);
15500 +                       /* return UART pins to being UART pins */
15501 +                       s3c2410_gpio_cfgpin(S3C2410_GPH4, S3C2410_GPH4_TXD1);
15502 +                       /* remove pulldown now it won't be floating any more */
15503 +                       s3c2410_gpio_pullup(S3C2410_GPH5, 0);
15504 +               } else {
15505 +                       /*
15506 +                        * take care not to power unpowered GPS from UART TX
15507 +                        * return them to GPIO and force low
15508 +                        */
15509 +                       s3c2410_gpio_cfgpin(S3C2410_GPH4, S3C2410_GPH4_OUTP);
15510 +                       s3c2410_gpio_setpin(S3C2410_GPH4, 0);
15511 +                       /* don't let RX from unpowered GPS float */
15512 +                       s3c2410_gpio_pullup(S3C2410_GPH5, 1);
15513 +               }
15514 +               pcf50633_onoff_set(pcf50633_global,
15515 +                       PCF50633_REGULATOR_LDO5, on);
15516 +       }
15517 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15518 +}
15519 +
15520 +static int gps_pwron_get(void)
15521 +{
15522 +#ifdef CONFIG_MACH_NEO1973_GTA01
15523 +       if (machine_is_neo1973_gta01())
15524 +               return !!s3c2410_gpio_getpin(GTA01_GPIO_GPS_PWRON);
15525 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15526 +
15527 +#ifdef CONFIG_MACH_NEO1973_GTA02
15528 +       if (machine_is_neo1973_gta02())
15529 +               return !!pcf50633_onoff_get(pcf50633_global,
15530 +                                                      PCF50633_REGULATOR_LDO5);
15531 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15532 +       return -1;
15533 +}
15534 +
15535 +/* This is the nRESET pin */
15536 +static void gps_rst_set(int on)
15537 +{
15538 +       switch (system_rev) {
15539 +       case GTA01v3_SYSTEM_REV:
15540 +               pcf50606_gpo0_set(pcf50606_global, on);
15541 +               break;
15542 +       case GTA01v4_SYSTEM_REV:
15543 +       case GTA01Bv2_SYSTEM_REV:
15544 +       case GTA01Bv3_SYSTEM_REV:
15545 +       case GTA01Bv4_SYSTEM_REV:
15546 +               s3c2410_gpio_setpin(GTA01_GPIO_GPS_RESET, on);
15547 +               break;
15548 +       }
15549 +}
15550 +
15551 +static int gps_rst_get(void)
15552 +{
15553 +       switch (system_rev) {
15554 +       case GTA01v3_SYSTEM_REV:
15555 +               if (pcf50606_gpo0_get(pcf50606_global))
15556 +                       return 1;
15557 +               break;
15558 +       case GTA01v4_SYSTEM_REV:
15559 +       case GTA01Bv2_SYSTEM_REV:
15560 +       case GTA01Bv3_SYSTEM_REV:
15561 +       case GTA01Bv4_SYSTEM_REV:
15562 +               if (s3c2410_gpio_getpin(GTA01_GPIO_GPS_RESET))
15563 +                       return 1;
15564 +               break;
15565 +       }
15566 +
15567 +       return 0;
15568 +}
15569 +
15570 +static ssize_t power_gps_read(struct device *dev,
15571 +                             struct device_attribute *attr, char *buf)
15572 +{
15573 +       int ret = 0;
15574 +
15575 +       if (!strcmp(attr->attr.name, "power_tcxo_2v8")) {
15576 +               ret = gps_power_2v8_get();
15577 +       } else if (!strcmp(attr->attr.name, "power_avdd_3v")) {
15578 +               ret = gps_power_3v_get();
15579 +       } else if (!strcmp(attr->attr.name, "pwron")) {
15580 +               ret = gps_pwron_get();
15581 +       } else if (!strcmp(attr->attr.name, "reset")) {
15582 +               ret = gps_rst_get();
15583 +       } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) {
15584 +               ret = gps_power_3v3_get();
15585 +       } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) {
15586 +               ret = gps_power_2v5_get();
15587 +       } else if (!strcmp(attr->attr.name, "power_core_1v5") ||
15588 +                  !strcmp(attr->attr.name, "power_vdd_core_1v5")) {
15589 +               ret = gps_power_1v5_get();
15590 +       }
15591 +
15592 +       if (ret)
15593 +               return strlcpy(buf, "1\n", 3);
15594 +       else
15595 +               return strlcpy(buf, "0\n", 3);
15596 +}
15597 +
15598 +static ssize_t power_gps_write(struct device *dev,
15599 +                              struct device_attribute *attr, const char *buf,
15600 +                              size_t count)
15601 +{
15602 +       unsigned long on = simple_strtoul(buf, NULL, 10);
15603 +
15604 +       if (!strcmp(attr->attr.name, "power_tcxo_2v8")) {
15605 +               gps_power_2v8_set(on);
15606 +       } else if (!strcmp(attr->attr.name, "power_avdd_3v")) {
15607 +               gps_power_3v_set(on);
15608 +       } else if (!strcmp(attr->attr.name, "pwron")) {
15609 +               gps_pwron_set(on);
15610 +       } else if (!strcmp(attr->attr.name, "reset")) {
15611 +               gps_rst_set(on);
15612 +       } else if (!strcmp(attr->attr.name, "power_lp_io_3v3")) {
15613 +               gps_power_3v3_set(on);
15614 +       } else if (!strcmp(attr->attr.name, "power_pll_core_2v5")) {
15615 +               gps_power_2v5_set(on);
15616 +       } else if (!strcmp(attr->attr.name, "power_core_1v5") ||
15617 +                  !strcmp(attr->attr.name, "power_vdd_core_1v5")) {
15618 +               gps_power_1v5_set(on);
15619 +       }
15620 +
15621 +       return count;
15622 +}
15623 +
15624 +static void gps_power_sequence_up(void)
15625 +{
15626 +       /* According to PMB2520 Data Sheet, Rev. 2006-06-05,
15627 +        * Chapter 4.2.2 */
15628 +
15629 +       /* nRESET must be asserted low */
15630 +       gps_rst_set(0);
15631 +
15632 +       /* POWERON must be de-asserted (low) */
15633 +       gps_pwron_set(0);
15634 +
15635 +       /* Apply VDD_IO and VDD_LPREG_IN */
15636 +       gps_power_3v3_set(1);
15637 +
15638 +       /* VDD_COREREG_IN, VDD_PLLREG_IN */
15639 +       gps_power_1v5_set(1);
15640 +       gps_power_2v5_set(1);
15641 +
15642 +       /* and VDD_RF may be applied */
15643 +       gps_power_2v8_set(1);
15644 +
15645 +       /* We need to enable AVDD, since in GTA01Bv3 it is
15646 +        * shared with RFREG_IN */
15647 +       gps_power_3v_set(1);
15648 +
15649 +       msleep(3);      /* Is 3ms enough? */
15650 +
15651 +       /* De-asert nRESET */
15652 +       gps_rst_set(1);
15653 +
15654 +       /* Switch power on */
15655 +       gps_pwron_set(1);
15656 +
15657 +}
15658 +
15659 +static void gps_power_sequence_down(void)
15660 +{
15661 +       /* According to PMB2520 Data Sheet, Rev. 2006-06-05,
15662 +        * Chapter 4.2.3.1 */
15663 +       gps_pwron_set(0);
15664 +
15665 +       /* Don't disable AVDD before PWRON is cleared, since
15666 +        * in GTA01Bv3, AVDD and RFREG_IN are shared */
15667 +       gps_power_3v_set(0);
15668 +
15669 +       /* Remove VDD_COREREG_IN, VDD_PLLREG_IN and VDD_REFREG_IN */
15670 +       gps_power_1v5_set(0);
15671 +       gps_power_2v5_set(0);
15672 +       gps_power_2v8_set(0);
15673 +
15674 +       /* Remove VDD_LPREG_IN and VDD_IO */
15675 +       gps_power_3v3_set(0);
15676 +}
15677 +
15678 +
15679 +static ssize_t power_sequence_read(struct device *dev,
15680 +                                  struct device_attribute *attr,
15681 +                                  char *buf)
15682 +{
15683 +       return strlcpy(buf, "power_up power_down\n", PAGE_SIZE);
15684 +}
15685 +
15686 +static ssize_t power_sequence_write(struct device *dev,
15687 +                                   struct device_attribute *attr,
15688 +                                   const char *buf, size_t count)
15689 +{
15690 +       dev_dbg(dev, "wrote: '%s'\n", buf);
15691 +
15692 +       if (!strncmp(buf, "power_up", 8))
15693 +               gps_power_sequence_up();
15694 +       else if (!strncmp(buf, "power_down", 10))
15695 +               gps_power_sequence_down();
15696 +       else
15697 +               return -EINVAL;
15698 +
15699 +       return count;
15700 +}
15701 +
15702 +static DEVICE_ATTR(power_tcxo_2v8, 0644, power_gps_read, power_gps_write);
15703 +static DEVICE_ATTR(power_avdd_3v, 0644, power_gps_read, power_gps_write);
15704 +static DEVICE_ATTR(pwron, 0644, power_gps_read, power_gps_write);
15705 +static DEVICE_ATTR(reset, 0644, power_gps_read, power_gps_write);
15706 +static DEVICE_ATTR(power_lp_io_3v3, 0644, power_gps_read, power_gps_write);
15707 +static DEVICE_ATTR(power_pll_core_2v5, 0644, power_gps_read, power_gps_write);
15708 +static DEVICE_ATTR(power_core_1v5, 0644, power_gps_read, power_gps_write);
15709 +static DEVICE_ATTR(power_vdd_core_1v5, 0644, power_gps_read, power_gps_write);
15710 +static DEVICE_ATTR(power_sequence, 0644, power_sequence_read,
15711 +                  power_sequence_write);
15712 +
15713 +#ifdef CONFIG_PM
15714 +static int gta01_pm_gps_suspend(struct platform_device *pdev,
15715 +                               pm_message_t state)
15716 +{
15717 +#ifdef CONFIG_MACH_NEO1973_GTA01
15718 +       if (machine_is_neo1973_gta01()) {
15719 +               /* FIXME */
15720 +               gps_power_sequence_down();
15721 +       }
15722 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15723 +
15724 +#ifdef CONFIG_MACH_NEO1973_GTA02
15725 +       if (machine_is_neo1973_gta02())
15726 +               gps_pwron_set(0);
15727 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15728 +
15729 +       return 0;
15730 +}
15731 +
15732 +static int gta01_pm_gps_resume(struct platform_device *pdev)
15733 +{
15734 +#ifdef CONFIG_MACH_NEO1973_GTA01
15735 +       if (machine_is_neo1973_gta01())
15736 +               if (neo1973_gps.power_was_on)
15737 +                       gps_power_sequence_up();
15738 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15739 +
15740 +#ifdef CONFIG_MACH_NEO1973_GTA02
15741 +       if (machine_is_neo1973_gta02())
15742 +               if (neo1973_gps.power_was_on)
15743 +                   gps_pwron_set(1);
15744 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15745 +
15746 +       return 0;
15747 +}
15748 +#else
15749 +#define gta01_pm_gps_suspend   NULL
15750 +#define gta01_pm_gps_resume    NULL
15751 +#endif
15752 +
15753 +static struct attribute *gta01_gps_sysfs_entries[] = {
15754 +       &dev_attr_power_avdd_3v.attr,
15755 +       &dev_attr_pwron.attr,
15756 +       &dev_attr_reset.attr,
15757 +       &dev_attr_power_lp_io_3v3.attr,
15758 +       &dev_attr_power_pll_core_2v5.attr,
15759 +       &dev_attr_power_sequence.attr,
15760 +       NULL,   /* power_core_1v5 */
15761 +       NULL,   /* power_vdd_core_1v5 */
15762 +       NULL    /* terminating entry */
15763 +};
15764 +
15765 +static struct attribute_group gta01_gps_attr_group = {
15766 +       .name   = NULL,
15767 +       .attrs  = gta01_gps_sysfs_entries,
15768 +};
15769 +
15770 +static struct attribute *gta02_gps_sysfs_entries[] = {
15771 +       &dev_attr_pwron.attr,
15772 +       NULL
15773 +};
15774 +
15775 +static struct attribute_group gta02_gps_attr_group = {
15776 +       .name   = NULL,
15777 +       .attrs  = gta02_gps_sysfs_entries,
15778 +};
15779 +
15780 +static int __init gta01_pm_gps_probe(struct platform_device *pdev)
15781 +{
15782 +#ifdef CONFIG_MACH_NEO1973_GTA01
15783 +       if (machine_is_neo1973_gta01()) {
15784 +               s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_PWRON, S3C2410_GPIO_OUTPUT);
15785 +
15786 +               switch (system_rev) {
15787 +               case GTA01v3_SYSTEM_REV:
15788 +                       break;
15789 +               case GTA01v4_SYSTEM_REV:
15790 +                       s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT);
15791 +                       break;
15792 +               case GTA01Bv3_SYSTEM_REV:
15793 +               case GTA01Bv4_SYSTEM_REV:
15794 +                       s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V3, S3C2410_GPIO_OUTPUT);
15795 +                       /* fallthrough */
15796 +               case GTA01Bv2_SYSTEM_REV:
15797 +                       s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_2V8, S3C2410_GPIO_OUTPUT);
15798 +                       s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_EN_3V, S3C2410_GPIO_OUTPUT);
15799 +                       s3c2410_gpio_cfgpin(GTA01_GPIO_GPS_RESET, S3C2410_GPIO_OUTPUT);
15800 +                       break;
15801 +               default:
15802 +                       dev_warn(&pdev->dev, "Unknown GTA01 Revision 0x%x, "
15803 +                               "AGPS PM features not available!!!\n",
15804 +                               system_rev);
15805 +                       return -1;
15806 +                       break;
15807 +               }
15808 +
15809 +               gps_power_sequence_down();
15810 +
15811 +               switch (system_rev) {
15812 +               case GTA01v3_SYSTEM_REV:
15813 +               case GTA01v4_SYSTEM_REV:
15814 +               case GTA01Bv2_SYSTEM_REV:
15815 +                       gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] =
15816 +                                               &dev_attr_power_tcxo_2v8.attr;
15817 +                       break;
15818 +               case GTA01Bv3_SYSTEM_REV:
15819 +               case GTA01Bv4_SYSTEM_REV:
15820 +                       gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-3] =
15821 +                                               &dev_attr_power_core_1v5.attr;
15822 +                       gta01_gps_sysfs_entries[ARRAY_SIZE(gta01_gps_sysfs_entries)-2] =
15823 +                                               &dev_attr_power_vdd_core_1v5.attr;
15824 +                       break;
15825 +               }
15826 +
15827 +               return sysfs_create_group(&pdev->dev.kobj, &gta01_gps_attr_group);
15828 +       }
15829 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15830 +
15831 +#ifdef CONFIG_MACH_NEO1973_GTA02
15832 +       if (machine_is_neo1973_gta02()) {
15833 +               switch (system_rev) {
15834 +               case GTA02v2_SYSTEM_REV:
15835 +               case GTA02v3_SYSTEM_REV:
15836 +               case GTA02v4_SYSTEM_REV:
15837 +               case GTA02v5_SYSTEM_REV:
15838 +               case GTA02v6_SYSTEM_REV:
15839 +                       pcf50633_voltage_set(pcf50633_global,
15840 +                               PCF50633_REGULATOR_LDO5, 3000);
15841 +                       pcf50633_onoff_set(pcf50633_global,
15842 +                               PCF50633_REGULATOR_LDO5, 0);
15843 +                       dev_info(&pdev->dev, "FIC Neo1973 GPS Power Managerment:"
15844 +                                "starting\n");
15845 +                       break;
15846 +               default:
15847 +                       dev_warn(&pdev->dev, "Unknown GTA02 Revision 0x%x, "
15848 +                               "AGPS PM features not available!!!\n",
15849 +                               system_rev);
15850 +                       return -1;
15851 +                       break;
15852 +               }
15853 +               return sysfs_create_group(&pdev->dev.kobj, &gta02_gps_attr_group);
15854 +       }
15855 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15856 +       return -1;
15857 +}
15858 +
15859 +static int gta01_pm_gps_remove(struct platform_device *pdev)
15860 +{
15861 +#ifdef CONFIG_MACH_NEO1973_GTA01
15862 +       if (machine_is_neo1973_gta01()) {
15863 +               gps_power_sequence_down();
15864 +               sysfs_remove_group(&pdev->dev.kobj, &gta01_gps_attr_group);
15865 +       }
15866 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
15867 +
15868 +#ifdef CONFIG_MACH_NEO1973_GTA02
15869 +       if (machine_is_neo1973_gta02()) {
15870 +               pcf50633_onoff_set(pcf50633_global, PCF50633_REGULATOR_LDO5, 0);
15871 +               sysfs_remove_group(&pdev->dev.kobj, &gta02_gps_attr_group);
15872 +       }
15873 +#endif /* CONFIG_MACH_NEO1973_GTA02 */
15874 +       return 0;
15875 +}
15876 +
15877 +static struct platform_driver gta01_pm_gps_driver = {
15878 +       .probe          = gta01_pm_gps_probe,
15879 +       .remove         = gta01_pm_gps_remove,
15880 +       .suspend        = gta01_pm_gps_suspend,
15881 +       .resume         = gta01_pm_gps_resume,
15882 +       .driver         = {
15883 +               .name           = "neo1973-pm-gps",
15884 +       },
15885 +};
15886 +
15887 +static int __devinit gta01_pm_gps_init(void)
15888 +{
15889 +       return platform_driver_register(&gta01_pm_gps_driver);
15890 +}
15891 +
15892 +static void gta01_pm_gps_exit(void)
15893 +{
15894 +       platform_driver_unregister(&gta01_pm_gps_driver);
15895 +}
15896 +
15897 +module_init(gta01_pm_gps_init);
15898 +module_exit(gta01_pm_gps_exit);
15899 +
15900 +MODULE_LICENSE("GPL");
15901 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
15902 +MODULE_DESCRIPTION("FIC Neo1973 GPS Power Management");
15903 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.h
15904 ===================================================================
15905 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
15906 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gps.h       2008-12-11 22:46:49.000000000 +0100
15907 @@ -0,0 +1 @@
15908 +extern int neo1973_pm_gps_is_on(void);
15909 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c
15910 ===================================================================
15911 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
15912 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_gsm.c       2008-12-11 22:46:49.000000000 +0100
15913 @@ -0,0 +1,373 @@
15914 +/*
15915 + * GSM Management code for the FIC Neo1973 GSM Phone
15916 + *
15917 + * (C) 2007 by Openmoko Inc.
15918 + * Author: Harald Welte <laforge@openmoko.org>
15919 + * All rights reserved.
15920 + *
15921 + * This program is free software; you can redistribute it and/or modify
15922 + * it under the terms of the GNU General Public License version 2 as
15923 + * published by the Free Software Foundation
15924 + *
15925 + */
15926 +
15927 +#include <linux/module.h>
15928 +#include <linux/init.h>
15929 +#include <linux/kernel.h>
15930 +#include <linux/platform_device.h>
15931 +#include <linux/console.h>
15932 +#include <linux/errno.h>
15933 +#include <linux/interrupt.h>
15934 +
15935 +#include <asm/gpio.h>
15936 +#include <asm/mach-types.h>
15937 +#include <asm/arch/gta01.h>
15938 +#include <asm/plat-s3c24xx/neo1973.h>
15939 +#include <asm/arch/s3c24xx-serial.h>
15940 +
15941 +#ifdef CONFIG_MACH_NEO1973_GTA02
15942 +#include <asm/arch/gta02.h>
15943 +#include <linux/pcf50633.h>
15944 +#include <asm/arch/regs-gpioj.h>
15945 +#endif
15946 +
15947 +int gta_gsm_interrupts;
15948 +EXPORT_SYMBOL(gta_gsm_interrupts);
15949 +
15950 +struct gta01pm_priv {
15951 +       int gpio_ngsm_en;
15952 +        int gpio_ndl_gsm;
15953 +
15954 +       struct console *con;
15955 +};
15956 +
15957 +struct resume_dependency resume_dep_gsm_uart;
15958 +
15959 +static struct gta01pm_priv gta01_gsm;
15960 +
15961 +static struct console *find_s3c24xx_console(void)
15962 +{
15963 +       struct console *con;
15964 +
15965 +       acquire_console_sem();
15966 +
15967 +       for (con = console_drivers; con; con = con->next) {
15968 +               if (!strcmp(con->name, "ttySAC"))
15969 +                       break;
15970 +       }
15971 +
15972 +       release_console_sem();
15973 +
15974 +       return con;
15975 +}
15976 +
15977 +static ssize_t gsm_read(struct device *dev, struct device_attribute *attr,
15978 +                       char *buf)
15979 +{
15980 +       if (!strcmp(attr->attr.name, "power_on")) {
15981 +               if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON))
15982 +                       goto out_1;
15983 +       } else if (!strcmp(attr->attr.name, "reset")) {
15984 +               if (machine_is_neo1973_gta01() && s3c2410_gpio_getpin(GTA01_GPIO_MODEM_RST))
15985 +                       goto out_1;
15986 +               else if (machine_is_neo1973_gta02() && s3c2410_gpio_getpin(GTA02_GPIO_MODEM_RST))
15987 +                       goto out_1;
15988 +       } else if (!strcmp(attr->attr.name, "download")) {
15989 +               if (machine_is_neo1973_gta01()) {
15990 +                       if (s3c2410_gpio_getpin(GTA01_GPIO_MODEM_DNLOAD))
15991 +                               goto out_1;
15992 +               } else if (machine_is_neo1973_gta02()) {
15993 +                       if (!s3c2410_gpio_getpin(GTA02_GPIO_nDL_GSM))
15994 +                               goto out_1;
15995 +               }
15996 +       } else if (!strcmp(attr->attr.name, "flowcontrolled")) {
15997 +               if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT)
15998 +                       goto out_1;
15999 +       }
16000 +
16001 +       return strlcpy(buf, "0\n", 3);
16002 +out_1:
16003 +       return strlcpy(buf, "1\n", 3);
16004 +}
16005 +
16006 +static ssize_t gsm_write(struct device *dev, struct device_attribute *attr,
16007 +                        const char *buf, size_t count)
16008 +{
16009 +       unsigned long on = simple_strtoul(buf, NULL, 10);
16010 +
16011 +       if (!strcmp(attr->attr.name, "power_on")) {
16012 +               if (on) {
16013 +                       if (gta01_gsm.con) {
16014 +                               dev_dbg(dev, "powering up GSM, thus "
16015 +                                        "disconnecting serial console\n");
16016 +
16017 +                               console_stop(gta01_gsm.con);
16018 +                               s3c24xx_serial_console_set_silence(1);
16019 +                       }
16020 +
16021 +                       if (gta01_gsm.gpio_ngsm_en)
16022 +                               s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 0);
16023 +
16024 +                       switch (system_rev) {
16025 +#ifdef CONFIG_MACH_NEO1973_GTA02
16026 +                       case GTA02v2_SYSTEM_REV:
16027 +                       case GTA02v3_SYSTEM_REV:
16028 +                       case GTA02v4_SYSTEM_REV:
16029 +                       case GTA02v5_SYSTEM_REV:
16030 +                       case GTA02v6_SYSTEM_REV:
16031 +                               pcf50633_gpio_set(pcf50633_global,
16032 +                                                 PCF50633_GPIO2, 1);
16033 +                               break;
16034 +#endif
16035 +                       }
16036 +
16037 +                       neo1973_gpb_setpin(GTA01_GPIO_MODEM_ON, 1);
16038 +               } else {
16039 +                       neo1973_gpb_setpin(GTA01_GPIO_MODEM_ON, 0);
16040 +
16041 +                       switch (system_rev) {
16042 +#ifdef CONFIG_MACH_NEO1973_GTA02
16043 +                       case GTA02v2_SYSTEM_REV:
16044 +                       case GTA02v3_SYSTEM_REV:
16045 +                       case GTA02v4_SYSTEM_REV:
16046 +                       case GTA02v5_SYSTEM_REV:
16047 +                       case GTA02v6_SYSTEM_REV:
16048 +                               pcf50633_gpio_set(pcf50633_global,
16049 +                                                 PCF50633_GPIO2, 0);
16050 +                               break;
16051 +#endif
16052 +                       }
16053 +
16054 +                       if (gta01_gsm.gpio_ngsm_en)
16055 +                               s3c2410_gpio_setpin(gta01_gsm.gpio_ngsm_en, 1);
16056 +
16057 +                       if (gta01_gsm.con) {
16058 +                               s3c24xx_serial_console_set_silence(0);
16059 +                               console_start(gta01_gsm.con);
16060 +
16061 +                               dev_dbg(dev, "powered down GSM, thus enabling "
16062 +                                        "serial console\n");
16063 +                       }
16064 +               }
16065 +       } else if (!strcmp(attr->attr.name, "reset")) {
16066 +               if (machine_is_neo1973_gta01())
16067 +                       neo1973_gpb_setpin(GTA01_GPIO_MODEM_RST, on);
16068 +               else if (machine_is_neo1973_gta02())
16069 +                       neo1973_gpb_setpin(GTA02_GPIO_MODEM_RST, on);
16070 +       } else if (!strcmp(attr->attr.name, "download")) {
16071 +               if (machine_is_neo1973_gta01())
16072 +                       s3c2410_gpio_setpin(GTA01_GPIO_MODEM_DNLOAD, on);
16073 +
16074 +               if (machine_is_neo1973_gta02()) {
16075 +                       /*
16076 +                        * the keyboard / buttons driver requests and enables
16077 +                        * the JACK_INSERT IRQ.  We have to take care about
16078 +                        * not enabling and disabling the IRQ when it was
16079 +                        * already in that state or we get "unblanaced IRQ"
16080 +                        * kernel warnings and stack dumps.  So we use the
16081 +                        * copy of the ndl_gsm state to figure out if we should
16082 +                        * enable or disable the jack interrupt
16083 +                        */
16084 +                       if (on) {
16085 +                               if (gta01_gsm.gpio_ndl_gsm)
16086 +                                       disable_irq(gpio_to_irq(
16087 +                                                      GTA02_GPIO_JACK_INSERT));
16088 +                       } else {
16089 +                               if (!gta01_gsm.gpio_ndl_gsm)
16090 +                                       enable_irq(gpio_to_irq(
16091 +                                                      GTA02_GPIO_JACK_INSERT));
16092 +                       }
16093 +
16094 +                       gta01_gsm.gpio_ndl_gsm = !on;
16095 +                       s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, !on);
16096 +               }
16097 +       } else if (!strcmp(attr->attr.name, "flowcontrolled")) {
16098 +               if (on) {
16099 +                       gta_gsm_interrupts = 0;
16100 +                       s3c2410_gpio_setpin(S3C2410_GPH1, 1);
16101 +                       s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP);
16102 +               } else
16103 +                       s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_nRTS0);
16104 +       }
16105 +
16106 +       return count;
16107 +}
16108 +
16109 +static DEVICE_ATTR(power_on, 0644, gsm_read, gsm_write);
16110 +static DEVICE_ATTR(reset, 0644, gsm_read, gsm_write);
16111 +static DEVICE_ATTR(download, 0644, gsm_read, gsm_write);
16112 +static DEVICE_ATTR(flowcontrolled, 0644, gsm_read, gsm_write);
16113 +
16114 +#ifdef CONFIG_PM
16115 +static int gta01_gsm_resume(struct platform_device *pdev);
16116 +static int gta01_gsm_suspend(struct platform_device *pdev, pm_message_t state)
16117 +{
16118 +       /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we
16119 +        * don't need to do much here. */
16120 +
16121 +       /* If flowcontrol asserted, abort if GSM already interrupted */
16122 +       if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT) {
16123 +               if (gta_gsm_interrupts)
16124 +                       goto busy;
16125 +       }
16126 +
16127 +       /* disable DL GSM to prevent jack_insert becoming 'floating' */
16128 +       if (machine_is_neo1973_gta02())
16129 +               s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 1);
16130 +
16131 +       /* register our resume dependency on the appropriate UART being up */
16132 +       resume_dep_gsm_uart.callback = gta01_gsm_resume;
16133 +       resume_dep_gsm_uart.context = (void *)pdev;
16134 +
16135 +       s3c24xx_serial_register_resume_dependency(&resume_dep_gsm_uart, 0);
16136 +
16137 +       return 0;
16138 +
16139 +busy:
16140 +       return -EBUSY;
16141 +}
16142 +
16143 +static int
16144 +gta01_gsm_suspend_late(struct platform_device *pdev, pm_message_t state)
16145 +{
16146 +       /* Last chance: abort if GSM already interrupted */
16147 +       if (s3c2410_gpio_getcfg(S3C2410_GPH1) == S3C2410_GPIO_OUTPUT) {
16148 +               if (gta_gsm_interrupts)
16149 +                       return -EBUSY;
16150 +       }
16151 +       return 0;
16152 +}
16153 +
16154 +static int gta01_gsm_resume(struct platform_device *pdev)
16155 +{
16156 +       if (resume_dep_gsm_uart.called_flag != 1)
16157 +               return 0;
16158 +
16159 +       resume_dep_gsm_uart.called_flag++; /* only run once */
16160 +
16161 +       /* GPIO state is saved/restored by S3C2410 core GPIO driver, so we
16162 +        * don't need to do much here. */
16163 +
16164 +       /* Make sure that the kernel console on the serial port is still
16165 +        * disabled. FIXME: resume ordering race with serial driver! */
16166 +       if (gta01_gsm.con && s3c2410_gpio_getpin(GTA01_GPIO_MODEM_ON))
16167 +               console_stop(gta01_gsm.con);
16168 +
16169 +       if (machine_is_neo1973_gta02())
16170 +               s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, gta01_gsm.gpio_ndl_gsm);
16171 +
16172 +       return 0;
16173 +}
16174 +#else
16175 +#define gta01_gsm_suspend      NULL
16176 +#define gta01_gsm_suspend_late NULL
16177 +#define gta01_gsm_resume       NULL
16178 +#endif
16179 +
16180 +static struct attribute *gta01_gsm_sysfs_entries[] = {
16181 +       &dev_attr_power_on.attr,
16182 +       &dev_attr_reset.attr,
16183 +       &dev_attr_download.attr,
16184 +       &dev_attr_flowcontrolled.attr,
16185 +       NULL
16186 +};
16187 +
16188 +static struct attribute_group gta01_gsm_attr_group = {
16189 +       .name   = NULL,
16190 +       .attrs  = gta01_gsm_sysfs_entries,
16191 +};
16192 +
16193 +static int __init gta01_gsm_probe(struct platform_device *pdev)
16194 +{
16195 +       switch (system_rev) {
16196 +       case GTA01v3_SYSTEM_REV:
16197 +               gta01_gsm.gpio_ngsm_en = GTA01v3_GPIO_nGSM_EN;
16198 +               break;
16199 +       case GTA01v4_SYSTEM_REV:
16200 +               gta01_gsm.gpio_ngsm_en = 0;
16201 +               break;
16202 +       case GTA01Bv2_SYSTEM_REV:
16203 +       case GTA01Bv3_SYSTEM_REV:
16204 +       case GTA01Bv4_SYSTEM_REV:
16205 +               gta01_gsm.gpio_ngsm_en = GTA01Bv2_GPIO_nGSM_EN;
16206 +               s3c2410_gpio_setpin(GTA01v3_GPIO_nGSM_EN, 0);
16207 +               break;
16208 +#ifdef CONFIG_MACH_NEO1973_GTA02
16209 +       case GTA02v1_SYSTEM_REV:
16210 +       case GTA02v2_SYSTEM_REV:
16211 +       case GTA02v3_SYSTEM_REV:
16212 +       case GTA02v4_SYSTEM_REV:
16213 +       case GTA02v5_SYSTEM_REV:
16214 +       case GTA02v6_SYSTEM_REV:
16215 +               gta01_gsm.gpio_ngsm_en = 0;
16216 +               break;
16217 +#endif
16218 +       default:
16219 +               dev_warn(&pdev->dev, "Unknown Neo1973 Revision 0x%x, "
16220 +                        "some PM features not available!!!\n",
16221 +                        system_rev);
16222 +               break;
16223 +       }
16224 +
16225 +       switch (system_rev) {
16226 +       case GTA01v4_SYSTEM_REV:
16227 +       case GTA01Bv2_SYSTEM_REV:
16228 +               gta01_gsm_sysfs_entries[ARRAY_SIZE(gta01_gsm_sysfs_entries)-2] =
16229 +                                                       &dev_attr_download.attr;
16230 +               break;
16231 +       default:
16232 +               break;
16233 +       }
16234 +
16235 +       if (machine_is_neo1973_gta01()) {
16236 +               gta01_gsm.con = find_s3c24xx_console();
16237 +               if (!gta01_gsm.con)
16238 +                       dev_warn(&pdev->dev,
16239 +                                "cannot find S3C24xx console driver\n");
16240 +       } else
16241 +               gta01_gsm.con = NULL;
16242 +
16243 +       /* note that download initially disabled, and enforce that */
16244 +       gta01_gsm.gpio_ndl_gsm = 1;
16245 +       if (machine_is_neo1973_gta02())
16246 +               s3c2410_gpio_setpin(GTA02_GPIO_nDL_GSM, 1);
16247 +
16248 +       init_resume_dependency_list(&resume_dep_gsm_uart);
16249 +
16250 +       return sysfs_create_group(&pdev->dev.kobj, &gta01_gsm_attr_group);
16251 +}
16252 +
16253 +static int gta01_gsm_remove(struct platform_device *pdev)
16254 +{
16255 +       sysfs_remove_group(&pdev->dev.kobj, &gta01_gsm_attr_group);
16256 +
16257 +       return 0;
16258 +}
16259 +
16260 +static struct platform_driver gta01_gsm_driver = {
16261 +       .probe          = gta01_gsm_probe,
16262 +       .remove         = gta01_gsm_remove,
16263 +       .suspend        = gta01_gsm_suspend,
16264 +       .suspend_late   = gta01_gsm_suspend_late,
16265 +       .resume         = gta01_gsm_resume,
16266 +       .driver         = {
16267 +               .name           = "neo1973-pm-gsm",
16268 +       },
16269 +};
16270 +
16271 +static int __devinit gta01_gsm_init(void)
16272 +{
16273 +       return platform_driver_register(&gta01_gsm_driver);
16274 +}
16275 +
16276 +static void gta01_gsm_exit(void)
16277 +{
16278 +       platform_driver_unregister(&gta01_gsm_driver);
16279 +}
16280 +
16281 +module_init(gta01_gsm_init);
16282 +module_exit(gta01_gsm_exit);
16283 +
16284 +MODULE_LICENSE("GPL");
16285 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
16286 +MODULE_DESCRIPTION("FIC Neo1973 GSM Power Management");
16287 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_host.c
16288 ===================================================================
16289 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
16290 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_host.c      2008-12-11 22:46:49.000000000 +0100
16291 @@ -0,0 +1,101 @@
16292 +/*
16293 + * Bluetooth PM code for the FIC Neo1973 GSM Phone
16294 + *
16295 + * (C) 2007 by Openmoko Inc.
16296 + * Author: Harald Welte <laforge@openmoko.org>
16297 + * All rights reserved.
16298 + *
16299 + * This program is free software; you can redistribute it and/or modify
16300 + * it under the terms of the GNU General Public License version 2 as
16301 + * published by the Free Software Foundation
16302 + *
16303 + */
16304 +
16305 +#include <linux/module.h>
16306 +#include <linux/init.h>
16307 +#include <linux/kernel.h>
16308 +#include <linux/platform_device.h>
16309 +
16310 +#include <asm/hardware.h>
16311 +#include <asm/mach-types.h>
16312 +
16313 +#ifdef CONFIG_MACH_NEO1973_GTA02
16314 +#include <asm/arch/gta02.h>
16315 +#include <linux/pcf50633.h>
16316 +
16317 +static ssize_t pm_host_read(struct device *dev, struct device_attribute *attr,
16318 +                           char *buf)
16319 +{
16320 +       return sprintf(buf, "%d\n",
16321 +                      pcf50633_gpio_get(pcf50633_global, PCF50633_GPO));
16322 +}
16323 +
16324 +static ssize_t pm_host_write(struct device *dev, struct device_attribute *attr,
16325 +                            const char *buf, size_t count)
16326 +{
16327 +       unsigned long on = simple_strtoul(buf, NULL, 10);
16328 +
16329 +       pcf50633_gpio_set(pcf50633_global, PCF50633_GPO, on);
16330 +
16331 +       return count;
16332 +}
16333 +
16334 +static DEVICE_ATTR(hostmode, 0644, pm_host_read, pm_host_write);
16335 +
16336 +static struct attribute *neo1973_pm_host_sysfs_entries[] = {
16337 +       &dev_attr_hostmode.attr,
16338 +       NULL
16339 +};
16340 +
16341 +static struct attribute_group neo1973_pm_host_attr_group = {
16342 +       .name   = NULL,
16343 +       .attrs  = neo1973_pm_host_sysfs_entries,
16344 +};
16345 +
16346 +static int __init neo1973_pm_host_probe(struct platform_device *pdev)
16347 +{
16348 +       dev_info(&pdev->dev, "starting\n");
16349 +
16350 +       switch (machine_arch_type) {
16351 +#ifdef CONFIG_MACH_NEO1973_GTA01
16352 +       case MACH_TYPE_NEO1973_GTA01:
16353 +               return -EINVAL;
16354 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
16355 +       default:
16356 +               break;
16357 +       }
16358 +
16359 +       return sysfs_create_group(&pdev->dev.kobj, &neo1973_pm_host_attr_group);
16360 +}
16361 +
16362 +static int neo1973_pm_host_remove(struct platform_device *pdev)
16363 +{
16364 +       sysfs_remove_group(&pdev->dev.kobj, &neo1973_pm_host_attr_group);
16365 +       return 0;
16366 +}
16367 +
16368 +static struct platform_driver neo1973_pm_host_driver = {
16369 +       .probe          = neo1973_pm_host_probe,
16370 +       .remove         = neo1973_pm_host_remove,
16371 +       .driver         = {
16372 +               .name           = "neo1973-pm-host",
16373 +       },
16374 +};
16375 +
16376 +static int __devinit neo1973_pm_host_init(void)
16377 +{
16378 +       return platform_driver_register(&neo1973_pm_host_driver);
16379 +}
16380 +
16381 +static void neo1973_pm_host_exit(void)
16382 +{
16383 +       platform_driver_unregister(&neo1973_pm_host_driver);
16384 +}
16385 +
16386 +module_init(neo1973_pm_host_init);
16387 +module_exit(neo1973_pm_host_exit);
16388 +
16389 +MODULE_LICENSE("GPL");
16390 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
16391 +MODULE_DESCRIPTION("Neo1973 USB Host Power Management");
16392 +#endif
16393 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_resume_reason.c
16394 ===================================================================
16395 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
16396 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_pm_resume_reason.c     2008-12-11 22:46:49.000000000 +0100
16397 @@ -0,0 +1,147 @@
16398 +/*
16399 + * Resume reason sysfs for the FIC Neo1973 GSM Phone
16400 + *
16401 + * (C) 2008 by Openmoko Inc.
16402 + * Author: Andy Green <andy@openmoko.com>
16403 + * All rights reserved.
16404 + *
16405 + * This program is free software; you can redistribute it and/or modify
16406 + * it under the terms of the GNU General Public License resume_reason 2 as
16407 + * published by the Free Software Foundation
16408 + *
16409 + */
16410 +
16411 +#include <linux/module.h>
16412 +#include <linux/init.h>
16413 +#include <linux/kernel.h>
16414 +#include <linux/platform_device.h>
16415 +#include <linux/io.h>
16416 +
16417 +#include <asm/hardware.h>
16418 +#include <asm/mach-types.h>
16419 +
16420 +#ifdef CONFIG_MACH_NEO1973_GTA02
16421 +#include <asm/arch/gta02.h>
16422 +#include <linux/pcf50633.h>
16423 +#endif
16424 +
16425 +static unsigned int *gstatus4_mapped;
16426 +static char *resume_reasons[][17] = { { /* GTA01 */
16427 +       "EINT00_NULL",
16428 +       "EINT01_GSM",
16429 +       "EINT02_NULL",
16430 +       "EINT03_NULL",
16431 +       "EINT04_JACK",
16432 +       "EINT05_SDCARD",
16433 +       "EINT06_AUXKEY",
16434 +       "EINT07_HOLDKEY",
16435 +       "EINT08_NULL",
16436 +       "EINT09_NULL",
16437 +       "EINT10_NULL",
16438 +       "EINT11_NULL",
16439 +       "EINT12_NULL",
16440 +       "EINT13_NULL",
16441 +       "EINT14_NULL",
16442 +       "EINT15_NULL",
16443 +       NULL
16444 +}, { /* GTA02 */
16445 +       "EINT00_ACCEL1",
16446 +       "EINT01_GSM",
16447 +       "EINT02_BLUETOOTH",
16448 +       "EINT03_DEBUGBRD",
16449 +       "EINT04_JACK",
16450 +       "EINT05_WLAN",
16451 +       "EINT06_AUXKEY",
16452 +       "EINT07_HOLDKEY",
16453 +       "EINT08_ACCEL2",
16454 +       "EINT09_PMU",
16455 +       "EINT10_NULL",
16456 +       "EINT11_NULL",
16457 +       "EINT12_GLAMO",
16458 +       "EINT13_NULL",
16459 +       "EINT14_NULL",
16460 +       "EINT15_NULL",
16461 +       NULL
16462 +} };
16463 +
16464 +static ssize_t resume_reason_read(struct device *dev,
16465 +                                 struct device_attribute *attr,
16466 +                                 char *buf)
16467 +{
16468 +       int bit = 0;
16469 +       char *end = buf;
16470 +       int gta = !!machine_is_neo1973_gta02();
16471 +
16472 +       for (bit = 0; resume_reasons[gta][bit]; bit++) {
16473 +               if ((*gstatus4_mapped) & (1 << bit))
16474 +                       end += sprintf(end, "* %s\n", resume_reasons[gta][bit]);
16475 +               else
16476 +                       end += sprintf(end, "  %s\n", resume_reasons[gta][bit]);
16477 +
16478 +#ifdef CONFIG_MACH_NEO1973_GTA02
16479 +               if ((gta) && (bit == 9)) /* PMU */
16480 +                       end += pcf50633_report_resumers(pcf50633_global, end);
16481 +#endif
16482 +       }
16483 +
16484 +       return end - buf;
16485 +}
16486 +
16487 +
16488 +static DEVICE_ATTR(resume_reason, 0644, resume_reason_read, NULL);
16489 +
16490 +static struct attribute *neo1973_resume_reason_sysfs_entries[] = {
16491 +       &dev_attr_resume_reason.attr,
16492 +       NULL
16493 +};
16494 +
16495 +static struct attribute_group neo1973_resume_reason_attr_group = {
16496 +       .name   = NULL,
16497 +       .attrs  = neo1973_resume_reason_sysfs_entries,
16498 +};
16499 +
16500 +static int __init neo1973_resume_reason_probe(struct platform_device *pdev)
16501 +{
16502 +       dev_info(&pdev->dev, "starting\n");
16503 +
16504 +       gstatus4_mapped = ioremap(0x560000BC /* GSTATUS4 */, 0x4);
16505 +       if (!gstatus4_mapped) {
16506 +               dev_err(&pdev->dev, "failed to ioremap() memory region\n");
16507 +               return -EINVAL;
16508 +       }
16509 +
16510 +       return sysfs_create_group(&pdev->dev.kobj,
16511 +                                           &neo1973_resume_reason_attr_group);
16512 +}
16513 +
16514 +static int neo1973_resume_reason_remove(struct platform_device *pdev)
16515 +{
16516 +       sysfs_remove_group(&pdev->dev.kobj, &neo1973_resume_reason_attr_group);
16517 +       iounmap(gstatus4_mapped);
16518 +       return 0;
16519 +}
16520 +
16521 +static struct platform_driver neo1973_resume_reason_driver = {
16522 +       .probe          = neo1973_resume_reason_probe,
16523 +       .remove         = neo1973_resume_reason_remove,
16524 +       .driver         = {
16525 +               .name           = "neo1973-resume",
16526 +       },
16527 +};
16528 +
16529 +static int __devinit neo1973_resume_reason_init(void)
16530 +{
16531 +       return platform_driver_register(&neo1973_resume_reason_driver);
16532 +}
16533 +
16534 +static void neo1973_resume_reason_exit(void)
16535 +{
16536 +       platform_driver_unregister(&neo1973_resume_reason_driver);
16537 +}
16538 +
16539 +module_init(neo1973_resume_reason_init);
16540 +module_exit(neo1973_resume_reason_exit);
16541 +
16542 +MODULE_LICENSE("GPL");
16543 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
16544 +MODULE_DESCRIPTION("Neo1973 resume_reason");
16545 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_shadow.c
16546 ===================================================================
16547 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
16548 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_shadow.c       2008-12-11 22:46:49.000000000 +0100
16549 @@ -0,0 +1,86 @@
16550 +/*
16551 + * include/asm-arm/plat-s3c24xx/neo1973.h
16552 + *
16553 + * Common utility code for GTA01 and GTA02
16554 + *
16555 + * Copyright (C) 2008 by Openmoko, Inc.
16556 + * Author: Holger Hans Peter Freyther <freyther@openmoko.org>
16557 + * All rights reserved.
16558 + *
16559 + * This program is free software; you can redistribute it and/or
16560 + * modify it under the terms of the GNU General Public License as
16561 + * published by the Free Software Foundation; either version 2 of
16562 + * the License, or (at your option) any later version.
16563 + *
16564 + * This program is distributed in the hope that it will be useful,
16565 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
16566 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16567 + * GNU General Public License for more details.
16568 + *
16569 + * You should have received a copy of the GNU General Public License
16570 + * along with this program; if not, write to the Free Software
16571 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
16572 + * MA 02111-1307 USA
16573 + *
16574 + */
16575 +
16576 +#include <linux/io.h>
16577 +#include <linux/irq.h>
16578 +
16579 +#include <asm/gpio.h>
16580 +#include <asm/plat-s3c24xx/neo1973.h>
16581 +
16582 +/**
16583 + * Shadow GPIO bank B handling. For the LEDs we need to keep track of the state
16584 + * in software. The s3c2410_gpio_setpin must not be used for GPIOs on bank B
16585 + */
16586 +static unsigned long gpb_mask;
16587 +static unsigned long gpb_state;
16588 +
16589 +void neo1973_gpb_add_shadow_gpio(unsigned int gpio)
16590 +{
16591 +       unsigned long offset = S3C2410_GPIO_OFFSET(gpio);
16592 +       unsigned long flags;
16593 +
16594 +       local_irq_save(flags);
16595 +       gpb_mask |= 1L << offset;
16596 +       local_irq_restore(flags);
16597 +}
16598 +EXPORT_SYMBOL(neo1973_gpb_add_shadow_gpio);
16599 +
16600 +static void set_shadow_gpio(unsigned long offset, unsigned int value)
16601 +{
16602 +       unsigned long state = value != 0;
16603 +
16604 +       gpb_state &= ~(1L << offset);
16605 +       gpb_state |= state << offset;
16606 +}
16607 +
16608 +void neo1973_gpb_setpin(unsigned int pin, unsigned to)
16609 +{
16610 +       void __iomem *base = S3C24XX_GPIO_BASE(S3C2410_GPB0);
16611 +       unsigned long offset = S3C2410_GPIO_OFFSET(pin);
16612 +       unsigned long flags;
16613 +       unsigned long dat;
16614 +
16615 +       BUG_ON(base != S3C24XX_GPIO_BASE(pin));
16616 +
16617 +       local_irq_save(flags);
16618 +       dat = __raw_readl(base + 0x04);
16619 +
16620 +       /* Add the shadow values */
16621 +       dat &= ~gpb_mask;
16622 +       dat |= gpb_state;
16623 +
16624 +       /* Do the operation like s3c2410_gpio_setpin */
16625 +       dat &= ~(1L << offset);
16626 +       dat |= to << offset;
16627 +
16628 +       /* Update the shadow state */
16629 +       if ((1L << offset) & gpb_mask)
16630 +               set_shadow_gpio(offset, to);
16631 +
16632 +       __raw_writel(dat, base + 0x04);
16633 +       local_irq_restore(flags);
16634 +}
16635 +EXPORT_SYMBOL(neo1973_gpb_setpin);
16636 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_version.c
16637 ===================================================================
16638 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
16639 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/neo1973_version.c      2008-12-11 22:46:49.000000000 +0100
16640 @@ -0,0 +1,90 @@
16641 +/*
16642 + * PCB version sysfs for the FIC Neo1973 GSM Phone
16643 + *
16644 + * (C) 2007 by Openmoko Inc.
16645 + * Author: Andy Green <andy@openmoko.com>
16646 + * All rights reserved.
16647 + *
16648 + * This program is free software; you can redistribute it and/or modify
16649 + * it under the terms of the GNU General Public License version 2 as
16650 + * published by the Free Software Foundation
16651 + *
16652 + */
16653 +
16654 +#include <linux/module.h>
16655 +#include <linux/init.h>
16656 +#include <linux/kernel.h>
16657 +#include <linux/platform_device.h>
16658 +
16659 +#include <asm/hardware.h>
16660 +#include <asm/mach-types.h>
16661 +
16662 +#ifdef CONFIG_MACH_NEO1973_GTA02
16663 +#include <asm/arch/gta02.h>
16664 +
16665 +static ssize_t version_read(struct device *dev, struct device_attribute *attr,
16666 +                           char *buf)
16667 +{
16668 +       return sprintf(buf, "0x%03X\n", gta02_get_pcb_revision());
16669 +}
16670 +
16671 +
16672 +static DEVICE_ATTR(pcb, 0644, version_read, NULL);
16673 +
16674 +static struct attribute *neo1973_version_sysfs_entries[] = {
16675 +       &dev_attr_pcb.attr,
16676 +       NULL
16677 +};
16678 +
16679 +static struct attribute_group neo1973_version_attr_group = {
16680 +       .name   = NULL,
16681 +       .attrs  = neo1973_version_sysfs_entries,
16682 +};
16683 +
16684 +static int __init neo1973_version_probe(struct platform_device *pdev)
16685 +{
16686 +       dev_info(&pdev->dev, "starting\n");
16687 +
16688 +       switch (machine_arch_type) {
16689 +#ifdef CONFIG_MACH_NEO1973_GTA01
16690 +       case MACH_TYPE_NEO1973_GTA01:
16691 +               return -EINVAL;
16692 +#endif /* CONFIG_MACH_NEO1973_GTA01 */
16693 +       default:
16694 +               break;
16695 +       }
16696 +
16697 +       return sysfs_create_group(&pdev->dev.kobj, &neo1973_version_attr_group);
16698 +}
16699 +
16700 +static int neo1973_version_remove(struct platform_device *pdev)
16701 +{
16702 +       sysfs_remove_group(&pdev->dev.kobj, &neo1973_version_attr_group);
16703 +       return 0;
16704 +}
16705 +
16706 +static struct platform_driver neo1973_version_driver = {
16707 +       .probe          = neo1973_version_probe,
16708 +       .remove         = neo1973_version_remove,
16709 +       .driver         = {
16710 +               .name           = "neo1973-version",
16711 +       },
16712 +};
16713 +
16714 +static int __devinit neo1973_version_init(void)
16715 +{
16716 +       return platform_driver_register(&neo1973_version_driver);
16717 +}
16718 +
16719 +static void neo1973_version_exit(void)
16720 +{
16721 +       platform_driver_unregister(&neo1973_version_driver);
16722 +}
16723 +
16724 +module_init(neo1973_version_init);
16725 +module_exit(neo1973_version_exit);
16726 +
16727 +MODULE_LICENSE("GPL");
16728 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
16729 +MODULE_DESCRIPTION("Neo1973 PCB version");
16730 +#endif
16731 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/pm.c
16732 ===================================================================
16733 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/pm.c      2008-12-11 22:46:07.000000000 +0100
16734 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/pm.c   2008-12-11 22:46:49.000000000 +0100
16735 @@ -169,8 +169,15 @@ static void s3c2410_pm_debug_init(void)
16736  }
16737
16738  #define DBG(fmt...) pm_dbg(fmt)
16739 +#define RESTORE_DBG(fmt...) printk(KERN_DEBUG fmt)
16740  #else
16741 +#if 0
16742  #define DBG(fmt...) printk(KERN_DEBUG fmt)
16743 +#define RESTORE_DBG(fmt...) printk(KERN_DEBUG fmt)
16744 +#else
16745 +#define DBG(fmt...) do { } while (0)
16746 +#define RESTORE_DBG(fmt...) do { } while (0)
16747 +#endif
16748
16749  #define s3c2410_pm_debug_init() do { } while(0)
16750
16751 @@ -392,7 +399,7 @@ void s3c2410_pm_do_save(struct sleep_sav
16752  void s3c2410_pm_do_restore(struct sleep_save *ptr, int count)
16753  {
16754         for (; count > 0; count--, ptr++) {
16755 -               printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
16756 +               RESTORE_DBG("restore %p (restore %08lx, was %08x)\n",
16757                        ptr->reg, ptr->val, __raw_readl(ptr->reg));
16758
16759                 __raw_writel(ptr->val, ptr->reg);
16760 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/s3c244x.c
16761 ===================================================================
16762 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/s3c244x.c 2008-12-11 22:46:07.000000000 +0100
16763 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/s3c244x.c      2008-12-11 22:46:49.000000000 +0100
16764 @@ -67,6 +67,7 @@ void __init s3c244x_map_io(struct map_de
16765
16766         s3c_device_i2c.name  = "s3c2440-i2c";
16767         s3c_device_nand.name = "s3c2440-nand";
16768 +       s3c_device_ts.name = "s3c2440-ts";
16769         s3c_device_usbgadget.name = "s3c2440-usbgadget";
16770  }
16771
16772 Index: linux-2.6.24.7/arch/arm/plat-s3c24xx/time.c
16773 ===================================================================
16774 --- linux-2.6.24.7.orig/arch/arm/plat-s3c24xx/time.c    2008-12-11 22:46:07.000000000 +0100
16775 +++ linux-2.6.24.7/arch/arm/plat-s3c24xx/time.c 2008-12-11 22:46:49.000000000 +0100
16776 @@ -3,6 +3,8 @@
16777   * Copyright (C) 2003-2005 Simtec Electronics
16778   *     Ben Dooks, <ben@simtec.co.uk>
16779   *
16780 + * dyn_tick support by Andrzej Zaborowski based on omap_dyn_tick_timer.
16781 + *
16782   * This program is free software; you can redistribute it and/or modify
16783   * it under the terms of the GNU General Public License as published by
16784   * the Free Software Foundation; either version 2 of the License, or
16785 @@ -42,6 +44,10 @@
16786
16787  static unsigned long timer_startval;
16788  static unsigned long timer_usec_ticks;
16789 +static struct work_struct resume_work;
16790 +
16791 +unsigned long pclk;
16792 +struct clk *clk;
16793
16794  #define TIMER_USEC_SHIFT 16
16795
16796 @@ -179,11 +185,7 @@ static void s3c2410_timer_setup (void)
16797                 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
16798                 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
16799         } else {
16800 -               unsigned long pclk;
16801 -               struct clk *clk;
16802 -
16803 -               /* for the h1940 (and others), we use the pclk from the core
16804 -                * to generate the timer values. since values around 50 to
16805 +               /* since values around 50 to
16806                  * 70MHz are not values we can directly generate the timer
16807                  * value from, we need to pre-scale and divide before using it.
16808                  *
16809 @@ -191,19 +193,9 @@ static void s3c2410_timer_setup (void)
16810                  * (8.45 ticks per usec)
16811                  */
16812
16813 -               /* this is used as default if no other timer can be found */
16814 -
16815 -               clk = clk_get(NULL, "timers");
16816 -               if (IS_ERR(clk))
16817 -                       panic("failed to get clock for system timer");
16818 -
16819 -               clk_enable(clk);
16820 -
16821 -               pclk = clk_get_rate(clk);
16822 -
16823                 /* configure clock tick */
16824 -
16825                 timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
16826 +               printk("timer_usec_ticks = %lu\n", timer_usec_ticks);
16827
16828                 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
16829                 tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
16830 @@ -247,16 +239,244 @@ static void s3c2410_timer_setup (void)
16831         tcon |= S3C2410_TCON_T4START;
16832         tcon &= ~S3C2410_TCON_T4MANUALUPD;
16833         __raw_writel(tcon, S3C2410_TCON);
16834 +
16835 +       __raw_writel(__raw_readl(S3C2410_INTMSK) & (~(1UL << 14)),
16836 +                    S3C2410_INTMSK);
16837 +
16838 +}
16839 +
16840 +struct sys_timer s3c24xx_timer;
16841 +static void timer_resume_work(struct work_struct *work)
16842 +{
16843 +       clk_enable(clk);
16844 +
16845 +#ifdef CONFIG_NO_IDLE_HZ
16846 +       if (s3c24xx_timer.dyn_tick->state & DYN_TICK_ENABLED)
16847 +               s3c24xx_timer.dyn_tick->enable();
16848 +       else
16849 +#endif
16850 +               s3c2410_timer_setup();
16851  }
16852
16853  static void __init s3c2410_timer_init (void)
16854  {
16855 +       if (!use_tclk1_12()) {
16856 +               /* for the h1940 (and others), we use the pclk from the core
16857 +                * to generate the timer values.
16858 +                */
16859 +
16860 +               /* this is used as default if no other timer can be found */
16861 +               clk = clk_get(NULL, "timers");
16862 +               if (IS_ERR(clk))
16863 +                       panic("failed to get clock for system timer");
16864 +
16865 +               clk_enable(clk);
16866 +
16867 +               pclk = clk_get_rate(clk);
16868 +               printk("pclk = %lu\n", pclk);
16869 +       }
16870 +
16871 +       INIT_WORK(&resume_work, timer_resume_work);
16872         s3c2410_timer_setup();
16873         setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
16874  }
16875
16876 +static void s3c2410_timer_resume_work(struct work_struct *work)
16877 +{
16878 +       s3c2410_timer_setup();
16879 +}
16880 +
16881 +static void s3c2410_timer_resume(void)
16882 +{
16883 +       static DECLARE_WORK(work, s3c2410_timer_resume_work);
16884 +       int res;
16885 +
16886 +       res = schedule_work(&work);
16887 +       if (!res)
16888 +               printk(KERN_ERR
16889 +                   "s3c2410_timer_resume_work already queued ???\n");
16890 +}
16891 +
16892 +#ifdef CONFIG_NO_IDLE_HZ
16893 +/*
16894 + * We'll set a constant prescaler so we don't have to bother setting it
16895 + * when reprogramming and so that we avoid costly divisions.
16896 + *
16897 + * (2 * HZ) << INPUT_FREQ_SHIFT is the desired frequency after prescaler.
16898 + * At HZ == 200, HZ * 1024 should work for PCLKs of up to ~53.5 MHz.
16899 + */
16900 +#define INPUT_FREQ_SHIFT       9
16901 +
16902 +static int ticks_last;
16903 +static int ticks_left;
16904 +static uint32_t tcnto_last;
16905 +
16906 +static inline int s3c24xx_timer_read(void)
16907 +{
16908 +       uint32_t tcnto = __raw_readl(S3C2410_TCNTO(4));
16909 +
16910 +       /*
16911 +        * WARNING: sometimes we get called before TCNTB has been
16912 +        * loaded into the counter and TCNTO then returns its previous
16913 +        * value and kill us, so don't do anything before counter is
16914 +        * reloaded.
16915 +        */
16916 +       if (unlikely(tcnto == tcnto_last))
16917 +               return ticks_last;
16918 +
16919 +       tcnto_last = -1;
16920 +       return tcnto <<
16921 +               ((__raw_readl(S3C2410_TCFG1) >> S3C2410_TCFG1_MUX4_SHIFT) & 3);
16922 +}
16923 +
16924 +static inline void s3c24xx_timer_program(int ticks)
16925 +{
16926 +       uint32_t tcon = __raw_readl(S3C2410_TCON) & ~(7 << 20);
16927 +       uint32_t tcfg1 = __raw_readl(S3C2410_TCFG1) & ~S3C2410_TCFG1_MUX4_MASK;
16928 +
16929 +       /* Just make sure the timer is stopped.  */
16930 +       __raw_writel(tcon, S3C2410_TCON);
16931 +
16932 +       /* TODO: add likely()ies / unlikely()ies */
16933 +       if (ticks >> 18) {
16934 +               ticks_last = min(ticks, 0xffff << 3);
16935 +               ticks_left = ticks - ticks_last;
16936 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV16, S3C2410_TCFG1);
16937 +               __raw_writel(ticks_last >> 3, S3C2410_TCNTB(4));
16938 +       } else if (ticks >> 17) {
16939 +               ticks_last = ticks;
16940 +               ticks_left = 0;
16941 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV8, S3C2410_TCFG1);
16942 +               __raw_writel(ticks_last >> 2, S3C2410_TCNTB(4));
16943 +       } else if (ticks >> 16) {
16944 +               ticks_last = ticks;
16945 +               ticks_left = 0;
16946 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV4, S3C2410_TCFG1);
16947 +               __raw_writel(ticks_last >> 1, S3C2410_TCNTB(4));
16948 +       } else {
16949 +               ticks_last = ticks;
16950 +               ticks_left = 0;
16951 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV2, S3C2410_TCFG1);
16952 +               __raw_writel(ticks_last >> 0, S3C2410_TCNTB(4));
16953 +       }
16954 +
16955 +       tcnto_last = __raw_readl(S3C2410_TCNTO(4));
16956 +       __raw_writel(tcon | S3C2410_TCON_T4MANUALUPD,
16957 +                       S3C2410_TCON);
16958 +       __raw_writel(tcon | S3C2410_TCON_T4START,
16959 +                       S3C2410_TCON);
16960 +}
16961 +
16962 +/*
16963 + * If we have already waited all the time we were supposed to wait,
16964 + * kick the timer, setting the longest allowed timeout value just
16965 + * for time-keeping.
16966 + */
16967 +static inline void s3c24xx_timer_program_idle(void)
16968 +{
16969 +       s3c24xx_timer_program(0xffff << 3);
16970 +}
16971 +
16972 +static inline void s3c24xx_timer_update(int restart)
16973 +{
16974 +       int ticks_cur = s3c24xx_timer_read();
16975 +       int jiffies_elapsed = (ticks_last - ticks_cur) >> INPUT_FREQ_SHIFT;
16976 +       int subjiffy = ticks_last - (jiffies_elapsed << INPUT_FREQ_SHIFT);
16977 +
16978 +       if (restart) {
16979 +               if (ticks_left >= (1 << INPUT_FREQ_SHIFT))
16980 +                       s3c24xx_timer_program(ticks_left);
16981 +               else
16982 +                       s3c24xx_timer_program_idle();
16983 +               ticks_last += subjiffy;
16984 +       } else
16985 +               ticks_last = subjiffy;
16986 +
16987 +       while (jiffies_elapsed --)
16988 +               timer_tick();
16989 +}
16990 +
16991 +/* Called when the timer expires.  */
16992 +static irqreturn_t s3c24xx_timer_handler(int irq, void *dev_id)
16993 +{
16994 +       tcnto_last = -1;
16995 +       s3c24xx_timer_update(1);
16996 +
16997 +       return IRQ_HANDLED;
16998 +}
16999 +
17000 +/* Called to update jiffies with time elapsed.  */
17001 +static irqreturn_t s3c24xx_timer_handler_dyn_tick(int irq, void *dev_id)
17002 +{
17003 +       s3c24xx_timer_update(0);
17004 +
17005 +       return IRQ_HANDLED;
17006 +}
17007 +
17008 +/*
17009 + * Programs the next timer interrupt needed.  Called when dynamic tick is
17010 + * enabled, and to reprogram the ticks to skip from pm_idle.  The CPU goes
17011 + * to sleep directly after this.
17012 + */
17013 +static void s3c24xx_timer_reprogram_dyn_tick(unsigned long next_jiffies)
17014 +{
17015 +       int subjiffy_left = ticks_last - s3c24xx_timer_read();
17016 +
17017 +       s3c24xx_timer_program(max((int) next_jiffies, 1) << INPUT_FREQ_SHIFT);
17018 +       ticks_last += subjiffy_left;
17019 +}
17020 +
17021 +static unsigned long s3c24xx_timer_offset_dyn_tick(void)
17022 +{
17023 +       /* TODO */
17024 +       return 0;
17025 +}
17026 +
17027 +static int s3c24xx_timer_enable_dyn_tick(void)
17028 +{
17029 +       /* Set our constant prescaler.  */
17030 +       uint32_t tcfg0 = __raw_readl(S3C2410_TCFG0);
17031 +       int prescaler =
17032 +               max(min(256, (int) pclk / (HZ << (INPUT_FREQ_SHIFT + 1))), 1);
17033 +
17034 +       tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
17035 +       tcfg0 |= (prescaler - 1) << S3C2410_TCFG_PRESCALER1_SHIFT;
17036 +       __raw_writel(tcfg0, S3C2410_TCFG0);
17037 +
17038 +       /* Override handlers.  */
17039 +       s3c2410_timer_irq.handler = s3c24xx_timer_handler;
17040 +       s3c24xx_timer.offset = s3c24xx_timer_offset_dyn_tick;
17041 +
17042 +       printk(KERN_INFO "dyn_tick enabled on s3c24xx timer 4, "
17043 +                       "%li Hz pclk with prescaler %i\n", pclk, prescaler);
17044 +
17045 +       s3c24xx_timer_program_idle();
17046 +
17047 +       return 0;
17048 +}
17049 +
17050 +static int s3c24xx_timer_disable_dyn_tick(void)
17051 +{
17052 +       s3c2410_timer_irq.handler = s3c2410_timer_interrupt;
17053 +       s3c24xx_timer.offset = s3c2410_gettimeoffset;
17054 +       s3c2410_timer_setup();
17055 +
17056 +       return 0;
17057 +}
17058 +
17059 +static struct dyn_tick_timer s3c24xx_dyn_tick_timer = {
17060 +       .enable         = s3c24xx_timer_enable_dyn_tick,
17061 +       .disable        = s3c24xx_timer_disable_dyn_tick,
17062 +       .reprogram      = s3c24xx_timer_reprogram_dyn_tick,
17063 +       .handler        = s3c24xx_timer_handler_dyn_tick,
17064 +};
17065 +#endif /* CONFIG_NO_IDLE_HZ */
17066 +
17067  struct sys_timer s3c24xx_timer = {
17068         .init           = s3c2410_timer_init,
17069         .offset         = s3c2410_gettimeoffset,
17070 -       .resume         = s3c2410_timer_setup
17071 +       .resume         = s3c2410_timer_resume,
17072 +#ifdef CONFIG_NO_IDLE_HZ
17073 +       .dyn_tick       = &s3c24xx_dyn_tick_timer,
17074 +#endif
17075  };
17076 Index: linux-2.6.24.7/defconfig-gta01
17077 ===================================================================
17078 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
17079 +++ linux-2.6.24.7/defconfig-gta01      2008-12-11 22:46:49.000000000 +0100
17080 @@ -0,0 +1,1770 @@
17081 +#
17082 +# Automatically generated make config: don't edit
17083 +# Linux kernel version: 2.6.24
17084 +# Mon Feb 25 07:03:56 2008
17085 +#
17086 +CONFIG_ARM=y
17087 +CONFIG_SYS_SUPPORTS_APM_EMULATION=y
17088 +CONFIG_GENERIC_GPIO=y
17089 +# CONFIG_GENERIC_TIME is not set
17090 +# CONFIG_GENERIC_CLOCKEVENTS is not set
17091 +CONFIG_MMU=y
17092 +CONFIG_NO_IOPORT=y
17093 +CONFIG_GENERIC_HARDIRQS=y
17094 +CONFIG_STACKTRACE_SUPPORT=y
17095 +CONFIG_LOCKDEP_SUPPORT=y
17096 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17097 +CONFIG_HARDIRQS_SW_RESEND=y
17098 +CONFIG_GENERIC_IRQ_PROBE=y
17099 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
17100 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17101 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
17102 +CONFIG_GENERIC_HWEIGHT=y
17103 +CONFIG_GENERIC_CALIBRATE_DELAY=y
17104 +CONFIG_ZONE_DMA=y
17105 +CONFIG_FIQ=y
17106 +CONFIG_VECTORS_BASE=0xffff0000
17107 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
17108 +
17109 +#
17110 +# General setup
17111 +#
17112 +CONFIG_EXPERIMENTAL=y
17113 +CONFIG_BROKEN_ON_SMP=y
17114 +CONFIG_LOCK_KERNEL=y
17115 +CONFIG_INIT_ENV_ARG_LIMIT=32
17116 +CONFIG_LOCALVERSION=""
17117 +# CONFIG_LOCALVERSION_AUTO is not set
17118 +CONFIG_SWAP=y
17119 +CONFIG_SYSVIPC=y
17120 +CONFIG_SYSVIPC_SYSCTL=y
17121 +# CONFIG_POSIX_MQUEUE is not set
17122 +# CONFIG_BSD_PROCESS_ACCT is not set
17123 +# CONFIG_TASKSTATS is not set
17124 +# CONFIG_USER_NS is not set
17125 +# CONFIG_PID_NS is not set
17126 +# CONFIG_AUDIT is not set
17127 +CONFIG_IKCONFIG=y
17128 +CONFIG_IKCONFIG_PROC=y
17129 +CONFIG_LOG_BUF_SHIFT=14
17130 +# CONFIG_CGROUPS is not set
17131 +# CONFIG_FAIR_GROUP_SCHED is not set
17132 +# CONFIG_SYSFS_DEPRECATED is not set
17133 +# CONFIG_RELAY is not set
17134 +CONFIG_BLK_DEV_INITRD=y
17135 +CONFIG_INITRAMFS_SOURCE=""
17136 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
17137 +CONFIG_SYSCTL=y
17138 +# CONFIG_EMBEDDED is not set
17139 +CONFIG_UID16=y
17140 +CONFIG_SYSCTL_SYSCALL=y
17141 +CONFIG_KALLSYMS=y
17142 +# CONFIG_KALLSYMS_ALL is not set
17143 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
17144 +CONFIG_HOTPLUG=y
17145 +CONFIG_PRINTK=y
17146 +CONFIG_BUG=y
17147 +CONFIG_ELF_CORE=y
17148 +CONFIG_BASE_FULL=y
17149 +CONFIG_FUTEX=y
17150 +CONFIG_ANON_INODES=y
17151 +CONFIG_EPOLL=y
17152 +CONFIG_SIGNALFD=y
17153 +CONFIG_EVENTFD=y
17154 +CONFIG_SHMEM=y
17155 +CONFIG_VM_EVENT_COUNTERS=y
17156 +CONFIG_SLAB=y
17157 +# CONFIG_SLUB is not set
17158 +# CONFIG_SLOB is not set
17159 +CONFIG_SLABINFO=y
17160 +CONFIG_RT_MUTEXES=y
17161 +# CONFIG_TINY_SHMEM is not set
17162 +CONFIG_BASE_SMALL=0
17163 +CONFIG_MODULES=y
17164 +CONFIG_MODULE_UNLOAD=y
17165 +CONFIG_MODULE_FORCE_UNLOAD=y
17166 +# CONFIG_MODVERSIONS is not set
17167 +# CONFIG_MODULE_SRCVERSION_ALL is not set
17168 +CONFIG_KMOD=y
17169 +CONFIG_BLOCK=y
17170 +# CONFIG_LBD is not set
17171 +# CONFIG_BLK_DEV_IO_TRACE is not set
17172 +# CONFIG_LSF is not set
17173 +# CONFIG_BLK_DEV_BSG is not set
17174 +
17175 +#
17176 +# IO Schedulers
17177 +#
17178 +CONFIG_IOSCHED_NOOP=y
17179 +CONFIG_IOSCHED_AS=m
17180 +CONFIG_IOSCHED_DEADLINE=y
17181 +CONFIG_IOSCHED_CFQ=m
17182 +# CONFIG_DEFAULT_AS is not set
17183 +CONFIG_DEFAULT_DEADLINE=y
17184 +# CONFIG_DEFAULT_CFQ is not set
17185 +# CONFIG_DEFAULT_NOOP is not set
17186 +CONFIG_DEFAULT_IOSCHED="deadline"
17187 +
17188 +#
17189 +# System Type
17190 +#
17191 +# CONFIG_ARCH_AAEC2000 is not set
17192 +# CONFIG_ARCH_INTEGRATOR is not set
17193 +# CONFIG_ARCH_REALVIEW is not set
17194 +# CONFIG_ARCH_VERSATILE is not set
17195 +# CONFIG_ARCH_AT91 is not set
17196 +# CONFIG_ARCH_CLPS7500 is not set
17197 +# CONFIG_ARCH_CLPS711X is not set
17198 +# CONFIG_ARCH_CO285 is not set
17199 +# CONFIG_ARCH_EBSA110 is not set
17200 +# CONFIG_ARCH_EP93XX is not set
17201 +# CONFIG_ARCH_FOOTBRIDGE is not set
17202 +# CONFIG_ARCH_NETX is not set
17203 +# CONFIG_ARCH_H720X is not set
17204 +# CONFIG_ARCH_IMX is not set
17205 +# CONFIG_ARCH_IOP13XX is not set
17206 +# CONFIG_ARCH_IOP32X is not set
17207 +# CONFIG_ARCH_IOP33X is not set
17208 +# CONFIG_ARCH_IXP23XX is not set
17209 +# CONFIG_ARCH_IXP2000 is not set
17210 +# CONFIG_ARCH_IXP4XX is not set
17211 +# CONFIG_ARCH_L7200 is not set
17212 +# CONFIG_ARCH_KS8695 is not set
17213 +# CONFIG_ARCH_NS9XXX is not set
17214 +# CONFIG_ARCH_MXC is not set
17215 +# CONFIG_ARCH_PNX4008 is not set
17216 +# CONFIG_ARCH_PXA is not set
17217 +# CONFIG_ARCH_RPC is not set
17218 +# CONFIG_ARCH_SA1100 is not set
17219 +CONFIG_ARCH_S3C2410=y
17220 +# CONFIG_ARCH_SHARK is not set
17221 +# CONFIG_ARCH_LH7A40X is not set
17222 +# CONFIG_ARCH_DAVINCI is not set
17223 +# CONFIG_ARCH_OMAP is not set
17224 +CONFIG_PLAT_S3C24XX=y
17225 +CONFIG_CPU_S3C244X=y
17226 +CONFIG_S3C2410_DMA=y
17227 +# CONFIG_S3C2410_DMA_DEBUG is not set
17228 +CONFIG_MACH_SMDK=y
17229 +CONFIG_MACH_NEO1973=y
17230 +CONFIG_PLAT_S3C=y
17231 +CONFIG_CPU_LLSERIAL_S3C2410=y
17232 +CONFIG_CPU_LLSERIAL_S3C2440=y
17233 +
17234 +#
17235 +# Boot options
17236 +#
17237 +# CONFIG_S3C_BOOT_WATCHDOG is not set
17238 +# CONFIG_S3C_BOOT_ERROR_RESET is not set
17239 +
17240 +#
17241 +# Power management
17242 +#
17243 +# CONFIG_S3C2410_PM_DEBUG is not set
17244 +# CONFIG_S3C2410_PM_CHECK is not set
17245 +CONFIG_S3C_LOWLEVEL_UART_PORT=0
17246 +
17247 +#
17248 +# S3C2400 Machines
17249 +#
17250 +CONFIG_CPU_S3C2410=y
17251 +CONFIG_CPU_S3C2410_DMA=y
17252 +CONFIG_S3C2410_PM=y
17253 +CONFIG_S3C2410_GPIO=y
17254 +CONFIG_S3C2410_CLOCK=y
17255 +CONFIG_S3C2410_PWM=y
17256 +
17257 +#
17258 +# S3C2410 Machines
17259 +#
17260 +# CONFIG_ARCH_SMDK2410 is not set
17261 +# CONFIG_ARCH_H1940 is not set
17262 +# CONFIG_MACH_N30 is not set
17263 +# CONFIG_ARCH_BAST is not set
17264 +# CONFIG_MACH_OTOM is not set
17265 +# CONFIG_MACH_AML_M5900 is not set
17266 +# CONFIG_MACH_VR1000 is not set
17267 +CONFIG_MACH_QT2410=y
17268 +CONFIG_MACH_NEO1973_GTA01=y
17269 +
17270 +#
17271 +# S3C2412 Machines
17272 +#
17273 +# CONFIG_MACH_SMDK2413 is not set
17274 +# CONFIG_MACH_SMDK2412 is not set
17275 +# CONFIG_MACH_VSTMS is not set
17276 +CONFIG_CPU_S3C2440=y
17277 +CONFIG_S3C2440_DMA=y
17278 +CONFIG_S3C2440_C_FIQ=y
17279 +
17280 +#
17281 +# S3C2440 Machines
17282 +#
17283 +# CONFIG_MACH_ANUBIS is not set
17284 +# CONFIG_MACH_OSIRIS is not set
17285 +# CONFIG_MACH_RX3715 is not set
17286 +CONFIG_ARCH_S3C2440=y
17287 +# CONFIG_MACH_NEXCODER_2440 is not set
17288 +CONFIG_SMDK2440_CPU2440=y
17289 +CONFIG_MACH_HXD8=y
17290 +CONFIG_MACH_NEO1973_GTA02=y
17291 +# CONFIG_NEO1973_GTA02_2440 is not set
17292 +CONFIG_CPU_S3C2442=y
17293 +
17294 +#
17295 +# S3C2442 Machines
17296 +#
17297 +CONFIG_SMDK2440_CPU2442=y
17298 +
17299 +#
17300 +# S3C2443 Machines
17301 +#
17302 +# CONFIG_MACH_SMDK2443 is not set
17303 +
17304 +#
17305 +# Processor Type
17306 +#
17307 +CONFIG_CPU_32=y
17308 +CONFIG_CPU_ARM920T=y
17309 +CONFIG_CPU_32v4T=y
17310 +CONFIG_CPU_ABRT_EV4T=y
17311 +CONFIG_CPU_CACHE_V4WT=y
17312 +CONFIG_CPU_CACHE_VIVT=y
17313 +CONFIG_CPU_COPY_V4WB=y
17314 +CONFIG_CPU_TLB_V4WBI=y
17315 +CONFIG_CPU_CP15=y
17316 +CONFIG_CPU_CP15_MMU=y
17317 +
17318 +#
17319 +# Processor Features
17320 +#
17321 +CONFIG_ARM_THUMB=y
17322 +# CONFIG_CPU_ICACHE_DISABLE is not set
17323 +# CONFIG_CPU_DCACHE_DISABLE is not set
17324 +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
17325 +# CONFIG_OUTER_CACHE is not set
17326 +
17327 +#
17328 +# Bus support
17329 +#
17330 +# CONFIG_PCI_SYSCALL is not set
17331 +# CONFIG_ARCH_SUPPORTS_MSI is not set
17332 +# CONFIG_PCCARD is not set
17333 +
17334 +#
17335 +# Kernel Features
17336 +#
17337 +# CONFIG_TICK_ONESHOT is not set
17338 +CONFIG_PREEMPT=y
17339 +CONFIG_NO_IDLE_HZ=y
17340 +CONFIG_HZ=200
17341 +CONFIG_AEABI=y
17342 +CONFIG_OABI_COMPAT=y
17343 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
17344 +CONFIG_SELECT_MEMORY_MODEL=y
17345 +CONFIG_FLATMEM_MANUAL=y
17346 +# CONFIG_DISCONTIGMEM_MANUAL is not set
17347 +# CONFIG_SPARSEMEM_MANUAL is not set
17348 +CONFIG_FLATMEM=y
17349 +CONFIG_FLAT_NODE_MEM_MAP=y
17350 +# CONFIG_SPARSEMEM_STATIC is not set
17351 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
17352 +CONFIG_SPLIT_PTLOCK_CPUS=4096
17353 +# CONFIG_RESOURCES_64BIT is not set
17354 +CONFIG_ZONE_DMA_FLAG=1
17355 +CONFIG_BOUNCE=y
17356 +CONFIG_VIRT_TO_BUS=y
17357 +CONFIG_ALIGNMENT_TRAP=y
17358 +
17359 +#
17360 +# Boot options
17361 +#
17362 +CONFIG_ZBOOT_ROM_TEXT=0x0
17363 +CONFIG_ZBOOT_ROM_BSS=0x0
17364 +CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
17365 +# CONFIG_XIP_KERNEL is not set
17366 +CONFIG_KEXEC=y
17367 +CONFIG_ATAGS_PROC=y
17368 +
17369 +#
17370 +# Floating point emulation
17371 +#
17372 +
17373 +#
17374 +# At least one emulation must be selected
17375 +#
17376 +CONFIG_FPE_NWFPE=y
17377 +# CONFIG_FPE_NWFPE_XP is not set
17378 +# CONFIG_FPE_FASTFPE is not set
17379 +
17380 +#
17381 +# Userspace binary formats
17382 +#
17383 +CONFIG_BINFMT_ELF=y
17384 +# CONFIG_BINFMT_AOUT is not set
17385 +# CONFIG_BINFMT_MISC is not set
17386 +
17387 +#
17388 +# Power management options
17389 +#
17390 +CONFIG_PM=y
17391 +CONFIG_PM_LEGACY=y
17392 +CONFIG_PM_DEBUG=y
17393 +# CONFIG_PM_VERBOSE is not set
17394 +CONFIG_PM_SLEEP=y
17395 +CONFIG_SUSPEND_UP_POSSIBLE=y
17396 +CONFIG_SUSPEND=y
17397 +CONFIG_APM_EMULATION=y
17398 +
17399 +#
17400 +# Networking
17401 +#
17402 +CONFIG_NET=y
17403 +
17404 +#
17405 +# Networking options
17406 +#
17407 +CONFIG_PACKET=y
17408 +CONFIG_PACKET_MMAP=y
17409 +CONFIG_UNIX=y
17410 +CONFIG_XFRM=y
17411 +# CONFIG_XFRM_USER is not set
17412 +# CONFIG_XFRM_SUB_POLICY is not set
17413 +CONFIG_XFRM_MIGRATE=y
17414 +CONFIG_NET_KEY=m
17415 +CONFIG_NET_KEY_MIGRATE=y
17416 +CONFIG_INET=y
17417 +CONFIG_IP_MULTICAST=y
17418 +CONFIG_IP_ADVANCED_ROUTER=y
17419 +CONFIG_ASK_IP_FIB_HASH=y
17420 +# CONFIG_IP_FIB_TRIE is not set
17421 +CONFIG_IP_FIB_HASH=y
17422 +CONFIG_IP_MULTIPLE_TABLES=y
17423 +# CONFIG_IP_ROUTE_MULTIPATH is not set
17424 +# CONFIG_IP_ROUTE_VERBOSE is not set
17425 +CONFIG_IP_PNP=y
17426 +# CONFIG_IP_PNP_DHCP is not set
17427 +# CONFIG_IP_PNP_BOOTP is not set
17428 +# CONFIG_IP_PNP_RARP is not set
17429 +CONFIG_NET_IPIP=m
17430 +CONFIG_NET_IPGRE=m
17431 +# CONFIG_NET_IPGRE_BROADCAST is not set
17432 +# CONFIG_IP_MROUTE is not set
17433 +# CONFIG_ARPD is not set
17434 +CONFIG_SYN_COOKIES=y
17435 +CONFIG_INET_AH=m
17436 +CONFIG_INET_ESP=m
17437 +CONFIG_INET_IPCOMP=m
17438 +CONFIG_INET_XFRM_TUNNEL=m
17439 +CONFIG_INET_TUNNEL=m
17440 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
17441 +CONFIG_INET_XFRM_MODE_TUNNEL=m
17442 +CONFIG_INET_XFRM_MODE_BEET=m
17443 +# CONFIG_INET_LRO is not set
17444 +CONFIG_INET_DIAG=y
17445 +CONFIG_INET_TCP_DIAG=y
17446 +# CONFIG_TCP_CONG_ADVANCED is not set
17447 +CONFIG_TCP_CONG_CUBIC=y
17448 +CONFIG_DEFAULT_TCP_CONG="cubic"
17449 +CONFIG_TCP_MD5SIG=y
17450 +# CONFIG_IP_VS is not set
17451 +CONFIG_IPV6=m
17452 +# CONFIG_IPV6_PRIVACY is not set
17453 +# CONFIG_IPV6_ROUTER_PREF is not set
17454 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
17455 +CONFIG_INET6_AH=m
17456 +CONFIG_INET6_ESP=m
17457 +CONFIG_INET6_IPCOMP=m
17458 +# CONFIG_IPV6_MIP6 is not set
17459 +CONFIG_INET6_XFRM_TUNNEL=m
17460 +CONFIG_INET6_TUNNEL=m
17461 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
17462 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
17463 +CONFIG_INET6_XFRM_MODE_BEET=m
17464 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
17465 +CONFIG_IPV6_SIT=m
17466 +CONFIG_IPV6_TUNNEL=m
17467 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
17468 +# CONFIG_NETWORK_SECMARK is not set
17469 +CONFIG_NETFILTER=y
17470 +# CONFIG_NETFILTER_DEBUG is not set
17471 +
17472 +#
17473 +# Core Netfilter Configuration
17474 +#
17475 +CONFIG_NETFILTER_NETLINK=m
17476 +CONFIG_NETFILTER_NETLINK_QUEUE=m
17477 +CONFIG_NETFILTER_NETLINK_LOG=m
17478 +CONFIG_NF_CONNTRACK_ENABLED=m
17479 +CONFIG_NF_CONNTRACK=m
17480 +CONFIG_NF_CT_ACCT=y
17481 +CONFIG_NF_CONNTRACK_MARK=y
17482 +CONFIG_NF_CONNTRACK_EVENTS=y
17483 +CONFIG_NF_CT_PROTO_GRE=m
17484 +CONFIG_NF_CT_PROTO_SCTP=m
17485 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
17486 +# CONFIG_NF_CONNTRACK_AMANDA is not set
17487 +CONFIG_NF_CONNTRACK_FTP=m
17488 +CONFIG_NF_CONNTRACK_H323=m
17489 +CONFIG_NF_CONNTRACK_IRC=m
17490 +CONFIG_NF_CONNTRACK_NETBIOS_NS=m
17491 +CONFIG_NF_CONNTRACK_PPTP=m
17492 +CONFIG_NF_CONNTRACK_SANE=m
17493 +CONFIG_NF_CONNTRACK_SIP=m
17494 +CONFIG_NF_CONNTRACK_TFTP=m
17495 +CONFIG_NF_CT_NETLINK=m
17496 +CONFIG_NETFILTER_XTABLES=m
17497 +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
17498 +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
17499 +CONFIG_NETFILTER_XT_TARGET_DSCP=m
17500 +CONFIG_NETFILTER_XT_TARGET_MARK=m
17501 +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
17502 +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
17503 +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
17504 +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
17505 +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
17506 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
17507 +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
17508 +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
17509 +CONFIG_NETFILTER_XT_MATCH_DCCP=m
17510 +CONFIG_NETFILTER_XT_MATCH_DSCP=m
17511 +CONFIG_NETFILTER_XT_MATCH_ESP=m
17512 +CONFIG_NETFILTER_XT_MATCH_HELPER=m
17513 +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
17514 +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
17515 +CONFIG_NETFILTER_XT_MATCH_MAC=m
17516 +CONFIG_NETFILTER_XT_MATCH_MARK=m
17517 +CONFIG_NETFILTER_XT_MATCH_POLICY=m
17518 +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
17519 +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
17520 +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
17521 +CONFIG_NETFILTER_XT_MATCH_REALM=m
17522 +CONFIG_NETFILTER_XT_MATCH_SCTP=m
17523 +CONFIG_NETFILTER_XT_MATCH_STATE=m
17524 +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
17525 +CONFIG_NETFILTER_XT_MATCH_STRING=m
17526 +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
17527 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
17528 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
17529 +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
17530 +
17531 +#
17532 +# IP: Netfilter Configuration
17533 +#
17534 +CONFIG_NF_CONNTRACK_IPV4=m
17535 +CONFIG_NF_CONNTRACK_PROC_COMPAT=y
17536 +# CONFIG_IP_NF_QUEUE is not set
17537 +CONFIG_IP_NF_IPTABLES=m
17538 +CONFIG_IP_NF_MATCH_IPRANGE=m
17539 +CONFIG_IP_NF_MATCH_TOS=m
17540 +# CONFIG_IP_NF_MATCH_RECENT is not set
17541 +CONFIG_IP_NF_MATCH_ECN=m
17542 +CONFIG_IP_NF_MATCH_AH=m
17543 +CONFIG_IP_NF_MATCH_TTL=m
17544 +CONFIG_IP_NF_MATCH_OWNER=m
17545 +CONFIG_IP_NF_MATCH_ADDRTYPE=m
17546 +CONFIG_IP_NF_FILTER=m
17547 +CONFIG_IP_NF_TARGET_REJECT=m
17548 +CONFIG_IP_NF_TARGET_LOG=m
17549 +CONFIG_IP_NF_TARGET_ULOG=m
17550 +CONFIG_NF_NAT=m
17551 +CONFIG_NF_NAT_NEEDED=y
17552 +CONFIG_IP_NF_TARGET_MASQUERADE=m
17553 +CONFIG_IP_NF_TARGET_REDIRECT=m
17554 +CONFIG_IP_NF_TARGET_NETMAP=m
17555 +CONFIG_IP_NF_TARGET_SAME=m
17556 +CONFIG_NF_NAT_SNMP_BASIC=m
17557 +CONFIG_NF_NAT_PROTO_GRE=m
17558 +CONFIG_NF_NAT_FTP=m
17559 +CONFIG_NF_NAT_IRC=m
17560 +CONFIG_NF_NAT_TFTP=m
17561 +# CONFIG_NF_NAT_AMANDA is not set
17562 +CONFIG_NF_NAT_PPTP=m
17563 +CONFIG_NF_NAT_H323=m
17564 +CONFIG_NF_NAT_SIP=m
17565 +CONFIG_IP_NF_MANGLE=m
17566 +CONFIG_IP_NF_TARGET_TOS=m
17567 +CONFIG_IP_NF_TARGET_ECN=m
17568 +CONFIG_IP_NF_TARGET_TTL=m
17569 +CONFIG_IP_NF_TARGET_CLUSTERIP=m
17570 +# CONFIG_IP_NF_RAW is not set
17571 +# CONFIG_IP_NF_ARPTABLES is not set
17572 +
17573 +#
17574 +# IPv6: Netfilter Configuration (EXPERIMENTAL)
17575 +#
17576 +CONFIG_NF_CONNTRACK_IPV6=m
17577 +# CONFIG_IP6_NF_QUEUE is not set
17578 +CONFIG_IP6_NF_IPTABLES=m
17579 +CONFIG_IP6_NF_MATCH_RT=m
17580 +CONFIG_IP6_NF_MATCH_OPTS=m
17581 +CONFIG_IP6_NF_MATCH_FRAG=m
17582 +CONFIG_IP6_NF_MATCH_HL=m
17583 +CONFIG_IP6_NF_MATCH_OWNER=m
17584 +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
17585 +CONFIG_IP6_NF_MATCH_AH=m
17586 +CONFIG_IP6_NF_MATCH_MH=m
17587 +CONFIG_IP6_NF_MATCH_EUI64=m
17588 +CONFIG_IP6_NF_FILTER=m
17589 +CONFIG_IP6_NF_TARGET_LOG=m
17590 +CONFIG_IP6_NF_TARGET_REJECT=m
17591 +CONFIG_IP6_NF_MANGLE=m
17592 +CONFIG_IP6_NF_TARGET_HL=m
17593 +# CONFIG_IP6_NF_RAW is not set
17594 +# CONFIG_IP_DCCP is not set
17595 +# CONFIG_IP_SCTP is not set
17596 +# CONFIG_TIPC is not set
17597 +# CONFIG_ATM is not set
17598 +# CONFIG_BRIDGE is not set
17599 +# CONFIG_VLAN_8021Q is not set
17600 +# CONFIG_DECNET is not set
17601 +# CONFIG_LLC2 is not set
17602 +# CONFIG_IPX is not set
17603 +# CONFIG_ATALK is not set
17604 +# CONFIG_X25 is not set
17605 +# CONFIG_LAPB is not set
17606 +# CONFIG_ECONET is not set
17607 +# CONFIG_WAN_ROUTER is not set
17608 +CONFIG_NET_SCHED=y
17609 +
17610 +#
17611 +# Queueing/Scheduling
17612 +#
17613 +CONFIG_NET_SCH_CBQ=m
17614 +CONFIG_NET_SCH_HTB=m
17615 +CONFIG_NET_SCH_HFSC=m
17616 +CONFIG_NET_SCH_PRIO=m
17617 +# CONFIG_NET_SCH_RR is not set
17618 +CONFIG_NET_SCH_RED=m
17619 +CONFIG_NET_SCH_SFQ=m
17620 +CONFIG_NET_SCH_TEQL=m
17621 +CONFIG_NET_SCH_TBF=m
17622 +CONFIG_NET_SCH_GRED=m
17623 +CONFIG_NET_SCH_DSMARK=m
17624 +CONFIG_NET_SCH_NETEM=m
17625 +CONFIG_NET_SCH_INGRESS=m
17626 +
17627 +#
17628 +# Classification
17629 +#
17630 +CONFIG_NET_CLS=y
17631 +CONFIG_NET_CLS_BASIC=m
17632 +CONFIG_NET_CLS_TCINDEX=m
17633 +CONFIG_NET_CLS_ROUTE4=m
17634 +CONFIG_NET_CLS_ROUTE=y
17635 +CONFIG_NET_CLS_FW=m
17636 +CONFIG_NET_CLS_U32=m
17637 +CONFIG_CLS_U32_PERF=y
17638 +CONFIG_CLS_U32_MARK=y
17639 +CONFIG_NET_CLS_RSVP=m
17640 +CONFIG_NET_CLS_RSVP6=m
17641 +# CONFIG_NET_EMATCH is not set
17642 +# CONFIG_NET_CLS_ACT is not set
17643 +# CONFIG_NET_CLS_POLICE is not set
17644 +# CONFIG_NET_CLS_IND is not set
17645 +CONFIG_NET_SCH_FIFO=y
17646 +
17647 +#
17648 +# Network testing
17649 +#
17650 +# CONFIG_NET_PKTGEN is not set
17651 +# CONFIG_HAMRADIO is not set
17652 +# CONFIG_IRDA is not set
17653 +CONFIG_BT=m
17654 +CONFIG_BT_L2CAP=m
17655 +CONFIG_BT_SCO=m
17656 +CONFIG_BT_RFCOMM=m
17657 +CONFIG_BT_RFCOMM_TTY=y
17658 +CONFIG_BT_BNEP=m
17659 +CONFIG_BT_BNEP_MC_FILTER=y
17660 +CONFIG_BT_BNEP_PROTO_FILTER=y
17661 +CONFIG_BT_HIDP=m
17662 +
17663 +#
17664 +# Bluetooth device drivers
17665 +#
17666 +CONFIG_BT_HCIUSB=m
17667 +CONFIG_BT_HCIUSB_SCO=y
17668 +# CONFIG_BT_HCIBTSDIO is not set
17669 +# CONFIG_BT_HCIUART is not set
17670 +# CONFIG_BT_HCIBCM203X is not set
17671 +# CONFIG_BT_HCIBPA10X is not set
17672 +# CONFIG_BT_HCIBFUSB is not set
17673 +# CONFIG_BT_HCIVHCI is not set
17674 +# CONFIG_AF_RXRPC is not set
17675 +CONFIG_FIB_RULES=y
17676 +
17677 +#
17678 +# Wireless
17679 +#
17680 +# CONFIG_CFG80211 is not set
17681 +CONFIG_WIRELESS_EXT=y
17682 +# CONFIG_MAC80211 is not set
17683 +# CONFIG_IEEE80211 is not set
17684 +# CONFIG_RFKILL is not set
17685 +# CONFIG_NET_9P is not set
17686 +
17687 +#
17688 +# Device Drivers
17689 +#
17690 +
17691 +#
17692 +# Generic Driver Options
17693 +#
17694 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
17695 +CONFIG_STANDALONE=y
17696 +CONFIG_PREVENT_FIRMWARE_BUILD=y
17697 +CONFIG_FW_LOADER=m
17698 +# CONFIG_DEBUG_DRIVER is not set
17699 +# CONFIG_DEBUG_DEVRES is not set
17700 +# CONFIG_SYS_HYPERVISOR is not set
17701 +CONFIG_CONNECTOR=m
17702 +CONFIG_MTD=y
17703 +# CONFIG_MTD_DEBUG is not set
17704 +# CONFIG_MTD_CONCAT is not set
17705 +CONFIG_MTD_PARTITIONS=y
17706 +# CONFIG_MTD_REDBOOT_PARTS is not set
17707 +CONFIG_MTD_CMDLINE_PARTS=y
17708 +# CONFIG_MTD_AFS_PARTS is not set
17709 +
17710 +#
17711 +# User Modules And Translation Layers
17712 +#
17713 +CONFIG_MTD_CHAR=y
17714 +CONFIG_MTD_BLKDEVS=y
17715 +CONFIG_MTD_BLOCK=y
17716 +# CONFIG_FTL is not set
17717 +# CONFIG_NFTL is not set
17718 +# CONFIG_INFTL is not set
17719 +# CONFIG_RFD_FTL is not set
17720 +# CONFIG_SSFDC is not set
17721 +# CONFIG_MTD_OOPS is not set
17722 +
17723 +#
17724 +# RAM/ROM/Flash chip drivers
17725 +#
17726 +CONFIG_MTD_CFI=y
17727 +# CONFIG_MTD_JEDECPROBE is not set
17728 +CONFIG_MTD_GEN_PROBE=y
17729 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
17730 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
17731 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
17732 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
17733 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
17734 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
17735 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
17736 +CONFIG_MTD_CFI_I1=y
17737 +CONFIG_MTD_CFI_I2=y
17738 +# CONFIG_MTD_CFI_I4 is not set
17739 +# CONFIG_MTD_CFI_I8 is not set
17740 +CONFIG_MTD_CFI_INTELEXT=y
17741 +# CONFIG_MTD_CFI_AMDSTD is not set
17742 +# CONFIG_MTD_CFI_STAA is not set
17743 +CONFIG_MTD_CFI_UTIL=y
17744 +# CONFIG_MTD_RAM is not set
17745 +# CONFIG_MTD_ROM is not set
17746 +CONFIG_MTD_ABSENT=y
17747 +
17748 +#
17749 +# Mapping drivers for chip access
17750 +#
17751 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
17752 +CONFIG_MTD_PHYSMAP=y
17753 +CONFIG_MTD_PHYSMAP_START=0x8000000
17754 +CONFIG_MTD_PHYSMAP_LEN=0
17755 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
17756 +# CONFIG_MTD_ARM_INTEGRATOR is not set
17757 +# CONFIG_MTD_PLATRAM is not set
17758 +
17759 +#
17760 +# Self-contained MTD device drivers
17761 +#
17762 +# CONFIG_MTD_DATAFLASH is not set
17763 +# CONFIG_MTD_M25P80 is not set
17764 +# CONFIG_MTD_SLRAM is not set
17765 +# CONFIG_MTD_PHRAM is not set
17766 +# CONFIG_MTD_MTDRAM is not set
17767 +# CONFIG_MTD_BLOCK2MTD is not set
17768 +
17769 +#
17770 +# Disk-On-Chip Device Drivers
17771 +#
17772 +# CONFIG_MTD_DOC2000 is not set
17773 +# CONFIG_MTD_DOC2001 is not set
17774 +# CONFIG_MTD_DOC2001PLUS is not set
17775 +CONFIG_MTD_NAND=y
17776 +CONFIG_MTD_NAND_VERIFY_WRITE=y
17777 +# CONFIG_MTD_NAND_ECC_SMC is not set
17778 +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
17779 +CONFIG_MTD_NAND_IDS=y
17780 +CONFIG_MTD_NAND_S3C2410=y
17781 +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
17782 +CONFIG_MTD_NAND_S3C2410_HWECC=y
17783 +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
17784 +# CONFIG_MTD_NAND_DISKONCHIP is not set
17785 +# CONFIG_MTD_NAND_NANDSIM is not set
17786 +# CONFIG_MTD_NAND_PLATFORM is not set
17787 +# CONFIG_MTD_ALAUDA is not set
17788 +# CONFIG_MTD_ONENAND is not set
17789 +
17790 +#
17791 +# UBI - Unsorted block images
17792 +#
17793 +# CONFIG_MTD_UBI is not set
17794 +# CONFIG_PARPORT is not set
17795 +CONFIG_PNP=y
17796 +CONFIG_PNP_DEBUG=y
17797 +
17798 +#
17799 +# Protocols
17800 +#
17801 +# CONFIG_PNPACPI is not set
17802 +CONFIG_BLK_DEV=y
17803 +# CONFIG_BLK_DEV_COW_COMMON is not set
17804 +CONFIG_BLK_DEV_LOOP=m
17805 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
17806 +# CONFIG_BLK_DEV_NBD is not set
17807 +CONFIG_BLK_DEV_UB=m
17808 +CONFIG_BLK_DEV_RAM=y
17809 +CONFIG_BLK_DEV_RAM_COUNT=16
17810 +CONFIG_BLK_DEV_RAM_SIZE=4096
17811 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
17812 +# CONFIG_CDROM_PKTCDVD is not set
17813 +# CONFIG_ATA_OVER_ETH is not set
17814 +CONFIG_MISC_DEVICES=y
17815 +# CONFIG_EEPROM_93CX6 is not set
17816 +# CONFIG_IDE is not set
17817 +
17818 +#
17819 +# SCSI device support
17820 +#
17821 +# CONFIG_RAID_ATTRS is not set
17822 +CONFIG_SCSI=m
17823 +CONFIG_SCSI_DMA=y
17824 +# CONFIG_SCSI_TGT is not set
17825 +# CONFIG_SCSI_NETLINK is not set
17826 +CONFIG_SCSI_PROC_FS=y
17827 +
17828 +#
17829 +# SCSI support type (disk, tape, CD-ROM)
17830 +#
17831 +CONFIG_BLK_DEV_SD=m
17832 +# CONFIG_CHR_DEV_ST is not set
17833 +# CONFIG_CHR_DEV_OSST is not set
17834 +CONFIG_BLK_DEV_SR=m
17835 +# CONFIG_BLK_DEV_SR_VENDOR is not set
17836 +CONFIG_CHR_DEV_SG=m
17837 +# CONFIG_CHR_DEV_SCH is not set
17838 +
17839 +#
17840 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
17841 +#
17842 +# CONFIG_SCSI_MULTI_LUN is not set
17843 +# CONFIG_SCSI_CONSTANTS is not set
17844 +# CONFIG_SCSI_LOGGING is not set
17845 +CONFIG_SCSI_SCAN_ASYNC=y
17846 +CONFIG_SCSI_WAIT_SCAN=m
17847 +
17848 +#
17849 +# SCSI Transports
17850 +#
17851 +# CONFIG_SCSI_SPI_ATTRS is not set
17852 +# CONFIG_SCSI_FC_ATTRS is not set
17853 +# CONFIG_SCSI_ISCSI_ATTRS is not set
17854 +# CONFIG_SCSI_SAS_LIBSAS is not set
17855 +# CONFIG_SCSI_SRP_ATTRS is not set
17856 +CONFIG_SCSI_LOWLEVEL=y
17857 +# CONFIG_ISCSI_TCP is not set
17858 +# CONFIG_SCSI_DEBUG is not set
17859 +# CONFIG_ATA is not set
17860 +# CONFIG_MD is not set
17861 +CONFIG_NETDEVICES=y
17862 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
17863 +# CONFIG_DUMMY is not set
17864 +# CONFIG_BONDING is not set
17865 +# CONFIG_MACVLAN is not set
17866 +# CONFIG_EQUALIZER is not set
17867 +CONFIG_TUN=m
17868 +# CONFIG_VETH is not set
17869 +# CONFIG_NET_SB1000 is not set
17870 +# CONFIG_PHYLIB is not set
17871 +CONFIG_NET_ETHERNET=y
17872 +CONFIG_MII=y
17873 +# CONFIG_AX88796 is not set
17874 +# CONFIG_SMC91X is not set
17875 +# CONFIG_DM9000 is not set
17876 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
17877 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
17878 +# CONFIG_IBM_NEW_EMAC_TAH is not set
17879 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
17880 +CONFIG_NET_PCI=y
17881 +# CONFIG_B44 is not set
17882 +CONFIG_CS89x0=m
17883 +# CONFIG_NETDEV_1000 is not set
17884 +# CONFIG_NETDEV_10000 is not set
17885 +
17886 +#
17887 +# Wireless LAN
17888 +#
17889 +# CONFIG_WLAN_PRE80211 is not set
17890 +# CONFIG_WLAN_80211 is not set
17891 +
17892 +#
17893 +# USB Network Adapters
17894 +#
17895 +CONFIG_USB_CATC=m
17896 +CONFIG_USB_KAWETH=m
17897 +CONFIG_USB_PEGASUS=m
17898 +CONFIG_USB_RTL8150=m
17899 +CONFIG_USB_USBNET=y
17900 +CONFIG_USB_NET_AX8817X=m
17901 +CONFIG_USB_NET_CDCETHER=m
17902 +CONFIG_USB_NET_DM9601=m
17903 +CONFIG_USB_NET_GL620A=m
17904 +CONFIG_USB_NET_NET1080=m
17905 +CONFIG_USB_NET_PLUSB=m
17906 +CONFIG_USB_NET_MCS7830=m
17907 +CONFIG_USB_NET_RNDIS_HOST=m
17908 +CONFIG_USB_NET_CDC_SUBSET=m
17909 +CONFIG_USB_ALI_M5632=y
17910 +CONFIG_USB_AN2720=y
17911 +CONFIG_USB_BELKIN=y
17912 +CONFIG_USB_ARMLINUX=y
17913 +CONFIG_USB_EPSON2888=y
17914 +CONFIG_USB_KC2190=y
17915 +CONFIG_USB_NET_ZAURUS=m
17916 +# CONFIG_WAN is not set
17917 +CONFIG_PPP=m
17918 +CONFIG_PPP_MULTILINK=y
17919 +CONFIG_PPP_FILTER=y
17920 +CONFIG_PPP_ASYNC=m
17921 +CONFIG_PPP_SYNC_TTY=m
17922 +CONFIG_PPP_DEFLATE=m
17923 +CONFIG_PPP_BSDCOMP=m
17924 +CONFIG_PPP_MPPE=m
17925 +# CONFIG_PPPOE is not set
17926 +# CONFIG_PPPOL2TP is not set
17927 +# CONFIG_SLIP is not set
17928 +CONFIG_SLHC=m
17929 +# CONFIG_SHAPER is not set
17930 +# CONFIG_NETCONSOLE is not set
17931 +# CONFIG_NETPOLL is not set
17932 +# CONFIG_NET_POLL_CONTROLLER is not set
17933 +# CONFIG_ISDN is not set
17934 +
17935 +#
17936 +# Input device support
17937 +#
17938 +CONFIG_INPUT=y
17939 +# CONFIG_INPUT_FF_MEMLESS is not set
17940 +# CONFIG_INPUT_POLLDEV is not set
17941 +
17942 +#
17943 +# Userland interfaces
17944 +#
17945 +CONFIG_INPUT_MOUSEDEV=y
17946 +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
17947 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
17948 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
17949 +# CONFIG_INPUT_JOYDEV is not set
17950 +CONFIG_INPUT_EVDEV=y
17951 +# CONFIG_INPUT_EVBUG is not set
17952 +
17953 +#
17954 +# Input Device Drivers
17955 +#
17956 +CONFIG_INPUT_KEYBOARD=y
17957 +# CONFIG_KEYBOARD_ATKBD is not set
17958 +# CONFIG_KEYBOARD_SUNKBD is not set
17959 +# CONFIG_KEYBOARD_LKKBD is not set
17960 +# CONFIG_KEYBOARD_XTKBD is not set
17961 +# CONFIG_KEYBOARD_NEWTON is not set
17962 +CONFIG_KEYBOARD_STOWAWAY=m
17963 +CONFIG_KEYBOARD_GPIO=m
17964 +CONFIG_KEYBOARD_NEO1973=y
17965 +CONFIG_KEYBOARD_QT2410=y
17966 +CONFIG_INPUT_MOUSE=y
17967 +# CONFIG_MOUSE_PS2 is not set
17968 +# CONFIG_MOUSE_SERIAL is not set
17969 +# CONFIG_MOUSE_APPLETOUCH is not set
17970 +# CONFIG_MOUSE_VSXXXAA is not set
17971 +# CONFIG_MOUSE_GPIO is not set
17972 +# CONFIG_INPUT_JOYSTICK is not set
17973 +# CONFIG_INPUT_TABLET is not set
17974 +CONFIG_INPUT_TOUCHSCREEN=y
17975 +# CONFIG_TOUCHSCREEN_ADS7846 is not set
17976 +# CONFIG_TOUCHSCREEN_FUJITSU is not set
17977 +CONFIG_TOUCHSCREEN_S3C2410=y
17978 +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
17979 +# CONFIG_TOUCHSCREEN_GUNZE is not set
17980 +# CONFIG_TOUCHSCREEN_ELO is not set
17981 +# CONFIG_TOUCHSCREEN_MTOUCH is not set
17982 +# CONFIG_TOUCHSCREEN_MK712 is not set
17983 +# CONFIG_TOUCHSCREEN_PENMOUNT is not set
17984 +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
17985 +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
17986 +# CONFIG_TOUCHSCREEN_UCB1400 is not set
17987 +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
17988 +CONFIG_INPUT_MISC=y
17989 +# CONFIG_INPUT_ATI_REMOTE is not set
17990 +# CONFIG_INPUT_ATI_REMOTE2 is not set
17991 +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
17992 +# CONFIG_INPUT_POWERMATE is not set
17993 +# CONFIG_INPUT_YEALINK is not set
17994 +CONFIG_INPUT_UINPUT=m
17995 +CONFIG_INPUT_LIS302DL=y
17996 +
17997 +#
17998 +# Hardware I/O ports
17999 +#
18000 +CONFIG_SERIO=y
18001 +# CONFIG_SERIO_SERPORT is not set
18002 +# CONFIG_SERIO_RAW is not set
18003 +# CONFIG_GAMEPORT is not set
18004 +
18005 +#
18006 +# Character devices
18007 +#
18008 +CONFIG_VT=y
18009 +CONFIG_VT_CONSOLE=y
18010 +CONFIG_NR_TTY_DEVICES=4
18011 +CONFIG_HW_CONSOLE=y
18012 +CONFIG_VT_HW_CONSOLE_BINDING=y
18013 +# CONFIG_SERIAL_NONSTANDARD is not set
18014 +
18015 +#
18016 +# Serial drivers
18017 +#
18018 +# CONFIG_SERIAL_8250 is not set
18019 +
18020 +#
18021 +# Non-8250 serial port support
18022 +#
18023 +CONFIG_SERIAL_S3C2410=y
18024 +CONFIG_SERIAL_S3C2410_CONSOLE=y
18025 +CONFIG_SERIAL_CORE=y
18026 +CONFIG_SERIAL_CORE_CONSOLE=y
18027 +CONFIG_UNIX98_PTYS=y
18028 +# CONFIG_LEGACY_PTYS is not set
18029 +# CONFIG_IPMI_HANDLER is not set
18030 +# CONFIG_HW_RANDOM is not set
18031 +# CONFIG_NVRAM is not set
18032 +# CONFIG_R3964 is not set
18033 +# CONFIG_RAW_DRIVER is not set
18034 +# CONFIG_TCG_TPM is not set
18035 +CONFIG_I2C=y
18036 +CONFIG_I2C_BOARDINFO=y
18037 +CONFIG_I2C_CHARDEV=y
18038 +
18039 +#
18040 +# I2C Algorithms
18041 +#
18042 +# CONFIG_I2C_ALGOBIT is not set
18043 +# CONFIG_I2C_ALGOPCF is not set
18044 +# CONFIG_I2C_ALGOPCA is not set
18045 +
18046 +#
18047 +# I2C Hardware Bus support
18048 +#
18049 +# CONFIG_I2C_GPIO is not set
18050 +# CONFIG_I2C_OCORES is not set
18051 +# CONFIG_I2C_PARPORT_LIGHT is not set
18052 +CONFIG_I2C_S3C2410=y
18053 +# CONFIG_I2C_SIMTEC is not set
18054 +# CONFIG_I2C_TAOS_EVM is not set
18055 +# CONFIG_I2C_STUB is not set
18056 +# CONFIG_I2C_TINY_USB is not set
18057 +
18058 +#
18059 +# Miscellaneous I2C Chip support
18060 +#
18061 +# CONFIG_SENSORS_DS1337 is not set
18062 +# CONFIG_SENSORS_DS1374 is not set
18063 +# CONFIG_DS1682 is not set
18064 +# CONFIG_SENSORS_EEPROM is not set
18065 +CONFIG_SENSORS_PCF50606=y
18066 +CONFIG_SENSORS_PCF50633=y
18067 +# CONFIG_SENSORS_PCF8574 is not set
18068 +# CONFIG_SENSORS_PCA9539 is not set
18069 +# CONFIG_SENSORS_PCF8591 is not set
18070 +# CONFIG_SENSORS_MAX6875 is not set
18071 +# CONFIG_SENSORS_TSL2550 is not set
18072 +CONFIG_SENSORS_TSL256X=m
18073 +# CONFIG_I2C_DEBUG_CORE is not set
18074 +# CONFIG_I2C_DEBUG_ALGO is not set
18075 +# CONFIG_I2C_DEBUG_BUS is not set
18076 +# CONFIG_I2C_DEBUG_CHIP is not set
18077 +
18078 +#
18079 +# SPI support
18080 +#
18081 +CONFIG_SPI=y
18082 +# CONFIG_SPI_DEBUG is not set
18083 +CONFIG_SPI_MASTER=y
18084 +
18085 +#
18086 +# SPI Master Controller Drivers
18087 +#
18088 +CONFIG_SPI_BITBANG=y
18089 +CONFIG_SPI_S3C24XX=y
18090 +CONFIG_SPI_S3C24XX_GPIO=y
18091 +
18092 +#
18093 +# SPI Protocol Masters
18094 +#
18095 +# CONFIG_SPI_AT25 is not set
18096 +# CONFIG_SPI_SPIDEV is not set
18097 +# CONFIG_SPI_TLE62X0 is not set
18098 +# CONFIG_W1 is not set
18099 +CONFIG_POWER_SUPPLY=y
18100 +# CONFIG_POWER_SUPPLY_DEBUG is not set
18101 +# CONFIG_PDA_POWER is not set
18102 +# CONFIG_APM_POWER is not set
18103 +# CONFIG_BATTERY_DS2760 is not set
18104 +CONFIG_BATTERY_GTA01=y
18105 +CONFIG_BATTERY_BQ27000_HDQ=y
18106 +CONFIG_GTA02_HDQ=y
18107 +# CONFIG_HWMON is not set
18108 +CONFIG_WATCHDOG=y
18109 +# CONFIG_WATCHDOG_NOWAYOUT is not set
18110 +
18111 +#
18112 +# Watchdog Device Drivers
18113 +#
18114 +# CONFIG_SOFT_WATCHDOG is not set
18115 +CONFIG_S3C2410_WATCHDOG=m
18116 +
18117 +#
18118 +# USB-based Watchdog Cards
18119 +#
18120 +# CONFIG_USBPCWATCHDOG is not set
18121 +
18122 +#
18123 +# Sonics Silicon Backplane
18124 +#
18125 +CONFIG_SSB_POSSIBLE=y
18126 +# CONFIG_SSB is not set
18127 +
18128 +#
18129 +# Multifunction device drivers
18130 +#
18131 +# CONFIG_MFD_SM501 is not set
18132 +CONFIG_MFD_GLAMO=y
18133 +CONFIG_MFD_GLAMO_FB=y
18134 +CONFIG_MFD_GLAMO_SPI_GPIO=y
18135 +CONFIG_MFD_GLAMO_SPI_FB=y
18136 +CONFIG_MFD_GLAMO_MCI=y
18137 +
18138 +#
18139 +# Multimedia devices
18140 +#
18141 +# CONFIG_VIDEO_DEV is not set
18142 +# CONFIG_DVB_CORE is not set
18143 +CONFIG_DAB=y
18144 +# CONFIG_USB_DABUSB is not set
18145 +
18146 +#
18147 +# Graphics support
18148 +#
18149 +# CONFIG_VGASTATE is not set
18150 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
18151 +CONFIG_FB=y
18152 +# CONFIG_FIRMWARE_EDID is not set
18153 +# CONFIG_FB_DDC is not set
18154 +CONFIG_FB_CFB_FILLRECT=y
18155 +CONFIG_FB_CFB_COPYAREA=y
18156 +CONFIG_FB_CFB_IMAGEBLIT=y
18157 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
18158 +# CONFIG_FB_SYS_FILLRECT is not set
18159 +# CONFIG_FB_SYS_COPYAREA is not set
18160 +# CONFIG_FB_SYS_IMAGEBLIT is not set
18161 +# CONFIG_FB_SYS_FOPS is not set
18162 +CONFIG_FB_DEFERRED_IO=y
18163 +# CONFIG_FB_SVGALIB is not set
18164 +# CONFIG_FB_MACMODES is not set
18165 +# CONFIG_FB_BACKLIGHT is not set
18166 +# CONFIG_FB_MODE_HELPERS is not set
18167 +# CONFIG_FB_TILEBLITTING is not set
18168 +
18169 +#
18170 +# Frame buffer hardware drivers
18171 +#
18172 +# CONFIG_FB_UVESA is not set
18173 +# CONFIG_FB_S1D13XXX is not set
18174 +CONFIG_FB_S3C2410=y
18175 +# CONFIG_FB_S3C2410_DEBUG is not set
18176 +# CONFIG_FB_VIRTUAL is not set
18177 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
18178 +CONFIG_LCD_CLASS_DEVICE=y
18179 +# CONFIG_LCD_LTV350QV is not set
18180 +CONFIG_BACKLIGHT_CLASS_DEVICE=y
18181 +# CONFIG_BACKLIGHT_CORGI is not set
18182 +CONFIG_BACKLIGHT_GTA01=y
18183 +
18184 +#
18185 +# Display device support
18186 +#
18187 +# CONFIG_DISPLAY_SUPPORT is not set
18188 +CONFIG_DISPLAY_JBT6K74=y
18189 +
18190 +#
18191 +# Console display driver support
18192 +#
18193 +# CONFIG_VGA_CONSOLE is not set
18194 +CONFIG_DUMMY_CONSOLE=y
18195 +CONFIG_FRAMEBUFFER_CONSOLE=y
18196 +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
18197 +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
18198 +CONFIG_FONTS=y
18199 +# CONFIG_FONT_8x8 is not set
18200 +# CONFIG_FONT_8x16 is not set
18201 +CONFIG_FONT_6x11=y
18202 +# CONFIG_FONT_7x14 is not set
18203 +# CONFIG_FONT_PEARL_8x8 is not set
18204 +# CONFIG_FONT_ACORN_8x8 is not set
18205 +# CONFIG_FONT_MINI_4x6 is not set
18206 +# CONFIG_FONT_SUN8x16 is not set
18207 +# CONFIG_FONT_SUN12x22 is not set
18208 +# CONFIG_FONT_10x18 is not set
18209 +# CONFIG_LOGO is not set
18210 +
18211 +#
18212 +# Sound
18213 +#
18214 +CONFIG_SOUND=y
18215 +
18216 +#
18217 +# Advanced Linux Sound Architecture
18218 +#
18219 +CONFIG_SND=m
18220 +CONFIG_SND_TIMER=m
18221 +CONFIG_SND_PCM=m
18222 +# CONFIG_SND_SEQUENCER is not set
18223 +CONFIG_SND_OSSEMUL=y
18224 +CONFIG_SND_MIXER_OSS=m
18225 +CONFIG_SND_PCM_OSS=m
18226 +CONFIG_SND_PCM_OSS_PLUGINS=y
18227 +# CONFIG_SND_DYNAMIC_MINORS is not set
18228 +CONFIG_SND_SUPPORT_OLD_API=y
18229 +CONFIG_SND_VERBOSE_PROCFS=y
18230 +# CONFIG_SND_VERBOSE_PRINTK is not set
18231 +# CONFIG_SND_DEBUG is not set
18232 +
18233 +#
18234 +# Generic devices
18235 +#
18236 +# CONFIG_SND_DUMMY is not set
18237 +# CONFIG_SND_MTPAV is not set
18238 +# CONFIG_SND_SERIAL_U16550 is not set
18239 +# CONFIG_SND_MPU401 is not set
18240 +
18241 +#
18242 +# ALSA ARM devices
18243 +#
18244 +
18245 +#
18246 +# SPI devices
18247 +#
18248 +
18249 +#
18250 +# USB devices
18251 +#
18252 +# CONFIG_SND_USB_AUDIO is not set
18253 +# CONFIG_SND_USB_CAIAQ is not set
18254 +
18255 +#
18256 +# System on Chip audio support
18257 +#
18258 +CONFIG_SND_SOC=m
18259 +CONFIG_SND_S3C24XX_SOC=m
18260 +CONFIG_SND_S3C24XX_SOC_I2S=m
18261 +CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753=m
18262 +CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=m
18263 +
18264 +#
18265 +# SoC Audio support for SuperH
18266 +#
18267 +CONFIG_SND_SOC_WM8753=m
18268 +
18269 +#
18270 +# Open Sound System
18271 +#
18272 +# CONFIG_SOUND_PRIME is not set
18273 +CONFIG_HID_SUPPORT=y
18274 +CONFIG_HID=y
18275 +# CONFIG_HID_DEBUG is not set
18276 +# CONFIG_HIDRAW is not set
18277 +
18278 +#
18279 +# USB Input Devices
18280 +#
18281 +CONFIG_USB_HID=m
18282 +# CONFIG_USB_HIDINPUT_POWERBOOK is not set
18283 +# CONFIG_HID_FF is not set
18284 +# CONFIG_USB_HIDDEV is not set
18285 +
18286 +#
18287 +# USB HID Boot Protocol drivers
18288 +#
18289 +# CONFIG_USB_KBD is not set
18290 +# CONFIG_USB_MOUSE is not set
18291 +CONFIG_USB_SUPPORT=y
18292 +CONFIG_USB_ARCH_HAS_HCD=y
18293 +CONFIG_USB_ARCH_HAS_OHCI=y
18294 +# CONFIG_USB_ARCH_HAS_EHCI is not set
18295 +CONFIG_USB=y
18296 +# CONFIG_USB_DEBUG is not set
18297 +
18298 +#
18299 +# Miscellaneous USB options
18300 +#
18301 +CONFIG_USB_DEVICEFS=y
18302 +CONFIG_USB_DEVICE_CLASS=y
18303 +# CONFIG_USB_DYNAMIC_MINORS is not set
18304 +CONFIG_USB_SUSPEND=y
18305 +# CONFIG_USB_PERSIST is not set
18306 +# CONFIG_USB_OTG is not set
18307 +
18308 +#
18309 +# USB Host Controller Drivers
18310 +#
18311 +# CONFIG_USB_ISP116X_HCD is not set
18312 +CONFIG_USB_OHCI_HCD=m
18313 +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
18314 +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
18315 +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
18316 +# CONFIG_USB_SL811_HCD is not set
18317 +# CONFIG_USB_R8A66597_HCD is not set
18318 +
18319 +#
18320 +# USB Device Class drivers
18321 +#
18322 +CONFIG_USB_ACM=m
18323 +CONFIG_USB_PRINTER=m
18324 +
18325 +#
18326 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
18327 +#
18328 +
18329 +#
18330 +# may also be needed; see USB_STORAGE Help for more information
18331 +#
18332 +CONFIG_USB_STORAGE=m
18333 +# CONFIG_USB_STORAGE_DEBUG is not set
18334 +CONFIG_USB_STORAGE_DATAFAB=y
18335 +CONFIG_USB_STORAGE_FREECOM=y
18336 +# CONFIG_USB_STORAGE_ISD200 is not set
18337 +CONFIG_USB_STORAGE_DPCM=y
18338 +CONFIG_USB_STORAGE_USBAT=y
18339 +CONFIG_USB_STORAGE_SDDR09=y
18340 +CONFIG_USB_STORAGE_SDDR55=y
18341 +CONFIG_USB_STORAGE_JUMPSHOT=y
18342 +CONFIG_USB_STORAGE_ALAUDA=y
18343 +CONFIG_USB_STORAGE_KARMA=y
18344 +CONFIG_USB_LIBUSUAL=y
18345 +
18346 +#
18347 +# USB Imaging devices
18348 +#
18349 +# CONFIG_USB_MDC800 is not set
18350 +# CONFIG_USB_MICROTEK is not set
18351 +CONFIG_USB_MON=y
18352 +
18353 +#
18354 +# USB port drivers
18355 +#
18356 +
18357 +#
18358 +# USB Serial Converter support
18359 +#
18360 +CONFIG_USB_SERIAL=m
18361 +CONFIG_USB_SERIAL_GENERIC=y
18362 +CONFIG_USB_SERIAL_AIRCABLE=m
18363 +CONFIG_USB_SERIAL_AIRPRIME=m
18364 +CONFIG_USB_SERIAL_ARK3116=m
18365 +CONFIG_USB_SERIAL_BELKIN=m
18366 +# CONFIG_USB_SERIAL_CH341 is not set
18367 +CONFIG_USB_SERIAL_WHITEHEAT=m
18368 +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
18369 +CONFIG_USB_SERIAL_CP2101=m
18370 +CONFIG_USB_SERIAL_CYPRESS_M8=m
18371 +CONFIG_USB_SERIAL_EMPEG=m
18372 +CONFIG_USB_SERIAL_FTDI_SIO=m
18373 +CONFIG_USB_SERIAL_FUNSOFT=m
18374 +CONFIG_USB_SERIAL_VISOR=m
18375 +CONFIG_USB_SERIAL_IPAQ=m
18376 +CONFIG_USB_SERIAL_IR=m
18377 +CONFIG_USB_SERIAL_EDGEPORT=m
18378 +CONFIG_USB_SERIAL_EDGEPORT_TI=m
18379 +CONFIG_USB_SERIAL_GARMIN=m
18380 +CONFIG_USB_SERIAL_IPW=m
18381 +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
18382 +CONFIG_USB_SERIAL_KEYSPAN=m
18383 +CONFIG_USB_SERIAL_KEYSPAN_MPR=y
18384 +CONFIG_USB_SERIAL_KEYSPAN_USA28=y
18385 +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
18386 +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
18387 +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
18388 +CONFIG_USB_SERIAL_KEYSPAN_USA19=y
18389 +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
18390 +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
18391 +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
18392 +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
18393 +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
18394 +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
18395 +CONFIG_USB_SERIAL_KLSI=m
18396 +CONFIG_USB_SERIAL_KOBIL_SCT=m
18397 +CONFIG_USB_SERIAL_MCT_U232=m
18398 +CONFIG_USB_SERIAL_MOS7720=m
18399 +CONFIG_USB_SERIAL_MOS7840=m
18400 +CONFIG_USB_SERIAL_NAVMAN=m
18401 +CONFIG_USB_SERIAL_PL2303=m
18402 +# CONFIG_USB_SERIAL_OTI6858 is not set
18403 +CONFIG_USB_SERIAL_HP4X=m
18404 +CONFIG_USB_SERIAL_SAFE=m
18405 +CONFIG_USB_SERIAL_SAFE_PADDED=y
18406 +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
18407 +CONFIG_USB_SERIAL_TI=m
18408 +CONFIG_USB_SERIAL_CYBERJACK=m
18409 +CONFIG_USB_SERIAL_XIRCOM=m
18410 +CONFIG_USB_SERIAL_OPTION=m
18411 +CONFIG_USB_SERIAL_OMNINET=m
18412 +# CONFIG_USB_SERIAL_DEBUG is not set
18413 +CONFIG_USB_EZUSB=y
18414 +
18415 +#
18416 +# USB Miscellaneous drivers
18417 +#
18418 +# CONFIG_USB_EMI62 is not set
18419 +# CONFIG_USB_EMI26 is not set
18420 +# CONFIG_USB_ADUTUX is not set
18421 +# CONFIG_USB_AUERSWALD is not set
18422 +# CONFIG_USB_RIO500 is not set
18423 +# CONFIG_USB_LEGOTOWER is not set
18424 +# CONFIG_USB_LCD is not set
18425 +CONFIG_USB_BERRY_CHARGE=m
18426 +# CONFIG_USB_LED is not set
18427 +# CONFIG_USB_CYPRESS_CY7C63 is not set
18428 +# CONFIG_USB_CYTHERM is not set
18429 +# CONFIG_USB_PHIDGET is not set
18430 +# CONFIG_USB_IDMOUSE is not set
18431 +# CONFIG_USB_FTDI_ELAN is not set
18432 +# CONFIG_USB_APPLEDISPLAY is not set
18433 +# CONFIG_USB_LD is not set
18434 +CONFIG_USB_TRANCEVIBRATOR=m
18435 +CONFIG_USB_IOWARRIOR=m
18436 +# CONFIG_USB_TEST is not set
18437 +
18438 +#
18439 +# USB DSL modem support
18440 +#
18441 +
18442 +#
18443 +# USB Gadget Support
18444 +#
18445 +CONFIG_USB_GADGET=y
18446 +# CONFIG_USB_GADGET_DEBUG is not set
18447 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
18448 +CONFIG_USB_GADGET_SELECTED=y
18449 +# CONFIG_USB_GADGET_AMD5536UDC is not set
18450 +# CONFIG_USB_GADGET_ATMEL_USBA is not set
18451 +# CONFIG_USB_GADGET_FSL_USB2 is not set
18452 +# CONFIG_USB_GADGET_NET2280 is not set
18453 +# CONFIG_USB_GADGET_PXA2XX is not set
18454 +# CONFIG_USB_GADGET_M66592 is not set
18455 +# CONFIG_USB_GADGET_GOKU is not set
18456 +# CONFIG_USB_GADGET_LH7A40X is not set
18457 +# CONFIG_USB_GADGET_OMAP is not set
18458 +CONFIG_USB_GADGET_S3C2410=y
18459 +CONFIG_USB_S3C2410=y
18460 +# CONFIG_USB_S3C2410_DEBUG is not set
18461 +# CONFIG_USB_GADGET_AT91 is not set
18462 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
18463 +# CONFIG_USB_GADGET_DUALSPEED is not set
18464 +# CONFIG_USB_ZERO is not set
18465 +CONFIG_USB_ETH=m
18466 +CONFIG_USB_ETH_RNDIS=m
18467 +CONFIG_USB_GADGETFS=m
18468 +CONFIG_USB_FILE_STORAGE=m
18469 +CONFIG_USB_G_SERIAL=m
18470 +CONFIG_USB_MIDI_GADGET=m
18471 +
18472 +#
18473 +# SDIO support
18474 +#
18475 +CONFIG_SDIO=y
18476 +CONFIG_SDIO_S3C24XX=y
18477 +CONFIG_SDIO_S3C24XX_DMA=y
18478 +CONFIG_SDIO_AR6000_WLAN=y
18479 +CONFIG_MMC=y
18480 +# CONFIG_MMC_DEBUG is not set
18481 +CONFIG_MMC_UNSAFE_RESUME=y
18482 +
18483 +#
18484 +# MMC/SD Card Drivers
18485 +#
18486 +CONFIG_MMC_BLOCK=y
18487 +CONFIG_MMC_BLOCK_BOUNCE=y
18488 +# CONFIG_SDIO_UART is not set
18489 +
18490 +#
18491 +# MMC/SD Host Controller Drivers
18492 +#
18493 +# CONFIG_MMC_SPI is not set
18494 +CONFIG_MMC_S3C=y
18495 +CONFIG_NEW_LEDS=y
18496 +CONFIG_LEDS_CLASS=y
18497 +
18498 +#
18499 +# LED drivers
18500 +#
18501 +CONFIG_LEDS_S3C24XX=m
18502 +# CONFIG_LEDS_GPIO is not set
18503 +CONFIG_LEDS_NEO1973_VIBRATOR=y
18504 +CONFIG_LEDS_NEO1973_GTA02=y
18505 +
18506 +#
18507 +# LED Triggers
18508 +#
18509 +CONFIG_LEDS_TRIGGERS=y
18510 +CONFIG_LEDS_TRIGGER_TIMER=y
18511 +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
18512 +CONFIG_RTC_LIB=y
18513 +CONFIG_RTC_CLASS=y
18514 +CONFIG_RTC_HCTOSYS=y
18515 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
18516 +CONFIG_RTC_DEBUG=y
18517 +
18518 +#
18519 +# RTC interfaces
18520 +#
18521 +CONFIG_RTC_INTF_SYSFS=y
18522 +CONFIG_RTC_INTF_PROC=y
18523 +CONFIG_RTC_INTF_DEV=y
18524 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
18525 +# CONFIG_RTC_DRV_TEST is not set
18526 +
18527 +#
18528 +# I2C RTC drivers
18529 +#
18530 +# CONFIG_RTC_DRV_DS1307 is not set
18531 +# CONFIG_RTC_DRV_DS1374 is not set
18532 +# CONFIG_RTC_DRV_DS1672 is not set
18533 +# CONFIG_RTC_DRV_MAX6900 is not set
18534 +# CONFIG_RTC_DRV_RS5C372 is not set
18535 +# CONFIG_RTC_DRV_ISL1208 is not set
18536 +# CONFIG_RTC_DRV_X1205 is not set
18537 +# CONFIG_RTC_DRV_PCF8563 is not set
18538 +# CONFIG_RTC_DRV_PCF8583 is not set
18539 +# CONFIG_RTC_DRV_M41T80 is not set
18540 +
18541 +#
18542 +# SPI RTC drivers
18543 +#
18544 +# CONFIG_RTC_DRV_RS5C348 is not set
18545 +# CONFIG_RTC_DRV_MAX6902 is not set
18546 +
18547 +#
18548 +# Platform RTC drivers
18549 +#
18550 +# CONFIG_RTC_DRV_CMOS is not set
18551 +# CONFIG_RTC_DRV_DS1553 is not set
18552 +# CONFIG_RTC_DRV_STK17TA8 is not set
18553 +# CONFIG_RTC_DRV_DS1742 is not set
18554 +# CONFIG_RTC_DRV_M48T86 is not set
18555 +# CONFIG_RTC_DRV_M48T59 is not set
18556 +# CONFIG_RTC_DRV_V3020 is not set
18557 +
18558 +#
18559 +# on-CPU RTC drivers
18560 +#
18561 +CONFIG_RTC_DRV_S3C=m
18562 +
18563 +#
18564 +# File systems
18565 +#
18566 +CONFIG_EXT2_FS=y
18567 +# CONFIG_EXT2_FS_XATTR is not set
18568 +# CONFIG_EXT2_FS_XIP is not set
18569 +CONFIG_EXT3_FS=y
18570 +# CONFIG_EXT3_FS_XATTR is not set
18571 +# CONFIG_EXT4DEV_FS is not set
18572 +CONFIG_JBD=y
18573 +# CONFIG_REISERFS_FS is not set
18574 +# CONFIG_JFS_FS is not set
18575 +CONFIG_FS_POSIX_ACL=y
18576 +# CONFIG_XFS_FS is not set
18577 +# CONFIG_GFS2_FS is not set
18578 +# CONFIG_OCFS2_FS is not set
18579 +# CONFIG_MINIX_FS is not set
18580 +CONFIG_ROMFS_FS=y
18581 +CONFIG_INOTIFY=y
18582 +CONFIG_INOTIFY_USER=y
18583 +# CONFIG_QUOTA is not set
18584 +CONFIG_DNOTIFY=y
18585 +# CONFIG_AUTOFS_FS is not set
18586 +CONFIG_AUTOFS4_FS=m
18587 +CONFIG_FUSE_FS=m
18588 +
18589 +#
18590 +# CD-ROM/DVD Filesystems
18591 +#
18592 +CONFIG_ISO9660_FS=m
18593 +CONFIG_JOLIET=y
18594 +# CONFIG_ZISOFS is not set
18595 +CONFIG_UDF_FS=m
18596 +
18597 +#
18598 +# DOS/FAT/NT Filesystems
18599 +#
18600 +CONFIG_FAT_FS=y
18601 +CONFIG_MSDOS_FS=y
18602 +CONFIG_VFAT_FS=y
18603 +CONFIG_FAT_DEFAULT_CODEPAGE=437
18604 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
18605 +# CONFIG_NTFS_FS is not set
18606 +
18607 +#
18608 +# Pseudo filesystems
18609 +#
18610 +CONFIG_PROC_FS=y
18611 +CONFIG_PROC_SYSCTL=y
18612 +CONFIG_SYSFS=y
18613 +CONFIG_TMPFS=y
18614 +# CONFIG_TMPFS_POSIX_ACL is not set
18615 +# CONFIG_HUGETLB_PAGE is not set
18616 +CONFIG_CONFIGFS_FS=m
18617 +
18618 +#
18619 +# Miscellaneous filesystems
18620 +#
18621 +# CONFIG_ADFS_FS is not set
18622 +# CONFIG_AFFS_FS is not set
18623 +# CONFIG_HFS_FS is not set
18624 +# CONFIG_HFSPLUS_FS is not set
18625 +# CONFIG_BEFS_FS is not set
18626 +# CONFIG_BFS_FS is not set
18627 +# CONFIG_EFS_FS is not set
18628 +CONFIG_YAFFS_FS=y
18629 +CONFIG_YAFFS_YAFFS1=y
18630 +CONFIG_YAFFS_9BYTE_TAGS=y
18631 +CONFIG_YAFFS_YAFFS2=y
18632 +CONFIG_YAFFS_AUTO_YAFFS2=y
18633 +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
18634 +CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
18635 +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
18636 +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
18637 +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
18638 +CONFIG_JFFS2_FS=y
18639 +CONFIG_JFFS2_FS_DEBUG=0
18640 +CONFIG_JFFS2_FS_WRITEBUFFER=y
18641 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
18642 +CONFIG_JFFS2_SUMMARY=y
18643 +# CONFIG_JFFS2_FS_XATTR is not set
18644 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
18645 +CONFIG_JFFS2_ZLIB=y
18646 +# CONFIG_JFFS2_LZO is not set
18647 +CONFIG_JFFS2_RTIME=y
18648 +# CONFIG_JFFS2_RUBIN is not set
18649 +CONFIG_CRAMFS=y
18650 +# CONFIG_VXFS_FS is not set
18651 +# CONFIG_HPFS_FS is not set
18652 +# CONFIG_QNX4FS_FS is not set
18653 +# CONFIG_SYSV_FS is not set
18654 +# CONFIG_UFS_FS is not set
18655 +CONFIG_NETWORK_FILESYSTEMS=y
18656 +CONFIG_NFS_FS=y
18657 +CONFIG_NFS_V3=y
18658 +# CONFIG_NFS_V3_ACL is not set
18659 +CONFIG_NFS_V4=y
18660 +# CONFIG_NFS_DIRECTIO is not set
18661 +CONFIG_NFSD=m
18662 +CONFIG_NFSD_V3=y
18663 +# CONFIG_NFSD_V3_ACL is not set
18664 +CONFIG_NFSD_V4=y
18665 +CONFIG_NFSD_TCP=y
18666 +CONFIG_ROOT_NFS=y
18667 +CONFIG_LOCKD=y
18668 +CONFIG_LOCKD_V4=y
18669 +CONFIG_EXPORTFS=m
18670 +CONFIG_NFS_COMMON=y
18671 +CONFIG_SUNRPC=y
18672 +CONFIG_SUNRPC_GSS=y
18673 +# CONFIG_SUNRPC_BIND34 is not set
18674 +CONFIG_RPCSEC_GSS_KRB5=y
18675 +# CONFIG_RPCSEC_GSS_SPKM3 is not set
18676 +# CONFIG_SMB_FS is not set
18677 +CONFIG_CIFS=m
18678 +# CONFIG_CIFS_STATS is not set
18679 +CONFIG_CIFS_WEAK_PW_HASH=y
18680 +# CONFIG_CIFS_XATTR is not set
18681 +# CONFIG_CIFS_DEBUG2 is not set
18682 +# CONFIG_CIFS_EXPERIMENTAL is not set
18683 +# CONFIG_NCP_FS is not set
18684 +# CONFIG_CODA_FS is not set
18685 +# CONFIG_AFS_FS is not set
18686 +
18687 +#
18688 +# Partition Types
18689 +#
18690 +# CONFIG_PARTITION_ADVANCED is not set
18691 +CONFIG_MSDOS_PARTITION=y
18692 +CONFIG_NLS=y
18693 +CONFIG_NLS_DEFAULT="iso8859-1"
18694 +CONFIG_NLS_CODEPAGE_437=y
18695 +# CONFIG_NLS_CODEPAGE_737 is not set
18696 +# CONFIG_NLS_CODEPAGE_775 is not set
18697 +CONFIG_NLS_CODEPAGE_850=m
18698 +# CONFIG_NLS_CODEPAGE_852 is not set
18699 +# CONFIG_NLS_CODEPAGE_855 is not set
18700 +# CONFIG_NLS_CODEPAGE_857 is not set
18701 +# CONFIG_NLS_CODEPAGE_860 is not set
18702 +# CONFIG_NLS_CODEPAGE_861 is not set
18703 +# CONFIG_NLS_CODEPAGE_862 is not set
18704 +# CONFIG_NLS_CODEPAGE_863 is not set
18705 +# CONFIG_NLS_CODEPAGE_864 is not set
18706 +# CONFIG_NLS_CODEPAGE_865 is not set
18707 +# CONFIG_NLS_CODEPAGE_866 is not set
18708 +# CONFIG_NLS_CODEPAGE_869 is not set
18709 +CONFIG_NLS_CODEPAGE_936=m
18710 +CONFIG_NLS_CODEPAGE_950=m
18711 +# CONFIG_NLS_CODEPAGE_932 is not set
18712 +# CONFIG_NLS_CODEPAGE_949 is not set
18713 +# CONFIG_NLS_CODEPAGE_874 is not set
18714 +# CONFIG_NLS_ISO8859_8 is not set
18715 +# CONFIG_NLS_CODEPAGE_1250 is not set
18716 +# CONFIG_NLS_CODEPAGE_1251 is not set
18717 +# CONFIG_NLS_ASCII is not set
18718 +CONFIG_NLS_ISO8859_1=y
18719 +# CONFIG_NLS_ISO8859_2 is not set
18720 +# CONFIG_NLS_ISO8859_3 is not set
18721 +# CONFIG_NLS_ISO8859_4 is not set
18722 +# CONFIG_NLS_ISO8859_5 is not set
18723 +# CONFIG_NLS_ISO8859_6 is not set
18724 +# CONFIG_NLS_ISO8859_7 is not set
18725 +# CONFIG_NLS_ISO8859_9 is not set
18726 +# CONFIG_NLS_ISO8859_13 is not set
18727 +# CONFIG_NLS_ISO8859_14 is not set
18728 +# CONFIG_NLS_ISO8859_15 is not set
18729 +# CONFIG_NLS_KOI8_R is not set
18730 +# CONFIG_NLS_KOI8_U is not set
18731 +CONFIG_NLS_UTF8=m
18732 +# CONFIG_DLM is not set
18733 +CONFIG_INSTRUMENTATION=y
18734 +CONFIG_PROFILING=y
18735 +CONFIG_OPROFILE=m
18736 +# CONFIG_MARKERS is not set
18737 +
18738 +#
18739 +# Kernel hacking
18740 +#
18741 +# CONFIG_PRINTK_TIME is not set
18742 +CONFIG_ENABLE_WARN_DEPRECATED=y
18743 +CONFIG_ENABLE_MUST_CHECK=y
18744 +CONFIG_MAGIC_SYSRQ=y
18745 +# CONFIG_UNUSED_SYMBOLS is not set
18746 +# CONFIG_DEBUG_FS is not set
18747 +# CONFIG_HEADERS_CHECK is not set
18748 +CONFIG_DEBUG_KERNEL=y
18749 +# CONFIG_DEBUG_SHIRQ is not set
18750 +CONFIG_DETECT_SOFTLOCKUP=y
18751 +# CONFIG_SCHED_DEBUG is not set
18752 +# CONFIG_SCHEDSTATS is not set
18753 +CONFIG_TIMER_STATS=y
18754 +# CONFIG_DEBUG_SLAB is not set
18755 +CONFIG_DEBUG_PREEMPT=y
18756 +# CONFIG_DEBUG_RT_MUTEXES is not set
18757 +# CONFIG_RT_MUTEX_TESTER is not set
18758 +# CONFIG_DEBUG_SPINLOCK is not set
18759 +# CONFIG_DEBUG_MUTEXES is not set
18760 +# CONFIG_DEBUG_LOCK_ALLOC is not set
18761 +# CONFIG_PROVE_LOCKING is not set
18762 +# CONFIG_LOCK_STAT is not set
18763 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
18764 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
18765 +# CONFIG_DEBUG_KOBJECT is not set
18766 +CONFIG_DEBUG_BUGVERBOSE=y
18767 +CONFIG_DEBUG_INFO=y
18768 +# CONFIG_DEBUG_VM is not set
18769 +# CONFIG_DEBUG_LIST is not set
18770 +# CONFIG_DEBUG_SG is not set
18771 +CONFIG_FRAME_POINTER=y
18772 +CONFIG_FORCED_INLINING=y
18773 +# CONFIG_BOOT_PRINTK_DELAY is not set
18774 +# CONFIG_RCU_TORTURE_TEST is not set
18775 +# CONFIG_FAULT_INJECTION is not set
18776 +# CONFIG_SAMPLES is not set
18777 +# CONFIG_DEBUG_USER is not set
18778 +CONFIG_DEBUG_ERRORS=y
18779 +# CONFIG_DEBUG_LL is not set
18780 +CONFIG_DEBUG_S3C_UART=0
18781 +
18782 +#
18783 +# Security options
18784 +#
18785 +# CONFIG_KEYS is not set
18786 +# CONFIG_SECURITY is not set
18787 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
18788 +CONFIG_CRYPTO=y
18789 +CONFIG_CRYPTO_ALGAPI=y
18790 +CONFIG_CRYPTO_BLKCIPHER=y
18791 +CONFIG_CRYPTO_HASH=y
18792 +CONFIG_CRYPTO_MANAGER=y
18793 +CONFIG_CRYPTO_HMAC=y
18794 +CONFIG_CRYPTO_XCBC=m
18795 +CONFIG_CRYPTO_NULL=m
18796 +CONFIG_CRYPTO_MD4=m
18797 +CONFIG_CRYPTO_MD5=y
18798 +CONFIG_CRYPTO_SHA1=m
18799 +CONFIG_CRYPTO_SHA256=m
18800 +CONFIG_CRYPTO_SHA512=m
18801 +CONFIG_CRYPTO_WP512=m
18802 +CONFIG_CRYPTO_TGR192=m
18803 +CONFIG_CRYPTO_GF128MUL=m
18804 +CONFIG_CRYPTO_ECB=m
18805 +CONFIG_CRYPTO_CBC=y
18806 +CONFIG_CRYPTO_PCBC=m
18807 +CONFIG_CRYPTO_LRW=m
18808 +# CONFIG_CRYPTO_XTS is not set
18809 +# CONFIG_CRYPTO_CRYPTD is not set
18810 +CONFIG_CRYPTO_DES=y
18811 +CONFIG_CRYPTO_FCRYPT=m
18812 +CONFIG_CRYPTO_BLOWFISH=m
18813 +CONFIG_CRYPTO_TWOFISH=m
18814 +CONFIG_CRYPTO_TWOFISH_COMMON=m
18815 +CONFIG_CRYPTO_SERPENT=m
18816 +CONFIG_CRYPTO_AES=m
18817 +CONFIG_CRYPTO_CAST5=m
18818 +CONFIG_CRYPTO_CAST6=m
18819 +CONFIG_CRYPTO_TEA=m
18820 +CONFIG_CRYPTO_ARC4=m
18821 +CONFIG_CRYPTO_KHAZAD=m
18822 +CONFIG_CRYPTO_ANUBIS=m
18823 +# CONFIG_CRYPTO_SEED is not set
18824 +CONFIG_CRYPTO_DEFLATE=m
18825 +CONFIG_CRYPTO_MICHAEL_MIC=m
18826 +CONFIG_CRYPTO_CRC32C=m
18827 +CONFIG_CRYPTO_CAMELLIA=m
18828 +CONFIG_CRYPTO_TEST=m
18829 +# CONFIG_CRYPTO_AUTHENC is not set
18830 +CONFIG_CRYPTO_HW=y
18831 +
18832 +#
18833 +# Library routines
18834 +#
18835 +CONFIG_BITREVERSE=y
18836 +CONFIG_CRC_CCITT=m
18837 +CONFIG_CRC16=m
18838 +# CONFIG_CRC_ITU_T is not set
18839 +CONFIG_CRC32=y
18840 +# CONFIG_CRC7 is not set
18841 +CONFIG_LIBCRC32C=m
18842 +CONFIG_ZLIB_INFLATE=y
18843 +CONFIG_ZLIB_DEFLATE=y
18844 +CONFIG_TEXTSEARCH=y
18845 +CONFIG_TEXTSEARCH_KMP=m
18846 +CONFIG_TEXTSEARCH_BM=m
18847 +CONFIG_TEXTSEARCH_FSM=m
18848 +CONFIG_PLIST=y
18849 +CONFIG_HAS_IOMEM=y
18850 +CONFIG_HAS_DMA=y
18851 Index: linux-2.6.24.7/defconfig-gta02
18852 ===================================================================
18853 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
18854 +++ linux-2.6.24.7/defconfig-gta02      2008-12-11 22:46:49.000000000 +0100
18855 @@ -0,0 +1,1758 @@
18856 +#
18857 +# Automatically generated make config: don't edit
18858 +# Linux kernel version: 2.6.24
18859 +# Wed Nov 12 09:11:19 2008
18860 +#
18861 +CONFIG_ARM=y
18862 +CONFIG_SYS_SUPPORTS_APM_EMULATION=y
18863 +CONFIG_GENERIC_GPIO=y
18864 +# CONFIG_GENERIC_TIME is not set
18865 +# CONFIG_GENERIC_CLOCKEVENTS is not set
18866 +CONFIG_MMU=y
18867 +CONFIG_NO_IOPORT=y
18868 +CONFIG_GENERIC_HARDIRQS=y
18869 +CONFIG_STACKTRACE_SUPPORT=y
18870 +CONFIG_LOCKDEP_SUPPORT=y
18871 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18872 +CONFIG_HARDIRQS_SW_RESEND=y
18873 +CONFIG_GENERIC_IRQ_PROBE=y
18874 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
18875 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
18876 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18877 +CONFIG_GENERIC_HWEIGHT=y
18878 +CONFIG_GENERIC_CALIBRATE_DELAY=y
18879 +CONFIG_ZONE_DMA=y
18880 +CONFIG_FIQ=y
18881 +CONFIG_VECTORS_BASE=0xffff0000
18882 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
18883 +
18884 +#
18885 +# General setup
18886 +#
18887 +CONFIG_EXPERIMENTAL=y
18888 +CONFIG_BROKEN_ON_SMP=y
18889 +CONFIG_LOCK_KERNEL=y
18890 +CONFIG_INIT_ENV_ARG_LIMIT=32
18891 +CONFIG_LOCALVERSION=""
18892 +# CONFIG_LOCALVERSION_AUTO is not set
18893 +CONFIG_SWAP=y
18894 +CONFIG_SYSVIPC=y
18895 +CONFIG_SYSVIPC_SYSCTL=y
18896 +# CONFIG_POSIX_MQUEUE is not set
18897 +# CONFIG_BSD_PROCESS_ACCT is not set
18898 +# CONFIG_TASKSTATS is not set
18899 +# CONFIG_USER_NS is not set
18900 +# CONFIG_PID_NS is not set
18901 +# CONFIG_AUDIT is not set
18902 +CONFIG_IKCONFIG=y
18903 +CONFIG_IKCONFIG_PROC=y
18904 +CONFIG_LOG_BUF_SHIFT=14
18905 +# CONFIG_CGROUPS is not set
18906 +# CONFIG_FAIR_GROUP_SCHED is not set
18907 +# CONFIG_SYSFS_DEPRECATED is not set
18908 +# CONFIG_RELAY is not set
18909 +CONFIG_BLK_DEV_INITRD=y
18910 +CONFIG_INITRAMFS_SOURCE=""
18911 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
18912 +CONFIG_SYSCTL=y
18913 +# CONFIG_EMBEDDED is not set
18914 +CONFIG_UID16=y
18915 +CONFIG_SYSCTL_SYSCALL=y
18916 +CONFIG_KALLSYMS=y
18917 +# CONFIG_KALLSYMS_ALL is not set
18918 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
18919 +CONFIG_HOTPLUG=y
18920 +CONFIG_PRINTK=y
18921 +CONFIG_BUG=y
18922 +CONFIG_ELF_CORE=y
18923 +CONFIG_BASE_FULL=y
18924 +CONFIG_FUTEX=y
18925 +CONFIG_ANON_INODES=y
18926 +CONFIG_EPOLL=y
18927 +CONFIG_SIGNALFD=y
18928 +CONFIG_EVENTFD=y
18929 +CONFIG_SHMEM=y
18930 +CONFIG_VM_EVENT_COUNTERS=y
18931 +CONFIG_SLAB=y
18932 +# CONFIG_SLUB is not set
18933 +# CONFIG_SLOB is not set
18934 +CONFIG_SLABINFO=y
18935 +CONFIG_RT_MUTEXES=y
18936 +# CONFIG_TINY_SHMEM is not set
18937 +CONFIG_BASE_SMALL=0
18938 +CONFIG_MODULES=y
18939 +CONFIG_MODULE_UNLOAD=y
18940 +CONFIG_MODULE_FORCE_UNLOAD=y
18941 +# CONFIG_MODVERSIONS is not set
18942 +# CONFIG_MODULE_SRCVERSION_ALL is not set
18943 +CONFIG_KMOD=y
18944 +CONFIG_BLOCK=y
18945 +# CONFIG_LBD is not set
18946 +# CONFIG_BLK_DEV_IO_TRACE is not set
18947 +# CONFIG_LSF is not set
18948 +# CONFIG_BLK_DEV_BSG is not set
18949 +
18950 +#
18951 +# IO Schedulers
18952 +#
18953 +CONFIG_IOSCHED_NOOP=y
18954 +CONFIG_IOSCHED_AS=m
18955 +CONFIG_IOSCHED_DEADLINE=y
18956 +CONFIG_IOSCHED_CFQ=m
18957 +# CONFIG_DEFAULT_AS is not set
18958 +CONFIG_DEFAULT_DEADLINE=y
18959 +# CONFIG_DEFAULT_CFQ is not set
18960 +# CONFIG_DEFAULT_NOOP is not set
18961 +CONFIG_DEFAULT_IOSCHED="deadline"
18962 +
18963 +#
18964 +# System Type
18965 +#
18966 +# CONFIG_ARCH_AAEC2000 is not set
18967 +# CONFIG_ARCH_INTEGRATOR is not set
18968 +# CONFIG_ARCH_REALVIEW is not set
18969 +# CONFIG_ARCH_VERSATILE is not set
18970 +# CONFIG_ARCH_AT91 is not set
18971 +# CONFIG_ARCH_CLPS7500 is not set
18972 +# CONFIG_ARCH_CLPS711X is not set
18973 +# CONFIG_ARCH_CO285 is not set
18974 +# CONFIG_ARCH_EBSA110 is not set
18975 +# CONFIG_ARCH_EP93XX is not set
18976 +# CONFIG_ARCH_FOOTBRIDGE is not set
18977 +# CONFIG_ARCH_NETX is not set
18978 +# CONFIG_ARCH_H720X is not set
18979 +# CONFIG_ARCH_IMX is not set
18980 +# CONFIG_ARCH_IOP13XX is not set
18981 +# CONFIG_ARCH_IOP32X is not set
18982 +# CONFIG_ARCH_IOP33X is not set
18983 +# CONFIG_ARCH_IXP23XX is not set
18984 +# CONFIG_ARCH_IXP2000 is not set
18985 +# CONFIG_ARCH_IXP4XX is not set
18986 +# CONFIG_ARCH_L7200 is not set
18987 +# CONFIG_ARCH_KS8695 is not set
18988 +# CONFIG_ARCH_NS9XXX is not set
18989 +# CONFIG_ARCH_MXC is not set
18990 +# CONFIG_ARCH_PNX4008 is not set
18991 +# CONFIG_ARCH_PXA is not set
18992 +# CONFIG_ARCH_RPC is not set
18993 +# CONFIG_ARCH_SA1100 is not set
18994 +CONFIG_ARCH_S3C2410=y
18995 +# CONFIG_ARCH_SHARK is not set
18996 +# CONFIG_ARCH_LH7A40X is not set
18997 +# CONFIG_ARCH_DAVINCI is not set
18998 +# CONFIG_ARCH_OMAP is not set
18999 +CONFIG_PLAT_S3C24XX=y
19000 +CONFIG_CPU_S3C244X=y
19001 +CONFIG_S3C2410_DMA=y
19002 +# CONFIG_S3C2410_DMA_DEBUG is not set
19003 +CONFIG_MACH_SMDK=y
19004 +CONFIG_MACH_NEO1973=y
19005 +CONFIG_PLAT_S3C=y
19006 +CONFIG_CPU_LLSERIAL_S3C2410=y
19007 +CONFIG_CPU_LLSERIAL_S3C2440=y
19008 +
19009 +#
19010 +# Boot options
19011 +#
19012 +# CONFIG_S3C_BOOT_WATCHDOG is not set
19013 +# CONFIG_S3C_BOOT_ERROR_RESET is not set
19014 +
19015 +#
19016 +# Power management
19017 +#
19018 +# CONFIG_S3C2410_PM_CHECK is not set
19019 +CONFIG_S3C_LOWLEVEL_UART_PORT=2
19020 +
19021 +#
19022 +# S3C2400 Machines
19023 +#
19024 +CONFIG_CPU_S3C2410=y
19025 +CONFIG_CPU_S3C2410_DMA=y
19026 +CONFIG_S3C2410_PM=y
19027 +CONFIG_S3C2410_GPIO=y
19028 +CONFIG_S3C2410_CLOCK=y
19029 +CONFIG_S3C2410_PWM=y
19030 +
19031 +#
19032 +# S3C2410 Machines
19033 +#
19034 +# CONFIG_ARCH_SMDK2410 is not set
19035 +# CONFIG_ARCH_H1940 is not set
19036 +# CONFIG_MACH_N30 is not set
19037 +# CONFIG_ARCH_BAST is not set
19038 +# CONFIG_MACH_OTOM is not set
19039 +# CONFIG_MACH_AML_M5900 is not set
19040 +# CONFIG_MACH_VR1000 is not set
19041 +CONFIG_MACH_QT2410=y
19042 +CONFIG_MACH_NEO1973_GTA01=y
19043 +
19044 +#
19045 +# S3C2412 Machines
19046 +#
19047 +# CONFIG_MACH_SMDK2413 is not set
19048 +# CONFIG_MACH_SMDK2412 is not set
19049 +# CONFIG_MACH_VSTMS is not set
19050 +CONFIG_CPU_S3C2440=y
19051 +CONFIG_S3C2440_DMA=y
19052 +CONFIG_S3C2440_C_FIQ=y
19053 +
19054 +#
19055 +# S3C2440 Machines
19056 +#
19057 +# CONFIG_MACH_ANUBIS is not set
19058 +# CONFIG_MACH_OSIRIS is not set
19059 +# CONFIG_MACH_RX3715 is not set
19060 +CONFIG_ARCH_S3C2440=y
19061 +# CONFIG_MACH_NEXCODER_2440 is not set
19062 +CONFIG_SMDK2440_CPU2440=y
19063 +CONFIG_MACH_HXD8=y
19064 +CONFIG_MACH_NEO1973_GTA02=y
19065 +# CONFIG_NEO1973_GTA02_2440 is not set
19066 +CONFIG_CPU_S3C2442=y
19067 +
19068 +#
19069 +# S3C2442 Machines
19070 +#
19071 +CONFIG_SMDK2440_CPU2442=y
19072 +
19073 +#
19074 +# S3C2443 Machines
19075 +#
19076 +# CONFIG_MACH_SMDK2443 is not set
19077 +
19078 +#
19079 +# Processor Type
19080 +#
19081 +CONFIG_CPU_32=y
19082 +CONFIG_CPU_ARM920T=y
19083 +CONFIG_CPU_32v4T=y
19084 +CONFIG_CPU_ABRT_EV4T=y
19085 +CONFIG_CPU_CACHE_V4WT=y
19086 +CONFIG_CPU_CACHE_VIVT=y
19087 +CONFIG_CPU_COPY_V4WB=y
19088 +CONFIG_CPU_TLB_V4WBI=y
19089 +CONFIG_CPU_CP15=y
19090 +CONFIG_CPU_CP15_MMU=y
19091 +
19092 +#
19093 +# Processor Features
19094 +#
19095 +CONFIG_ARM_THUMB=y
19096 +# CONFIG_CPU_ICACHE_DISABLE is not set
19097 +# CONFIG_CPU_DCACHE_DISABLE is not set
19098 +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
19099 +# CONFIG_OUTER_CACHE is not set
19100 +
19101 +#
19102 +# Bus support
19103 +#
19104 +# CONFIG_PCI_SYSCALL is not set
19105 +# CONFIG_ARCH_SUPPORTS_MSI is not set
19106 +# CONFIG_PCCARD is not set
19107 +
19108 +#
19109 +# Kernel Features
19110 +#
19111 +# CONFIG_TICK_ONESHOT is not set
19112 +CONFIG_PREEMPT=y
19113 +CONFIG_NO_IDLE_HZ=y
19114 +CONFIG_HZ=200
19115 +CONFIG_AEABI=y
19116 +CONFIG_OABI_COMPAT=y
19117 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
19118 +CONFIG_SELECT_MEMORY_MODEL=y
19119 +CONFIG_FLATMEM_MANUAL=y
19120 +# CONFIG_DISCONTIGMEM_MANUAL is not set
19121 +# CONFIG_SPARSEMEM_MANUAL is not set
19122 +CONFIG_FLATMEM=y
19123 +CONFIG_FLAT_NODE_MEM_MAP=y
19124 +# CONFIG_SPARSEMEM_STATIC is not set
19125 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
19126 +CONFIG_SPLIT_PTLOCK_CPUS=4096
19127 +# CONFIG_RESOURCES_64BIT is not set
19128 +CONFIG_ZONE_DMA_FLAG=1
19129 +CONFIG_BOUNCE=y
19130 +CONFIG_VIRT_TO_BUS=y
19131 +CONFIG_ALIGNMENT_TRAP=y
19132 +
19133 +#
19134 +# Boot options
19135 +#
19136 +CONFIG_ZBOOT_ROM_TEXT=0x0
19137 +CONFIG_ZBOOT_ROM_BSS=0x0
19138 +CONFIG_CMDLINE="unused -- bootloader passes ATAG list"
19139 +# CONFIG_XIP_KERNEL is not set
19140 +CONFIG_KEXEC=y
19141 +CONFIG_ATAGS_PROC=y
19142 +
19143 +#
19144 +# Floating point emulation
19145 +#
19146 +
19147 +#
19148 +# At least one emulation must be selected
19149 +#
19150 +CONFIG_FPE_NWFPE=y
19151 +# CONFIG_FPE_NWFPE_XP is not set
19152 +# CONFIG_FPE_FASTFPE is not set
19153 +
19154 +#
19155 +# Userspace binary formats
19156 +#
19157 +CONFIG_BINFMT_ELF=y
19158 +# CONFIG_BINFMT_AOUT is not set
19159 +# CONFIG_BINFMT_MISC is not set
19160 +
19161 +#
19162 +# Power management options
19163 +#
19164 +CONFIG_PM=y
19165 +CONFIG_PM_LEGACY=y
19166 +CONFIG_PM_DEBUG=y
19167 +# CONFIG_PM_VERBOSE is not set
19168 +CONFIG_PM_SLEEP=y
19169 +CONFIG_SUSPEND_UP_POSSIBLE=y
19170 +CONFIG_SUSPEND=y
19171 +CONFIG_APM_EMULATION=y
19172 +
19173 +#
19174 +# Networking
19175 +#
19176 +CONFIG_NET=y
19177 +
19178 +#
19179 +# Networking options
19180 +#
19181 +CONFIG_PACKET=y
19182 +CONFIG_PACKET_MMAP=y
19183 +CONFIG_UNIX=y
19184 +CONFIG_XFRM=y
19185 +# CONFIG_XFRM_USER is not set
19186 +# CONFIG_XFRM_SUB_POLICY is not set
19187 +CONFIG_XFRM_MIGRATE=y
19188 +CONFIG_NET_KEY=m
19189 +CONFIG_NET_KEY_MIGRATE=y
19190 +CONFIG_INET=y
19191 +CONFIG_IP_MULTICAST=y
19192 +CONFIG_IP_ADVANCED_ROUTER=y
19193 +CONFIG_ASK_IP_FIB_HASH=y
19194 +# CONFIG_IP_FIB_TRIE is not set
19195 +CONFIG_IP_FIB_HASH=y
19196 +CONFIG_IP_MULTIPLE_TABLES=y
19197 +# CONFIG_IP_ROUTE_MULTIPATH is not set
19198 +# CONFIG_IP_ROUTE_VERBOSE is not set
19199 +CONFIG_IP_PNP=y
19200 +# CONFIG_IP_PNP_DHCP is not set
19201 +# CONFIG_IP_PNP_BOOTP is not set
19202 +# CONFIG_IP_PNP_RARP is not set
19203 +CONFIG_NET_IPIP=m
19204 +CONFIG_NET_IPGRE=m
19205 +# CONFIG_NET_IPGRE_BROADCAST is not set
19206 +# CONFIG_IP_MROUTE is not set
19207 +# CONFIG_ARPD is not set
19208 +CONFIG_SYN_COOKIES=y
19209 +CONFIG_INET_AH=m
19210 +CONFIG_INET_ESP=m
19211 +CONFIG_INET_IPCOMP=m
19212 +CONFIG_INET_XFRM_TUNNEL=m
19213 +CONFIG_INET_TUNNEL=m
19214 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
19215 +CONFIG_INET_XFRM_MODE_TUNNEL=m
19216 +CONFIG_INET_XFRM_MODE_BEET=m
19217 +# CONFIG_INET_LRO is not set
19218 +CONFIG_INET_DIAG=y
19219 +CONFIG_INET_TCP_DIAG=y
19220 +# CONFIG_TCP_CONG_ADVANCED is not set
19221 +CONFIG_TCP_CONG_CUBIC=y
19222 +CONFIG_DEFAULT_TCP_CONG="cubic"
19223 +CONFIG_TCP_MD5SIG=y
19224 +# CONFIG_IP_VS is not set
19225 +CONFIG_IPV6=m
19226 +# CONFIG_IPV6_PRIVACY is not set
19227 +# CONFIG_IPV6_ROUTER_PREF is not set
19228 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
19229 +CONFIG_INET6_AH=m
19230 +CONFIG_INET6_ESP=m
19231 +CONFIG_INET6_IPCOMP=m
19232 +# CONFIG_IPV6_MIP6 is not set
19233 +CONFIG_INET6_XFRM_TUNNEL=m
19234 +CONFIG_INET6_TUNNEL=m
19235 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
19236 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
19237 +CONFIG_INET6_XFRM_MODE_BEET=m
19238 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
19239 +CONFIG_IPV6_SIT=m
19240 +CONFIG_IPV6_TUNNEL=m
19241 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
19242 +# CONFIG_NETWORK_SECMARK is not set
19243 +CONFIG_NETFILTER=y
19244 +# CONFIG_NETFILTER_DEBUG is not set
19245 +
19246 +#
19247 +# Core Netfilter Configuration
19248 +#
19249 +CONFIG_NETFILTER_NETLINK=m
19250 +CONFIG_NETFILTER_NETLINK_QUEUE=m
19251 +CONFIG_NETFILTER_NETLINK_LOG=m
19252 +CONFIG_NF_CONNTRACK_ENABLED=m
19253 +CONFIG_NF_CONNTRACK=m
19254 +CONFIG_NF_CT_ACCT=y
19255 +CONFIG_NF_CONNTRACK_MARK=y
19256 +CONFIG_NF_CONNTRACK_EVENTS=y
19257 +CONFIG_NF_CT_PROTO_GRE=m
19258 +CONFIG_NF_CT_PROTO_SCTP=m
19259 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
19260 +# CONFIG_NF_CONNTRACK_AMANDA is not set
19261 +CONFIG_NF_CONNTRACK_FTP=m
19262 +CONFIG_NF_CONNTRACK_H323=m
19263 +CONFIG_NF_CONNTRACK_IRC=m
19264 +CONFIG_NF_CONNTRACK_NETBIOS_NS=m
19265 +CONFIG_NF_CONNTRACK_PPTP=m
19266 +CONFIG_NF_CONNTRACK_SANE=m
19267 +CONFIG_NF_CONNTRACK_SIP=m
19268 +CONFIG_NF_CONNTRACK_TFTP=m
19269 +CONFIG_NF_CT_NETLINK=m
19270 +CONFIG_NETFILTER_XTABLES=m
19271 +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
19272 +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
19273 +CONFIG_NETFILTER_XT_TARGET_DSCP=m
19274 +CONFIG_NETFILTER_XT_TARGET_MARK=m
19275 +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
19276 +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
19277 +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
19278 +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
19279 +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
19280 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
19281 +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
19282 +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
19283 +CONFIG_NETFILTER_XT_MATCH_DCCP=m
19284 +CONFIG_NETFILTER_XT_MATCH_DSCP=m
19285 +CONFIG_NETFILTER_XT_MATCH_ESP=m
19286 +CONFIG_NETFILTER_XT_MATCH_HELPER=m
19287 +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
19288 +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
19289 +CONFIG_NETFILTER_XT_MATCH_MAC=m
19290 +CONFIG_NETFILTER_XT_MATCH_MARK=m
19291 +CONFIG_NETFILTER_XT_MATCH_POLICY=m
19292 +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
19293 +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
19294 +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
19295 +CONFIG_NETFILTER_XT_MATCH_REALM=m
19296 +CONFIG_NETFILTER_XT_MATCH_SCTP=m
19297 +CONFIG_NETFILTER_XT_MATCH_STATE=m
19298 +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
19299 +CONFIG_NETFILTER_XT_MATCH_STRING=m
19300 +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
19301 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
19302 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
19303 +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
19304 +
19305 +#
19306 +# IP: Netfilter Configuration
19307 +#
19308 +CONFIG_NF_CONNTRACK_IPV4=m
19309 +CONFIG_NF_CONNTRACK_PROC_COMPAT=y
19310 +# CONFIG_IP_NF_QUEUE is not set
19311 +CONFIG_IP_NF_IPTABLES=m
19312 +CONFIG_IP_NF_MATCH_IPRANGE=m
19313 +CONFIG_IP_NF_MATCH_TOS=m
19314 +# CONFIG_IP_NF_MATCH_RECENT is not set
19315 +CONFIG_IP_NF_MATCH_ECN=m
19316 +CONFIG_IP_NF_MATCH_AH=m
19317 +CONFIG_IP_NF_MATCH_TTL=m
19318 +CONFIG_IP_NF_MATCH_OWNER=m
19319 +CONFIG_IP_NF_MATCH_ADDRTYPE=m
19320 +CONFIG_IP_NF_FILTER=m
19321 +CONFIG_IP_NF_TARGET_REJECT=m
19322 +CONFIG_IP_NF_TARGET_LOG=m
19323 +CONFIG_IP_NF_TARGET_ULOG=m
19324 +CONFIG_NF_NAT=m
19325 +CONFIG_NF_NAT_NEEDED=y
19326 +CONFIG_IP_NF_TARGET_MASQUERADE=m
19327 +CONFIG_IP_NF_TARGET_REDIRECT=m
19328 +CONFIG_IP_NF_TARGET_NETMAP=m
19329 +CONFIG_IP_NF_TARGET_SAME=m
19330 +CONFIG_NF_NAT_SNMP_BASIC=m
19331 +CONFIG_NF_NAT_PROTO_GRE=m
19332 +CONFIG_NF_NAT_FTP=m
19333 +CONFIG_NF_NAT_IRC=m
19334 +CONFIG_NF_NAT_TFTP=m
19335 +# CONFIG_NF_NAT_AMANDA is not set
19336 +CONFIG_NF_NAT_PPTP=m
19337 +CONFIG_NF_NAT_H323=m
19338 +CONFIG_NF_NAT_SIP=m
19339 +CONFIG_IP_NF_MANGLE=m
19340 +CONFIG_IP_NF_TARGET_TOS=m
19341 +CONFIG_IP_NF_TARGET_ECN=m
19342 +CONFIG_IP_NF_TARGET_TTL=m
19343 +CONFIG_IP_NF_TARGET_CLUSTERIP=m
19344 +# CONFIG_IP_NF_RAW is not set
19345 +# CONFIG_IP_NF_ARPTABLES is not set
19346 +
19347 +#
19348 +# IPv6: Netfilter Configuration (EXPERIMENTAL)
19349 +#
19350 +CONFIG_NF_CONNTRACK_IPV6=m
19351 +# CONFIG_IP6_NF_QUEUE is not set
19352 +CONFIG_IP6_NF_IPTABLES=m
19353 +CONFIG_IP6_NF_MATCH_RT=m
19354 +CONFIG_IP6_NF_MATCH_OPTS=m
19355 +CONFIG_IP6_NF_MATCH_FRAG=m
19356 +CONFIG_IP6_NF_MATCH_HL=m
19357 +CONFIG_IP6_NF_MATCH_OWNER=m
19358 +CONFIG_IP6_NF_MATCH_IPV6HEADER=m
19359 +CONFIG_IP6_NF_MATCH_AH=m
19360 +CONFIG_IP6_NF_MATCH_MH=m
19361 +CONFIG_IP6_NF_MATCH_EUI64=m
19362 +CONFIG_IP6_NF_FILTER=m
19363 +CONFIG_IP6_NF_TARGET_LOG=m
19364 +CONFIG_IP6_NF_TARGET_REJECT=m
19365 +CONFIG_IP6_NF_MANGLE=m
19366 +CONFIG_IP6_NF_TARGET_HL=m
19367 +# CONFIG_IP6_NF_RAW is not set
19368 +# CONFIG_IP_DCCP is not set
19369 +# CONFIG_IP_SCTP is not set
19370 +# CONFIG_TIPC is not set
19371 +# CONFIG_ATM is not set
19372 +# CONFIG_BRIDGE is not set
19373 +# CONFIG_VLAN_8021Q is not set
19374 +# CONFIG_DECNET is not set
19375 +# CONFIG_LLC2 is not set
19376 +# CONFIG_IPX is not set
19377 +# CONFIG_ATALK is not set
19378 +# CONFIG_X25 is not set
19379 +# CONFIG_LAPB is not set
19380 +# CONFIG_ECONET is not set
19381 +# CONFIG_WAN_ROUTER is not set
19382 +CONFIG_NET_SCHED=y
19383 +
19384 +#
19385 +# Queueing/Scheduling
19386 +#
19387 +CONFIG_NET_SCH_CBQ=m
19388 +CONFIG_NET_SCH_HTB=m
19389 +CONFIG_NET_SCH_HFSC=m
19390 +CONFIG_NET_SCH_PRIO=m
19391 +# CONFIG_NET_SCH_RR is not set
19392 +CONFIG_NET_SCH_RED=m
19393 +CONFIG_NET_SCH_SFQ=m
19394 +CONFIG_NET_SCH_TEQL=m
19395 +CONFIG_NET_SCH_TBF=m
19396 +CONFIG_NET_SCH_GRED=m
19397 +CONFIG_NET_SCH_DSMARK=m
19398 +CONFIG_NET_SCH_NETEM=m
19399 +CONFIG_NET_SCH_INGRESS=m
19400 +
19401 +#
19402 +# Classification
19403 +#
19404 +CONFIG_NET_CLS=y
19405 +CONFIG_NET_CLS_BASIC=m
19406 +CONFIG_NET_CLS_TCINDEX=m
19407 +CONFIG_NET_CLS_ROUTE4=m
19408 +CONFIG_NET_CLS_ROUTE=y
19409 +CONFIG_NET_CLS_FW=m
19410 +CONFIG_NET_CLS_U32=m
19411 +CONFIG_CLS_U32_PERF=y
19412 +CONFIG_CLS_U32_MARK=y
19413 +CONFIG_NET_CLS_RSVP=m
19414 +CONFIG_NET_CLS_RSVP6=m
19415 +# CONFIG_NET_EMATCH is not set
19416 +# CONFIG_NET_CLS_ACT is not set
19417 +# CONFIG_NET_CLS_POLICE is not set
19418 +# CONFIG_NET_CLS_IND is not set
19419 +CONFIG_NET_SCH_FIFO=y
19420 +
19421 +#
19422 +# Network testing
19423 +#
19424 +# CONFIG_NET_PKTGEN is not set
19425 +# CONFIG_HAMRADIO is not set
19426 +# CONFIG_IRDA is not set
19427 +CONFIG_BT=m
19428 +CONFIG_BT_L2CAP=m
19429 +CONFIG_BT_SCO=m
19430 +CONFIG_BT_RFCOMM=m
19431 +CONFIG_BT_RFCOMM_TTY=y
19432 +CONFIG_BT_BNEP=m
19433 +CONFIG_BT_BNEP_MC_FILTER=y
19434 +CONFIG_BT_BNEP_PROTO_FILTER=y
19435 +CONFIG_BT_HIDP=m
19436 +
19437 +#
19438 +# Bluetooth device drivers
19439 +#
19440 +CONFIG_BT_HCIUSB=m
19441 +CONFIG_BT_HCIUSB_SCO=y
19442 +# CONFIG_BT_HCIBTSDIO is not set
19443 +# CONFIG_BT_HCIUART is not set
19444 +# CONFIG_BT_HCIBCM203X is not set
19445 +# CONFIG_BT_HCIBPA10X is not set
19446 +# CONFIG_BT_HCIBFUSB is not set
19447 +# CONFIG_BT_HCIVHCI is not set
19448 +# CONFIG_AF_RXRPC is not set
19449 +CONFIG_FIB_RULES=y
19450 +
19451 +#
19452 +# Wireless
19453 +#
19454 +# CONFIG_CFG80211 is not set
19455 +CONFIG_WIRELESS_EXT=y
19456 +# CONFIG_MAC80211 is not set
19457 +# CONFIG_IEEE80211 is not set
19458 +# CONFIG_RFKILL is not set
19459 +# CONFIG_NET_9P is not set
19460 +
19461 +#
19462 +# Device Drivers
19463 +#
19464 +
19465 +#
19466 +# Generic Driver Options
19467 +#
19468 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
19469 +CONFIG_STANDALONE=y
19470 +CONFIG_PREVENT_FIRMWARE_BUILD=y
19471 +CONFIG_FW_LOADER=m
19472 +# CONFIG_DEBUG_DRIVER is not set
19473 +# CONFIG_DEBUG_DEVRES is not set
19474 +# CONFIG_SYS_HYPERVISOR is not set
19475 +CONFIG_CONNECTOR=m
19476 +CONFIG_MTD=y
19477 +# CONFIG_MTD_DEBUG is not set
19478 +# CONFIG_MTD_CONCAT is not set
19479 +CONFIG_MTD_PARTITIONS=y
19480 +# CONFIG_MTD_REDBOOT_PARTS is not set
19481 +CONFIG_MTD_CMDLINE_PARTS=y
19482 +# CONFIG_MTD_AFS_PARTS is not set
19483 +
19484 +#
19485 +# User Modules And Translation Layers
19486 +#
19487 +CONFIG_MTD_CHAR=y
19488 +CONFIG_MTD_BLKDEVS=y
19489 +CONFIG_MTD_BLOCK=y
19490 +# CONFIG_FTL is not set
19491 +# CONFIG_NFTL is not set
19492 +# CONFIG_INFTL is not set
19493 +# CONFIG_RFD_FTL is not set
19494 +# CONFIG_SSFDC is not set
19495 +# CONFIG_MTD_OOPS is not set
19496 +
19497 +#
19498 +# RAM/ROM/Flash chip drivers
19499 +#
19500 +CONFIG_MTD_CFI=y
19501 +# CONFIG_MTD_JEDECPROBE is not set
19502 +CONFIG_MTD_GEN_PROBE=y
19503 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
19504 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
19505 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
19506 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
19507 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
19508 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
19509 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
19510 +CONFIG_MTD_CFI_I1=y
19511 +CONFIG_MTD_CFI_I2=y
19512 +# CONFIG_MTD_CFI_I4 is not set
19513 +# CONFIG_MTD_CFI_I8 is not set
19514 +CONFIG_MTD_CFI_INTELEXT=y
19515 +# CONFIG_MTD_CFI_AMDSTD is not set
19516 +# CONFIG_MTD_CFI_STAA is not set
19517 +CONFIG_MTD_CFI_UTIL=y
19518 +# CONFIG_MTD_RAM is not set
19519 +# CONFIG_MTD_ROM is not set
19520 +CONFIG_MTD_ABSENT=y
19521 +
19522 +#
19523 +# Mapping drivers for chip access
19524 +#
19525 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
19526 +CONFIG_MTD_PHYSMAP=y
19527 +CONFIG_MTD_PHYSMAP_START=0x8000000
19528 +CONFIG_MTD_PHYSMAP_LEN=0
19529 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
19530 +# CONFIG_MTD_ARM_INTEGRATOR is not set
19531 +# CONFIG_MTD_PLATRAM is not set
19532 +
19533 +#
19534 +# Self-contained MTD device drivers
19535 +#
19536 +# CONFIG_MTD_DATAFLASH is not set
19537 +# CONFIG_MTD_M25P80 is not set
19538 +# CONFIG_MTD_SLRAM is not set
19539 +# CONFIG_MTD_PHRAM is not set
19540 +# CONFIG_MTD_MTDRAM is not set
19541 +# CONFIG_MTD_BLOCK2MTD is not set
19542 +
19543 +#
19544 +# Disk-On-Chip Device Drivers
19545 +#
19546 +# CONFIG_MTD_DOC2000 is not set
19547 +# CONFIG_MTD_DOC2001 is not set
19548 +# CONFIG_MTD_DOC2001PLUS is not set
19549 +CONFIG_MTD_NAND=y
19550 +CONFIG_MTD_NAND_VERIFY_WRITE=y
19551 +# CONFIG_MTD_NAND_ECC_SMC is not set
19552 +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
19553 +CONFIG_MTD_NAND_IDS=y
19554 +CONFIG_MTD_NAND_S3C2410=y
19555 +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
19556 +CONFIG_MTD_NAND_S3C2410_HWECC=y
19557 +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
19558 +# CONFIG_MTD_NAND_DISKONCHIP is not set
19559 +# CONFIG_MTD_NAND_NANDSIM is not set
19560 +# CONFIG_MTD_NAND_PLATFORM is not set
19561 +# CONFIG_MTD_ALAUDA is not set
19562 +# CONFIG_MTD_ONENAND is not set
19563 +
19564 +#
19565 +# UBI - Unsorted block images
19566 +#
19567 +# CONFIG_MTD_UBI is not set
19568 +# CONFIG_PARPORT is not set
19569 +CONFIG_PNP=y
19570 +CONFIG_PNP_DEBUG=y
19571 +
19572 +#
19573 +# Protocols
19574 +#
19575 +# CONFIG_PNPACPI is not set
19576 +CONFIG_BLK_DEV=y
19577 +# CONFIG_BLK_DEV_COW_COMMON is not set
19578 +CONFIG_BLK_DEV_LOOP=m
19579 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
19580 +# CONFIG_BLK_DEV_NBD is not set
19581 +CONFIG_BLK_DEV_UB=m
19582 +CONFIG_BLK_DEV_RAM=y
19583 +CONFIG_BLK_DEV_RAM_COUNT=16
19584 +CONFIG_BLK_DEV_RAM_SIZE=4096
19585 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
19586 +# CONFIG_CDROM_PKTCDVD is not set
19587 +# CONFIG_ATA_OVER_ETH is not set
19588 +CONFIG_MISC_DEVICES=y
19589 +# CONFIG_EEPROM_93CX6 is not set
19590 +# CONFIG_IDE is not set
19591 +
19592 +#
19593 +# SCSI device support
19594 +#
19595 +# CONFIG_RAID_ATTRS is not set
19596 +CONFIG_SCSI=m
19597 +CONFIG_SCSI_DMA=y
19598 +# CONFIG_SCSI_TGT is not set
19599 +# CONFIG_SCSI_NETLINK is not set
19600 +CONFIG_SCSI_PROC_FS=y
19601 +
19602 +#
19603 +# SCSI support type (disk, tape, CD-ROM)
19604 +#
19605 +CONFIG_BLK_DEV_SD=m
19606 +# CONFIG_CHR_DEV_ST is not set
19607 +# CONFIG_CHR_DEV_OSST is not set
19608 +CONFIG_BLK_DEV_SR=m
19609 +# CONFIG_BLK_DEV_SR_VENDOR is not set
19610 +CONFIG_CHR_DEV_SG=m
19611 +# CONFIG_CHR_DEV_SCH is not set
19612 +
19613 +#
19614 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
19615 +#
19616 +# CONFIG_SCSI_MULTI_LUN is not set
19617 +# CONFIG_SCSI_CONSTANTS is not set
19618 +# CONFIG_SCSI_LOGGING is not set
19619 +CONFIG_SCSI_SCAN_ASYNC=y
19620 +CONFIG_SCSI_WAIT_SCAN=m
19621 +
19622 +#
19623 +# SCSI Transports
19624 +#
19625 +# CONFIG_SCSI_SPI_ATTRS is not set
19626 +# CONFIG_SCSI_FC_ATTRS is not set
19627 +# CONFIG_SCSI_ISCSI_ATTRS is not set
19628 +# CONFIG_SCSI_SAS_LIBSAS is not set
19629 +# CONFIG_SCSI_SRP_ATTRS is not set
19630 +CONFIG_SCSI_LOWLEVEL=y
19631 +# CONFIG_ISCSI_TCP is not set
19632 +# CONFIG_SCSI_DEBUG is not set
19633 +# CONFIG_ATA is not set
19634 +# CONFIG_MD is not set
19635 +CONFIG_NETDEVICES=y
19636 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
19637 +# CONFIG_DUMMY is not set
19638 +# CONFIG_BONDING is not set
19639 +# CONFIG_MACVLAN is not set
19640 +# CONFIG_EQUALIZER is not set
19641 +CONFIG_TUN=m
19642 +# CONFIG_VETH is not set
19643 +# CONFIG_NET_SB1000 is not set
19644 +# CONFIG_PHYLIB is not set
19645 +CONFIG_NET_ETHERNET=y
19646 +CONFIG_MII=y
19647 +# CONFIG_AX88796 is not set
19648 +# CONFIG_SMC91X is not set
19649 +# CONFIG_DM9000 is not set
19650 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
19651 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
19652 +# CONFIG_IBM_NEW_EMAC_TAH is not set
19653 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
19654 +CONFIG_NET_PCI=y
19655 +# CONFIG_B44 is not set
19656 +CONFIG_CS89x0=m
19657 +# CONFIG_NETDEV_1000 is not set
19658 +# CONFIG_NETDEV_10000 is not set
19659 +
19660 +#
19661 +# Wireless LAN
19662 +#
19663 +# CONFIG_WLAN_PRE80211 is not set
19664 +# CONFIG_WLAN_80211 is not set
19665 +
19666 +#
19667 +# USB Network Adapters
19668 +#
19669 +CONFIG_USB_CATC=m
19670 +CONFIG_USB_KAWETH=m
19671 +CONFIG_USB_PEGASUS=m
19672 +CONFIG_USB_RTL8150=m
19673 +CONFIG_USB_USBNET=y
19674 +CONFIG_USB_NET_AX8817X=m
19675 +CONFIG_USB_NET_CDCETHER=m
19676 +CONFIG_USB_NET_DM9601=m
19677 +CONFIG_USB_NET_GL620A=m
19678 +CONFIG_USB_NET_NET1080=m
19679 +CONFIG_USB_NET_PLUSB=m
19680 +CONFIG_USB_NET_MCS7830=m
19681 +CONFIG_USB_NET_RNDIS_HOST=m
19682 +CONFIG_USB_NET_CDC_SUBSET=m
19683 +CONFIG_USB_ALI_M5632=y
19684 +CONFIG_USB_AN2720=y
19685 +CONFIG_USB_BELKIN=y
19686 +CONFIG_USB_ARMLINUX=y
19687 +CONFIG_USB_EPSON2888=y
19688 +CONFIG_USB_KC2190=y
19689 +CONFIG_USB_NET_ZAURUS=m
19690 +# CONFIG_WAN is not set
19691 +CONFIG_PPP=m
19692 +CONFIG_PPP_MULTILINK=y
19693 +CONFIG_PPP_FILTER=y
19694 +CONFIG_PPP_ASYNC=m
19695 +CONFIG_PPP_SYNC_TTY=m
19696 +CONFIG_PPP_DEFLATE=m
19697 +CONFIG_PPP_BSDCOMP=m
19698 +CONFIG_PPP_MPPE=m
19699 +# CONFIG_PPPOE is not set
19700 +# CONFIG_PPPOL2TP is not set
19701 +# CONFIG_SLIP is not set
19702 +CONFIG_SLHC=m
19703 +# CONFIG_SHAPER is not set
19704 +# CONFIG_NETCONSOLE is not set
19705 +# CONFIG_NETPOLL is not set
19706 +# CONFIG_NET_POLL_CONTROLLER is not set
19707 +# CONFIG_ISDN is not set
19708 +
19709 +#
19710 +# Input device support
19711 +#
19712 +CONFIG_INPUT=y
19713 +# CONFIG_INPUT_FF_MEMLESS is not set
19714 +# CONFIG_INPUT_POLLDEV is not set
19715 +
19716 +#
19717 +# Userland interfaces
19718 +#
19719 +CONFIG_INPUT_MOUSEDEV=y
19720 +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
19721 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
19722 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
19723 +# CONFIG_INPUT_JOYDEV is not set
19724 +CONFIG_INPUT_EVDEV=y
19725 +# CONFIG_INPUT_EVBUG is not set
19726 +
19727 +#
19728 +# Input Device Drivers
19729 +#
19730 +CONFIG_INPUT_KEYBOARD=y
19731 +# CONFIG_KEYBOARD_ATKBD is not set
19732 +# CONFIG_KEYBOARD_SUNKBD is not set
19733 +# CONFIG_KEYBOARD_LKKBD is not set
19734 +# CONFIG_KEYBOARD_XTKBD is not set
19735 +# CONFIG_KEYBOARD_NEWTON is not set
19736 +CONFIG_KEYBOARD_STOWAWAY=m
19737 +CONFIG_KEYBOARD_GPIO=m
19738 +CONFIG_KEYBOARD_NEO1973=y
19739 +CONFIG_KEYBOARD_QT2410=y
19740 +CONFIG_INPUT_MOUSE=y
19741 +# CONFIG_MOUSE_PS2 is not set
19742 +# CONFIG_MOUSE_SERIAL is not set
19743 +# CONFIG_MOUSE_APPLETOUCH is not set
19744 +# CONFIG_MOUSE_VSXXXAA is not set
19745 +# CONFIG_MOUSE_GPIO is not set
19746 +# CONFIG_INPUT_JOYSTICK is not set
19747 +# CONFIG_INPUT_TABLET is not set
19748 +CONFIG_INPUT_TOUCHSCREEN=y
19749 +# CONFIG_TOUCHSCREEN_ADS7846 is not set
19750 +# CONFIG_TOUCHSCREEN_FUJITSU is not set
19751 +CONFIG_TOUCHSCREEN_S3C2410=y
19752 +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set
19753 +# CONFIG_TOUCHSCREEN_GUNZE is not set
19754 +# CONFIG_TOUCHSCREEN_ELO is not set
19755 +# CONFIG_TOUCHSCREEN_MTOUCH is not set
19756 +# CONFIG_TOUCHSCREEN_MK712 is not set
19757 +# CONFIG_TOUCHSCREEN_PENMOUNT is not set
19758 +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
19759 +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
19760 +# CONFIG_TOUCHSCREEN_UCB1400 is not set
19761 +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
19762 +CONFIG_INPUT_MISC=y
19763 +# CONFIG_INPUT_ATI_REMOTE is not set
19764 +# CONFIG_INPUT_ATI_REMOTE2 is not set
19765 +# CONFIG_INPUT_KEYSPAN_REMOTE is not set
19766 +# CONFIG_INPUT_POWERMATE is not set
19767 +# CONFIG_INPUT_YEALINK is not set
19768 +CONFIG_INPUT_UINPUT=m
19769 +CONFIG_INPUT_LIS302DL=y
19770 +
19771 +#
19772 +# Hardware I/O ports
19773 +#
19774 +CONFIG_SERIO=y
19775 +# CONFIG_SERIO_SERPORT is not set
19776 +# CONFIG_SERIO_RAW is not set
19777 +# CONFIG_GAMEPORT is not set
19778 +
19779 +#
19780 +# Character devices
19781 +#
19782 +CONFIG_VT=y
19783 +CONFIG_VT_CONSOLE=y
19784 +CONFIG_NR_TTY_DEVICES=4
19785 +CONFIG_HW_CONSOLE=y
19786 +CONFIG_VT_HW_CONSOLE_BINDING=y
19787 +# CONFIG_SERIAL_NONSTANDARD is not set
19788 +
19789 +#
19790 +# Serial drivers
19791 +#
19792 +# CONFIG_SERIAL_8250 is not set
19793 +
19794 +#
19795 +# Non-8250 serial port support
19796 +#
19797 +CONFIG_SERIAL_S3C2410=y
19798 +CONFIG_SERIAL_S3C2410_CONSOLE=y
19799 +CONFIG_SERIAL_CORE=y
19800 +CONFIG_SERIAL_CORE_CONSOLE=y
19801 +CONFIG_UNIX98_PTYS=y
19802 +# CONFIG_LEGACY_PTYS is not set
19803 +# CONFIG_IPMI_HANDLER is not set
19804 +# CONFIG_HW_RANDOM is not set
19805 +# CONFIG_NVRAM is not set
19806 +# CONFIG_R3964 is not set
19807 +# CONFIG_RAW_DRIVER is not set
19808 +# CONFIG_TCG_TPM is not set
19809 +CONFIG_I2C=y
19810 +CONFIG_I2C_BOARDINFO=y
19811 +CONFIG_I2C_CHARDEV=y
19812 +
19813 +#
19814 +# I2C Algorithms
19815 +#
19816 +# CONFIG_I2C_ALGOBIT is not set
19817 +# CONFIG_I2C_ALGOPCF is not set
19818 +# CONFIG_I2C_ALGOPCA is not set
19819 +
19820 +#
19821 +# I2C Hardware Bus support
19822 +#
19823 +# CONFIG_I2C_GPIO is not set
19824 +# CONFIG_I2C_OCORES is not set
19825 +# CONFIG_I2C_PARPORT_LIGHT is not set
19826 +CONFIG_I2C_S3C2410=y
19827 +# CONFIG_I2C_SIMTEC is not set
19828 +# CONFIG_I2C_TAOS_EVM is not set
19829 +# CONFIG_I2C_STUB is not set
19830 +# CONFIG_I2C_TINY_USB is not set
19831 +
19832 +#
19833 +# Miscellaneous I2C Chip support
19834 +#
19835 +# CONFIG_SENSORS_DS1337 is not set
19836 +# CONFIG_SENSORS_DS1374 is not set
19837 +# CONFIG_DS1682 is not set
19838 +# CONFIG_SENSORS_EEPROM is not set
19839 +CONFIG_SENSORS_PCF50606=y
19840 +CONFIG_SENSORS_PCF50633=y
19841 +# CONFIG_SENSORS_PCF8574 is not set
19842 +# CONFIG_SENSORS_PCA9539 is not set
19843 +# CONFIG_SENSORS_PCF8591 is not set
19844 +# CONFIG_SENSORS_MAX6875 is not set
19845 +# CONFIG_SENSORS_TSL2550 is not set
19846 +CONFIG_SENSORS_TSL256X=m
19847 +# CONFIG_PCA9632 is not set
19848 +# CONFIG_I2C_DEBUG_CORE is not set
19849 +# CONFIG_I2C_DEBUG_ALGO is not set
19850 +# CONFIG_I2C_DEBUG_BUS is not set
19851 +# CONFIG_I2C_DEBUG_CHIP is not set
19852 +
19853 +#
19854 +# SPI support
19855 +#
19856 +CONFIG_SPI=y
19857 +# CONFIG_SPI_DEBUG is not set
19858 +CONFIG_SPI_MASTER=y
19859 +
19860 +#
19861 +# SPI Master Controller Drivers
19862 +#
19863 +CONFIG_SPI_BITBANG=y
19864 +CONFIG_SPI_S3C24XX=y
19865 +CONFIG_SPI_S3C24XX_GPIO=y
19866 +
19867 +#
19868 +# SPI Protocol Masters
19869 +#
19870 +# CONFIG_SPI_AT25 is not set
19871 +# CONFIG_SPI_SPIDEV is not set
19872 +# CONFIG_SPI_TLE62X0 is not set
19873 +# CONFIG_W1 is not set
19874 +CONFIG_POWER_SUPPLY=y
19875 +# CONFIG_POWER_SUPPLY_DEBUG is not set
19876 +# CONFIG_PDA_POWER is not set
19877 +CONFIG_APM_POWER=y
19878 +# CONFIG_BATTERY_DS2760 is not set
19879 +# CONFIG_BATTERY_GTA01 is not set
19880 +CONFIG_BATTERY_BQ27000_HDQ=y
19881 +CONFIG_GTA02_HDQ=y
19882 +# CONFIG_HWMON is not set
19883 +CONFIG_WATCHDOG=y
19884 +# CONFIG_WATCHDOG_NOWAYOUT is not set
19885 +
19886 +#
19887 +# Watchdog Device Drivers
19888 +#
19889 +# CONFIG_SOFT_WATCHDOG is not set
19890 +CONFIG_S3C2410_WATCHDOG=m
19891 +
19892 +#
19893 +# USB-based Watchdog Cards
19894 +#
19895 +# CONFIG_USBPCWATCHDOG is not set
19896 +
19897 +#
19898 +# Sonics Silicon Backplane
19899 +#
19900 +CONFIG_SSB_POSSIBLE=y
19901 +# CONFIG_SSB is not set
19902 +
19903 +#
19904 +# Multifunction device drivers
19905 +#
19906 +# CONFIG_MFD_SM501 is not set
19907 +CONFIG_MFD_GLAMO=y
19908 +CONFIG_MFD_GLAMO_FB=y
19909 +CONFIG_MFD_GLAMO_SPI_GPIO=y
19910 +CONFIG_MFD_GLAMO_SPI_FB=y
19911 +CONFIG_MFD_GLAMO_MCI=y
19912 +
19913 +#
19914 +# Multimedia devices
19915 +#
19916 +# CONFIG_VIDEO_DEV is not set
19917 +# CONFIG_DVB_CORE is not set
19918 +CONFIG_DAB=y
19919 +# CONFIG_USB_DABUSB is not set
19920 +
19921 +#
19922 +# Graphics support
19923 +#
19924 +# CONFIG_VGASTATE is not set
19925 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
19926 +CONFIG_FB=y
19927 +# CONFIG_FIRMWARE_EDID is not set
19928 +# CONFIG_FB_DDC is not set
19929 +CONFIG_FB_CFB_FILLRECT=y
19930 +CONFIG_FB_CFB_COPYAREA=y
19931 +CONFIG_FB_CFB_IMAGEBLIT=y
19932 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
19933 +# CONFIG_FB_SYS_FILLRECT is not set
19934 +# CONFIG_FB_SYS_COPYAREA is not set
19935 +# CONFIG_FB_SYS_IMAGEBLIT is not set
19936 +# CONFIG_FB_SYS_FOPS is not set
19937 +CONFIG_FB_DEFERRED_IO=y
19938 +# CONFIG_FB_SVGALIB is not set
19939 +# CONFIG_FB_MACMODES is not set
19940 +# CONFIG_FB_BACKLIGHT is not set
19941 +# CONFIG_FB_MODE_HELPERS is not set
19942 +# CONFIG_FB_TILEBLITTING is not set
19943 +
19944 +#
19945 +# Frame buffer hardware drivers
19946 +#
19947 +# CONFIG_FB_UVESA is not set
19948 +# CONFIG_FB_S1D13XXX is not set
19949 +CONFIG_FB_S3C2410=y
19950 +# CONFIG_FB_S3C2410_DEBUG is not set
19951 +# CONFIG_FB_VIRTUAL is not set
19952 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
19953 +CONFIG_LCD_CLASS_DEVICE=y
19954 +# CONFIG_LCD_LTV350QV is not set
19955 +CONFIG_BACKLIGHT_CLASS_DEVICE=y
19956 +# CONFIG_BACKLIGHT_CORGI is not set
19957 +CONFIG_BACKLIGHT_GTA01=y
19958 +
19959 +#
19960 +# Display device support
19961 +#
19962 +# CONFIG_DISPLAY_SUPPORT is not set
19963 +CONFIG_DISPLAY_JBT6K74=y
19964 +
19965 +#
19966 +# Console display driver support
19967 +#
19968 +# CONFIG_VGA_CONSOLE is not set
19969 +CONFIG_DUMMY_CONSOLE=y
19970 +CONFIG_FRAMEBUFFER_CONSOLE=y
19971 +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
19972 +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
19973 +CONFIG_FONTS=y
19974 +# CONFIG_FONT_8x8 is not set
19975 +# CONFIG_FONT_8x16 is not set
19976 +CONFIG_FONT_6x11=y
19977 +# CONFIG_FONT_7x14 is not set
19978 +# CONFIG_FONT_PEARL_8x8 is not set
19979 +# CONFIG_FONT_ACORN_8x8 is not set
19980 +# CONFIG_FONT_MINI_4x6 is not set
19981 +# CONFIG_FONT_SUN8x16 is not set
19982 +# CONFIG_FONT_SUN12x22 is not set
19983 +# CONFIG_FONT_10x18 is not set
19984 +# CONFIG_LOGO is not set
19985 +
19986 +#
19987 +# Sound
19988 +#
19989 +CONFIG_SOUND=y
19990 +
19991 +#
19992 +# Advanced Linux Sound Architecture
19993 +#
19994 +CONFIG_SND=m
19995 +CONFIG_SND_TIMER=m
19996 +CONFIG_SND_PCM=m
19997 +CONFIG_SND_RAWMIDI=m
19998 +# CONFIG_SND_SEQUENCER is not set
19999 +CONFIG_SND_OSSEMUL=y
20000 +CONFIG_SND_MIXER_OSS=m
20001 +CONFIG_SND_PCM_OSS=m
20002 +CONFIG_SND_PCM_OSS_PLUGINS=y
20003 +# CONFIG_SND_DYNAMIC_MINORS is not set
20004 +CONFIG_SND_SUPPORT_OLD_API=y
20005 +CONFIG_SND_VERBOSE_PROCFS=y
20006 +# CONFIG_SND_VERBOSE_PRINTK is not set
20007 +# CONFIG_SND_DEBUG is not set
20008 +
20009 +#
20010 +# Generic devices
20011 +#
20012 +# CONFIG_SND_DUMMY is not set
20013 +# CONFIG_SND_MTPAV is not set
20014 +# CONFIG_SND_SERIAL_U16550 is not set
20015 +# CONFIG_SND_MPU401 is not set
20016 +
20017 +#
20018 +# ALSA ARM devices
20019 +#
20020 +
20021 +#
20022 +# SPI devices
20023 +#
20024 +
20025 +#
20026 +# USB devices
20027 +#
20028 +# CONFIG_SND_USB_AUDIO is not set
20029 +# CONFIG_SND_USB_CAIAQ is not set
20030 +
20031 +#
20032 +# System on Chip audio support
20033 +#
20034 +CONFIG_SND_SOC=m
20035 +CONFIG_SND_S3C24XX_SOC=m
20036 +CONFIG_SND_S3C24XX_SOC_I2S=m
20037 +CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753=m
20038 +# CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG is not set
20039 +CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=m
20040 +
20041 +#
20042 +# SoC Audio support for SuperH
20043 +#
20044 +CONFIG_SND_SOC_WM8753=m
20045 +
20046 +#
20047 +# Open Sound System
20048 +#
20049 +# CONFIG_SOUND_PRIME is not set
20050 +CONFIG_HID_SUPPORT=y
20051 +CONFIG_HID=y
20052 +# CONFIG_HID_DEBUG is not set
20053 +# CONFIG_HIDRAW is not set
20054 +
20055 +#
20056 +# USB Input Devices
20057 +#
20058 +CONFIG_USB_HID=y
20059 +# CONFIG_USB_HIDINPUT_POWERBOOK is not set
20060 +# CONFIG_HID_FF is not set
20061 +CONFIG_USB_HIDDEV=y
20062 +CONFIG_USB_SUPPORT=y
20063 +CONFIG_USB_ARCH_HAS_HCD=y
20064 +CONFIG_USB_ARCH_HAS_OHCI=y
20065 +# CONFIG_USB_ARCH_HAS_EHCI is not set
20066 +CONFIG_USB=y
20067 +# CONFIG_USB_DEBUG is not set
20068 +
20069 +#
20070 +# Miscellaneous USB options
20071 +#
20072 +CONFIG_USB_DEVICEFS=y
20073 +CONFIG_USB_DEVICE_CLASS=y
20074 +# CONFIG_USB_DYNAMIC_MINORS is not set
20075 +CONFIG_USB_SUSPEND=y
20076 +# CONFIG_USB_PERSIST is not set
20077 +# CONFIG_USB_OTG is not set
20078 +
20079 +#
20080 +# USB Host Controller Drivers
20081 +#
20082 +# CONFIG_USB_ISP116X_HCD is not set
20083 +CONFIG_USB_OHCI_HCD=m
20084 +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
20085 +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
20086 +CONFIG_USB_OHCI_LITTLE_ENDIAN=y
20087 +# CONFIG_USB_SL811_HCD is not set
20088 +# CONFIG_USB_R8A66597_HCD is not set
20089 +
20090 +#
20091 +# USB Device Class drivers
20092 +#
20093 +CONFIG_USB_ACM=m
20094 +CONFIG_USB_PRINTER=m
20095 +
20096 +#
20097 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
20098 +#
20099 +
20100 +#
20101 +# may also be needed; see USB_STORAGE Help for more information
20102 +#
20103 +CONFIG_USB_STORAGE=m
20104 +# CONFIG_USB_STORAGE_DEBUG is not set
20105 +CONFIG_USB_STORAGE_DATAFAB=y
20106 +CONFIG_USB_STORAGE_FREECOM=y
20107 +# CONFIG_USB_STORAGE_ISD200 is not set
20108 +CONFIG_USB_STORAGE_DPCM=y
20109 +CONFIG_USB_STORAGE_USBAT=y
20110 +CONFIG_USB_STORAGE_SDDR09=y
20111 +CONFIG_USB_STORAGE_SDDR55=y
20112 +CONFIG_USB_STORAGE_JUMPSHOT=y
20113 +CONFIG_USB_STORAGE_ALAUDA=y
20114 +CONFIG_USB_STORAGE_KARMA=y
20115 +CONFIG_USB_LIBUSUAL=y
20116 +
20117 +#
20118 +# USB Imaging devices
20119 +#
20120 +# CONFIG_USB_MDC800 is not set
20121 +# CONFIG_USB_MICROTEK is not set
20122 +CONFIG_USB_MON=y
20123 +
20124 +#
20125 +# USB port drivers
20126 +#
20127 +
20128 +#
20129 +# USB Serial Converter support
20130 +#
20131 +CONFIG_USB_SERIAL=m
20132 +CONFIG_USB_SERIAL_GENERIC=y
20133 +CONFIG_USB_SERIAL_AIRCABLE=m
20134 +CONFIG_USB_SERIAL_AIRPRIME=m
20135 +CONFIG_USB_SERIAL_ARK3116=m
20136 +CONFIG_USB_SERIAL_BELKIN=m
20137 +# CONFIG_USB_SERIAL_CH341 is not set
20138 +CONFIG_USB_SERIAL_WHITEHEAT=m
20139 +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
20140 +CONFIG_USB_SERIAL_CP2101=m
20141 +CONFIG_USB_SERIAL_CYPRESS_M8=m
20142 +CONFIG_USB_SERIAL_EMPEG=m
20143 +CONFIG_USB_SERIAL_FTDI_SIO=m
20144 +CONFIG_USB_SERIAL_FUNSOFT=m
20145 +CONFIG_USB_SERIAL_VISOR=m
20146 +CONFIG_USB_SERIAL_IPAQ=m
20147 +CONFIG_USB_SERIAL_IR=m
20148 +CONFIG_USB_SERIAL_EDGEPORT=m
20149 +CONFIG_USB_SERIAL_EDGEPORT_TI=m
20150 +CONFIG_USB_SERIAL_GARMIN=m
20151 +CONFIG_USB_SERIAL_IPW=m
20152 +CONFIG_USB_SERIAL_KEYSPAN_PDA=m
20153 +CONFIG_USB_SERIAL_KEYSPAN=m
20154 +CONFIG_USB_SERIAL_KEYSPAN_MPR=y
20155 +CONFIG_USB_SERIAL_KEYSPAN_USA28=y
20156 +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
20157 +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
20158 +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
20159 +CONFIG_USB_SERIAL_KEYSPAN_USA19=y
20160 +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
20161 +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
20162 +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
20163 +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
20164 +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
20165 +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
20166 +CONFIG_USB_SERIAL_KLSI=m
20167 +CONFIG_USB_SERIAL_KOBIL_SCT=m
20168 +CONFIG_USB_SERIAL_MCT_U232=m
20169 +CONFIG_USB_SERIAL_MOS7720=m
20170 +CONFIG_USB_SERIAL_MOS7840=m
20171 +CONFIG_USB_SERIAL_NAVMAN=m
20172 +CONFIG_USB_SERIAL_PL2303=m
20173 +# CONFIG_USB_SERIAL_OTI6858 is not set
20174 +CONFIG_USB_SERIAL_HP4X=m
20175 +CONFIG_USB_SERIAL_SAFE=m
20176 +CONFIG_USB_SERIAL_SAFE_PADDED=y
20177 +CONFIG_USB_SERIAL_SIERRAWIRELESS=m
20178 +CONFIG_USB_SERIAL_TI=m
20179 +CONFIG_USB_SERIAL_CYBERJACK=m
20180 +CONFIG_USB_SERIAL_XIRCOM=m
20181 +CONFIG_USB_SERIAL_OPTION=m
20182 +CONFIG_USB_SERIAL_OMNINET=m
20183 +# CONFIG_USB_SERIAL_DEBUG is not set
20184 +CONFIG_USB_EZUSB=y
20185 +
20186 +#
20187 +# USB Miscellaneous drivers
20188 +#
20189 +# CONFIG_USB_EMI62 is not set
20190 +# CONFIG_USB_EMI26 is not set
20191 +# CONFIG_USB_ADUTUX is not set
20192 +# CONFIG_USB_AUERSWALD is not set
20193 +# CONFIG_USB_RIO500 is not set
20194 +# CONFIG_USB_LEGOTOWER is not set
20195 +# CONFIG_USB_LCD is not set
20196 +CONFIG_USB_BERRY_CHARGE=m
20197 +# CONFIG_USB_LED is not set
20198 +# CONFIG_USB_CYPRESS_CY7C63 is not set
20199 +# CONFIG_USB_CYTHERM is not set
20200 +# CONFIG_USB_PHIDGET is not set
20201 +# CONFIG_USB_IDMOUSE is not set
20202 +# CONFIG_USB_FTDI_ELAN is not set
20203 +# CONFIG_USB_APPLEDISPLAY is not set
20204 +# CONFIG_USB_LD is not set
20205 +CONFIG_USB_TRANCEVIBRATOR=m
20206 +CONFIG_USB_IOWARRIOR=m
20207 +# CONFIG_USB_TEST is not set
20208 +
20209 +#
20210 +# USB DSL modem support
20211 +#
20212 +
20213 +#
20214 +# USB Gadget Support
20215 +#
20216 +CONFIG_USB_GADGET=y
20217 +# CONFIG_USB_GADGET_DEBUG is not set
20218 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
20219 +CONFIG_USB_GADGET_SELECTED=y
20220 +# CONFIG_USB_GADGET_AMD5536UDC is not set
20221 +# CONFIG_USB_GADGET_ATMEL_USBA is not set
20222 +# CONFIG_USB_GADGET_FSL_USB2 is not set
20223 +# CONFIG_USB_GADGET_NET2280 is not set
20224 +# CONFIG_USB_GADGET_PXA2XX is not set
20225 +# CONFIG_USB_GADGET_M66592 is not set
20226 +# CONFIG_USB_GADGET_GOKU is not set
20227 +# CONFIG_USB_GADGET_LH7A40X is not set
20228 +# CONFIG_USB_GADGET_OMAP is not set
20229 +CONFIG_USB_GADGET_S3C2410=y
20230 +CONFIG_USB_S3C2410=y
20231 +# CONFIG_USB_S3C2410_DEBUG is not set
20232 +# CONFIG_USB_GADGET_AT91 is not set
20233 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
20234 +# CONFIG_USB_GADGET_DUALSPEED is not set
20235 +# CONFIG_USB_ZERO is not set
20236 +CONFIG_USB_ETH=m
20237 +CONFIG_USB_ETH_RNDIS=y
20238 +CONFIG_USB_GADGETFS=m
20239 +CONFIG_USB_FILE_STORAGE=m
20240 +# CONFIG_USB_FILE_STORAGE_TEST is not set
20241 +CONFIG_USB_G_SERIAL=m
20242 +CONFIG_USB_MIDI_GADGET=m
20243 +
20244 +#
20245 +# SDIO support
20246 +#
20247 +CONFIG_SDIO=y
20248 +CONFIG_SDIO_S3C24XX=y
20249 +CONFIG_SDIO_S3C24XX_DMA=y
20250 +CONFIG_SDIO_AR6000_WLAN=y
20251 +CONFIG_MMC=y
20252 +# CONFIG_MMC_DEBUG is not set
20253 +CONFIG_MMC_UNSAFE_RESUME=y
20254 +
20255 +#
20256 +# MMC/SD Card Drivers
20257 +#
20258 +CONFIG_MMC_BLOCK=y
20259 +CONFIG_MMC_BLOCK_BOUNCE=y
20260 +# CONFIG_SDIO_UART is not set
20261 +
20262 +#
20263 +# MMC/SD Host Controller Drivers
20264 +#
20265 +# CONFIG_MMC_SPI is not set
20266 +CONFIG_MMC_S3C=y
20267 +CONFIG_NEW_LEDS=y
20268 +CONFIG_LEDS_CLASS=y
20269 +
20270 +#
20271 +# LED drivers
20272 +#
20273 +CONFIG_LEDS_S3C24XX=m
20274 +# CONFIG_LEDS_GPIO is not set
20275 +CONFIG_LEDS_NEO1973_VIBRATOR=y
20276 +CONFIG_LEDS_NEO1973_GTA02=y
20277 +
20278 +#
20279 +# LED Triggers
20280 +#
20281 +CONFIG_LEDS_TRIGGERS=y
20282 +CONFIG_LEDS_TRIGGER_TIMER=y
20283 +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
20284 +CONFIG_RTC_LIB=y
20285 +CONFIG_RTC_CLASS=y
20286 +CONFIG_RTC_HCTOSYS=y
20287 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
20288 +CONFIG_RTC_DEBUG=y
20289 +
20290 +#
20291 +# RTC interfaces
20292 +#
20293 +CONFIG_RTC_INTF_SYSFS=y
20294 +CONFIG_RTC_INTF_PROC=y
20295 +CONFIG_RTC_INTF_DEV=y
20296 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
20297 +# CONFIG_RTC_DRV_TEST is not set
20298 +
20299 +#
20300 +# I2C RTC drivers
20301 +#
20302 +# CONFIG_RTC_DRV_DS1307 is not set
20303 +# CONFIG_RTC_DRV_DS1374 is not set
20304 +# CONFIG_RTC_DRV_DS1672 is not set
20305 +# CONFIG_RTC_DRV_MAX6900 is not set
20306 +# CONFIG_RTC_DRV_RS5C372 is not set
20307 +# CONFIG_RTC_DRV_ISL1208 is not set
20308 +# CONFIG_RTC_DRV_X1205 is not set
20309 +# CONFIG_RTC_DRV_PCF8563 is not set
20310 +# CONFIG_RTC_DRV_PCF8583 is not set
20311 +# CONFIG_RTC_DRV_M41T80 is not set
20312 +
20313 +#
20314 +# SPI RTC drivers
20315 +#
20316 +# CONFIG_RTC_DRV_RS5C348 is not set
20317 +# CONFIG_RTC_DRV_MAX6902 is not set
20318 +
20319 +#
20320 +# Platform RTC drivers
20321 +#
20322 +# CONFIG_RTC_DRV_CMOS is not set
20323 +# CONFIG_RTC_DRV_DS1553 is not set
20324 +# CONFIG_RTC_DRV_STK17TA8 is not set
20325 +# CONFIG_RTC_DRV_DS1742 is not set
20326 +# CONFIG_RTC_DRV_M48T86 is not set
20327 +# CONFIG_RTC_DRV_M48T59 is not set
20328 +# CONFIG_RTC_DRV_V3020 is not set
20329 +
20330 +#
20331 +# on-CPU RTC drivers
20332 +#
20333 +CONFIG_RTC_DRV_S3C=m
20334 +
20335 +#
20336 +# File systems
20337 +#
20338 +CONFIG_EXT2_FS=y
20339 +# CONFIG_EXT2_FS_XATTR is not set
20340 +# CONFIG_EXT2_FS_XIP is not set
20341 +CONFIG_EXT3_FS=y
20342 +# CONFIG_EXT3_FS_XATTR is not set
20343 +# CONFIG_EXT4DEV_FS is not set
20344 +CONFIG_JBD=y
20345 +# CONFIG_REISERFS_FS is not set
20346 +# CONFIG_JFS_FS is not set
20347 +CONFIG_FS_POSIX_ACL=y
20348 +# CONFIG_XFS_FS is not set
20349 +# CONFIG_GFS2_FS is not set
20350 +# CONFIG_OCFS2_FS is not set
20351 +# CONFIG_MINIX_FS is not set
20352 +CONFIG_ROMFS_FS=y
20353 +CONFIG_INOTIFY=y
20354 +CONFIG_INOTIFY_USER=y
20355 +# CONFIG_QUOTA is not set
20356 +CONFIG_DNOTIFY=y
20357 +# CONFIG_AUTOFS_FS is not set
20358 +CONFIG_AUTOFS4_FS=m
20359 +CONFIG_FUSE_FS=m
20360 +
20361 +#
20362 +# CD-ROM/DVD Filesystems
20363 +#
20364 +CONFIG_ISO9660_FS=m
20365 +CONFIG_JOLIET=y
20366 +# CONFIG_ZISOFS is not set
20367 +CONFIG_UDF_FS=m
20368 +CONFIG_UDF_NLS=y
20369 +
20370 +#
20371 +# DOS/FAT/NT Filesystems
20372 +#
20373 +CONFIG_FAT_FS=y
20374 +CONFIG_MSDOS_FS=y
20375 +CONFIG_VFAT_FS=y
20376 +CONFIG_FAT_DEFAULT_CODEPAGE=437
20377 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
20378 +# CONFIG_NTFS_FS is not set
20379 +
20380 +#
20381 +# Pseudo filesystems
20382 +#
20383 +CONFIG_PROC_FS=y
20384 +CONFIG_PROC_SYSCTL=y
20385 +CONFIG_SYSFS=y
20386 +CONFIG_TMPFS=y
20387 +# CONFIG_TMPFS_POSIX_ACL is not set
20388 +# CONFIG_HUGETLB_PAGE is not set
20389 +CONFIG_CONFIGFS_FS=m
20390 +
20391 +#
20392 +# Miscellaneous filesystems
20393 +#
20394 +# CONFIG_ADFS_FS is not set
20395 +# CONFIG_AFFS_FS is not set
20396 +# CONFIG_HFS_FS is not set
20397 +# CONFIG_HFSPLUS_FS is not set
20398 +# CONFIG_BEFS_FS is not set
20399 +# CONFIG_BFS_FS is not set
20400 +# CONFIG_EFS_FS is not set
20401 +CONFIG_JFFS2_FS=y
20402 +CONFIG_JFFS2_FS_DEBUG=0
20403 +CONFIG_JFFS2_FS_WRITEBUFFER=y
20404 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
20405 +CONFIG_JFFS2_SUMMARY=y
20406 +# CONFIG_JFFS2_FS_XATTR is not set
20407 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
20408 +CONFIG_JFFS2_ZLIB=y
20409 +# CONFIG_JFFS2_LZO is not set
20410 +CONFIG_JFFS2_RTIME=y
20411 +# CONFIG_JFFS2_RUBIN is not set
20412 +CONFIG_CRAMFS=y
20413 +# CONFIG_VXFS_FS is not set
20414 +# CONFIG_HPFS_FS is not set
20415 +# CONFIG_QNX4FS_FS is not set
20416 +# CONFIG_SYSV_FS is not set
20417 +# CONFIG_UFS_FS is not set
20418 +CONFIG_NETWORK_FILESYSTEMS=y
20419 +CONFIG_NFS_FS=y
20420 +CONFIG_NFS_V3=y
20421 +# CONFIG_NFS_V3_ACL is not set
20422 +CONFIG_NFS_V4=y
20423 +# CONFIG_NFS_DIRECTIO is not set
20424 +CONFIG_NFSD=m
20425 +CONFIG_NFSD_V3=y
20426 +# CONFIG_NFSD_V3_ACL is not set
20427 +CONFIG_NFSD_V4=y
20428 +CONFIG_NFSD_TCP=y
20429 +CONFIG_ROOT_NFS=y
20430 +CONFIG_LOCKD=y
20431 +CONFIG_LOCKD_V4=y
20432 +CONFIG_EXPORTFS=m
20433 +CONFIG_NFS_COMMON=y
20434 +CONFIG_SUNRPC=y
20435 +CONFIG_SUNRPC_GSS=y
20436 +# CONFIG_SUNRPC_BIND34 is not set
20437 +CONFIG_RPCSEC_GSS_KRB5=y
20438 +# CONFIG_RPCSEC_GSS_SPKM3 is not set
20439 +# CONFIG_SMB_FS is not set
20440 +CONFIG_CIFS=m
20441 +# CONFIG_CIFS_STATS is not set
20442 +CONFIG_CIFS_WEAK_PW_HASH=y
20443 +# CONFIG_CIFS_XATTR is not set
20444 +# CONFIG_CIFS_DEBUG2 is not set
20445 +# CONFIG_CIFS_EXPERIMENTAL is not set
20446 +# CONFIG_NCP_FS is not set
20447 +# CONFIG_CODA_FS is not set
20448 +# CONFIG_AFS_FS is not set
20449 +
20450 +#
20451 +# Partition Types
20452 +#
20453 +# CONFIG_PARTITION_ADVANCED is not set
20454 +CONFIG_MSDOS_PARTITION=y
20455 +CONFIG_NLS=y
20456 +CONFIG_NLS_DEFAULT="iso8859-1"
20457 +CONFIG_NLS_CODEPAGE_437=y
20458 +# CONFIG_NLS_CODEPAGE_737 is not set
20459 +# CONFIG_NLS_CODEPAGE_775 is not set
20460 +CONFIG_NLS_CODEPAGE_850=m
20461 +# CONFIG_NLS_CODEPAGE_852 is not set
20462 +# CONFIG_NLS_CODEPAGE_855 is not set
20463 +# CONFIG_NLS_CODEPAGE_857 is not set
20464 +# CONFIG_NLS_CODEPAGE_860 is not set
20465 +# CONFIG_NLS_CODEPAGE_861 is not set
20466 +# CONFIG_NLS_CODEPAGE_862 is not set
20467 +# CONFIG_NLS_CODEPAGE_863 is not set
20468 +# CONFIG_NLS_CODEPAGE_864 is not set
20469 +# CONFIG_NLS_CODEPAGE_865 is not set
20470 +# CONFIG_NLS_CODEPAGE_866 is not set
20471 +# CONFIG_NLS_CODEPAGE_869 is not set
20472 +CONFIG_NLS_CODEPAGE_936=m
20473 +CONFIG_NLS_CODEPAGE_950=m
20474 +# CONFIG_NLS_CODEPAGE_932 is not set
20475 +# CONFIG_NLS_CODEPAGE_949 is not set
20476 +# CONFIG_NLS_CODEPAGE_874 is not set
20477 +# CONFIG_NLS_ISO8859_8 is not set
20478 +# CONFIG_NLS_CODEPAGE_1250 is not set
20479 +# CONFIG_NLS_CODEPAGE_1251 is not set
20480 +# CONFIG_NLS_ASCII is not set
20481 +CONFIG_NLS_ISO8859_1=y
20482 +# CONFIG_NLS_ISO8859_2 is not set
20483 +# CONFIG_NLS_ISO8859_3 is not set
20484 +# CONFIG_NLS_ISO8859_4 is not set
20485 +# CONFIG_NLS_ISO8859_5 is not set
20486 +# CONFIG_NLS_ISO8859_6 is not set
20487 +# CONFIG_NLS_ISO8859_7 is not set
20488 +# CONFIG_NLS_ISO8859_9 is not set
20489 +# CONFIG_NLS_ISO8859_13 is not set
20490 +# CONFIG_NLS_ISO8859_14 is not set
20491 +# CONFIG_NLS_ISO8859_15 is not set
20492 +# CONFIG_NLS_KOI8_R is not set
20493 +# CONFIG_NLS_KOI8_U is not set
20494 +CONFIG_NLS_UTF8=m
20495 +# CONFIG_DLM is not set
20496 +CONFIG_INSTRUMENTATION=y
20497 +CONFIG_PROFILING=y
20498 +CONFIG_OPROFILE=m
20499 +# CONFIG_MARKERS is not set
20500 +
20501 +#
20502 +# Kernel hacking
20503 +#
20504 +# CONFIG_PRINTK_TIME is not set
20505 +CONFIG_ENABLE_WARN_DEPRECATED=y
20506 +CONFIG_ENABLE_MUST_CHECK=y
20507 +CONFIG_MAGIC_SYSRQ=y
20508 +# CONFIG_UNUSED_SYMBOLS is not set
20509 +# CONFIG_DEBUG_FS is not set
20510 +# CONFIG_HEADERS_CHECK is not set
20511 +CONFIG_DEBUG_KERNEL=y
20512 +# CONFIG_DEBUG_SHIRQ is not set
20513 +CONFIG_DETECT_SOFTLOCKUP=y
20514 +# CONFIG_SCHED_DEBUG is not set
20515 +# CONFIG_SCHEDSTATS is not set
20516 +CONFIG_TIMER_STATS=y
20517 +# CONFIG_DEBUG_SLAB is not set
20518 +CONFIG_DEBUG_PREEMPT=y
20519 +# CONFIG_DEBUG_RT_MUTEXES is not set
20520 +# CONFIG_RT_MUTEX_TESTER is not set
20521 +# CONFIG_DEBUG_SPINLOCK is not set
20522 +# CONFIG_DEBUG_MUTEXES is not set
20523 +# CONFIG_DEBUG_LOCK_ALLOC is not set
20524 +# CONFIG_PROVE_LOCKING is not set
20525 +# CONFIG_LOCK_STAT is not set
20526 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
20527 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
20528 +# CONFIG_DEBUG_KOBJECT is not set
20529 +CONFIG_DEBUG_BUGVERBOSE=y
20530 +CONFIG_DEBUG_INFO=y
20531 +# CONFIG_DEBUG_VM is not set
20532 +# CONFIG_DEBUG_LIST is not set
20533 +# CONFIG_DEBUG_SG is not set
20534 +CONFIG_FRAME_POINTER=y
20535 +CONFIG_FORCED_INLINING=y
20536 +# CONFIG_BOOT_PRINTK_DELAY is not set
20537 +# CONFIG_RCU_TORTURE_TEST is not set
20538 +# CONFIG_FAULT_INJECTION is not set
20539 +# CONFIG_SAMPLES is not set
20540 +# CONFIG_DEBUG_USER is not set
20541 +CONFIG_DEBUG_ERRORS=y
20542 +# CONFIG_DEBUG_LL is not set
20543 +CONFIG_DEBUG_S3C_UART=2
20544 +
20545 +#
20546 +# Security options
20547 +#
20548 +# CONFIG_KEYS is not set
20549 +# CONFIG_SECURITY is not set
20550 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
20551 +CONFIG_CRYPTO=y
20552 +CONFIG_CRYPTO_ALGAPI=y
20553 +CONFIG_CRYPTO_BLKCIPHER=y
20554 +CONFIG_CRYPTO_HASH=y
20555 +CONFIG_CRYPTO_MANAGER=y
20556 +CONFIG_CRYPTO_HMAC=y
20557 +CONFIG_CRYPTO_XCBC=m
20558 +CONFIG_CRYPTO_NULL=m
20559 +CONFIG_CRYPTO_MD4=m
20560 +CONFIG_CRYPTO_MD5=y
20561 +CONFIG_CRYPTO_SHA1=m
20562 +CONFIG_CRYPTO_SHA256=m
20563 +CONFIG_CRYPTO_SHA512=m
20564 +CONFIG_CRYPTO_WP512=m
20565 +CONFIG_CRYPTO_TGR192=m
20566 +CONFIG_CRYPTO_GF128MUL=m
20567 +CONFIG_CRYPTO_ECB=m
20568 +CONFIG_CRYPTO_CBC=y
20569 +CONFIG_CRYPTO_PCBC=m
20570 +CONFIG_CRYPTO_LRW=m
20571 +# CONFIG_CRYPTO_XTS is not set
20572 +# CONFIG_CRYPTO_CRYPTD is not set
20573 +CONFIG_CRYPTO_DES=y
20574 +CONFIG_CRYPTO_FCRYPT=m
20575 +CONFIG_CRYPTO_BLOWFISH=m
20576 +CONFIG_CRYPTO_TWOFISH=m
20577 +CONFIG_CRYPTO_TWOFISH_COMMON=m
20578 +CONFIG_CRYPTO_SERPENT=m
20579 +CONFIG_CRYPTO_AES=m
20580 +CONFIG_CRYPTO_CAST5=m
20581 +CONFIG_CRYPTO_CAST6=m
20582 +CONFIG_CRYPTO_TEA=m
20583 +CONFIG_CRYPTO_ARC4=m
20584 +CONFIG_CRYPTO_KHAZAD=m
20585 +CONFIG_CRYPTO_ANUBIS=m
20586 +# CONFIG_CRYPTO_SEED is not set
20587 +CONFIG_CRYPTO_DEFLATE=m
20588 +CONFIG_CRYPTO_MICHAEL_MIC=m
20589 +CONFIG_CRYPTO_CRC32C=m
20590 +CONFIG_CRYPTO_CAMELLIA=m
20591 +CONFIG_CRYPTO_TEST=m
20592 +# CONFIG_CRYPTO_AUTHENC is not set
20593 +CONFIG_CRYPTO_HW=y
20594 +
20595 +#
20596 +# Library routines
20597 +#
20598 +CONFIG_BITREVERSE=y
20599 +CONFIG_CRC_CCITT=m
20600 +CONFIG_CRC16=m
20601 +# CONFIG_CRC_ITU_T is not set
20602 +CONFIG_CRC32=y
20603 +# CONFIG_CRC7 is not set
20604 +CONFIG_LIBCRC32C=m
20605 +CONFIG_ZLIB_INFLATE=y
20606 +CONFIG_ZLIB_DEFLATE=y
20607 +CONFIG_TEXTSEARCH=y
20608 +CONFIG_TEXTSEARCH_KMP=m
20609 +CONFIG_TEXTSEARCH_BM=m
20610 +CONFIG_TEXTSEARCH_FSM=m
20611 +CONFIG_PLIST=y
20612 +CONFIG_HAS_IOMEM=y
20613 +CONFIG_HAS_DMA=y
20614 Index: linux-2.6.24.7/dfu-kern
20615 ===================================================================
20616 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
20617 +++ linux-2.6.24.7/dfu-kern     2008-12-11 22:46:49.000000000 +0100
20618 @@ -0,0 +1,9 @@
20619 +#!/bin/bash
20620 +../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5119 -D uImage.bin
20621 +if [ $? -eq 1 ] ; then
20622 +../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5120 -D uImage.bin
20623 +../../dfu-util/src/dfu-util -a 3 -d 0x1d50:0x5119 -D uImage.bin
20624 +
20625 +fi
20626 +
20627 +
20628 Index: linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/NAND.txt
20629 ===================================================================
20630 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
20631 +++ linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/NAND.txt   2008-12-11 22:46:49.000000000 +0100
20632 @@ -0,0 +1,30 @@
20633 +                       S3C24XX NAND Support
20634 +                       ====================
20635 +
20636 +Introduction
20637 +------------
20638 +
20639 +Small Page NAND
20640 +---------------
20641 +
20642 +The driver uses a 512 byte (1 page) ECC code for this setup. The
20643 +ECC code is not directly compatible with the default kernel ECC
20644 +code, so the driver enforces its own OOB layout and ECC parameters
20645 +
20646 +Large Page NAND
20647 +---------------
20648 +
20649 +The driver is capable of handling NAND flash with a 2KiB page
20650 +size, with support for hardware ECC generation and correction.
20651 +
20652 +Unlike the 512byte page mode, the driver generates ECC data for
20653 +each 256 byte block in an 2KiB page. This means that more than
20654 +one error in a page can be rectified. It also means that the
20655 +OOB layout remains the default kernel layout for these flashes.
20656 +
20657 +
20658 +Document Author
20659 +---------------
20660 +
20661 +Ben Dooks, Copyright 2007 Simtec Electronics
20662 +
20663 Index: linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/Overview.txt
20664 ===================================================================
20665 --- linux-2.6.24.7.orig/Documentation/arm/Samsung-S3C24XX/Overview.txt  2008-12-11 22:46:07.000000000 +0100
20666 +++ linux-2.6.24.7/Documentation/arm/Samsung-S3C24XX/Overview.txt       2008-12-11 22:46:49.000000000 +0100
20667 @@ -156,6 +156,8 @@ NAND
20668    controller. If there are any problems the latest linux-mtd
20669    code can be found from http://www.linux-mtd.infradead.org/
20670
20671 +  For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
20672 +
20673
20674  Serial
20675  ------
20676 Index: linux-2.6.24.7/drivers/base/core.c
20677 ===================================================================
20678 --- linux-2.6.24.7.orig/drivers/base/core.c     2008-12-11 22:46:07.000000000 +0100
20679 +++ linux-2.6.24.7/drivers/base/core.c  2008-12-11 22:46:49.000000000 +0100
20680 @@ -42,6 +42,11 @@ int (*platform_notify_remove)(struct dev
20681   */
20682  const char *dev_driver_string(struct device *dev)
20683  {
20684 +       if (!dev) {
20685 +               printk(KERN_ERR"Null dev to dev_driver_string\n");
20686 +               dump_stack();
20687 +               return "*NULL*";
20688 +       }
20689         return dev->driver ? dev->driver->name :
20690                         (dev->bus ? dev->bus->name :
20691                         (dev->class ? dev->class->name : ""));
20692 Index: linux-2.6.24.7/drivers/base/power/main.c
20693 ===================================================================
20694 --- linux-2.6.24.7.orig/drivers/base/power/main.c       2008-12-11 22:46:07.000000000 +0100
20695 +++ linux-2.6.24.7/drivers/base/power/main.c    2008-12-11 22:46:49.000000000 +0100
20696 @@ -40,9 +40,9 @@ int (*platform_enable_wakeup)(struct dev
20697
20698  void device_pm_add(struct device *dev)
20699  {
20700 -       pr_debug("PM: Adding info for %s:%s\n",
20701 +       /* pr_debug("PM: Adding info for %s:%s\n",
20702                  dev->bus ? dev->bus->name : "No Bus",
20703 -                kobject_name(&dev->kobj));
20704 +                kobject_name(&dev->kobj)); */
20705         mutex_lock(&dpm_list_mtx);
20706         list_add_tail(&dev->power.entry, &dpm_active);
20707         mutex_unlock(&dpm_list_mtx);
20708 Index: linux-2.6.24.7/drivers/char/Kconfig
20709 ===================================================================
20710 --- linux-2.6.24.7.orig/drivers/char/Kconfig    2008-12-11 22:46:09.000000000 +0100
20711 +++ linux-2.6.24.7/drivers/char/Kconfig 2008-12-11 22:46:49.000000000 +0100
20712 @@ -58,6 +58,18 @@ config VT_CONSOLE
20713
20714           If unsure, say Y.
20715
20716 +config NR_TTY_DEVICES
20717 +       int "Maximum tty device number"
20718 +       depends on VT
20719 +       default 63
20720 +       ---help---
20721 +         This is the highest numbered device created in /dev. You will actually have
20722 +         NR_TTY_DEVICES+1 devices in /dev. The default is 63, which will result in
20723 +         64 /dev entries. The lowest number you can set is 11, anything below that,
20724 +         and it will default to 11. 63 is also the upper limit so we don't overrun
20725 +         the serial consoles.
20726 +
20727 +
20728  config HW_CONSOLE
20729         bool
20730         depends on VT && !S390 && !UML
20731 Index: linux-2.6.24.7/drivers/i2c/busses/i2c-s3c2410.c
20732 ===================================================================
20733 --- linux-2.6.24.7.orig/drivers/i2c/busses/i2c-s3c2410.c        2008-12-11 22:46:07.000000000 +0100
20734 +++ linux-2.6.24.7/drivers/i2c/busses/i2c-s3c2410.c     2008-12-11 22:46:49.000000000 +0100
20735 @@ -71,6 +71,8 @@ struct s3c24xx_i2c {
20736         struct resource         *irq;
20737         struct resource         *ioarea;
20738         struct i2c_adapter      adap;
20739 +
20740 +       int                     suspended;
20741  };
20742
20743  /* default platform data to use if not supplied in the platform_device
20744 @@ -156,6 +158,14 @@ static inline void s3c24xx_i2c_disable_i
20745         unsigned long tmp;
20746
20747         tmp = readl(i2c->regs + S3C2410_IICCON);
20748 +
20749 +/* S3c2442 datasheet
20750 + *
20751 + * If the IICCON[5]=0, IICCON[4] does not operate correctly.
20752 + * So, It is recommended that you should set IICCON[5]=1,
20753 + * although you does not use the IIC interrupt.
20754 + */
20755 +
20756         writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
20757  }
20758
20759 @@ -282,7 +292,7 @@ static int i2s_s3c_irq_nextbyte(struct s
20760
20761         case STATE_STOP:
20762                 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
20763 -               s3c24xx_i2c_disable_irq(i2c);
20764 +               s3c24xx_i2c_disable_irq(i2c);
20765                 goto out_ack;
20766
20767         case STATE_START:
20768 @@ -502,6 +512,15 @@ static int s3c24xx_i2c_doxfer(struct s3c
20769         unsigned long timeout;
20770         int ret;
20771
20772 +       if (i2c->suspended) {
20773 +               dev_err(i2c->dev,
20774 +                   "Hey I am still asleep (suspended: %d), retry later\n",
20775 +                   i2c->suspended);
20776 +               dump_stack();
20777 +               ret = -EAGAIN;
20778 +               goto out;
20779 +       }
20780 +
20781         ret = s3c24xx_i2c_set_master(i2c);
20782         if (ret != 0) {
20783                 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
20784 @@ -886,12 +905,25 @@ static int s3c24xx_i2c_remove(struct pla
20785  }
20786
20787  #ifdef CONFIG_PM
20788 -static int s3c24xx_i2c_resume(struct platform_device *dev)
20789 +
20790 +static int s3c24xx_i2c_suspend(struct platform_device *dev, pm_message_t state)
20791  {
20792         struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
20793
20794         if (i2c != NULL)
20795 +               i2c->suspended++;
20796 +
20797 +       return 0;
20798 +}
20799 +
20800 +static int s3c24xx_i2c_resume(struct platform_device *dev)
20801 +{
20802 +       struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
20803 +
20804 +       if (i2c != NULL) {
20805                 s3c24xx_i2c_init(i2c);
20806 +               i2c->suspended--;
20807 +       }
20808
20809         return 0;
20810  }
20811 @@ -905,6 +937,7 @@ static int s3c24xx_i2c_resume(struct pla
20812  static struct platform_driver s3c2410_i2c_driver = {
20813         .probe          = s3c24xx_i2c_probe,
20814         .remove         = s3c24xx_i2c_remove,
20815 +       .suspend        = s3c24xx_i2c_suspend,
20816         .resume         = s3c24xx_i2c_resume,
20817         .driver         = {
20818                 .owner  = THIS_MODULE,
20819 @@ -915,6 +948,7 @@ static struct platform_driver s3c2410_i2
20820  static struct platform_driver s3c2440_i2c_driver = {
20821         .probe          = s3c24xx_i2c_probe,
20822         .remove         = s3c24xx_i2c_remove,
20823 +       .suspend        = s3c24xx_i2c_suspend,
20824         .resume         = s3c24xx_i2c_resume,
20825         .driver         = {
20826                 .owner  = THIS_MODULE,
20827 Index: linux-2.6.24.7/drivers/i2c/chips/Kconfig
20828 ===================================================================
20829 --- linux-2.6.24.7.orig/drivers/i2c/chips/Kconfig       2008-12-11 22:46:07.000000000 +0100
20830 +++ linux-2.6.24.7/drivers/i2c/chips/Kconfig    2008-12-11 22:46:49.000000000 +0100
20831 @@ -51,6 +51,26 @@ config SENSORS_EEPROM
20832           This driver can also be built as a module.  If so, the module
20833           will be called eeprom.
20834
20835 +config SENSORS_PCF50606
20836 +       tristate "Philips/NXP PCF50606"
20837 +       depends on I2C
20838 +       help
20839 +         If you say yes here you get support for Philips/NXP PCF50606
20840 +         PMU (Power Management Unit) chips.
20841 +
20842 +         This driver can also be built as a module.  If so, the module
20843 +         will be called pcf50606.
20844 +
20845 +config SENSORS_PCF50633
20846 +       tristate "Philips PCF50633"
20847 +       depends on I2C
20848 +       help
20849 +         If you say yes here you get support for Philips PCF50633
20850 +         PMU (Power Management Unit) chips.
20851 +
20852 +         This driver can also be built as a module.  If so, the module
20853 +         will be called pcf50633.
20854 +
20855  config SENSORS_PCF8574
20856         tristate "Philips PCF8574 and PCF8574A"
20857         depends on EXPERIMENTAL
20858 @@ -163,4 +183,23 @@ config MENELAUS
20859           and other features that are often used in portable devices like
20860           cell phones and PDAs.
20861
20862 +config SENSORS_TSL256X
20863 +       tristate "Texas TSL256X Ambient Light Sensor"
20864 +       depends on I2C
20865 +       help
20866 +         If you say yes here you get support for the Texas TSL256X
20867 +         ambient light sensor chip.
20868 +
20869 +         This driver can also be built as a module.  If so, the module
20870 +         will be called tsl256x.
20871 +
20872 +config PCA9632
20873 +       tristate "Philips/NXP PCA9632 low power LED driver"
20874 +       depends on I2C
20875 +       help
20876 +         If you say yes here you get support for the Philips/NXP PCA9632
20877 +         LED driver.
20878 +
20879 +         This driver can also be built as a module.  If so, the module
20880 +         will be called pca9632.
20881  endmenu
20882 Index: linux-2.6.24.7/drivers/i2c/chips/Makefile
20883 ===================================================================
20884 --- linux-2.6.24.7.orig/drivers/i2c/chips/Makefile      2008-12-11 22:46:07.000000000 +0100
20885 +++ linux-2.6.24.7/drivers/i2c/chips/Makefile   2008-12-11 22:46:49.000000000 +0100
20886 @@ -9,12 +9,16 @@ obj-$(CONFIG_SENSORS_EEPROM)  += eeprom.o
20887  obj-$(CONFIG_SENSORS_MAX6875)  += max6875.o
20888  obj-$(CONFIG_SENSORS_M41T00)   += m41t00.o
20889  obj-$(CONFIG_SENSORS_PCA9539)  += pca9539.o
20890 +obj-$(CONFIG_SENSORS_PCF50606) += pcf50606.o
20891 +obj-$(CONFIG_SENSORS_PCF50633) += pcf50633.o
20892  obj-$(CONFIG_SENSORS_PCF8574)  += pcf8574.o
20893  obj-$(CONFIG_SENSORS_PCF8591)  += pcf8591.o
20894  obj-$(CONFIG_ISP1301_OMAP)     += isp1301_omap.o
20895  obj-$(CONFIG_TPS65010)         += tps65010.o
20896  obj-$(CONFIG_MENELAUS)         += menelaus.o
20897  obj-$(CONFIG_SENSORS_TSL2550)  += tsl2550.o
20898 +obj-$(CONFIG_SENSORS_TSL256X)  += tsl256x.o
20899 +obj-$(CONFIG_PCA9632)          += pca9632.o
20900
20901  ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
20902  EXTRA_CFLAGS += -DDEBUG
20903 Index: linux-2.6.24.7/drivers/i2c/chips/pca9632.c
20904 ===================================================================
20905 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
20906 +++ linux-2.6.24.7/drivers/i2c/chips/pca9632.c  2008-12-11 22:46:49.000000000 +0100
20907 @@ -0,0 +1,551 @@
20908 +/*
20909 + *  Philips/NXP PCA9632 low power LED driver.
20910 + *  Copyright (C) 2008 Matt Hsu <matt_hsu@openmoko.org>
20911 + *
20912 + *  low_level implementation are based on pcf50606 driver
20913 + *
20914 + *  This program is free software; you can redistribute it and/or modify
20915 + *  it under the terms of the GNU General Public License as published by
20916 + *  the Free Software Foundation; version 2 of the License.
20917 + *
20918 + *  TODO:
20919 + *  - attach ledclass??
20920 + *  - add platform data
20921 + *
20922 + */
20923 +
20924 +#include <linux/module.h>
20925 +#include <linux/init.h>
20926 +#include <linux/i2c.h>
20927 +#include <linux/platform_device.h>
20928 +
20929 +#include "pca9632.h"
20930 +
20931 +/* Addresses to scan */
20932 +static unsigned short normal_i2c[] = { 0x62, I2C_CLIENT_END };
20933 +
20934 +/* Insmod parameters */
20935 +I2C_CLIENT_INSMOD_1(pca9632);
20936 +
20937 +enum pca9632_pwr_state {
20938 +       PCA9632_NORMAL,
20939 +       PCA9632_SLEEP,
20940 +};
20941 +
20942 +enum pca9632_led_output {
20943 +       PCA9632_OFF,
20944 +       PCA9632_ON,
20945 +       PCA9632_CTRL_BY_PWM,
20946 +       PCA9632_CTRL_BY_PWM_GRPPWM,
20947 +};
20948 +
20949 +static const char *led_output_name[] = {
20950 +       [PCA9632_OFF]                   = "off",
20951 +       [PCA9632_ON]                    = "fully-on",
20952 +       [PCA9632_CTRL_BY_PWM]           = "ctrl-by-pwm",
20953 +       [PCA9632_CTRL_BY_PWM_GRPPWM]    = "ctrl-by-pwm-grppwm",
20954 +};
20955 +
20956 +struct pca9632_data {
20957 +       struct i2c_client client;
20958 +       struct mutex lock;
20959 +};
20960 +
20961 +static struct i2c_driver pca9632_driver;
20962 +static struct platform_device *pca9632_pdev;
20963 +
20964 +static int pca9632_attach_adapter(struct i2c_adapter *adapter);
20965 +static int pca9632_detach_client(struct i2c_client *client);
20966 +
20967 +static int __reg_write(struct pca9632_data *pca, u_int8_t reg, u_int8_t val)
20968 +{
20969 +       return i2c_smbus_write_byte_data(&pca->client, reg, val);
20970 +}
20971 +
20972 +static int reg_write(struct pca9632_data *pca, u_int8_t reg, u_int8_t val)
20973 +{
20974 +       int ret;
20975 +
20976 +       mutex_lock(&pca->lock);
20977 +       ret = __reg_write(pca, reg, val);
20978 +       mutex_unlock(&pca->lock);
20979 +
20980 +       return ret;
20981 +}
20982 +
20983 +static int32_t __reg_read(struct pca9632_data *pca, u_int8_t reg)
20984 +{
20985 +       int32_t ret;
20986 +
20987 +       ret = i2c_smbus_read_byte_data(&pca->client, reg);
20988 +
20989 +       return ret;
20990 +}
20991 +
20992 +static u_int8_t reg_read(struct pca9632_data *pca, u_int8_t reg)
20993 +{
20994 +       int32_t ret;
20995 +
20996 +       mutex_lock(&pca->lock);
20997 +       ret = __reg_read(pca, reg);
20998 +       mutex_unlock(&pca->lock);
20999 +
21000 +       return ret & 0xff;
21001 +}
21002 +
21003 +static int reg_set_bit_mask(struct pca9632_data *pca,
21004 +                           u_int8_t reg, u_int8_t mask, u_int8_t val)
21005 +{
21006 +       int ret;
21007 +       u_int8_t tmp;
21008 +
21009 +       val &= mask;
21010 +
21011 +       mutex_lock(&pca->lock);
21012 +
21013 +       tmp = __reg_read(pca, reg);
21014 +       tmp &= ~mask;
21015 +       tmp |= val;
21016 +       ret = __reg_write(pca, reg, tmp);
21017 +
21018 +       mutex_unlock(&pca->lock);
21019 +
21020 +       return ret;
21021 +}
21022 +
21023 +static inline int calc_dc(uint8_t idc)
21024 +{
21025 +       return (idc * 100) / 256;
21026 +}
21027 +
21028 +/*
21029 + * Software reset
21030 + */
21031 +static int software_rst(struct i2c_adapter *adapter)
21032 +{
21033 +       u8 buf[] = { 0xa5, 0x5a };
21034 +
21035 +       struct i2c_msg msg[] = {
21036 +               {
21037 +                       .addr = 0x3,
21038 +                       .flags = 0,
21039 +                       .buf = &buf,
21040 +                       .len = sizeof(buf)
21041 +               }
21042 +       };
21043 +
21044 +       return i2c_transfer(adapter, msg, 1);
21045 +}
21046 +
21047 +/*
21048 + * Group dmblnk control
21049 + */
21050 +static void config_group_dmblnk(struct pca9632_data *pca, int group_dmblnk_mode)
21051 +{
21052 +       reg_set_bit_mask(pca, PCA9632_REG_MODE2, 0x20,
21053 +                       group_dmblnk_mode << PCA9632_DMBLNK_SHIFT);
21054 +}
21055 +
21056 +static int get_group_dmblnk(struct pca9632_data *pca)
21057 +{
21058 +       return reg_read(pca, PCA9632_REG_MODE2) >> PCA9632_DMBLNK_SHIFT;
21059 +}
21060 +
21061 +static ssize_t show_group_dmblnk(struct device *dev, struct device_attribute
21062 +                                       *attr, char *buf)
21063 +{
21064 +       struct i2c_client *client = to_i2c_client(dev);
21065 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21066 +
21067 +       if (get_group_dmblnk(pca))
21068 +               return sprintf(buf, "blinking\n");
21069 +       else
21070 +               return sprintf(buf, "dimming\n");
21071 +}
21072 +
21073 +static ssize_t set_group_dmblnk(struct device *dev, struct device_attribute
21074 +                                       *attr, const char *buf, size_t count)
21075 +{
21076 +       struct i2c_client *client = to_i2c_client(dev);
21077 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21078 +       unsigned int mode = simple_strtoul(buf, NULL, 10);
21079 +
21080 +       if (mode)
21081 +               dev_info(&pca->client.dev, "blinking\n");
21082 +       else
21083 +               dev_info(&pca->client.dev, "dimming\n");
21084 +
21085 +       config_group_dmblnk(pca, mode);
21086 +
21087 +       return count;
21088 +}
21089 +
21090 +static DEVICE_ATTR(group_dmblnk, S_IRUGO | S_IWUSR, show_group_dmblnk,
21091 +                                                       set_group_dmblnk);
21092 +
21093 +static int reg_id_by_name(const char *name)
21094 +{
21095 +       int reg_id = -1;
21096 +
21097 +       if (!strncmp(name, "led0", 4))
21098 +               reg_id = PCA9632_REG_PWM0;
21099 +       else if (!strncmp(name, "led1", 4))
21100 +               reg_id = PCA9632_REG_PWM1;
21101 +       else if (!strncmp(name, "led2", 4))
21102 +               reg_id = PCA9632_REG_PWM2;
21103 +       else if (!strncmp(name, "led3", 4))
21104 +               reg_id = PCA9632_REG_PWM3;
21105 +
21106 +       return reg_id;
21107 +}
21108 +
21109 +static int get_led_output(struct pca9632_data *pca, int ldrx)
21110 +{
21111 +       u_int8_t led_state;
21112 +
21113 +       ldrx = ldrx - 2;
21114 +       led_state = reg_read(pca, PCA9632_REG_LEDOUT);
21115 +       led_state = (led_state >> (2 * ldrx)) & 0x03;
21116 +
21117 +       return led_state;
21118 +}
21119 +
21120 +static void config_led_output(struct pca9632_data *pca, int ldrx,
21121 +                                       enum pca9632_led_output led_output)
21122 +{
21123 +       u_int8_t mask;
21124 +       int tmp;
21125 +
21126 +       ldrx = ldrx - 2;
21127 +       mask = 0x03 << (2 * ldrx);
21128 +       tmp = reg_set_bit_mask(pca, PCA9632_REG_LEDOUT,
21129 +                                       mask, led_output << (2 * ldrx));
21130 +}
21131 +
21132 +/*
21133 + * Individual brightness control
21134 + */
21135 +static ssize_t show_brightness(struct device *dev, struct device_attribute
21136 +                                       *attr, char *buf)
21137 +{
21138 +       struct i2c_client *client = to_i2c_client(dev);
21139 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21140 +       int ldrx;
21141 +
21142 +       ldrx = reg_id_by_name(attr->attr.name);
21143 +
21144 +       switch (get_led_output(pca, ldrx)) {
21145 +
21146 +       case PCA9632_OFF:
21147 +       case PCA9632_ON:
21148 +               return sprintf(buf, "%s",
21149 +                       led_output_name[get_led_output(pca, ldrx)]);
21150 +
21151 +       case PCA9632_CTRL_BY_PWM:
21152 +               return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca, ldrx)));
21153 +
21154 +       case PCA9632_CTRL_BY_PWM_GRPPWM:
21155 +               /* check group dmblnk */
21156 +               if (get_group_dmblnk(pca))
21157 +                       return sprintf(buf, "%d%% \n",
21158 +                               calc_dc(reg_read(pca, ldrx)));
21159 +               return sprintf(buf, "%d%% \n",
21160 +                                        calc_dc((reg_read(pca, ldrx) & 0xfc)));
21161 +       default:
21162 +               break;
21163 +       }
21164 +
21165 +       return sprintf(buf, "invalid argument\n");
21166 +}
21167 +
21168 +static ssize_t set_brightness(struct device *dev, struct device_attribute *attr,
21169 +                       const char *buf, size_t count)
21170 +{
21171 +       struct i2c_client *client = to_i2c_client(dev);
21172 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21173 +       unsigned int pwm = simple_strtoul(buf, NULL, 10);
21174 +       int ldrx;
21175 +
21176 +       ldrx = reg_id_by_name(attr->attr.name);
21177 +       reg_set_bit_mask(pca, ldrx, 0xff, pwm);
21178 +
21179 +       return count;
21180 +}
21181 +
21182 +static
21183 +DEVICE_ATTR(led0_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
21184 +static
21185 +DEVICE_ATTR(led1_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
21186 +static
21187 +DEVICE_ATTR(led2_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
21188 +static
21189 +DEVICE_ATTR(led3_pwm, S_IRUGO | S_IWUSR, show_brightness, set_brightness);
21190 +
21191 +/*
21192 + * Group frequency control
21193 + */
21194 +static ssize_t show_group_freq(struct device *dev, struct device_attribute
21195 +                               *attr, char *buf)
21196 +{
21197 +       uint32_t period;
21198 +       struct i2c_client *client = to_i2c_client(dev);
21199 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21200 +
21201 +       period = ((reg_read(pca, PCA9632_REG_GRPFREQ) + 1) * 1000) / 24;
21202 +
21203 +       return sprintf(buf, "%d ms\n", period);
21204 +}
21205 +
21206 +static ssize_t set_group_freq(struct device *dev, struct device_attribute *attr,
21207 +                       const char *buf, size_t count)
21208 +{
21209 +       struct i2c_client *client = to_i2c_client(dev);
21210 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21211 +
21212 +       unsigned int freq = simple_strtoul(buf, NULL, 10);
21213 +       reg_write(pca, PCA9632_REG_GRPFREQ, freq);
21214 +       return count;
21215 +}
21216 +
21217 +static
21218 +DEVICE_ATTR(group_freq, S_IRUGO | S_IWUSR, show_group_freq, set_group_freq);
21219 +
21220 +/*
21221 + * Group duty cycle tonrol*
21222 + */
21223 +static ssize_t show_group_dc(struct device *dev, struct device_attribute *attr,
21224 +                            char *buf)
21225 +{
21226 +       struct i2c_client *client = to_i2c_client(dev);
21227 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21228 +
21229 +       if (get_group_dmblnk(pca)) {
21230 +
21231 +               if (reg_read(pca, PCA9632_REG_GRPFREQ) <= 0x03)
21232 +                       return sprintf(buf, "%d%% \n",
21233 +                            calc_dc(reg_read(pca, PCA9632_REG_GRPPWM) & 0xfc));
21234 +
21235 +               return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca,
21236 +                                                         PCA9632_REG_GRPPWM)));
21237 +       }
21238 +
21239 +       return sprintf(buf, "%d%% \n", calc_dc(reg_read(pca,
21240 +                                                  PCA9632_REG_GRPPWM) & 0xf0));
21241 +}
21242 +
21243 +static ssize_t set_group_dc(struct device *dev, struct device_attribute *attr,
21244 +                       const char *buf, size_t count)
21245 +{
21246 +       struct i2c_client *client = to_i2c_client(dev);
21247 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21248 +
21249 +       unsigned int dc = simple_strtoul(buf, NULL, 10);
21250 +
21251 +       reg_set_bit_mask(pca, PCA9632_REG_GRPPWM, 0xff, dc);
21252 +
21253 +       return count;
21254 +}
21255 +
21256 +static DEVICE_ATTR(group_dc, S_IRUGO | S_IWUSR, show_group_dc, set_group_dc);
21257 +
21258 +/*
21259 + * LED driver output
21260 + */
21261 +static ssize_t show_led_output(struct device *dev, struct device_attribute
21262 +                                       *attr, char *buf)
21263 +{
21264 +       struct i2c_client *client = to_i2c_client(dev);
21265 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21266 +       int ldrx;
21267 +
21268 +       ldrx = reg_id_by_name(attr->attr.name);
21269 +
21270 +       return sprintf(buf, "%s \n",
21271 +                                   led_output_name[get_led_output(pca, ldrx)]);
21272 +
21273 +}
21274 +static ssize_t set_led_output(struct device *dev, struct device_attribute *attr,
21275 +                       const char *buf, size_t count)
21276 +{
21277 +       struct i2c_client *client = to_i2c_client(dev);
21278 +       struct pca9632_data *pca = i2c_get_clientdata(client);
21279 +       enum pca9632_led_output led_output;
21280 +       int ldrx;
21281 +
21282 +       led_output = simple_strtoul(buf, NULL, 10);
21283 +       ldrx = reg_id_by_name(attr->attr.name);
21284 +       config_led_output(pca, ldrx, led_output);
21285 +
21286 +       return count;
21287 +}
21288 +
21289 +static
21290 +DEVICE_ATTR(led0_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
21291 +static
21292 +DEVICE_ATTR(led1_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
21293 +static
21294 +DEVICE_ATTR(led2_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
21295 +static
21296 +DEVICE_ATTR(led3_output, S_IRUGO | S_IWUSR, show_led_output, set_led_output);
21297 +
21298 +static struct attribute *pca_sysfs_entries[] = {
21299 +       &dev_attr_group_dmblnk.attr,
21300 +       &dev_attr_led0_pwm.attr,
21301 +       &dev_attr_led1_pwm.attr,
21302 +       &dev_attr_led2_pwm.attr,
21303 +       &dev_attr_led3_pwm.attr,
21304 +       &dev_attr_group_dc.attr,
21305 +       &dev_attr_group_freq.attr,
21306 +       &dev_attr_led0_output.attr,
21307 +       &dev_attr_led1_output.attr,
21308 +       &dev_attr_led2_output.attr,
21309 +       &dev_attr_led3_output.attr,
21310 +       NULL
21311 +};
21312 +
21313 +static struct attribute_group pca_attr_group = {
21314 +       .name   = NULL,                 /* put in device directory */
21315 +       .attrs  = pca_sysfs_entries,
21316 +};
21317 +
21318 +#ifdef CONFIG_PM
21319 +static int pca9632_suspend(struct device *dev, pm_message_t state)
21320 +{
21321 +       /* FIXME: Not implemented */
21322 +       return 0;
21323 +}
21324 +
21325 +static int pca9632_resume(struct device *dev)
21326 +{
21327 +       /* FIXME: Not implemented */
21328 +       return 0;
21329 +}
21330 +#else
21331 +#define pca9632_suspend NULL
21332 +#define pca9632_resume NULL
21333 +#endif
21334 +
21335 +static struct i2c_driver pca9632_driver = {
21336 +       .driver = {
21337 +               .name    = "pca9632",
21338 +               .suspend = pca9632_suspend,
21339 +               .resume  = pca9632_resume,
21340 +       },
21341 +       .id             = I2C_DRIVERID_PCA9632,
21342 +       .attach_adapter = pca9632_attach_adapter,
21343 +       .detach_client  = pca9632_detach_client,
21344 +};
21345 +
21346 +static int pca9632_detect(struct i2c_adapter *adapter, int address, int kind)
21347 +{
21348 +       struct i2c_client *new_client;
21349 +       struct pca9632_data *pca;
21350 +       int err;
21351 +
21352 +       pca = kzalloc(sizeof(struct pca9632_data), GFP_KERNEL);
21353 +       if (!pca)
21354 +               return -ENOMEM;
21355 +
21356 +       mutex_init(&pca->lock);
21357 +
21358 +       new_client = &pca->client;
21359 +       i2c_set_clientdata(new_client, pca);
21360 +       new_client->addr = address;
21361 +       new_client->adapter = adapter;
21362 +       new_client->driver = &pca9632_driver;
21363 +       new_client->flags = 0;
21364 +
21365 +       strlcpy(new_client->name, "pca9632", I2C_NAME_SIZE);
21366 +
21367 +       /* register with i2c core */
21368 +       err = i2c_attach_client(new_client);
21369 +       if (err)
21370 +               goto exit_kfree;
21371 +
21372 +       err = sysfs_create_group(&new_client->dev.kobj, &pca_attr_group);
21373 +       if (err)
21374 +               goto exit_detach;
21375 +
21376 +       /* software reset */
21377 +       if (!software_rst(adapter))
21378 +               dev_info(&pca->client.dev, "pca9632 sw-rst done\n");
21379 +
21380 +       /* enter normal mode */
21381 +       reg_set_bit_mask(pca, PCA9632_REG_MODE1, 0x10, PCA9632_NORMAL);
21382 +
21383 +       return 0;
21384 +
21385 +exit_detach:
21386 +       i2c_detach_client(new_client);
21387 +exit_kfree:
21388 +       kfree(pca);
21389 +
21390 +       return err;
21391 +}
21392 +
21393 +static int pca9632_attach_adapter(struct i2c_adapter *adapter)
21394 +{
21395 +       return i2c_probe(adapter, &addr_data, pca9632_detect);
21396 +}
21397 +
21398 +static int pca9632_detach_client(struct i2c_client *client)
21399 +{
21400 +       int err;
21401 +
21402 +       sysfs_remove_group(&client->dev.kobj, &pca_attr_group);
21403 +       err = i2c_detach_client(client);
21404 +
21405 +       if (err)
21406 +               return err;
21407 +
21408 +       kfree(i2c_get_clientdata(client));
21409 +
21410 +       return 0;
21411 +}
21412 +
21413 +static int __init pca9632_plat_probe(struct platform_device *pdev)
21414 +{
21415 +       /* FIXME: platform data should be attached here */
21416 +       pca9632_pdev = pdev;
21417 +
21418 +       return 0;
21419 +}
21420 +
21421 +static int pca9632_plat_remove(struct platform_device *pdev)
21422 +{
21423 +       return 0;
21424 +}
21425 +
21426 +static struct platform_driver pca9632_plat_driver = {
21427 +       .probe  = pca9632_plat_probe,
21428 +       .remove = pca9632_plat_remove,
21429 +       .driver = {
21430 +               .owner  = THIS_MODULE,
21431 +               .name   = "pca9632",
21432 +       },
21433 +};
21434 +
21435 +static int __init pca9632_init(void)
21436 +{
21437 +       int rc;
21438 +
21439 +       rc = platform_driver_register(&pca9632_plat_driver);
21440 +       if (!rc)
21441 +               i2c_add_driver(&pca9632_driver);
21442 +
21443 +       return rc;
21444 +}
21445 +
21446 +static void __exit pca9632_exit(void)
21447 +{
21448 +       i2c_del_driver(&pca9632_driver);
21449 +
21450 +       platform_driver_unregister(&pca9632_plat_driver);
21451 +}
21452 +
21453 +MODULE_AUTHOR("Matt Hsu <matt_hsu@openmoko.org>");
21454 +MODULE_DESCRIPTION("NXP PCA9632 driver");
21455 +MODULE_LICENSE("GPL");
21456 +
21457 +module_init(pca9632_init);
21458 +module_exit(pca9632_exit);
21459 Index: linux-2.6.24.7/drivers/i2c/chips/pca9632.h
21460 ===================================================================
21461 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
21462 +++ linux-2.6.24.7/drivers/i2c/chips/pca9632.h  2008-12-11 22:46:49.000000000 +0100
21463 @@ -0,0 +1,24 @@
21464 +#ifndef _PCA9632_H
21465 +#define _PCA9632_H
21466 +
21467 +
21468 +enum pca9632_regs{
21469 +
21470 +       PCA9632_REG_MODE1       = 0x00,
21471 +       PCA9632_REG_MODE2       = 0x01,
21472 +       PCA9632_REG_PWM0        = 0x02,
21473 +       PCA9632_REG_PWM1        = 0x03,
21474 +       PCA9632_REG_PWM2        = 0x04,
21475 +       PCA9632_REG_PWM3        = 0x05,
21476 +       PCA9632_REG_GRPPWM      = 0x06,
21477 +       PCA9632_REG_GRPFREQ     = 0x07,
21478 +       PCA9632_REG_LEDOUT      = 0x08,
21479 +       PCA9632_REG_SUBADDR1    = 0x09,
21480 +       PCA9632_REG_SUBADDR2    = 0x0a,
21481 +       PCA9632_REG_SUBADDR3    = 0x0b,
21482 +       PCA9632_REG_ALLCALLADR1 = 0x0c,
21483 +};
21484 +
21485 +#define PCA9632_DMBLNK_SHIFT   5
21486 +
21487 +#endif /* _PCA9632_H */
21488 Index: linux-2.6.24.7/drivers/i2c/chips/pcf50606.c
21489 ===================================================================
21490 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
21491 +++ linux-2.6.24.7/drivers/i2c/chips/pcf50606.c 2008-12-11 22:46:49.000000000 +0100
21492 @@ -0,0 +1,2289 @@
21493 +/* Philips/NXP PCF50606 Power Management Unit (PMU) driver
21494 + *
21495 + * (C) 2006-2007 by Openmoko, Inc.
21496 + * Authors: Harald Welte <laforge@openmoko.org>,
21497 + *         Matt Hsu <matt@openmoko.org>
21498 + * All rights reserved.
21499 + *
21500 + * This program is free software; you can redistribute it and/or
21501 + * modify it under the terms of the GNU General Public License as
21502 + * published by the Free Software Foundation; either version 2 of
21503 + * the License, or (at your option) any later version.
21504 + *
21505 + * This program is distributed in the hope that it will be useful,
21506 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
21507 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21508 + * GNU General Public License for more details.
21509 + *
21510 + * You should have received a copy of the GNU General Public License
21511 + * along with this program; if not, write to the Free Software
21512 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21513 + * MA 02111-1307 USA
21514 + *
21515 + * This driver is a monster ;) It provides the following features
21516 + * - voltage control for a dozen different voltage domains
21517 + * - charging control for main and backup battery
21518 + * - rtc / alarm
21519 + * - watchdog
21520 + * - adc driver (hw_sensors like)
21521 + * - pwm driver
21522 + * - backlight
21523 + *
21524 + */
21525 +
21526 +#include <linux/module.h>
21527 +#include <linux/init.h>
21528 +#include <linux/i2c.h>
21529 +#include <linux/types.h>
21530 +#include <linux/interrupt.h>
21531 +#include <linux/irq.h>
21532 +#include <linux/workqueue.h>
21533 +#include <linux/delay.h>
21534 +#include <linux/rtc.h>
21535 +#include <linux/bcd.h>
21536 +#include <linux/watchdog.h>
21537 +#include <linux/miscdevice.h>
21538 +#include <linux/input.h>
21539 +#include <linux/fb.h>
21540 +#include <linux/backlight.h>
21541 +#include <linux/sched.h>
21542 +#include <linux/platform_device.h>
21543 +#include <linux/pcf50606.h>
21544 +#include <linux/apm-emulation.h>
21545 +#include <linux/power_supply.h>
21546 +
21547 +#include <asm/mach-types.h>
21548 +#include <asm/arch/gta01.h>
21549 +
21550 +#include "pcf50606.h"
21551 +
21552 +/* we use dev_dbg() throughout the code, but sometimes don't want to
21553 + * write an entire line of debug related information.  This DEBUGPC
21554 + * macro is a continuation for dev_dbg() */
21555 +#ifdef DEBUG
21556 +#define DEBUGPC(x, args ...) printk(x, ## args)
21557 +#else
21558 +#define DEBUGPC(x, args ...)
21559 +#endif
21560 +
21561 +/***********************************************************************
21562 + * Static data / structures
21563 + ***********************************************************************/
21564 +
21565 +static unsigned short normal_i2c[] = { 0x08, I2C_CLIENT_END };
21566 +
21567 +I2C_CLIENT_INSMOD_1(pcf50606);
21568 +
21569 +#define PCF50606_B_CHG_FAST    0       /* Charger Fast allowed */
21570 +#define PCF50606_B_CHG_PRESENT 1       /* Charger present */
21571 +#define PCF50606_B_CHG_FOK     2       /* Fast OK for battery */
21572 +#define PCF50606_B_CHG_ERR     3       /* Charger Error */
21573 +#define PCF50606_B_CHG_PROT    4       /* Charger Protection */
21574 +#define PCF50606_B_CHG_READY   5       /* Charging completed */
21575 +
21576 +#define PCF50606_F_CHG_FAST    (1<<PCF50606_B_CHG_FAST)
21577 +#define PCF50606_F_CHG_PRESENT (1<<PCF50606_B_CHG_PRESENT)
21578 +#define PCF50606_F_CHG_FOK     (1<<PCF50606_B_CHG_FOK)
21579 +#define PCF50606_F_CHG_ERR     (1<<PCF50606_B_CHG_ERR)
21580 +#define PCF50606_F_CHG_PROT    (1<<PCF50606_B_CHG_PROT)
21581 +#define PCF50606_F_CHG_READY   (1<<PCF50606_B_CHG_READY)
21582 +#define PCF50606_F_CHG_MASK    0x000000fc
21583 +
21584 +#define PCF50606_F_PWR_PRESSED 0x00000100
21585 +#define PCF50606_F_RTC_SECOND  0x00000200
21586 +
21587 +enum close_state {
21588 +       CLOSE_STATE_NOT,
21589 +       CLOSE_STATE_ALLOW = 0x2342,
21590 +};
21591 +
21592 +enum pcf50606_suspend_states {
21593 +       PCF50606_SS_RUNNING,
21594 +       PCF50606_SS_STARTING_SUSPEND,
21595 +       PCF50606_SS_COMPLETED_SUSPEND,
21596 +       PCF50606_SS_RESUMING_BUT_NOT_US_YET,
21597 +       PCF50606_SS_STARTING_RESUME,
21598 +       PCF50606_SS_COMPLETED_RESUME,
21599 +};
21600 +
21601 +struct pcf50606_data {
21602 +       struct i2c_client client;
21603 +       struct pcf50606_platform_data *pdata;
21604 +       struct backlight_device *backlight;
21605 +       struct mutex lock;
21606 +       unsigned int flags;
21607 +       unsigned int working;
21608 +       struct mutex working_lock;
21609 +       struct work_struct work;
21610 +       struct rtc_device *rtc;
21611 +       struct input_dev *input_dev;
21612 +       int allow_close;
21613 +       int onkey_seconds;
21614 +       int irq;
21615 +       int coldplug_done;
21616 +       int suppress_onkey_events;
21617 +       enum pcf50606_suspend_states suspend_state;
21618 +#ifdef CONFIG_PM
21619 +       struct {
21620 +               u_int8_t dcdc1, dcdc2;
21621 +               u_int8_t dcdec1;
21622 +               u_int8_t dcudc1;
21623 +               u_int8_t ioregc;
21624 +               u_int8_t d1regc1;
21625 +               u_int8_t d2regc1;
21626 +               u_int8_t d3regc1;
21627 +               u_int8_t lpregc1;
21628 +               u_int8_t adcc1, adcc2;
21629 +               u_int8_t pwmc1;
21630 +               u_int8_t int1m, int2m, int3m;
21631 +       } standby_regs;
21632 +#endif
21633 +};
21634 +
21635 +static struct i2c_driver pcf50606_driver;
21636 +
21637 +/* This global is set by the pcf50606 driver to the correct callback
21638 + * for the gta01 battery driver. */
21639 +int (*pmu_bat_get_property)(struct power_supply *, enum power_supply_property,
21640 +                           union power_supply_propval *);
21641 +EXPORT_SYMBOL(pmu_bat_get_property);
21642 +
21643 +/* This is an ugly construct on how to access the (currently single/global)
21644 + * pcf50606 handle from other code in the kernel.  I didn't really come up with
21645 + * a more decent method of dynamically resolving this */
21646 +struct pcf50606_data *pcf50606_global;
21647 +EXPORT_SYMBOL_GPL(pcf50606_global);
21648 +
21649 +static struct platform_device *pcf50606_pdev;
21650 +
21651 +/* This is a 10k, B=3370 NTC Thermistor -10..79 centigrade */
21652 +/* Table entries are offset by +0.5C so a properly rounded value is generated */
21653 +static const u_int16_t ntc_table_10k_3370B[] = {
21654 +       /* -10 */
21655 +       43888, 41819, 39862, 38010, 36257, 34596, 33024, 31534, 30121, 28781,
21656 +       27510, 26304, 25159, 24071, 23038, 22056, 21122, 20234, 19390, 18586,
21657 +       17821, 17093, 16399, 15738, 15107, 14506, 13933, 13387, 12865, 12367,
21658 +       11891, 11437, 11003, 10588, 10192, 9813, 9450, 9103, 8771, 8453,
21659 +       8149, 7857, 7578, 7310, 7054, 6808, 6572, 6346, 6129, 5920,
21660 +       5720, 5528, 5344, 5167, 4996, 4833, 4675, 4524, 4379, 4239,
21661 +       4104, 3975, 3850, 3730, 3614, 3503, 3396, 3292, 3193, 3097,
21662 +       3004, 2915, 2829, 2745, 2665, 2588, 2513, 2441, 2371, 2304,
21663 +       2239, 2176, 2116, 2057, 2000, 1945, 1892, 1841, 1791, 1743,
21664 +};
21665 +
21666 +
21667 +/***********************************************************************
21668 + * Low-Level routines
21669 + ***********************************************************************/
21670 +
21671 +static inline int __reg_write(struct pcf50606_data *pcf, u_int8_t reg,
21672 +                             u_int8_t val)
21673 +{
21674 +       if (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND) {
21675 +               dev_err(&pcf->client.dev, "__reg_write while suspended.\n");
21676 +               dump_stack();
21677 +       }
21678 +       return i2c_smbus_write_byte_data(&pcf->client, reg, val);
21679 +}
21680 +
21681 +static int reg_write(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val)
21682 +{
21683 +       int ret;
21684 +
21685 +       mutex_lock(&pcf->lock);
21686 +       ret = __reg_write(pcf, reg, val);
21687 +       mutex_unlock(&pcf->lock);
21688 +
21689 +       return ret;
21690 +}
21691 +
21692 +static inline int32_t __reg_read(struct pcf50606_data *pcf, u_int8_t reg)
21693 +{
21694 +       int32_t ret;
21695 +
21696 +       if (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND) {
21697 +               dev_err(&pcf->client.dev, "__reg_read while suspended.\n");
21698 +               dump_stack();
21699 +       }
21700 +       ret = i2c_smbus_read_byte_data(&pcf->client, reg);
21701 +
21702 +       return ret;
21703 +}
21704 +
21705 +static u_int8_t reg_read(struct pcf50606_data *pcf, u_int8_t reg)
21706 +{
21707 +       int32_t ret;
21708 +
21709 +       mutex_lock(&pcf->lock);
21710 +       ret = __reg_read(pcf, reg);
21711 +       mutex_unlock(&pcf->lock);
21712 +
21713 +       return ret & 0xff;
21714 +}
21715 +
21716 +static int reg_set_bit_mask(struct pcf50606_data *pcf,
21717 +                           u_int8_t reg, u_int8_t mask, u_int8_t val)
21718 +{
21719 +       int ret;
21720 +       u_int8_t tmp;
21721 +
21722 +       val &= mask;
21723 +
21724 +       mutex_lock(&pcf->lock);
21725 +
21726 +       tmp = __reg_read(pcf, reg);
21727 +       tmp &= ~mask;
21728 +       tmp |= val;
21729 +       ret = __reg_write(pcf, reg, tmp);
21730 +
21731 +       mutex_unlock(&pcf->lock);
21732 +
21733 +       return ret;
21734 +}
21735 +
21736 +static int reg_clear_bits(struct pcf50606_data *pcf, u_int8_t reg, u_int8_t val)
21737 +{
21738 +       int ret;
21739 +       u_int8_t tmp;
21740 +
21741 +       mutex_lock(&pcf->lock);
21742 +
21743 +       tmp = __reg_read(pcf, reg);
21744 +       tmp &= ~val;
21745 +       ret = __reg_write(pcf, reg, tmp);
21746 +
21747 +       mutex_unlock(&pcf->lock);
21748 +
21749 +       return ret;
21750 +}
21751 +
21752 +/* synchronously read one ADC channel (busy-wait for result to be complete) */
21753 +static u_int16_t adc_read(struct pcf50606_data *pcf,  int channel,
21754 +                         u_int16_t *data2)
21755 +{
21756 +       u_int8_t adcs2, adcs1;
21757 +       u_int16_t ret;
21758 +
21759 +       dev_dbg(&pcf->client.dev, "entering (pcf=%p, channel=%u, data2=%p)\n",
21760 +               pcf, channel, data2);
21761 +
21762 +       channel &= PCF50606_ADCC2_ADCMUX_MASK;
21763 +
21764 +       mutex_lock(&pcf->lock);
21765 +
21766 +       /* start ADC conversion of selected channel */
21767 +       __reg_write(pcf, PCF50606_REG_ADCC2, channel |
21768 +                   PCF50606_ADCC2_ADCSTART | PCF50606_ADCC2_RES_10BIT);
21769 +
21770 +       do {
21771 +               adcs2 = __reg_read(pcf, PCF50606_REG_ADCS2);
21772 +       } while (!(adcs2 & PCF50606_ADCS2_ADCRDY));
21773 +
21774 +       adcs1 = __reg_read(pcf, PCF50606_REG_ADCS1);
21775 +       ret = (adcs1 << 2) | (adcs2 & 0x03);
21776 +
21777 +       if (data2) {
21778 +               adcs1 = __reg_read(pcf, PCF50606_REG_ADCS3);
21779 +               *data2 = (adcs1 << 2) | ((adcs2 & 0x0c) >> 2);
21780 +       }
21781 +
21782 +       mutex_unlock(&pcf->lock);
21783 +
21784 +       dev_dbg(&pcf->client.dev, "returning %u %u\n", ret,
21785 +               data2 ? *data2 : 0);
21786 +
21787 +       return ret;
21788 +}
21789 +
21790 +/***********************************************************************
21791 + * Voltage / ADC
21792 + ***********************************************************************/
21793 +
21794 +static u_int8_t dcudc_voltage(unsigned int millivolts)
21795 +{
21796 +       if (millivolts < 900)
21797 +               return 0;
21798 +       if (millivolts > 5500)
21799 +               return 0x1f;
21800 +       if (millivolts <= 3300) {
21801 +               millivolts -= 900;
21802 +               return millivolts/300;
21803 +       }
21804 +       if (millivolts < 4000)
21805 +               return 0x0f;
21806 +       else {
21807 +               millivolts -= 4000;
21808 +               return millivolts/100;
21809 +       }
21810 +}
21811 +
21812 +static unsigned int dcudc_2voltage(u_int8_t bits)
21813 +{
21814 +       bits &= 0x1f;
21815 +       if (bits < 0x08)
21816 +               return 900 + bits * 300;
21817 +       else if (bits < 0x10)
21818 +               return 3300;
21819 +       else
21820 +               return 4000 + bits * 100;
21821 +}
21822 +
21823 +static u_int8_t dcdec_voltage(unsigned int millivolts)
21824 +{
21825 +       if (millivolts < 900)
21826 +               return 0;
21827 +       else if (millivolts > 3300)
21828 +               return 0x0f;
21829 +
21830 +       millivolts -= 900;
21831 +       return millivolts/300;
21832 +}
21833 +
21834 +static unsigned int dcdec_2voltage(u_int8_t bits)
21835 +{
21836 +       bits &= 0x0f;
21837 +       return 900 + bits*300;
21838 +}
21839 +
21840 +static u_int8_t dcdc_voltage(unsigned int millivolts)
21841 +{
21842 +       if (millivolts < 900)
21843 +               return 0;
21844 +       else if (millivolts > 3600)
21845 +               return 0x1f;
21846 +
21847 +       if (millivolts < 1500) {
21848 +               millivolts -= 900;
21849 +               return millivolts/25;
21850 +       } else {
21851 +               millivolts -= 1500;
21852 +               return 0x18 + millivolts/300;
21853 +       }
21854 +}
21855 +
21856 +static unsigned int dcdc_2voltage(u_int8_t bits)
21857 +{
21858 +       bits &= 0x1f;
21859 +       if ((bits & 0x18) == 0x18)
21860 +               return 1500 + ((bits & 0x7) * 300);
21861 +       else
21862 +               return 900 + (bits * 25);
21863 +}
21864 +
21865 +static u_int8_t dx_voltage(unsigned int millivolts)
21866 +{
21867 +       if (millivolts < 900)
21868 +               return 0;
21869 +       else if (millivolts > 3300)
21870 +               return 0x18;
21871 +
21872 +       millivolts -= 900;
21873 +       return millivolts/100;
21874 +}
21875 +
21876 +static unsigned int dx_2voltage(u_int8_t bits)
21877 +{
21878 +       bits &= 0x1f;
21879 +       return 900 + (bits * 100);
21880 +}
21881 +
21882 +static const u_int8_t regulator_registers[__NUM_PCF50606_REGULATORS] = {
21883 +       [PCF50606_REGULATOR_DCD]        = PCF50606_REG_DCDC1,
21884 +       [PCF50606_REGULATOR_DCDE]       = PCF50606_REG_DCDEC1,
21885 +       [PCF50606_REGULATOR_DCUD]       = PCF50606_REG_DCUDC1,
21886 +       [PCF50606_REGULATOR_D1REG]      = PCF50606_REG_D1REGC1,
21887 +       [PCF50606_REGULATOR_D2REG]      = PCF50606_REG_D2REGC1,
21888 +       [PCF50606_REGULATOR_D3REG]      = PCF50606_REG_D3REGC1,
21889 +       [PCF50606_REGULATOR_LPREG]      = PCF50606_REG_LPREGC1,
21890 +       [PCF50606_REGULATOR_IOREG]      = PCF50606_REG_IOREGC,
21891 +};
21892 +
21893 +int pcf50606_onoff_set(struct pcf50606_data *pcf,
21894 +                      enum pcf50606_regulator_id reg, int on)
21895 +{
21896 +       u_int8_t addr;
21897 +
21898 +       if (reg >= __NUM_PCF50606_REGULATORS)
21899 +               return -EINVAL;
21900 +
21901 +       /* IOREG cannot be powered off since it powers the PMU I2C */
21902 +       if (reg == PCF50606_REGULATOR_IOREG)
21903 +               return -EIO;
21904 +
21905 +       addr = regulator_registers[reg];
21906 +
21907 +       if (on == 0)
21908 +               reg_set_bit_mask(pcf, addr, 0xe0, 0x00);
21909 +       else
21910 +               reg_set_bit_mask(pcf, addr, 0xe0, 0xe0);
21911 +
21912 +       return 0;
21913 +}
21914 +EXPORT_SYMBOL_GPL(pcf50606_onoff_set);
21915 +
21916 +int pcf50606_onoff_get(struct pcf50606_data *pcf,
21917 +                      enum pcf50606_regulator_id reg)
21918 +{
21919 +       u_int8_t val, addr;
21920 +
21921 +       if (reg >= __NUM_PCF50606_REGULATORS)
21922 +               return -EINVAL;
21923 +
21924 +       addr = regulator_registers[reg];
21925 +       val = (reg_read(pcf, addr) & 0xe0) >> 5;
21926 +
21927 +       /* PWREN1 = 1, PWREN2 = 1, see table 16 of datasheet */
21928 +       switch (val) {
21929 +       case 0:
21930 +       case 5:
21931 +               return 0;
21932 +       default:
21933 +               return 1;
21934 +       }
21935 +}
21936 +EXPORT_SYMBOL_GPL(pcf50606_onoff_get);
21937 +
21938 +int pcf50606_voltage_set(struct pcf50606_data *pcf,
21939 +                        enum pcf50606_regulator_id reg,
21940 +                        unsigned int millivolts)
21941 +{
21942 +       u_int8_t volt_bits;
21943 +       u_int8_t regnr;
21944 +       int rc;
21945 +
21946 +       dev_dbg(&pcf->client.dev, "pcf=%p, reg=%d, mvolts=%d\n", pcf, reg,
21947 +               millivolts);
21948 +
21949 +       if (reg >= __NUM_PCF50606_REGULATORS)
21950 +               return -EINVAL;
21951 +
21952 +       if (millivolts > pcf->pdata->rails[reg].voltage.max)
21953 +               return -EINVAL;
21954 +
21955 +       switch (reg) {
21956 +       case PCF50606_REGULATOR_DCD:
21957 +               volt_bits = dcdc_voltage(millivolts);
21958 +               rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDC1, 0x1f,
21959 +                                     volt_bits);
21960 +               break;
21961 +       case PCF50606_REGULATOR_DCDE:
21962 +               volt_bits = dcdec_voltage(millivolts);
21963 +               rc = reg_set_bit_mask(pcf, PCF50606_REG_DCDEC1, 0x0f,
21964 +                                     volt_bits);
21965 +               break;
21966 +       case PCF50606_REGULATOR_DCUD:
21967 +               volt_bits = dcudc_voltage(millivolts);
21968 +               rc = reg_set_bit_mask(pcf, PCF50606_REG_DCUDC1, 0x1f,
21969 +                                     volt_bits);
21970 +               break;
21971 +       case PCF50606_REGULATOR_D1REG:
21972 +       case PCF50606_REGULATOR_D2REG:
21973 +       case PCF50606_REGULATOR_D3REG:
21974 +               regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG);
21975 +               volt_bits = dx_voltage(millivolts);
21976 +               rc = reg_set_bit_mask(pcf, regnr, 0x1f, volt_bits);
21977 +               break;
21978 +       case PCF50606_REGULATOR_LPREG:
21979 +               volt_bits = dx_voltage(millivolts);
21980 +               rc = reg_set_bit_mask(pcf, PCF50606_REG_LPREGC1, 0x1f,
21981 +                                     volt_bits);
21982 +               break;
21983 +       case PCF50606_REGULATOR_IOREG:
21984 +               if (millivolts < 1800)
21985 +                       return -EINVAL;
21986 +               volt_bits = dx_voltage(millivolts);
21987 +               rc = reg_set_bit_mask(pcf, PCF50606_REG_IOREGC, 0x1f,
21988 +                                     volt_bits);
21989 +               break;
21990 +       default:
21991 +               return -EINVAL;
21992 +       }
21993 +
21994 +       return rc;
21995 +}
21996 +EXPORT_SYMBOL_GPL(pcf50606_voltage_set);
21997 +
21998 +unsigned int pcf50606_voltage_get(struct pcf50606_data *pcf,
21999 +                        enum pcf50606_regulator_id reg)
22000 +{
22001 +       u_int8_t volt_bits;
22002 +       u_int8_t regnr;
22003 +       unsigned int rc = 0;
22004 +
22005 +       if (reg >= __NUM_PCF50606_REGULATORS)
22006 +               return -EINVAL;
22007 +
22008 +       switch (reg) {
22009 +       case PCF50606_REGULATOR_DCD:
22010 +               volt_bits = reg_read(pcf, PCF50606_REG_DCDC1) & 0x1f;
22011 +               rc = dcdc_2voltage(volt_bits);
22012 +               break;
22013 +       case PCF50606_REGULATOR_DCDE:
22014 +               volt_bits = reg_read(pcf, PCF50606_REG_DCDEC1) & 0x0f;
22015 +               rc = dcdec_2voltage(volt_bits);
22016 +               break;
22017 +       case PCF50606_REGULATOR_DCUD:
22018 +               volt_bits = reg_read(pcf, PCF50606_REG_DCUDC1) & 0x1f;
22019 +               rc = dcudc_2voltage(volt_bits);
22020 +               break;
22021 +       case PCF50606_REGULATOR_D1REG:
22022 +       case PCF50606_REGULATOR_D2REG:
22023 +       case PCF50606_REGULATOR_D3REG:
22024 +               regnr = PCF50606_REG_D1REGC1 + (reg - PCF50606_REGULATOR_D1REG);
22025 +               volt_bits = reg_read(pcf, regnr) & 0x1f;
22026 +               if (volt_bits > 0x18)
22027 +                       volt_bits = 0x18;
22028 +               rc = dx_2voltage(volt_bits);
22029 +               break;
22030 +       case PCF50606_REGULATOR_LPREG:
22031 +               volt_bits = reg_read(pcf, PCF50606_REG_LPREGC1) & 0x1f;
22032 +               if (volt_bits > 0x18)
22033 +                       volt_bits = 0x18;
22034 +               rc = dx_2voltage(volt_bits);
22035 +               break;
22036 +       case PCF50606_REGULATOR_IOREG:
22037 +               volt_bits = reg_read(pcf, PCF50606_REG_IOREGC) & 0x1f;
22038 +               if (volt_bits > 0x18)
22039 +                       volt_bits = 0x18;
22040 +               rc = dx_2voltage(volt_bits);
22041 +               break;
22042 +       default:
22043 +               return -EINVAL;
22044 +       }
22045 +
22046 +       return rc;
22047 +}
22048 +EXPORT_SYMBOL_GPL(pcf50606_voltage_get);
22049 +
22050 +/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */
22051 +void pcf50606_go_standby(void)
22052 +{
22053 +       reg_write(pcf50606_global, PCF50606_REG_OOCC1,
22054 +                 PCF50606_OOCC1_GOSTDBY);
22055 +}
22056 +EXPORT_SYMBOL_GPL(pcf50606_go_standby);
22057 +
22058 +void pcf50606_gpo0_set(struct pcf50606_data *pcf, int on)
22059 +{
22060 +       u_int8_t val;
22061 +
22062 +       if (on)
22063 +               val = 0x07;
22064 +       else
22065 +               val = 0x0f;
22066 +
22067 +       reg_set_bit_mask(pcf, PCF50606_REG_GPOC1, 0x0f, val);
22068 +}
22069 +EXPORT_SYMBOL_GPL(pcf50606_gpo0_set);
22070 +
22071 +int pcf50606_gpo0_get(struct pcf50606_data *pcf)
22072 +{
22073 +       u_int8_t reg = reg_read(pcf, PCF50606_REG_GPOC1) & 0x0f;
22074 +
22075 +       if (reg == 0x07 || reg == 0x08)
22076 +               return 1;
22077 +
22078 +       return 0;
22079 +}
22080 +EXPORT_SYMBOL_GPL(pcf50606_gpo0_get);
22081 +
22082 +static void pcf50606_work(struct work_struct *work)
22083 +{
22084 +       struct pcf50606_data *pcf =
22085 +                       container_of(work, struct pcf50606_data, work);
22086 +       u_int8_t pcfirq[3];
22087 +       int ret;
22088 +
22089 +       mutex_lock(&pcf->working_lock);
22090 +       pcf->working = 1;
22091 +
22092 +       /* sanity */
22093 +       if (!&pcf->client.dev)
22094 +               goto bail;
22095 +
22096 +       /*
22097 +        * if we are presently suspending, we are not in a position to deal
22098 +        * with pcf50606 interrupts at all.
22099 +        *
22100 +        * Because we didn't clear the int pending registers, there will be
22101 +        * no edge / interrupt waiting for us when we wake.  But it is OK
22102 +        * because at the end of our resume, we call this workqueue function
22103 +        * gratuitously, clearing the pending register and re-enabling
22104 +        * servicing this interrupt.
22105 +        */
22106 +
22107 +       if ((pcf->suspend_state == PCF50606_SS_STARTING_SUSPEND) ||
22108 +           (pcf->suspend_state == PCF50606_SS_COMPLETED_SUSPEND))
22109 +               goto bail;
22110 +
22111 +       /*
22112 +        * If we are inside suspend -> resume completion time we don't attempt
22113 +        * service until we have fully resumed.  Although we could talk to the
22114 +        * device as soon as I2C is up, the regs in the device which we might
22115 +        * choose to modify as part of the service action have not been
22116 +        * reloaded with their pre-suspend states yet.  Therefore we will
22117 +        * defer our service if we are called like that until our resume has
22118 +        * completed.
22119 +        *
22120 +        * This shouldn't happen any more because we disable servicing this
22121 +        * interrupt in suspend and don't re-enable it until resume is
22122 +        * completed.
22123 +        */
22124 +
22125 +       if (pcf->suspend_state &&
22126 +               (pcf->suspend_state != PCF50606_SS_COMPLETED_RESUME))
22127 +               goto reschedule;
22128 +
22129 +       /* this is the case early in resume! Sanity check! */
22130 +       if (i2c_get_clientdata(&pcf->client) == NULL)
22131 +               goto reschedule;
22132 +
22133 +       /*
22134 +        * p35 pcf50606 datasheet rev 2.2:
22135 +        * ''The system controller shall read all interrupt registers in
22136 +        *   one I2C read action''
22137 +        * because if you don't INT# gets stuck asserted forever after a
22138 +        * while
22139 +        */
22140 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client, PCF50606_REG_INT1,
22141 +                                           sizeof(pcfirq), pcfirq);
22142 +       if (ret != sizeof(pcfirq)) {
22143 +               DEBUGPC("Oh crap PMU IRQ register read failed %d\n", ret);
22144 +               /*
22145 +                * it shouldn't fail, we no longer attempt to use
22146 +                * I2C while it can be suspended.  But we don't have
22147 +                * much option but to retry if if it ever did fail,
22148 +                * because if we don't service the interrupt to clear
22149 +                * it, we will never see another PMU interrupt edge.
22150 +                */
22151 +               goto reschedule;
22152 +       }
22153 +
22154 +       /* hey did we just resume? (because we don't get here unless we are
22155 +        * running normally or the first call after resumption)
22156 +        *
22157 +        * pcf50606 resume is really really over now then.
22158 +        */
22159 +       if (pcf->suspend_state != PCF50606_SS_RUNNING) {
22160 +               pcf->suspend_state = PCF50606_SS_RUNNING;
22161 +
22162 +               /* peek at the IRQ reason, if power button then set a flag
22163 +                * so that we do not signal the event to userspace
22164 +                */
22165 +               if (pcfirq[0] & (PCF50606_INT1_ONKEYF | PCF50606_INT1_ONKEYR)) {
22166 +                       pcf->suppress_onkey_events = 1;
22167 +                       dev_dbg(&pcf->client.dev,
22168 +                               "Wake by ONKEY, suppressing ONKEY events");
22169 +               } else {
22170 +                       pcf->suppress_onkey_events = 0;
22171 +               }
22172 +       }
22173 +
22174 +       if (!pcf->coldplug_done) {
22175 +               DEBUGPC("PMU Coldplug init\n");
22176 +
22177 +               /* we used SECOND to kick ourselves started -- turn it off */
22178 +               pcfirq[0] &= ~PCF50606_INT1_SECOND;
22179 +               reg_set_bit_mask(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND,
22180 +                                PCF50606_INT1_SECOND);
22181 +
22182 +               /* coldplug the USB if present */
22183 +               if (__reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) {
22184 +                       /* Charger inserted */
22185 +                       DEBUGPC("COLD CHGINS ");
22186 +                       input_report_key(pcf->input_dev, KEY_BATTERY, 1);
22187 +                       apm_queue_event(APM_POWER_STATUS_CHANGE);
22188 +                       pcf->flags |= PCF50606_F_CHG_PRESENT;
22189 +                       if (pcf->pdata->cb)
22190 +                               pcf->pdata->cb(&pcf->client.dev,
22191 +                                               PCF50606_FEAT_MBC,
22192 +                                               PMU_EVT_INSERT);
22193 +               }
22194 +
22195 +               pcf->coldplug_done = 1;
22196 +       }
22197 +
22198 +
22199 +       dev_dbg(&pcf->client.dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x:",
22200 +               pcfirq[0], pcfirq[1], pcfirq[2]);
22201 +
22202 +       if (pcfirq[0] & PCF50606_INT1_ONKEYF) {
22203 +               /* ONKEY falling edge (start of button press) */
22204 +               pcf->flags |= PCF50606_F_PWR_PRESSED;
22205 +               if (!pcf->suppress_onkey_events) {
22206 +                       DEBUGPC("ONKEYF ");
22207 +                       input_report_key(pcf->input_dev, KEY_POWER, 1);
22208 +               } else {
22209 +                       DEBUGPC("ONKEYF(unreported) ");
22210 +               }
22211 +       }
22212 +       if (pcfirq[0] & PCF50606_INT1_ONKEY1S) {
22213 +               /* ONKEY pressed for more than 1 second */
22214 +               pcf->onkey_seconds = 0;
22215 +               DEBUGPC("ONKEY1S ");
22216 +               /* Tell PMU we are taking care of this */
22217 +               reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
22218 +                                PCF50606_OOCC1_TOTRST,
22219 +                                PCF50606_OOCC1_TOTRST);
22220 +               /* enable SECOND interrupt (hz tick) */
22221 +               reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND);
22222 +       }
22223 +       if (pcfirq[0] & PCF50606_INT1_ONKEYR) {
22224 +               /* ONKEY rising edge (end of button press) */
22225 +               pcf->flags &= ~PCF50606_F_PWR_PRESSED;
22226 +               pcf->onkey_seconds = -1;
22227 +               if (!pcf->suppress_onkey_events) {
22228 +                       DEBUGPC("ONKEYR ");
22229 +                       input_report_key(pcf->input_dev, KEY_POWER, 0);
22230 +               } else {
22231 +                       DEBUGPC("ONKEYR(suppressed) ");
22232 +                       /* don't suppress any more power button events */
22233 +                       pcf->suppress_onkey_events = 0;
22234 +               }
22235 +               /* disable SECOND interrupt in case RTC didn't
22236 +                * request it */
22237 +               if (!(pcf->flags & PCF50606_F_RTC_SECOND))
22238 +                       reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
22239 +                                        PCF50606_INT1_SECOND,
22240 +                                        PCF50606_INT1_SECOND);
22241 +       }
22242 +       if (pcfirq[0] & PCF50606_INT1_EXTONR) {
22243 +               DEBUGPC("EXTONR ");
22244 +               input_report_key(pcf->input_dev, KEY_POWER2, 1);
22245 +       }
22246 +       if (pcfirq[0] & PCF50606_INT1_EXTONF) {
22247 +               DEBUGPC("EXTONF ");
22248 +               input_report_key(pcf->input_dev, KEY_POWER2, 0);
22249 +       }
22250 +       if (pcfirq[0] & PCF50606_INT1_SECOND) {
22251 +               DEBUGPC("SECOND ");
22252 +               if (pcf->flags & PCF50606_F_RTC_SECOND)
22253 +                       rtc_update_irq(pcf->rtc, 1,
22254 +                                      RTC_PF | RTC_IRQF);
22255 +
22256 +               if (pcf->onkey_seconds >= 0 &&
22257 +                   pcf->flags & PCF50606_F_PWR_PRESSED) {
22258 +                       DEBUGPC("ONKEY_SECONDS(%u, OOCC1=0x%02x) ",
22259 +                               pcf->onkey_seconds,
22260 +                               reg_read(pcf, PCF50606_REG_OOCC1));
22261 +                       pcf->onkey_seconds++;
22262 +                       if (pcf->onkey_seconds >=
22263 +                           pcf->pdata->onkey_seconds_required) {
22264 +                               /* Ask init to do 'ctrlaltdel' */
22265 +                               /*
22266 +                                * currently Linux reacts badly to issuing a
22267 +                                * signal to PID #1 before init is started.
22268 +                                * What happens is that the next kernel thread
22269 +                                * to start, which is the JFFS2 Garbage
22270 +                                * collector in our case, gets the signal
22271 +                                * instead and proceeds to fail to fork --
22272 +                                * which is very bad.  Therefore we confirm
22273 +                                * PID #1 exists before issuing the signal
22274 +                                */
22275 +                               if (find_task_by_pid(1)) {
22276 +                                       kill_proc(1, SIGINT, 1);
22277 +                                       DEBUGPC("SIGINT(init) ");
22278 +                               }
22279 +                               /* FIXME: what to do if userspace doesn't
22280 +                                * shut down? Do we want to force it? */
22281 +                       }
22282 +               }
22283 +       }
22284 +       if (pcfirq[0] & PCF50606_INT1_ALARM) {
22285 +               DEBUGPC("ALARM ");
22286 +               if (pcf->pdata->used_features & PCF50606_FEAT_RTC)
22287 +                       rtc_update_irq(pcf->rtc, 1,
22288 +                                      RTC_AF | RTC_IRQF);
22289 +       }
22290 +
22291 +       if (pcfirq[1] & PCF50606_INT2_CHGINS) {
22292 +               /* Charger inserted */
22293 +               DEBUGPC("CHGINS ");
22294 +               input_report_key(pcf->input_dev, KEY_BATTERY, 1);
22295 +               apm_queue_event(APM_POWER_STATUS_CHANGE);
22296 +               pcf->flags |= PCF50606_F_CHG_PRESENT;
22297 +               if (pcf->pdata->cb)
22298 +                       pcf->pdata->cb(&pcf->client.dev,
22299 +                                      PCF50606_FEAT_MBC, PMU_EVT_INSERT);
22300 +               /* FIXME: how to signal this to userspace */
22301 +       }
22302 +       if (pcfirq[1] & PCF50606_INT2_CHGRM) {
22303 +               /* Charger removed */
22304 +               DEBUGPC("CHGRM ");
22305 +               input_report_key(pcf->input_dev, KEY_BATTERY, 0);
22306 +               apm_queue_event(APM_POWER_STATUS_CHANGE);
22307 +               pcf->flags &= ~(PCF50606_F_CHG_MASK|PCF50606_F_CHG_PRESENT);
22308 +               if (pcf->pdata->cb)
22309 +                       pcf->pdata->cb(&pcf->client.dev,
22310 +                                      PCF50606_FEAT_MBC, PMU_EVT_INSERT);
22311 +               /* FIXME: how signal this to userspace */
22312 +       }
22313 +       if (pcfirq[1] & PCF50606_INT2_CHGFOK) {
22314 +               /* Battery ready for fast charging */
22315 +               DEBUGPC("CHGFOK ");
22316 +               pcf->flags |= PCF50606_F_CHG_FOK;
22317 +               /* FIXME: how to signal this to userspace */
22318 +       }
22319 +       if (pcfirq[1] & PCF50606_INT2_CHGERR) {
22320 +               /* Error in charge mode */
22321 +               DEBUGPC("CHGERR ");
22322 +               pcf->flags |= PCF50606_F_CHG_ERR;
22323 +               pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY);
22324 +               /* FIXME: how to signal this to userspace */
22325 +       }
22326 +       if (pcfirq[1] & PCF50606_INT2_CHGFRDY) {
22327 +               /* Fast charge completed */
22328 +               DEBUGPC("CHGFRDY ");
22329 +               pcf->flags |= PCF50606_F_CHG_READY;
22330 +               pcf->flags &= ~PCF50606_F_CHG_FOK;
22331 +               /* FIXME: how to signal this to userspace */
22332 +       }
22333 +       if (pcfirq[1] & PCF50606_INT2_CHGPROT) {
22334 +               /* Charging protection interrupt */
22335 +               DEBUGPC("CHGPROT ");
22336 +               pcf->flags &= ~(PCF50606_F_CHG_FOK|PCF50606_F_CHG_READY);
22337 +               /* FIXME: signal this to userspace */
22338 +       }
22339 +       if (pcfirq[1] & PCF50606_INT2_CHGWD10S) {
22340 +               /* Charger watchdog will expire in 10 seconds */
22341 +               DEBUGPC("CHGWD10S ");
22342 +               reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
22343 +                                PCF50606_OOCC1_WDTRST,
22344 +                                PCF50606_OOCC1_WDTRST);
22345 +       }
22346 +       if (pcfirq[1] & PCF50606_INT2_CHGWDEXP) {
22347 +               /* Charger watchdog expires */
22348 +               DEBUGPC("CHGWDEXP ");
22349 +               /* FIXME: how to signal this to userspace */
22350 +       }
22351 +
22352 +       if (pcfirq[2] & PCF50606_INT3_ADCRDY) {
22353 +               /* ADC result ready */
22354 +               DEBUGPC("ADCRDY ");
22355 +       }
22356 +       if (pcfirq[2] & PCF50606_INT3_ACDINS) {
22357 +               /* Accessory insertion detected */
22358 +               DEBUGPC("ACDINS ");
22359 +               if (pcf->pdata->cb)
22360 +                       pcf->pdata->cb(&pcf->client.dev,
22361 +                                      PCF50606_FEAT_ACD, PMU_EVT_INSERT);
22362 +       }
22363 +       if (pcfirq[2] & PCF50606_INT3_ACDREM) {
22364 +               /* Accessory removal detected */
22365 +               DEBUGPC("ACDREM ");
22366 +               if (pcf->pdata->cb)
22367 +                       pcf->pdata->cb(&pcf->client.dev,
22368 +                                      PCF50606_FEAT_ACD, PMU_EVT_REMOVE);
22369 +       }
22370 +       /* FIXME: TSCPRES */
22371 +       if (pcfirq[2] & PCF50606_INT3_LOWBAT) {
22372 +               if (__reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON) {
22373 +                       /*
22374 +                        * hey no need to freak out, we have some kind of
22375 +                        * valid charger power
22376 +                        */
22377 +                       DEBUGPC("(NO)BAT ");
22378 +               } else {
22379 +                       /* Really low battery voltage, we have 8 seconds left */
22380 +                       DEBUGPC("LOWBAT ");
22381 +                       /*
22382 +                        * currently Linux reacts badly to issuing a signal to
22383 +                        * PID #1 before init is started.  What happens is that
22384 +                        * the next kernel thread to start, which is the JFFS2
22385 +                        * Garbage collector in our case, gets the signal
22386 +                        * instead and proceeds to fail to fork -- which is
22387 +                        * very bad.  Therefore we confirm PID #1 exists
22388 +                        * before issuing SPIGPWR
22389 +                        */
22390 +                       if (find_task_by_pid(1)) {
22391 +                               apm_queue_event(APM_LOW_BATTERY);
22392 +                               DEBUGPC("SIGPWR(init) ");
22393 +                               kill_proc(1, SIGPWR, 1);
22394 +                       } else
22395 +                               /*
22396 +                                * well, our situation is like this:  we do not
22397 +                                * have any external power, we have a low
22398 +                                * battery and since PID #1 doesn't exist yet,
22399 +                                * we are early in the boot, likely before
22400 +                                * rootfs mount.  We should just call it a day
22401 +                                */
22402 +                               apm_queue_event(APM_CRITICAL_SUSPEND);
22403 +               }
22404 +               /* Tell PMU we are taking care of this */
22405 +               reg_set_bit_mask(pcf, PCF50606_REG_OOCC1,
22406 +                                PCF50606_OOCC1_TOTRST,
22407 +                                PCF50606_OOCC1_TOTRST);
22408 +       }
22409 +       if (pcfirq[2] & PCF50606_INT3_HIGHTMP) {
22410 +               /* High temperature */
22411 +               DEBUGPC("HIGHTMP ");
22412 +               apm_queue_event(APM_CRITICAL_SUSPEND);
22413 +       }
22414 +
22415 +       DEBUGPC("\n");
22416 +
22417 +bail:
22418 +       pcf->working = 0;
22419 +       input_sync(pcf->input_dev);
22420 +       put_device(&pcf->client.dev);
22421 +       mutex_unlock(&pcf->working_lock);
22422 +
22423 +       return;
22424 +
22425 +reschedule:
22426 +
22427 +       if ((pcf->suspend_state != PCF50606_SS_STARTING_SUSPEND) &&
22428 +           (pcf->suspend_state != PCF50606_SS_COMPLETED_SUSPEND)) {
22429 +               msleep(10);
22430 +               dev_info(&pcf->client.dev, "rescheduling interrupt service\n");
22431 +       }
22432 +       if (!schedule_work(&pcf->work))
22433 +               dev_err(&pcf->client.dev, "int service reschedule failed\n");
22434 +
22435 +       /* we don't put the device here, hold it for next time */
22436 +       mutex_unlock(&pcf->working_lock);
22437 +}
22438 +
22439 +static irqreturn_t pcf50606_irq(int irq, void *_pcf)
22440 +{
22441 +       struct pcf50606_data *pcf = _pcf;
22442 +
22443 +       dev_dbg(&pcf->client.dev, "entering(irq=%u, pcf=%p): scheduling work\n",
22444 +               irq, _pcf);
22445 +       get_device(&pcf->client.dev);
22446 +       if (!schedule_work(&pcf->work) && !pcf->working)
22447 +               dev_err(&pcf->client.dev, "pcf irq work already queued.\n");
22448 +
22449 +       return IRQ_HANDLED;
22450 +}
22451 +
22452 +static u_int16_t adc_to_batt_millivolts(u_int16_t adc)
22453 +{
22454 +       u_int16_t mvolts;
22455 +
22456 +       mvolts = (adc * 6000) / 1024;
22457 +
22458 +       return mvolts;
22459 +}
22460 +
22461 +#define BATTVOLT_SCALE_START 2800
22462 +#define BATTVOLT_SCALE_END 4200
22463 +#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100)
22464 +
22465 +static u_int8_t battvolt_scale(u_int16_t battvolt)
22466 +{
22467 +       /* FIXME: this linear scale is completely bogus */
22468 +       u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START;
22469 +       unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER;
22470 +
22471 +       return percent;
22472 +}
22473 +
22474 +u_int16_t pcf50606_battvolt(struct pcf50606_data *pcf)
22475 +{
22476 +       u_int16_t adc;
22477 +       adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_RES, NULL);
22478 +
22479 +       return adc_to_batt_millivolts(adc);
22480 +}
22481 +EXPORT_SYMBOL_GPL(pcf50606_battvolt);
22482 +
22483 +static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr,
22484 +                            char *buf)
22485 +{
22486 +       struct i2c_client *client = to_i2c_client(dev);
22487 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22488 +
22489 +       return sprintf(buf, "%u\n", pcf50606_battvolt(pcf));
22490 +}
22491 +static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL);
22492 +
22493 +static int reg_id_by_name(const char *name)
22494 +{
22495 +       int reg_id;
22496 +
22497 +       if (!strcmp(name, "voltage_dcd"))
22498 +               reg_id = PCF50606_REGULATOR_DCD;
22499 +       else if (!strcmp(name, "voltage_dcde"))
22500 +               reg_id = PCF50606_REGULATOR_DCDE;
22501 +       else if (!strcmp(name, "voltage_dcud"))
22502 +               reg_id = PCF50606_REGULATOR_DCUD;
22503 +       else if (!strcmp(name, "voltage_d1reg"))
22504 +               reg_id = PCF50606_REGULATOR_D1REG;
22505 +       else if (!strcmp(name, "voltage_d2reg"))
22506 +               reg_id = PCF50606_REGULATOR_D2REG;
22507 +       else if (!strcmp(name, "voltage_d3reg"))
22508 +               reg_id = PCF50606_REGULATOR_D3REG;
22509 +       else if (!strcmp(name, "voltage_lpreg"))
22510 +               reg_id = PCF50606_REGULATOR_LPREG;
22511 +       else if (!strcmp(name, "voltage_ioreg"))
22512 +               reg_id = PCF50606_REGULATOR_IOREG;
22513 +       else
22514 +               reg_id = -1;
22515 +
22516 +       return reg_id;
22517 +}
22518 +
22519 +static ssize_t show_vreg(struct device *dev, struct device_attribute *attr,
22520 +                        char *buf)
22521 +{
22522 +       struct i2c_client *client = to_i2c_client(dev);
22523 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22524 +       unsigned int reg_id;
22525 +
22526 +       reg_id = reg_id_by_name(attr->attr.name);
22527 +       if (reg_id < 0)
22528 +               return 0;
22529 +
22530 +       if (pcf50606_onoff_get(pcf, reg_id) > 0)
22531 +               return sprintf(buf, "%u\n", pcf50606_voltage_get(pcf, reg_id));
22532 +       else
22533 +               return strlcpy(buf, "0\n", PAGE_SIZE);
22534 +}
22535 +
22536 +static ssize_t set_vreg(struct device *dev, struct device_attribute *attr,
22537 +                       const char *buf, size_t count)
22538 +{
22539 +       struct i2c_client *client = to_i2c_client(dev);
22540 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22541 +       unsigned long mvolts = simple_strtoul(buf, NULL, 10);
22542 +       unsigned int reg_id;
22543 +
22544 +       reg_id = reg_id_by_name(attr->attr.name);
22545 +       if (reg_id < 0)
22546 +               return -EIO;
22547 +
22548 +       dev_dbg(dev, "attempting to set %s(%d) to %lu mvolts\n",
22549 +               attr->attr.name, reg_id, mvolts);
22550 +
22551 +       if (mvolts == 0) {
22552 +               pcf50606_onoff_set(pcf, reg_id, 0);
22553 +       } else {
22554 +               if (pcf50606_voltage_set(pcf, reg_id, mvolts) < 0) {
22555 +                       dev_warn(dev, "refusing to set %s(%d) to %lu mvolts "
22556 +                                "(max=%u)\n", attr->attr.name, reg_id, mvolts,
22557 +                                pcf->pdata->rails[reg_id].voltage.max);
22558 +                       return -EINVAL;
22559 +               }
22560 +               pcf50606_onoff_set(pcf, reg_id, 1);
22561 +       }
22562 +
22563 +       return count;
22564 +}
22565 +
22566 +static DEVICE_ATTR(voltage_dcd, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22567 +static DEVICE_ATTR(voltage_dcde, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22568 +static DEVICE_ATTR(voltage_dcud, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22569 +static DEVICE_ATTR(voltage_d1reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22570 +static DEVICE_ATTR(voltage_d2reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22571 +static DEVICE_ATTR(voltage_d3reg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22572 +static DEVICE_ATTR(voltage_lpreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22573 +static DEVICE_ATTR(voltage_ioreg, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
22574 +
22575 +/***********************************************************************
22576 + * Charger Control
22577 + ***********************************************************************/
22578 +
22579 +/* Enable/disable fast charging (500mA in the GTA01) */
22580 +void pcf50606_charge_fast(struct pcf50606_data *pcf, int on)
22581 +{
22582 +       if (!(pcf->pdata->used_features & PCF50606_FEAT_MBC))
22583 +               return;
22584 +
22585 +       if (on) {
22586 +               /* We can allow PCF to automatically charge
22587 +                * using Ifast */
22588 +               pcf->flags |= PCF50606_F_CHG_FAST;
22589 +               reg_set_bit_mask(pcf, PCF50606_REG_MBCC1,
22590 +                                PCF50606_MBCC1_AUTOFST,
22591 +                                PCF50606_MBCC1_AUTOFST);
22592 +       } else {
22593 +               pcf->flags &= ~PCF50606_F_CHG_FAST;
22594 +               /* disable automatic fast-charge */
22595 +               reg_clear_bits(pcf, PCF50606_REG_MBCC1,
22596 +                               PCF50606_MBCC1_AUTOFST);
22597 +               /* switch to idle mode to abort existing charge
22598 +                * process */
22599 +               reg_set_bit_mask(pcf, PCF50606_REG_MBCC1,
22600 +                                PCF50606_MBCC1_CHGMOD_MASK,
22601 +                                PCF50606_MBCC1_CHGMOD_IDLE);
22602 +       }
22603 +}
22604 +EXPORT_SYMBOL_GPL(pcf50606_charge_fast);
22605 +
22606 +static inline u_int16_t adc_to_rntc(struct pcf50606_data *pcf, u_int16_t adc)
22607 +{
22608 +       u_int32_t r_ntc = (adc * (u_int32_t)pcf->pdata->r_fix_batt)
22609 +               / (1023 - adc);
22610 +
22611 +       return r_ntc;
22612 +}
22613 +
22614 +static inline int16_t rntc_to_temp(u_int16_t rntc)
22615 +{
22616 +       int i;
22617 +
22618 +       for (i = 0; i < ARRAY_SIZE(ntc_table_10k_3370B); i++) {
22619 +               if (rntc > ntc_table_10k_3370B[i])
22620 +                       return i - 10;  /* First element is -10 */
22621 +       }
22622 +       return -99;     /* Below our range */
22623 +}
22624 +
22625 +static ssize_t show_battemp(struct device *dev, struct device_attribute *attr,
22626 +                           char *buf)
22627 +{
22628 +       struct i2c_client *client = to_i2c_client(dev);
22629 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22630 +       u_int16_t adc;
22631 +
22632 +       adc = adc_read(pcf, PCF50606_ADCMUX_BATTEMP, NULL);
22633 +
22634 +       return sprintf(buf, "%d\n", rntc_to_temp(adc_to_rntc(pcf, adc)));
22635 +}
22636 +static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL);
22637 +
22638 +static inline int16_t adc_to_chg_milliamps(struct pcf50606_data *pcf,
22639 +                                            u_int16_t adc_adcin1,
22640 +                                            u_int16_t adc_batvolt)
22641 +{
22642 +       int32_t res = (adc_adcin1 - adc_batvolt) * 2400;
22643 +       return (res * 1000) / (pcf->pdata->r_sense_milli * 1024);
22644 +}
22645 +
22646 +static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr,
22647 +                          char *buf)
22648 +{
22649 +       struct i2c_client *client = to_i2c_client(dev);
22650 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22651 +       u_int16_t adc_batvolt, adc_adcin1;
22652 +       int16_t ma;
22653 +
22654 +       adc_batvolt = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_ADCIN1,
22655 +                              &adc_adcin1);
22656 +       ma = adc_to_chg_milliamps(pcf, adc_adcin1, adc_batvolt);
22657 +
22658 +       return sprintf(buf, "%d\n", ma);
22659 +}
22660 +static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL);
22661 +
22662 +static const char *chgmode_names[] = {
22663 +       [PCF50606_MBCC1_CHGMOD_QUAL]            = "qualification",
22664 +       [PCF50606_MBCC1_CHGMOD_PRE]             = "pre",
22665 +       [PCF50606_MBCC1_CHGMOD_TRICKLE]         = "trickle",
22666 +       [PCF50606_MBCC1_CHGMOD_FAST_CCCV]       = "fast_cccv",
22667 +       [PCF50606_MBCC1_CHGMOD_FAST_NOCC]       = "fast_nocc",
22668 +       [PCF50606_MBCC1_CHGMOD_FAST_NOCV]       = "fast_nocv",
22669 +       [PCF50606_MBCC1_CHGMOD_FAST_SW]         = "fast_switch",
22670 +       [PCF50606_MBCC1_CHGMOD_IDLE]            = "idle",
22671 +};
22672 +
22673 +static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr,
22674 +                           char *buf)
22675 +{
22676 +       struct i2c_client *client = to_i2c_client(dev);
22677 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22678 +       u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
22679 +       u_int8_t chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
22680 +
22681 +       return sprintf(buf, "%s\n", chgmode_names[chgmod]);
22682 +}
22683 +
22684 +static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr,
22685 +                          const char *buf, size_t count)
22686 +{
22687 +       struct i2c_client *client = to_i2c_client(dev);
22688 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22689 +       u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
22690 +
22691 +       mbcc1 &= ~PCF50606_MBCC1_CHGMOD_MASK;
22692 +
22693 +       if (!strcmp(buf, "qualification"))
22694 +               mbcc1 |= PCF50606_MBCC1_CHGMOD_QUAL;
22695 +       else if (!strcmp(buf, "pre"))
22696 +               mbcc1 |= PCF50606_MBCC1_CHGMOD_PRE;
22697 +       else if (!strcmp(buf, "trickle"))
22698 +               mbcc1 |= PCF50606_MBCC1_CHGMOD_TRICKLE;
22699 +       else if (!strcmp(buf, "fast_cccv"))
22700 +               mbcc1 |= PCF50606_MBCC1_CHGMOD_FAST_CCCV;
22701 +       /* We don't allow the other fast modes for security reasons */
22702 +       else if (!strcmp(buf, "idle"))
22703 +               mbcc1 |= PCF50606_MBCC1_CHGMOD_IDLE;
22704 +       else
22705 +               return -EINVAL;
22706 +
22707 +       reg_write(pcf, PCF50606_REG_MBCC1, mbcc1);
22708 +
22709 +       return count;
22710 +}
22711 +
22712 +static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode);
22713 +
22714 +static const char *chgstate_names[] = {
22715 +       [PCF50606_B_CHG_FAST]                   = "fast_enabled",
22716 +       [PCF50606_B_CHG_PRESENT]                = "present",
22717 +       [PCF50606_B_CHG_FOK]                    = "fast_ok",
22718 +       [PCF50606_B_CHG_ERR]                    = "error",
22719 +       [PCF50606_B_CHG_PROT]                   = "protection",
22720 +       [PCF50606_B_CHG_READY]                  = "ready",
22721 +};
22722 +
22723 +static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr,
22724 +                           char *buf)
22725 +{
22726 +       struct i2c_client *client = to_i2c_client(dev);
22727 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22728 +       char *b = buf;
22729 +       int i;
22730 +
22731 +       for (i = 0; i < 32; i++)
22732 +               if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names))
22733 +                       b += sprintf(b, "%s ", chgstate_names[i]);
22734 +
22735 +       if (b > buf)
22736 +               b += sprintf(b, "\n");
22737 +
22738 +       return b - buf;
22739 +}
22740 +static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL);
22741 +
22742 +/***********************************************************************
22743 + * APM emulation
22744 + ***********************************************************************/
22745 +
22746 +static void pcf50606_get_power_status(struct apm_power_info *info)
22747 +{
22748 +       struct pcf50606_data *pcf = pcf50606_global;
22749 +       u_int8_t mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
22750 +       u_int8_t chgmod = mbcc1 & PCF50606_MBCC1_CHGMOD_MASK;
22751 +       u_int16_t battvolt = pcf50606_battvolt(pcf);
22752 +
22753 +       if (reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON)
22754 +               info->ac_line_status = APM_AC_ONLINE;
22755 +       else
22756 +               info->ac_line_status = APM_AC_OFFLINE;
22757 +
22758 +       switch (chgmod) {
22759 +       case PCF50606_MBCC1_CHGMOD_QUAL:
22760 +       case PCF50606_MBCC1_CHGMOD_PRE:
22761 +       case PCF50606_MBCC1_CHGMOD_IDLE:
22762 +               info->battery_life = battvolt_scale(battvolt);
22763 +               break;
22764 +       default:
22765 +               info->battery_status = APM_BATTERY_STATUS_CHARGING;
22766 +               info->battery_flag = APM_BATTERY_FLAG_CHARGING;
22767 +               break;
22768 +       }
22769 +}
22770 +
22771 +/***********************************************************************
22772 + * Battery driver interface
22773 + ***********************************************************************/
22774 +static int pcf50606_bat_get_property(struct power_supply *psy,
22775 +                                    enum power_supply_property psp,
22776 +                                    union power_supply_propval *val)
22777 +{
22778 +       u_int16_t adc, adc_adcin1;
22779 +       u_int8_t mbcc1, chgmod;
22780 +       struct pcf50606_data *pcf = pcf50606_global;
22781 +       int ret = 0;
22782 +
22783 +       switch (psp) {
22784 +
22785 +       case POWER_SUPPLY_PROP_STATUS:
22786 +               if (!(reg_read(pcf, PCF50606_REG_OOCS) & PCF50606_OOCS_EXTON)) {
22787 +                       /* No charger, clearly we're discharging then */
22788 +                       val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
22789 +               } else {
22790 +
22791 +                       /* We have a charger present, get charge mode */
22792 +                       mbcc1 = reg_read(pcf, PCF50606_REG_MBCC1);
22793 +                       chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
22794 +                       switch (chgmod) {
22795 +
22796 +                       /* TODO: How to determine POWER_SUPPLY_STATUS_FULL? */
22797 +
22798 +                       case PCF50606_MBCC1_CHGMOD_QUAL:
22799 +                       case PCF50606_MBCC1_CHGMOD_PRE:
22800 +                       case PCF50606_MBCC1_CHGMOD_IDLE:
22801 +                               val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
22802 +                               break;
22803 +
22804 +                       case PCF50606_MBCC1_CHGMOD_TRICKLE:
22805 +                       case PCF50606_MBCC1_CHGMOD_FAST_CCCV:
22806 +                       case PCF50606_MBCC1_CHGMOD_FAST_NOCC:
22807 +                       case PCF50606_MBCC1_CHGMOD_FAST_NOCV:
22808 +                       case PCF50606_MBCC1_CHGMOD_FAST_SW:
22809 +                               val->intval = POWER_SUPPLY_STATUS_CHARGING;
22810 +                               break;
22811 +
22812 +                       default:
22813 +                               val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
22814 +                               break;
22815 +
22816 +                       }
22817 +               }
22818 +
22819 +       case POWER_SUPPLY_PROP_PRESENT:
22820 +               val->intval = 1;   /* Must be, or the magic smoke comes out */
22821 +               break;
22822 +
22823 +       case POWER_SUPPLY_PROP_ONLINE:
22824 +               val->intval = !!(reg_read(pcf, PCF50606_REG_OOCS) &
22825 +                                PCF50606_OOCS_EXTON);
22826 +               break;
22827 +
22828 +       case POWER_SUPPLY_PROP_VOLTAGE_NOW:
22829 +               adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_RES, NULL);
22830 +               /* (adc * 6000000) / 1024 ==  (adc * 46875) / 8 */
22831 +               val->intval = (adc * 46875) / 8;
22832 +               break;
22833 +
22834 +       case POWER_SUPPLY_PROP_CURRENT_NOW:
22835 +               adc = adc_read(pcf, PCF50606_ADCMUX_BATVOLT_ADCIN1,
22836 +                              &adc_adcin1);
22837 +               val->intval = adc_to_chg_milliamps(pcf, adc_adcin1, adc) * 1000;
22838 +               break;
22839 +
22840 +       case POWER_SUPPLY_PROP_TEMP:
22841 +               adc = adc_read(pcf, PCF50606_ADCMUX_BATTEMP, NULL);
22842 +               val->intval = rntc_to_temp(adc_to_rntc(pcf, adc)) * 10;
22843 +               break;
22844 +
22845 +       case POWER_SUPPLY_PROP_CAPACITY:
22846 +               val->intval = battvolt_scale(pcf50606_battvolt(pcf));
22847 +               break;
22848 +
22849 +       default:
22850 +               ret = -EINVAL;
22851 +               break;
22852 +       }
22853 +
22854 +       return ret;
22855 +}
22856 +
22857 +/***********************************************************************
22858 + * RTC
22859 + ***********************************************************************/
22860 +
22861 +struct pcf50606_time {
22862 +       u_int8_t sec;
22863 +       u_int8_t min;
22864 +       u_int8_t hour;
22865 +       u_int8_t wkday;
22866 +       u_int8_t day;
22867 +       u_int8_t month;
22868 +       u_int8_t year;
22869 +};
22870 +
22871 +static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50606_time *pcf)
22872 +{
22873 +       rtc->tm_sec = BCD2BIN(pcf->sec);
22874 +       rtc->tm_min = BCD2BIN(pcf->min);
22875 +       rtc->tm_hour = BCD2BIN(pcf->hour);
22876 +       rtc->tm_wday = BCD2BIN(pcf->wkday);
22877 +       rtc->tm_mday = BCD2BIN(pcf->day);
22878 +       rtc->tm_mon = BCD2BIN(pcf->month);
22879 +       rtc->tm_year = BCD2BIN(pcf->year) + 100;
22880 +}
22881 +
22882 +static void rtc2pcf_time(struct pcf50606_time *pcf, struct rtc_time *rtc)
22883 +{
22884 +       pcf->sec = BIN2BCD(rtc->tm_sec);
22885 +       pcf->min = BIN2BCD(rtc->tm_min);
22886 +       pcf->hour = BIN2BCD(rtc->tm_hour);
22887 +       pcf->wkday = BIN2BCD(rtc->tm_wday);
22888 +       pcf->day = BIN2BCD(rtc->tm_mday);
22889 +       pcf->month = BIN2BCD(rtc->tm_mon);
22890 +       pcf->year = BIN2BCD(rtc->tm_year - 100);
22891 +}
22892 +
22893 +static int pcf50606_rtc_ioctl(struct device *dev, unsigned int cmd,
22894 +                             unsigned long arg)
22895 +{
22896 +       struct i2c_client *client = to_i2c_client(dev);
22897 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22898 +
22899 +       switch (cmd) {
22900 +       case RTC_AIE_OFF:
22901 +               /* disable the alarm interrupt */
22902 +               reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
22903 +                                PCF50606_INT1_ALARM, PCF50606_INT1_ALARM);
22904 +               return 0;
22905 +       case RTC_AIE_ON:
22906 +               /* enable the alarm interrupt */
22907 +               reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_ALARM);
22908 +               return 0;
22909 +       case RTC_PIE_OFF:
22910 +               /* disable periodic interrupt (hz tick) */
22911 +               pcf->flags &= ~PCF50606_F_RTC_SECOND;
22912 +               reg_set_bit_mask(pcf, PCF50606_REG_INT1M,
22913 +                                PCF50606_INT1_SECOND, PCF50606_INT1_SECOND);
22914 +               return 0;
22915 +       case RTC_PIE_ON:
22916 +               /* ensable periodic interrupt (hz tick) */
22917 +               pcf->flags |= PCF50606_F_RTC_SECOND;
22918 +               reg_clear_bits(pcf, PCF50606_REG_INT1M, PCF50606_INT1_SECOND);
22919 +               return 0;
22920 +       }
22921 +       return -ENOIOCTLCMD;
22922 +}
22923 +
22924 +static int pcf50606_rtc_read_time(struct device *dev, struct rtc_time *tm)
22925 +{
22926 +       struct i2c_client *client = to_i2c_client(dev);
22927 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22928 +       struct pcf50606_time pcf_tm;
22929 +
22930 +       mutex_lock(&pcf->lock);
22931 +       pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSC);
22932 +       pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMN);
22933 +       pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHR);
22934 +       pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWD);
22935 +       pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDT);
22936 +       pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMT);
22937 +       pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYR);
22938 +       mutex_unlock(&pcf->lock);
22939 +
22940 +       dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
22941 +               pcf_tm.day, pcf_tm.month, pcf_tm.year,
22942 +               pcf_tm.hour, pcf_tm.min, pcf_tm.sec);
22943 +
22944 +       pcf2rtc_time(tm, &pcf_tm);
22945 +
22946 +       dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
22947 +               tm->tm_mday, tm->tm_mon, tm->tm_year,
22948 +               tm->tm_hour, tm->tm_min, tm->tm_sec);
22949 +
22950 +       return 0;
22951 +}
22952 +
22953 +static int pcf50606_rtc_set_time(struct device *dev, struct rtc_time *tm)
22954 +{
22955 +       struct i2c_client *client = to_i2c_client(dev);
22956 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22957 +       struct pcf50606_time pcf_tm;
22958 +       u_int8_t int1m;
22959 +
22960 +       dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
22961 +               tm->tm_mday, tm->tm_mon, tm->tm_year,
22962 +               tm->tm_hour, tm->tm_min, tm->tm_sec);
22963 +       rtc2pcf_time(&pcf_tm, tm);
22964 +       dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
22965 +               pcf_tm.day, pcf_tm.month, pcf_tm.year,
22966 +               pcf_tm.hour, pcf_tm.min, pcf_tm.sec);
22967 +
22968 +       mutex_lock(&pcf->lock);
22969 +
22970 +       /* disable SECOND interrupt */
22971 +       int1m = __reg_read(pcf, PCF50606_REG_INT1M);
22972 +       __reg_write(pcf, PCF50606_REG_INT1M, int1m | PCF50606_INT1_SECOND);
22973 +
22974 +       __reg_write(pcf, PCF50606_REG_RTCSC, pcf_tm.sec);
22975 +       __reg_write(pcf, PCF50606_REG_RTCMN, pcf_tm.min);
22976 +       __reg_write(pcf, PCF50606_REG_RTCHR, pcf_tm.hour);
22977 +       __reg_write(pcf, PCF50606_REG_RTCWD, pcf_tm.wkday);
22978 +       __reg_write(pcf, PCF50606_REG_RTCDT, pcf_tm.day);
22979 +       __reg_write(pcf, PCF50606_REG_RTCMT, pcf_tm.month);
22980 +       __reg_write(pcf, PCF50606_REG_RTCYR, pcf_tm.year);
22981 +
22982 +       /* restore INT1M, potentially re-enable SECOND interrupt */
22983 +       __reg_write(pcf, PCF50606_REG_INT1M, int1m);
22984 +
22985 +       mutex_unlock(&pcf->lock);
22986 +
22987 +       return 0;
22988 +}
22989 +
22990 +static int pcf50606_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
22991 +{
22992 +       struct i2c_client *client = to_i2c_client(dev);
22993 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
22994 +       struct pcf50606_time pcf_tm;
22995 +
22996 +       mutex_lock(&pcf->lock);
22997 +       alrm->enabled =
22998 +               __reg_read(pcf, PCF50606_REG_INT1M) & PCF50606_INT1_ALARM
22999 +               ? 0 : 1;
23000 +       pcf_tm.sec = __reg_read(pcf, PCF50606_REG_RTCSCA);
23001 +       pcf_tm.min = __reg_read(pcf, PCF50606_REG_RTCMNA);
23002 +       pcf_tm.hour = __reg_read(pcf, PCF50606_REG_RTCHRA);
23003 +       pcf_tm.wkday = __reg_read(pcf, PCF50606_REG_RTCWDA);
23004 +       pcf_tm.day = __reg_read(pcf, PCF50606_REG_RTCDTA);
23005 +       pcf_tm.month = __reg_read(pcf, PCF50606_REG_RTCMTA);
23006 +       pcf_tm.year = __reg_read(pcf, PCF50606_REG_RTCYRA);
23007 +       mutex_unlock(&pcf->lock);
23008 +
23009 +       pcf2rtc_time(&alrm->time, &pcf_tm);
23010 +
23011 +       return 0;
23012 +}
23013 +
23014 +static int pcf50606_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
23015 +{
23016 +       struct i2c_client *client = to_i2c_client(dev);
23017 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23018 +       struct pcf50606_time pcf_tm;
23019 +       u_int8_t irqmask;
23020 +
23021 +       rtc2pcf_time(&pcf_tm, &alrm->time);
23022 +
23023 +       mutex_lock(&pcf->lock);
23024 +
23025 +       /* disable alarm interrupt */
23026 +       irqmask = __reg_read(pcf, PCF50606_REG_INT1M);
23027 +       irqmask |= PCF50606_INT1_ALARM;
23028 +       __reg_write(pcf, PCF50606_REG_INT1M, irqmask);
23029 +
23030 +       __reg_write(pcf, PCF50606_REG_RTCSCA, pcf_tm.sec);
23031 +       __reg_write(pcf, PCF50606_REG_RTCMNA, pcf_tm.min);
23032 +       __reg_write(pcf, PCF50606_REG_RTCHRA, pcf_tm.hour);
23033 +       __reg_write(pcf, PCF50606_REG_RTCWDA, pcf_tm.wkday);
23034 +       __reg_write(pcf, PCF50606_REG_RTCDTA, pcf_tm.day);
23035 +       __reg_write(pcf, PCF50606_REG_RTCMTA, pcf_tm.month);
23036 +       __reg_write(pcf, PCF50606_REG_RTCYRA, pcf_tm.year);
23037 +
23038 +       if (alrm->enabled) {
23039 +               /* (re-)enaable alarm interrupt */
23040 +               irqmask = __reg_read(pcf, PCF50606_REG_INT1M);
23041 +               irqmask &= ~PCF50606_INT1_ALARM;
23042 +               __reg_write(pcf, PCF50606_REG_INT1M, irqmask);
23043 +       }
23044 +
23045 +       mutex_unlock(&pcf->lock);
23046 +
23047 +       /* FIXME */
23048 +       return 0;
23049 +}
23050 +
23051 +static struct rtc_class_ops pcf50606_rtc_ops = {
23052 +       .ioctl          = pcf50606_rtc_ioctl,
23053 +       .read_time      = pcf50606_rtc_read_time,
23054 +       .set_time       = pcf50606_rtc_set_time,
23055 +       .read_alarm     = pcf50606_rtc_read_alarm,
23056 +       .set_alarm      = pcf50606_rtc_set_alarm,
23057 +};
23058 +
23059 +/***********************************************************************
23060 + * Watchdog
23061 + ***********************************************************************/
23062 +
23063 +static void pcf50606_wdt_start(struct pcf50606_data *pcf)
23064 +{
23065 +       reg_set_bit_mask(pcf, PCF50606_REG_OOCC1, PCF50606_OOCC1_WDTRST,
23066 +                        PCF50606_OOCC1_WDTRST);
23067 +}
23068 +
23069 +static void pcf50606_wdt_stop(struct pcf50606_data *pcf)
23070 +{
23071 +       reg_clear_bits(pcf, PCF50606_REG_OOCS, PCF50606_OOCS_WDTEXP);
23072 +}
23073 +
23074 +static void pcf50606_wdt_keepalive(struct pcf50606_data *pcf)
23075 +{
23076 +       pcf50606_wdt_start(pcf);
23077 +}
23078 +
23079 +static int pcf50606_wdt_open(struct inode *inode, struct file *file)
23080 +{
23081 +       struct pcf50606_data *pcf = pcf50606_global;
23082 +
23083 +       file->private_data = pcf;
23084 +
23085 +       /* start the timer */
23086 +       pcf50606_wdt_start(pcf);
23087 +
23088 +       return nonseekable_open(inode, file);
23089 +}
23090 +
23091 +static int pcf50606_wdt_release(struct inode *inode, struct file *file)
23092 +{
23093 +       struct pcf50606_data *pcf = file->private_data;
23094 +
23095 +       if (pcf->allow_close == CLOSE_STATE_ALLOW)
23096 +               pcf50606_wdt_stop(pcf);
23097 +       else {
23098 +               printk(KERN_CRIT "Unexpected close, not stopping watchdog!\n");
23099 +               pcf50606_wdt_keepalive(pcf);
23100 +       }
23101 +
23102 +       pcf->allow_close = CLOSE_STATE_NOT;
23103 +
23104 +       return 0;
23105 +}
23106 +
23107 +static ssize_t pcf50606_wdt_write(struct file *file, const char __user *data,
23108 +                                 size_t len, loff_t *ppos)
23109 +{
23110 +       struct pcf50606_data *pcf = file->private_data;
23111 +       if (len) {
23112 +               size_t i;
23113 +
23114 +               for (i = 0; i != len; i++) {
23115 +                       char c;
23116 +                       if (get_user(c, data + i))
23117 +                               return -EFAULT;
23118 +                       if (c == 'V')
23119 +                               pcf->allow_close = CLOSE_STATE_ALLOW;
23120 +               }
23121 +               pcf50606_wdt_keepalive(pcf);
23122 +       }
23123 +
23124 +       return len;
23125 +}
23126 +
23127 +static struct watchdog_info pcf50606_wdt_ident = {
23128 +       .options        = WDIOF_MAGICCLOSE,
23129 +       .firmware_version = 0,
23130 +       .identity       = "PCF50606 Watchdog",
23131 +};
23132 +
23133 +static int pcf50606_wdt_ioctl(struct inode *inode, struct file *file,
23134 +                             unsigned int cmd, unsigned long arg)
23135 +{
23136 +       struct pcf50606_data *pcf = file->private_data;
23137 +       void __user *argp = (void __user *)arg;
23138 +       int __user *p = argp;
23139 +
23140 +       switch (cmd) {
23141 +       case WDIOC_GETSUPPORT:
23142 +               return copy_to_user(argp, &pcf50606_wdt_ident,
23143 +                                   sizeof(pcf50606_wdt_ident)) ? -EFAULT : 0;
23144 +               break;
23145 +       case WDIOC_GETSTATUS:
23146 +       case WDIOC_GETBOOTSTATUS:
23147 +               return put_user(0, p);
23148 +       case WDIOC_KEEPALIVE:
23149 +               pcf50606_wdt_keepalive(pcf);
23150 +               return 0;
23151 +       case WDIOC_GETTIMEOUT:
23152 +               return put_user(8, p);
23153 +       default:
23154 +               return -ENOIOCTLCMD;
23155 +       }
23156 +}
23157 +
23158 +static struct file_operations pcf50606_wdt_fops = {
23159 +       .owner          = THIS_MODULE,
23160 +       .llseek         = no_llseek,
23161 +       .write          = &pcf50606_wdt_write,
23162 +       .ioctl          = &pcf50606_wdt_ioctl,
23163 +       .open           = &pcf50606_wdt_open,
23164 +       .release        = &pcf50606_wdt_release,
23165 +};
23166 +
23167 +static struct miscdevice pcf50606_wdt_miscdev = {
23168 +       .minor          = WATCHDOG_MINOR,
23169 +       .name           = "watchdog",
23170 +       .fops           = &pcf50606_wdt_fops,
23171 +};
23172 +
23173 +/***********************************************************************
23174 + * PWM
23175 + ***********************************************************************/
23176 +
23177 +static const char *pwm_dc_table[] = {
23178 +       "0/16", "1/16", "2/16", "3/16",
23179 +       "4/16", "5/16", "6/16", "7/16",
23180 +       "8/16", "9/16", "10/16", "11/16",
23181 +       "12/16", "13/16", "14/16", "15/16",
23182 +};
23183 +
23184 +static ssize_t show_pwm_dc(struct device *dev, struct device_attribute *attr,
23185 +                          char *buf)
23186 +{
23187 +       struct i2c_client *client = to_i2c_client(dev);
23188 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23189 +       u_int8_t val;
23190 +
23191 +       val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_DC_SHIFT;
23192 +       val &= 0xf;
23193 +
23194 +       return sprintf(buf, "%s\n", pwm_dc_table[val]);
23195 +}
23196 +
23197 +static ssize_t set_pwm_dc(struct device *dev, struct device_attribute *attr,
23198 +                         const char *buf, size_t count)
23199 +{
23200 +       struct i2c_client *client = to_i2c_client(dev);
23201 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23202 +       u_int8_t i;
23203 +
23204 +       for (i = 0; i < ARRAY_SIZE(pwm_dc_table); i++) {
23205 +               if (!strncmp(buf, pwm_dc_table[i], strlen(pwm_dc_table[i]))) {
23206 +                       dev_dbg(dev, "setting pwm dc %s\n\r", pwm_dc_table[i]);
23207 +                       reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e,
23208 +                                        (i << PCF50606_PWMC1_DC_SHIFT));
23209 +               }
23210 +       }
23211 +       return count;
23212 +}
23213 +
23214 +static DEVICE_ATTR(pwm_dc, S_IRUGO | S_IWUSR, show_pwm_dc, set_pwm_dc);
23215 +
23216 +static const char *pwm_clk_table[] = {
23217 +       "512", "256", "128", "64",
23218 +       "56300", "28100", "14100", "7000",
23219 +};
23220 +
23221 +static ssize_t show_pwm_clk(struct device *dev, struct device_attribute *attr,
23222 +                           char *buf)
23223 +{
23224 +       struct i2c_client *client = to_i2c_client(dev);
23225 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23226 +       u_int8_t val;
23227 +
23228 +       val = reg_read(pcf, PCF50606_REG_PWMC1) >> PCF50606_PWMC1_CLK_SHIFT;
23229 +       val &= 0x7;
23230 +
23231 +       return sprintf(buf, "%s\n", pwm_clk_table[val]);
23232 +}
23233 +
23234 +static ssize_t set_pwm_clk(struct device *dev, struct device_attribute *attr,
23235 +                          const char *buf, size_t count)
23236 +{
23237 +       struct i2c_client *client = to_i2c_client(dev);
23238 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23239 +       u_int8_t i;
23240 +
23241 +       for (i = 0; i < ARRAY_SIZE(pwm_clk_table); i++) {
23242 +               if (!strncmp(buf, pwm_clk_table[i], strlen(pwm_clk_table[i]))) {
23243 +                       dev_dbg(dev, "setting pwm clk %s\n\r",
23244 +                               pwm_clk_table[i]);
23245 +                       reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0xe0,
23246 +                                        (i << PCF50606_PWMC1_CLK_SHIFT));
23247 +               }
23248 +       }
23249 +       return count;
23250 +}
23251 +
23252 +static DEVICE_ATTR(pwm_clk, S_IRUGO | S_IWUSR, show_pwm_clk, set_pwm_clk);
23253 +
23254 +static int pcf50606bl_get_intensity(struct backlight_device *bd)
23255 +{
23256 +       struct pcf50606_data *pcf = bl_get_data(bd);
23257 +       int intensity = reg_read(pcf, PCF50606_REG_PWMC1);
23258 +       intensity = (intensity >> PCF50606_PWMC1_DC_SHIFT);
23259 +
23260 +       return intensity & 0xf;
23261 +}
23262 +
23263 +static int pcf50606bl_set_intensity(struct backlight_device *bd)
23264 +{
23265 +       struct pcf50606_data *pcf = bl_get_data(bd);
23266 +       int intensity = bd->props.brightness;
23267 +
23268 +       if (bd->props.power != FB_BLANK_UNBLANK)
23269 +               intensity = 0;
23270 +       if (bd->props.fb_blank != FB_BLANK_UNBLANK)
23271 +               intensity = 0;
23272 +
23273 +       return reg_set_bit_mask(pcf, PCF50606_REG_PWMC1, 0x1e,
23274 +                               (intensity << PCF50606_PWMC1_DC_SHIFT));
23275 +}
23276 +
23277 +static struct backlight_ops pcf50606bl_ops = {
23278 +       .get_brightness = pcf50606bl_get_intensity,
23279 +       .update_status  = pcf50606bl_set_intensity,
23280 +};
23281 +
23282 +/***********************************************************************
23283 + * Driver initialization
23284 + ***********************************************************************/
23285 +
23286 +#ifdef CONFIG_MACH_NEO1973_GTA01
23287 +/* We currently place those platform devices here to make sure the device
23288 + * suspend/resume order is correct */
23289 +static struct platform_device gta01_pm_gps_dev = {
23290 +       .name           = "neo1973-pm-gps",
23291 +};
23292 +
23293 +static struct platform_device gta01_pm_bt_dev = {
23294 +       .name           = "neo1973-pm-bt",
23295 +};
23296 +#endif
23297 +
23298 +static struct attribute *pcf_sysfs_entries[16] = {
23299 +       &dev_attr_voltage_dcd.attr,
23300 +       &dev_attr_voltage_dcde.attr,
23301 +       &dev_attr_voltage_dcud.attr,
23302 +       &dev_attr_voltage_d1reg.attr,
23303 +       &dev_attr_voltage_d2reg.attr,
23304 +       &dev_attr_voltage_d3reg.attr,
23305 +       &dev_attr_voltage_lpreg.attr,
23306 +       &dev_attr_voltage_ioreg.attr,
23307 +       NULL
23308 +};
23309 +
23310 +static struct attribute_group pcf_attr_group = {
23311 +       .name   = NULL,                 /* put in device directory */
23312 +       .attrs  = pcf_sysfs_entries,
23313 +};
23314 +
23315 +static void populate_sysfs_group(struct pcf50606_data *pcf)
23316 +{
23317 +       int i = 0;
23318 +       struct attribute **attr;
23319 +
23320 +       for (attr = pcf_sysfs_entries; *attr; attr++)
23321 +               i++;
23322 +
23323 +       if (pcf->pdata->used_features & PCF50606_FEAT_MBC) {
23324 +               pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr;
23325 +               pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr;
23326 +       }
23327 +
23328 +       if (pcf->pdata->used_features & PCF50606_FEAT_CHGCUR)
23329 +               pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr;
23330 +
23331 +       if (pcf->pdata->used_features & PCF50606_FEAT_BATVOLT)
23332 +               pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr;
23333 +
23334 +       if (pcf->pdata->used_features & PCF50606_FEAT_BATTEMP)
23335 +               pcf_sysfs_entries[i++] = &dev_attr_battemp.attr;
23336 +
23337 +       if (pcf->pdata->used_features & PCF50606_FEAT_PWM) {
23338 +               pcf_sysfs_entries[i++] = &dev_attr_pwm_dc.attr;
23339 +               pcf_sysfs_entries[i++] = &dev_attr_pwm_clk.attr;
23340 +       }
23341 +}
23342 +
23343 +static int pcf50606_detect(struct i2c_adapter *adapter, int address, int kind)
23344 +{
23345 +       struct i2c_client *new_client;
23346 +       struct pcf50606_data *data;
23347 +       int err = 0;
23348 +       int irq;
23349 +
23350 +       if (!pcf50606_pdev) {
23351 +               printk(KERN_ERR "pcf50606: driver needs a platform_device!\n");
23352 +               return -EIO;
23353 +       }
23354 +
23355 +       irq = platform_get_irq(pcf50606_pdev, 0);
23356 +       if (irq < 0) {
23357 +               dev_err(&pcf50606_pdev->dev, "no irq in platform resources!\n");
23358 +               return -EIO;
23359 +       }
23360 +
23361 +       /* At the moment, we only support one PCF50606 in a system */
23362 +       if (pcf50606_global) {
23363 +               dev_err(&pcf50606_pdev->dev,
23364 +                       "currently only one chip supported\n");
23365 +               return -EBUSY;
23366 +       }
23367 +
23368 +       data = kzalloc(sizeof(*data), GFP_KERNEL);
23369 +       if (!data)
23370 +               return -ENOMEM;
23371 +
23372 +       mutex_init(&data->lock);
23373 +       mutex_init(&data->working_lock);
23374 +       INIT_WORK(&data->work, pcf50606_work);
23375 +       data->irq = irq;
23376 +       data->working = 0;
23377 +       data->suppress_onkey_events = 0;
23378 +       data->onkey_seconds = -1;
23379 +       data->pdata = pcf50606_pdev->dev.platform_data;
23380 +
23381 +       new_client = &data->client;
23382 +       i2c_set_clientdata(new_client, data);
23383 +       new_client->addr = address;
23384 +       new_client->adapter = adapter;
23385 +       new_client->driver = &pcf50606_driver;
23386 +       new_client->flags = 0;
23387 +       strlcpy(new_client->name, "pcf50606", I2C_NAME_SIZE);
23388 +
23389 +       /* now we try to detect the chip */
23390 +
23391 +       /* register with i2c core */
23392 +       err = i2c_attach_client(new_client);
23393 +       if (err) {
23394 +               dev_err(&new_client->dev,
23395 +                       "error during i2c_attach_client()\n");
23396 +               goto exit_free;
23397 +       }
23398 +
23399 +       populate_sysfs_group(data);
23400 +
23401 +       err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group);
23402 +       if (err) {
23403 +               dev_err(&new_client->dev, "error creating sysfs group\n");
23404 +               goto exit_detach;
23405 +       }
23406 +
23407 +       /* create virtual charger 'device' */
23408 +
23409 +       /* input device registration */
23410 +       data->input_dev = input_allocate_device();
23411 +       if (!data->input_dev)
23412 +               goto exit_sysfs;
23413 +
23414 +       data->input_dev->name = "FIC Neo1973 PMU events";
23415 +       data->input_dev->phys = "I2C";
23416 +       data->input_dev->id.bustype = BUS_I2C;
23417 +       data->input_dev->cdev.dev = &new_client->dev;
23418 +
23419 +       data->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR);
23420 +       set_bit(KEY_POWER, data->input_dev->keybit);
23421 +       set_bit(KEY_POWER2, data->input_dev->keybit);
23422 +       set_bit(KEY_BATTERY, data->input_dev->keybit);
23423 +
23424 +       err = input_register_device(data->input_dev);
23425 +       if (err)
23426 +               goto exit_sysfs;
23427 +
23428 +       /* register power off handler with core power management */
23429 +       pm_power_off = &pcf50606_go_standby;
23430 +
23431 +       /* configure interrupt mask */
23432 +       /* we don't mask SECOND here, because we want one to do coldplug with */
23433 +       reg_write(data, PCF50606_REG_INT1M, 0x00);
23434 +       reg_write(data, PCF50606_REG_INT2M, 0x00);
23435 +       reg_write(data, PCF50606_REG_INT3M, PCF50606_INT3_TSCPRES);
23436 +
23437 +       err = request_irq(irq, pcf50606_irq, IRQF_TRIGGER_FALLING,
23438 +                         "pcf50606", data);
23439 +       if (err < 0)
23440 +               goto exit_input;
23441 +
23442 +       if (enable_irq_wake(irq) < 0)
23443 +               dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up"
23444 +                       "source in this hardware revision!", irq);
23445 +
23446 +       pcf50606_global = data;
23447 +
23448 +       if (data->pdata->used_features & PCF50606_FEAT_RTC) {
23449 +               data->rtc = rtc_device_register("pcf50606", &new_client->dev,
23450 +                                               &pcf50606_rtc_ops, THIS_MODULE);
23451 +               if (IS_ERR(data->rtc)) {
23452 +                       err = PTR_ERR(data->rtc);
23453 +                       goto exit_irq;
23454 +               }
23455 +       }
23456 +
23457 +       if (data->pdata->used_features & PCF50606_FEAT_WDT) {
23458 +               err = misc_register(&pcf50606_wdt_miscdev);
23459 +               if (err) {
23460 +                       dev_err(&new_client->dev, "cannot register miscdev on "
23461 +                              "minor=%d (%d)\n", WATCHDOG_MINOR, err);
23462 +                       goto exit_rtc;
23463 +               }
23464 +       }
23465 +
23466 +       if (data->pdata->used_features & PCF50606_FEAT_PWM) {
23467 +               /* enable PWM controller */
23468 +               reg_set_bit_mask(data, PCF50606_REG_PWMC1,
23469 +                                PCF50606_PWMC1_ACTSET,
23470 +                                PCF50606_PWMC1_ACTSET);
23471 +       }
23472 +
23473 +       if (data->pdata->used_features & PCF50606_FEAT_PWM_BL) {
23474 +               data->backlight = backlight_device_register("pcf50606-bl",
23475 +                                                           &new_client->dev,
23476 +                                                           data,
23477 +                                                           &pcf50606bl_ops);
23478 +               if (!data->backlight)
23479 +                       goto exit_misc;
23480 +               data->backlight->props.max_brightness = 16;
23481 +               data->backlight->props.power = FB_BLANK_UNBLANK;
23482 +               data->backlight->props.brightness =
23483 +                                       data->pdata->init_brightness;
23484 +               backlight_update_status(data->backlight);
23485 +       }
23486 +
23487 +       apm_get_power_status = pcf50606_get_power_status;
23488 +       pmu_bat_get_property = pcf50606_bat_get_property;
23489 +
23490 +#ifdef CONFIG_MACH_NEO1973_GTA01
23491 +       if (machine_is_neo1973_gta01()) {
23492 +               gta01_pm_gps_dev.dev.parent = &new_client->dev;
23493 +               switch (system_rev) {
23494 +               case GTA01Bv2_SYSTEM_REV:
23495 +               case GTA01Bv3_SYSTEM_REV:
23496 +               case GTA01Bv4_SYSTEM_REV:
23497 +                       gta01_pm_bt_dev.dev.parent = &new_client->dev;
23498 +                       platform_device_register(&gta01_pm_bt_dev);
23499 +                       break;
23500 +               }
23501 +               platform_device_register(&gta01_pm_gps_dev);
23502 +               /* a link for gllin compatibility */
23503 +               err = sysfs_create_link(&platform_bus_type.devices.kobj,
23504 +                   &gta01_pm_gps_dev.dev.kobj, "gta01-pm-gps.0");
23505 +               if (err)
23506 +                       printk(KERN_ERR
23507 +                           "sysfs_create_link (gta01-pm-gps.0): %d\n", err);
23508 +       }
23509 +#endif
23510 +
23511 +       if (data->pdata->used_features & PCF50606_FEAT_ACD)
23512 +               reg_set_bit_mask(data, PCF50606_REG_ACDC1,
23513 +                                PCF50606_ACDC1_ACDAPE, PCF50606_ACDC1_ACDAPE);
23514 +       else
23515 +               reg_clear_bits(data, PCF50606_REG_ACDC1,
23516 +                              PCF50606_ACDC1_ACDAPE);
23517 +
23518 +       return 0;
23519 +
23520 +exit_misc:
23521 +       if (data->pdata->used_features & PCF50606_FEAT_WDT)
23522 +               misc_deregister(&pcf50606_wdt_miscdev);
23523 +exit_rtc:
23524 +       if (data->pdata->used_features & PCF50606_FEAT_RTC)
23525 +               rtc_device_unregister(pcf50606_global->rtc);
23526 +exit_irq:
23527 +       free_irq(pcf50606_global->irq, pcf50606_global);
23528 +       pcf50606_global = NULL;
23529 +exit_input:
23530 +       pm_power_off = NULL;
23531 +       input_unregister_device(data->input_dev);
23532 +exit_sysfs:
23533 +       sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group);
23534 +exit_detach:
23535 +       i2c_detach_client(new_client);
23536 +exit_free:
23537 +       kfree(data);
23538 +       return err;
23539 +}
23540 +
23541 +static int pcf50606_attach_adapter(struct i2c_adapter *adapter)
23542 +{
23543 +       return i2c_probe(adapter, &addr_data, &pcf50606_detect);
23544 +}
23545 +
23546 +static int pcf50606_detach_client(struct i2c_client *client)
23547 +{
23548 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23549 +
23550 +       apm_get_power_status = NULL;
23551 +       pmu_bat_get_property = NULL;
23552 +
23553 +       input_unregister_device(pcf->input_dev);
23554 +
23555 +       if (pcf->pdata->used_features & PCF50606_FEAT_PWM_BL)
23556 +               backlight_device_unregister(pcf->backlight);
23557 +
23558 +       if (pcf->pdata->used_features & PCF50606_FEAT_WDT)
23559 +               misc_deregister(&pcf50606_wdt_miscdev);
23560 +
23561 +       if (pcf->pdata->used_features & PCF50606_FEAT_RTC)
23562 +               rtc_device_unregister(pcf->rtc);
23563 +
23564 +       free_irq(pcf->irq, pcf);
23565 +
23566 +       sysfs_remove_group(&client->dev.kobj, &pcf_attr_group);
23567 +
23568 +       pm_power_off = NULL;
23569 +
23570 +       kfree(pcf);
23571 +
23572 +       return 0;
23573 +}
23574 +
23575 +#ifdef CONFIG_PM
23576 +#define INT1M_RESUMERS (PCF50606_INT1_ALARM | \
23577 +                        PCF50606_INT1_ONKEYF | \
23578 +                        PCF50606_INT1_EXTONR)
23579 +#define INT2M_RESUMERS (PCF50606_INT2_CHGWD10S | \
23580 +                        PCF50606_INT2_CHGPROT | \
23581 +                        PCF50606_INT2_CHGERR)
23582 +#define INT3M_RESUMERS (PCF50606_INT3_LOWBAT | \
23583 +                        PCF50606_INT3_HIGHTMP | \
23584 +                        PCF50606_INT3_ACDINS)
23585 +static int pcf50606_suspend(struct device *dev, pm_message_t state)
23586 +{
23587 +       struct i2c_client *client = to_i2c_client(dev);
23588 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23589 +       int i;
23590 +
23591 +       /* we suspend once (!) as late as possible in the suspend sequencing */
23592 +
23593 +       if ((state.event != PM_EVENT_SUSPEND) ||
23594 +           (pcf->suspend_state != PCF50606_SS_RUNNING))
23595 +               return -EBUSY;
23596 +
23597 +       /* The general idea is to power down all unused power supplies,
23598 +        * and then mask all PCF50606 interrup sources but EXTONR, ONKEYF
23599 +        * and ALARM */
23600 +
23601 +       mutex_lock(&pcf->lock);
23602 +
23603 +       pcf->suspend_state = PCF50606_SS_STARTING_SUSPEND;
23604 +
23605 +       /* we are not going to service any further interrupts until we
23606 +        * resume.  If the IRQ workqueue is still pending in the background,
23607 +        * it will bail when it sees we set suspend state above.
23608 +        */
23609 +
23610 +       disable_irq(pcf->irq);
23611 +
23612 +       /* Save all registers that don't "survive" standby state */
23613 +       pcf->standby_regs.dcdc1 = __reg_read(pcf, PCF50606_REG_DCDC1);
23614 +       pcf->standby_regs.dcdc2 = __reg_read(pcf, PCF50606_REG_DCDC2);
23615 +       pcf->standby_regs.dcdec1 = __reg_read(pcf, PCF50606_REG_DCDEC1);
23616 +       pcf->standby_regs.dcudc1 = __reg_read(pcf, PCF50606_REG_DCUDC1);
23617 +       pcf->standby_regs.ioregc = __reg_read(pcf, PCF50606_REG_IOREGC);
23618 +       pcf->standby_regs.d1regc1 = __reg_read(pcf, PCF50606_REG_D1REGC1);
23619 +       pcf->standby_regs.d2regc1 = __reg_read(pcf, PCF50606_REG_D2REGC1);
23620 +       pcf->standby_regs.d3regc1 = __reg_read(pcf, PCF50606_REG_D3REGC1);
23621 +       pcf->standby_regs.lpregc1 = __reg_read(pcf, PCF50606_REG_LPREGC1);
23622 +       pcf->standby_regs.adcc1 = __reg_read(pcf, PCF50606_REG_ADCC1);
23623 +       pcf->standby_regs.adcc2 = __reg_read(pcf, PCF50606_REG_ADCC2);
23624 +       pcf->standby_regs.pwmc1 = __reg_read(pcf, PCF50606_REG_PWMC1);
23625 +
23626 +       /* switch off power supplies that are not needed during suspend */
23627 +       for (i = 0; i < __NUM_PCF50606_REGULATORS; i++) {
23628 +               if (!(pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON)) {
23629 +                       u_int8_t tmp;
23630 +
23631 +                       /* IOREG powers the I@C interface so we cannot switch
23632 +                        * it off */
23633 +                       if (i == PCF50606_REGULATOR_IOREG)
23634 +                               continue;
23635 +
23636 +                       dev_dbg(dev, "disabling pcf50606 regulator %u\n", i);
23637 +                       /* we cannot use pcf50606_onoff_set() because we're
23638 +                        * already under the mutex */
23639 +                       tmp = __reg_read(pcf, regulator_registers[i]);
23640 +                       tmp &= 0x1f;
23641 +                       __reg_write(pcf, regulator_registers[i], tmp);
23642 +               }
23643 +       }
23644 +
23645 +       pcf->standby_regs.int1m = __reg_read(pcf, PCF50606_REG_INT1M);
23646 +       pcf->standby_regs.int2m = __reg_read(pcf, PCF50606_REG_INT2M);
23647 +       pcf->standby_regs.int3m = __reg_read(pcf, PCF50606_REG_INT3M);
23648 +       __reg_write(pcf, PCF50606_REG_INT1M, ~INT1M_RESUMERS & 0xff);
23649 +       __reg_write(pcf, PCF50606_REG_INT2M, ~INT2M_RESUMERS & 0xff);
23650 +       __reg_write(pcf, PCF50606_REG_INT3M, ~INT3M_RESUMERS & 0xff);
23651 +
23652 +       pcf->suspend_state = PCF50606_SS_COMPLETED_SUSPEND;
23653 +
23654 +       mutex_unlock(&pcf->lock);
23655 +
23656 +       return 0;
23657 +}
23658 +
23659 +static int pcf50606_resume(struct device *dev)
23660 +{
23661 +       struct i2c_client *client = to_i2c_client(dev);
23662 +       struct pcf50606_data *pcf = i2c_get_clientdata(client);
23663 +
23664 +       mutex_lock(&pcf->lock);
23665 +
23666 +       pcf->suspend_state = PCF50606_SS_STARTING_RESUME;
23667 +
23668 +       /* Resume all saved registers that don't "survive" standby state */
23669 +       __reg_write(pcf, PCF50606_REG_INT1M, pcf->standby_regs.int1m);
23670 +       __reg_write(pcf, PCF50606_REG_INT2M, pcf->standby_regs.int2m);
23671 +       __reg_write(pcf, PCF50606_REG_INT3M, pcf->standby_regs.int3m);
23672 +
23673 +       __reg_write(pcf, PCF50606_REG_DCDC1, pcf->standby_regs.dcdc1);
23674 +       __reg_write(pcf, PCF50606_REG_DCDC2, pcf->standby_regs.dcdc2);
23675 +       __reg_write(pcf, PCF50606_REG_DCDEC1, pcf->standby_regs.dcdec1);
23676 +       __reg_write(pcf, PCF50606_REG_DCUDC1, pcf->standby_regs.dcudc1);
23677 +       __reg_write(pcf, PCF50606_REG_IOREGC, pcf->standby_regs.ioregc);
23678 +       __reg_write(pcf, PCF50606_REG_D1REGC1, pcf->standby_regs.d1regc1);
23679 +       __reg_write(pcf, PCF50606_REG_D2REGC1, pcf->standby_regs.d2regc1);
23680 +       __reg_write(pcf, PCF50606_REG_D3REGC1, pcf->standby_regs.d3regc1);
23681 +       __reg_write(pcf, PCF50606_REG_LPREGC1, pcf->standby_regs.lpregc1);
23682 +       __reg_write(pcf, PCF50606_REG_ADCC1, pcf->standby_regs.adcc1);
23683 +       __reg_write(pcf, PCF50606_REG_ADCC2, pcf->standby_regs.adcc2);
23684 +       __reg_write(pcf, PCF50606_REG_PWMC1, pcf->standby_regs.pwmc1);
23685 +
23686 +       pcf->suspend_state = PCF50606_SS_COMPLETED_RESUME;
23687 +
23688 +       enable_irq(pcf->irq);
23689 +
23690 +       mutex_unlock(&pcf->lock);
23691 +
23692 +       /* Call PCF work function; this fixes an issue on the gta01 where
23693 +        * the power button "goes away" if it is used to wake the device.
23694 +        */
23695 +       get_device(&pcf->client.dev);
23696 +       pcf50606_work(&pcf->work);
23697 +
23698 +       return 0;
23699 +}
23700 +#else
23701 +#define pcf50606_suspend NULL
23702 +#define pcf50606_resume NULL
23703 +#endif
23704 +
23705 +static struct i2c_driver pcf50606_driver = {
23706 +       .driver = {
23707 +               .name    = "pcf50606",
23708 +               .suspend = pcf50606_suspend,
23709 +               .resume  = pcf50606_resume,
23710 +       },
23711 +       .id             = I2C_DRIVERID_PCF50606,
23712 +       .attach_adapter = pcf50606_attach_adapter,
23713 +       .detach_client  = pcf50606_detach_client,
23714 +};
23715 +
23716 +/* platform driver, since i2c devices don't have platform_data */
23717 +static int __init pcf50606_plat_probe(struct platform_device *pdev)
23718 +{
23719 +       struct pcf50606_platform_data *pdata = pdev->dev.platform_data;
23720 +
23721 +       if (!pdata)
23722 +               return -ENODEV;
23723 +
23724 +       pcf50606_pdev = pdev;
23725 +
23726 +       return 0;
23727 +}
23728 +
23729 +static int pcf50606_plat_remove(struct platform_device *pdev)
23730 +{
23731 +       return 0;
23732 +}
23733 +
23734 +/* We have this purely to capture an early indication that we are coming out
23735 + * of suspend, before our device resume got called; async interrupt service is
23736 + * interested in this.
23737 + */
23738 +
23739 +static int pcf50606_plat_resume(struct platform_device *pdev)
23740 +{
23741 +       /* i2c_get_clientdata(to_i2c_client(&pdev->dev)) returns NULL at this
23742 +        * early resume time so we have to use pcf50606_global
23743 +        */
23744 +       pcf50606_global->suspend_state = PCF50606_SS_RESUMING_BUT_NOT_US_YET;
23745 +
23746 +       return 0;
23747 +}
23748 +
23749 +static struct platform_driver pcf50606_plat_driver = {
23750 +       .probe  = pcf50606_plat_probe,
23751 +       .remove = pcf50606_plat_remove,
23752 +       .resume_early = pcf50606_plat_resume,
23753 +       .driver = {
23754 +               .owner  = THIS_MODULE,
23755 +               .name   = "pcf50606",
23756 +       },
23757 +};
23758 +
23759 +static int __init pcf50606_init(void)
23760 +{
23761 +       int rc;
23762 +
23763 +       rc = platform_driver_register(&pcf50606_plat_driver);
23764 +       if (!rc)
23765 +               rc = i2c_add_driver(&pcf50606_driver);
23766 +
23767 +       return rc;
23768 +}
23769 +
23770 +static void pcf50606_exit(void)
23771 +{
23772 +       i2c_del_driver(&pcf50606_driver);
23773 +       platform_driver_unregister(&pcf50606_plat_driver);
23774 +}
23775 +
23776 +MODULE_DESCRIPTION("I2C chip driver for NXP PCF50606 power management unit");
23777 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
23778 +MODULE_LICENSE("GPL");
23779 +
23780 +module_init(pcf50606_init);
23781 +module_exit(pcf50606_exit);
23782 Index: linux-2.6.24.7/drivers/i2c/chips/pcf50606.h
23783 ===================================================================
23784 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
23785 +++ linux-2.6.24.7/drivers/i2c/chips/pcf50606.h 2008-12-11 22:46:49.000000000 +0100
23786 @@ -0,0 +1,302 @@
23787 +#ifndef _PCF50606_H
23788 +#define _PCF50606_H
23789 +
23790 +/* Philips PCF50606 Power Managemnt Unit (PMU) driver
23791 + * (C) 2006-2007 by Openmoko, Inc.
23792 + * Author: Harald Welte <laforge@openmoko.org>
23793 + *
23794 + */
23795 +
23796 +enum pfc50606_regs {
23797 +       PCF50606_REG_ID         = 0x00,
23798 +       PCF50606_REG_OOCS       = 0x01,
23799 +       PCF50606_REG_INT1       = 0x02, /* Interrupt Status */
23800 +       PCF50606_REG_INT2       = 0x03, /* Interrupt Status */
23801 +       PCF50606_REG_INT3       = 0x04, /* Interrupt Status */
23802 +       PCF50606_REG_INT1M      = 0x05, /* Interrupt Mask */
23803 +       PCF50606_REG_INT2M      = 0x06, /* Interrupt Mask */
23804 +       PCF50606_REG_INT3M      = 0x07, /* Interrupt Mask */
23805 +       PCF50606_REG_OOCC1      = 0x08,
23806 +       PCF50606_REG_OOCC2      = 0x09,
23807 +       PCF50606_REG_RTCSC      = 0x0a, /* Second */
23808 +       PCF50606_REG_RTCMN      = 0x0b, /* Minute */
23809 +       PCF50606_REG_RTCHR      = 0x0c, /* Hour */
23810 +       PCF50606_REG_RTCWD      = 0x0d, /* Weekday */
23811 +       PCF50606_REG_RTCDT      = 0x0e, /* Day */
23812 +       PCF50606_REG_RTCMT      = 0x0f, /* Month */
23813 +       PCF50606_REG_RTCYR      = 0x10, /* Year */
23814 +       PCF50606_REG_RTCSCA     = 0x11, /* Alarm Second */
23815 +       PCF50606_REG_RTCMNA     = 0x12, /* Alarm Minute */
23816 +       PCF50606_REG_RTCHRA     = 0x13, /* Alarm Hour */
23817 +       PCF50606_REG_RTCWDA     = 0x14, /* Alarm Weekday */
23818 +       PCF50606_REG_RTCDTA     = 0x15, /* Alarm Day */
23819 +       PCF50606_REG_RTCMTA     = 0x16, /* Alarm Month */
23820 +       PCF50606_REG_RTCYRA     = 0x17, /* Alarm Year */
23821 +       PCF50606_REG_PSSC       = 0x18, /* Power sequencing */
23822 +       PCF50606_REG_PWROKM     = 0x19, /* PWROK mask */
23823 +       PCF50606_REG_PWROKS     = 0x1a, /* PWROK status */
23824 +       PCF50606_REG_DCDC1      = 0x1b,
23825 +       PCF50606_REG_DCDC2      = 0x1c,
23826 +       PCF50606_REG_DCDC3      = 0x1d,
23827 +       PCF50606_REG_DCDC4      = 0x1e,
23828 +       PCF50606_REG_DCDEC1     = 0x1f,
23829 +       PCF50606_REG_DCDEC2     = 0x20,
23830 +       PCF50606_REG_DCUDC1     = 0x21,
23831 +       PCF50606_REG_DCUDC2     = 0x22,
23832 +       PCF50606_REG_IOREGC     = 0x23,
23833 +       PCF50606_REG_D1REGC1    = 0x24,
23834 +       PCF50606_REG_D2REGC1    = 0x25,
23835 +       PCF50606_REG_D3REGC1    = 0x26,
23836 +       PCF50606_REG_LPREGC1    = 0x27,
23837 +       PCF50606_REG_LPREGC2    = 0x28,
23838 +       PCF50606_REG_MBCC1      = 0x29,
23839 +       PCF50606_REG_MBCC2      = 0x2a,
23840 +       PCF50606_REG_MBCC3      = 0x2b,
23841 +       PCF50606_REG_MBCS1      = 0x2c,
23842 +       PCF50606_REG_BBCC       = 0x2d,
23843 +       PCF50606_REG_ADCC1      = 0x2e,
23844 +       PCF50606_REG_ADCC2      = 0x2f,
23845 +       PCF50606_REG_ADCS1      = 0x30,
23846 +       PCF50606_REG_ADCS2      = 0x31,
23847 +       PCF50606_REG_ADCS3      = 0x32,
23848 +       PCF50606_REG_ACDC1      = 0x33,
23849 +       PCF50606_REG_BVMC       = 0x34,
23850 +       PCF50606_REG_PWMC1      = 0x35,
23851 +       PCF50606_REG_LEDC1      = 0x36,
23852 +       PCF50606_REG_LEDC2      = 0x37,
23853 +       PCF50606_REG_GPOC1      = 0x38,
23854 +       PCF50606_REG_GPOC2      = 0x39,
23855 +       PCF50606_REG_GPOC3      = 0x3a,
23856 +       PCF50606_REG_GPOC4      = 0x3b,
23857 +       PCF50606_REG_GPOC5      = 0x3c,
23858 +       __NUM_PCF50606_REGS
23859 +};
23860 +
23861 +enum pcf50606_reg_oocs {
23862 +       PFC50606_OOCS_ONKEY     = 0x01,
23863 +       PCF50606_OOCS_EXTON     = 0x02,
23864 +       PCF50606_OOCS_PWROKRST  = 0x04,
23865 +       PCF50606_OOCS_BATOK     = 0x08,
23866 +       PCF50606_OOCS_BACKOK    = 0x10,
23867 +       PCF50606_OOCS_CHGOK     = 0x20,
23868 +       PCF50606_OOCS_TEMPOK    = 0x40,
23869 +       PCF50606_OOCS_WDTEXP    = 0x80,
23870 +};
23871 +
23872 +enum pcf50606_reg_oocc1 {
23873 +       PCF50606_OOCC1_GOSTDBY  = 0x01,
23874 +       PCF50606_OOCC1_TOTRST   = 0x02,
23875 +       PCF50606_OOCC1_CLK32ON  = 0x04,
23876 +       PCF50606_OOCC1_WDTRST   = 0x08,
23877 +       PCF50606_OOCC1_RTCWAK   = 0x10,
23878 +       PCF50606_OOCC1_CHGWAK   = 0x20,
23879 +       PCF50606_OOCC1_EXTONWAK_HIGH    = 0x40,
23880 +       PCF50606_OOCC1_EXTONWAK_LOW     = 0x80,
23881 +};
23882 +
23883 +enum pcf50606_reg_oocc2 {
23884 +       PCF50606_OOCC2_ONKEYDB_NONE     = 0x00,
23885 +       PCF50606_OOCC2_ONKEYDB_14ms     = 0x01,
23886 +       PCF50606_OOCC2_ONKEYDB_62ms     = 0x02,
23887 +       PCF50606_OOCC2_ONKEYDB_500ms    = 0x03,
23888 +       PCF50606_OOCC2_EXTONDB_NONE     = 0x00,
23889 +       PCF50606_OOCC2_EXTONDB_14ms     = 0x04,
23890 +       PCF50606_OOCC2_EXTONDB_62ms     = 0x08,
23891 +       PCF50606_OOCC2_EXTONDB_500ms    = 0x0c,
23892 +};
23893 +
23894 +enum pcf50606_reg_int1 {
23895 +       PCF50606_INT1_ONKEYR    = 0x01, /* ONKEY rising edge */
23896 +       PCF50606_INT1_ONKEYF    = 0x02, /* ONKEY falling edge */
23897 +       PCF50606_INT1_ONKEY1S   = 0x04, /* OMKEY at least 1sec low */
23898 +       PCF50606_INT1_EXTONR    = 0x08, /* EXTON rising edge */
23899 +       PCF50606_INT1_EXTONF    = 0x10, /* EXTON falling edge */
23900 +       PCF50606_INT1_SECOND    = 0x40, /* RTC periodic second interrupt */
23901 +       PCF50606_INT1_ALARM     = 0x80, /* RTC alarm time is reached */
23902 +};
23903 +
23904 +enum pcf50606_reg_int2 {
23905 +       PCF50606_INT2_CHGINS    = 0x01, /* Charger inserted */
23906 +       PCF50606_INT2_CHGRM     = 0x02, /* Charger removed */
23907 +       PCF50606_INT2_CHGFOK    = 0x04, /* Fast charging OK */
23908 +       PCF50606_INT2_CHGERR    = 0x08, /* Error in charging mode */
23909 +       PCF50606_INT2_CHGFRDY   = 0x10, /* Fast charge completed */
23910 +       PCF50606_INT2_CHGPROT   = 0x20, /* Charging protection interrupt */
23911 +       PCF50606_INT2_CHGWD10S  = 0x40, /* Charger watchdig expires in 10s */
23912 +       PCF50606_INT2_CHGWDEXP  = 0x80, /* Charger watchdog expires */
23913 +};
23914 +
23915 +enum pcf50606_reg_int3 {
23916 +       PCF50606_INT3_ADCRDY    = 0x01, /* ADC conversion finished */
23917 +       PCF50606_INT3_ACDINS    = 0x02, /* Accessory inserted */
23918 +       PCF50606_INT3_ACDREM    = 0x04, /* Accessory removed */
23919 +       PCF50606_INT3_TSCPRES   = 0x08, /* Touch screen pressed */
23920 +       PCF50606_INT3_LOWBAT    = 0x40, /* Low battery voltage */
23921 +       PCF50606_INT3_HIGHTMP   = 0x80, /* High temperature */
23922 +};
23923 +
23924 +/* used by PSSC, PWROKM, PWROKS, */
23925 +enum pcf50606_regu {
23926 +       PCF50606_REGU_DCD       = 0x01, /* DCD in phase 2 */
23927 +       PCF50606_REGU_DCDE      = 0x02, /* DCDE in phase 2 */
23928 +       PCF50606_REGU_DCUD      = 0x04, /* DCDU in phase 2 */
23929 +       PCF50606_REGU_IO        = 0x08, /* IO in phase 2 */
23930 +       PCF50606_REGU_D1        = 0x10, /* D1 in phase 2 */
23931 +       PCF50606_REGU_D2        = 0x20, /* D2 in phase 2 */
23932 +       PCF50606_REGU_D3        = 0x40, /* D3 in phase 2 */
23933 +       PCF50606_REGU_LP        = 0x80, /* LP in phase 2 */
23934 +};
23935 +
23936 +enum pcf50606_reg_dcdc4 {
23937 +       PCF50606_DCDC4_MODE_AUTO        = 0x00,
23938 +       PCF50606_DCDC4_MODE_PWM         = 0x01,
23939 +       PCF50606_DCDC4_MODE_PCF         = 0x02,
23940 +       PCF50606_DCDC4_OFF_FLOAT        = 0x00,
23941 +       PCF50606_DCDC4_OFF_BYPASS       = 0x04,
23942 +       PCF50606_DCDC4_OFF_PULLDOWN     = 0x08,
23943 +       PCF50606_DCDC4_CURLIM_500mA     = 0x00,
23944 +       PCF50606_DCDC4_CURLIM_750mA     = 0x10,
23945 +       PCF50606_DCDC4_CURLIM_1000mA    = 0x20,
23946 +       PCF50606_DCDC4_CURLIM_1250mA    = 0x30,
23947 +       PCF50606_DCDC4_TOGGLE           = 0x40,
23948 +       PCF50606_DCDC4_REGSEL_DCDC2     = 0x80,
23949 +};
23950 +
23951 +enum pcf50606_reg_dcdec2 {
23952 +       PCF50606_DCDEC2_MODE_AUTO       = 0x00,
23953 +       PCF50606_DCDEC2_MODE_PWM        = 0x01,
23954 +       PCF50606_DCDEC2_MODE_PCF        = 0x02,
23955 +       PCF50606_DCDEC2_OFF_FLOAT       = 0x00,
23956 +       PCF50606_DCDEC2_OFF_BYPASS      = 0x04,
23957 +};
23958 +
23959 +enum pcf50606_reg_dcudc2 {
23960 +       PCF50606_DCUDC2_MODE_AUTO       = 0x00,
23961 +       PCF50606_DCUDC2_MODE_PWM        = 0x01,
23962 +       PCF50606_DCUDC2_MODE_PCF        = 0x02,
23963 +       PCF50606_DCUDC2_OFF_FLOAT       = 0x00,
23964 +       PCF50606_DCUDC2_OFF_BYPASS      = 0x04,
23965 +};
23966 +
23967 +enum pcf50606_reg_adcc1 {
23968 +       PCF50606_ADCC1_TSCMODACT        = 0x01,
23969 +       PCF50606_ADCC1_TSCMODSTB        = 0x02,
23970 +       PCF50606_ADCC1_TRATSET          = 0x04,
23971 +       PCF50606_ADCC1_NTCSWAPE         = 0x08,
23972 +       PCF50606_ADCC1_NTCSWAOFF        = 0x10,
23973 +       PCF50606_ADCC1_EXTSYNCBREAK     = 0x20,
23974 +       /* reserved */
23975 +       PCF50606_ADCC1_TSCINT           = 0x80,
23976 +};
23977 +
23978 +enum pcf50606_reg_adcc2 {
23979 +       PCF50606_ADCC2_ADCSTART         = 0x01,
23980 +       /* see enum pcf50606_adcc2_adcmux */
23981 +       PCF50606_ADCC2_SYNC_NONE        = 0x00,
23982 +       PCF50606_ADCC2_SYNC_TXON        = 0x20,
23983 +       PCF50606_ADCC2_SYNC_PWREN1      = 0x40,
23984 +       PCF50606_ADCC2_SYNC_PWREN2      = 0x60,
23985 +       PCF50606_ADCC2_RES_10BIT        = 0x00,
23986 +       PCF50606_ADCC2_RES_8BIT         = 0x80,
23987 +};
23988 +
23989 +#define PCF50606_ADCC2_ADCMUX_MASK     (0xf << 1)
23990 +
23991 +#define ADCMUX_SHIFT   1
23992 +enum pcf50606_adcc2_adcmux {
23993 +       PCF50606_ADCMUX_BATVOLT_RES     = 0x0 << ADCMUX_SHIFT,
23994 +       PCF50606_ADCMUX_BATVOLT_SUBTR   = 0x1 << ADCMUX_SHIFT,
23995 +       PCF50606_ADCMUX_ADCIN1_RES      = 0x2 << ADCMUX_SHIFT,
23996 +       PCF50606_ADCMUX_ADCIN1_SUBTR    = 0x3 << ADCMUX_SHIFT,
23997 +       PCF50606_ADCMUX_BATTEMP         = 0x4 << ADCMUX_SHIFT,
23998 +       PCF50606_ADCMUX_ADCIN2          = 0x5 << ADCMUX_SHIFT,
23999 +       PCF50606_ADCMUX_ADCIN3          = 0x6 << ADCMUX_SHIFT,
24000 +       PCF50606_ADCMUX_ADCIN3_RATIO    = 0x7 << ADCMUX_SHIFT,
24001 +       PCF50606_ADCMUX_XPOS            = 0x8 << ADCMUX_SHIFT,
24002 +       PCF50606_ADCMUX_YPOS            = 0x9 << ADCMUX_SHIFT,
24003 +       PCF50606_ADCMUX_P1              = 0xa << ADCMUX_SHIFT,
24004 +       PCF50606_ADCMUX_P2              = 0xb << ADCMUX_SHIFT,
24005 +       PCF50606_ADCMUX_BATVOLT_ADCIN1  = 0xc << ADCMUX_SHIFT,
24006 +       PCF50606_ADCMUX_XY_SEQUENCE     = 0xe << ADCMUX_SHIFT,
24007 +       PCF50606_P1_P2_RESISTANCE       = 0xf << ADCMUX_SHIFT,
24008 +};
24009 +
24010 +enum pcf50606_adcs2 {
24011 +       PCF50606_ADCS2_ADCRDY           = 0x80,
24012 +};
24013 +
24014 +enum pcf50606_reg_mbcc1 {
24015 +       PCF50606_MBCC1_CHGAPE           = 0x01,
24016 +       PCF50606_MBCC1_AUTOFST          = 0x02,
24017 +#define        PCF50606_MBCC1_CHGMOD_MASK        0x1c
24018 +#define        PCF50606_MBCC1_CHGMOD_SHIFT       2
24019 +       PCF50606_MBCC1_CHGMOD_QUAL      = 0x00,
24020 +       PCF50606_MBCC1_CHGMOD_PRE       = 0x04,
24021 +       PCF50606_MBCC1_CHGMOD_TRICKLE   = 0x08,
24022 +       PCF50606_MBCC1_CHGMOD_FAST_CCCV = 0x0c,
24023 +       PCF50606_MBCC1_CHGMOD_FAST_NOCC = 0x10,
24024 +       PCF50606_MBCC1_CHGMOD_FAST_NOCV = 0x14,
24025 +       PCF50606_MBCC1_CHGMOD_FAST_SW   = 0x18,
24026 +       PCF50606_MBCC1_CHGMOD_IDLE      = 0x1c,
24027 +       PCF50606_MBCC1_DETMOD_LOWCHG    = 0x20,
24028 +       PCF50606_MBCC1_DETMOD_WDRST     = 0x40,
24029 +};
24030 +
24031 +enum pcf50606_reg_acdc1 {
24032 +       PCF50606_ACDC1_ACDDET           = 0x01,
24033 +       PCF50606_ACDC1_THRSHLD_1V0      = 0x00,
24034 +       PCF50606_ACDC1_THRSHLD_1V2      = 0x02,
24035 +       PCF50606_ACDC1_THRSHLD_1V4      = 0x04,
24036 +       PCF50606_ACDC1_THRSHLD_1V6      = 0x06,
24037 +       PCF50606_ACDC1_THRSHLD_1V8      = 0x08,
24038 +       PCF50606_ACDC1_THRSHLD_2V0      = 0x0a,
24039 +       PCF50606_ACDC1_THRSHLD_2V2      = 0x0c,
24040 +       PCF50606_ACDC1_THRSHLD_2V4      = 0x0e,
24041 +       PCF50606_ACDC1_DISDB            = 0x10,
24042 +       PCF50606_ACDC1_ACDAPE           = 0x80,
24043 +};
24044 +
24045 +enum pcf50606_reg_bvmc {
24046 +       PCF50606_BVMC_LOWBAT            = 0x01,
24047 +       PCF50606_BVMC_THRSHLD_NULL      = 0x00,
24048 +       PCF50606_BVMC_THRSHLD_2V8       = 0x02,
24049 +       PCF50606_BVMC_THRSHLD_2V9       = 0x04,
24050 +       PCF50606_BVMC_THRSHLD_3V        = 0x08,
24051 +       PCF50606_BVMC_THRSHLD_3V1       = 0x08,
24052 +       PCF50606_BVMC_THRSHLD_3V2       = 0x0a,
24053 +       PCF50606_BVMC_THRSHLD_3V3       = 0x0c,
24054 +       PCF50606_BVMC_THRSHLD_3V4       = 0x0e,
24055 +       PCF50606_BVMC_DISDB             = 0x10,
24056 +};
24057 +
24058 +enum pcf50606_reg_pwmc1 {
24059 +       PCF50606_PWMC1_ACTSET           = 0x01,
24060 +       PCF50606_PWMC1_PWMDC_0_16       = 0x00,
24061 +       PCF50606_PWMC1_PWMDC_1_16       = 0x02,
24062 +       PCF50606_PWMC1_PWMDC_2_16       = 0x04,
24063 +       PCF50606_PWMC1_PWMDC_3_16       = 0x06,
24064 +       PCF50606_PWMC1_PWMDC_4_16       = 0x08,
24065 +       PCF50606_PWMC1_PWMDC_5_16       = 0x0a,
24066 +       PCF50606_PWMC1_PWMDC_6_16       = 0x0c,
24067 +       PCF50606_PWMC1_PWMDC_7_16       = 0x0e,
24068 +       PCF50606_PWMC1_PWMDC_8_16       = 0x10,
24069 +       PCF50606_PWMC1_PWMDC_9_16       = 0x12,
24070 +       PCF50606_PWMC1_PWMDC_10_16      = 0x14,
24071 +       PCF50606_PWMC1_PWMDC_11_16      = 0x16,
24072 +       PCF50606_PWMC1_PWMDC_12_16      = 0x18,
24073 +       PCF50606_PWMC1_PWMDC_13_16      = 0x1a,
24074 +       PCF50606_PWMC1_PWMDC_14_16      = 0x1c,
24075 +       PCF50606_PWMC1_PWMDC_15_16      = 0x1e,
24076 +       PCF50606_PWMC1_PRESC_512Hz      = 0x20,
24077 +       PCF50606_PWMC1_PRESC_256Hz      = 0x40,
24078 +       PCF50606_PWMC1_PRESC_64Hz       = 0x60,
24079 +       PCF50606_PWMC1_PRESC_56kHz      = 0x80,
24080 +       PCF50606_PWMC1_PRESC_28kHz      = 0xa0,
24081 +       PCF50606_PWMC1_PRESC_14kHz      = 0xc0,
24082 +       PCF50606_PWMC1_PRESC_7kHz       = 0xe0,
24083 +};
24084 +#define PCF50606_PWMC1_CLK_SHIFT       5
24085 +#define PCF50606_PWMC1_DC_SHIFT                1
24086 +
24087 +#endif /* _PCF50606_H */
24088 +
24089 Index: linux-2.6.24.7/drivers/i2c/chips/pcf50633.c
24090 ===================================================================
24091 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
24092 +++ linux-2.6.24.7/drivers/i2c/chips/pcf50633.c 2008-12-11 22:46:49.000000000 +0100
24093 @@ -0,0 +1,2713 @@
24094 +/* Philips PCF50633 Power Management Unit (PMU) driver
24095 + *
24096 + * (C) 2006-2007 by Openmoko, Inc.
24097 + * Author: Harald Welte <laforge@openmoko.org>
24098 + * All rights reserved.
24099 + *
24100 + * This program is free software; you can redistribute it and/or
24101 + * modify it under the terms of the GNU General Public License as
24102 + * published by the Free Software Foundation; either version 2 of
24103 + * the License, or (at your option) any later version.
24104 + *
24105 + * This program is distributed in the hope that it will be useful,
24106 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
24107 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24108 + * GNU General Public License for more details.
24109 + *
24110 + * You should have received a copy of the GNU General Public License
24111 + * along with this program; if not, write to the Free Software
24112 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24113 + * MA 02111-1307 USA
24114 + *
24115 + * This driver is a monster ;) It provides the following features
24116 + * - voltage control for a dozen different voltage domains
24117 + * - charging control for main and backup battery
24118 + * - rtc / alarm
24119 + * - adc driver (hw_sensors like)
24120 + * - backlight
24121 + *
24122 + */
24123 +
24124 +#include <linux/module.h>
24125 +#include <linux/init.h>
24126 +#include <linux/i2c.h>
24127 +#include <linux/types.h>
24128 +#include <linux/interrupt.h>
24129 +#include <linux/irq.h>
24130 +#include <linux/workqueue.h>
24131 +#include <linux/delay.h>
24132 +#include <linux/rtc.h>
24133 +#include <linux/bcd.h>
24134 +#include <linux/watchdog.h>
24135 +#include <linux/miscdevice.h>
24136 +#include <linux/input.h>
24137 +#include <linux/fb.h>
24138 +#include <linux/backlight.h>
24139 +#include <linux/sched.h>
24140 +#include <linux/platform_device.h>
24141 +#include <linux/pcf50633.h>
24142 +#include <linux/apm-emulation.h>
24143 +#include <linux/jiffies.h>
24144 +
24145 +#include <asm/mach-types.h>
24146 +
24147 +#include "pcf50633.h"
24148 +#include <linux/resume-dependency.h>
24149 +
24150 +#if 0
24151 +#define DEBUGP(x, args ...) printk("%s: " x, __FUNCTION__, ## args)
24152 +#define DEBUGPC(x, args ...) printk(x, ## args)
24153 +#else
24154 +#define DEBUGP(x, args ...)
24155 +#define DEBUGPC(x, args ...)
24156 +#endif
24157 +
24158 +/***********************************************************************
24159 + * Static data / structures
24160 + ***********************************************************************/
24161 +
24162 +static unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END };
24163 +
24164 +I2C_CLIENT_INSMOD_1(pcf50633);
24165 +
24166 +#define PCF50633_FIDX_CHG_ENABLED      0       /* Charger enabled */
24167 +#define PCF50633_FIDX_CHG_PRESENT      1       /* Charger present */
24168 +#define PCF50633_FIDX_CHG_ERR          3       /* Charger Error */
24169 +#define PCF50633_FIDX_CHG_PROT         4       /* Charger Protection */
24170 +#define PCF50633_FIDX_CHG_READY                5       /* Charging completed */
24171 +#define PCF50633_FIDX_PWR_PRESSED      8
24172 +#define PCF50633_FIDX_RTC_SECOND       9
24173 +#define PCF50633_FIDX_USB_PRESENT      10
24174 +
24175 +#define PCF50633_F_CHG_ENABLED (1 << PCF50633_FIDX_CHG_ENABLED)
24176 +#define PCF50633_F_CHG_PRESENT (1 << PCF50633_FIDX_CHG_PRESENT)
24177 +#define PCF50633_F_CHG_ERR     (1 << PCF50633_FIDX_CHG_ERR)
24178 +#define PCF50633_F_CHG_PROT    (1 << PCF50633_FIDX_CHG_PROT)
24179 +#define PCF50633_F_CHG_READY   (1 << PCF50633_FIDX_CHG_READY)
24180 +
24181 +#define PCF50633_F_CHG_MASK    0x000000fc
24182 +
24183 +#define PCF50633_F_PWR_PRESSED (1 << PCF50633_FIDX_PWR_PRESSED)
24184 +#define PCF50633_F_RTC_SECOND  (1 << PCF50633_FIDX_RTC_SECOND)
24185 +#define PCF50633_F_USB_PRESENT (1 << PCF50633_FIDX_USB_PRESENT)
24186 +
24187 +enum close_state {
24188 +       CLOSE_STATE_NOT,
24189 +       CLOSE_STATE_ALLOW = 0x2342,
24190 +};
24191 +
24192 +enum charger_type {
24193 +       CHARGER_TYPE_NONE = 0,
24194 +       CHARGER_TYPE_HOSTUSB,
24195 +       CHARGER_TYPE_1A
24196 +};
24197 +
24198 +#define ADC_NOM_CHG_DETECT_1A 6
24199 +#define ADC_NOM_CHG_DETECT_NONE 43
24200 +
24201 +#define MAX_ADC_FIFO_DEPTH 8
24202 +
24203 +enum pcf50633_suspend_states {
24204 +       PCF50633_SS_RUNNING,
24205 +       PCF50633_SS_STARTING_SUSPEND,
24206 +       PCF50633_SS_COMPLETED_SUSPEND,
24207 +       PCF50633_SS_RESUMING_BUT_NOT_US_YET,
24208 +       PCF50633_SS_STARTING_RESUME,
24209 +       PCF50633_SS_COMPLETED_RESUME,
24210 +};
24211 +
24212 +
24213 +struct pcf50633_data {
24214 +       struct i2c_client client;
24215 +       struct pcf50633_platform_data *pdata;
24216 +       struct backlight_device *backlight;
24217 +       struct mutex lock;
24218 +       unsigned int flags;
24219 +       unsigned int working;
24220 +       struct mutex working_lock;
24221 +       struct work_struct work;
24222 +       struct rtc_device *rtc;
24223 +       struct input_dev *input_dev;
24224 +       int allow_close;
24225 +       int onkey_seconds;
24226 +       int irq;
24227 +       enum pcf50633_suspend_states suspend_state;
24228 +       int usb_removal_count;
24229 +       u8 pcfirq_resume[5];
24230 +       int probe_completed;
24231 +       int suppress_onkey_events;
24232 +
24233 +       /* if he pulls battery while charging, we notice that and correctly
24234 +        * report that the charger is idle.  But there is no interrupt that
24235 +        * fires if he puts a battery back in and charging resumes.  So when
24236 +        * the battery is pulled, we run this work function looking for
24237 +        * either charger resumption or USB cable pull
24238 +        */
24239 +       struct mutex working_lock_nobat;
24240 +       struct work_struct work_nobat;
24241 +       int working_nobat;
24242 +       int usb_removal_count_nobat;
24243 +       int jiffies_last_bat_ins;
24244 +
24245 +       /* current limit notification handler stuff */
24246 +       struct mutex working_lock_usb_curlimit;
24247 +       struct work_struct work_usb_curlimit;
24248 +       int pending_curlimit;
24249 +       int usb_removal_count_usb_curlimit;
24250 +
24251 +       int last_curlim_set;
24252 +
24253 +       int coldplug_done; /* cleared by probe, set by first work service */
24254 +       int flag_bat_voltage_read; /* ipc to /sys batt voltage read func */
24255 +
24256 +       int charger_adc_result_raw;
24257 +       enum charger_type charger_type;
24258 +
24259 +       /* we have a FIFO of ADC measurement requests that are used only by
24260 +        * the workqueue service code after the ADC completion interrupt
24261 +        */
24262 +       int adc_queue_mux[MAX_ADC_FIFO_DEPTH]; /* which ADC input to use */
24263 +       int adc_queue_avg[MAX_ADC_FIFO_DEPTH]; /* amount of averaging */
24264 +       int adc_queue_head; /* head owned by foreground code */
24265 +       int adc_queue_tail; /* tail owned by service code */
24266 +
24267 +#ifdef CONFIG_PM
24268 +       struct {
24269 +               u_int8_t ooctim2;
24270 +               /* enables are always [1] below
24271 +                * I2C has limit of 32 sequential regs, so done in two lumps
24272 +                * because it covers 33 register extent otherwise
24273 +                */
24274 +               u_int8_t misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT + 1];
24275 +               /*  skip 1 reserved reg here */
24276 +               u_int8_t ldo[PCF50633_REG_HCLDOENA - PCF50633_REG_LDO1OUT + 1];
24277 +       } standby_regs;
24278 +
24279 +       struct resume_dependency resume_dependency;
24280 +       int is_suspended;
24281 +
24282 +#endif
24283 +};
24284 +
24285 +static struct i2c_driver pcf50633_driver;
24286 +
24287 +struct pcf50633_data *pcf50633_global;
24288 +EXPORT_SYMBOL_GPL(pcf50633_global);
24289 +
24290 +static struct platform_device *pcf50633_pdev;
24291 +
24292 +static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma);
24293 +static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on);
24294 +
24295 +
24296 +/***********************************************************************
24297 + * Low-Level routines
24298 + ***********************************************************************/
24299 +
24300 +static int __reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
24301 +{
24302 +       if (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND) {
24303 +               dev_err(&pcf->client.dev, "__reg_write while suspended\n");
24304 +               dump_stack();
24305 +       }
24306 +       return i2c_smbus_write_byte_data(&pcf->client, reg, val);
24307 +}
24308 +
24309 +static int reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
24310 +{
24311 +       int ret;
24312 +
24313 +       mutex_lock(&pcf->lock);
24314 +       ret = __reg_write(pcf, reg, val);
24315 +       mutex_unlock(&pcf->lock);
24316 +
24317 +       return ret;
24318 +}
24319 +
24320 +static int32_t __reg_read(struct pcf50633_data *pcf, u_int8_t reg)
24321 +{
24322 +       int32_t ret;
24323 +
24324 +       if (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND) {
24325 +               dev_err(&pcf->client.dev, "__reg_read while suspended\n");
24326 +               dump_stack();
24327 +       }
24328 +       ret = i2c_smbus_read_byte_data(&pcf->client, reg);
24329 +
24330 +       return ret;
24331 +}
24332 +
24333 +static u_int8_t reg_read(struct pcf50633_data *pcf, u_int8_t reg)
24334 +{
24335 +       int32_t ret;
24336 +
24337 +       mutex_lock(&pcf->lock);
24338 +       ret = __reg_read(pcf, reg);
24339 +       mutex_unlock(&pcf->lock);
24340 +
24341 +       return ret & 0xff;
24342 +}
24343 +
24344 +static int reg_set_bit_mask(struct pcf50633_data *pcf,
24345 +                           u_int8_t reg, u_int8_t mask, u_int8_t val)
24346 +{
24347 +       int ret;
24348 +       u_int8_t tmp;
24349 +
24350 +       val &= mask;
24351 +
24352 +       mutex_lock(&pcf->lock);
24353 +
24354 +       tmp = __reg_read(pcf, reg);
24355 +       tmp &= ~mask;
24356 +       tmp |= val;
24357 +       ret = __reg_write(pcf, reg, tmp);
24358 +
24359 +       mutex_unlock(&pcf->lock);
24360 +
24361 +       return ret;
24362 +}
24363 +
24364 +static int reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
24365 +{
24366 +       int ret;
24367 +       u_int8_t tmp;
24368 +
24369 +       mutex_lock(&pcf->lock);
24370 +
24371 +       tmp = __reg_read(pcf, reg);
24372 +       tmp &= ~val;
24373 +       ret = __reg_write(pcf, reg, tmp);
24374 +
24375 +       mutex_unlock(&pcf->lock);
24376 +
24377 +       return ret;
24378 +}
24379 +
24380 +/* asynchronously setup reading one ADC channel */
24381 +static void async_adc_read_setup(struct pcf50633_data *pcf,
24382 +                                int channel, int avg)
24383 +{
24384 +       channel &= PCF50633_ADCC1_ADCMUX_MASK;
24385 +
24386 +       /* kill ratiometric, but enable ACCSW biasing */
24387 +       __reg_write(pcf, PCF50633_REG_ADCC2, 0x00);
24388 +       __reg_write(pcf, PCF50633_REG_ADCC3, 0x01);
24389 +
24390 +       /* start ADC conversion of selected channel */
24391 +       __reg_write(pcf, PCF50633_REG_ADCC1, channel | avg |
24392 +                   PCF50633_ADCC1_ADCSTART | PCF50633_ADCC1_RES_10BIT);
24393 +
24394 +}
24395 +
24396 +static u_int16_t async_adc_complete(struct pcf50633_data *pcf)
24397 +{
24398 +       u_int16_t ret = (__reg_read(pcf, PCF50633_REG_ADCS1) << 2) |
24399 +                       (__reg_read(pcf, PCF50633_REG_ADCS3) &
24400 +                                                 PCF50633_ADCS3_ADCDAT1L_MASK);
24401 +
24402 +       DEBUGPC("adc result = %d\n", ret);
24403 +
24404 +       return ret;
24405 +}
24406 +
24407 +
24408 +
24409 +
24410 +/***********************************************************************
24411 + * Voltage / ADC
24412 + ***********************************************************************/
24413 +
24414 +static u_int8_t auto_voltage(unsigned int millivolts)
24415 +{
24416 +       if (millivolts < 1800)
24417 +               return 0;
24418 +       if (millivolts > 3800)
24419 +               return 0xff;
24420 +
24421 +       millivolts -= 625;
24422 +       return millivolts/25;
24423 +}
24424 +
24425 +static unsigned int auto_2voltage(u_int8_t bits)
24426 +{
24427 +       if (bits < 0x2f)
24428 +               return 0;
24429 +       return 625 + (bits * 25);
24430 +}
24431 +
24432 +static u_int8_t down_voltage(unsigned int millivolts)
24433 +{
24434 +       if (millivolts < 625)
24435 +               return 0;
24436 +       else if (millivolts > 3000)
24437 +               return 0xff;
24438 +
24439 +       millivolts -= 625;
24440 +       return millivolts/25;
24441 +}
24442 +
24443 +static unsigned int down_2voltage(u_int8_t bits)
24444 +{
24445 +       return 625 + (bits*25);
24446 +}
24447 +
24448 +static u_int8_t ldo_voltage(unsigned int millivolts)
24449 +{
24450 +       if (millivolts < 900)
24451 +               return 0;
24452 +       else if (millivolts > 3600)
24453 +               return 0x1f;
24454 +
24455 +       millivolts -= 900;
24456 +       return millivolts/100;
24457 +}
24458 +
24459 +static unsigned int ldo_2voltage(u_int8_t bits)
24460 +{
24461 +       bits &= 0x1f;
24462 +       return 900 + (bits * 100);
24463 +}
24464 +
24465 +static const u_int8_t regulator_registers[__NUM_PCF50633_REGULATORS] = {
24466 +       [PCF50633_REGULATOR_AUTO]       = PCF50633_REG_AUTOOUT,
24467 +       [PCF50633_REGULATOR_DOWN1]      = PCF50633_REG_DOWN1OUT,
24468 +       [PCF50633_REGULATOR_DOWN2]      = PCF50633_REG_DOWN2OUT,
24469 +       [PCF50633_REGULATOR_MEMLDO]     = PCF50633_REG_MEMLDOOUT,
24470 +       [PCF50633_REGULATOR_LDO1]       = PCF50633_REG_LDO1OUT,
24471 +       [PCF50633_REGULATOR_LDO2]       = PCF50633_REG_LDO2OUT,
24472 +       [PCF50633_REGULATOR_LDO3]       = PCF50633_REG_LDO3OUT,
24473 +       [PCF50633_REGULATOR_LDO4]       = PCF50633_REG_LDO4OUT,
24474 +       [PCF50633_REGULATOR_LDO5]       = PCF50633_REG_LDO5OUT,
24475 +       [PCF50633_REGULATOR_LDO6]       = PCF50633_REG_LDO6OUT,
24476 +       [PCF50633_REGULATOR_HCLDO]      = PCF50633_REG_HCLDOOUT,
24477 +};
24478 +
24479 +int pcf50633_onoff_set(struct pcf50633_data *pcf,
24480 +                      enum pcf50633_regulator_id reg, int on)
24481 +{
24482 +       u_int8_t addr;
24483 +
24484 +       if (reg >= __NUM_PCF50633_REGULATORS)
24485 +               return -EINVAL;
24486 +
24487 +       /* the *ENA register is always one after the *OUT register */
24488 +       addr = regulator_registers[reg] + 1;
24489 +
24490 +       if (on == 0)
24491 +               reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, 0);
24492 +       else
24493 +               reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON,
24494 +                                PCF50633_REGULATOR_ON);
24495 +
24496 +       return 0;
24497 +}
24498 +EXPORT_SYMBOL_GPL(pcf50633_onoff_set);
24499 +
24500 +int pcf50633_onoff_get(struct pcf50633_data *pcf,
24501 +                      enum pcf50633_regulator_id reg)
24502 +{
24503 +       u_int8_t val, addr;
24504 +
24505 +       if (reg >= __NUM_PCF50633_REGULATORS)
24506 +               return -EINVAL;
24507 +
24508 +       /* the *ENA register is always one after the *OUT register */
24509 +       addr = regulator_registers[reg] + 1;
24510 +       val = reg_read(pcf, addr) & PCF50633_REGULATOR_ON;
24511 +
24512 +       return val;
24513 +}
24514 +EXPORT_SYMBOL_GPL(pcf50633_onoff_get);
24515 +
24516 +int pcf50633_voltage_set(struct pcf50633_data *pcf,
24517 +                        enum pcf50633_regulator_id reg,
24518 +                        unsigned int millivolts)
24519 +{
24520 +       u_int8_t volt_bits;
24521 +       u_int8_t regnr;
24522 +
24523 +       DEBUGP("pcf=%p, reg=%d, mvolts=%d\n", pcf, reg, millivolts);
24524 +
24525 +       if (reg >= __NUM_PCF50633_REGULATORS)
24526 +               return -EINVAL;
24527 +
24528 +       regnr = regulator_registers[reg];
24529 +
24530 +       if (millivolts > pcf->pdata->rails[reg].voltage.max)
24531 +               return -EINVAL;
24532 +
24533 +       switch (reg) {
24534 +       case PCF50633_REGULATOR_AUTO:
24535 +               volt_bits = auto_voltage(millivolts);
24536 +               break;
24537 +       case PCF50633_REGULATOR_DOWN1:
24538 +               volt_bits = down_voltage(millivolts);
24539 +               break;
24540 +       case PCF50633_REGULATOR_DOWN2:
24541 +               volt_bits = down_voltage(millivolts);
24542 +               break;
24543 +       case PCF50633_REGULATOR_LDO1:
24544 +       case PCF50633_REGULATOR_LDO2:
24545 +       case PCF50633_REGULATOR_LDO3:
24546 +       case PCF50633_REGULATOR_LDO4:
24547 +       case PCF50633_REGULATOR_LDO5:
24548 +       case PCF50633_REGULATOR_LDO6:
24549 +       case PCF50633_REGULATOR_HCLDO:
24550 +               volt_bits = ldo_voltage(millivolts);
24551 +               DEBUGP("ldo_voltage(0x%x)=%u\n", millivolts, volt_bits);
24552 +               break;
24553 +       default:
24554 +               return -EINVAL;
24555 +       }
24556 +
24557 +       return reg_write(pcf, regnr, volt_bits);
24558 +}
24559 +EXPORT_SYMBOL_GPL(pcf50633_voltage_set);
24560 +
24561 +unsigned int pcf50633_voltage_get(struct pcf50633_data *pcf,
24562 +                        enum pcf50633_regulator_id reg)
24563 +{
24564 +       u_int8_t volt_bits;
24565 +       u_int8_t regnr;
24566 +       unsigned int rc = 0;
24567 +
24568 +       if (reg >= __NUM_PCF50633_REGULATORS)
24569 +               return -EINVAL;
24570 +
24571 +       regnr = regulator_registers[reg];
24572 +       volt_bits = reg_read(pcf, regnr);
24573 +
24574 +       switch (reg) {
24575 +       case PCF50633_REGULATOR_AUTO:
24576 +               rc = auto_2voltage(volt_bits);
24577 +               break;
24578 +       case PCF50633_REGULATOR_DOWN1:
24579 +               rc = down_2voltage(volt_bits);
24580 +               break;
24581 +       case PCF50633_REGULATOR_DOWN2:
24582 +               rc = down_2voltage(volt_bits);
24583 +               break;
24584 +       case PCF50633_REGULATOR_LDO1:
24585 +       case PCF50633_REGULATOR_LDO2:
24586 +       case PCF50633_REGULATOR_LDO3:
24587 +       case PCF50633_REGULATOR_LDO4:
24588 +       case PCF50633_REGULATOR_LDO5:
24589 +       case PCF50633_REGULATOR_LDO6:
24590 +       case PCF50633_REGULATOR_HCLDO:
24591 +               rc = ldo_2voltage(volt_bits);
24592 +               break;
24593 +       default:
24594 +               return -EINVAL;
24595 +       }
24596 +
24597 +       return rc;
24598 +}
24599 +EXPORT_SYMBOL_GPL(pcf50633_voltage_get);
24600 +
24601 +/* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */
24602 +void pcf50633_go_standby(void)
24603 +{
24604 +       reg_set_bit_mask(pcf50633_global, PCF50633_REG_OOCSHDWN,
24605 +                 PCF50633_OOCSHDWN_GOSTDBY, PCF50633_OOCSHDWN_GOSTDBY);
24606 +}
24607 +EXPORT_SYMBOL_GPL(pcf50633_go_standby);
24608 +
24609 +void pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio,
24610 +                       int on)
24611 +{
24612 +       u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
24613 +
24614 +       if (on)
24615 +               reg_set_bit_mask(pcf, reg, 0x0f, 0x07);
24616 +       else
24617 +               reg_set_bit_mask(pcf, reg, 0x0f, 0x00);
24618 +}
24619 +EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
24620 +
24621 +int pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio)
24622 +{
24623 +       u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
24624 +       u_int8_t val = reg_read(pcf, reg) & 0x0f;
24625 +
24626 +       if (val == PCF50633_GPOCFG_GPOSEL_1 ||
24627 +           val == (PCF50633_GPOCFG_GPOSEL_0|PCF50633_GPOCFG_GPOSEL_INVERSE))
24628 +               return 1;
24629 +
24630 +       return 0;
24631 +}
24632 +EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
24633 +
24634 +static int interpret_charger_type_from_adc(struct pcf50633_data *pcf,
24635 +                                          int sample)
24636 +{
24637 +       /* 1A capable charger? */
24638 +
24639 +       if (sample < ((ADC_NOM_CHG_DETECT_NONE + ADC_NOM_CHG_DETECT_1A) / 2))
24640 +               return CHARGER_TYPE_1A;
24641 +
24642 +       /* well then, nothing in the USB hole, or USB host / unk adapter */
24643 +
24644 +       if (pcf->flags & PCF50633_F_USB_PRESENT) /* ooh power is in there */
24645 +               return CHARGER_TYPE_HOSTUSB; /* HOSTUSB is the catchall */
24646 +
24647 +       return CHARGER_TYPE_NONE; /* no really -- nothing in there */
24648 +}
24649 +
24650 +
24651 +
24652 +static void configure_pmu_for_charger(struct pcf50633_data *pcf,
24653 +                                     enum charger_type type)
24654 +{
24655 +       switch (type) {
24656 +       case CHARGER_TYPE_NONE:
24657 +               pcf50633_usb_curlim_set(pcf, 0);
24658 +               break;
24659 +       /*
24660 +        * the PCF50633 has a feature that it will supply only excess current
24661 +        * from the charger that is not used to power the device.  So this
24662 +        * 500mA setting is "up to 500mA" according to that.
24663 +        */
24664 +       case CHARGER_TYPE_HOSTUSB:
24665 +               /* USB subsystem should call pcf50633_usb_curlim_set to set
24666 +                * what was negotiated with the host when it is enumerated
24667 +                * successfully.  If we get called again after a good
24668 +                * negotiation, we keep what was negotiated.  (Removal of
24669 +                * USB plug destroys pcf->last_curlim_set to 0)
24670 +                */
24671 +               if (pcf->last_curlim_set > 100)
24672 +                       pcf50633_usb_curlim_set(pcf, pcf->last_curlim_set);
24673 +               else
24674 +                       pcf50633_usb_curlim_set(pcf, 100);
24675 +               break;
24676 +       case CHARGER_TYPE_1A:
24677 +               pcf50633_usb_curlim_set(pcf, 1000);
24678 +               /*
24679 +                * stop GPO / EN_HOSTUSB power driving out on the same
24680 +                * USB power pins we have a 1A charger on right now!
24681 +                */
24682 +               dev_dbg(&pcf->client.dev, "Charger -> CHARGER_TYPE_1A\n");
24683 +               __reg_write(pcf, PCF50633_GPO - PCF50633_GPIO1 +
24684 +                                PCF50633_REG_GPIO1CFG,
24685 +                                __reg_read(pcf, PCF50633_GPO - PCF50633_GPIO1 +
24686 +                                                PCF50633_REG_GPIO1CFG) & 0xf0);
24687 +               break;
24688 +       }
24689 +
24690 +       /* max out USB fast charge current -- actual current drawn is
24691 +        * additionally limited by USB limit so no worries
24692 +        */
24693 +       __reg_write(pcf, PCF50633_REG_MBCC5, 0xff);
24694 +
24695 +}
24696 +
24697 +static void trigger_next_adc_job_if_any(struct pcf50633_data *pcf)
24698 +{
24699 +       if (pcf->adc_queue_head == pcf->adc_queue_tail)
24700 +               return;
24701 +       async_adc_read_setup(pcf,
24702 +                            pcf->adc_queue_mux[pcf->adc_queue_tail],
24703 +                            pcf->adc_queue_avg[pcf->adc_queue_tail]);
24704 +}
24705 +
24706 +static void add_request_to_adc_queue(struct pcf50633_data *pcf,
24707 +                                    int mux, int avg)
24708 +{
24709 +       int old_head = pcf->adc_queue_head;
24710 +       pcf->adc_queue_mux[pcf->adc_queue_head] = mux;
24711 +       pcf->adc_queue_avg[pcf->adc_queue_head] = avg;
24712 +
24713 +       pcf->adc_queue_head = (pcf->adc_queue_head + 1) &
24714 +                             (MAX_ADC_FIFO_DEPTH - 1);
24715 +
24716 +       /* it was idle before we just added this?  we need to kick it then */
24717 +       if (old_head == pcf->adc_queue_tail)
24718 +               trigger_next_adc_job_if_any(pcf);
24719 +}
24720 +
24721 +/*
24722 + * we get run to handle servicing the async notification from USB stack that
24723 + * we got enumerated and allowed to draw a particular amount of current
24724 + */
24725 +
24726 +static void pcf50633_work_usbcurlim(struct work_struct *work)
24727 +{
24728 +       struct pcf50633_data *pcf =
24729 +                   container_of(work, struct pcf50633_data, work_usb_curlimit);
24730 +
24731 +       mutex_lock(&pcf->working_lock_usb_curlimit);
24732 +
24733 +       /* just can't cope with it if we are suspending, don't reschedule */
24734 +       if ((pcf->suspend_state == PCF50633_SS_STARTING_SUSPEND) ||
24735 +           (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND))
24736 +               goto bail;
24737 +
24738 +       dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim\n");
24739 +
24740 +       if (!pcf->probe_completed)
24741 +               goto reschedule;
24742 +
24743 +       /* we got a notification from USB stack before we completed resume...
24744 +        * that can only make trouble, reschedule for a retry
24745 +        */
24746 +       if (pcf->suspend_state &&
24747 +                    (pcf->suspend_state < PCF50633_SS_COMPLETED_RESUME))
24748 +               goto reschedule;
24749 +
24750 +       /*
24751 +        * did he pull USB before we managed to set the limit?
24752 +        */
24753 +       if (pcf->usb_removal_count_usb_curlimit != pcf->usb_removal_count)
24754 +               goto bail;
24755 +
24756 +       /* OK let's set the requested limit and finish */
24757 +
24758 +       dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim setting %dmA\n",
24759 +                                                        pcf->pending_curlimit);
24760 +       pcf50633_usb_curlim_set(pcf, pcf->pending_curlimit);
24761 +
24762 +bail:
24763 +       mutex_unlock(&pcf->working_lock_usb_curlimit);
24764 +       return;
24765 +
24766 +reschedule:
24767 +       dev_dbg(&pcf->client.dev, "pcf50633_work_usbcurlim rescheduling\n");
24768 +       if (!schedule_work(&pcf->work_usb_curlimit))
24769 +               dev_err(&pcf->client.dev, "curlim reschedule work "
24770 +                                                           "already queued\n");
24771 +
24772 +       mutex_unlock(&pcf->working_lock_usb_curlimit);
24773 +       /* don't spew, delaying whatever else is happening */
24774 +       msleep(1);
24775 +}
24776 +
24777 +
24778 +/* this is an export to allow machine to set USB current limit according to
24779 + * notifications of USB stack about enumeration state.  We spawn a work
24780 + * function to handle the actual setting, because suspend / resume and such
24781 + * can be in a bad state since this gets called externally asychronous to
24782 + * anything else going on in pcf50633.
24783 + */
24784 +
24785 +int pcf50633_notify_usb_current_limit_change(struct pcf50633_data *pcf,
24786 +                                                               unsigned int ma)
24787 +{
24788 +       /* can happen if he calls with pcf50633_global before probe
24789 +        * have to bail with error since we can't even schedule the work
24790 +        */
24791 +       if (!pcf) {
24792 +               printk(KERN_ERR "pcf50633_notify_usb_current_limit called with NULL pcf\n");
24793 +               return -EBUSY;
24794 +       }
24795 +
24796 +       dev_dbg(&pcf->client.dev,
24797 +                "pcf50633_notify_usb_current_limit_change %dmA\n", ma);
24798 +
24799 +       /* prepare to detect USB power removal before we complete */
24800 +       pcf->usb_removal_count_usb_curlimit = pcf->usb_removal_count;
24801 +
24802 +       pcf->pending_curlimit = ma;
24803 +
24804 +       if (!schedule_work(&pcf->work_usb_curlimit))
24805 +               dev_err(&pcf->client.dev, "curlim work item already queued\n");
24806 +
24807 +       return 0;
24808 +}
24809 +EXPORT_SYMBOL_GPL(pcf50633_notify_usb_current_limit_change);
24810 +
24811 +
24812 +/* we are run when we see a NOBAT situation, because there is no interrupt
24813 + * source in pcf50633 that triggers on resuming charging.  It watches to see
24814 + * if charging resumes, it reassesses the charging source if it does.  If the
24815 + * USB power disappears, it is also a sign there must be a battery and it is
24816 + * NOT being charged, so it exits since the next move must be USB insertion for
24817 + * change of charger state
24818 + */
24819 +
24820 +static void pcf50633_work_nobat(struct work_struct *work)
24821 +{
24822 +       struct pcf50633_data *pcf =
24823 +                       container_of(work, struct pcf50633_data, work_nobat);
24824 +
24825 +       mutex_lock(&pcf->working_lock_nobat);
24826 +       pcf->working_nobat = 1;
24827 +       mutex_unlock(&pcf->working_lock_nobat);
24828 +
24829 +       while (1) {
24830 +               msleep(1000);
24831 +
24832 +               if (pcf->suspend_state != PCF50633_SS_RUNNING)
24833 +                       continue;
24834 +
24835 +               /* there's a battery in there now? */
24836 +               if (reg_read(pcf, PCF50633_REG_MBCS3) & 0x40) {
24837 +
24838 +                       pcf->jiffies_last_bat_ins = jiffies;
24839 +
24840 +                       /* figure out our charging stance */
24841 +                       add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
24842 +                                                    PCF50633_ADCC1_AVERAGE_16);
24843 +                       goto bail;
24844 +               }
24845 +
24846 +               /* he pulled USB cable since we were started?  exit then */
24847 +               if (pcf->usb_removal_count_nobat != pcf->usb_removal_count)
24848 +                       goto bail;
24849 +       }
24850 +
24851 +bail:
24852 +       mutex_lock(&pcf->working_lock_nobat);
24853 +       pcf->working_nobat = 0;
24854 +       mutex_unlock(&pcf->working_lock_nobat);
24855 +}
24856 +
24857 +
24858 +static void pcf50633_work(struct work_struct *work)
24859 +{
24860 +       struct pcf50633_data *pcf =
24861 +                       container_of(work, struct pcf50633_data, work);
24862 +       u_int8_t pcfirq[5];
24863 +       int ret;
24864 +       int tail;
24865 +
24866 +       mutex_lock(&pcf->working_lock);
24867 +       pcf->working = 1;
24868 +
24869 +       /* sanity */
24870 +       if (!&pcf->client.dev)
24871 +               goto bail;
24872 +
24873 +       /*
24874 +        * if we are presently suspending, we are not in a position to deal
24875 +        * with pcf50633 interrupts at all.
24876 +        *
24877 +        * Because we didn't clear the int pending registers, there will be
24878 +        * no edge / interrupt waiting for us when we wake.  But it is OK
24879 +        * because at the end of our resume, we call this workqueue function
24880 +        * gratuitously, clearing the pending register and re-enabling
24881 +        * servicing this interrupt.
24882 +        */
24883 +
24884 +       if ((pcf->suspend_state == PCF50633_SS_STARTING_SUSPEND) ||
24885 +           (pcf->suspend_state == PCF50633_SS_COMPLETED_SUSPEND))
24886 +               goto bail;
24887 +
24888 +       /*
24889 +        * If we are inside suspend -> resume completion time we don't attempt
24890 +        * service until we have fully resumed.  Although we could talk to the
24891 +        * device as soon as I2C is up, the regs in the device which we might
24892 +        * choose to modify as part of the service action have not been
24893 +        * reloaded with their pre-suspend states yet.  Therefore we will
24894 +        * defer our service if we are called like that until our resume has
24895 +        * completed.
24896 +        *
24897 +        * This shouldn't happen any more because we disable servicing this
24898 +        * interrupt in suspend and don't re-enable it until resume is
24899 +        * completed.
24900 +        */
24901 +
24902 +       if (pcf->suspend_state &&
24903 +               (pcf->suspend_state != PCF50633_SS_COMPLETED_RESUME))
24904 +               goto reschedule;
24905 +
24906 +       /* this is the case early in resume! Sanity check! */
24907 +       if (i2c_get_clientdata(&pcf->client) == NULL)
24908 +               goto reschedule;
24909 +
24910 +       /*
24911 +       * datasheet says we have to read the five IRQ
24912 +       * status regs in one transaction
24913 +       */
24914 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client,
24915 +                                               PCF50633_REG_INT1,
24916 +                                               sizeof(pcfirq),
24917 +                                               pcfirq);
24918 +       if (ret != sizeof(pcfirq)) {
24919 +               dev_dbg(&pcf->client.dev,
24920 +                       "Oh crap PMU IRQ register read failed -- "
24921 +                       "retrying later %d\n", ret);
24922 +               /*
24923 +                * it shouldn't fail, we no longer attempt to use
24924 +                * I2C while it can be suspended.  But we don't have
24925 +                * much option but to retry if if it ever did fail,
24926 +                * because if we don't service the interrupt to clear
24927 +                * it, we will never see another PMU interrupt edge.
24928 +                */
24929 +               goto reschedule;
24930 +       }
24931 +
24932 +       /* hey did we just resume? (because we don't get here unless we are
24933 +        * running normally or the first call after resumption)
24934 +        */
24935 +
24936 +       if (pcf->suspend_state != PCF50633_SS_RUNNING) {
24937 +               /*
24938 +               * grab a copy of resume interrupt reasons
24939 +               * from pcf50633 POV
24940 +               */
24941 +               memcpy(pcf->pcfirq_resume, pcfirq, sizeof(pcf->pcfirq_resume));
24942 +
24943 +               /* pcf50633 resume is really really over now then */
24944 +               pcf->suspend_state = PCF50633_SS_RUNNING;
24945 +
24946 +               /* peek at the IRQ reason, if power button then set a flag
24947 +                * so that we do not signal the event to userspace
24948 +                */
24949 +               if (pcfirq[1] & (PCF50633_INT2_ONKEYF | PCF50633_INT2_ONKEYR)) {
24950 +                       pcf->suppress_onkey_events = 1;
24951 +                       DEBUGP("Wake by ONKEY, suppressing ONKEY event");
24952 +               } else {
24953 +                       pcf->suppress_onkey_events = 0;
24954 +               }
24955 +       }
24956 +
24957 +       if (!pcf->coldplug_done) {
24958 +               DEBUGP("PMU Coldplug init\n");
24959 +
24960 +               /* we used SECOND to kick ourselves started -- turn it off */
24961 +               pcfirq[0] &= ~PCF50633_INT1_SECOND;
24962 +               reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
24963 +                                       PCF50633_INT1_SECOND,
24964 +                                       PCF50633_INT1_SECOND);
24965 +
24966 +               /* coldplug the USB if present */
24967 +               if ((__reg_read(pcf, PCF50633_REG_MBCS1) &
24968 +                   (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) ==
24969 +                   (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) {
24970 +                       DEBUGPC("COLD USBINS\n");
24971 +                       input_report_key(pcf->input_dev, KEY_POWER2, 1);
24972 +                       apm_queue_event(APM_POWER_STATUS_CHANGE);
24973 +                       pcf->flags |= PCF50633_F_USB_PRESENT;
24974 +                       if (pcf->pdata->cb)
24975 +                               pcf->pdata->cb(&pcf->client.dev,
24976 +                                       PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT);
24977 +               }
24978 +
24979 +               /* figure out our initial charging stance */
24980 +               add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
24981 +                                             PCF50633_ADCC1_AVERAGE_16);
24982 +
24983 +               pcf->coldplug_done = 1;
24984 +       }
24985 +
24986 +       DEBUGP("INT1=0x%02x INT2=0x%02x INT3=0x%02x INT4=0x%02x INT5=0x%02x\n",
24987 +               pcfirq[0], pcfirq[1], pcfirq[2], pcfirq[3], pcfirq[4]);
24988 +
24989 +       if (pcfirq[0] & PCF50633_INT1_ADPINS) {
24990 +               /* Charger inserted */
24991 +               DEBUGPC("ADPINS ");
24992 +               input_report_key(pcf->input_dev, KEY_BATTERY, 1);
24993 +               apm_queue_event(APM_POWER_STATUS_CHANGE);
24994 +               pcf->flags |= PCF50633_F_CHG_PRESENT;
24995 +               if (pcf->pdata->cb)
24996 +                       pcf->pdata->cb(&pcf->client.dev,
24997 +                                      PCF50633_FEAT_MBC, PMU_EVT_INSERT);
24998 +       }
24999 +       if (pcfirq[0] & PCF50633_INT1_ADPREM) {
25000 +               /* Charger removed */
25001 +               DEBUGPC("ADPREM ");
25002 +               input_report_key(pcf->input_dev, KEY_BATTERY, 0);
25003 +               apm_queue_event(APM_POWER_STATUS_CHANGE);
25004 +               pcf->flags &= ~PCF50633_F_CHG_PRESENT;
25005 +               if (pcf->pdata->cb)
25006 +                       pcf->pdata->cb(&pcf->client.dev,
25007 +                                      PCF50633_FEAT_MBC, PMU_EVT_REMOVE);
25008 +       }
25009 +       if (pcfirq[0] & PCF50633_INT1_USBINS) {
25010 +               DEBUGPC("USBINS ");
25011 +               input_report_key(pcf->input_dev, KEY_POWER2, 1);
25012 +               apm_queue_event(APM_POWER_STATUS_CHANGE);
25013 +               pcf->flags |= PCF50633_F_USB_PRESENT;
25014 +               if (pcf->pdata->cb)
25015 +                       pcf->pdata->cb(&pcf->client.dev,
25016 +                                      PCF50633_FEAT_MBC, PMU_EVT_USB_INSERT);
25017 +               msleep(500); /* debounce, allow to see any ID resistor */
25018 +               /* completion irq will figure out our charging stance */
25019 +               add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
25020 +                                    PCF50633_ADCC1_AVERAGE_16);
25021 +       }
25022 +       if (pcfirq[0] & PCF50633_INT1_USBREM &&
25023 +                               !(pcfirq[0] & PCF50633_INT1_USBINS)) {
25024 +               /* the occurrence of USBINS and USBREM
25025 +                * should be exclusive in one schedule work
25026 +                */
25027 +               DEBUGPC("USBREM ");
25028 +
25029 +               pcf->usb_removal_count++;
25030 +
25031 +               /* only deal if we had understood it was in */
25032 +               if (pcf->flags & PCF50633_F_USB_PRESENT) {
25033 +                       input_report_key(pcf->input_dev, KEY_POWER2, 0);
25034 +                       apm_queue_event(APM_POWER_STATUS_CHANGE);
25035 +                       pcf->flags &= ~PCF50633_F_USB_PRESENT;
25036 +
25037 +                       if (pcf->pdata->cb)
25038 +                               pcf->pdata->cb(&pcf->client.dev,
25039 +                                       PCF50633_FEAT_MBC, PMU_EVT_USB_REMOVE);
25040 +
25041 +                       /* destroy any memory of grant of power from host */
25042 +                       pcf->last_curlim_set = 0;
25043 +
25044 +                       /* completion irq will figure out our charging stance */
25045 +                       add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_ADCIN1,
25046 +                                       PCF50633_ADCC1_AVERAGE_16);
25047 +               }
25048 +       }
25049 +       if (pcfirq[0] & PCF50633_INT1_ALARM) {
25050 +               DEBUGPC("ALARM ");
25051 +               if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
25052 +                       rtc_update_irq(pcf->rtc, 1, RTC_AF | RTC_IRQF);
25053 +       }
25054 +       if (pcfirq[0] & PCF50633_INT1_SECOND) {
25055 +               if (pcf->flags & PCF50633_F_RTC_SECOND) {
25056 +                       DEBUGPC("SECOND ");
25057 +                       rtc_update_irq(pcf->rtc, 1, RTC_PF | RTC_IRQF);
25058 +               }
25059 +
25060 +               if (pcf->onkey_seconds >= 0 &&
25061 +                   pcf->flags & PCF50633_F_PWR_PRESSED) {
25062 +                       DEBUGP("ONKEY_SECONDS(%u, OOCSTAT=0x%02x) ",
25063 +                               pcf->onkey_seconds,
25064 +                               reg_read(pcf, PCF50633_REG_OOCSTAT));
25065 +                       pcf->onkey_seconds++;
25066 +                       if (pcf->onkey_seconds >=
25067 +                           pcf->pdata->onkey_seconds_sig_init) {
25068 +                               /* Ask init to do 'ctrlaltdel' */
25069 +                               /*
25070 +                                * currently Linux reacts badly to issuing a
25071 +                                * signal to PID #1 before init is started.
25072 +                                * What happens is that the next kernel thread
25073 +                                * to start, which is the JFFS2 Garbage
25074 +                                * collector in our case, gets the signal
25075 +                                * instead and proceeds to fail to fork --
25076 +                                * which is very bad.  Therefore we confirm
25077 +                                * PID #1 exists before issuing the signal
25078 +                                */
25079 +                               if (find_task_by_pid(1)) {
25080 +                                       DEBUGPC("SIGINT(init) ");
25081 +                                       kill_proc(1, SIGINT, 1);
25082 +                               }
25083 +                               /* FIXME: what if userspace doesn't shut down? */
25084 +                       }
25085 +                       if (pcf->onkey_seconds >=
25086 +                               pcf->pdata->onkey_seconds_shutdown) {
25087 +                               DEBUGPC("Power Off ");
25088 +                               pcf50633_go_standby();
25089 +                       }
25090 +               }
25091 +       }
25092 +
25093 +       if (pcfirq[1] & PCF50633_INT2_ONKEYF) {
25094 +               /* ONKEY falling edge (start of button press) */
25095 +               pcf->flags |= PCF50633_F_PWR_PRESSED;
25096 +               if (!pcf->suppress_onkey_events) {
25097 +                       DEBUGPC("ONKEYF ");
25098 +                       input_report_key(pcf->input_dev, KEY_POWER, 1);
25099 +               } else {
25100 +                       DEBUGPC("ONKEYF(unreported) ");
25101 +               }
25102 +       }
25103 +       if (pcfirq[1] & PCF50633_INT2_ONKEYR) {
25104 +               /* ONKEY rising edge (end of button press) */
25105 +               pcf->flags &= ~PCF50633_F_PWR_PRESSED;
25106 +               pcf->onkey_seconds = -1;
25107 +               if (!pcf->suppress_onkey_events) {
25108 +                       DEBUGPC("ONKEYR ");
25109 +                       input_report_key(pcf->input_dev, KEY_POWER, 0);
25110 +               } else {
25111 +                       DEBUGPC("ONKEYR(unreported) ");
25112 +                       /* don't suppress any more power button events */
25113 +                       pcf->suppress_onkey_events = 0;
25114 +               }
25115 +               /* disable SECOND interrupt in case RTC didn't
25116 +                * request it */
25117 +               if (!(pcf->flags & PCF50633_F_RTC_SECOND))
25118 +                       reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
25119 +                                        PCF50633_INT1_SECOND,
25120 +                                        PCF50633_INT1_SECOND);
25121 +       }
25122 +       /* FIXME: we don't use EXTON1/2/3. thats why we skip it */
25123 +
25124 +       if (pcfirq[2] & PCF50633_INT3_BATFULL) {
25125 +               DEBUGPC("BATFULL ");
25126 +
25127 +               /* the problem is, we get a false BATFULL if we inserted battery
25128 +                * while USB powered.  Defeat BATFULL if we recently inserted
25129 +                * battery
25130 +                */
25131 +
25132 +               if ((jiffies - pcf->jiffies_last_bat_ins) < (HZ * 2)) {
25133 +
25134 +                       DEBUGPC("*** Ignoring BATFULL ***\n");
25135 +
25136 +                       ret = reg_read(pcf, PCF50633_REG_MBCC7) &
25137 +                                       PCF56033_MBCC7_USB_MASK;
25138 +
25139 +
25140 +                       reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
25141 +                                        PCF56033_MBCC7_USB_MASK,
25142 +                                        PCF50633_MBCC7_USB_SUSPEND);
25143 +
25144 +                       reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
25145 +                                        PCF56033_MBCC7_USB_MASK,
25146 +                                        ret);
25147 +               } else {
25148 +                       if (pcf->pdata->cb)
25149 +                               pcf->pdata->cb(&pcf->client.dev,
25150 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
25151 +               }
25152 +
25153 +               /* FIXME: signal this to userspace */
25154 +       }
25155 +       if (pcfirq[2] & PCF50633_INT3_CHGHALT) {
25156 +               DEBUGPC("CHGHALT ");
25157 +               /*
25158 +                * this is really "battery not pulling current" -- it can
25159 +                * appear with no battery attached
25160 +                */
25161 +               if (pcf->pdata->cb)
25162 +                       pcf->pdata->cb(&pcf->client.dev,
25163 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
25164 +       }
25165 +       if (pcfirq[2] & PCF50633_INT3_THLIMON) {
25166 +               DEBUGPC("THLIMON ");
25167 +               pcf->flags |= PCF50633_F_CHG_PROT;
25168 +               if (pcf->pdata->cb)
25169 +                       pcf->pdata->cb(&pcf->client.dev,
25170 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
25171 +       }
25172 +       if (pcfirq[2] & PCF50633_INT3_THLIMOFF) {
25173 +               DEBUGPC("THLIMOFF ");
25174 +               pcf->flags &= ~PCF50633_F_CHG_PROT;
25175 +               if (pcf->pdata->cb)
25176 +                       pcf->pdata->cb(&pcf->client.dev,
25177 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
25178 +       }
25179 +       if (pcfirq[2] & PCF50633_INT3_USBLIMON) {
25180 +               DEBUGPC("USBLIMON ");
25181 +               if (pcf->pdata->cb)
25182 +                       pcf->pdata->cb(&pcf->client.dev,
25183 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
25184 +       }
25185 +       if (pcfirq[2] & PCF50633_INT3_USBLIMOFF) {
25186 +               DEBUGPC("USBLIMOFF ");
25187 +               if (pcf->pdata->cb)
25188 +                       pcf->pdata->cb(&pcf->client.dev,
25189 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_CHANGE);
25190 +       }
25191 +       if (pcfirq[2] & PCF50633_INT3_ADCRDY) {
25192 +               /* ADC result ready */
25193 +               DEBUGPC("ADCRDY ");
25194 +               tail = pcf->adc_queue_tail;
25195 +               pcf->adc_queue_tail = (pcf->adc_queue_tail + 1) &
25196 +                                     (MAX_ADC_FIFO_DEPTH - 1);
25197 +
25198 +               switch (pcf->adc_queue_mux[tail]) {
25199 +               case PCF50633_ADCC1_MUX_BATSNS_RES: /* battery voltage */
25200 +                       pcf->flag_bat_voltage_read = async_adc_complete(pcf);
25201 +                       break;
25202 +               case PCF50633_ADCC1_MUX_ADCIN1: /* charger type */
25203 +                       pcf->charger_adc_result_raw = async_adc_complete(pcf);
25204 +                       pcf->charger_type = interpret_charger_type_from_adc(
25205 +                                            pcf, pcf->charger_adc_result_raw);
25206 +                       configure_pmu_for_charger(pcf, pcf->charger_type);
25207 +                       break;
25208 +               default:
25209 +                       async_adc_complete(pcf);
25210 +                       break;
25211 +               }
25212 +               trigger_next_adc_job_if_any(pcf);
25213 +       }
25214 +       if (pcfirq[2] & PCF50633_INT3_ONKEY1S) {
25215 +               /* ONKEY pressed for more than 1 second */
25216 +               pcf->onkey_seconds = 0;
25217 +               DEBUGPC("ONKEY1S ");
25218 +               /* Tell PMU we are taking care of this */
25219 +               reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
25220 +                                PCF50633_OOCSHDWN_TOTRST,
25221 +                                PCF50633_OOCSHDWN_TOTRST);
25222 +               /* enable SECOND interrupt (hz tick) */
25223 +               reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
25224 +       }
25225 +
25226 +       if (pcfirq[3] & (PCF50633_INT4_LOWBAT|PCF50633_INT4_LOWSYS)) {
25227 +               if ((__reg_read(pcf, PCF50633_REG_MBCS1) &
25228 +                   (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) ==
25229 +                   (PCF50633_MBCS1_USBPRES | PCF50633_MBCS1_USBOK)) {
25230 +                       /*
25231 +                        * hey no need to freak out, we have some kind of
25232 +                        * valid charger power to keep us going -- but note that
25233 +                        * we are not actually charging anything
25234 +                        */
25235 +                       if (pcf->pdata->cb)
25236 +                               pcf->pdata->cb(&pcf->client.dev,
25237 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
25238 +
25239 +                       reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
25240 +                                       PCF50633_MBCC1_RESUME,
25241 +                                       PCF50633_MBCC1_RESUME);
25242 +
25243 +                       /*
25244 +                        * Well, we are not charging anything right this second
25245 +                        * ... however in the next ~30s before we get the next
25246 +                        * NOBAT, he might insert a battery.  So we schedule a
25247 +                        * work function checking to see if
25248 +                        * we started charging something during that time.
25249 +                        * USB removal as well as charging terminates the work
25250 +                        * function so we can't get terminally confused
25251 +                        */
25252 +                       mutex_lock(&pcf->working_lock_nobat);
25253 +                       if (!pcf->working_nobat) {
25254 +                               pcf->usb_removal_count_nobat =
25255 +                                                       pcf->usb_removal_count;
25256 +
25257 +                               if (!schedule_work(&pcf->work_nobat))
25258 +                                       DEBUGPC("failed to schedule nobat\n");
25259 +                       }
25260 +                       mutex_unlock(&pcf->working_lock_nobat);
25261 +
25262 +
25263 +                       DEBUGPC("(NO)BAT ");
25264 +               } else {
25265 +                       /* Really low battery voltage, we have 8 seconds left */
25266 +                       DEBUGPC("LOWBAT ");
25267 +                       /*
25268 +                        * currently Linux reacts badly to issuing a signal to
25269 +                        * PID #1 before init is started.  What happens is that
25270 +                        * the next kernel thread to start, which is the JFFS2
25271 +                        * Garbage collector in our case, gets the signal
25272 +                        * instead and proceeds to fail to fork -- which is
25273 +                        * very bad.  Therefore we confirm PID #1 exists
25274 +                        * before issuing SPIGPWR
25275 +                        */
25276 +                       if (find_task_by_pid(1)) {
25277 +                               apm_queue_event(APM_LOW_BATTERY);
25278 +                               DEBUGPC("SIGPWR(init) ");
25279 +                               kill_proc(1, SIGPWR, 1);
25280 +                       } else
25281 +                               /*
25282 +                                * well, our situation is like this:  we do not
25283 +                                * have any external power, we have a low
25284 +                                * battery and since PID #1 doesn't exist yet,
25285 +                                * we are early in the boot, likely before
25286 +                                * rootfs mount.  We should just call it a day
25287 +                                */
25288 +                               apm_queue_event(APM_CRITICAL_SUSPEND);
25289 +               }
25290 +
25291 +               /* Tell PMU we are taking care of this */
25292 +               reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
25293 +                                PCF50633_OOCSHDWN_TOTRST,
25294 +                                PCF50633_OOCSHDWN_TOTRST);
25295 +       }
25296 +       if (pcfirq[3] & PCF50633_INT4_HIGHTMP) {
25297 +               /* High temperature */
25298 +               DEBUGPC("HIGHTMP ");
25299 +               apm_queue_event(APM_CRITICAL_SUSPEND);
25300 +       }
25301 +       if (pcfirq[3] & PCF50633_INT4_AUTOPWRFAIL) {
25302 +               DEBUGPC("PCF50633_INT4_AUTOPWRFAIL ");
25303 +               /* FIXME: deal with this */
25304 +       }
25305 +       if (pcfirq[3] & PCF50633_INT4_DWN1PWRFAIL) {
25306 +               DEBUGPC("PCF50633_INT4_DWN1PWRFAIL ");
25307 +               /* FIXME: deal with this */
25308 +       }
25309 +       if (pcfirq[3] & PCF50633_INT4_DWN2PWRFAIL) {
25310 +               DEBUGPC("PCF50633_INT4_DWN2PWRFAIL ");
25311 +               /* FIXME: deal with this */
25312 +       }
25313 +       if (pcfirq[3] & PCF50633_INT4_LEDPWRFAIL) {
25314 +               DEBUGPC("PCF50633_INT4_LEDPWRFAIL ");
25315 +               /* FIXME: deal with this */
25316 +       }
25317 +       if (pcfirq[3] & PCF50633_INT4_LEDOVP) {
25318 +               DEBUGPC("PCF50633_INT4_LEDOVP ");
25319 +               /* FIXME: deal with this */
25320 +       }
25321 +
25322 +       DEBUGPC("\n");
25323 +
25324 +bail:
25325 +       pcf->working = 0;
25326 +       input_sync(pcf->input_dev);
25327 +       put_device(&pcf->client.dev);
25328 +       mutex_unlock(&pcf->working_lock);
25329 +
25330 +       return;
25331 +
25332 +reschedule:
25333 +       /* don't spew, delaying whatever else is happening */
25334 +       /* EXCEPTION: if we are in the middle of suspending, we don't have
25335 +        * time to hang around since we may be turned off core 1V3 already
25336 +        */
25337 +       if ((pcf->suspend_state != PCF50633_SS_STARTING_SUSPEND) &&
25338 +           (pcf->suspend_state != PCF50633_SS_COMPLETED_SUSPEND)) {
25339 +               msleep(10);
25340 +               dev_dbg(&pcf->client.dev, "rescheduling interrupt service\n");
25341 +       }
25342 +       if (!schedule_work(&pcf->work))
25343 +               dev_err(&pcf->client.dev, "int service reschedule failed\n");
25344 +
25345 +       /* we don't put the device here, hold it for next time */
25346 +       mutex_unlock(&pcf->working_lock);
25347 +}
25348 +
25349 +static irqreturn_t pcf50633_irq(int irq, void *_pcf)
25350 +{
25351 +       struct pcf50633_data *pcf = _pcf;
25352 +
25353 +       DEBUGP("entering(irq=%u, pcf=%p): scheduling work\n", irq, _pcf);
25354 +       dev_dbg(&pcf->client.dev, "pcf50633_irq scheduling work\n");
25355 +
25356 +       get_device(&pcf->client.dev);
25357 +       if (!schedule_work(&pcf->work) && !pcf->working)
25358 +               dev_err(&pcf->client.dev, "pcf irq work already queued\n");
25359 +
25360 +       return IRQ_HANDLED;
25361 +}
25362 +
25363 +static u_int16_t adc_to_batt_millivolts(u_int16_t adc)
25364 +{
25365 +       u_int16_t mvolts;
25366 +
25367 +       mvolts = (adc * 6000) / 1024;
25368 +
25369 +       return mvolts;
25370 +}
25371 +
25372 +#define BATTVOLT_SCALE_START 2800
25373 +#define BATTVOLT_SCALE_END 4200
25374 +#define BATTVOLT_SCALE_DIVIDER ((BATTVOLT_SCALE_END - BATTVOLT_SCALE_START)/100)
25375 +
25376 +static u_int8_t battvolt_scale(u_int16_t battvolt)
25377 +{
25378 +       /* FIXME: this linear scale is completely bogus */
25379 +       u_int16_t battvolt_relative = battvolt - BATTVOLT_SCALE_START;
25380 +       unsigned int percent = battvolt_relative / BATTVOLT_SCALE_DIVIDER;
25381 +
25382 +       return percent;
25383 +}
25384 +
25385 +u_int16_t pcf50633_battvolt(struct pcf50633_data *pcf)
25386 +{
25387 +       int count = 10;
25388 +
25389 +       pcf->flag_bat_voltage_read = -1;
25390 +       add_request_to_adc_queue(pcf, PCF50633_ADCC1_MUX_BATSNS_RES,
25391 +                                     PCF50633_ADCC1_AVERAGE_16);
25392 +
25393 +       while ((count--) && (pcf->flag_bat_voltage_read < 0))
25394 +               msleep(1);
25395 +
25396 +       if (count < 0) { /* timeout somehow */
25397 +               DEBUGPC("pcf50633_battvolt timeout :-(\n");
25398 +               return -1;
25399 +       }
25400 +
25401 +       return adc_to_batt_millivolts(pcf->flag_bat_voltage_read);
25402 +}
25403 +EXPORT_SYMBOL_GPL(pcf50633_battvolt);
25404 +
25405 +static ssize_t show_battvolt(struct device *dev, struct device_attribute *attr,
25406 +                            char *buf)
25407 +{
25408 +       struct i2c_client *client = to_i2c_client(dev);
25409 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25410 +
25411 +       return sprintf(buf, "%u\n", pcf50633_battvolt(pcf));
25412 +}
25413 +static DEVICE_ATTR(battvolt, S_IRUGO | S_IWUSR, show_battvolt, NULL);
25414 +
25415 +static int reg_id_by_name(const char *name)
25416 +{
25417 +       int reg_id;
25418 +
25419 +       if (!strcmp(name, "voltage_auto"))
25420 +               reg_id = PCF50633_REGULATOR_AUTO;
25421 +       else if (!strcmp(name, "voltage_down1"))
25422 +               reg_id = PCF50633_REGULATOR_DOWN1;
25423 +       else if (!strcmp(name, "voltage_down2"))
25424 +               reg_id = PCF50633_REGULATOR_DOWN2;
25425 +       else if (!strcmp(name, "voltage_memldo"))
25426 +               reg_id = PCF50633_REGULATOR_MEMLDO;
25427 +       else if (!strcmp(name, "voltage_ldo1"))
25428 +               reg_id = PCF50633_REGULATOR_LDO1;
25429 +       else if (!strcmp(name, "voltage_ldo2"))
25430 +               reg_id = PCF50633_REGULATOR_LDO2;
25431 +       else if (!strcmp(name, "voltage_ldo3"))
25432 +               reg_id = PCF50633_REGULATOR_LDO3;
25433 +       else if (!strcmp(name, "voltage_ldo4"))
25434 +               reg_id = PCF50633_REGULATOR_LDO4;
25435 +       else if (!strcmp(name, "voltage_ldo5"))
25436 +               reg_id = PCF50633_REGULATOR_LDO5;
25437 +       else if (!strcmp(name, "voltage_ldo6"))
25438 +               reg_id = PCF50633_REGULATOR_LDO6;
25439 +       else if (!strcmp(name, "voltage_hcldo"))
25440 +               reg_id = PCF50633_REGULATOR_HCLDO;
25441 +       else
25442 +               reg_id = -1;
25443 +
25444 +       return reg_id;
25445 +}
25446 +
25447 +static ssize_t show_vreg(struct device *dev, struct device_attribute *attr,
25448 +                        char *buf)
25449 +{
25450 +       struct i2c_client *client = to_i2c_client(dev);
25451 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25452 +       unsigned int reg_id;
25453 +
25454 +       reg_id = reg_id_by_name(attr->attr.name);
25455 +       if (reg_id < 0)
25456 +               return 0;
25457 +
25458 +       if (pcf50633_onoff_get(pcf, reg_id) > 0)
25459 +               return sprintf(buf, "%u\n", pcf50633_voltage_get(pcf, reg_id));
25460 +       else
25461 +               return strlcpy(buf, "0\n", PAGE_SIZE);
25462 +}
25463 +
25464 +static ssize_t set_vreg(struct device *dev, struct device_attribute *attr,
25465 +                       const char *buf, size_t count)
25466 +{
25467 +       struct i2c_client *client = to_i2c_client(dev);
25468 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25469 +       unsigned long mvolts = simple_strtoul(buf, NULL, 10);
25470 +       unsigned int reg_id;
25471 +
25472 +       reg_id = reg_id_by_name(attr->attr.name);
25473 +       if (reg_id < 0)
25474 +               return -EIO;
25475 +
25476 +       DEBUGP("attempting to set %s(%d) to %lu mvolts\n", attr->attr.name,
25477 +               reg_id, mvolts);
25478 +
25479 +       if (mvolts == 0) {
25480 +               pcf50633_onoff_set(pcf, reg_id, 0);
25481 +       } else {
25482 +               if (pcf50633_voltage_set(pcf, reg_id, mvolts) < 0) {
25483 +                       dev_warn(dev, "refusing to set %s(%d) to %lu mvolts "
25484 +                                "(max=%u)\n", attr->attr.name, reg_id, mvolts,
25485 +                                pcf->pdata->rails[reg_id].voltage.max);
25486 +                       return -EINVAL;
25487 +               }
25488 +               pcf50633_onoff_set(pcf, reg_id, 1);
25489 +       }
25490 +
25491 +       return count;
25492 +}
25493 +
25494 +static DEVICE_ATTR(voltage_auto, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25495 +static DEVICE_ATTR(voltage_down1, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25496 +static DEVICE_ATTR(voltage_down2, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25497 +static DEVICE_ATTR(voltage_memldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25498 +static DEVICE_ATTR(voltage_ldo1, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25499 +static DEVICE_ATTR(voltage_ldo2, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25500 +static DEVICE_ATTR(voltage_ldo3, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25501 +static DEVICE_ATTR(voltage_ldo4, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25502 +static DEVICE_ATTR(voltage_ldo5, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25503 +static DEVICE_ATTR(voltage_ldo6, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25504 +static DEVICE_ATTR(voltage_hcldo, S_IRUGO | S_IWUSR, show_vreg, set_vreg);
25505 +
25506 +/***********************************************************************
25507 + * Charger Control
25508 + ***********************************************************************/
25509 +
25510 +/* Set maximum USB current limit */
25511 +static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma)
25512 +{
25513 +       u_int8_t bits;
25514 +       int active = 0;
25515 +
25516 +       pcf->last_curlim_set = ma;
25517 +
25518 +       dev_dbg(&pcf->client.dev, "setting usb current limit to %d ma", ma);
25519 +
25520 +       if (ma >= 1000) {
25521 +               bits = PCF50633_MBCC7_USB_1000mA;
25522 +       }
25523 +       else if (ma >= 500)
25524 +               bits = PCF50633_MBCC7_USB_500mA;
25525 +       else if (ma >= 100)
25526 +               bits = PCF50633_MBCC7_USB_100mA;
25527 +       else
25528 +               bits = PCF50633_MBCC7_USB_SUSPEND;
25529 +
25530 +       /* set the nearest charging limit */
25531 +       reg_set_bit_mask(pcf, PCF50633_REG_MBCC7, PCF56033_MBCC7_USB_MASK,
25532 +                        bits);
25533 +
25534 +       /* with this charging limit, is charging actually meaningful? */
25535 +       switch (bits) {
25536 +       case PCF50633_MBCC7_USB_500mA:
25537 +       case PCF50633_MBCC7_USB_1000mA:
25538 +               /* yes with this charging limit, we can do real charging */
25539 +               active = 1;
25540 +               break;
25541 +       default:
25542 +               /* no charging is gonna be happening */
25543 +               break;
25544 +       }
25545 +       /*
25546 +        * enable or disable charging according to current limit -- this will
25547 +        * also throw a platform notification callback about it
25548 +        */
25549 +       pcf50633_charge_enable(pcf50633_global, active);
25550 +
25551 +       /* clear batfull */
25552 +       reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
25553 +                               PCF50633_MBCC1_AUTORES,
25554 +                               0);
25555 +       reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
25556 +                               PCF50633_MBCC1_RESUME,
25557 +                               PCF50633_MBCC1_RESUME);
25558 +       reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
25559 +                               PCF50633_MBCC1_AUTORES,
25560 +                               PCF50633_MBCC1_AUTORES);
25561 +
25562 +}
25563 +
25564 +static ssize_t show_usblim(struct device *dev, struct device_attribute *attr,
25565 +                          char *buf)
25566 +{
25567 +       struct i2c_client *client = to_i2c_client(dev);
25568 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25569 +       u_int8_t usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
25570 +                                               PCF56033_MBCC7_USB_MASK;
25571 +       unsigned int ma;
25572 +
25573 +       if (usblim == PCF50633_MBCC7_USB_1000mA)
25574 +               ma = 1000;
25575 +       else if (usblim == PCF50633_MBCC7_USB_500mA)
25576 +               ma = 500;
25577 +       else if (usblim == PCF50633_MBCC7_USB_100mA)
25578 +               ma = 100;
25579 +       else
25580 +               ma = 0;
25581 +
25582 +       return sprintf(buf, "%u\n", ma);
25583 +}
25584 +static DEVICE_ATTR(usb_curlim, S_IRUGO | S_IWUSR, show_usblim, NULL);
25585 +
25586 +/* Enable/disable charging */
25587 +static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on)
25588 +{
25589 +       u_int8_t bits;
25590 +       u_int8_t usblim;
25591 +
25592 +       if (!(pcf->pdata->used_features & PCF50633_FEAT_MBC))
25593 +               return;
25594 +
25595 +       DEBUGPC("pcf50633_charge_enable %d\n", on);
25596 +
25597 +       if (on) {
25598 +               pcf->flags |= PCF50633_F_CHG_ENABLED;
25599 +               bits = PCF50633_MBCC1_CHGENA;
25600 +               usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
25601 +                                                       PCF56033_MBCC7_USB_MASK;
25602 +               switch (usblim) {
25603 +               case PCF50633_MBCC7_USB_1000mA:
25604 +               case PCF50633_MBCC7_USB_500mA:
25605 +                       if (pcf->flags & PCF50633_F_USB_PRESENT)
25606 +                               if (pcf->pdata->cb)
25607 +                                       pcf->pdata->cb(&pcf->client.dev,
25608 +                                                      PCF50633_FEAT_MBC,
25609 +                                                      PMU_EVT_CHARGER_ACTIVE);
25610 +                       break;
25611 +               default:
25612 +                       break;
25613 +               }
25614 +       } else {
25615 +               pcf->flags &= ~PCF50633_F_CHG_ENABLED;
25616 +               bits = 0;
25617 +               if (pcf->pdata->cb)
25618 +                       pcf->pdata->cb(&pcf->client.dev,
25619 +                                      PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
25620 +       }
25621 +       reg_set_bit_mask(pcf, PCF50633_REG_MBCC1, PCF50633_MBCC1_CHGENA,
25622 +                        bits);
25623 +}
25624 +
25625 +#if 0
25626 +#define ONE                    1000000
25627 +static u_int16_t adc_to_rntc(struct pcf50633_data *pcf, u_int16_t adc)
25628 +{
25629 +       u_int32_t r_batt = (adc * pcf->pdata->r_fix_batt) / (1023 - adc);
25630 +       u_int16_t r_ntc;
25631 +
25632 +       /* The battery NTC has a parallell 10kOhms resistor */
25633 +       r_ntc = ONE / ((ONE/r_batt) - (ONE/pcf->pdata->r_fix_batt_par));
25634 +
25635 +       return r_ntc;
25636 +}
25637 +#endif
25638 +static ssize_t show_battemp(struct device *dev, struct device_attribute *attr,
25639 +                           char *buf)
25640 +{
25641 +       return sprintf(buf, "\n");
25642 +}
25643 +static DEVICE_ATTR(battemp, S_IRUGO | S_IWUSR, show_battemp, NULL);
25644 +#if 0
25645 +static u_int16_t adc_to_chg_milliamps(struct pcf50633_data *pcf,
25646 +                                            u_int16_t adc_adcin1,
25647 +                                            u_int16_t adc_batvolt)
25648 +{
25649 +       u_int32_t res = ((adc_adcin1 - adc_batvolt) * 6000);
25650 +       return res / (pcf->pdata->r_sense_milli * 1024 / 1000);
25651 +}
25652 +#endif
25653 +static ssize_t show_chgcur(struct device *dev, struct device_attribute *attr,
25654 +                          char *buf)
25655 +{
25656 +       return sprintf(buf, "\n");
25657 +}
25658 +static DEVICE_ATTR(chgcur, S_IRUGO | S_IWUSR, show_chgcur, NULL);
25659 +
25660 +static const char *chgmode_names[] = {
25661 +       [PCF50633_MBCS2_MBC_PLAY]               = "play-only",
25662 +       [PCF50633_MBCS2_MBC_USB_PRE]            = "pre",
25663 +       [PCF50633_MBCS2_MBC_ADP_PRE]            = "pre",
25664 +       [PCF50633_MBCS2_MBC_USB_PRE_WAIT]       = "pre-wait",
25665 +       [PCF50633_MBCS2_MBC_ADP_PRE_WAIT]       = "pre-wait",
25666 +       [PCF50633_MBCS2_MBC_USB_FAST]           = "fast",
25667 +       [PCF50633_MBCS2_MBC_ADP_FAST]           = "fast",
25668 +       [PCF50633_MBCS2_MBC_USB_FAST_WAIT]      = "fast-wait",
25669 +       [PCF50633_MBCS2_MBC_ADP_FAST_WAIT]      = "fast-wait",
25670 +       [PCF50633_MBCS2_MBC_ADP_FAST_WAIT]      = "bat-full",
25671 +};
25672 +
25673 +static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr,
25674 +                           char *buf)
25675 +{
25676 +       struct i2c_client *client = to_i2c_client(dev);
25677 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25678 +       u_int8_t mbcs2 = reg_read(pcf, PCF50633_REG_MBCS2);
25679 +       u_int8_t chgmod = (mbcs2 & PCF50633_MBCS2_MBC_MASK);
25680 +
25681 +       return sprintf(buf, "%s\n", chgmode_names[chgmod]);
25682 +}
25683 +
25684 +static ssize_t set_chgmode(struct device *dev, struct device_attribute *attr,
25685 +                          const char *buf, size_t count)
25686 +{
25687 +       struct i2c_client *client = to_i2c_client(dev);
25688 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25689 +
25690 +       /* As opposed to the PCF50606, we can only enable or disable
25691 +        * charging and not directly jump into a certain mode! */
25692 +
25693 +       if (!strcmp(buf, "0\n"))
25694 +               pcf50633_charge_enable(pcf, 0);
25695 +       else
25696 +               pcf50633_charge_enable(pcf, 1);
25697 +
25698 +       return count;
25699 +}
25700 +
25701 +static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode);
25702 +
25703 +static const char *chgstate_names[] = {
25704 +       [PCF50633_FIDX_CHG_ENABLED]             = "enabled",
25705 +       [PCF50633_FIDX_CHG_PRESENT]             = "charger_present",
25706 +       [PCF50633_FIDX_USB_PRESENT]             = "usb_present",
25707 +       [PCF50633_FIDX_CHG_ERR]                 = "error",
25708 +       [PCF50633_FIDX_CHG_PROT]                = "protection",
25709 +       [PCF50633_FIDX_CHG_READY]               = "ready",
25710 +};
25711 +
25712 +static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr,
25713 +                           char *buf)
25714 +{
25715 +       struct i2c_client *client = to_i2c_client(dev);
25716 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25717 +
25718 +       char *b = buf;
25719 +       int i;
25720 +
25721 +       for (i = 0; i < 32; i++)
25722 +               if (pcf->flags & (1 << i) && i < ARRAY_SIZE(chgstate_names))
25723 +                       b += sprintf(b, "%s ", chgstate_names[i]);
25724 +
25725 +       if (b > buf)
25726 +               b += sprintf(b, "\n");
25727 +
25728 +       return b - buf;
25729 +}
25730 +static DEVICE_ATTR(chgstate, S_IRUGO | S_IWUSR, show_chgstate, NULL);
25731 +
25732 +/***********************************************************************
25733 + * APM emulation
25734 + ***********************************************************************/
25735 +
25736 +extern void (*apm_get_power_status)(struct apm_power_info *);
25737 +
25738 +static void pcf50633_get_power_status(struct apm_power_info *info)
25739 +{
25740 +        struct pcf50633_data *pcf = pcf50633_global;
25741 +       u_int8_t chgmod = reg_read(pcf, PCF50633_REG_MBCS2) &
25742 +                                  PCF50633_MBCS2_MBC_MASK;
25743 +
25744 +       u_int16_t battvolt = pcf50633_battvolt(pcf);
25745 +
25746 +       if (reg_read(pcf, PCF50633_REG_MBCS1) &
25747 +                       (PCF50633_MBCS1_USBPRES|PCF50633_MBCS1_ADAPTPRES))
25748 +               info->ac_line_status = APM_AC_ONLINE;
25749 +       else
25750 +               info->ac_line_status = APM_AC_OFFLINE;
25751 +
25752 +       switch (chgmod) {
25753 +       case PCF50633_MBCS2_MBC_PLAY:
25754 +       case PCF50633_MBCS2_MBC_USB_PRE:
25755 +       case PCF50633_MBCS2_MBC_USB_PRE_WAIT:
25756 +       case PCF50633_MBCS2_MBC_USB_FAST_WAIT:
25757 +       case PCF50633_MBCS2_MBC_ADP_PRE:
25758 +       case PCF50633_MBCS2_MBC_ADP_PRE_WAIT:
25759 +       case PCF50633_MBCS2_MBC_ADP_FAST_WAIT:
25760 +       case PCF50633_MBCS2_MBC_BAT_FULL:
25761 +       case PCF50633_MBCS2_MBC_HALT:
25762 +               info->battery_life = battvolt_scale(battvolt);
25763 +               break;
25764 +       case PCF50633_MBCS2_MBC_USB_FAST:
25765 +       case PCF50633_MBCS2_MBC_ADP_FAST:
25766 +               info->battery_status = APM_BATTERY_STATUS_CHARGING;
25767 +               info->battery_flag = APM_BATTERY_FLAG_CHARGING;
25768 +       default:
25769 +               break;
25770 +       }
25771 +}
25772 +
25773 +/***********************************************************************
25774 + * RTC
25775 + ***********************************************************************/
25776 +enum pcf50633_time_indexes {
25777 +       PCF50633_TI_SEC = 0,
25778 +       PCF50633_TI_MIN,
25779 +       PCF50633_TI_HOUR,
25780 +       PCF50633_TI_WKDAY,
25781 +       PCF50633_TI_DAY,
25782 +       PCF50633_TI_MONTH,
25783 +       PCF50633_TI_YEAR,
25784 +       PCF50633_TI_EXTENT /* always last */
25785 +};
25786 +
25787 +
25788 +struct pcf50633_time {
25789 +       u_int8_t time[PCF50633_TI_EXTENT];
25790 +};
25791 +
25792 +static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf)
25793 +{
25794 +       rtc->tm_sec = BCD2BIN(pcf->time[PCF50633_TI_SEC]);
25795 +       rtc->tm_min = BCD2BIN(pcf->time[PCF50633_TI_MIN]);
25796 +       rtc->tm_hour = BCD2BIN(pcf->time[PCF50633_TI_HOUR]);
25797 +       rtc->tm_wday = BCD2BIN(pcf->time[PCF50633_TI_WKDAY]);
25798 +       rtc->tm_mday = BCD2BIN(pcf->time[PCF50633_TI_DAY]);
25799 +       rtc->tm_mon = BCD2BIN(pcf->time[PCF50633_TI_MONTH]);
25800 +       rtc->tm_year = BCD2BIN(pcf->time[PCF50633_TI_YEAR]) + 100;
25801 +}
25802 +
25803 +static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc)
25804 +{
25805 +       pcf->time[PCF50633_TI_SEC] = BIN2BCD(rtc->tm_sec);
25806 +       pcf->time[PCF50633_TI_MIN] = BIN2BCD(rtc->tm_min);
25807 +       pcf->time[PCF50633_TI_HOUR] = BIN2BCD(rtc->tm_hour);
25808 +       pcf->time[PCF50633_TI_WKDAY] = BIN2BCD(rtc->tm_wday);
25809 +       pcf->time[PCF50633_TI_DAY] = BIN2BCD(rtc->tm_mday);
25810 +       pcf->time[PCF50633_TI_MONTH] = BIN2BCD(rtc->tm_mon);
25811 +       pcf->time[PCF50633_TI_YEAR] = BIN2BCD(rtc->tm_year - 100);
25812 +}
25813 +
25814 +static int pcf50633_rtc_ioctl(struct device *dev, unsigned int cmd,
25815 +                             unsigned long arg)
25816 +{
25817 +       struct i2c_client *client = to_i2c_client(dev);
25818 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25819 +
25820 +       switch (cmd) {
25821 +       case RTC_AIE_OFF:
25822 +               /* disable the alarm interrupt */
25823 +               reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
25824 +                                PCF50633_INT1_ALARM, PCF50633_INT1_ALARM);
25825 +               return 0;
25826 +       case RTC_AIE_ON:
25827 +               /* enable the alarm interrupt */
25828 +               reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_ALARM);
25829 +               return 0;
25830 +       case RTC_PIE_OFF:
25831 +               /* disable periodic interrupt (hz tick) */
25832 +               pcf->flags &= ~PCF50633_F_RTC_SECOND;
25833 +               reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
25834 +                                PCF50633_INT1_SECOND, PCF50633_INT1_SECOND);
25835 +               return 0;
25836 +       case RTC_PIE_ON:
25837 +               /* ensable periodic interrupt (hz tick) */
25838 +               pcf->flags |= PCF50633_F_RTC_SECOND;
25839 +               reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
25840 +               return 0;
25841 +       }
25842 +       return -ENOIOCTLCMD;
25843 +}
25844 +
25845 +static int pcf50633_rtc_read_time(struct device *dev, struct rtc_time *tm)
25846 +{
25847 +       struct i2c_client *client = to_i2c_client(dev);
25848 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25849 +       struct pcf50633_time pcf_tm;
25850 +       int ret;
25851 +
25852 +       mutex_lock(&pcf->lock);
25853 +
25854 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client,
25855 +                                           PCF50633_REG_RTCSC,
25856 +                                           PCF50633_TI_EXTENT,
25857 +                                           &pcf_tm.time[0]);
25858 +       if (ret != PCF50633_TI_EXTENT)
25859 +               dev_err(dev, "Failed to read time :-(\n");
25860 +
25861 +       mutex_unlock(&pcf->lock);
25862 +
25863 +       dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
25864 +               pcf_tm.time[PCF50633_TI_DAY],
25865 +               pcf_tm.time[PCF50633_TI_MONTH],
25866 +               pcf_tm.time[PCF50633_TI_YEAR],
25867 +               pcf_tm.time[PCF50633_TI_HOUR],
25868 +               pcf_tm.time[PCF50633_TI_MIN],
25869 +               pcf_tm.time[PCF50633_TI_SEC]);
25870 +
25871 +       pcf2rtc_time(tm, &pcf_tm);
25872 +
25873 +       dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
25874 +               tm->tm_mday, tm->tm_mon, tm->tm_year,
25875 +               tm->tm_hour, tm->tm_min, tm->tm_sec);
25876 +
25877 +       return 0;
25878 +}
25879 +
25880 +static int pcf50633_rtc_set_time(struct device *dev, struct rtc_time *tm)
25881 +{
25882 +       struct i2c_client *client = to_i2c_client(dev);
25883 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25884 +       struct pcf50633_time pcf_tm;
25885 +       int ret;
25886 +
25887 +       dev_dbg(dev, "RTC_TIME: %u.%u.%u %u:%u:%u\n",
25888 +               tm->tm_mday, tm->tm_mon, tm->tm_year,
25889 +               tm->tm_hour, tm->tm_min, tm->tm_sec);
25890 +       rtc2pcf_time(&pcf_tm, tm);
25891 +       dev_dbg(dev, "PCF_TIME: %02x.%02x.%02x %02x:%02x:%02x\n",
25892 +               pcf_tm.time[PCF50633_TI_DAY],
25893 +               pcf_tm.time[PCF50633_TI_MONTH],
25894 +               pcf_tm.time[PCF50633_TI_YEAR],
25895 +               pcf_tm.time[PCF50633_TI_HOUR],
25896 +               pcf_tm.time[PCF50633_TI_MIN],
25897 +               pcf_tm.time[PCF50633_TI_SEC]);
25898 +
25899 +       mutex_lock(&pcf->lock);
25900 +       /* FIXME: disable second interrupt */
25901 +
25902 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
25903 +                                            PCF50633_REG_RTCSC,
25904 +                                            PCF50633_TI_EXTENT,
25905 +                                            &pcf_tm.time[0]);
25906 +       if (ret)
25907 +               dev_err(dev, "Failed to set time %d\n", ret);
25908 +
25909 +       /* FIXME: re-enable second interrupt */
25910 +       mutex_unlock(&pcf->lock);
25911 +
25912 +       return 0;
25913 +}
25914 +
25915 +static int pcf50633_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
25916 +{
25917 +       struct i2c_client *client = to_i2c_client(dev);
25918 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25919 +       struct pcf50633_time pcf_tm;
25920 +       int ret;
25921 +
25922 +       mutex_lock(&pcf->lock);
25923 +
25924 +       alrm->enabled =
25925 +            __reg_read(pcf, PCF50633_REG_INT1M) & PCF50633_INT1_ALARM ? 0 : 1;
25926 +
25927 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client,
25928 +                                           PCF50633_REG_RTCSCA,
25929 +                                           PCF50633_TI_EXTENT,
25930 +                                           &pcf_tm.time[0]);
25931 +       if (ret != PCF50633_TI_EXTENT)
25932 +               dev_err(dev, "Failed to read Alarm time :-(\n");
25933 +
25934 +       mutex_unlock(&pcf->lock);
25935 +
25936 +       pcf2rtc_time(&alrm->time, &pcf_tm);
25937 +
25938 +       return 0;
25939 +}
25940 +
25941 +static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
25942 +{
25943 +       struct i2c_client *client = to_i2c_client(dev);
25944 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
25945 +       struct pcf50633_time pcf_tm;
25946 +       u_int8_t irqmask;
25947 +       int ret;
25948 +
25949 +       rtc2pcf_time(&pcf_tm, &alrm->time);
25950 +
25951 +       mutex_lock(&pcf->lock);
25952 +
25953 +       /* disable alarm interrupt */
25954 +       irqmask = __reg_read(pcf, PCF50633_REG_INT1M);
25955 +       irqmask |= PCF50633_INT1_ALARM;
25956 +       __reg_write(pcf, PCF50633_REG_INT1M, irqmask);
25957 +
25958 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
25959 +                                            PCF50633_REG_RTCSCA,
25960 +                                            PCF50633_TI_EXTENT,
25961 +                                            &pcf_tm.time[0]);
25962 +       if (ret)
25963 +               dev_err(dev, "Failed to write alarm time :-( %d\n", ret);
25964 +
25965 +       if (alrm->enabled) {
25966 +               /* (re-)enaable alarm interrupt */
25967 +               irqmask = __reg_read(pcf, PCF50633_REG_INT1M);
25968 +               irqmask &= ~PCF50633_INT1_ALARM;
25969 +               __reg_write(pcf, PCF50633_REG_INT1M, irqmask);
25970 +       }
25971 +
25972 +       mutex_unlock(&pcf->lock);
25973 +
25974 +       /* FIXME */
25975 +       return 0;
25976 +}
25977 +
25978 +static struct rtc_class_ops pcf50633_rtc_ops = {
25979 +       .ioctl          = pcf50633_rtc_ioctl,
25980 +       .read_time      = pcf50633_rtc_read_time,
25981 +       .set_time       = pcf50633_rtc_set_time,
25982 +       .read_alarm     = pcf50633_rtc_read_alarm,
25983 +       .set_alarm      = pcf50633_rtc_set_alarm,
25984 +};
25985 +
25986 +/***********************************************************************
25987 + * Backlight device
25988 + ***********************************************************************/
25989 +
25990 +static int pcf50633bl_get_intensity(struct backlight_device *bd)
25991 +{
25992 +       struct pcf50633_data *pcf = bl_get_data(bd);
25993 +       int intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
25994 +
25995 +       if (!(reg_read(pcf, PCF50633_REG_LEDENA) & 1))
25996 +               intensity = 0;
25997 +
25998 +       return intensity & 0x3f;
25999 +}
26000 +
26001 +static int __pcf50633bl_set_intensity(struct pcf50633_data *pcf, int intensity)
26002 +{
26003 +       int old_intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
26004 +       int ret;
26005 +
26006 +       if (!(reg_read(pcf, PCF50633_REG_LEDENA) & 1))
26007 +               old_intensity = 0;
26008 +
26009 +       /*
26010 +        * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60)
26011 +        * if seen, you have to re-enable the LED unit
26012 +        * we treat intensity 0 as disable
26013 +        */
26014 +
26015 +       if (intensity && !old_intensity) {
26016 +               ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x00);
26017 +               if (ret)
26018 +                       return ret;
26019 +       }
26020 +
26021 +       if (!intensity) /* illegal to set LEDOUT to 0 */
26022 +               ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x00);
26023 +       else {
26024 +               ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
26025 +                              intensity);
26026 +               if (ret)
26027 +                       return ret;
26028 +               ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDENA, 0x01, 0x01);
26029 +       }
26030 +
26031 +       return ret;
26032 +}
26033 +
26034 +static int pcf50633bl_set_intensity(struct backlight_device *bd)
26035 +{
26036 +       struct pcf50633_data *pcf = bl_get_data(bd);
26037 +       int intensity = bd->props.brightness;
26038 +
26039 +       if ((bd->props.power != FB_BLANK_UNBLANK) ||
26040 +           (bd->props.fb_blank != FB_BLANK_UNBLANK))
26041 +               intensity = 0;
26042 +
26043 +       return __pcf50633bl_set_intensity(pcf, intensity);
26044 +}
26045 +
26046 +static struct backlight_ops pcf50633bl_ops = {
26047 +       .get_brightness = pcf50633bl_get_intensity,
26048 +       .update_status  = pcf50633bl_set_intensity,
26049 +};
26050 +
26051 +/*
26052 + * Charger type
26053 + */
26054 +
26055 +static ssize_t show_charger_type(struct device *dev,
26056 +                                struct device_attribute *attr, char *buf)
26057 +{
26058 +       struct i2c_client *client = to_i2c_client(dev);
26059 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26060 +       static const char *names_charger_type[] = {
26061 +               [CHARGER_TYPE_NONE]     = "none",
26062 +               [CHARGER_TYPE_HOSTUSB]  = "host/500mA usb",
26063 +               [CHARGER_TYPE_1A]       = "charger 1A",
26064 +       };
26065 +       static const char *names_charger_modes[] = {
26066 +               [PCF50633_MBCC7_USB_1000mA]     = "1A",
26067 +               [PCF50633_MBCC7_USB_500mA]      = "500mA",
26068 +               [PCF50633_MBCC7_USB_100mA]      = "100mA",
26069 +               [PCF50633_MBCC7_USB_SUSPEND]    = "suspend",
26070 +       };
26071 +       int mode = reg_read(pcf, PCF50633_REG_MBCC7) & PCF56033_MBCC7_USB_MASK;
26072 +
26073 +       return sprintf(buf, "%s mode %s\n",
26074 +                           names_charger_type[pcf->charger_type],
26075 +                           names_charger_modes[mode]);
26076 +}
26077 +
26078 +static DEVICE_ATTR(charger_type, 0444, show_charger_type, NULL);
26079 +
26080 +static ssize_t force_usb_limit_dangerous(struct device *dev,
26081 +                  struct device_attribute *attr, const char *buf, size_t count)
26082 +{
26083 +       struct i2c_client *client = to_i2c_client(dev);
26084 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26085 +       int ma = simple_strtoul(buf, NULL, 10);
26086 +
26087 +       pcf50633_usb_curlim_set(pcf, ma);
26088 +       return count;
26089 +}
26090 +
26091 +static DEVICE_ATTR(force_usb_limit_dangerous, 0600,
26092 +                                              NULL, force_usb_limit_dangerous);
26093 +
26094 +/*
26095 + * Charger adc
26096 + */
26097 +
26098 +static ssize_t show_charger_adc(struct device *dev,
26099 +                               struct device_attribute *attr, char *buf)
26100 +{
26101 +       struct i2c_client *client = to_i2c_client(dev);
26102 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26103 +
26104 +       return sprintf(buf, "%d\n", pcf->charger_adc_result_raw);
26105 +}
26106 +
26107 +static DEVICE_ATTR(charger_adc, 0444, show_charger_adc, NULL);
26108 +
26109 +/*
26110 + * Dump regs
26111 + */
26112 +
26113 +static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
26114 +                           char *buf)
26115 +{
26116 +       struct i2c_client *client = to_i2c_client(dev);
26117 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26118 +       u8 dump[16];
26119 +       int n, n1, idx = 0;
26120 +       char *buf1 = buf;
26121 +       static u8 address_no_read[] = { /* must be ascending */
26122 +               PCF50633_REG_INT1,
26123 +               PCF50633_REG_INT2,
26124 +               PCF50633_REG_INT3,
26125 +               PCF50633_REG_INT4,
26126 +               PCF50633_REG_INT5,
26127 +               0 /* terminator */
26128 +       };
26129 +
26130 +       for (n = 0; n < 256; n += sizeof(dump)) {
26131 +
26132 +               for (n1 = 0; n1 < sizeof(dump); n1++)
26133 +                       if (n == address_no_read[idx]) {
26134 +                               idx++;
26135 +                               dump[n1] = 0x00;
26136 +                       } else
26137 +                               dump[n1] = reg_read(pcf, n + n1);
26138 +
26139 +               hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
26140 +               buf1 += strlen(buf1);
26141 +               *buf1++ = '\n';
26142 +               *buf1 = '\0';
26143 +       }
26144 +
26145 +       return buf1 - buf;
26146 +}
26147 +
26148 +static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
26149 +
26150 +
26151 +/***********************************************************************
26152 + * Driver initialization
26153 + ***********************************************************************/
26154 +
26155 +/*
26156 + * CARE!  This table is modified at runtime!
26157 + */
26158 +static struct attribute *pcf_sysfs_entries[] = {
26159 +       &dev_attr_voltage_auto.attr,
26160 +       &dev_attr_voltage_down1.attr,
26161 +       &dev_attr_voltage_down2.attr,
26162 +       &dev_attr_voltage_memldo.attr,
26163 +       &dev_attr_voltage_ldo1.attr,
26164 +       &dev_attr_voltage_ldo2.attr,
26165 +       &dev_attr_voltage_ldo3.attr,
26166 +       &dev_attr_voltage_ldo4.attr,
26167 +       &dev_attr_voltage_ldo5.attr,
26168 +       &dev_attr_voltage_ldo6.attr,
26169 +       &dev_attr_voltage_hcldo.attr,
26170 +       &dev_attr_charger_type.attr,
26171 +       &dev_attr_force_usb_limit_dangerous.attr,
26172 +       &dev_attr_charger_adc.attr,
26173 +       &dev_attr_dump_regs.attr,
26174 +       NULL, /* going to add things at this point! */
26175 +       NULL,
26176 +       NULL,
26177 +       NULL,
26178 +       NULL,
26179 +       NULL,
26180 +       NULL,
26181 +};
26182 +
26183 +static struct attribute_group pcf_attr_group = {
26184 +       .name   = NULL,                 /* put in device directory */
26185 +       .attrs  = pcf_sysfs_entries,
26186 +};
26187 +
26188 +static void populate_sysfs_group(struct pcf50633_data *pcf)
26189 +{
26190 +       int i = 0;
26191 +       struct attribute **attr;
26192 +
26193 +       for (attr = pcf_sysfs_entries; *attr; attr++)
26194 +               i++;
26195 +
26196 +       if (pcf->pdata->used_features & PCF50633_FEAT_MBC) {
26197 +               pcf_sysfs_entries[i++] = &dev_attr_chgstate.attr;
26198 +               pcf_sysfs_entries[i++] = &dev_attr_chgmode.attr;
26199 +               pcf_sysfs_entries[i++] = &dev_attr_usb_curlim.attr;
26200 +       }
26201 +
26202 +       if (pcf->pdata->used_features & PCF50633_FEAT_CHGCUR)
26203 +               pcf_sysfs_entries[i++] = &dev_attr_chgcur.attr;
26204 +
26205 +       if (pcf->pdata->used_features & PCF50633_FEAT_BATVOLT)
26206 +               pcf_sysfs_entries[i++] = &dev_attr_battvolt.attr;
26207 +
26208 +       if (pcf->pdata->used_features & PCF50633_FEAT_BATTEMP)
26209 +               pcf_sysfs_entries[i++] = &dev_attr_battemp.attr;
26210 +
26211 +}
26212 +
26213 +static int pcf50633_detect(struct i2c_adapter *adapter, int address, int kind)
26214 +{
26215 +       struct i2c_client *new_client;
26216 +       struct pcf50633_data *pcf;
26217 +       int err = 0;
26218 +       int irq;
26219 +
26220 +       DEBUGP("entering\n");
26221 +       if (!pcf50633_pdev) {
26222 +               printk(KERN_ERR "pcf50633: driver needs a platform_device!\n");
26223 +               return -EIO;
26224 +       }
26225 +
26226 +       irq = platform_get_irq(pcf50633_pdev, 0);
26227 +       if (irq < 0) {
26228 +               dev_err(&pcf50633_pdev->dev, "no irq in platform resources!\n");
26229 +               return -EIO;
26230 +       }
26231 +
26232 +       /* At the moment, we only support one PCF50633 in a system */
26233 +       if (pcf50633_global) {
26234 +               dev_err(&pcf50633_pdev->dev,
26235 +                       "currently only one chip supported\n");
26236 +               return -EBUSY;
26237 +       }
26238 +
26239 +       pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
26240 +       if (!pcf)
26241 +               return -ENOMEM;
26242 +
26243 +       mutex_init(&pcf->lock);
26244 +       mutex_init(&pcf->working_lock);
26245 +       mutex_init(&pcf->working_lock_nobat);
26246 +       mutex_init(&pcf->working_lock_usb_curlimit);
26247 +       INIT_WORK(&pcf->work, pcf50633_work);
26248 +       INIT_WORK(&pcf->work_nobat, pcf50633_work_nobat);
26249 +       INIT_WORK(&pcf->work_usb_curlimit, pcf50633_work_usbcurlim);
26250 +       pcf->irq = irq;
26251 +       pcf->working = 0;
26252 +       pcf->suppress_onkey_events = 0;
26253 +       pcf->onkey_seconds = -1;
26254 +       pcf->pdata = pcf50633_pdev->dev.platform_data;
26255 +
26256 +       new_client = &pcf->client;
26257 +       i2c_set_clientdata(new_client, pcf);
26258 +       new_client->addr = address;
26259 +       new_client->adapter = adapter;
26260 +       new_client->driver = &pcf50633_driver;
26261 +       new_client->flags = 0;
26262 +       strlcpy(new_client->name, "pcf50633", I2C_NAME_SIZE);
26263 +
26264 +       /* now we try to detect the chip */
26265 +
26266 +       /* register with i2c core */
26267 +       if ((err = i2c_attach_client(new_client))) {
26268 +               dev_err(&new_client->dev,
26269 +                       "error during i2c_attach_client()\n");
26270 +               goto exit_free;
26271 +       }
26272 +
26273 +       init_resume_dependency_list(&pcf->resume_dependency);
26274 +
26275 +       populate_sysfs_group(pcf);
26276 +
26277 +       err = sysfs_create_group(&new_client->dev.kobj, &pcf_attr_group);
26278 +       if (err) {
26279 +               dev_err(&new_client->dev, "error creating sysfs group\n");
26280 +               goto exit_detach;
26281 +       }
26282 +
26283 +       /* create virtual charger 'device' */
26284 +
26285 +       /* register power off handler with core power management */
26286 +       pm_power_off = &pcf50633_go_standby;
26287 +
26288 +       pcf->input_dev = input_allocate_device();
26289 +       if (!pcf->input_dev)
26290 +               goto exit_sysfs;
26291 +
26292 +       pcf->input_dev->name = "GTA02 PMU events";
26293 +       pcf->input_dev->phys = "FIXME";
26294 +       pcf->input_dev->id.bustype = BUS_I2C;
26295 +       pcf->input_dev->cdev.dev = &new_client->dev;
26296 +
26297 +       pcf->input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_PWR);
26298 +       set_bit(KEY_POWER, pcf->input_dev->keybit);
26299 +       set_bit(KEY_POWER2, pcf->input_dev->keybit);
26300 +       set_bit(KEY_BATTERY, pcf->input_dev->keybit);
26301 +
26302 +       err = input_register_device(pcf->input_dev);
26303 +       if (err)
26304 +               goto exit_sysfs;
26305 +
26306 +       /* configure interrupt mask */
26307 +       /* we want SECOND to kick for the coldplug initialisation */
26308 +       reg_write(pcf, PCF50633_REG_INT1M, 0x00);
26309 +       reg_write(pcf, PCF50633_REG_INT2M, 0x00);
26310 +       reg_write(pcf, PCF50633_REG_INT3M, 0x00);
26311 +       reg_write(pcf, PCF50633_REG_INT4M, 0x00);
26312 +       reg_write(pcf, PCF50633_REG_INT5M, 0x00);
26313 +
26314 +       err = request_irq(irq, pcf50633_irq, IRQF_TRIGGER_FALLING,
26315 +                         "pcf50633", pcf);
26316 +       if (err < 0)
26317 +               goto exit_input;
26318 +
26319 +       if (enable_irq_wake(irq) < 0)
26320 +               dev_err(&new_client->dev, "IRQ %u cannot be enabled as wake-up"
26321 +                       "source in this hardware revision!", irq);
26322 +
26323 +       if (pcf->pdata->used_features & PCF50633_FEAT_RTC) {
26324 +               pcf->rtc = rtc_device_register("pcf50633", &new_client->dev,
26325 +                                               &pcf50633_rtc_ops, THIS_MODULE);
26326 +               if (IS_ERR(pcf->rtc)) {
26327 +                       err = PTR_ERR(pcf->rtc);
26328 +                       goto exit_irq;
26329 +               }
26330 +       }
26331 +
26332 +       if (pcf->pdata->used_features & PCF50633_FEAT_PWM_BL) {
26333 +               pcf->backlight = backlight_device_register("pcf50633-bl",
26334 +                                                           &new_client->dev,
26335 +                                                           pcf,
26336 +                                                           &pcf50633bl_ops);
26337 +               if (!pcf->backlight)
26338 +                       goto exit_rtc;
26339 +               /* FIXME: are we sure we want default == off? */
26340 +               pcf->backlight->props.max_brightness = 0x3f;
26341 +               pcf->backlight->props.power = FB_BLANK_UNBLANK;
26342 +               pcf->backlight->props.fb_blank = FB_BLANK_UNBLANK;
26343 +               pcf->backlight->props.brightness =
26344 +                                       pcf->backlight->props.max_brightness;
26345 +               backlight_update_status(pcf->backlight);
26346 +       }
26347 +
26348 +       if (pcf->pdata->flag_use_apm_emulation)
26349 +               apm_get_power_status = pcf50633_get_power_status;
26350 +
26351 +       pcf->probe_completed = 1;
26352 +       pcf50633_global = pcf;
26353 +       dev_info(&new_client->dev, "probe completed\n");
26354 +
26355 +       /* if platform was interested, give him a chance to register
26356 +        * platform devices that switch power with us as the parent
26357 +        * at registration time -- ensures suspend / resume ordering
26358 +        */
26359 +       if (pcf->pdata->attach_child_devices)
26360 +               (pcf->pdata->attach_child_devices)(&new_client->dev);
26361 +
26362 +       return 0;
26363 +exit_rtc:
26364 +       if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
26365 +               rtc_device_unregister(pcf50633_global->rtc);
26366 +exit_irq:
26367 +       free_irq(pcf50633_global->irq, pcf50633_global);
26368 +exit_input:
26369 +       input_unregister_device(pcf->input_dev);
26370 +exit_sysfs:
26371 +       pm_power_off = NULL;
26372 +       sysfs_remove_group(&new_client->dev.kobj, &pcf_attr_group);
26373 +exit_detach:
26374 +       i2c_detach_client(new_client);
26375 +exit_free:
26376 +       kfree(pcf);
26377 +       pcf50633_global = NULL;
26378 +       return err;
26379 +}
26380 +
26381 +static int pcf50633_attach_adapter(struct i2c_adapter *adapter)
26382 +{
26383 +       DEBUGP("entering, calling i2c_probe\n");
26384 +       return i2c_probe(adapter, &addr_data, &pcf50633_detect);
26385 +}
26386 +
26387 +static int pcf50633_detach_client(struct i2c_client *client)
26388 +{
26389 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26390 +
26391 +       DEBUGP("entering\n");
26392 +
26393 +       apm_get_power_status = NULL;
26394 +
26395 +       free_irq(pcf->irq, pcf);
26396 +
26397 +       input_unregister_device(pcf->input_dev);
26398 +
26399 +       if (pcf->pdata->used_features & PCF50633_FEAT_PWM_BL)
26400 +               backlight_device_unregister(pcf->backlight);
26401 +
26402 +       if (pcf->pdata->used_features & PCF50633_FEAT_RTC)
26403 +               rtc_device_unregister(pcf->rtc);
26404 +
26405 +       sysfs_remove_group(&client->dev.kobj, &pcf_attr_group);
26406 +
26407 +       pm_power_off = NULL;
26408 +
26409 +       kfree(pcf);
26410 +
26411 +       return 0;
26412 +}
26413 +
26414 +/* you're going to need >300 bytes in buf */
26415 +
26416 +int pcf50633_report_resumers(struct pcf50633_data *pcf, char *buf)
26417 +{
26418 +       static char *int_names[] = {
26419 +               "adpins",
26420 +               "adprem",
26421 +               "usbins",
26422 +               "usbrem",
26423 +               NULL,
26424 +               NULL,
26425 +               "rtcalarm",
26426 +               "second",
26427 +
26428 +               "onkeyr",
26429 +               "onkeyf",
26430 +               "exton1r",
26431 +               "exton1f",
26432 +               "exton2r",
26433 +               "exton2f",
26434 +               "exton3r",
26435 +               "exton3f",
26436 +
26437 +               "batfull",
26438 +               "chghalt",
26439 +               "thlimon",
26440 +               "thlimoff",
26441 +               "usblimon",
26442 +               "usblimoff",
26443 +               "adcrdy",
26444 +               "onkey1s",
26445 +
26446 +               "lowsys",
26447 +               "lowbat",
26448 +               "hightmp",
26449 +               "autopwrfail",
26450 +               "dwn1pwrfail",
26451 +               "dwn2pwrfail",
26452 +               "ledpwrfail",
26453 +               "ledovp",
26454 +
26455 +               "ldo1pwrfail",
26456 +               "ldo2pwrfail",
26457 +               "ldo3pwrfail",
26458 +               "ldo4pwrfail",
26459 +               "ldo5pwrfail",
26460 +               "ldo6pwrfail",
26461 +               "hcidopwrfail",
26462 +               "hcidoovl"
26463 +       };
26464 +       char *end = buf;
26465 +       int n;
26466 +
26467 +       for (n = 0; n < ARRAY_SIZE(int_names); n++)
26468 +               if (int_names[n]) {
26469 +                       if (pcf->pcfirq_resume[n >> 3] & (1 >> (n & 7)))
26470 +                               end += sprintf(end, "  * %s\n", int_names[n]);
26471 +                       else
26472 +                               end += sprintf(end, "    %s\n", int_names[n]);
26473 +               }
26474 +
26475 +       return end - buf;
26476 +}
26477 +
26478 +
26479 +#ifdef CONFIG_PM
26480 +
26481 +/*
26482 + * we need to export this because pcf50633_data is kept opaque
26483 + */
26484 +
26485 +void pcf50633_register_resume_dependency(struct pcf50633_data *pcf,
26486 +                                       struct resume_dependency *dep)
26487 +{
26488 +       register_resume_dependency(&pcf->resume_dependency, dep);
26489 +       if (pcf->is_suspended)
26490 +               activate_all_resume_dependencies(&pcf->resume_dependency);
26491 +}
26492 +EXPORT_SYMBOL_GPL(pcf50633_register_resume_dependency);
26493 +
26494 +
26495 +static int pcf50633_suspend(struct device *dev, pm_message_t state)
26496 +{
26497 +       struct i2c_client *client = to_i2c_client(dev);
26498 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26499 +       int i;
26500 +       int ret;
26501 +       u_int8_t tmp;
26502 +       u_int8_t res[5];
26503 +
26504 +       dev_err(dev, "pcf50633_suspend\n");
26505 +
26506 +       /* we suspend once (!) as late as possible in the suspend sequencing */
26507 +
26508 +       if ((state.event != PM_EVENT_SUSPEND) ||
26509 +           (pcf->suspend_state != PCF50633_SS_RUNNING))
26510 +               return -EBUSY;
26511 +
26512 +       /* The general idea is to power down all unused power supplies,
26513 +        * and then mask all PCF50633 interrupt sources but EXTONR, ONKEYF
26514 +        * and ALARM */
26515 +
26516 +       mutex_lock(&pcf->lock);
26517 +
26518 +       pcf->suspend_state = PCF50633_SS_STARTING_SUSPEND;
26519 +
26520 +       /* we are not going to service any further interrupts until we
26521 +        * resume.  If the IRQ workqueue is still pending in the background,
26522 +        * it will bail when it sees we set suspend state above
26523 +        */
26524 +
26525 +       disable_irq(pcf->irq);
26526 +
26527 +       /* Save all registers that don't "survive" standby state */
26528 +       pcf->standby_regs.ooctim2 = __reg_read(pcf, PCF50633_REG_OOCTIM2);
26529 +
26530 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client,
26531 +                                           PCF50633_REG_AUTOOUT,
26532 +                                           sizeof(pcf->standby_regs.misc),
26533 +                                           &pcf->standby_regs.misc[0]);
26534 +       if (ret != sizeof(pcf->standby_regs.misc))
26535 +               dev_err(dev, "Failed to save misc levels and enables :-(\n");
26536 +
26537 +       /* regulator voltages and enable states */
26538 +       ret = i2c_smbus_read_i2c_block_data(&pcf->client,
26539 +                                           PCF50633_REG_LDO1OUT,
26540 +                                           sizeof(pcf->standby_regs.ldo),
26541 +                                           &pcf->standby_regs.ldo[0]);
26542 +       if (ret != sizeof(pcf->standby_regs.ldo))
26543 +               dev_err(dev, "Failed to save LDO levels and enables :-(\n");
26544 +
26545 +       /* switch off power supplies that are not needed during suspend */
26546 +       for (i = 0; i < __NUM_PCF50633_REGULATORS; i++) {
26547 +               if ((pcf->pdata->rails[i].flags & PMU_VRAIL_F_SUSPEND_ON))
26548 +                       continue;
26549 +
26550 +               /* we can save ourselves the read part of a read-modify-write
26551 +                * here because we captured all these already
26552 +                */
26553 +               if (i < 4)
26554 +                       tmp = pcf->standby_regs.misc[i * 4 + 1];
26555 +               else
26556 +                       tmp = pcf->standby_regs.ldo[(i - 4) * 2 + 1];
26557 +
26558 +               dev_dbg(dev, "disabling reg %s by setting ENA %d to 0x%02X\n",
26559 +                             pcf->pdata->rails[i].name,
26560 +                             regulator_registers[i] + 1, tmp & 0xfe);
26561 +
26562 +               /* associated enable is always +1 from OUT reg */
26563 +               __reg_write(pcf, regulator_registers[i] + 1, tmp & 0xfe);
26564 +       }
26565 +
26566 +       /* turn off the backlight */
26567 +       __reg_write(pcf, PCF50633_REG_LEDDIM, 0);
26568 +       __reg_write(pcf, PCF50633_REG_LEDOUT, 2);
26569 +       __reg_write(pcf, PCF50633_REG_LEDENA, 0x00);
26570 +
26571 +       /* set interrupt masks so only those sources we want to wake
26572 +        * us are able to
26573 +        */
26574 +       for (i = 0; i < 5; i++)
26575 +               res[i] = ~pcf->pdata->resumers[i];
26576 +
26577 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
26578 +                                            PCF50633_REG_INT1M,
26579 +                                            5, &res[0]);
26580 +       if (ret)
26581 +               dev_err(dev, "Failed to set wake masks :-( %d\n", ret);
26582 +
26583 +       pcf->suspend_state = PCF50633_SS_COMPLETED_SUSPEND;
26584 +
26585 +       mutex_unlock(&pcf->lock);
26586 +
26587 +       pcf->is_suspended = 1;
26588 +       activate_all_resume_dependencies(&pcf->resume_dependency);
26589 +       return 0;
26590 +}
26591 +
26592 +
26593 +int pcf50633_ready(struct pcf50633_data *pcf)
26594 +{
26595 +       if (!pcf)
26596 +               return -EACCES;
26597 +
26598 +       /* this was seen during boot with Qi, mmc_rescan racing us */
26599 +       if (!pcf->probe_completed)
26600 +               return -EACCES;
26601 +
26602 +       if ((pcf->suspend_state != PCF50633_SS_RUNNING) &&
26603 +           (pcf->suspend_state < PCF50633_SS_COMPLETED_RESUME))
26604 +               return -EBUSY;
26605 +
26606 +       return 0;
26607 +}
26608 +EXPORT_SYMBOL_GPL(pcf50633_ready);
26609 +
26610 +int pcf50633_wait_for_ready(struct pcf50633_data *pcf, int timeout_ms,
26611 +                                                               char *name)
26612 +{
26613 +       /* so we always go once */
26614 +       timeout_ms += 5;
26615 +
26616 +       while ((timeout_ms >= 5) && (pcf50633_ready(pcf))) {
26617 +               timeout_ms -= 5; /* well, it isn't very accurate, but OK */
26618 +               msleep(5);
26619 +       }
26620 +
26621 +       if (timeout_ms < 5) {
26622 +               printk(KERN_ERR"pcf50633_wait_for_ready: "
26623 +                                       "%s BAILING on timeout\n", name);
26624 +               return -EBUSY;
26625 +       }
26626 +
26627 +       return 0;
26628 +}
26629 +EXPORT_SYMBOL_GPL(pcf50633_wait_for_ready);
26630 +
26631 +/*
26632 + * if backlight resume is selected to be deferred by platform, then it
26633 + * can call this to finally reset backlight status (after LCM is resumed
26634 + * for example
26635 + */
26636 +
26637 +void pcf50633_backlight_resume(struct pcf50633_data *pcf)
26638 +{
26639 +       dev_dbg(&pcf->client.dev, "pcf50633_backlight_resume\n");
26640 +
26641 +       /* platform defines resume ramp speed */
26642 +       reg_write(pcf, PCF50633_REG_LEDDIM,
26643 +                                      pcf->pdata->resume_backlight_ramp_speed);
26644 +
26645 +       __pcf50633bl_set_intensity(pcf, pcf->backlight->props.brightness);
26646 +}
26647 +EXPORT_SYMBOL_GPL(pcf50633_backlight_resume);
26648 +
26649 +
26650 +static int pcf50633_resume(struct device *dev)
26651 +{
26652 +       struct i2c_client *client = to_i2c_client(dev);
26653 +       struct pcf50633_data *pcf = i2c_get_clientdata(client);
26654 +       int ret;
26655 +       u8 res[5];
26656 +       u8 misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT + 1];
26657 +
26658 +       dev_dbg(dev, "pcf50633_resume suspended on entry = %d\n",
26659 +                                                (int)pcf->suspend_state);
26660 +       mutex_lock(&pcf->lock);
26661 +
26662 +       pcf->suspend_state = PCF50633_SS_STARTING_RESUME;
26663 +
26664 +       /* these guys get reset while pcf50633 is suspend state, refresh */
26665 +
26666 +       __reg_write(pcf, PCF50633_REG_OOCTIM2, pcf->standby_regs.ooctim2);
26667 +
26668 +       memcpy(misc, pcf->standby_regs.misc, sizeof(pcf->standby_regs.misc));
26669 +
26670 +       if (pcf->pdata->defer_resume_backlight) {
26671 +               misc[PCF50633_REG_LEDOUT - PCF50633_REG_AUTOOUT] = 1;
26672 +               misc[PCF50633_REG_LEDENA - PCF50633_REG_AUTOOUT] = 0x20;
26673 +               misc[PCF50633_REG_LEDCTL - PCF50633_REG_AUTOOUT] = 1;
26674 +               misc[PCF50633_REG_LEDDIM - PCF50633_REG_AUTOOUT] = 1;
26675 +       }
26676 +
26677 +       /* regulator voltages and enable states */
26678 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
26679 +                                            PCF50633_REG_AUTOOUT,
26680 +                                            sizeof(misc),
26681 +                                            &misc[0]);
26682 +       if (ret)
26683 +               dev_err(dev, "Failed to restore misc :-( %d\n", ret);
26684 +
26685 +       /* platform can choose to defer backlight bringup */
26686 +       if (!pcf->pdata->defer_resume_backlight)
26687 +               pcf50633_backlight_resume(pcf);
26688 +
26689 +       /* regulator voltages and enable states */
26690 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
26691 +                                            PCF50633_REG_LDO1OUT,
26692 +                                            sizeof(pcf->standby_regs.ldo),
26693 +                                            &pcf->standby_regs.ldo[0]);
26694 +       if (ret)
26695 +               dev_err(dev, "Failed to restore LDOs :-( %d\n", ret);
26696 +
26697 +       memset(res, 0, sizeof(res));
26698 +       /* not interested in second on resume */
26699 +       res[0] = PCF50633_INT1_SECOND;
26700 +       ret = i2c_smbus_write_i2c_block_data(&pcf->client,
26701 +                                            PCF50633_REG_INT1M,
26702 +                                            5, &res[0]);
26703 +       if (ret)
26704 +               dev_err(dev, "Failed to set int masks :-( %d\n", ret);
26705 +
26706 +       pcf->suspend_state = PCF50633_SS_COMPLETED_RESUME;
26707 +
26708 +       enable_irq(pcf->irq);
26709 +
26710 +       mutex_unlock(&pcf->lock);
26711 +
26712 +       /* gratuitous call to PCF work function, in the case that the PCF
26713 +        * interrupt edge was missed during resume, this forces the pending
26714 +        * register clear and lifts the interrupt back high again.  In the
26715 +        * case nothing is waiting for service, no harm done.
26716 +        */
26717 +
26718 +       get_device(&pcf->client.dev);
26719 +       pcf50633_work(&pcf->work);
26720 +
26721 +       pcf->is_suspended = 0;
26722 +       callback_all_resume_dependencies(&pcf->resume_dependency);
26723 +
26724 +       return 0;
26725 +}
26726 +#else
26727 +#define pcf50633_suspend NULL
26728 +#define pcf50633_resume NULL
26729 +#endif
26730 +
26731 +static struct i2c_driver pcf50633_driver = {
26732 +       .driver = {
26733 +               .name   = "pcf50633",
26734 +               .suspend= pcf50633_suspend,
26735 +               .resume = pcf50633_resume,
26736 +       },
26737 +       .id             = I2C_DRIVERID_PCF50633,
26738 +       .attach_adapter = pcf50633_attach_adapter,
26739 +       .detach_client  = pcf50633_detach_client,
26740 +};
26741 +
26742 +/* we have this purely to capture an early indication that we are coming out
26743 + * of suspend, before our device resume got called; async interrupt service is
26744 + * interested in this
26745 + */
26746 +
26747 +static int pcf50633_plat_resume(struct platform_device *pdev)
26748 +{
26749 +       /* i2c_get_clientdata(to_i2c_client(&pdev->dev)) returns NULL at this
26750 +        * early resume time so we have to use pcf50633_global
26751 +        */
26752 +       pcf50633_global->suspend_state = PCF50633_SS_RESUMING_BUT_NOT_US_YET;
26753 +
26754 +       return 0;
26755 +}
26756 +
26757 +/* platform driver, since i2c devices don't have platform_data */
26758 +static int __init pcf50633_plat_probe(struct platform_device *pdev)
26759 +{
26760 +       struct pcf50633_platform_data *pdata = pdev->dev.platform_data;
26761 +
26762 +       if (!pdata)
26763 +               return -ENODEV;
26764 +
26765 +       pcf50633_pdev = pdev;
26766 +
26767 +       return 0;
26768 +}
26769 +
26770 +static int pcf50633_plat_remove(struct platform_device *pdev)
26771 +{
26772 +       return 0;
26773 +}
26774 +
26775 +static struct platform_driver pcf50633_plat_driver = {
26776 +       .probe  = pcf50633_plat_probe,
26777 +       .remove = pcf50633_plat_remove,
26778 +       .resume_early = pcf50633_plat_resume,
26779 +       .driver = {
26780 +               .owner  = THIS_MODULE,
26781 +               .name   = "pcf50633",
26782 +       },
26783 +};
26784 +
26785 +static int __init pcf50633_init(void)
26786 +{
26787 +       int rc;
26788 +
26789 +       if (!(rc = platform_driver_register(&pcf50633_plat_driver)))
26790 +               rc = i2c_add_driver(&pcf50633_driver);
26791 +
26792 +       return rc;
26793 +}
26794 +
26795 +static void pcf50633_exit(void)
26796 +{
26797 +       i2c_del_driver(&pcf50633_driver);
26798 +       platform_driver_unregister(&pcf50633_plat_driver);
26799 +}
26800 +
26801 +MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 power management unit");
26802 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
26803 +MODULE_LICENSE("GPL");
26804 +
26805 +module_init(pcf50633_init);
26806 +module_exit(pcf50633_exit);
26807 Index: linux-2.6.24.7/drivers/i2c/chips/pcf50633.h
26808 ===================================================================
26809 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
26810 +++ linux-2.6.24.7/drivers/i2c/chips/pcf50633.h 2008-12-11 22:46:49.000000000 +0100
26811 @@ -0,0 +1,349 @@
26812 +#ifndef _PCF50633_H
26813 +#define _PCF50633_H
26814 +
26815 +/* Philips PCF50633 Power Managemnt Unit (PMU) driver
26816 + * (C) 2006-2007 by Openmoko, Inc.
26817 + * Author: Harald Welte <laforge@openmoko.org>
26818 + *
26819 + */
26820 +
26821 +enum pfc50633_regs {
26822 +       PCF50633_REG_VERSION    = 0x00,
26823 +       PCF50633_REG_VARIANT    = 0x01,
26824 +       PCF50633_REG_INT1       = 0x02, /* Interrupt Status */
26825 +       PCF50633_REG_INT2       = 0x03, /* Interrupt Status */
26826 +       PCF50633_REG_INT3       = 0x04, /* Interrupt Status */
26827 +       PCF50633_REG_INT4       = 0x05, /* Interrupt Status */
26828 +       PCF50633_REG_INT5       = 0x06, /* Interrupt Status */
26829 +       PCF50633_REG_INT1M      = 0x07, /* Interrupt Mask */
26830 +       PCF50633_REG_INT2M      = 0x08, /* Interrupt Mask */
26831 +       PCF50633_REG_INT3M      = 0x09, /* Interrupt Mask */
26832 +       PCF50633_REG_INT4M      = 0x0a, /* Interrupt Mask */
26833 +       PCF50633_REG_INT5M      = 0x0b, /* Interrupt Mask */
26834 +       PCF50633_REG_OOCSHDWN   = 0x0c,
26835 +       PCF50633_REG_OOCWAKE    = 0x0d,
26836 +       PCF50633_REG_OOCTIM1    = 0x0e,
26837 +       PCF50633_REG_OOCTIM2    = 0x0f,
26838 +       PCF50633_REG_OOCMODE    = 0x10,
26839 +       PCF50633_REG_OOCCTL     = 0x11,
26840 +       PCF50633_REG_OOCSTAT    = 0x12,
26841 +       PCF50633_REG_GPIOCTL    = 0x13,
26842 +       PCF50633_REG_GPIO1CFG   = 0x14,
26843 +       PCF50633_REG_GPIO2CFG   = 0x15,
26844 +       PCF50633_REG_GPIO3CFG   = 0x16,
26845 +       PCF50633_REG_GPOCFG     = 0x17,
26846 +       PCF50633_REG_BVMCTL     = 0x18,
26847 +       PCF50633_REG_SVMCTL     = 0x19,
26848 +       PCF50633_REG_AUTOOUT    = 0x1a,
26849 +       PCF50633_REG_AUTOENA    = 0x1b,
26850 +       PCF50633_REG_AUTOCTL    = 0x1c,
26851 +       PCF50633_REG_AUTOMXC    = 0x1d,
26852 +       PCF50633_REG_DOWN1OUT   = 0x1e,
26853 +       PCF50633_REG_DOWN1ENA   = 0x1f,
26854 +       PCF50633_REG_DOWN1CTL   = 0x20,
26855 +       PCF50633_REG_DOWN1MXC   = 0x21,
26856 +       PCF50633_REG_DOWN2OUT   = 0x22,
26857 +       PCF50633_REG_DOWN2ENA   = 0x23,
26858 +       PCF50633_REG_DOWN2CTL   = 0x24,
26859 +       PCF50633_REG_DOWN2MXC   = 0x25,
26860 +       PCF50633_REG_MEMLDOOUT  = 0x26,
26861 +       PCF50633_REG_MEMLDOENA  = 0x27,
26862 +       PCF50633_REG_LEDOUT     = 0x28,
26863 +       PCF50633_REG_LEDENA     = 0x29,
26864 +       PCF50633_REG_LEDCTL     = 0x2a,
26865 +       PCF50633_REG_LEDDIM     = 0x2b,
26866 +       /* reserved */
26867 +       PCF50633_REG_LDO1OUT    = 0x2d,
26868 +       PCF50633_REG_LDO1ENA    = 0x2e,
26869 +       PCF50633_REG_LDO2OUT    = 0x2f,
26870 +       PCF50633_REG_LDO2ENA    = 0x30,
26871 +       PCF50633_REG_LDO3OUT    = 0x31,
26872 +       PCF50633_REG_LDO3ENA    = 0x32,
26873 +       PCF50633_REG_LDO4OUT    = 0x33,
26874 +       PCF50633_REG_LDO4ENA    = 0x34,
26875 +       PCF50633_REG_LDO5OUT    = 0x35,
26876 +       PCF50633_REG_LDO5ENA    = 0x36,
26877 +       PCF50633_REG_LDO6OUT    = 0x37,
26878 +       PCF50633_REG_LDO6ENA    = 0x38,
26879 +       PCF50633_REG_HCLDOOUT   = 0x39,
26880 +       PCF50633_REG_HCLDOENA   = 0x3a,
26881 +       PCF50633_REG_STBYCTL1   = 0x3b,
26882 +       PCF50633_REG_STBYCTL2   = 0x3c,
26883 +       PCF50633_REG_DEBPF1     = 0x3d,
26884 +       PCF50633_REG_DEBPF2     = 0x3e,
26885 +       PCF50633_REG_DEBPF3     = 0x3f,
26886 +       PCF50633_REG_HCLDOOVL   = 0x40,
26887 +       PCF50633_REG_DCDCSTAT   = 0x41,
26888 +       PCF50633_REG_LDOSTAT    = 0x42,
26889 +       PCF50633_REG_MBCC1      = 0x43,
26890 +       PCF50633_REG_MBCC2      = 0x44,
26891 +       PCF50633_REG_MBCC3      = 0x45,
26892 +       PCF50633_REG_MBCC4      = 0x46,
26893 +       PCF50633_REG_MBCC5      = 0x47,
26894 +       PCF50633_REG_MBCC6      = 0x48,
26895 +       PCF50633_REG_MBCC7      = 0x49,
26896 +       PCF50633_REG_MBCC8      = 0x4a,
26897 +       PCF50633_REG_MBCS1      = 0x4b,
26898 +       PCF50633_REG_MBCS2      = 0x4c,
26899 +       PCF50633_REG_MBCS3      = 0x4d,
26900 +       PCF50633_REG_BBCCTL     = 0x4e,
26901 +       PCF50633_REG_ALMGAIN    = 0x4f,
26902 +       PCF50633_REG_ALMDATA    = 0x50,
26903 +       /* reserved */
26904 +       PCF50633_REG_ADCC3      = 0x52,
26905 +       PCF50633_REG_ADCC2      = 0x53,
26906 +       PCF50633_REG_ADCC1      = 0x54,
26907 +       PCF50633_REG_ADCS1      = 0x55,
26908 +       PCF50633_REG_ADCS2      = 0x56,
26909 +       PCF50633_REG_ADCS3      = 0x57,
26910 +       /* reserved */
26911 +       PCF50633_REG_RTCSC      = 0x59, /* Second */
26912 +       PCF50633_REG_RTCMN      = 0x5a, /* Minute */
26913 +       PCF50633_REG_RTCHR      = 0x5b, /* Hour */
26914 +       PCF50633_REG_RTCWD      = 0x5c, /* Weekday */
26915 +       PCF50633_REG_RTCDT      = 0x5d, /* Day */
26916 +       PCF50633_REG_RTCMT      = 0x5e, /* Month */
26917 +       PCF50633_REG_RTCYR      = 0x5f, /* Year */
26918 +       PCF50633_REG_RTCSCA     = 0x60, /* Alarm Second */
26919 +       PCF50633_REG_RTCMNA     = 0x61, /* Alarm Minute */
26920 +       PCF50633_REG_RTCHRA     = 0x62, /* Alarm Hour */
26921 +       PCF50633_REG_RTCWDA     = 0x63, /* Alarm Weekday */
26922 +       PCF50633_REG_RTCDTA     = 0x64, /* Alarm Day */
26923 +       PCF50633_REG_RTCMTA     = 0x65, /* Alarm Month */
26924 +       PCF50633_REG_RTCYRA     = 0x66, /* Alarm Year */
26925 +
26926 +       PCF50633_REG_MEMBYTE0   = 0x67,
26927 +       PCF50633_REG_MEMBYTE1   = 0x68,
26928 +       PCF50633_REG_MEMBYTE2   = 0x69,
26929 +       PCF50633_REG_MEMBYTE3   = 0x6a,
26930 +       PCF50633_REG_MEMBYTE4   = 0x6b,
26931 +       PCF50633_REG_MEMBYTE5   = 0x6c,
26932 +       PCF50633_REG_MEMBYTE6   = 0x6d,
26933 +       PCF50633_REG_MEMBYTE7   = 0x6e,
26934 +       /* reserved */
26935 +       PCF50633_REG_DCDCPFM    = 0x84,
26936 +       __NUM_PCF50633_REGS
26937 +};
26938 +
26939 +
26940 +enum pcf50633_reg_oocshdwn {
26941 +       PCF50633_OOCSHDWN_GOSTDBY       = 0x01,
26942 +       PCF50633_OOCSHDWN_TOTRST        = 0x04,
26943 +       PCF50633_OOCSHDWN_COLDBOOT      = 0x08,
26944 +};
26945 +
26946 +enum pcf50633_reg_oocwake {
26947 +       PCF50633_OOCWAKE_ONKEY          = 0x01,
26948 +       PCF50633_OOCWAKE_EXTON1         = 0x02,
26949 +       PCF50633_OOCWAKE_EXTON2         = 0x04,
26950 +       PCF50633_OOCWAKE_EXTON3         = 0x08,
26951 +       PCF50633_OOCWAKE_RTC            = 0x10,
26952 +       /* reserved */
26953 +       PCF50633_OOCWAKE_USB            = 0x40,
26954 +       PCF50633_OOCWAKE_ADP            = 0x80,
26955 +};
26956 +
26957 +enum pcf50633_reg_mbcc1 {
26958 +       PCF50633_MBCC1_CHGENA           = 0x01, /* Charger enable */
26959 +       PCF50633_MBCC1_AUTOSTOP         = 0x02,
26960 +       PCF50633_MBCC1_AUTORES          = 0x04, /* automatic resume */
26961 +       PCF50633_MBCC1_RESUME           = 0x08, /* explicit resume cmd */
26962 +       PCF50633_MBCC1_RESTART          = 0x10, /* restart charging */
26963 +       PCF50633_MBCC1_PREWDTIME_60M    = 0x20, /* max. precharging time */
26964 +       PCF50633_MBCC1_WDTIME_1H        = 0x00,
26965 +       PCF50633_MBCC1_WDTIME_2H        = 0x40,
26966 +       PCF50633_MBCC1_WDTIME_4H        = 0x80,
26967 +       PCF50633_MBCC1_WDTIME_6H        = 0xc0,
26968 +};
26969 +#define PCF50633_MBCC1_WDTIME_MASK       0xc0
26970 +
26971 +enum pcf50633_reg_mbcc2 {
26972 +       PCF50633_MBCC2_VBATCOND_2V7     = 0x00,
26973 +       PCF50633_MBCC2_VBATCOND_2V85    = 0x01,
26974 +       PCF50633_MBCC2_VBATCOND_3V0     = 0x02,
26975 +       PCF50633_MBCC2_VBATCOND_3V15    = 0x03,
26976 +       PCF50633_MBCC2_VMAX_4V          = 0x00,
26977 +       PCF50633_MBCC2_VMAX_4V20        = 0x28,
26978 +       PCF50633_MBCC2_VRESDEBTIME_64S  = 0x80, /* debounce time (32/64sec) */
26979 +};
26980 +#define        PCF50633_MBCC2_VBATCOND_MASK      0x03
26981 +#define PCF50633_MBCC2_VMAX_MASK         0x3c
26982 +
26983 +enum pcf50633_reg_adcc1 {
26984 +       PCF50633_ADCC1_ADCSTART         = 0x01,
26985 +       PCF50633_ADCC1_RES_10BIT        = 0x02,
26986 +       PCF50633_ADCC1_AVERAGE_NO       = 0x00,
26987 +       PCF50633_ADCC1_AVERAGE_4        = 0x04,
26988 +       PCF50633_ADCC1_AVERAGE_8        = 0x08,
26989 +       PCF50633_ADCC1_AVERAGE_16       = 0x0c,
26990 +
26991 +       PCF50633_ADCC1_MUX_BATSNS_RES   = 0x00,
26992 +       PCF50633_ADCC1_MUX_BATSNS_SUBTR = 0x10,
26993 +       PCF50633_ADCC1_MUX_ADCIN2_RES   = 0x20,
26994 +       PCF50633_ADCC1_MUX_ADCIN2_SUBTR = 0x30,
26995 +       PCF50633_ADCC1_MUX_BATTEMP      = 0x60,
26996 +       PCF50633_ADCC1_MUX_ADCIN1       = 0x70,
26997 +};
26998 +#define PCF50633_ADCC1_AVERAGE_MASK    0x0c
26999 +#define        PCF50633_ADCC1_ADCMUX_MASK      0xf0
27000 +
27001 +enum pcf50633_reg_adcc2 {
27002 +       PCF50633_ADCC2_RATIO_NONE       = 0x00,
27003 +       PCF50633_ADCC2_RATIO_BATTEMP    = 0x01,
27004 +       PCF50633_ADCC2_RATIO_ADCIN1     = 0x02,
27005 +       PCF50633_ADCC2_RATIO_BOTH       = 0x03,
27006 +       PCF50633_ADCC2_RATIOSETTL_100US = 0x04,
27007 +};
27008 +#define PCF50633_ADCC2_RATIO_MASK      0x03
27009 +
27010 +enum pcf50633_reg_adcc3 {
27011 +       PCF50633_ADCC3_ACCSW_EN         = 0x01,
27012 +       PCF50633_ADCC3_NTCSW_EN         = 0x04,
27013 +       PCF50633_ADCC3_RES_DIV_TWO      = 0x10,
27014 +       PCF50633_ADCC3_RES_DIV_THREE    = 0x00,
27015 +};
27016 +
27017 +enum pcf50633_reg_adcs3 {
27018 +       PCF50633_ADCS3_REF_NTCSW        = 0x00,
27019 +       PCF50633_ADCS3_REF_ACCSW        = 0x10,
27020 +       PCF50633_ADCS3_REF_2V0          = 0x20,
27021 +       PCF50633_ADCS3_REF_VISA         = 0x30,
27022 +       PCF50633_ADCS3_REF_2V0_2        = 0x70,
27023 +       PCF50633_ADCS3_ADCRDY           = 0x80,
27024 +};
27025 +#define PCF50633_ADCS3_ADCDAT1L_MASK   0x03
27026 +#define PCF50633_ADCS3_ADCDAT2L_MASK   0x0c
27027 +#define PCF50633_ADCS3_ADCDAT2L_SHIFT  2
27028 +#define PCF50633_ASCS3_REF_MASK                0x70
27029 +
27030 +enum pcf50633_regulator_enable {
27031 +       PCF50633_REGULATOR_ON           = 0x01,
27032 +       PCF50633_REGULATOR_ON_GPIO1     = 0x02,
27033 +       PCF50633_REGULATOR_ON_GPIO2     = 0x04,
27034 +       PCF50633_REGULATOR_ON_GPIO3     = 0x08,
27035 +};
27036 +#define PCF50633_REGULATOR_ON_MASK     0x0f
27037 +
27038 +enum pcf50633_regulator_phase {
27039 +       PCF50633_REGULATOR_ACTPH1       = 0x00,
27040 +       PCF50633_REGULATOR_ACTPH2       = 0x10,
27041 +       PCF50633_REGULATOR_ACTPH3       = 0x20,
27042 +       PCF50633_REGULATOR_ACTPH4       = 0x30,
27043 +};
27044 +#define PCF50633_REGULATOR_ACTPH_MASK  0x30
27045 +
27046 +enum pcf50633_reg_gpocfg {
27047 +       PCF50633_GPOCFG_GPOSEL_0        = 0x00,
27048 +       PCF50633_GPOCFG_GPOSEL_LED_NFET = 0x01,
27049 +       PCF50633_GPOCFG_GPOSEL_SYSxOK   = 0x02,
27050 +       PCF50633_GPOCFG_GPOSEL_CLK32K   = 0x03,
27051 +       PCF50633_GPOCFG_GPOSEL_ADAPUSB  = 0x04,
27052 +       PCF50633_GPOCFG_GPOSEL_USBxOK   = 0x05,
27053 +       PCF50633_GPOCFG_GPOSEL_ACTPH4   = 0x06,
27054 +       PCF50633_GPOCFG_GPOSEL_1        = 0x07,
27055 +       PCF50633_GPOCFG_GPOSEL_INVERSE  = 0x08,
27056 +};
27057 +#define PCF50633_GPOCFG_GPOSEL_MASK    0x07
27058 +
27059 +#if 0
27060 +enum pcf50633_reg_mbcc1 {
27061 +       PCF50633_MBCC1_CHGENA           = 0x01,
27062 +       PCF50633_MBCC1_AUTOSTOP         = 0x02,
27063 +       PCF50633_MBCC1_AUTORES          = 0x04,
27064 +       PCF50633_MBCC1_RESUME           = 0x08,
27065 +       PCF50633_MBCC1_RESTART          = 0x10,
27066 +       PCF50633_MBCC1_PREWDTIME_30MIN  = 0x00,
27067 +       PCF50633_MBCC1_PREWDTIME_60MIN  = 0x20,
27068 +       PCF50633_MBCC1_WDTIME_2HRS      = 0x40,
27069 +       PCF50633_MBCC1_WDTIME_4HRS      = 0x80,
27070 +       PCF50633_MBCC1_WDTIME_6HRS      = 0xc0,
27071 +};
27072 +
27073 +enum pcf50633_reg_mbcc2 {
27074 +       PCF50633_MBCC2_VBATCOND_2V7     = 0x00,
27075 +       PCF50633_MBCC2_VBATCOND_2V85    = 0x01,
27076 +       PCF50633_MBCC2_VBATCOND_3V0     = 0x02,
27077 +       PCF50633_MBCC2_VBATCOND_3V15    = 0x03,
27078 +       PCF50633_MBCC2_VRESDEBTIME_64S  = 0x80,
27079 +};
27080 +#define PCF50633_MBCC2_VMAX_MASK       0x3c
27081 +#endif
27082 +
27083 +enum pcf50633_reg_mbcc7 {
27084 +       PCF50633_MBCC7_USB_100mA        = 0x00,
27085 +       PCF50633_MBCC7_USB_500mA        = 0x01,
27086 +       PCF50633_MBCC7_USB_1000mA       = 0x02,
27087 +       PCF50633_MBCC7_USB_SUSPEND      = 0x03,
27088 +       PCF50633_MBCC7_BATTEMP_EN       = 0x04,
27089 +       PCF50633_MBCC7_BATSYSIMAX_1A6   = 0x00,
27090 +       PCF50633_MBCC7_BATSYSIMAX_1A8   = 0x40,
27091 +       PCF50633_MBCC7_BATSYSIMAX_2A0   = 0x80,
27092 +       PCF50633_MBCC7_BATSYSIMAX_2A2   = 0xc0,
27093 +};
27094 +#define PCF56033_MBCC7_USB_MASK                0x03
27095 +
27096 +enum pcf50633_reg_mbcc8 {
27097 +       PCF50633_MBCC8_USBENASUS        = 0x10,
27098 +};
27099 +
27100 +enum pcf50633_reg_mbcs1 {
27101 +       PCF50633_MBCS1_USBPRES          = 0x01,
27102 +       PCF50633_MBCS1_USBOK            = 0x02,
27103 +       PCF50633_MBCS1_ADAPTPRES        = 0x04,
27104 +       PCF50633_MBCS1_ADAPTOK          = 0x08,
27105 +       PCF50633_MBCS1_TBAT_OK          = 0x00,
27106 +       PCF50633_MBCS1_TBAT_ABOVE       = 0x10,
27107 +       PCF50633_MBCS1_TBAT_BELOW       = 0x20,
27108 +       PCF50633_MBCS1_TBAT_UNDEF       = 0x30,
27109 +       PCF50633_MBCS1_PREWDTEXP        = 0x40,
27110 +       PCF50633_MBCS1_WDTEXP           = 0x80,
27111 +};
27112 +
27113 +enum pcf50633_reg_mbcs2_mbcmod {
27114 +       PCF50633_MBCS2_MBC_PLAY         = 0x00,
27115 +       PCF50633_MBCS2_MBC_USB_PRE      = 0x01,
27116 +       PCF50633_MBCS2_MBC_USB_PRE_WAIT = 0x02,
27117 +       PCF50633_MBCS2_MBC_USB_FAST     = 0x03,
27118 +       PCF50633_MBCS2_MBC_USB_FAST_WAIT= 0x04,
27119 +       PCF50633_MBCS2_MBC_USB_SUSPEND  = 0x05,
27120 +       PCF50633_MBCS2_MBC_ADP_PRE      = 0x06,
27121 +       PCF50633_MBCS2_MBC_ADP_PRE_WAIT = 0x07,
27122 +       PCF50633_MBCS2_MBC_ADP_FAST     = 0x08,
27123 +       PCF50633_MBCS2_MBC_ADP_FAST_WAIT= 0x09,
27124 +       PCF50633_MBCS2_MBC_BAT_FULL     = 0x0a,
27125 +       PCF50633_MBCS2_MBC_HALT         = 0x0b,
27126 +};
27127 +#define PCF50633_MBCS2_MBC_MASK                0x0f
27128 +enum pcf50633_reg_mbcs2_chgstat {
27129 +       PCF50633_MBCS2_CHGS_NONE        = 0x00,
27130 +       PCF50633_MBCS2_CHGS_ADAPTER     = 0x10,
27131 +       PCF50633_MBCS2_CHGS_USB         = 0x20,
27132 +       PCF50633_MBCS2_CHGS_BOTH        = 0x30,
27133 +};
27134 +#define PCF50633_MBCS2_RESSTAT_AUTO    0x40
27135 +
27136 +enum pcf50633_reg_mbcs3 {
27137 +       PCF50633_MBCS3_USBLIM_PLAY      = 0x01,
27138 +       PCF50633_MBCS3_USBLIM_CGH       = 0x02,
27139 +       PCF50633_MBCS3_TLIM_PLAY        = 0x04,
27140 +       PCF50633_MBCS3_TLIM_CHG         = 0x08,
27141 +       PCF50633_MBCS3_ILIM             = 0x10, /* 1: Ibat > Icutoff */
27142 +       PCF50633_MBCS3_VLIM             = 0x20, /* 1: Vbat == Vmax */
27143 +       PCF50633_MBCS3_VBATSTAT         = 0x40, /* 1: Vbat > Vbatcond */
27144 +       PCF50633_MBCS3_VRES             = 0x80, /* 1: Vbat > Vth(RES) */
27145 +};
27146 +
27147 +/* this is to be provided by the board implementation */
27148 +extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS];
27149 +
27150 +void pcf50633_reg_write(u_int8_t reg, u_int8_t val);
27151 +
27152 +u_int8_t pcf50633_reg_read(u_int8_t reg);
27153 +
27154 +void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
27155 +void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits);
27156 +
27157 +void pcf50633_charge_autofast(int on);
27158 +
27159 +#endif /* _PCF50606_H */
27160 +
27161 Index: linux-2.6.24.7/drivers/i2c/chips/tsl256x.c
27162 ===================================================================
27163 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
27164 +++ linux-2.6.24.7/drivers/i2c/chips/tsl256x.c  2008-12-11 22:46:49.000000000 +0100
27165 @@ -0,0 +1,310 @@
27166 +/*
27167 + * tsl256x.c  --  TSL256x Light Sensor driver
27168 + *
27169 + * Copyright 2007 by Fiwin.
27170 + * Author: Alec Tsai <alec_tsai@fiwin.com.tw>
27171 + *
27172 + * This program is free software; you can redistribute it and/or modify
27173 + * it under the terms of the GNU General Public License version 2 as
27174 + * published by the Free Software Foundation.
27175 + *
27176 + * This I2C client driver refers to pcf50606.c.
27177 + */
27178 +
27179 +#include <linux/module.h>
27180 +#include <linux/init.h>
27181 +#include <linux/i2c.h>
27182 +#include <linux/types.h>
27183 +#include <linux/input.h>
27184 +
27185 +#include "tsl256x.h"
27186 +
27187 +static unsigned short normal_i2c[] = { 0x39, I2C_CLIENT_END };
27188 +/* Magic definition of all other variables and things */
27189 +I2C_CLIENT_INSMOD;
27190 +
27191 +struct tsl256x_data {
27192 +       struct i2c_client       client;
27193 +       struct mutex            lock;
27194 +       struct input_dev        *input_dev;
27195 +};
27196 +
27197 +static struct i2c_driver tsl256x_driver;
27198 +
27199 +/******************************************************************************
27200 + * Low-Level routines
27201 + *****************************************************************************/
27202 +static inline int __reg_write(struct tsl256x_data *tsl, u_int8_t reg,
27203 +                                                               u_int8_t val)
27204 +{
27205 +       return i2c_smbus_write_byte_data(&tsl->client, reg, val);
27206 +}
27207 +
27208 +static int reg_write(struct tsl256x_data *tsl, u_int8_t reg, u_int8_t val)
27209 +{
27210 +       int ret;
27211 +
27212 +       mutex_lock(&tsl->lock);
27213 +       ret = __reg_write(tsl, reg, val);
27214 +       mutex_unlock(&tsl->lock);
27215 +
27216 +       return ret;
27217 +}
27218 +
27219 +static inline int32_t __reg_read(struct tsl256x_data *tsl, u_int8_t reg)
27220 +{
27221 +       int32_t ret;
27222 +
27223 +       ret = i2c_smbus_read_byte_data(&tsl->client, reg);
27224 +
27225 +       return ret;
27226 +}
27227 +
27228 +static u_int8_t reg_read(struct tsl256x_data *tsl, u_int8_t reg)
27229 +{
27230 +       int32_t ret;
27231 +
27232 +       mutex_lock(&tsl->lock);
27233 +       ret = __reg_read(tsl, reg);
27234 +       mutex_unlock(&tsl->lock);
27235 +
27236 +       return ret & 0xff;
27237 +}
27238 +
27239 +u_int32_t calculate_lux(u_int32_t iGain, u_int32_t iType, u_int32_t ch0,
27240 +                                               u_int32_t ch1)
27241 +{
27242 +       u_int32_t channel0 = ch0 * 636 / 10;
27243 +       u_int32_t channel1 = ch1 * 636 / 10;
27244 +       u_int32_t lux_value = 0;
27245 +       u_int32_t ratio = (channel1 * (2^RATIO_SCALE)) / channel0;
27246 +       u_int32_t b = 0, m = 0;
27247 +
27248 +       if (0 == ch0)
27249 +               return 0;
27250 +       else {
27251 +               if (ratio > (13 * (2^RATIO_SCALE) / 10))
27252 +                       return 0;
27253 +       }
27254 +
27255 +       switch (iType) {
27256 +               case 0: // T package
27257 +                       if ((ratio >= 0) && (ratio <= K1T)) {
27258 +                               b = B1T;
27259 +                               m = M1T;
27260 +                       } else if (ratio <= K2T) {
27261 +                               b = B2T;
27262 +                               m = M2T;
27263 +                       } else if (ratio <= K3T) {
27264 +                               b = B3T;
27265 +                               m = M3T;
27266 +                       } else if (ratio <= K4T) {
27267 +                               b = B4T;
27268 +                               m = M4T;
27269 +                       } else if (ratio <= K5T) {
27270 +                               b = B5T;
27271 +                               m = M5T;
27272 +                       } else if (ratio <= K6T) {
27273 +                               b = B6T;
27274 +                               m = M6T;
27275 +                       } else if (ratio <= K7T) {
27276 +                               b = B7T;
27277 +                               m = M7T;
27278 +                       } else if (ratio > K8T) {
27279 +                               b = B8T;
27280 +                               m = M8T;
27281 +                       }
27282 +               break;
27283 +               case 1:// CS package
27284 +                       if ((ratio >= 0) && (ratio <= K1C)) {
27285 +                               b = B1C;
27286 +                               m = M1C;
27287 +                       } else if (ratio <= K2C) {
27288 +                               b = B2C;
27289 +                               m = M2C;
27290 +                       } else if (ratio <= K3C) {
27291 +                               b = B3C;
27292 +                               m = M3C;
27293 +                       } else if (ratio <= K4C) {
27294 +                               b = B4C;
27295 +                               m = M4C;
27296 +                       } else if (ratio <= K5C) {
27297 +                               b = B5C;
27298 +                               m = M5C;
27299 +                       } else if (ratio <= K6C) {
27300 +                               b = B6C;
27301 +                               m = M6C;
27302 +                       } else if (ratio <= K7C) {
27303 +                               b = B7C;
27304 +                               m = M7C;
27305 +                       } else if (ratio > K8C) {
27306 +                               b = B8C;
27307 +                               m = M8C;
27308 +                       }
27309 +               break;
27310 +               default:
27311 +                       return 0;
27312 +               break;
27313 +       }
27314 +
27315 +       lux_value = ((channel0 * b) - (channel1 * m)) / 16384;
27316 +       return(lux_value);
27317 +}
27318 +
27319 +static ssize_t tsl256x_show_light_lux(struct device *dev,
27320 +                                       struct device_attribute *attr, char *buf)
27321 +{
27322 +       struct i2c_client *client = to_i2c_client(dev);
27323 +       struct tsl256x_data *tsl = i2c_get_clientdata(client);
27324 +       u_int8_t low_byte_of_ch0 = 0, high_byte_of_ch0 = 0;
27325 +       u_int8_t low_byte_of_ch1 = 0, high_byte_of_ch1 = 0;
27326 +       u_int32_t adc_value_ch0, adc_value_ch1, adc_value;
27327 +
27328 +       low_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0LOW);
27329 +       high_byte_of_ch0 = reg_read(tsl, TSL256X_REG_DATA0HIGH);
27330 +       low_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1LOW);
27331 +       high_byte_of_ch1 = reg_read(tsl, TSL256X_REG_DATA1HIGH);
27332 +
27333 +       adc_value_ch0 = (high_byte_of_ch0 * 256 + low_byte_of_ch0) * 16;
27334 +       adc_value_ch1 = (high_byte_of_ch1 * 256 + low_byte_of_ch1) * 16;
27335 +
27336 +       adc_value = calculate_lux(0, 0, adc_value_ch0, adc_value_ch1);
27337 +       return sprintf(buf, "%d\n", adc_value);
27338 +}
27339 +
27340 +static DEVICE_ATTR(light_lux, S_IRUGO, tsl256x_show_light_lux, NULL);
27341 +
27342 +static int tsl256x_detect(struct i2c_adapter *adapter, int address, int kind)
27343 +{
27344 +       struct i2c_client *new_client = NULL;
27345 +       struct tsl256x_data *tsl256x = NULL;
27346 +       u_int8_t id = 0;
27347 +       int res = 0;
27348 +
27349 +       if (!(tsl256x = kzalloc(sizeof(*tsl256x), GFP_KERNEL)))
27350 +               return -ENOMEM;
27351 +
27352 +       mutex_init(&tsl256x->lock);
27353 +       new_client = &tsl256x->client;
27354 +       i2c_set_clientdata(new_client, tsl256x);
27355 +       new_client->addr = address;
27356 +       new_client->adapter = adapter;
27357 +       new_client->driver = &tsl256x_driver;
27358 +       new_client->flags = 0;
27359 +       strlcpy(new_client->name, "tsl256x", I2C_NAME_SIZE);
27360 +
27361 +       /* now we try to detect the chip */
27362 +       /* register with i2c core */
27363 +       res = i2c_attach_client(new_client);
27364 +       if (res) {
27365 +               printk(KERN_DEBUG "[%s]Error: during i2c_attach_client()\n",
27366 +                       new_client->name);
27367 +               goto exit_free;
27368 +       } else {
27369 +               printk(KERN_INFO "TSL256X is attached to I2C bus.\n");
27370 +       }
27371 +
27372 +       /* Configure TSL256X. */
27373 +       {
27374 +               /* Power up TSL256X. */
27375 +               reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03);
27376 +
27377 +               /* Check TSL256X ID. */
27378 +               id = reg_read(tsl256x, TSL256X_REG_ID);
27379 +               if (TSL2561_ID == (id & 0xF0)) {
27380 +                       /* Configuring the Timing Register.
27381 +                               High Gain (16x), integration time of 101ms. */
27382 +                       reg_write(tsl256x, TSL256X_REG_TIMING, 0x11);
27383 +               } else {
27384 +                       goto exit_free;
27385 +               }
27386 +       }
27387 +
27388 +       res = device_create_file(&new_client->dev, &dev_attr_light_lux);
27389 +       if (res)
27390 +               goto exit_detach;
27391 +
27392 +       return 0;
27393 +
27394 +exit_free:
27395 +       kfree(tsl256x);
27396 +       return res;
27397 +exit_detach:
27398 +       i2c_detach_client(new_client);
27399 +       return res;
27400 +}
27401 +
27402 +static int tsl256x_attach_adapter(struct i2c_adapter *adapter)
27403 +{
27404 +       return i2c_probe(adapter, &addr_data, &tsl256x_detect);
27405 +}
27406 +
27407 +static int tsl256x_detach_client(struct i2c_client *client)
27408 +{
27409 +       struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
27410 +
27411 +       printk(KERN_INFO "Detach TSL256X from I2C bus.\n");
27412 +
27413 +       /* Power down TSL256X. */
27414 +       reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00);
27415 +
27416 +       device_remove_file(&client->dev, &dev_attr_light_lux);
27417 +       kfree(tsl256x);
27418 +
27419 +       return 0;
27420 +}
27421 +
27422 +#ifdef CONFIG_PM
27423 +static int tsl256x_suspend(struct device *dev, pm_message_t state)
27424 +{
27425 +       struct i2c_client *client = to_i2c_client(dev);
27426 +       struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
27427 +
27428 +       /* Power down TSL256X. */
27429 +       reg_write(tsl256x, TSL256X_REG_CONTROL, 0x00);
27430 +
27431 +       return 0;
27432 +}
27433 +
27434 +static int tsl256x_resume(struct device *dev)
27435 +{
27436 +       struct i2c_client *client = to_i2c_client(dev);
27437 +       struct tsl256x_data *tsl256x = i2c_get_clientdata(client);
27438 +
27439 +       /* Power up TSL256X. */
27440 +       reg_write(tsl256x, TSL256X_REG_CONTROL, 0x03);
27441 +
27442 +       return 0;
27443 +}
27444 +#endif
27445 +
27446 +static struct i2c_driver tsl256x_driver = {
27447 +       .driver = {
27448 +               .name           = "tsl256x",
27449 +               .owner          = THIS_MODULE,
27450 +#ifdef CONFIG_PM
27451 +               .suspend        = tsl256x_suspend,
27452 +               .resume         = tsl256x_resume,
27453 +#endif
27454 +       },
27455 +       .id                             = I2C_DRIVERID_TSL256X,
27456 +       .attach_adapter = tsl256x_attach_adapter,
27457 +       .detach_client  = tsl256x_detach_client,
27458 +};
27459 +
27460 +static int __init tsl256x_init(void)
27461 +{
27462 +       return i2c_add_driver(&tsl256x_driver);
27463 +}
27464 +
27465 +static void __exit tsl256x_exit(void)
27466 +{
27467 +       i2c_del_driver(&tsl256x_driver);
27468 +}
27469 +
27470 +MODULE_AUTHOR("Alec Tsai <alec_tsai@fiwin.com.tw>");
27471 +MODULE_LICENSE("GPL");
27472 +
27473 +module_init(tsl256x_init);
27474 +module_exit(tsl256x_exit);
27475 +
27476 Index: linux-2.6.24.7/drivers/i2c/chips/tsl256x.h
27477 ===================================================================
27478 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
27479 +++ linux-2.6.24.7/drivers/i2c/chips/tsl256x.h  2008-12-11 22:46:49.000000000 +0100
27480 @@ -0,0 +1,154 @@
27481 +/*
27482 + * tsl256x.h  --  TSL256x Light Sensor driver
27483 + *
27484 + * Copyright 2007 by Fiwin.
27485 + * Author: Alec Tsai <alec_tsai@fiwin.com.tw>
27486 + *
27487 + * This program is free software; you can redistribute it and/or modify
27488 + * it under the terms of the GNU General Public License version 2 as
27489 + * published by the Free Software Foundation.
27490 + *
27491 + * The contents of header file is copied from TSL256x Datasheet.
27492 + */
27493 +
27494 +#ifndef _TSL256X_H
27495 +#define _TSL256X_H
27496 +
27497 +#define        TSL2560_ID              0x00
27498 +#define        TSL2561_ID              0x10
27499 +
27500 +#define LUX_SCALE              14              /* scale by 2^14 */
27501 +#define RATIO_SCALE            9               /*scale ratio by 2^9 */
27502 +
27503 +/******************************************************************************
27504 + * Integration time scaling factors
27505 + *****************************************************************************/
27506 +#define CH_SCALE               10              /* scale channel values by 2^10 */
27507 +#define CHSCALE_TINT0  0x7517  /* 322/11 * 2^CH_SCALE */
27508 +#define CHSCALE_TINT1  0x0fe7  /* 322/81 * 2^CH_SCALE */
27509 +
27510 +/******************************************************************************
27511 + * T Package coefficients
27512 + *****************************************************************************/
27513 +/*
27514 + * For Ch1/Ch0=0.00 to 0.50
27515 + * Lux/Ch0=0.0304.0.062*((Ch1/Ch0)^1.4)
27516 + * piecewise approximation
27517 + * For Ch1/Ch0=0.00 to 0.125:
27518 + * Lux/Ch0=0.0304.0.0272*(Ch1/Ch0)
27519 + *
27520 + * For Ch1/Ch0=0.125 to 0.250:
27521 + * Lux/Ch0=0.0325.0.0440*(Ch1/Ch0)
27522 + *
27523 + * For Ch1/Ch0=0.250 to 0.375:
27524 + * Lux/Ch0=0.0351.0.0544*(Ch1/Ch0)
27525 + *
27526 + * For Ch1/Ch0=0.375 to 0.50:
27527 + * Lux/Ch0=0.0381.0.0624*(Ch1/Ch0)
27528 + *
27529 + * For Ch1/Ch0=0.50 to 0.61:
27530 + * Lux/Ch0=0.0224.0.031*(Ch1/Ch0)
27531 + *
27532 + * For Ch1/Ch0=0.61 to 0.80:
27533 + * Lux/Ch0=0.0128.0.0153*(Ch1/Ch0)
27534 + *
27535 + * For Ch1/Ch0=0.80 to 1.30:
27536 + * Lux/Ch0=0.00146.0.00112*(Ch1/Ch0)
27537 + *
27538 + * For Ch1/Ch0>1.3:
27539 + * Lux/Ch0=0
27540 + */
27541 +#define K1T 0x0040 /* 0.125 * 2^RATIO_SCALE */
27542 +#define B1T 0x01f2 /* 0.0304 * 2^LUX_SCALE */
27543 +#define M1T 0x01be /* 0.0272 * 2^LUX_SCALE */
27544 +#define K2T 0x0080 /* 0.250 * 2^RATIO_SCALE */
27545 +#define B2T 0x0214 /* 0.0325 * 2^LUX_SCALE */
27546 +#define M2T 0x02d1 /* 0.0440 * 2^LUX_SCALE */
27547 +#define K3T 0x00c0 /* 0.375 * 2^RATIO_SCALE */
27548 +#define B3T 0x023f /* 0.0351 * 2^LUX_SCALE */
27549 +#define M3T 0x037b /* 0.0544 * 2^LUX_SCALE */
27550 +#define K4T 0x0100 /* 0.50 * 2^RATIO_SCALE */
27551 +#define B4T 0x0270 /* 0.0381 * 2^LUX_SCALE */
27552 +#define M4T 0x03fe /* 0.0624 * 2^LUX_SCALE */
27553 +#define K5T 0x0138 /* 0.61 * 2^RATIO_SCALE */
27554 +#define B5T 0x016f /* 0.0224 * 2^LUX_SCALE */
27555 +#define M5T 0x01fc /* 0.0310 * 2^LUX_SCALE */
27556 +#define K6T 0x019a /* 0.80 * 2^RATIO_SCALE */
27557 +#define B6T 0x00d2 /* 0.0128 * 2^LUX_SCALE */
27558 +#define M6T 0x00fb /* 0.0153 * 2^LUX_SCALE */
27559 +#define K7T 0x029a /* 1.3 * 2^RATIO_SCALE */
27560 +#define B7T 0x0018 /* 0.00146 * 2^LUX_SCALE */
27561 +#define M7T 0x0012 /* 0.00112 * 2^LUX_SCALE */
27562 +#define K8T 0x029a /* 1.3 * 2^RATIO_SCALE */
27563 +#define B8T 0x0000 /* 0.000 * 2^LUX_SCALE */
27564 +#define M8T 0x0000 /* 0.000 * 2^LUX_SCALE */
27565 +
27566 +/******************************************************************************
27567 + * CS package coefficients
27568 + *****************************************************************************/
27569 +/*
27570 + * For 0 <= Ch1/Ch0 <= 0.52
27571 + * Lux/Ch0 = 0.0315.0.0593*((Ch1/Ch0)^1.4)
27572 + * piecewise approximation
27573 + * For 0 <= Ch1/Ch0 <= 0.13
27574 + * Lux/Ch0 = 0.0315.0.0262*(Ch1/Ch0)
27575 + * For 0.13 <= Ch1/Ch0 <= 0.26
27576 + * Lux/Ch0 = 0.0337.0.0430*(Ch1/Ch0)
27577 + * For 0.26 <= Ch1/Ch0 <= 0.39
27578 + * Lux/Ch0 = 0.0363.0.0529*(Ch1/Ch0)
27579 + * For 0.39 <= Ch1/Ch0 <= 0.52
27580 + * Lux/Ch0 = 0.0392.0.0605*(Ch1/Ch0)
27581 + * For 0.52 < Ch1/Ch0 <= 0.65
27582 + * Lux/Ch0 = 0.0229.0.0291*(Ch1/Ch0)
27583 + * For 0.65 < Ch1/Ch0 <= 0.80
27584 + * Lux/Ch0 = 0.00157.0.00180*(Ch1/Ch0)
27585 + * For 0.80 < Ch1/Ch0 <= 1.30
27586 + * Lux/Ch0 = 0.00338.0.00260*(Ch1/Ch0)
27587 + * For Ch1/Ch0 > 1.30
27588 + * Lux = 0
27589 + */
27590 +#define K1C 0x0043 /* 0.130 * 2^RATIO_SCALE */
27591 +#define B1C 0x0204 /* 0.0315 * 2^LUX_SCALE */
27592 +#define M1C 0x01ad /* 0.0262 * 2^LUX_SCALE */
27593 +#define K2C 0x0085 /* 0.260 * 2^RATIO_SCALE */
27594 +#define B2C 0x0228 /* 0.0337 * 2^LUX_SCALE */
27595 +#define M2C 0x02c1 /* 0.0430 * 2^LUX_SCALE */
27596 +#define K3C 0x00c8 /* 0.390 * 2^RATIO_SCALE */
27597 +#define B3C 0x0253 /* 0.0363 * 2^LUX_SCALE */
27598 +#define M3C 0x0363 /* 0.0529 * 2^LUX_SCALE */
27599 +#define K4C 0x010a /* 0.520 * 2^RATIO_SCALE */
27600 +#define B4C 0x0282 /* 0.0392 * 2^LUX_SCALE */
27601 +#define M4C 0x03df /* 0.0605 * 2^LUX_SCALE */
27602 +#define K5C 0x014d /* 0.65 * 2^RATIO_SCALE */
27603 +#define B5C 0x0177 /* 0.0229 * 2^LUX_SCALE */
27604 +#define M5C 0x01dd /* 0.0291 * 2^LUX_SCALE */
27605 +#define K6C 0x019a /* 0.80 * 2^RATIO_SCALE */
27606 +#define B6C 0x0101 /* 0.0157 * 2^LUX_SCALE */
27607 +#define M6C 0x0127 /* 0.0180 * 2^LUX_SCALE */
27608 +#define K7C 0x029a /* 1.3 * 2^RATIO_SCALE */
27609 +#define B7C 0x0037 /* 0.00338 * 2^LUX_SCALE */
27610 +#define M7C 0x002b /* 0.00260 * 2^LUX_SCALE */
27611 +#define K8C 0x029a /* 1.3 * 2^RATIO_SCALE */
27612 +#define B8C 0x0000 /* 0.000 * 2^LUX_SCALE */
27613 +#define M8C 0x0000 /* 0.000 * 2^LUX_SCALE */
27614 +
27615 +/* TSL256x registers definition . */
27616 +enum tsl256x_regs {
27617 +       TSL256X_REG_CONTROL                     = 0x80, /* Control of basic functions */
27618 +       TSL256X_REG_TIMING                      = 0x81, /* Integration time/gain control */
27619 +       TSL256X_REG_THRESHLOWLOW        = 0x82, /* Low byte of low interrupt threshold */
27620 +       TSL256X_REG_THRESHLOWHIGH       = 0x83, /* High byte of low interrupt threshold */
27621 +       TSL256X_REG_THRESHHIGHLOW       = 0x84, /* Low byte of high interrupt threshold */
27622 +       TSL256X_REG_THRESHHIGHHIGH      = 0x85, /* High byte of high interrupt threshold */
27623 +       TSL256X_REG_INTERRUPT           = 0x86, /* Interrupt control */
27624 +       TSL256X_REG_CRC                         = 0x88, /* Factory test - not a user register */
27625 +       TSL256X_REG_ID                          = 0x8A, /* Part number/ Rev ID */
27626 +       TSL256X_REG_DATA0LOW            = 0x8C, /* Low byte of ADC channel 0 */
27627 +       TSL256X_REG_DATA0HIGH           = 0x8D, /* High byte of ADC channel 0 */
27628 +       TSL256X_REG_DATA1LOW            = 0x8E, /* Low byte of ADC channel 1 */
27629 +       TSL256X_REG_DATA1HIGH           = 0x8F, /* High byte of ADC channel 1 */
27630 +       __NUM_TSL256X_REGS
27631 +};
27632 +
27633 +#endif /* _TSL256X_H */
27634 +
27635 Index: linux-2.6.24.7/drivers/i2c/i2c-core.c
27636 ===================================================================
27637 --- linux-2.6.24.7.orig/drivers/i2c/i2c-core.c  2008-12-11 22:46:07.000000000 +0100
27638 +++ linux-2.6.24.7/drivers/i2c/i2c-core.c       2008-12-11 22:46:49.000000000 +0100
27639 @@ -1,4 +1,3 @@
27640 -/* i2c-core.c - a device driver for the iic-bus interface                   */
27641  /* ------------------------------------------------------------------------- */
27642  /*   Copyright (C) 1995-99 Simon G. Vogl
27643
27644 @@ -136,10 +135,16 @@ static int i2c_device_suspend(struct dev
27645
27646         if (!dev->driver)
27647                 return 0;
27648 +#if 0
27649         driver = to_i2c_driver(dev->driver);
27650         if (!driver->suspend)
27651                 return 0;
27652         return driver->suspend(to_i2c_client(dev), mesg);
27653 +#else
27654 +       if (!dev->driver->suspend)
27655 +               return 0;
27656 +       return dev->driver->suspend(dev, mesg);
27657 +#endif
27658  }
27659
27660  static int i2c_device_resume(struct device * dev)
27661 @@ -148,10 +153,16 @@ static int i2c_device_resume(struct devi
27662
27663         if (!dev->driver)
27664                 return 0;
27665 +#if 0
27666         driver = to_i2c_driver(dev->driver);
27667         if (!driver->resume)
27668                 return 0;
27669         return driver->resume(to_i2c_client(dev));
27670 +#else
27671 +       if (!dev->driver->resume)
27672 +               return 0;
27673 +       return dev->driver->resume(dev);
27674 +#endif
27675  }
27676
27677  static void i2c_client_release(struct device *dev)
27678 @@ -941,11 +952,11 @@ static int i2c_probe_address(struct i2c_
27679         int err;
27680
27681         /* Make sure the address is valid */
27682 -       if (addr < 0x03 || addr > 0x77) {
27683 +       /*if (addr < 0x03 || addr > 0x77) {
27684                 dev_warn(&adapter->dev, "Invalid probe address 0x%02x\n",
27685                          addr);
27686                 return -EINVAL;
27687 -       }
27688 +       }*/
27689
27690         /* Skip if already in use */
27691         if (i2c_check_addr(adapter, addr))
27692 Index: linux-2.6.24.7/drivers/input/evdev.c
27693 ===================================================================
27694 --- linux-2.6.24.7.orig/drivers/input/evdev.c   2008-12-11 22:46:07.000000000 +0100
27695 +++ linux-2.6.24.7/drivers/input/evdev.c        2008-12-11 22:46:49.000000000 +0100
27696 @@ -28,7 +28,7 @@ struct evdev {
27697         char name[16];
27698         struct input_handle handle;
27699         wait_queue_head_t wait;
27700 -       struct evdev_client *grab;
27701 +       int *grab;
27702         struct list_head client_list;
27703         spinlock_t client_lock; /* protects client_list */
27704         struct mutex mutex;
27705 @@ -39,6 +39,7 @@ struct evdev_client {
27706         struct input_event buffer[EVDEV_BUFFER_SIZE];
27707         int head;
27708         int tail;
27709 +       int grab;
27710         spinlock_t buffer_lock; /* protects access to buffer, head and tail */
27711         struct fasync_struct *fasync;
27712         struct evdev *evdev;
27713 @@ -79,12 +80,8 @@ static void evdev_event(struct input_han
27714
27715         rcu_read_lock();
27716
27717 -       client = rcu_dereference(evdev->grab);
27718 -       if (client)
27719 +       list_for_each_entry_rcu(client, &evdev->client_list, node)
27720                 evdev_pass_event(client, &event);
27721 -       else
27722 -               list_for_each_entry_rcu(client, &evdev->client_list, node)
27723 -                       evdev_pass_event(client, &event);
27724
27725         rcu_read_unlock();
27726
27727 @@ -135,14 +132,15 @@ static int evdev_grab(struct evdev *evde
27728  {
27729         int error;
27730
27731 -       if (evdev->grab)
27732 +       if (client->grab)
27733                 return -EBUSY;
27734
27735 -       error = input_grab_device(&evdev->handle);
27736 -       if (error)
27737 -               return error;
27738 -
27739 -       rcu_assign_pointer(evdev->grab, client);
27740 +       if (!evdev->grab++) {
27741 +           error = input_grab_device(&evdev->handle);
27742 +           if (error)
27743 +                   return error;
27744 +       }
27745 +       client->grab = 1;
27746         synchronize_rcu();
27747
27748         return 0;
27749 @@ -150,12 +148,12 @@ static int evdev_grab(struct evdev *evde
27750
27751  static int evdev_ungrab(struct evdev *evdev, struct evdev_client *client)
27752  {
27753 -       if (evdev->grab != client)
27754 +       if (!client->grab)
27755                 return  -EINVAL;
27756
27757 -       rcu_assign_pointer(evdev->grab, NULL);
27758 -       synchronize_rcu();
27759 -       input_release_device(&evdev->handle);
27760 +       if (!--evdev->grab && evdev->exist)
27761 +               input_release_device(&evdev->handle);
27762 +       client->grab = 0;
27763
27764         return 0;
27765  }
27766 @@ -230,7 +228,7 @@ static int evdev_release(struct inode *i
27767         struct evdev *evdev = client->evdev;
27768
27769         mutex_lock(&evdev->mutex);
27770 -       if (evdev->grab == client)
27771 +       if (client->grab)
27772                 evdev_ungrab(evdev, client);
27773         mutex_unlock(&evdev->mutex);
27774
27775 Index: linux-2.6.24.7/drivers/input/keyboard/Kconfig
27776 ===================================================================
27777 --- linux-2.6.24.7.orig/drivers/input/keyboard/Kconfig  2008-12-11 22:46:07.000000000 +0100
27778 +++ linux-2.6.24.7/drivers/input/keyboard/Kconfig       2008-12-11 22:46:49.000000000 +0100
27779 @@ -293,4 +293,32 @@ config KEYBOARD_BFIN
27780           To compile this driver as a module, choose M here: the
27781           module will be called bf54x-keys.
27782
27783 +config KEYBOARD_NEO1973
27784 +       tristate "FIC Neo1973 buttons"
27785 +       depends on MACH_NEO1973
27786 +       default y
27787 +       help
27788 +         Say Y here to enable the buttons on the FIC Neo1973
27789 +         GSM phone.
27790 +
27791 +         To compile this driver as a module, choose M here: the
27792 +         module will be called neo1973kbd.
27793 +
27794 +config KEYBOARD_M800
27795 +       tristate "E-TEN glofiish M800 buttons"
27796 +       depends on MACH_M800
27797 +       default y
27798 +       help
27799 +         Say Y here to enable the buttons on the E-TEN glofiish
27800 +         M800 GSM phone.
27801 +
27802 +         To compile this driver as a module, choose M here: the
27803 +         module will be called m800kbd.
27804 +
27805 +config KEYBOARD_QT2410
27806 +       tristate "QT2410 buttons"
27807 +       depends on MACH_QT2410
27808 +       default y
27809 +
27810 +
27811  endif
27812 Index: linux-2.6.24.7/drivers/input/keyboard/m800kbd.c
27813 ===================================================================
27814 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
27815 +++ linux-2.6.24.7/drivers/input/keyboard/m800kbd.c     2008-12-11 22:46:49.000000000 +0100
27816 @@ -0,0 +1,330 @@
27817 +/*
27818 + * Keyboard driver for E-TEN M800 GSM phone
27819 + *
27820 + * (C) 2008 by Harald Welte <laforge@gnumonks.org>
27821 + * All rights reserved.
27822 + *
27823 + * inspired by corkgbd.c by Richard Purdie
27824 + *
27825 + * This program is free software; you can redistribute it and/or modify
27826 + * it under the terms of the GNU General Public License version 2 as
27827 + * published by the Free Software Foundation.
27828 + *
27829 + */
27830 +
27831 +#include <linux/delay.h>
27832 +#include <linux/platform_device.h>
27833 +#include <linux/init.h>
27834 +#include <linux/input.h>
27835 +#include <linux/interrupt.h>
27836 +#include <linux/jiffies.h>
27837 +#include <linux/module.h>
27838 +#include <linux/slab.h>
27839 +#include <linux/workqueue.h>
27840 +
27841 +#include <asm/gpio.h>
27842 +#include <asm/mach-types.h>
27843 +
27844 +struct m800kbd {
27845 +       struct input_dev *input;
27846 +       unsigned int suspended;
27847 +       struct work_struct work;
27848 +       int work_in_progress;
27849 +       int hp_irq_count_in_work;
27850 +       int hp_irq_count;
27851 +       int jack_irq;
27852 +};
27853 +
27854 +static irqreturn_t m800kbd_power_irq(int irq, void *dev_id)
27855 +{
27856 +       struct m800kbd *m800kbd_data = dev_id;
27857 +       int key_pressed = !gpio_get_value(irq_to_gpio(irq));
27858 +
27859 +       input_report_key(m800kbd_data->input, KEY_POWER, key_pressed);
27860 +       input_sync(m800kbd_data->input);
27861 +
27862 +       return IRQ_HANDLED;
27863 +}
27864 +
27865 +static irqreturn_t m800kbd_cam_irq(int irq, void *dev_id)
27866 +{
27867 +       struct m800kbd *m800kbd_data = dev_id;
27868 +
27869 +       int key_pressed = !gpio_get_value(irq_to_gpio(irq));
27870 +       input_report_key(m800kbd_data->input, KEY_CAMERA, key_pressed);
27871 +       input_sync(m800kbd_data->input);
27872 +
27873 +       return IRQ_HANDLED;
27874 +}
27875 +
27876 +static irqreturn_t m800kbd_rec_irq(int irq, void *dev_id)
27877 +{
27878 +       struct m800kbd *m800kbd_data = dev_id;
27879 +
27880 +       int key_pressed = !gpio_get_value(irq_to_gpio(irq));
27881 +       input_report_key(m800kbd_data->input, KEY_RECORD, key_pressed);
27882 +       input_sync(m800kbd_data->input);
27883 +
27884 +       return IRQ_HANDLED;
27885 +}
27886 +
27887 +static irqreturn_t m800kbd_slide_irq(int irq, void *dev_id)
27888 +{
27889 +       struct m800kbd *m800kbd_data = dev_id;
27890 +
27891 +       int key_pressed = gpio_get_value(irq_to_gpio(irq));
27892 +       input_report_key(m800kbd_data->input, SW_LID, key_pressed);
27893 +       input_sync(m800kbd_data->input);
27894 +
27895 +       return IRQ_HANDLED;
27896 +}
27897 +
27898 +#if 0
27899 +static void m800kbd_debounce_jack(struct work_struct *work)
27900 +{
27901 +       struct m800kbd *kbd = container_of(work, struct m800kbd, work);
27902 +       unsigned long flags;
27903 +       int loop = 0;
27904 +
27905 +       do {
27906 +               /*
27907 +                * we wait out any multiple interrupt
27908 +                * stuttering in 100ms lumps
27909 +                */
27910 +               do {
27911 +                       kbd->hp_irq_count_in_work = kbd->hp_irq_count;
27912 +                       msleep(100);
27913 +               } while (kbd->hp_irq_count != kbd->hp_irq_count_in_work);
27914 +               /*
27915 +                * no new interrupts on jack for 100ms...
27916 +                * ok we will report it
27917 +                */
27918 +               input_report_switch(kbd->input, SW_HEADPHONE_INSERT,
27919 +                                   gpio_get_value(irq_to_gpio(kbd->jack_irq)));
27920 +               input_sync(kbd->input);
27921 +               /*
27922 +                * we go around the outer loop again if we detect that more
27923 +                * interrupts came while we are servicing here.  But we have
27924 +                * to sequence it carefully with interrupts off
27925 +                */
27926 +               local_save_flags(flags);
27927 +               /* no interrupts during this work means we can exit the work */
27928 +               loop = !!(kbd->hp_irq_count != kbd->hp_irq_count_in_work);
27929 +               if (!loop)
27930 +                       kbd->work_in_progress = 0;
27931 +               local_irq_restore(flags);
27932 +               /*
27933 +                * interrupt that comes here will either queue a new work action
27934 +                * since work_in_progress is cleared now, or be dealt with
27935 +                * when we loop.
27936 +                */
27937 +       } while (loop);
27938 +}
27939 +
27940 +
27941 +static irqreturn_t m800kbd_headphone_irq(int irq, void *dev_id)
27942 +{
27943 +       struct m800kbd *m800kbd_data = dev_id;
27944 +
27945 +       /*
27946 +        * this interrupt is prone to bouncing and userspace doesn't like
27947 +        * to have to deal with that kind of thing.  So we do not accept
27948 +        * that a jack interrupt is equal to a jack event.  Instead we fire
27949 +        * some work on the first interrupt, and it hangs about in 100ms units
27950 +        * until no more interrupts come.  Then it accepts the state it finds
27951 +        * for jack insert and reports it once
27952 +        */
27953 +
27954 +       m800kbd_data->hp_irq_count++;
27955 +       /*
27956 +        * the first interrupt we see for a while, we fire the work item
27957 +        * and record the interrupt count when we did that.  If more interrupts
27958 +        * come in the meanwhile, we can tell by the difference in that
27959 +        * stored count and hp_irq_count which increments every interrupt
27960 +        */
27961 +       if (!m800kbd_data->work_in_progress) {
27962 +               m800kbd_data->jack_irq = irq;
27963 +               m800kbd_data->hp_irq_count_in_work =
27964 +                                               m800kbd_data->hp_irq_count;
27965 +               if (!schedule_work(&m800kbd_data->work))
27966 +                       printk(KERN_ERR
27967 +                               "Unable to schedule headphone debounce\n");
27968 +               else
27969 +                       m800kbd_data->work_in_progress = 1;
27970 +       }
27971 +
27972 +       return IRQ_HANDLED;
27973 +}
27974 +#endif
27975 +
27976 +#ifdef CONFIG_PM
27977 +static int m800kbd_suspend(struct platform_device *dev, pm_message_t state)
27978 +{
27979 +       struct m800kbd *m800kbd = platform_get_drvdata(dev);
27980 +
27981 +       m800kbd->suspended = 1;
27982 +
27983 +       return 0;
27984 +}
27985 +
27986 +static int m800kbd_resume(struct platform_device *dev)
27987 +{
27988 +       struct m800kbd *m800kbd = platform_get_drvdata(dev);
27989 +
27990 +       m800kbd->suspended = 0;
27991 +
27992 +       return 0;
27993 +}
27994 +#else
27995 +#define m800kbd_suspend        NULL
27996 +#define m800kbd_resume NULL
27997 +#endif
27998 +
27999 +static int m800kbd_probe(struct platform_device *pdev)
28000 +{
28001 +       struct m800kbd *m800kbd;
28002 +       struct input_dev *input_dev;
28003 +       int rc, irq_power, irq_cam, irq_rec, irq_slide;
28004 +
28005 +       m800kbd = kzalloc(sizeof(struct m800kbd), GFP_KERNEL);
28006 +       input_dev = input_allocate_device();
28007 +       if (!m800kbd || !input_dev) {
28008 +               kfree(m800kbd);
28009 +               input_free_device(input_dev);
28010 +               return -ENOMEM;
28011 +       }
28012 +
28013 +       if (pdev->resource[0].flags != 0)
28014 +               return -EINVAL;
28015 +
28016 +       irq_power = gpio_to_irq(pdev->resource[0].start);
28017 +       if (irq_power < 0)
28018 +               return -EINVAL;
28019 +
28020 +       irq_cam = gpio_to_irq(pdev->resource[1].start);
28021 +       if (irq_cam < 0)
28022 +               return -EINVAL;
28023 +
28024 +       irq_rec = gpio_to_irq(pdev->resource[2].start);
28025 +       if (irq_rec < 0)
28026 +               return -EINVAL;
28027 +
28028 +       irq_slide = gpio_to_irq(pdev->resource[3].start);
28029 +       if (irq_slide < 0)
28030 +               return -EINVAL;
28031 +
28032 +       platform_set_drvdata(pdev, m800kbd);
28033 +
28034 +       m800kbd->input = input_dev;
28035 +
28036 +       //INIT_WORK(&m800kbd->work, m800kbd_debounce_jack);
28037 +
28038 +       input_dev->name = "M800 Buttons";
28039 +       input_dev->phys = "m800kbd/input0";
28040 +       input_dev->id.bustype = BUS_HOST;
28041 +       input_dev->id.vendor = 0x0001;
28042 +       input_dev->id.product = 0x0001;
28043 +       input_dev->id.version = 0x0100;
28044 +       input_dev->cdev.dev = &pdev->dev;
28045 +       input_dev->private = m800kbd;
28046 +
28047 +       input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_SW);
28048 +       set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
28049 +       set_bit(SW_LID, input_dev->swbit);
28050 +       set_bit(KEY_POWER, input_dev->keybit);
28051 +       set_bit(KEY_CAMERA, input_dev->keybit);
28052 +       set_bit(KEY_RECORD, input_dev->keybit);
28053 +
28054 +       rc = input_register_device(m800kbd->input);
28055 +       if (rc)
28056 +               goto out_register;
28057 +
28058 +       if (request_irq(irq_power, m800kbd_power_irq, IRQF_DISABLED |
28059 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28060 +                       "M800 Power button", m800kbd)) {
28061 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_power);
28062 +               goto out_aux;
28063 +       }
28064 +
28065 +       enable_irq_wake(irq_power);
28066 +
28067 +       if (request_irq(irq_cam, m800kbd_cam_irq, IRQF_DISABLED |
28068 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28069 +                       "M800 Camera button", m800kbd)) {
28070 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_cam);
28071 +               goto out_hold;
28072 +       }
28073 +
28074 +       if (request_irq(irq_rec, m800kbd_rec_irq, IRQF_DISABLED |
28075 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28076 +                       "M800 Record button", m800kbd)) {
28077 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_rec);
28078 +               goto out_hold;
28079 +       }
28080 +
28081 +       if (request_irq(irq_slide, m800kbd_slide_irq, IRQF_DISABLED |
28082 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28083 +                       "M800 Slide", m800kbd)) {
28084 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_slide);
28085 +               goto out_jack;
28086 +       }
28087 +       enable_irq_wake(irq_slide);
28088 +
28089 +       return 0;
28090 +
28091 +out_jack:
28092 +       free_irq(irq_cam, m800kbd);
28093 +out_hold:
28094 +       free_irq(irq_power, m800kbd);
28095 +out_aux:
28096 +       input_unregister_device(m800kbd->input);
28097 +out_register:
28098 +       input_free_device(m800kbd->input);
28099 +       platform_set_drvdata(pdev, NULL);
28100 +       kfree(m800kbd);
28101 +
28102 +       return -ENODEV;
28103 +}
28104 +
28105 +static int m800kbd_remove(struct platform_device *pdev)
28106 +{
28107 +       struct m800kbd *m800kbd = platform_get_drvdata(pdev);
28108 +
28109 +       free_irq(gpio_to_irq(pdev->resource[2].start), m800kbd);
28110 +       free_irq(gpio_to_irq(pdev->resource[1].start), m800kbd);
28111 +       free_irq(gpio_to_irq(pdev->resource[0].start), m800kbd);
28112 +
28113 +       input_unregister_device(m800kbd->input);
28114 +       input_free_device(m800kbd->input);
28115 +       platform_set_drvdata(pdev, NULL);
28116 +       kfree(m800kbd);
28117 +
28118 +       return 0;
28119 +}
28120 +
28121 +static struct platform_driver m800kbd_driver = {
28122 +       .probe          = m800kbd_probe,
28123 +       .remove         = m800kbd_remove,
28124 +       .suspend        = m800kbd_suspend,
28125 +       .resume         = m800kbd_resume,
28126 +       .driver         = {
28127 +               .name   = "m800-button",
28128 +       },
28129 +};
28130 +
28131 +static int __devinit m800kbd_init(void)
28132 +{
28133 +       return platform_driver_register(&m800kbd_driver);
28134 +}
28135 +
28136 +static void __exit m800kbd_exit(void)
28137 +{
28138 +       platform_driver_unregister(&m800kbd_driver);
28139 +}
28140 +
28141 +module_init(m800kbd_init);
28142 +module_exit(m800kbd_exit);
28143 +
28144 +MODULE_AUTHOR("Harald Welte <laforge@gnumonks.org>");
28145 +MODULE_DESCRIPTION("E-TEN glofiish M800 GPIO buttons input driver");
28146 +MODULE_LICENSE("GPL");
28147 Index: linux-2.6.24.7/drivers/input/keyboard/Makefile
28148 ===================================================================
28149 --- linux-2.6.24.7.orig/drivers/input/keyboard/Makefile 2008-12-11 22:46:07.000000000 +0100
28150 +++ linux-2.6.24.7/drivers/input/keyboard/Makefile      2008-12-11 22:46:49.000000000 +0100
28151 @@ -14,6 +14,9 @@ obj-$(CONFIG_KEYBOARD_LOCOMO)         += locomo
28152  obj-$(CONFIG_KEYBOARD_NEWTON)          += newtonkbd.o
28153  obj-$(CONFIG_KEYBOARD_STOWAWAY)                += stowaway.o
28154  obj-$(CONFIG_KEYBOARD_CORGI)           += corgikbd.o
28155 +obj-$(CONFIG_KEYBOARD_NEO1973)         += neo1973kbd.o
28156 +obj-$(CONFIG_KEYBOARD_M800)            += m800kbd.o
28157 +obj-$(CONFIG_KEYBOARD_QT2410)          += qt2410kbd.o
28158  obj-$(CONFIG_KEYBOARD_SPITZ)           += spitzkbd.o
28159  obj-$(CONFIG_KEYBOARD_HIL)             += hil_kbd.o
28160  obj-$(CONFIG_KEYBOARD_HIL_OLD)         += hilkbd.o
28161 Index: linux-2.6.24.7/drivers/input/keyboard/neo1973kbd.c
28162 ===================================================================
28163 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
28164 +++ linux-2.6.24.7/drivers/input/keyboard/neo1973kbd.c  2008-12-11 22:46:49.000000000 +0100
28165 @@ -0,0 +1,303 @@
28166 +/*
28167 + * Keyboard driver for FIC Neo1973 GSM phone
28168 + *
28169 + * (C) 2006-2007 by Openmoko, Inc.
28170 + * Author: Harald Welte <laforge@openmoko.org>
28171 + * All rights reserved.
28172 + *
28173 + * inspired by corkgbd.c by Richard Purdie
28174 + *
28175 + * This program is free software; you can redistribute it and/or modify
28176 + * it under the terms of the GNU General Public License version 2 as
28177 + * published by the Free Software Foundation.
28178 + *
28179 + */
28180 +
28181 +#include <linux/delay.h>
28182 +#include <linux/platform_device.h>
28183 +#include <linux/init.h>
28184 +#include <linux/input.h>
28185 +#include <linux/interrupt.h>
28186 +#include <linux/jiffies.h>
28187 +#include <linux/module.h>
28188 +#include <linux/slab.h>
28189 +#include <linux/workqueue.h>
28190 +
28191 +#include <asm/gpio.h>
28192 +#include <asm/mach-types.h>
28193 +
28194 +struct neo1973kbd {
28195 +       struct input_dev *input;
28196 +       unsigned int suspended;
28197 +       struct work_struct work;
28198 +       int work_in_progress;
28199 +       int hp_irq_count_in_work;
28200 +       int hp_irq_count;
28201 +       int jack_irq;
28202 +};
28203 +
28204 +static irqreturn_t neo1973kbd_aux_irq(int irq, void *dev_id)
28205 +{
28206 +       struct neo1973kbd *neo1973kbd_data = dev_id;
28207 +       int key_pressed = !gpio_get_value(irq_to_gpio(irq));
28208 +
28209 +       /* GTA02 has inverted sense level compared to GTA01 */
28210 +       if (machine_is_neo1973_gta02())
28211 +               key_pressed = !key_pressed;
28212 +       input_report_key(neo1973kbd_data->input, KEY_PHONE, key_pressed);
28213 +       input_sync(neo1973kbd_data->input);
28214 +
28215 +       return IRQ_HANDLED;
28216 +}
28217 +
28218 +static irqreturn_t neo1973kbd_hold_irq(int irq, void *dev_id)
28219 +{
28220 +       struct neo1973kbd *neo1973kbd_data = dev_id;
28221 +
28222 +       int key_pressed = gpio_get_value(irq_to_gpio(irq));
28223 +       input_report_key(neo1973kbd_data->input, KEY_PAUSE, key_pressed);
28224 +       input_sync(neo1973kbd_data->input);
28225 +
28226 +       return IRQ_HANDLED;
28227 +}
28228 +
28229 +
28230 +static void neo1973kbd_debounce_jack(struct work_struct *work)
28231 +{
28232 +       struct neo1973kbd *kbd = container_of(work, struct neo1973kbd, work);
28233 +       unsigned long flags;
28234 +       int loop = 0;
28235 +
28236 +       do {
28237 +               /*
28238 +                * we wait out any multiple interrupt
28239 +                * stuttering in 100ms lumps
28240 +                */
28241 +               do {
28242 +                       kbd->hp_irq_count_in_work = kbd->hp_irq_count;
28243 +                       msleep(100);
28244 +               } while (kbd->hp_irq_count != kbd->hp_irq_count_in_work);
28245 +               /*
28246 +                * no new interrupts on jack for 100ms...
28247 +                * ok we will report it
28248 +                */
28249 +               input_report_switch(kbd->input, SW_HEADPHONE_INSERT,
28250 +                                   gpio_get_value(irq_to_gpio(kbd->jack_irq)));
28251 +               input_sync(kbd->input);
28252 +               /*
28253 +                * we go around the outer loop again if we detect that more
28254 +                * interrupts came while we are servicing here.  But we have
28255 +                * to sequence it carefully with interrupts off
28256 +                */
28257 +               local_save_flags(flags);
28258 +               /* no interrupts during this work means we can exit the work */
28259 +               loop = !!(kbd->hp_irq_count != kbd->hp_irq_count_in_work);
28260 +               if (!loop)
28261 +                       kbd->work_in_progress = 0;
28262 +               local_irq_restore(flags);
28263 +               /*
28264 +                * interrupt that comes here will either queue a new work action
28265 +                * since work_in_progress is cleared now, or be dealt with
28266 +                * when we loop.
28267 +                */
28268 +       } while (loop);
28269 +}
28270 +
28271 +
28272 +static irqreturn_t neo1973kbd_headphone_irq(int irq, void *dev_id)
28273 +{
28274 +       struct neo1973kbd *neo1973kbd_data = dev_id;
28275 +
28276 +       /*
28277 +        * this interrupt is prone to bouncing and userspace doesn't like
28278 +        * to have to deal with that kind of thing.  So we do not accept
28279 +        * that a jack interrupt is equal to a jack event.  Instead we fire
28280 +        * some work on the first interrupt, and it hangs about in 100ms units
28281 +        * until no more interrupts come.  Then it accepts the state it finds
28282 +        * for jack insert and reports it once
28283 +        */
28284 +
28285 +       neo1973kbd_data->hp_irq_count++;
28286 +       /*
28287 +        * the first interrupt we see for a while, we fire the work item
28288 +        * and record the interrupt count when we did that.  If more interrupts
28289 +        * come in the meanwhile, we can tell by the difference in that
28290 +        * stored count and hp_irq_count which increments every interrupt
28291 +        */
28292 +       if (!neo1973kbd_data->work_in_progress) {
28293 +               neo1973kbd_data->jack_irq = irq;
28294 +               neo1973kbd_data->hp_irq_count_in_work =
28295 +                                               neo1973kbd_data->hp_irq_count;
28296 +               if (!schedule_work(&neo1973kbd_data->work))
28297 +                       printk(KERN_ERR
28298 +                               "Unable to schedule headphone debounce\n");
28299 +               else
28300 +                       neo1973kbd_data->work_in_progress = 1;
28301 +       }
28302 +
28303 +       return IRQ_HANDLED;
28304 +}
28305 +
28306 +#ifdef CONFIG_PM
28307 +static int neo1973kbd_suspend(struct platform_device *dev, pm_message_t state)
28308 +{
28309 +       struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev);
28310 +
28311 +       neo1973kbd->suspended = 1;
28312 +
28313 +       return 0;
28314 +}
28315 +
28316 +static int neo1973kbd_resume(struct platform_device *dev)
28317 +{
28318 +       struct neo1973kbd *neo1973kbd = platform_get_drvdata(dev);
28319 +
28320 +       neo1973kbd->suspended = 0;
28321 +
28322 +       return 0;
28323 +}
28324 +#else
28325 +#define neo1973kbd_suspend     NULL
28326 +#define neo1973kbd_resume      NULL
28327 +#endif
28328 +
28329 +static int neo1973kbd_probe(struct platform_device *pdev)
28330 +{
28331 +       struct neo1973kbd *neo1973kbd;
28332 +       struct input_dev *input_dev;
28333 +       int rc, irq_aux, irq_hold, irq_jack;
28334 +
28335 +       neo1973kbd = kzalloc(sizeof(struct neo1973kbd), GFP_KERNEL);
28336 +       input_dev = input_allocate_device();
28337 +       if (!neo1973kbd || !input_dev) {
28338 +               kfree(neo1973kbd);
28339 +               input_free_device(input_dev);
28340 +               return -ENOMEM;
28341 +       }
28342 +
28343 +       if (pdev->resource[0].flags != 0)
28344 +               return -EINVAL;
28345 +
28346 +       irq_aux = gpio_to_irq(pdev->resource[0].start);
28347 +       if (irq_aux < 0)
28348 +               return -EINVAL;
28349 +
28350 +       irq_hold = gpio_to_irq(pdev->resource[1].start);
28351 +       if (irq_hold < 0)
28352 +               return -EINVAL;
28353 +
28354 +       irq_jack = gpio_to_irq(pdev->resource[2].start);
28355 +       if (irq_jack < 0)
28356 +               return -EINVAL;
28357 +
28358 +       platform_set_drvdata(pdev, neo1973kbd);
28359 +
28360 +       neo1973kbd->input = input_dev;
28361 +
28362 +       INIT_WORK(&neo1973kbd->work, neo1973kbd_debounce_jack);
28363 +
28364 +       input_dev->name = "Neo1973 Buttons";
28365 +       input_dev->phys = "neo1973kbd/input0";
28366 +       input_dev->id.bustype = BUS_HOST;
28367 +       input_dev->id.vendor = 0x0001;
28368 +       input_dev->id.product = 0x0001;
28369 +       input_dev->id.version = 0x0100;
28370 +       input_dev->cdev.dev = &pdev->dev;
28371 +       input_dev->private = neo1973kbd;
28372 +
28373 +       input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_SW);
28374 +       set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
28375 +       set_bit(KEY_PHONE, input_dev->keybit);
28376 +       set_bit(KEY_PAUSE, input_dev->keybit);
28377 +
28378 +       rc = input_register_device(neo1973kbd->input);
28379 +       if (rc)
28380 +               goto out_register;
28381 +
28382 +       if (request_irq(irq_aux, neo1973kbd_aux_irq, IRQF_DISABLED |
28383 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28384 +                       "Neo1973 AUX button", neo1973kbd)) {
28385 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_aux);
28386 +               goto out_aux;
28387 +       }
28388 +
28389 +       /*
28390 +        * GTA01 revisions before Bv4 can't be resumed by the PMU, so we use
28391 +        * resume by AUX.
28392 +        */
28393 +       if (machine_is_neo1973_gta01())
28394 +               enable_irq_wake(irq_aux);
28395 +
28396 +       if (request_irq(irq_hold, neo1973kbd_hold_irq, IRQF_DISABLED |
28397 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28398 +                       "Neo1973 HOLD button", neo1973kbd)) {
28399 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_hold);
28400 +               goto out_hold;
28401 +       }
28402 +
28403 +       if (request_irq(irq_jack, neo1973kbd_headphone_irq, IRQF_DISABLED |
28404 +                       IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
28405 +                       "Neo1973 Headphone Jack", neo1973kbd)) {
28406 +               dev_err(&pdev->dev, "Can't get IRQ %u\n", irq_jack);
28407 +               goto out_jack;
28408 +       }
28409 +       enable_irq_wake(irq_jack);
28410 +
28411 +       return 0;
28412 +
28413 +out_jack:
28414 +       free_irq(irq_hold, neo1973kbd);
28415 +out_hold:
28416 +       free_irq(irq_aux, neo1973kbd);
28417 +out_aux:
28418 +       input_unregister_device(neo1973kbd->input);
28419 +out_register:
28420 +       input_free_device(neo1973kbd->input);
28421 +       platform_set_drvdata(pdev, NULL);
28422 +       kfree(neo1973kbd);
28423 +
28424 +       return -ENODEV;
28425 +}
28426 +
28427 +static int neo1973kbd_remove(struct platform_device *pdev)
28428 +{
28429 +       struct neo1973kbd *neo1973kbd = platform_get_drvdata(pdev);
28430 +
28431 +       free_irq(gpio_to_irq(pdev->resource[2].start), neo1973kbd);
28432 +       free_irq(gpio_to_irq(pdev->resource[1].start), neo1973kbd);
28433 +       free_irq(gpio_to_irq(pdev->resource[0].start), neo1973kbd);
28434 +
28435 +       input_unregister_device(neo1973kbd->input);
28436 +       input_free_device(neo1973kbd->input);
28437 +       platform_set_drvdata(pdev, NULL);
28438 +       kfree(neo1973kbd);
28439 +
28440 +       return 0;
28441 +}
28442 +
28443 +static struct platform_driver neo1973kbd_driver = {
28444 +       .probe          = neo1973kbd_probe,
28445 +       .remove         = neo1973kbd_remove,
28446 +       .suspend        = neo1973kbd_suspend,
28447 +       .resume         = neo1973kbd_resume,
28448 +       .driver         = {
28449 +               .name   = "neo1973-button",
28450 +       },
28451 +};
28452 +
28453 +static int __devinit neo1973kbd_init(void)
28454 +{
28455 +       return platform_driver_register(&neo1973kbd_driver);
28456 +}
28457 +
28458 +static void __exit neo1973kbd_exit(void)
28459 +{
28460 +       platform_driver_unregister(&neo1973kbd_driver);
28461 +}
28462 +
28463 +module_init(neo1973kbd_init);
28464 +module_exit(neo1973kbd_exit);
28465 +
28466 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
28467 +MODULE_DESCRIPTION("FIC Neo1973 buttons input driver");
28468 +MODULE_LICENSE("GPL");
28469 Index: linux-2.6.24.7/drivers/input/keyboard/qt2410kbd.c
28470 ===================================================================
28471 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
28472 +++ linux-2.6.24.7/drivers/input/keyboard/qt2410kbd.c   2008-12-11 22:46:49.000000000 +0100
28473 @@ -0,0 +1,233 @@
28474 +/*
28475 + * Keyboard driver for Armzone QT2410
28476 + *
28477 + * (C) 2006 by Openmoko, Inc.
28478 + * Author: Harald Welte <laforge@openmoko.org>
28479 + * All rights reserved.
28480 + *
28481 + * This program is free software; you can redistribute it and/or modify
28482 + * it under the terms of the GNU General Public License version 2 as
28483 + * published by the Free Software Foundation.
28484 + *
28485 + */
28486 +
28487 +#include <linux/delay.h>
28488 +#include <linux/platform_device.h>
28489 +#include <linux/init.h>
28490 +#include <linux/input.h>
28491 +#include <linux/interrupt.h>
28492 +#include <linux/jiffies.h>
28493 +#include <linux/module.h>
28494 +#include <linux/slab.h>
28495 +
28496 +#include <asm/hardware.h>
28497 +#include <asm/arch/gta01.h>
28498 +
28499 +struct gta01kbd {
28500 +       struct input_dev *input;
28501 +       unsigned int suspended;
28502 +       unsigned long suspend_jiffies;
28503 +};
28504 +
28505 +static irqreturn_t gta01kbd_interrupt(int irq, void *dev_id)
28506 +{
28507 +       struct gta01kbd *gta01kbd_data = dev_id;
28508 +
28509 +       /* FIXME: use GPIO from platform_dev resources */
28510 +       if (s3c2410_gpio_getpin(S3C2410_GPF0))
28511 +               input_report_key(gta01kbd_data->input, KEY_PHONE, 1);
28512 +       else
28513 +               input_report_key(gta01kbd_data->input, KEY_PHONE, 0);
28514 +
28515 +       input_sync(gta01kbd_data->input);
28516 +
28517 +       return IRQ_HANDLED;
28518 +}
28519 +
28520 +
28521 +#ifdef CONFIG_PM
28522 +static int gta01kbd_suspend(struct platform_device *dev, pm_message_t state)
28523 +{
28524 +       struct gta01kbd *gta01kbd = platform_get_drvdata(dev);
28525 +
28526 +       gta01kbd->suspended = 1;
28527 +
28528 +       return 0;
28529 +}
28530 +
28531 +static int gta01kbd_resume(struct platform_device *dev)
28532 +{
28533 +       struct gta01kbd *gta01kbd = platform_get_drvdata(dev);
28534 +
28535 +       gta01kbd->suspended = 0;
28536 +
28537 +       return 0;
28538 +}
28539 +#else
28540 +#define gta01kbd_suspend       NULL
28541 +#define gta01kbd_resume                NULL
28542 +#endif
28543 +
28544 +static int gta01kbd_probe(struct platform_device *pdev)
28545 +{
28546 +       struct gta01kbd *gta01kbd;
28547 +       struct input_dev *input_dev;
28548 +       int irq_911;
28549 +       int rc = 0;
28550 +
28551 +       gta01kbd = kzalloc(sizeof(struct gta01kbd), GFP_KERNEL);
28552 +       if (!gta01kbd) {
28553 +               rc = -ENOMEM;
28554 +               goto bail;
28555 +       }
28556 +       input_dev = input_allocate_device();
28557 +       if (!gta01kbd || !input_dev) {
28558 +               rc = -ENOMEM;
28559 +               goto bail_free;
28560 +       }
28561 +
28562 +       if (pdev->resource[0].flags != 0) {\
28563 +               rc = -EINVAL;
28564 +               goto bail_free_dev;
28565 +       }
28566 +
28567 +       irq_911 = s3c2410_gpio_getirq(pdev->resource[0].start);
28568 +       if (irq_911 < 0) {
28569 +               rc = -EINVAL;
28570 +               goto bail_free_dev;
28571 +       }
28572 +
28573 +       platform_set_drvdata(pdev, gta01kbd);
28574 +
28575 +       gta01kbd->input = input_dev;
28576 +
28577 +#if 0
28578 +       spin_lock_init(&gta01kbd->lock);
28579 +       /* Init Keyboard rescan timer */
28580 +       init_timer(&corgikbd->timer);
28581 +       corgikbd->timer.function = corgikbd_timer_callback;
28582 +       corgikbd->timer.data = (unsigned long) corgikbd;
28583 +
28584 +       /* Init Hinge Timer */
28585 +       init_timer(&corgikbd->htimer);
28586 +       corgikbd->htimer.function = corgikbd_hinge_timer;
28587 +       corgikbd->htimer.data = (unsigned long) corgikbd;
28588 +
28589 +       corgikbd->suspend_jiffies=jiffies;
28590 +
28591 +       memcpy(corgikbd->keycode, corgikbd_keycode, sizeof(corgikbd->keycode));
28592 +#endif
28593 +
28594 +       input_dev->name = "QT2410 Buttons";
28595 +       input_dev->phys = "qt2410kbd/input0";
28596 +       input_dev->id.bustype = BUS_HOST;
28597 +       input_dev->id.vendor = 0x0001;
28598 +       input_dev->id.product = 0x0001;
28599 +       input_dev->id.version = 0x0100;
28600 +       input_dev->cdev.dev = &pdev->dev;
28601 +       input_dev->private = gta01kbd;
28602 +
28603 +       input_dev->evbit[0] = BIT(EV_KEY);
28604 +#if 0
28605 +       input_dev->keycode = gta01kbd->keycode;
28606 +       input_dev->keycodesize = sizeof(unsigned char);
28607 +       input_dev->keycodemax = ARRAY_SIZE(corgikbd_keycode);
28608 +
28609 +       for (i = 0; i < ARRAY_SIZE(corgikbd_keycode); i++)
28610 +               set_bit(corgikbd->keycode[i], input_dev->keybit);
28611 +       clear_bit(0, input_dev->keybit);
28612 +       set_bit(SW_LID, input_dev->swbit);
28613 +       set_bit(SW_TABLET_MODE, input_dev->swbit);
28614 +       set_bit(SW_HEADPHONE_INSERT, input_dev->swbit);
28615 +#endif
28616 +
28617 +       rc = input_register_device(gta01kbd->input);
28618 +       if (rc)
28619 +               goto bail_free_dev;
28620 +
28621 +       s3c2410_gpio_cfgpin(S3C2410_GPF0, S3C2410_GPF0_EINT0);
28622 +       if (request_irq(irq_911, gta01kbd_interrupt,
28623 +                       IRQF_DISABLED | IRQF_TRIGGER_RISING |
28624 +                       IRQF_TRIGGER_FALLING, "qt2410kbd_eint0", gta01kbd))
28625 +               printk(KERN_WARNING "gta01kbd: Can't get IRQ\n");
28626 +       enable_irq_wake(irq_911);
28627 +
28628 +       /* FIXME: headphone insert */
28629 +
28630 +#if 0
28631 +       mod_timer(&corgikbd->htimer, jiffies + msecs_to_jiffies(HINGE_SCAN_INTERVAL));
28632 +
28633 +       /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */
28634 +       for (i = 0; i < CORGI_KEY_SENSE_NUM; i++) {
28635 +               pxa_gpio_mode(CORGI_GPIO_KEY_SENSE(i) | GPIO_IN);
28636 +               if (request_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd_interrupt,
28637 +                               SA_INTERRUPT | SA_TRIGGER_RISING,
28638 +                               "corgikbd", corgikbd))
28639 +                       printk(KERN_WARNING "corgikbd: Can't get IRQ: %d!\n", i);
28640 +       }
28641 +
28642 +       /* Set Strobe lines as outputs - set high */
28643 +       for (i = 0; i < CORGI_KEY_STROBE_NUM; i++)
28644 +               pxa_gpio_mode(CORGI_GPIO_KEY_STROBE(i) | GPIO_OUT | GPIO_DFLT_HIGH);
28645 +
28646 +       /* Setup the headphone jack as an input */
28647 +       pxa_gpio_mode(CORGI_GPIO_AK_INT | GPIO_IN);
28648 +#endif
28649 +
28650 +       return 0;
28651 +
28652 +bail_free_dev:
28653 +       input_free_device(input_dev);
28654 +bail_free:
28655 +       kfree(gta01kbd);
28656 +bail:
28657 +       return rc;
28658 +}
28659 +
28660 +static int gta01kbd_remove(struct platform_device *pdev)
28661 +{
28662 +       struct gta01kbd *gta01kbd = platform_get_drvdata(pdev);
28663 +
28664 +       free_irq(s3c2410_gpio_getirq(pdev->resource[0].start), gta01kbd);
28665 +#if 0
28666 +       int i;
28667 +
28668 +       for (i = 0; i < CORGI_KEY_SENSE_NUM; i++)
28669 +               free_irq(CORGI_IRQ_GPIO_KEY_SENSE(i), corgikbd);
28670 +
28671 +       del_timer_sync(&corgikbd->htimer);
28672 +       del_timer_sync(&corgikbd->timer);
28673 +#endif
28674 +       input_unregister_device(gta01kbd->input);
28675 +
28676 +       kfree(gta01kbd);
28677 +
28678 +       return 0;
28679 +}
28680 +
28681 +static struct platform_driver gta01kbd_driver = {
28682 +       .probe          = gta01kbd_probe,
28683 +       .remove         = gta01kbd_remove,
28684 +       .suspend        = gta01kbd_suspend,
28685 +       .resume         = gta01kbd_resume,
28686 +       .driver         = {
28687 +               .name   = "qt2410-button",
28688 +       },
28689 +};
28690 +
28691 +static int __devinit gta01kbd_init(void)
28692 +{
28693 +       return platform_driver_register(&gta01kbd_driver);
28694 +}
28695 +
28696 +static void __exit gta01kbd_exit(void)
28697 +{
28698 +       platform_driver_unregister(&gta01kbd_driver);
28699 +}
28700 +
28701 +module_init(gta01kbd_init);
28702 +module_exit(gta01kbd_exit);
28703 +
28704 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
28705 +MODULE_DESCRIPTION("Armzone QT2410 Buttons Driver");
28706 +MODULE_LICENSE("GPL");
28707 Index: linux-2.6.24.7/drivers/input/misc/Kconfig
28708 ===================================================================
28709 --- linux-2.6.24.7.orig/drivers/input/misc/Kconfig      2008-12-11 22:46:09.000000000 +0100
28710 +++ linux-2.6.24.7/drivers/input/misc/Kconfig   2008-12-11 22:46:49.000000000 +0100
28711 @@ -199,4 +199,13 @@ config INPUT_GPIO_BUTTONS
28712           To compile this driver as a module, choose M here: the
28713           module will be called gpio-buttons.
28714
28715 +config INPUT_LIS302DL
28716 +       tristate "STmicro LIS302DL 3-axis accelerometer"
28717 +       depends on SPI_MASTER
28718 +       help
28719 +         SPI driver for the STmicro LIS302DL 3-axis accelerometer.
28720 +
28721 +         The userspece interface is a 3-axis (X/Y/Z) relative movement
28722 +         Linux input device, reporting REL_[XYZ] events.
28723 +
28724  endif
28725 Index: linux-2.6.24.7/drivers/input/misc/lis302dl.c
28726 ===================================================================
28727 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
28728 +++ linux-2.6.24.7/drivers/input/misc/lis302dl.c        2008-12-11 22:46:49.000000000 +0100
28729 @@ -0,0 +1,863 @@
28730 +/* Linux kernel driver for the ST LIS302D 3-axis accelerometer
28731 + *
28732 + * Copyright (C) 2007-2008 by Openmoko, Inc.
28733 + * Author: Harald Welte <laforge@openmoko.org>
28734 + *         converted to private bitbang by:
28735 + *         Andy Green <andy@openmoko.com>
28736 + *         ability to set acceleration threshold added by:
28737 + *         Simon Kagstrom <simon.kagstrom@gmail.com>
28738 + * All rights reserved.
28739 + *
28740 + * This program is free software; you can redistribute it and/or
28741 + * modify it under the terms of the GNU General Public License as
28742 + * published by the Free Software Foundation; either version 2 of
28743 + * the License, or (at your option) any later version.
28744 + *
28745 + * This program is distributed in the hope that it will be useful,
28746 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
28747 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28748 + * GNU General Public License for more details.
28749 + *
28750 + * You should have received a copy of the GNU General Public License
28751 + * along with this program; if not, write to the Free Software
28752 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28753 + * MA 02111-1307 USA
28754 + *
28755 + * TODO
28756 + *     * statistics for overflow events
28757 + *     * configuration interface (sysfs) for
28758 + *             * enable/disable x/y/z axis data ready
28759 + *             * enable/disable resume from freee fall / click
28760 + *             * free fall / click parameters
28761 + *             * high pass filter parameters
28762 + */
28763 +#include <linux/kernel.h>
28764 +#include <linux/types.h>
28765 +#include <linux/module.h>
28766 +#include <linux/device.h>
28767 +#include <linux/platform_device.h>
28768 +#include <linux/delay.h>
28769 +#include <linux/irq.h>
28770 +#include <linux/interrupt.h>
28771 +#include <linux/sysfs.h>
28772 +
28773 +#include <linux/lis302dl.h>
28774 +
28775 +/* Utility functions */
28776 +
28777 +static u8 __reg_read(struct lis302dl_info *lis, u8 reg)
28778 +{
28779 +       return (lis->pdata->lis302dl_bitbang_reg_read)(lis, reg);
28780 +}
28781 +
28782 +static void __reg_write(struct lis302dl_info *lis, u8 reg, u8 val)
28783 +{
28784 +       (lis->pdata->lis302dl_bitbang_reg_write)(lis, reg, val);
28785 +}
28786 +
28787 +static void __reg_set_bit_mask(struct lis302dl_info *lis, u8 reg, u8 mask,
28788 +               u8 val)
28789 +{
28790 +       u_int8_t tmp;
28791 +
28792 +       val &= mask;
28793 +
28794 +       tmp = __reg_read(lis, reg);
28795 +       tmp &= ~mask;
28796 +       tmp |= val;
28797 +       __reg_write(lis, reg, tmp);
28798 +}
28799 +
28800 +static int __ms_to_duration(struct lis302dl_info *lis, int ms)
28801 +{
28802 +       /* If we have 400 ms sampling rate, the stepping is 2.5 ms,
28803 +        * on 100 ms the stepping is 10ms */
28804 +       if (lis->flags & LIS302DL_F_DR)
28805 +               return min((ms * 10) / 25, 637);
28806 +
28807 +       return min(ms / 10, 2550);
28808 +}
28809 +
28810 +static int __duration_to_ms(struct lis302dl_info *lis, int duration)
28811 +{
28812 +       if (lis->flags & LIS302DL_F_DR)
28813 +               return (duration * 25) / 10;
28814 +
28815 +       return duration * 10;
28816 +}
28817 +
28818 +static u8 __mg_to_threshold(struct lis302dl_info *lis, int mg)
28819 +{
28820 +       /* If FS is set each bit is 71mg, otherwise 18mg. The THS register
28821 +        * has 7 bits for the threshold value */
28822 +       if (lis->flags & LIS302DL_F_FS)
28823 +               return min(mg / 71, 127);
28824 +
28825 +       return min(mg / 18, 127);
28826 +}
28827 +
28828 +static int __threshold_to_mg(struct lis302dl_info *lis, u8 threshold)
28829 +{
28830 +       if (lis->flags & LIS302DL_F_FS)
28831 +               return threshold * 71;
28832 +
28833 +       return threshold * 18;
28834 +}
28835 +
28836 +/* interrupt handling related */
28837 +
28838 +enum lis302dl_intmode {
28839 +       LIS302DL_INTMODE_GND            = 0x00,
28840 +       LIS302DL_INTMODE_FF_WU_1        = 0x01,
28841 +       LIS302DL_INTMODE_FF_WU_2        = 0x02,
28842 +       LIS302DL_INTMODE_FF_WU_12       = 0x03,
28843 +       LIS302DL_INTMODE_DATA_READY     = 0x04,
28844 +       LIS302DL_INTMODE_CLICK          = 0x07,
28845 +};
28846 +
28847 +
28848 +static void __lis302dl_int_mode(struct device *dev, int int_pin,
28849 +                             enum lis302dl_intmode mode)
28850 +{
28851 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
28852 +
28853 +       switch (int_pin) {
28854 +       case 1:
28855 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x07, mode);
28856 +               break;
28857 +       case 2:
28858 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL3, 0x38, mode << 3);
28859 +               break;
28860 +       default:
28861 +               BUG();
28862 +       }
28863 +}
28864 +
28865 +static void __enable_wakeup(struct lis302dl_info *lis)
28866 +{
28867 +       /* First zero to get to a known state */
28868 +       __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1,
28869 +                       lis->wakeup.cfg);
28870 +       __reg_write(lis, LIS302DL_REG_FF_WU_THS_1,
28871 +                       lis->wakeup.threshold);
28872 +       __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1,
28873 +                       lis->wakeup.duration);
28874 +
28875 +       /* Route the interrupt for wakeup */
28876 +       __lis302dl_int_mode(lis->dev, 1,
28877 +                       LIS302DL_INTMODE_FF_WU_1);
28878 +
28879 +       __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD);
28880 +}
28881 +
28882 +static void __enable_data_collection(struct lis302dl_info *lis)
28883 +{
28884 +       u_int8_t ctrl1 = LIS302DL_CTRL1_PD | LIS302DL_CTRL1_Xen |
28885 +                        LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen;
28886 +
28887 +       /* make sure we're powered up and generate data ready */
28888 +       __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, ctrl1);
28889 +
28890 +       /* If the threshold is zero, let the device generated an interrupt
28891 +        * on each datum */
28892 +       if (lis->threshold == 0) {
28893 +               __reg_write(lis, LIS302DL_REG_CTRL2, 0);
28894 +               __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_DATA_READY);
28895 +               __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_DATA_READY);
28896 +       } else {
28897 +               __reg_write(lis, LIS302DL_REG_CTRL2,
28898 +                               LIS302DL_CTRL2_HPFF1);
28899 +               __reg_write(lis, LIS302DL_REG_FF_WU_THS_1, lis->threshold);
28900 +               __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, lis->duration);
28901 +
28902 +               /* Clear the HP filter "starting point" */
28903 +               __reg_read(lis, LIS302DL_REG_HP_FILTER_RESET);
28904 +               __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1,
28905 +                               LIS302DL_FFWUCFG_XHIE | LIS302DL_FFWUCFG_YHIE |
28906 +                               LIS302DL_FFWUCFG_ZHIE);
28907 +               __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_FF_WU_12);
28908 +               __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_FF_WU_12);
28909 +       }
28910 +}
28911 +
28912 +#if 0
28913 +static void _report_btn_single(struct input_dev *inp, int btn)
28914 +{
28915 +       input_report_key(inp, btn, 1);
28916 +       input_sync(inp);
28917 +       input_report_key(inp, btn, 0);
28918 +}
28919 +
28920 +static void _report_btn_double(struct input_dev *inp, int btn)
28921 +{
28922 +       input_report_key(inp, btn, 1);
28923 +       input_sync(inp);
28924 +       input_report_key(inp, btn, 0);
28925 +       input_sync(inp);
28926 +       input_report_key(inp, btn, 1);
28927 +       input_sync(inp);
28928 +       input_report_key(inp, btn, 0);
28929 +}
28930 +#endif
28931 +
28932 +
28933 +static void lis302dl_bitbang_read_sample(struct lis302dl_info *lis)
28934 +{
28935 +       u8 data = 0xc0 | LIS302DL_REG_OUT_X; /* read, autoincrement */
28936 +       u8 read[5];
28937 +       unsigned long flags;
28938 +       int mg_per_sample;
28939 +
28940 +       local_irq_save(flags);
28941 +       mg_per_sample = __threshold_to_mg(lis, 1);
28942 +
28943 +       (lis->pdata->lis302dl_bitbang)(lis, &data, 1, &read[0], 5);
28944 +
28945 +       local_irq_restore(flags);
28946 +
28947 +       input_report_rel(lis->input_dev, REL_X, mg_per_sample * (s8)read[0]);
28948 +       input_report_rel(lis->input_dev, REL_Y, mg_per_sample * (s8)read[2]);
28949 +       input_report_rel(lis->input_dev, REL_Z, mg_per_sample * (s8)read[4]);
28950 +
28951 +       input_sync(lis->input_dev);
28952 +
28953 +       /* Reset the HP filter */
28954 +       __reg_read(lis, LIS302DL_REG_HP_FILTER_RESET);
28955 +}
28956 +
28957 +static irqreturn_t lis302dl_interrupt(int irq, void *_lis)
28958 +{
28959 +       struct lis302dl_info *lis = _lis;
28960 +
28961 +       lis302dl_bitbang_read_sample(lis);
28962 +       return IRQ_HANDLED;
28963 +}
28964 +
28965 +/* sysfs */
28966 +
28967 +static ssize_t show_rate(struct device *dev, struct device_attribute *attr,
28968 +                        char *buf)
28969 +{
28970 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
28971 +       u8 ctrl1;
28972 +       unsigned long flags;
28973 +
28974 +       local_irq_save(flags);
28975 +       ctrl1 = __reg_read(lis, LIS302DL_REG_CTRL1);
28976 +       local_irq_restore(flags);
28977 +
28978 +       return sprintf(buf, "%d\n", ctrl1 & LIS302DL_CTRL1_DR ? 400 : 100);
28979 +}
28980 +
28981 +static ssize_t set_rate(struct device *dev, struct device_attribute *attr,
28982 +                       const char *buf, size_t count)
28983 +{
28984 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
28985 +       unsigned long flags;
28986 +       int duration_ms = __duration_to_ms(lis, lis->duration);
28987 +
28988 +       local_irq_save(flags);
28989 +
28990 +       if (!strcmp(buf, "400\n")) {
28991 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR,
28992 +                                LIS302DL_CTRL1_DR);
28993 +               lis->flags |= LIS302DL_F_DR;
28994 +       } else {
28995 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_DR,
28996 +                               0);
28997 +               lis->flags &= ~LIS302DL_F_DR;
28998 +       }
28999 +       lis->duration = __ms_to_duration(lis, duration_ms);
29000 +       local_irq_restore(flags);
29001 +
29002 +       return count;
29003 +}
29004 +
29005 +static DEVICE_ATTR(sample_rate, S_IRUGO | S_IWUSR, show_rate, set_rate);
29006 +
29007 +static ssize_t show_scale(struct device *dev, struct device_attribute *attr,
29008 +                         char *buf)
29009 +{
29010 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29011 +       u_int8_t ctrl1;
29012 +       unsigned long flags;
29013 +
29014 +       local_irq_save(flags);
29015 +       ctrl1 = __reg_read(lis, LIS302DL_REG_CTRL1);
29016 +       local_irq_restore(flags);
29017 +
29018 +       return sprintf(buf, "%s\n", ctrl1 & LIS302DL_CTRL1_FS ? "9.2" : "2.3");
29019 +}
29020 +
29021 +static ssize_t set_scale(struct device *dev, struct device_attribute *attr,
29022 +                        const char *buf, size_t count)
29023 +{
29024 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29025 +       unsigned long flags;
29026 +       int threshold_mg = __threshold_to_mg(lis, lis->threshold);
29027 +
29028 +       local_irq_save(flags);
29029 +
29030 +       if (!strcmp(buf, "9.2\n")) {
29031 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS,
29032 +                                LIS302DL_CTRL1_FS);
29033 +               lis->flags |= LIS302DL_F_FS;
29034 +       } else {
29035 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_FS,
29036 +                               0);
29037 +               lis->flags &= ~LIS302DL_F_FS;
29038 +       }
29039 +
29040 +       /* Adjust the threshold */
29041 +       lis->threshold = __mg_to_threshold(lis, threshold_mg);
29042 +       if (lis->flags & LIS302DL_F_INPUT_OPEN)
29043 +               __enable_data_collection(lis);
29044 +
29045 +       local_irq_restore(flags);
29046 +
29047 +       return count;
29048 +}
29049 +
29050 +static DEVICE_ATTR(full_scale, S_IRUGO | S_IWUSR, show_scale, set_scale);
29051 +
29052 +static ssize_t show_threshold(struct device *dev, struct device_attribute *attr,
29053 +                char *buf)
29054 +{
29055 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29056 +
29057 +       return sprintf(buf, "%d\n", __threshold_to_mg(lis, lis->threshold));
29058 +}
29059 +
29060 +static ssize_t set_threshold(struct device *dev, struct device_attribute *attr,
29061 +                const char *buf, size_t count)
29062 +{
29063 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29064 +       u32 val;
29065 +
29066 +       if (sscanf(buf, "%d\n", &val) != 1)
29067 +               return -EINVAL;
29068 +       /* 8g is the maximum if FS is 1 */
29069 +       if (val < 0 || val > 8000)
29070 +               return -ERANGE;
29071 +
29072 +       /* Set the threshold and write it out if the device is used */
29073 +       lis->threshold = __mg_to_threshold(lis, val);
29074 +
29075 +       if (lis->flags & LIS302DL_F_INPUT_OPEN) {
29076 +               unsigned long flags;
29077 +
29078 +               local_irq_save(flags);
29079 +               __enable_data_collection(lis);
29080 +               local_irq_restore(flags);
29081 +       }
29082 +
29083 +       return count;
29084 +}
29085 +
29086 +static DEVICE_ATTR(threshold, S_IRUGO | S_IWUSR, show_threshold, set_threshold);
29087 +
29088 +static ssize_t show_duration(struct device *dev, struct device_attribute *attr,
29089 +                char *buf)
29090 +{
29091 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29092 +
29093 +       return sprintf(buf, "%d\n", __duration_to_ms(lis, lis->duration));
29094 +}
29095 +
29096 +static ssize_t set_duration(struct device *dev, struct device_attribute *attr,
29097 +                const char *buf, size_t count)
29098 +{
29099 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29100 +       u32 val;
29101 +
29102 +       if (sscanf(buf, "%d\n", &val) != 1)
29103 +               return -EINVAL;
29104 +       if (val < 0 || val > 2550)
29105 +               return -ERANGE;
29106 +
29107 +       lis->duration = __ms_to_duration(lis, val);
29108 +       if (lis->flags & LIS302DL_F_INPUT_OPEN)
29109 +               __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, lis->duration);
29110 +
29111 +       return count;
29112 +}
29113 +
29114 +static DEVICE_ATTR(duration, S_IRUGO | S_IWUSR, show_duration, set_duration);
29115 +
29116 +static ssize_t lis302dl_dump(struct device *dev, struct device_attribute *attr,
29117 +                                                                     char *buf)
29118 +{
29119 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29120 +       int n = 0;
29121 +       u8 reg[0x40];
29122 +       char *end = buf;
29123 +       unsigned long flags;
29124 +
29125 +       local_irq_save(flags);
29126 +
29127 +       for (n = 0; n < sizeof(reg); n++)
29128 +               reg[n] = __reg_read(lis, n);
29129 +
29130 +       local_irq_restore(flags);
29131 +
29132 +       for (n = 0; n < sizeof(reg); n += 16) {
29133 +               hex_dump_to_buffer(reg + n, 16, 16, 1, end, 128, 0);
29134 +               end += strlen(end);
29135 +               *end++ = '\n';
29136 +               *end++ = '\0';
29137 +       }
29138 +
29139 +       return end - buf;
29140 +}
29141 +static DEVICE_ATTR(dump, S_IRUGO, lis302dl_dump, NULL);
29142 +
29143 +/* Configure freefall/wakeup interrupts */
29144 +static ssize_t set_wakeup(struct device *dev, struct device_attribute *attr,
29145 +                        const char *buf, size_t count)
29146 +{
29147 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29148 +       u_int8_t x_lo, y_lo, z_lo;
29149 +       u_int8_t x_hi, y_hi, z_hi;
29150 +       int duration, threshold, and_events;
29151 +       int x, y, z;
29152 +
29153 +       /* Zero turns the feature off */
29154 +       if (strcmp(buf, "0\n") == 0) {
29155 +               lis->wakeup.active = 0;
29156 +
29157 +               if (lis->flags & LIS302DL_F_IRQ_WAKE) {
29158 +                       disable_irq_wake(lis->pdata->interrupt);
29159 +                       lis->flags &= ~LIS302DL_F_IRQ_WAKE;
29160 +               }
29161 +
29162 +               return count;
29163 +       }
29164 +
29165 +       if (sscanf(buf, "%d %d %d %d %d %d", &x, &y, &z, &threshold, &duration,
29166 +                       &and_events) != 6)
29167 +               return -EINVAL;
29168 +
29169 +       if (duration < 0 || duration > 2550 ||
29170 +                       threshold < 0 || threshold > 8000)
29171 +               return -ERANGE;
29172 +
29173 +       /* Interrupt flags */
29174 +       x_lo = x < 0 ? LIS302DL_FFWUCFG_XLIE : 0;
29175 +       y_lo = y < 0 ? LIS302DL_FFWUCFG_YLIE : 0;
29176 +       z_lo = z < 0 ? LIS302DL_FFWUCFG_ZLIE : 0;
29177 +       x_hi = x > 0 ? LIS302DL_FFWUCFG_XHIE : 0;
29178 +       y_hi = y > 0 ? LIS302DL_FFWUCFG_YHIE : 0;
29179 +       z_hi = z > 0 ? LIS302DL_FFWUCFG_ZHIE : 0;
29180 +
29181 +       lis->wakeup.duration = __ms_to_duration(lis, duration);
29182 +       lis->wakeup.threshold = __mg_to_threshold(lis, threshold);
29183 +       lis->wakeup.cfg = (and_events ? LIS302DL_FFWUCFG_AOI : 0) |
29184 +               x_lo | x_hi | y_lo | y_hi | z_lo | z_hi;
29185 +
29186 +       if (!(lis->flags & LIS302DL_F_IRQ_WAKE)) {
29187 +               enable_irq_wake(lis->pdata->interrupt);
29188 +               lis->flags |= LIS302DL_F_IRQ_WAKE;
29189 +       }
29190 +       lis->wakeup.active = 1;
29191 +
29192 +       return count;
29193 +}
29194 +
29195 +static ssize_t show_wakeup(struct device *dev,
29196 +               struct device_attribute *attr, char *buf)
29197 +{
29198 +       struct lis302dl_info *lis = dev_get_drvdata(dev);
29199 +       u8 config;
29200 +
29201 +       /* All events off? */
29202 +       if (!lis->wakeup.active)
29203 +               return sprintf(buf, "off\n");
29204 +
29205 +       config = lis->wakeup.cfg;
29206 +
29207 +       return sprintf(buf,
29208 +                       "%s events, duration %d, threshold %d, "
29209 +                       "enabled: %s %s %s %s %s %s\n",
29210 +                       (config & LIS302DL_FFWUCFG_AOI) == 0 ? "or" : "and",
29211 +                       __duration_to_ms(lis, lis->wakeup.duration),
29212 +                       __threshold_to_mg(lis, lis->wakeup.threshold),
29213 +                       (config & LIS302DL_FFWUCFG_XLIE) == 0 ? "---" : "xlo",
29214 +                       (config & LIS302DL_FFWUCFG_XHIE) == 0 ? "---" : "xhi",
29215 +                       (config & LIS302DL_FFWUCFG_YLIE) == 0 ? "---" : "ylo",
29216 +                       (config & LIS302DL_FFWUCFG_YHIE) == 0 ? "---" : "yhi",
29217 +                       (config & LIS302DL_FFWUCFG_ZLIE) == 0 ? "---" : "zlo",
29218 +                       (config & LIS302DL_FFWUCFG_ZHIE) == 0 ? "---" : "zhi");
29219 +}
29220 +
29221 +static DEVICE_ATTR(wakeup, S_IRUGO | S_IWUSR, show_wakeup, set_wakeup);
29222 +
29223 +static struct attribute *lis302dl_sysfs_entries[] = {
29224 +       &dev_attr_sample_rate.attr,
29225 +       &dev_attr_full_scale.attr,
29226 +       &dev_attr_threshold.attr,
29227 +       &dev_attr_duration.attr,
29228 +       &dev_attr_dump.attr,
29229 +       &dev_attr_wakeup.attr,
29230 +       NULL
29231 +};
29232 +
29233 +static struct attribute_group lis302dl_attr_group = {
29234 +       .name   = NULL,
29235 +       .attrs  = lis302dl_sysfs_entries,
29236 +};
29237 +
29238 +/* input device handling and driver core interaction */
29239 +static int lis302dl_input_open(struct input_dev *inp)
29240 +{
29241 +       struct lis302dl_info *lis = inp->private;
29242 +       unsigned long flags;
29243 +
29244 +       local_irq_save(flags);
29245 +
29246 +       __enable_data_collection(lis);
29247 +       lis->flags |= LIS302DL_F_INPUT_OPEN;
29248 +
29249 +       /* kick it off -- since we are edge triggered, if we missed the edge
29250 +        * permanent low interrupt is death for us */
29251 +       lis302dl_bitbang_read_sample(lis);
29252 +
29253 +       local_irq_restore(flags);
29254 +
29255 +       return 0;
29256 +}
29257 +
29258 +static void lis302dl_input_close(struct input_dev *inp)
29259 +{
29260 +       struct lis302dl_info *lis = inp->private;
29261 +       u_int8_t ctrl1 = LIS302DL_CTRL1_Xen | LIS302DL_CTRL1_Yen |
29262 +                        LIS302DL_CTRL1_Zen;
29263 +       unsigned long flags;
29264 +
29265 +       local_irq_save(flags);
29266 +
29267 +       /* since the input core already serializes access and makes sure we
29268 +        * only see close() for the close of the last user, we can safely
29269 +        * disable the data ready events */
29270 +       __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, ctrl1, 0x00);
29271 +       lis->flags &= ~LIS302DL_F_INPUT_OPEN;
29272 +
29273 +       /* however, don't power down the whole device if still needed */
29274 +       if (!(lis->flags & LIS302DL_F_WUP_FF ||
29275 +             lis->flags & LIS302DL_F_WUP_CLICK)) {
29276 +               __reg_set_bit_mask(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD,
29277 +                                0x00);
29278 +       }
29279 +       local_irq_restore(flags);
29280 +}
29281 +
29282 +/* get the device to reload its coefficients from EEPROM and wait for it
29283 + * to complete
29284 + */
29285 +
29286 +static int __lis302dl_reset_device(struct lis302dl_info *lis)
29287 +{
29288 +       int timeout = 10;
29289 +
29290 +       __reg_write(lis, LIS302DL_REG_CTRL2,
29291 +                       LIS302DL_CTRL2_BOOT | LIS302DL_CTRL2_FDS);
29292 +
29293 +       while ((__reg_read(lis, LIS302DL_REG_CTRL2)
29294 +                       & LIS302DL_CTRL2_BOOT) && (timeout--))
29295 +               mdelay(1);
29296 +
29297 +       return !!(timeout < 0);
29298 +}
29299 +
29300 +static int __devinit lis302dl_probe(struct platform_device *pdev)
29301 +{
29302 +       int rc;
29303 +       struct lis302dl_info *lis;
29304 +       u_int8_t wai;
29305 +       unsigned long flags;
29306 +       struct lis302dl_platform_data *pdata = pdev->dev.platform_data;
29307 +
29308 +       lis = kzalloc(sizeof(*lis), GFP_KERNEL);
29309 +       if (!lis)
29310 +               return -ENOMEM;
29311 +
29312 +       local_irq_save(flags);
29313 +
29314 +       lis->dev = &pdev->dev;
29315 +
29316 +       dev_set_drvdata(lis->dev, lis);
29317 +
29318 +       lis->pdata = pdata;
29319 +
29320 +       /* Configure our IO */
29321 +       (lis->pdata->lis302dl_suspend_io)(lis, 1);
29322 +
29323 +       wai = __reg_read(lis, LIS302DL_REG_WHO_AM_I);
29324 +       if (wai != LIS302DL_WHO_AM_I_MAGIC) {
29325 +               dev_err(lis->dev, "unknown who_am_i signature 0x%02x\n", wai);
29326 +               dev_set_drvdata(lis->dev, NULL);
29327 +               rc = -ENODEV;
29328 +               goto bail_free_lis;
29329 +       }
29330 +
29331 +       rc = sysfs_create_group(&lis->dev->kobj, &lis302dl_attr_group);
29332 +       if (rc) {
29333 +               dev_err(lis->dev, "error creating sysfs group\n");
29334 +               goto bail_free_lis;
29335 +       }
29336 +
29337 +       /* initialize input layer details */
29338 +       lis->input_dev = input_allocate_device();
29339 +       if (!lis->input_dev) {
29340 +               dev_err(lis->dev, "Unable to allocate input device\n");
29341 +               goto bail_sysfs;
29342 +       }
29343 +
29344 +       set_bit(EV_REL, lis->input_dev->evbit);
29345 +       set_bit(REL_X, lis->input_dev->relbit);
29346 +       set_bit(REL_Y, lis->input_dev->relbit);
29347 +       set_bit(REL_Z, lis->input_dev->relbit);
29348 +/*     set_bit(EV_KEY, lis->input_dev->evbit);
29349 +       set_bit(BTN_X, lis->input_dev->keybit);
29350 +       set_bit(BTN_Y, lis->input_dev->keybit);
29351 +       set_bit(BTN_Z, lis->input_dev->keybit);
29352 +*/
29353 +       lis->threshold = 1;
29354 +       lis->duration = 0;
29355 +       memset(&lis->wakeup, 0, sizeof(lis->wakeup));
29356 +
29357 +       lis->input_dev->private = lis;
29358 +       lis->input_dev->name = pdata->name;
29359 +        /* SPI Bus not defined as a valid bus for input subsystem*/
29360 +       lis->input_dev->id.bustype = BUS_I2C; /* lie about it */
29361 +       lis->input_dev->open = lis302dl_input_open;
29362 +       lis->input_dev->close = lis302dl_input_close;
29363 +
29364 +       rc = input_register_device(lis->input_dev);
29365 +       if (rc) {
29366 +               dev_err(lis->dev, "error %d registering input device\n", rc);
29367 +               goto bail_inp_dev;
29368 +       }
29369 +
29370 +       if (__lis302dl_reset_device(lis))
29371 +               dev_err(lis->dev, "device BOOT reload failed\n");
29372 +
29373 +       /* force us powered */
29374 +       __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_PD |
29375 +                       LIS302DL_CTRL1_Xen |
29376 +                       LIS302DL_CTRL1_Yen |
29377 +                       LIS302DL_CTRL1_Zen);
29378 +       mdelay(1);
29379 +
29380 +       __reg_write(lis, LIS302DL_REG_CTRL2, 0);
29381 +       __reg_write(lis, LIS302DL_REG_CTRL3,
29382 +                       LIS302DL_CTRL3_PP_OD | LIS302DL_CTRL3_IHL);
29383 +       __reg_write(lis, LIS302DL_REG_FF_WU_THS_1, 0x0);
29384 +       __reg_write(lis, LIS302DL_REG_FF_WU_DURATION_1, 0x00);
29385 +       __reg_write(lis, LIS302DL_REG_FF_WU_CFG_1, 0x0);
29386 +
29387 +       /* start off in powered down mode; we power up when someone opens us */
29388 +       __reg_write(lis, LIS302DL_REG_CTRL1, LIS302DL_CTRL1_Xen |
29389 +                       LIS302DL_CTRL1_Yen | LIS302DL_CTRL1_Zen);
29390 +
29391 +       if (pdata->open_drain)
29392 +               /* switch interrupt to open collector, active-low */
29393 +               __reg_write(lis, LIS302DL_REG_CTRL3,
29394 +                               LIS302DL_CTRL3_PP_OD | LIS302DL_CTRL3_IHL);
29395 +       else
29396 +               /* push-pull, active-low */
29397 +               __reg_write(lis, LIS302DL_REG_CTRL3, LIS302DL_CTRL3_IHL);
29398 +
29399 +       __lis302dl_int_mode(lis->dev, 1, LIS302DL_INTMODE_GND);
29400 +       __lis302dl_int_mode(lis->dev, 2, LIS302DL_INTMODE_GND);
29401 +
29402 +       __reg_read(lis, LIS302DL_REG_STATUS);
29403 +       __reg_read(lis, LIS302DL_REG_FF_WU_SRC_1);
29404 +       __reg_read(lis, LIS302DL_REG_FF_WU_SRC_2);
29405 +       __reg_read(lis, LIS302DL_REG_CLICK_SRC);
29406 +
29407 +       dev_info(lis->dev, "Found %s\n", pdata->name);
29408 +
29409 +       lis->pdata = pdata;
29410 +
29411 +       rc = request_irq(pdata->interrupt, lis302dl_interrupt,
29412 +                        IRQF_TRIGGER_FALLING, "lis302dl", lis);
29413 +       if (rc < 0) {
29414 +               dev_err(lis->dev, "error requesting IRQ %d\n",
29415 +                       lis->pdata->interrupt);
29416 +               goto bail_inp_reg;
29417 +       }
29418 +       local_irq_restore(flags);
29419 +       return 0;
29420 +
29421 +bail_inp_reg:
29422 +       input_unregister_device(lis->input_dev);
29423 +bail_inp_dev:
29424 +       input_free_device(lis->input_dev);
29425 +bail_sysfs:
29426 +       sysfs_remove_group(&lis->dev->kobj, &lis302dl_attr_group);
29427 +bail_free_lis:
29428 +       kfree(lis);
29429 +       local_irq_restore(flags);
29430 +       return rc;
29431 +}
29432 +
29433 +static int __devexit lis302dl_remove(struct platform_device *pdev)
29434 +{
29435 +       struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
29436 +       unsigned long flags;
29437 +
29438 +       /* Reset and power down the device */
29439 +       local_irq_save(flags);
29440 +       __reg_write(lis, LIS302DL_REG_CTRL3, 0x00);
29441 +       __reg_write(lis, LIS302DL_REG_CTRL2, 0x00);
29442 +       __reg_write(lis, LIS302DL_REG_CTRL1, 0x00);
29443 +       local_irq_restore(flags);
29444 +
29445 +       /* Cleanup resources */
29446 +       free_irq(lis->pdata->interrupt, lis);
29447 +       sysfs_remove_group(&pdev->dev.kobj, &lis302dl_attr_group);
29448 +       input_unregister_device(lis->input_dev);
29449 +       if (lis->input_dev)
29450 +               input_free_device(lis->input_dev);
29451 +       dev_set_drvdata(lis->dev, NULL);
29452 +       kfree(lis);
29453 +
29454 +       return 0;
29455 +}
29456 +
29457 +#ifdef CONFIG_PM
29458 +
29459 +static u8 regs_to_save[] = {
29460 +       LIS302DL_REG_CTRL1,
29461 +       LIS302DL_REG_CTRL2,
29462 +       LIS302DL_REG_CTRL3,
29463 +       LIS302DL_REG_FF_WU_CFG_1,
29464 +       LIS302DL_REG_FF_WU_THS_1,
29465 +       LIS302DL_REG_FF_WU_DURATION_1,
29466 +       LIS302DL_REG_FF_WU_CFG_2,
29467 +       LIS302DL_REG_FF_WU_THS_2,
29468 +       LIS302DL_REG_FF_WU_DURATION_2,
29469 +       LIS302DL_REG_CLICK_CFG,
29470 +       LIS302DL_REG_CLICK_THSY_X,
29471 +       LIS302DL_REG_CLICK_THSZ,
29472 +       LIS302DL_REG_CLICK_TIME_LIMIT,
29473 +       LIS302DL_REG_CLICK_LATENCY,
29474 +       LIS302DL_REG_CLICK_WINDOW,
29475 +
29476 +};
29477 +
29478 +static int lis302dl_suspend(struct platform_device *pdev, pm_message_t state)
29479 +{
29480 +       struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
29481 +       unsigned long flags;
29482 +       u_int8_t tmp;
29483 +       int n;
29484 +
29485 +       /* determine if we want to wake up from the accel. */
29486 +       if (lis->flags & LIS302DL_F_WUP_CLICK)
29487 +               return 0;
29488 +
29489 +       disable_irq(lis->pdata->interrupt);
29490 +       local_irq_save(flags);
29491 +
29492 +       /*
29493 +        * When we share SPI over multiple sensors, there is a race here
29494 +        * that one or more sensors will lose.  In that case, the shared
29495 +        * SPI bus GPIO will be in sleep mode and partially pulled down.  So
29496 +        * we explicitly put our IO into "wake" mode here before the final
29497 +        * traffic to the sensor.
29498 +        */
29499 +       (lis->pdata->lis302dl_suspend_io)(lis, 1);
29500 +
29501 +       /* save registers */
29502 +       for (n = 0; n < ARRAY_SIZE(regs_to_save); n++)
29503 +               lis->regs[regs_to_save[n]] =
29504 +                       __reg_read(lis, regs_to_save[n]);
29505 +
29506 +       /* power down or enable wakeup */
29507 +       if (!lis->wakeup.active) {
29508 +               tmp = __reg_read(lis, LIS302DL_REG_CTRL1);
29509 +               tmp &= ~LIS302DL_CTRL1_PD;
29510 +               __reg_write(lis, LIS302DL_REG_CTRL1, tmp);
29511 +       } else
29512 +               __enable_wakeup(lis);
29513 +
29514 +       /* place our IO to the device in sleep-compatible states */
29515 +       (lis->pdata->lis302dl_suspend_io)(lis, 0);
29516 +
29517 +       local_irq_restore(flags);
29518 +
29519 +       return 0;
29520 +}
29521 +
29522 +static int lis302dl_resume(struct platform_device *pdev)
29523 +{
29524 +       struct lis302dl_info *lis = dev_get_drvdata(&pdev->dev);
29525 +       unsigned long flags;
29526 +       int n;
29527 +
29528 +       if (lis->flags & LIS302DL_F_WUP_CLICK)
29529 +               return 0;
29530 +
29531 +       local_irq_save(flags);
29532 +
29533 +       /* get our IO to the device back in operational states */
29534 +       (lis->pdata->lis302dl_suspend_io)(lis, 1);
29535 +
29536 +       /* resume from powerdown first! */
29537 +       __reg_write(lis, LIS302DL_REG_CTRL1,
29538 +                       LIS302DL_CTRL1_PD |
29539 +                       LIS302DL_CTRL1_Xen |
29540 +                       LIS302DL_CTRL1_Yen |
29541 +                       LIS302DL_CTRL1_Zen);
29542 +       mdelay(1);
29543 +
29544 +       if (__lis302dl_reset_device(lis))
29545 +               dev_err(&pdev->dev, "device BOOT reload failed\n");
29546 +
29547 +       lis->regs[LIS302DL_REG_CTRL1] |=        LIS302DL_CTRL1_PD |
29548 +                                               LIS302DL_CTRL1_Xen |
29549 +                                               LIS302DL_CTRL1_Yen |
29550 +                                               LIS302DL_CTRL1_Zen;
29551 +
29552 +       /* restore registers after resume */
29553 +       for (n = 0; n < ARRAY_SIZE(regs_to_save); n++)
29554 +               __reg_write(lis, regs_to_save[n], lis->regs[regs_to_save[n]]);
29555 +
29556 +       local_irq_restore(flags);
29557 +       enable_irq(lis->pdata->interrupt);
29558 +
29559 +       return 0;
29560 +}
29561 +#else
29562 +#define lis302dl_suspend       NULL
29563 +#define lis302dl_resume                NULL
29564 +#endif
29565 +
29566 +static struct platform_driver lis302dl_driver = {
29567 +       .driver = {
29568 +               .name   = "lis302dl",
29569 +               .owner  = THIS_MODULE,
29570 +       },
29571 +
29572 +       .probe   = lis302dl_probe,
29573 +       .remove  = __devexit_p(lis302dl_remove),
29574 +       .suspend = lis302dl_suspend,
29575 +       .resume  = lis302dl_resume,
29576 +};
29577 +
29578 +static int __devinit lis302dl_init(void)
29579 +{
29580 +       return platform_driver_register(&lis302dl_driver);
29581 +}
29582 +
29583 +static void __exit lis302dl_exit(void)
29584 +{
29585 +       platform_driver_unregister(&lis302dl_driver);
29586 +}
29587 +
29588 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
29589 +MODULE_LICENSE("GPL");
29590 +
29591 +module_init(lis302dl_init);
29592 +module_exit(lis302dl_exit);
29593 Index: linux-2.6.24.7/drivers/input/misc/Makefile
29594 ===================================================================
29595 --- linux-2.6.24.7.orig/drivers/input/misc/Makefile     2008-12-11 22:46:09.000000000 +0100
29596 +++ linux-2.6.24.7/drivers/input/misc/Makefile  2008-12-11 22:47:43.000000000 +0100
29597 @@ -19,3 +19,4 @@ obj-$(CONFIG_INPUT_YEALINK)           += yealink.
29598  obj-$(CONFIG_HP_SDC_RTC)               += hp_sdc_rtc.o
29599  obj-$(CONFIG_INPUT_UINPUT)             += uinput.o
29600  obj-$(CONFIG_INPUT_GPIO_BUTTONS)       += gpio_buttons.o
29601 +obj-$(CONFIG_INPUT_LIS302DL)           += lis302dl.o
29602 Index: linux-2.6.24.7/drivers/input/mousedev.c
29603 ===================================================================
29604 --- linux-2.6.24.7.orig/drivers/input/mousedev.c        2008-12-11 22:46:07.000000000 +0100
29605 +++ linux-2.6.24.7/drivers/input/mousedev.c     2008-12-11 22:46:49.000000000 +0100
29606 @@ -1009,6 +1009,7 @@ static const struct input_device_id mous
29607                 .evbit = { BIT_MASK(EV_KEY) | BIT_MASK(EV_REL) },
29608                 .relbit = { BIT_MASK(REL_WHEEL) },
29609         },      /* A separate scrollwheel */
29610 +#if 0
29611         {
29612                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
29613                                 INPUT_DEVICE_ID_MATCH_KEYBIT |
29614 @@ -1018,6 +1019,7 @@ static const struct input_device_id mous
29615                 .absbit = { BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) },
29616         },      /* A tablet like device, at least touch detection,
29617                    two absolute axes */
29618 +#endif
29619         {
29620                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
29621                                 INPUT_DEVICE_ID_MATCH_KEYBIT |
29622 Index: linux-2.6.24.7/drivers/input/touchscreen/Kconfig
29623 ===================================================================
29624 --- linux-2.6.24.7.orig/drivers/input/touchscreen/Kconfig       2008-12-11 22:46:07.000000000 +0100
29625 +++ linux-2.6.24.7/drivers/input/touchscreen/Kconfig    2008-12-11 22:46:49.000000000 +0100
29626 @@ -67,6 +67,24 @@ config TOUCHSCREEN_FUJITSU
29627           To compile this driver as a module, choose M here: the
29628           module will be called fujitsu-ts.
29629
29630 +config TOUCHSCREEN_S3C2410
29631 +       tristate "Samsung S3C2410 touchscreen input driver"
29632 +       depends on ARCH_S3C2410 && INPUT && INPUT_TOUCHSCREEN
29633 +       select SERIO
29634 +       help
29635 +         Say Y here if you have the s3c2410 touchscreen.
29636 +
29637 +         If unsure, say N.
29638 +
29639 +         To compile this driver as a module, choose M here: the
29640 +         module will be called s3c2410_ts.
29641 +
29642 +config TOUCHSCREEN_S3C2410_DEBUG
29643 +       boolean "Samsung S3C2410 touchscreen debug messages"
29644 +       depends on TOUCHSCREEN_S3C2410
29645 +       help
29646 +         Select this if you want debug messages
29647 +
29648  config TOUCHSCREEN_GUNZE
29649         tristate "Gunze AHL-51S touchscreen"
29650         select SERIO
29651 Index: linux-2.6.24.7/drivers/input/touchscreen/Makefile
29652 ===================================================================
29653 --- linux-2.6.24.7.orig/drivers/input/touchscreen/Makefile      2008-12-11 22:46:07.000000000 +0100
29654 +++ linux-2.6.24.7/drivers/input/touchscreen/Makefile   2008-12-11 22:46:49.000000000 +0100
29655 @@ -19,3 +19,4 @@ obj-$(CONFIG_TOUCHSCREEN_PENMOUNT)    += pe
29656  obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT)   += touchright.o
29657  obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN)     += touchwin.o
29658  obj-$(CONFIG_TOUCHSCREEN_UCB1400)      += ucb1400_ts.o
29659 +obj-$(CONFIG_TOUCHSCREEN_S3C2410)      += s3c2410_ts.o
29660 Index: linux-2.6.24.7/drivers/input/touchscreen/s3c2410_ts.c
29661 ===================================================================
29662 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
29663 +++ linux-2.6.24.7/drivers/input/touchscreen/s3c2410_ts.c       2008-12-11 22:46:49.000000000 +0100
29664 @@ -0,0 +1,589 @@
29665 +/*
29666 + * This program is free software; you can redistribute it and/or modify
29667 + * it under the terms of the GNU General Public License as published by
29668 + * the Free Software Foundation; either version 2 of the License, or
29669 + * (at your option) any later version.
29670 + *
29671 + * This program is distributed in the hope that it will be useful,
29672 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
29673 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
29674 + * GNU General Public License for more details.
29675 + *
29676 + * You should have received a copy of the GNU General Public License
29677 + * along with this program; if not, write to the Free Software
29678 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29679 + *
29680 + * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
29681 + * iPAQ H1940 touchscreen support
29682 + *
29683 + * ChangeLog
29684 + *
29685 + * 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
29686 + *     - added clock (de-)allocation code
29687 + *
29688 + * 2005-03-06: Arnaud Patard <arnaud.patard@rtp-net.org>
29689 + *      - h1940_ -> s3c2410 (this driver is now also used on the n30
29690 + *        machines :P)
29691 + *      - Debug messages are now enabled with the config option
29692 + *        TOUCHSCREEN_S3C2410_DEBUG
29693 + *      - Changed the way the value are read
29694 + *      - Input subsystem should now work
29695 + *      - Use ioremap and readl/writel
29696 + *
29697 + * 2005-03-23: Arnaud Patard <arnaud.patard@rtp-net.org>
29698 + *      - Make use of some undocumented features of the touchscreen
29699 + *        controller
29700 + *
29701 + * 2007-05-23: Harald Welte <laforge@openmoko.org>
29702 + *     - Add proper support for S32440
29703 + *
29704 + * 2008-06-18: Andy Green <andy@openmoko.com>
29705 + *      - Outlier removal
29706 + */
29707 +
29708 +#include <linux/errno.h>
29709 +#include <linux/kernel.h>
29710 +#include <linux/module.h>
29711 +#include <linux/slab.h>
29712 +#include <linux/input.h>
29713 +#include <linux/init.h>
29714 +#include <linux/serio.h>
29715 +#include <linux/delay.h>
29716 +#include <linux/platform_device.h>
29717 +#include <linux/clk.h>
29718 +#include <asm/io.h>
29719 +#include <asm/irq.h>
29720 +
29721 +#include <asm/arch/regs-gpio.h>
29722 +#include <asm/arch/ts.h>
29723 +
29724 +#include <asm/plat-s3c/regs-adc.h>
29725 +
29726 +/* For ts.dev.id.version */
29727 +#define S3C2410TSVERSION       0x0101
29728 +
29729 +#define TSC_SLEEP  (S3C2410_ADCTSC_PULL_UP_DISABLE | S3C2410_ADCTSC_XY_PST(0))
29730 +
29731 +#define WAIT4INT(x)  (((x)<<8) | \
29732 +                    S3C2410_ADCTSC_YM_SEN | \
29733 +                    S3C2410_ADCTSC_YP_SEN | \
29734 +                    S3C2410_ADCTSC_XP_SEN | \
29735 +                    S3C2410_ADCTSC_XY_PST(3))
29736 +
29737 +#define AUTOPST             (S3C2410_ADCTSC_YM_SEN | \
29738 +                     S3C2410_ADCTSC_YP_SEN | \
29739 +                     S3C2410_ADCTSC_XP_SEN | \
29740 +                     S3C2410_ADCTSC_AUTO_PST | \
29741 +                     S3C2410_ADCTSC_XY_PST(0))
29742 +
29743 +#define DEBUG_LVL    KERN_DEBUG
29744 +
29745 +#define TOUCH_STANDBY_FLAG 0
29746 +#define TOUCH_PRESSED_FLAG 1
29747 +#define TOUCH_RELEASE_FLAG 2
29748 +
29749 +#define TOUCH_RELEASE_TIMEOUT (HZ >> 4)
29750 +
29751 +MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
29752 +MODULE_DESCRIPTION("s3c2410 touchscreen driver");
29753 +MODULE_LICENSE("GPL");
29754 +
29755 +/*
29756 + * Definitions & global arrays.
29757 + */
29758 +
29759 +
29760 +static char *s3c2410ts_name = "s3c2410 TouchScreen";
29761 +
29762 +/*
29763 + * Per-touchscreen data.
29764 + */
29765 +
29766 +struct s3c2410ts_sample {
29767 +       int x;
29768 +       int y;
29769 +};
29770 +
29771 +struct s3c2410ts {
29772 +       struct input_dev *dev;
29773 +       long xp;
29774 +       long yp;
29775 +       int count;
29776 +       int shift;
29777 +       int extent;  /* 1 << shift */
29778 +
29779 +       /* the raw sample fifo is a lightweight way to track a running average
29780 +        * of all taken samples.  "running average" here means that it gives
29781 +        * correct average for each sample, not only at the end of block of
29782 +        * samples
29783 +        */
29784 +       int excursion_filter_len;
29785 +       struct s3c2410ts_sample *raw_sample_fifo;
29786 +       int head_raw_fifo;
29787 +       int tail_raw_fifo;
29788 +       struct s3c2410ts_sample raw_running_avg;
29789 +       int reject_threshold_vs_avg;
29790 +       int flag_previous_exceeded_threshold;
29791 +       int flag_first_touch_sent;
29792 +};
29793 +
29794 +static struct s3c2410ts ts;
29795 +static void __iomem *base_addr;
29796 +
29797 +static void clear_raw_fifo(void)
29798 +{
29799 +       ts.head_raw_fifo = 0;
29800 +       ts.tail_raw_fifo = 0;
29801 +       ts.raw_running_avg.x = 0;
29802 +       ts.raw_running_avg.y = 0;
29803 +       ts.flag_previous_exceeded_threshold = 0;
29804 +       ts.flag_first_touch_sent = TOUCH_STANDBY_FLAG;
29805 +}
29806 +
29807 +
29808 +static inline void s3c2410_ts_connect(void)
29809 +{
29810 +       s3c2410_gpio_cfgpin(S3C2410_GPG12, S3C2410_GPG12_XMON);
29811 +       s3c2410_gpio_cfgpin(S3C2410_GPG13, S3C2410_GPG13_nXPON);
29812 +       s3c2410_gpio_cfgpin(S3C2410_GPG14, S3C2410_GPG14_YMON);
29813 +       s3c2410_gpio_cfgpin(S3C2410_GPG15, S3C2410_GPG15_nYPON);
29814 +}
29815 +
29816 +static void touch_timer_fire(unsigned long data);
29817 +static struct timer_list touch_timer =
29818 +               TIMER_INITIALIZER(touch_timer_fire, 0, 0);
29819 +
29820 +static void touch_timer_fire(unsigned long data)
29821 +{
29822 +       unsigned long data0;
29823 +       unsigned long data1;
29824 +       int updown;
29825 +
29826 +       data0 = readl(base_addr + S3C2410_ADCDAT0);
29827 +       data1 = readl(base_addr + S3C2410_ADCDAT1);
29828 +
29829 +       updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) &&
29830 +                                           (!(data1 & S3C2410_ADCDAT0_UPDOWN));
29831 +
29832 +        if ( updown && ts.flag_first_touch_sent == TOUCH_RELEASE_FLAG ) {
29833 +               ts.flag_first_touch_sent = TOUCH_PRESSED_FLAG;
29834 +        }
29835 +
29836 +       if (updown) {
29837 +               if (ts.count != 0) {
29838 +                       ts.xp >>= ts.shift;
29839 +                       ts.yp >>= ts.shift;
29840 +
29841 +#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
29842 +                       {
29843 +                               struct timeval tv;
29844 +
29845 +                               do_gettimeofday(&tv);
29846 +                               printk(DEBUG_LVL "T:%06d, X:%03ld, Y:%03ld\n",
29847 +                                                (int)tv.tv_usec, ts.xp, ts.yp);
29848 +                       }
29849 +#endif
29850 +
29851 +                       input_report_abs(ts.dev, ABS_X, ts.xp);
29852 +                       input_report_abs(ts.dev, ABS_Y, ts.yp);
29853 +
29854 +                       input_report_key(ts.dev, BTN_TOUCH, 1);
29855 +                       input_report_abs(ts.dev, ABS_PRESSURE, 1);
29856 +                       input_sync(ts.dev);
29857 +                       ts.flag_first_touch_sent = TOUCH_PRESSED_FLAG;
29858 +               }
29859 +
29860 +               ts.xp = 0;
29861 +               ts.yp = 0;
29862 +               ts.count = 0;
29863 +
29864 +               writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST,
29865 +                                                     base_addr+S3C2410_ADCTSC);
29866 +               writel(readl(base_addr+S3C2410_ADCCON) |
29867 +                        S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON);
29868 +       } else {
29869 +               ts.count = 0;
29870 +
29871 +                if ( ts.flag_first_touch_sent == TOUCH_RELEASE_FLAG ) {
29872 +                       input_report_key(ts.dev, BTN_TOUCH, 0);
29873 +                       input_report_abs(ts.dev, ABS_PRESSURE, 0);
29874 +                       input_sync(ts.dev);
29875 +                       ts.flag_first_touch_sent = TOUCH_STANDBY_FLAG;
29876 +                } if ( ts.flag_first_touch_sent == TOUCH_PRESSED_FLAG ) {
29877 +                       ts.flag_first_touch_sent = TOUCH_RELEASE_FLAG;
29878 +                       mod_timer(&touch_timer, jiffies + TOUCH_RELEASE_TIMEOUT);
29879 +                }
29880 +
29881 +               writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC);
29882 +       }
29883 +}
29884 +
29885 +static irqreturn_t stylus_updown(int irq, void *dev_id)
29886 +{
29887 +       unsigned long data0;
29888 +       unsigned long data1;
29889 +       int updown;
29890 +
29891 +       data0 = readl(base_addr+S3C2410_ADCDAT0);
29892 +       data1 = readl(base_addr+S3C2410_ADCDAT1);
29893 +
29894 +       updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) &&
29895 +                                           (!(data1 & S3C2410_ADCDAT0_UPDOWN));
29896 +
29897 +       /* TODO we should never get an interrupt with updown set while
29898 +        * the timer is running, but maybe we ought to verify that the
29899 +        * timer isn't running anyways. */
29900 +
29901 +       if (updown)
29902 +               touch_timer_fire(0);
29903 +
29904 +       return IRQ_HANDLED;
29905 +}
29906 +
29907 +
29908 +static irqreturn_t stylus_action(int irq, void *dev_id)
29909 +{
29910 +       unsigned long x;
29911 +       unsigned long y;
29912 +       int length = (ts.head_raw_fifo - ts.tail_raw_fifo) & (ts.extent - 1);
29913 +       int scaled_avg_x;
29914 +       int scaled_avg_y;
29915 +
29916 +       x = readl(base_addr + S3C2410_ADCDAT0) & S3C2410_ADCDAT0_XPDATA_MASK;
29917 +       y = readl(base_addr + S3C2410_ADCDAT1) & S3C2410_ADCDAT1_YPDATA_MASK;
29918 +
29919 +       if (!length)
29920 +               goto store_sample;
29921 +
29922 +       scaled_avg_x = ts.raw_running_avg.x / length;
29923 +       scaled_avg_y = ts.raw_running_avg.y / length;
29924 +
29925 +       /* we appear to accept every sample into both the running average FIFO
29926 +        * and the summing average.  BUT, if the last sample crossed a
29927 +        * machine-set threshold, each time we do a beauty contest
29928 +        * on the new sample comparing if it is closer to the running
29929 +        * average and the previous sample.  If it is closer to the previous
29930 +        * suspicious sample, we assume the change is real and accept both
29931 +        * if the new sample has returned to being closer to the average than
29932 +        * the previous sample, we take the previous sample as an excursion
29933 +        * and overwrite it in both the running average and summing average.
29934 +        */
29935 +
29936 +       if (ts.flag_previous_exceeded_threshold)
29937 +               /* new one closer to "nonconformist" previous, or average?
29938 +                * Pythagoras?  Who?  Don't need it because large excursion
29939 +                * will be accounted for correctly this way
29940 +                */
29941 +               if ((abs(x - scaled_avg_x) + abs(y - scaled_avg_y)) <
29942 +                   (abs(x - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29943 +                                                         (ts.extent - 1)].x) +
29944 +                    abs(y - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29945 +                                                        (ts.extent - 1)].y))) {
29946 +                       /* it's closer to average, reject previous as a one-
29947 +                        * shot excursion, by overwriting it
29948 +                        */
29949 +                       ts.xp += x - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29950 +                                                            (ts.extent - 1)].x;
29951 +                       ts.yp += y - ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29952 +                                                            (ts.extent - 1)].y;
29953 +                       ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29954 +                                                        (ts.extent - 1)].x = x;
29955 +                       ts.raw_sample_fifo[(ts.head_raw_fifo - 1) &
29956 +                                                        (ts.extent - 1)].y = y;
29957 +                       /* no new sample: replaced previous, so we are done */
29958 +                       goto completed;
29959 +               }
29960 +               /* else it was closer to nonconformist previous: it's likely
29961 +                * a genuine consistent move then.
29962 +                * Keep previous and add new guy.
29963 +                */
29964 +
29965 +       if ((x >= scaled_avg_x - ts.reject_threshold_vs_avg) &&
29966 +           (x <= scaled_avg_x + ts.reject_threshold_vs_avg) &&
29967 +           (y >= scaled_avg_y - ts.reject_threshold_vs_avg) &&
29968 +           (y <= scaled_avg_y + ts.reject_threshold_vs_avg))
29969 +               ts.flag_previous_exceeded_threshold = 0;
29970 +       else
29971 +               ts.flag_previous_exceeded_threshold = 1;
29972 +
29973 +store_sample:
29974 +       ts.xp += x;
29975 +       ts.yp += y;
29976 +       ts.count++;
29977 +
29978 +       /* remove oldest sample from avg when we have full pipeline */
29979 +       if (((ts.head_raw_fifo + 1) & (ts.extent - 1)) == ts.tail_raw_fifo) {
29980 +               ts.raw_running_avg.x -= ts.raw_sample_fifo[ts.tail_raw_fifo].x;
29981 +               ts.raw_running_avg.y -= ts.raw_sample_fifo[ts.tail_raw_fifo].y;
29982 +               ts.tail_raw_fifo = (ts.tail_raw_fifo + 1) & (ts.extent - 1);
29983 +       }
29984 +       /* always add current sample to fifo and average */
29985 +       ts.raw_sample_fifo[ts.head_raw_fifo].x = x;
29986 +       ts.raw_sample_fifo[ts.head_raw_fifo].y = y;
29987 +       ts.raw_running_avg.x += x;
29988 +       ts.raw_running_avg.y += y;
29989 +       ts.head_raw_fifo = (ts.head_raw_fifo + 1) & (ts.extent - 1);
29990 +
29991 +completed:
29992 +       if (ts.count >= (1 << ts.shift)) {
29993 +               mod_timer(&touch_timer, jiffies + 1);
29994 +               writel(WAIT4INT(1), base_addr+S3C2410_ADCTSC);
29995 +               goto bail;
29996 +       }
29997 +
29998 +       writel(S3C2410_ADCTSC_PULL_UP_DISABLE | AUTOPST,
29999 +                                                     base_addr+S3C2410_ADCTSC);
30000 +       writel(readl(base_addr+S3C2410_ADCCON) |
30001 +                        S3C2410_ADCCON_ENABLE_START, base_addr+S3C2410_ADCCON);
30002 +
30003 +bail:
30004 +       return IRQ_HANDLED;
30005 +}
30006 +
30007 +static struct clk      *adc_clock;
30008 +
30009 +/*
30010 + * The functions for inserting/removing us as a module.
30011 + */
30012 +
30013 +static int __init s3c2410ts_probe(struct platform_device *pdev)
30014 +{
30015 +       int rc;
30016 +       struct s3c2410_ts_mach_info *info;
30017 +       struct input_dev *input_dev;
30018 +
30019 +       info = (struct s3c2410_ts_mach_info *)pdev->dev.platform_data;
30020 +
30021 +       if (!info)
30022 +       {
30023 +               dev_err(&pdev->dev, "Hm... too bad: no platform data for ts\n");
30024 +               return -EINVAL;
30025 +       }
30026 +
30027 +#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
30028 +       printk(DEBUG_LVL "Entering s3c2410ts_init\n");
30029 +#endif
30030 +
30031 +       adc_clock = clk_get(NULL, "adc");
30032 +       if (!adc_clock) {
30033 +               dev_err(&pdev->dev, "failed to get adc clock source\n");
30034 +               return -ENOENT;
30035 +       }
30036 +       clk_enable(adc_clock);
30037 +
30038 +#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
30039 +       printk(DEBUG_LVL "got and enabled clock\n");
30040 +#endif
30041 +
30042 +       base_addr = ioremap(S3C2410_PA_ADC,0x20);
30043 +       if (base_addr == NULL) {
30044 +               dev_err(&pdev->dev, "Failed to remap register block\n");
30045 +               return -ENOMEM;
30046 +       }
30047 +
30048 +
30049 +       /* If we acutally are a S3C2410: Configure GPIOs */
30050 +       if (!strcmp(pdev->name, "s3c2410-ts"))
30051 +               s3c2410_ts_connect();
30052 +
30053 +       if ((info->presc & 0xff) > 0)
30054 +               writel(S3C2410_ADCCON_PRSCEN |
30055 +                      S3C2410_ADCCON_PRSCVL(info->presc&0xFF),
30056 +                                                   base_addr + S3C2410_ADCCON);
30057 +       else
30058 +               writel(0, base_addr+S3C2410_ADCCON);
30059 +
30060 +
30061 +       /* Initialise registers */
30062 +       if ((info->delay & 0xffff) > 0)
30063 +               writel(info->delay & 0xffff,  base_addr + S3C2410_ADCDLY);
30064 +
30065 +       writel(WAIT4INT(0), base_addr + S3C2410_ADCTSC);
30066 +
30067 +       /* Initialise input stuff */
30068 +       memset(&ts, 0, sizeof(struct s3c2410ts));
30069 +       input_dev = input_allocate_device();
30070 +
30071 +       if (!input_dev) {
30072 +               dev_err(&pdev->dev, "Unable to allocate the input device\n");
30073 +               return -ENOMEM;
30074 +       }
30075 +
30076 +       ts.dev = input_dev;
30077 +       ts.dev->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) |
30078 +                          BIT_MASK(EV_ABS);
30079 +       ts.dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
30080 +       input_set_abs_params(ts.dev, ABS_X, 0, 0x3FF, 0, 0);
30081 +       input_set_abs_params(ts.dev, ABS_Y, 0, 0x3FF, 0, 0);
30082 +       input_set_abs_params(ts.dev, ABS_PRESSURE, 0, 1, 0, 0);
30083 +
30084 +       ts.dev->private = &ts;
30085 +       ts.dev->name = s3c2410ts_name;
30086 +       ts.dev->id.bustype = BUS_RS232;
30087 +       ts.dev->id.vendor = 0xDEAD;
30088 +       ts.dev->id.product = 0xBEEF;
30089 +       ts.dev->id.version = S3C2410TSVERSION;
30090 +
30091 +       ts.shift = info->oversampling_shift;
30092 +       ts.extent = 1 << info->oversampling_shift;
30093 +       ts.reject_threshold_vs_avg = info->reject_threshold_vs_avg;
30094 +       ts.excursion_filter_len = 1 << info->excursion_filter_len_bits;
30095 +
30096 +       ts.raw_sample_fifo = kmalloc(sizeof(struct s3c2410ts_sample) *
30097 +                                          ts.excursion_filter_len, GFP_KERNEL);
30098 +       clear_raw_fifo();
30099 +
30100 +       /* Get irqs */
30101 +       if (request_irq(IRQ_ADC, stylus_action, IRQF_SAMPLE_RANDOM,
30102 +                                                   "s3c2410_action", ts.dev)) {
30103 +               dev_err(&pdev->dev, "Could not allocate ts IRQ_ADC !\n");
30104 +               iounmap(base_addr);
30105 +               return -EIO;
30106 +       }
30107 +       if (request_irq(IRQ_TC, stylus_updown, IRQF_SAMPLE_RANDOM,
30108 +                       "s3c2410_action", ts.dev)) {
30109 +               dev_err(&pdev->dev, "Could not allocate ts IRQ_TC !\n");
30110 +               free_irq(IRQ_ADC, ts.dev);
30111 +               iounmap(base_addr);
30112 +               return -EIO;
30113 +       }
30114 +
30115 +       dev_info(&pdev->dev, "successfully loaded\n");
30116 +
30117 +       /* All went ok, so register to the input system */
30118 +       rc = input_register_device(ts.dev);
30119 +       if (rc) {
30120 +               free_irq(IRQ_TC, ts.dev);
30121 +               free_irq(IRQ_ADC, ts.dev);
30122 +               clk_disable(adc_clock);
30123 +               iounmap(base_addr);
30124 +               return -EIO;
30125 +       }
30126 +
30127 +       return 0;
30128 +}
30129 +
30130 +static int s3c2410ts_remove(struct platform_device *pdev)
30131 +{
30132 +       disable_irq(IRQ_ADC);
30133 +       disable_irq(IRQ_TC);
30134 +       free_irq(IRQ_TC,ts.dev);
30135 +       free_irq(IRQ_ADC,ts.dev);
30136 +
30137 +       if (adc_clock) {
30138 +               clk_disable(adc_clock);
30139 +               clk_put(adc_clock);
30140 +               adc_clock = NULL;
30141 +       }
30142 +
30143 +       kfree(ts.raw_sample_fifo);
30144 +
30145 +       input_unregister_device(ts.dev);
30146 +       iounmap(base_addr);
30147 +
30148 +       return 0;
30149 +}
30150 +
30151 +#ifdef CONFIG_PM
30152 +static int s3c2410ts_suspend(struct platform_device *pdev, pm_message_t state)
30153 +{
30154 +       writel(TSC_SLEEP, base_addr+S3C2410_ADCTSC);
30155 +       writel(readl(base_addr+S3C2410_ADCCON) | S3C2410_ADCCON_STDBM,
30156 +              base_addr+S3C2410_ADCCON);
30157 +
30158 +       disable_irq(IRQ_ADC);
30159 +       disable_irq(IRQ_TC);
30160 +
30161 +       clk_disable(adc_clock);
30162 +
30163 +       return 0;
30164 +}
30165 +
30166 +static int s3c2410ts_resume(struct platform_device *pdev)
30167 +{
30168 +       struct s3c2410_ts_mach_info *info =
30169 +               ( struct s3c2410_ts_mach_info *)pdev->dev.platform_data;
30170 +
30171 +       clk_enable(adc_clock);
30172 +       mdelay(1);
30173 +
30174 +       clear_raw_fifo();
30175 +
30176 +       enable_irq(IRQ_ADC);
30177 +       enable_irq(IRQ_TC);
30178 +
30179 +       if ((info->presc&0xff) > 0)
30180 +               writel(S3C2410_ADCCON_PRSCEN |
30181 +                      S3C2410_ADCCON_PRSCVL(info->presc&0xFF),
30182 +                                                     base_addr+S3C2410_ADCCON);
30183 +       else
30184 +               writel(0,base_addr+S3C2410_ADCCON);
30185 +
30186 +       /* Initialise registers */
30187 +       if ((info->delay & 0xffff) > 0)
30188 +               writel(info->delay & 0xffff,  base_addr+S3C2410_ADCDLY);
30189 +
30190 +       writel(WAIT4INT(0), base_addr+S3C2410_ADCTSC);
30191 +
30192 +       return 0;
30193 +}
30194 +
30195 +#else
30196 +#define s3c2410ts_suspend NULL
30197 +#define s3c2410ts_resume  NULL
30198 +#endif
30199 +
30200 +static struct platform_driver s3c2410ts_driver = {
30201 +       .driver         = {
30202 +              .name   = "s3c2410-ts",
30203 +              .owner  = THIS_MODULE,
30204 +       },
30205 +       .probe          = s3c2410ts_probe,
30206 +       .remove         = s3c2410ts_remove,
30207 +       .suspend        = s3c2410ts_suspend,
30208 +       .resume         = s3c2410ts_resume,
30209 +
30210 +};
30211 +
30212 +static struct platform_driver s3c2440ts_driver = {
30213 +       .driver         = {
30214 +              .name   = "s3c2440-ts",
30215 +              .owner  = THIS_MODULE,
30216 +       },
30217 +       .probe          = s3c2410ts_probe,
30218 +       .remove         = s3c2410ts_remove,
30219 +       .suspend        = s3c2410ts_suspend,
30220 +       .resume         = s3c2410ts_resume,
30221 +
30222 +};
30223 +
30224 +static int __init s3c2410ts_init(void)
30225 +{
30226 +       int rc;
30227 +
30228 +       rc = platform_driver_register(&s3c2410ts_driver);
30229 +       if (rc < 0)
30230 +               return rc;
30231 +
30232 +       rc = platform_driver_register(&s3c2440ts_driver);
30233 +       if (rc < 0)
30234 +               platform_driver_unregister(&s3c2410ts_driver);
30235 +
30236 +       return rc;
30237 +}
30238 +
30239 +static void __exit s3c2410ts_exit(void)
30240 +{
30241 +       platform_driver_unregister(&s3c2440ts_driver);
30242 +       platform_driver_unregister(&s3c2410ts_driver);
30243 +}
30244 +
30245 +module_init(s3c2410ts_init);
30246 +module_exit(s3c2410ts_exit);
30247 +
30248 +/*
30249 +    Local variables:
30250 +        compile-command: "make ARCH=arm CROSS_COMPILE=/usr/local/arm/3.3.2/bin/arm-linux- -k -C ../../.."
30251 +        c-basic-offset: 8
30252 +    End:
30253 +*/
30254 Index: linux-2.6.24.7/drivers/Kconfig
30255 ===================================================================
30256 --- linux-2.6.24.7.orig/drivers/Kconfig 2008-12-11 22:46:07.000000000 +0100
30257 +++ linux-2.6.24.7/drivers/Kconfig      2008-12-11 22:46:49.000000000 +0100
30258 @@ -74,6 +74,8 @@ source "drivers/hid/Kconfig"
30259
30260  source "drivers/usb/Kconfig"
30261
30262 +source "drivers/sdio/Kconfig"
30263 +
30264  source "drivers/mmc/Kconfig"
30265
30266  source "drivers/leds/Kconfig"
30267 Index: linux-2.6.24.7/drivers/leds/Kconfig
30268 ===================================================================
30269 --- linux-2.6.24.7.orig/drivers/leds/Kconfig    2008-12-11 22:46:09.000000000 +0100
30270 +++ linux-2.6.24.7/drivers/leds/Kconfig 2008-12-11 22:46:49.000000000 +0100
30271 @@ -57,7 +57,7 @@ config LEDS_TOSA
30272
30273  config LEDS_S3C24XX
30274         tristate "LED Support for Samsung S3C24XX GPIO LEDs"
30275 -       depends on LEDS_CLASS && ARCH_S3C2410
30276 +       depends on LEDS_CLASS && ARCH_S3C2410 && S3C2410_PWM
30277         help
30278           This option enables support for LEDs connected to GPIO lines
30279           on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440.
30280 @@ -120,6 +120,19 @@ config LEDS_CM_X270
30281         help
30282           This option enables support for the CM-X270 LEDs.
30283
30284 +config LEDS_NEO1973_VIBRATOR
30285 +       tristate "Vibrator Support for the FIC Neo1973 GSM phone"
30286 +       depends on LEDS_CLASS && MACH_NEO1973
30287 +       select S3C2440_C_FIQ
30288 +       help
30289 +         This option enables support for the vibrator on the FIC Neo1973.
30290 +
30291 +config LEDS_NEO1973_GTA02
30292 +       tristate "LED Support for the FIC Neo1973 (GTA02)"
30293 +       depends on LEDS_CLASS && MACH_NEO1973_GTA02
30294 +       help
30295 +         This option enables support for the LEDs on the FIC Neo1973.
30296 +
30297  comment "LED Triggers"
30298
30299  config LEDS_TRIGGERS
30300 Index: linux-2.6.24.7/drivers/leds/leds-neo1973-gta02.c
30301 ===================================================================
30302 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
30303 +++ linux-2.6.24.7/drivers/leds/leds-neo1973-gta02.c    2008-12-11 22:46:49.000000000 +0100
30304 @@ -0,0 +1,231 @@
30305 +/*
30306 + * LED driver for the FIC Neo1973 GTA02 GSM phone
30307 + *
30308 + * (C) 2006-2007 by Openmoko, Inc.
30309 + * Author: Harald Welte <laforge@openmoko.org>
30310 + * All rights reserved.
30311 + *
30312 + * This program is free software; you can redistribute it and/or modify
30313 + * it under the terms of the GNU General Public License version 2 as
30314 + * published by the Free Software Foundation.
30315 + *
30316 + */
30317 +
30318 +#include <linux/kernel.h>
30319 +#include <linux/init.h>
30320 +#include <linux/platform_device.h>
30321 +#include <linux/leds.h>
30322 +#include <asm/hardware.h>
30323 +#include <asm/mach-types.h>
30324 +#include <asm/arch/pwm.h>
30325 +#include <asm/arch/gta02.h>
30326 +#include <asm/plat-s3c/regs-timer.h>
30327 +#include <asm/plat-s3c24xx/neo1973.h>
30328 +
30329 +#define MAX_LEDS 3
30330 +#define COUNTER 256
30331 +
30332 +struct gta02_led_priv
30333 +{
30334 +       spinlock_t lock;
30335 +       struct led_classdev cdev;
30336 +       struct s3c2410_pwm pwm;
30337 +       unsigned int gpio;
30338 +       unsigned int has_pwm;
30339 +};
30340 +
30341 +struct gta02_led_bundle
30342 +{
30343 +       int num_leds;
30344 +       struct gta02_led_priv led[MAX_LEDS];
30345 +};
30346 +
30347 +static inline struct gta02_led_priv *to_priv(struct led_classdev *led_cdev)
30348 +{
30349 +       return container_of(led_cdev, struct gta02_led_priv, cdev);
30350 +}
30351 +
30352 +static inline struct gta02_led_bundle *to_bundle(struct led_classdev *led_cdev)
30353 +{
30354 +       return dev_get_drvdata(led_cdev->dev->parent);
30355 +}
30356 +
30357 +static void gta02led_set(struct led_classdev *led_cdev,
30358 +               enum led_brightness value)
30359 +{
30360 +       unsigned long flags;
30361 +       struct gta02_led_priv *lp = to_priv(led_cdev);
30362 +
30363 +       /*
30364 +        * value == 255 -> 99% duty cycle (full power)
30365 +        * value == 128 -> 50% duty cycle (medium power)
30366 +        * value == 0 -> 0% duty cycle (zero power)
30367 +        */
30368 +       spin_lock_irqsave(&lp->lock, flags);
30369 +
30370 +       if (lp->has_pwm) {
30371 +               s3c2410_pwm_duty_cycle(value, &lp->pwm);
30372 +       } else {
30373 +               neo1973_gpb_setpin(lp->gpio, value ? 1 : 0);
30374 +       }
30375 +
30376 +       spin_unlock_irqrestore(&lp->lock, flags);
30377 +}
30378 +
30379 +#ifdef CONFIG_PM
30380 +static int gta02led_suspend(struct platform_device *pdev, pm_message_t state)
30381 +{
30382 +       struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
30383 +       int i;
30384 +
30385 +       for (i = 0; i < bundle->num_leds; i++)
30386 +               led_classdev_suspend(&bundle->led[i].cdev);
30387 +
30388 +       return 0;
30389 +}
30390 +
30391 +static int gta02led_resume(struct platform_device *pdev)
30392 +{
30393 +       struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
30394 +       int i;
30395 +
30396 +       for (i = 0; i < bundle->num_leds; i++)
30397 +               led_classdev_resume(&bundle->led[i].cdev);
30398 +
30399 +       return 0;
30400 +}
30401 +#endif
30402 +
30403 +static int __init gta02led_probe(struct platform_device *pdev)
30404 +{
30405 +       int i, rc;
30406 +       struct gta02_led_bundle *bundle;
30407 +
30408 +       if (!machine_is_neo1973_gta02())
30409 +               return -EIO;
30410 +
30411 +       bundle = kzalloc(sizeof(struct gta02_led_bundle), GFP_KERNEL);
30412 +       if (!bundle)
30413 +               return -ENOMEM;
30414 +       platform_set_drvdata(pdev, bundle);
30415 +
30416 +       for (i = 0; i < pdev->num_resources; i++) {
30417 +               struct gta02_led_priv *lp;
30418 +               struct resource *r;
30419 +
30420 +               if (i >= MAX_LEDS)
30421 +                       break;
30422 +
30423 +               r = platform_get_resource(pdev, 0, i);
30424 +               if (!r || !r->start || !r->name)
30425 +                       continue;
30426 +
30427 +               lp = &bundle->led[i];
30428 +
30429 +               lp->gpio = r->start;
30430 +               lp->cdev.name = r->name;
30431 +               lp->cdev.brightness_set = gta02led_set;
30432 +
30433 +               switch (lp->gpio) {
30434 +               case S3C2410_GPB0:
30435 +                       lp->has_pwm = 1;
30436 +                       lp->pwm.timerid = PWM0;
30437 +                       s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB0_TOUT0);
30438 +                       break;
30439 +               case S3C2410_GPB1:
30440 +                       lp->has_pwm = 1;
30441 +                       lp->pwm.timerid = PWM1;
30442 +                       s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB1_TOUT1);
30443 +                       break;
30444 +               case S3C2410_GPB2:
30445 +                       lp->has_pwm = 1;
30446 +                       lp->pwm.timerid = PWM2;
30447 +                       s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB2_TOUT2);
30448 +                       break;
30449 +               case S3C2410_GPB3:
30450 +                       lp->has_pwm = 1;
30451 +                       lp->pwm.timerid = PWM3;
30452 +                       s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPB3_TOUT3);
30453 +                       break;
30454 +               default:
30455 +                       break;
30456 +               }
30457 +
30458 +               lp->pwm.prescaler = 0;
30459 +               lp->pwm.divider = S3C2410_TCFG1_MUX3_DIV8;
30460 +               lp->pwm.counter = COUNTER;
30461 +               lp->pwm.comparer = COUNTER;
30462 +               s3c2410_pwm_enable(&lp->pwm);
30463 +               s3c2410_pwm_start(&lp->pwm);
30464 +
30465 +               switch (lp->gpio) {
30466 +               case S3C2410_GPB0:
30467 +               case S3C2410_GPB1:
30468 +               case S3C2410_GPB2:
30469 +               case S3C2410_GPB3:
30470 +                       lp->has_pwm = 0;
30471 +                       s3c2410_gpio_cfgpin(lp->gpio, S3C2410_GPIO_OUTPUT);
30472 +                       neo1973_gpb_add_shadow_gpio(lp->gpio);
30473 +                       break;
30474 +               default:
30475 +                       break;
30476 +               }
30477 +
30478 +               spin_lock_init(&lp->lock);
30479 +               rc = led_classdev_register(&pdev->dev, &lp->cdev);
30480 +       }
30481 +
30482 +       bundle->num_leds = i;
30483 +
30484 +       return 0;
30485 +}
30486 +
30487 +static int gta02led_remove(struct platform_device *pdev)
30488 +{
30489 +       struct gta02_led_bundle *bundle = platform_get_drvdata(pdev);
30490 +       int i;
30491 +
30492 +       for (i = 0; i < bundle->num_leds; i++) {
30493 +               struct gta02_led_priv *lp = &bundle->led[i];
30494 +               if (lp->has_pwm)
30495 +                       s3c2410_pwm_disable(&lp->pwm);
30496 +               else
30497 +                       gta02led_set(&lp->cdev, 0);
30498 +
30499 +               led_classdev_unregister(&lp->cdev);
30500 +       }
30501 +
30502 +       platform_set_drvdata(pdev, NULL);
30503 +       kfree(bundle);
30504 +
30505 +       return 0;
30506 +}
30507 +
30508 +static struct platform_driver gta02led_driver = {
30509 +       .probe          = gta02led_probe,
30510 +       .remove         = gta02led_remove,
30511 +#ifdef CONFIG_PM
30512 +       .suspend        = gta02led_suspend,
30513 +       .resume         = gta02led_resume,
30514 +#endif
30515 +       .driver         = {
30516 +               .name           = "gta02-led",
30517 +       },
30518 +};
30519 +
30520 +static int __init gta02led_init(void)
30521 +{
30522 +       return platform_driver_register(&gta02led_driver);
30523 +}
30524 +
30525 +static void __exit gta02led_exit(void)
30526 +{
30527 +       platform_driver_unregister(&gta02led_driver);
30528 +}
30529 +
30530 +module_init(gta02led_init);
30531 +module_exit(gta02led_exit);
30532 +
30533 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
30534 +MODULE_DESCRIPTION("FIC Neo1973 GTA02 LED driver");
30535 +MODULE_LICENSE("GPL");
30536 Index: linux-2.6.24.7/drivers/leds/leds-neo1973-vibrator.c
30537 ===================================================================
30538 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
30539 +++ linux-2.6.24.7/drivers/leds/leds-neo1973-vibrator.c 2008-12-11 22:46:49.000000000 +0100
30540 @@ -0,0 +1,202 @@
30541 +/*
30542 + * LED driver for the vibrator of the FIC Neo1973 GSM Phone
30543 + *
30544 + * (C) 2006-2007 by Openmoko, Inc.
30545 + * Author: Harald Welte <laforge@openmoko.org>
30546 + * All rights reserved.
30547 + *
30548 + * This program is free software; you can redistribute it and/or modify
30549 + * it under the terms of the GNU General Public License version 2 as
30550 + * published by the Free Software Foundation.
30551 + *
30552 + * Javi Roman <javiroman@kernel-labs.org>:
30553 + *     Implement PWM support for GTA01Bv4 and later
30554 + */
30555 +
30556 +#include <linux/kernel.h>
30557 +#include <linux/init.h>
30558 +#include <linux/platform_device.h>
30559 +#include <linux/leds.h>
30560 +#include <asm/hardware.h>
30561 +#include <asm/mach-types.h>
30562 +#include <asm/arch/pwm.h>
30563 +#include <asm/arch/gta01.h>
30564 +#include <asm/plat-s3c/regs-timer.h>
30565 +
30566 +#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
30567 +#include <asm/plat-s3c24xx/neo1973.h>
30568 +
30569 +#define COUNTER 64
30570 +
30571 +struct neo1973_vib_priv {
30572 +       struct led_classdev cdev;
30573 +       unsigned int gpio;
30574 +       struct mutex mutex;
30575 +       unsigned int has_pwm;
30576 +       struct s3c2410_pwm pwm;
30577 +};
30578 +
30579 +static void neo1973_vib_vib_set(struct led_classdev *led_cdev,
30580 +               enum led_brightness value)
30581 +{
30582 +       struct neo1973_vib_priv *vp =
30583 +               container_of(led_cdev, struct neo1973_vib_priv, cdev);
30584 +
30585 +       if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
30586 +               fiq_ipc.vib_pwm = value; /* set it for FIQ */
30587 +               fiq_kick(); /* start up FIQs if not already going */
30588 +               return;
30589 +       }
30590 +       /*
30591 +        * value == 255 -> 99% duty cycle (full power)
30592 +        * value == 128 -> 50% duty cycle (medium power)
30593 +        * value == 0 -> 0% duty cycle (zero power)
30594 +        */
30595 +       mutex_lock(&vp->mutex);
30596 +       if (vp->has_pwm)
30597 +               s3c2410_pwm_duty_cycle(value / 4, &vp->pwm);
30598 +       else {
30599 +               if (value)
30600 +                       neo1973_gpb_setpin(vp->gpio, 1);
30601 +               else
30602 +                       neo1973_gpb_setpin(vp->gpio, 0);
30603 +       }
30604 +
30605 +       mutex_unlock(&vp->mutex);
30606 +}
30607 +
30608 +static struct neo1973_vib_priv neo1973_vib_led = {
30609 +       .cdev = {
30610 +               .name = "neo1973:vibrator",
30611 +               .brightness_set = neo1973_vib_vib_set,
30612 +       },
30613 +};
30614 +
30615 +static int neo1973_vib_init_hw(struct neo1973_vib_priv *vp)
30616 +{
30617 +       int rc;
30618 +
30619 +       rc = s3c2410_pwm_init(&vp->pwm);
30620 +       if (rc)
30621 +               return rc;
30622 +
30623 +       vp->pwm.timerid = PWM3;
30624 +       /* use same prescaler as arch/arm/plat-s3c24xx/time.c */
30625 +       vp->pwm.prescaler = (6 - 1) / 2;
30626 +       vp->pwm.divider = S3C2410_TCFG1_MUX3_DIV2;
30627 +       vp->pwm.counter = COUNTER;
30628 +       vp->pwm.comparer = COUNTER;
30629 +
30630 +       rc = s3c2410_pwm_enable(&vp->pwm);
30631 +       if (rc)
30632 +               return rc;
30633 +
30634 +       s3c2410_pwm_start(&vp->pwm);
30635 +
30636 +       return 0;
30637 +}
30638 +
30639 +#ifdef CONFIG_PM
30640 +static int neo1973_vib_suspend(struct platform_device *dev, pm_message_t state)
30641 +{
30642 +       led_classdev_suspend(&neo1973_vib_led.cdev);
30643 +       return 0;
30644 +}
30645 +
30646 +static int neo1973_vib_resume(struct platform_device *dev)
30647 +{
30648 +       struct neo1973_vib_priv *vp = platform_get_drvdata(dev);
30649 +
30650 +       if (vp->has_pwm)
30651 +               neo1973_vib_init_hw(vp);
30652 +
30653 +       led_classdev_resume(&neo1973_vib_led.cdev);
30654 +
30655 +       return 0;
30656 +}
30657 +#endif /* CONFIG_PM */
30658 +
30659 +static int __init neo1973_vib_probe(struct platform_device *pdev)
30660 +{
30661 +       struct resource *r;
30662 +       int rc;
30663 +
30664 +       if (!machine_is_neo1973_gta01() && !machine_is_neo1973_gta02())
30665 +               return -EIO;
30666 +
30667 +       r = platform_get_resource(pdev, 0, 0);
30668 +       if (!r || !r->start)
30669 +               return -EIO;
30670 +
30671 +       neo1973_vib_led.gpio = r->start;
30672 +       platform_set_drvdata(pdev, &neo1973_vib_led);
30673 +
30674 +       if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
30675 +               neo1973_gpb_setpin(neo1973_vib_led.gpio, 0); /* off */
30676 +               s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPIO_OUTPUT);
30677 +               /* safe, kmalloc'd copy needed for FIQ ISR */
30678 +               fiq_ipc.vib_gpio_pin = neo1973_vib_led.gpio;
30679 +               fiq_ipc.vib_pwm = 0; /* off */
30680 +               goto configured;
30681 +       }
30682 +
30683 +       /* TOUT3 */
30684 +       if (neo1973_vib_led.gpio == S3C2410_GPB3) {
30685 +               rc = neo1973_vib_init_hw(&neo1973_vib_led);
30686 +               if (rc)
30687 +                       return rc;
30688 +
30689 +               s3c2410_pwm_duty_cycle(0, &neo1973_vib_led.pwm);
30690 +               s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPB3_TOUT3);
30691 +               neo1973_vib_led.has_pwm = 1;
30692 +       }
30693 +configured:
30694 +       mutex_init(&neo1973_vib_led.mutex);
30695 +
30696 +       return led_classdev_register(&pdev->dev, &neo1973_vib_led.cdev);
30697 +}
30698 +
30699 +static int neo1973_vib_remove(struct platform_device *pdev)
30700 +{
30701 +       if (machine_is_neo1973_gta02()) /* use FIQ to control GPIO */
30702 +               fiq_ipc.vib_pwm = 0; /* off */
30703 +       /* would only need kick if already off so no kick needed */
30704 +
30705 +       if (neo1973_vib_led.has_pwm)
30706 +               s3c2410_pwm_disable(&neo1973_vib_led.pwm);
30707 +
30708 +       led_classdev_unregister(&neo1973_vib_led.cdev);
30709 +
30710 +       mutex_destroy(&neo1973_vib_led.mutex);
30711 +
30712 +       return 0;
30713 +}
30714 +
30715 +static struct platform_driver neo1973_vib_driver = {
30716 +       .probe          = neo1973_vib_probe,
30717 +       .remove         = neo1973_vib_remove,
30718 +#ifdef CONFIG_PM
30719 +       .suspend        = neo1973_vib_suspend,
30720 +       .resume         = neo1973_vib_resume,
30721 +#endif
30722 +       .driver         = {
30723 +               .name           = "neo1973-vibrator",
30724 +       },
30725 +};
30726 +
30727 +static int __init neo1973_vib_init(void)
30728 +{
30729 +       return platform_driver_register(&neo1973_vib_driver);
30730 +}
30731 +
30732 +static void __exit neo1973_vib_exit(void)
30733 +{
30734 +       platform_driver_unregister(&neo1973_vib_driver);
30735 +}
30736 +
30737 +module_init(neo1973_vib_init);
30738 +module_exit(neo1973_vib_exit);
30739 +
30740 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
30741 +MODULE_DESCRIPTION("FIC Neo1973 vibrator driver");
30742 +MODULE_LICENSE("GPL");
30743 Index: linux-2.6.24.7/drivers/leds/Makefile
30744 ===================================================================
30745 --- linux-2.6.24.7.orig/drivers/leds/Makefile   2008-12-11 22:46:09.000000000 +0100
30746 +++ linux-2.6.24.7/drivers/leds/Makefile        2008-12-11 22:46:49.000000000 +0100
30747 @@ -20,6 +20,8 @@ obj-$(CONFIG_LEDS_COBALT_QUBE)                += leds-
30748  obj-$(CONFIG_LEDS_COBALT_RAQ)          += leds-cobalt-raq.o
30749  obj-$(CONFIG_LEDS_GPIO)                        += leds-gpio.o
30750  obj-$(CONFIG_LEDS_CM_X270)              += leds-cm-x270.o
30751 +obj-$(CONFIG_LEDS_NEO1973_VIBRATOR)    += leds-neo1973-vibrator.o
30752 +obj-$(CONFIG_LEDS_NEO1973_GTA02)       += leds-neo1973-gta02.o
30753
30754  # LED Triggers
30755  obj-$(CONFIG_LEDS_TRIGGER_TIMER)       += ledtrig-timer.o
30756 Index: linux-2.6.24.7/drivers/Makefile
30757 ===================================================================
30758 --- linux-2.6.24.7.orig/drivers/Makefile        2008-12-11 22:46:07.000000000 +0100
30759 +++ linux-2.6.24.7/drivers/Makefile     2008-12-11 22:46:49.000000000 +0100
30760 @@ -77,6 +77,7 @@ obj-$(CONFIG_LGUEST_GUEST)    += lguest/
30761  obj-$(CONFIG_CPU_FREQ)         += cpufreq/
30762  obj-$(CONFIG_CPU_IDLE)         += cpuidle/
30763  obj-$(CONFIG_MMC)              += mmc/
30764 +obj-$(CONFIG_SDIO)              += sdio/
30765  obj-$(CONFIG_NEW_LEDS)         += leds/
30766  obj-$(CONFIG_INFINIBAND)       += infiniband/
30767  obj-$(CONFIG_SGI_SN)           += sn/
30768 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-core.c
30769 ===================================================================
30770 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
30771 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-core.c       2008-12-11 22:46:49.000000000 +0100
30772 @@ -0,0 +1,1340 @@
30773 +/* Smedia Glamo 336x/337x driver
30774 + *
30775 + * (C) 2007 by Openmoko, Inc.
30776 + * Author: Harald Welte <laforge@openmoko.org>
30777 + * All rights reserved.
30778 + *
30779 + * This program is free software; you can redistribute it and/or
30780 + * modify it under the terms of the GNU General Public License as
30781 + * published by the Free Software Foundation; either version 2 of
30782 + * the License, or (at your option) any later version.
30783 + *
30784 + * This program is distributed in the hope that it will be useful,
30785 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
30786 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
30787 + * GNU General Public License for more details.
30788 + *
30789 + * You should have received a copy of the GNU General Public License
30790 + * along with this program; if not, write to the Free Software
30791 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30792 + * MA 02111-1307 USA
30793 + */
30794 +
30795 +#include <linux/module.h>
30796 +#include <linux/kernel.h>
30797 +#include <linux/errno.h>
30798 +#include <linux/string.h>
30799 +#include <linux/mm.h>
30800 +#include <linux/tty.h>
30801 +#include <linux/slab.h>
30802 +#include <linux/delay.h>
30803 +#include <linux/fb.h>
30804 +#include <linux/init.h>
30805 +#include <linux/irq.h>
30806 +#include <linux/interrupt.h>
30807 +#include <linux/workqueue.h>
30808 +#include <linux/wait.h>
30809 +#include <linux/platform_device.h>
30810 +#include <linux/kernel_stat.h>
30811 +#include <linux/spinlock.h>
30812 +#include <linux/glamofb.h>
30813 +#include <linux/mmc/mmc.h>
30814 +#include <linux/mmc/host.h>
30815 +
30816 +#include <asm/io.h>
30817 +#include <asm/uaccess.h>
30818 +#include <asm/div64.h>
30819 +
30820 +#ifdef CONFIG_PM
30821 +#include <linux/pm.h>
30822 +#endif
30823 +
30824 +#include "glamo-regs.h"
30825 +#include "glamo-core.h"
30826 +
30827 +#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
30828 +
30829 +#define GLAMO_MEM_REFRESH_COUNT 0x100
30830 +
30831 +static struct glamo_core *glamo_handle;
30832 +
30833 +static inline void __reg_write(struct glamo_core *glamo,
30834 +                               u_int16_t reg, u_int16_t val)
30835 +{
30836 +       writew(val, glamo->base + reg);
30837 +}
30838 +
30839 +static inline u_int16_t __reg_read(struct glamo_core *glamo,
30840 +                                  u_int16_t reg)
30841 +{
30842 +       return readw(glamo->base + reg);
30843 +}
30844 +
30845 +static void __reg_set_bit_mask(struct glamo_core *glamo,
30846 +                               u_int16_t reg, u_int16_t mask,
30847 +                               u_int16_t val)
30848 +{
30849 +       u_int16_t tmp;
30850 +
30851 +       val &= mask;
30852 +
30853 +       tmp = __reg_read(glamo, reg);
30854 +       tmp &= ~mask;
30855 +       tmp |= val;
30856 +       __reg_write(glamo, reg, tmp);
30857 +}
30858 +
30859 +static void reg_set_bit_mask(struct glamo_core *glamo,
30860 +                               u_int16_t reg, u_int16_t mask,
30861 +                               u_int16_t val)
30862 +{
30863 +       spin_lock(&glamo->lock);
30864 +       __reg_set_bit_mask(glamo, reg, mask, val);
30865 +       spin_unlock(&glamo->lock);
30866 +}
30867 +
30868 +static inline void __reg_set_bit(struct glamo_core *glamo,
30869 +                                u_int16_t reg, u_int16_t bit)
30870 +{
30871 +       __reg_set_bit_mask(glamo, reg, bit, 0xffff);
30872 +}
30873 +
30874 +static inline void __reg_clear_bit(struct glamo_core *glamo,
30875 +                                  u_int16_t reg, u_int16_t bit)
30876 +{
30877 +       __reg_set_bit_mask(glamo, reg, bit, 0);
30878 +}
30879 +
30880 +static inline void glamo_vmem_write(struct glamo_core *glamo, u_int32_t addr,
30881 +                                   u_int16_t *src, int len)
30882 +{
30883 +       if (addr & 0x0001 || (unsigned long)src & 0x0001 || len & 0x0001) {
30884 +               dev_err(&glamo->pdev->dev, "unaligned write(0x%08x, 0x%p, "
30885 +                       "0x%x)!!\n", addr, src, len);
30886 +       }
30887 +
30888 +}
30889 +
30890 +static inline void glamo_vmem_read(struct glamo_core *glamo, u_int16_t *buf,
30891 +                                  u_int32_t addr, int len)
30892 +{
30893 +       if (addr & 0x0001 || (unsigned long) buf & 0x0001 || len & 0x0001) {
30894 +               dev_err(&glamo->pdev->dev, "unaligned read(0x%p, 0x08%x, "
30895 +                       "0x%x)!!\n", buf, addr, len);
30896 +       }
30897 +
30898 +
30899 +}
30900 +
30901 +/***********************************************************************
30902 + * resources of sibling devices
30903 + ***********************************************************************/
30904 +
30905 +#if 0
30906 +static struct resource glamo_core_resources[] = {
30907 +       {
30908 +               .start  = GLAMO_REGOFS_GENERIC,
30909 +               .end    = GLAMO_REGOFS_GENERIC + 0x400,
30910 +               .flags  = IORESOURCE_MEM,
30911 +       }, {
30912 +               .start  = 0,
30913 +               .end    = 0,
30914 +               .flags  = IORESOURCE_IRQ,
30915 +       },
30916 +};
30917 +
30918 +static struct platform_device glamo_core_dev = {
30919 +       .name           = "glamo-core",
30920 +       .resource       = &glamo_core_resources,
30921 +       .num_resources  = ARRAY_SIZE(glamo_core_resources),
30922 +};
30923 +#endif
30924 +
30925 +static struct resource glamo_jpeg_resources[] = {
30926 +       {
30927 +               .start  = GLAMO_REGOFS_JPEG,
30928 +               .end    = GLAMO_REGOFS_MPEG - 1,
30929 +               .flags  = IORESOURCE_MEM,
30930 +       }, {
30931 +               .start  = IRQ_GLAMO_JPEG,
30932 +               .end    = IRQ_GLAMO_JPEG,
30933 +               .flags  = IORESOURCE_IRQ,
30934 +       },
30935 +};
30936 +
30937 +static struct platform_device glamo_jpeg_dev = {
30938 +       .name           = "glamo-jpeg",
30939 +       .resource       = glamo_jpeg_resources,
30940 +       .num_resources  = ARRAY_SIZE(glamo_jpeg_resources),
30941 +};
30942 +
30943 +static struct resource glamo_mpeg_resources[] = {
30944 +       {
30945 +               .start  = GLAMO_REGOFS_MPEG,
30946 +               .end    = GLAMO_REGOFS_LCD - 1,
30947 +               .flags  = IORESOURCE_MEM,
30948 +       }, {
30949 +               .start  = IRQ_GLAMO_MPEG,
30950 +               .end    = IRQ_GLAMO_MPEG,
30951 +               .flags  = IORESOURCE_IRQ,
30952 +       },
30953 +};
30954 +
30955 +static struct platform_device glamo_mpeg_dev = {
30956 +       .name           = "glamo-mpeg",
30957 +       .resource       = glamo_mpeg_resources,
30958 +       .num_resources  = ARRAY_SIZE(glamo_mpeg_resources),
30959 +};
30960 +
30961 +static struct resource glamo_2d_resources[] = {
30962 +       {
30963 +               .start  = GLAMO_REGOFS_2D,
30964 +               .end    = GLAMO_REGOFS_3D - 1,
30965 +               .flags  = IORESOURCE_MEM,
30966 +       }, {
30967 +               .start  = IRQ_GLAMO_2D,
30968 +               .end    = IRQ_GLAMO_2D,
30969 +               .flags  = IORESOURCE_IRQ,
30970 +       },
30971 +};
30972 +
30973 +static struct platform_device glamo_2d_dev = {
30974 +       .name           = "glamo-2d",
30975 +       .resource       = glamo_2d_resources,
30976 +       .num_resources  = ARRAY_SIZE(glamo_2d_resources),
30977 +};
30978 +
30979 +static struct resource glamo_3d_resources[] = {
30980 +       {
30981 +               .start  = GLAMO_REGOFS_3D,
30982 +               .end    = GLAMO_REGOFS_END - 1,
30983 +               .flags  = IORESOURCE_MEM,
30984 +       },
30985 +};
30986 +
30987 +static struct platform_device glamo_3d_dev = {
30988 +       .name           = "glamo-3d",
30989 +       .resource       = glamo_3d_resources,
30990 +       .num_resources  = ARRAY_SIZE(glamo_3d_resources),
30991 +};
30992 +
30993 +static struct platform_device glamo_spigpio_dev = {
30994 +       .name           = "glamo-spi-gpio",
30995 +};
30996 +
30997 +static struct resource glamo_fb_resources[] = {
30998 +       /* FIXME: those need to be incremented by parent base */
30999 +       {
31000 +               .name   = "glamo-fb-regs",
31001 +               .start  = GLAMO_REGOFS_LCD,
31002 +               .end    = GLAMO_REGOFS_MMC - 1,
31003 +               .flags  = IORESOURCE_MEM,
31004 +       }, {
31005 +               .name   = "glamo-fb-mem",
31006 +               .start  = GLAMO_OFFSET_FB,
31007 +               .end    = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
31008 +               .flags  = IORESOURCE_MEM,
31009 +       },
31010 +};
31011 +
31012 +static struct platform_device glamo_fb_dev = {
31013 +       .name           = "glamo-fb",
31014 +       .resource       = glamo_fb_resources,
31015 +       .num_resources  = ARRAY_SIZE(glamo_fb_resources),
31016 +};
31017 +
31018 +static struct resource glamo_mmc_resources[] = {
31019 +       {
31020 +               /* FIXME: those need to be incremented by parent base */
31021 +               .start  = GLAMO_REGOFS_MMC,
31022 +               .end    = GLAMO_REGOFS_MPROC0 - 1,
31023 +               .flags  = IORESOURCE_MEM
31024 +       }, {
31025 +               .start  = IRQ_GLAMO_MMC,
31026 +               .end    = IRQ_GLAMO_MMC,
31027 +               .flags  = IORESOURCE_IRQ,
31028 +       }, { /* our data buffer for MMC transfers */
31029 +               .start  = GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
31030 +               .end    = GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
31031 +                                 GLAMO_MMC_BUFFER_SIZE - 1,
31032 +               .flags  = IORESOURCE_MEM
31033 +       },
31034 +};
31035 +
31036 +static struct platform_device glamo_mmc_dev = {
31037 +       .name           = "glamo-mci",
31038 +       .resource       = glamo_mmc_resources,
31039 +       .num_resources  = ARRAY_SIZE(glamo_mmc_resources),
31040 +};
31041 +
31042 +struct glamo_mci_pdata glamo_mci_def_pdata = {
31043 +       .gpio_detect            = 0,
31044 +       .glamo_set_mci_power    = NULL, /* filled in from MFD platform data */
31045 +       .ocr_avail      = MMC_VDD_20_21 |
31046 +                         MMC_VDD_21_22 |
31047 +                         MMC_VDD_22_23 |
31048 +                         MMC_VDD_23_24 |
31049 +                         MMC_VDD_24_25 |
31050 +                         MMC_VDD_25_26 |
31051 +                         MMC_VDD_26_27 |
31052 +                         MMC_VDD_27_28 |
31053 +                         MMC_VDD_28_29 |
31054 +                         MMC_VDD_29_30 |
31055 +                         MMC_VDD_30_31 |
31056 +                         MMC_VDD_32_33,
31057 +       .glamo_irq_is_wired     = NULL, /* filled in from MFD platform data */
31058 +       .mci_suspending = NULL, /* filled in from MFD platform data */
31059 +       .mci_all_dependencies_resumed = NULL, /* filled in from MFD plat data */
31060 +};
31061 +EXPORT_SYMBOL_GPL(glamo_mci_def_pdata);
31062 +
31063 +
31064 +
31065 +static void mangle_mem_resources(struct resource *res, int num_res,
31066 +                                struct resource *parent)
31067 +{
31068 +       int i;
31069 +
31070 +       for (i = 0; i < num_res; i++) {
31071 +               if (res[i].flags != IORESOURCE_MEM)
31072 +                       continue;
31073 +               res[i].start += parent->start;
31074 +               res[i].end += parent->start;
31075 +               res[i].parent = parent;
31076 +       }
31077 +}
31078 +
31079 +/***********************************************************************
31080 + * IRQ demultiplexer
31081 + ***********************************************************************/
31082 +#define irq2glamo(x)   (x - IRQ_GLAMO(0))
31083 +
31084 +static void glamo_ack_irq(unsigned int irq)
31085 +{
31086 +       /* clear interrupt source */
31087 +       __reg_write(glamo_handle, GLAMO_REG_IRQ_CLEAR,
31088 +                   1 << irq2glamo(irq));
31089 +}
31090 +
31091 +static void glamo_mask_irq(unsigned int irq)
31092 +{
31093 +       u_int16_t tmp;
31094 +
31095 +       /* clear bit in enable register */
31096 +       tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE);
31097 +       tmp &= ~(1 << irq2glamo(irq));
31098 +       __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp);
31099 +}
31100 +
31101 +static void glamo_unmask_irq(unsigned int irq)
31102 +{
31103 +       u_int16_t tmp;
31104 +
31105 +       /* set bit in enable register */
31106 +       tmp = __reg_read(glamo_handle, GLAMO_REG_IRQ_ENABLE);
31107 +       tmp |= (1 << irq2glamo(irq));
31108 +       __reg_write(glamo_handle, GLAMO_REG_IRQ_ENABLE, tmp);
31109 +}
31110 +
31111 +static struct irq_chip glamo_irq_chip = {
31112 +       .ack    = glamo_ack_irq,
31113 +       .mask   = glamo_mask_irq,
31114 +       .unmask = glamo_unmask_irq,
31115 +};
31116 +
31117 +static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
31118 +{
31119 +       const unsigned int cpu = smp_processor_id();
31120 +
31121 +       spin_lock(&desc->lock);
31122 +
31123 +       desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
31124 +
31125 +       if (unlikely(desc->status & IRQ_INPROGRESS)) {
31126 +               desc->status |= (IRQ_PENDING | IRQ_MASKED);
31127 +               desc->chip->mask(irq);
31128 +               desc->chip->ack(irq);
31129 +               goto out_unlock;
31130 +       }
31131 +
31132 +       kstat_cpu(cpu).irqs[irq]++;
31133 +       desc->chip->ack(irq);
31134 +       desc->status |= IRQ_INPROGRESS;
31135 +
31136 +       do {
31137 +               u_int16_t irqstatus;
31138 +               int i;
31139 +
31140 +               if (unlikely((desc->status &
31141 +                               (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
31142 +                               (IRQ_PENDING | IRQ_MASKED))) {
31143 +                       /* dealing with pending IRQ, unmasking */
31144 +                       desc->chip->unmask(irq);
31145 +                       desc->status &= ~IRQ_MASKED;
31146 +               }
31147 +
31148 +               desc->status &= ~IRQ_PENDING;
31149 +
31150 +               /* read IRQ status register */
31151 +               irqstatus = __reg_read(glamo_handle, GLAMO_REG_IRQ_STATUS);
31152 +               for (i = 0; i < 9; i++)
31153 +                       if (irqstatus & (1 << i))
31154 +                               desc_handle_irq(IRQ_GLAMO(i),
31155 +                                   irq_desc+IRQ_GLAMO(i));
31156 +
31157 +       } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
31158 +
31159 +       desc->status &= ~IRQ_INPROGRESS;
31160 +
31161 +out_unlock:
31162 +       spin_unlock(&desc->lock);
31163 +}
31164 +
31165 +/***********************************************************************
31166 + * 'engine' support
31167 + ***********************************************************************/
31168 +
31169 +int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
31170 +{
31171 +       switch (engine) {
31172 +       case GLAMO_ENGINE_LCD:
31173 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
31174 +                           GLAMO_CLOCK_LCD_EN_M5CLK |
31175 +                           GLAMO_CLOCK_LCD_EN_DHCLK |
31176 +                           GLAMO_CLOCK_LCD_EN_DMCLK |
31177 +                           GLAMO_CLOCK_LCD_EN_DCLK |
31178 +                           GLAMO_CLOCK_LCD_DG_M5CLK |
31179 +                           GLAMO_CLOCK_LCD_DG_DMCLK, 0xffff);
31180 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
31181 +                           GLAMO_CLOCK_GEN51_EN_DIV_DHCLK |
31182 +                           GLAMO_CLOCK_GEN51_EN_DIV_DMCLK |
31183 +                           GLAMO_CLOCK_GEN51_EN_DIV_DCLK, 0xffff);
31184 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
31185 +                           GLAMO_HOSTBUS2_MMIO_EN_LCD,
31186 +                           0xffff);
31187 +               break;
31188 +       case GLAMO_ENGINE_MMC:
31189 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
31190 +                                  GLAMO_CLOCK_MMC_EN_M9CLK |
31191 +                                  GLAMO_CLOCK_MMC_EN_TCLK |
31192 +                                  GLAMO_CLOCK_MMC_DG_M9CLK |
31193 +                                  GLAMO_CLOCK_MMC_DG_TCLK, 0xffff);
31194 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
31195 +                                  GLAMO_HOSTBUS2_MMIO_EN_MMC,
31196 +                                  GLAMO_HOSTBUS2_MMIO_EN_MMC);
31197 +               break;
31198 +       case GLAMO_ENGINE_2D:
31199 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
31200 +                                  GLAMO_CLOCK_2D_EN_M7CLK |
31201 +                                  GLAMO_CLOCK_2D_EN_GCLK |
31202 +                                  GLAMO_CLOCK_2D_DG_M7CLK |
31203 +                                  GLAMO_CLOCK_2D_DG_GCLK, 0xffff);
31204 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
31205 +                                  GLAMO_HOSTBUS2_MMIO_EN_2D,
31206 +                                  GLAMO_HOSTBUS2_MMIO_EN_2D);
31207 +               break;
31208 +       case GLAMO_ENGINE_CMDQ:
31209 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
31210 +                                  GLAMO_CLOCK_2D_EN_M6CLK, 0xffff);
31211 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
31212 +                                  GLAMO_HOSTBUS2_MMIO_EN_CQ,
31213 +                                  GLAMO_HOSTBUS2_MMIO_EN_CQ);
31214 +               break;
31215 +       /* FIXME: Implementation */
31216 +       default:
31217 +               break;
31218 +       }
31219 +
31220 +       glamo->engine_enabled_bitfield |= 1 << engine;
31221 +
31222 +       return 0;
31223 +}
31224 +
31225 +int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
31226 +{
31227 +       int ret;
31228 +
31229 +       spin_lock(&glamo->lock);
31230 +
31231 +       ret = __glamo_engine_enable(glamo, engine);
31232 +
31233 +       spin_unlock(&glamo->lock);
31234 +
31235 +       return ret;
31236 +}
31237 +EXPORT_SYMBOL_GPL(glamo_engine_enable);
31238 +
31239 +int __glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
31240 +{
31241 +       switch (engine) {
31242 +       case GLAMO_ENGINE_LCD:
31243 +               /* remove pixel clock to LCM */
31244 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
31245 +                           GLAMO_CLOCK_LCD_EN_DCLK, 0);
31246 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
31247 +                           GLAMO_CLOCK_LCD_EN_DHCLK |
31248 +                           GLAMO_CLOCK_LCD_EN_DMCLK, 0);
31249 +               /* kill memory clock */
31250 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_LCD,
31251 +                           GLAMO_CLOCK_LCD_EN_M5CLK, 0);
31252 +               /* stop dividing the clocks */
31253 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
31254 +                           GLAMO_CLOCK_GEN51_EN_DIV_DHCLK |
31255 +                           GLAMO_CLOCK_GEN51_EN_DIV_DMCLK |
31256 +                           GLAMO_CLOCK_GEN51_EN_DIV_DCLK, 0);
31257 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
31258 +                           GLAMO_HOSTBUS2_MMIO_EN_LCD, 0);
31259 +               break;
31260 +
31261 +       case GLAMO_ENGINE_MMC:
31262 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC, 0,
31263 +                                                  GLAMO_CLOCK_MMC_EN_M9CLK |
31264 +                                                  GLAMO_CLOCK_MMC_EN_TCLK |
31265 +                                                  GLAMO_CLOCK_MMC_DG_M9CLK |
31266 +                                                  GLAMO_CLOCK_MMC_DG_TCLK);
31267 +               /* disable the TCLK divider clk input */
31268 +               __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1, 0,
31269 +                                               GLAMO_CLOCK_GEN51_EN_DIV_TCLK);
31270 +               __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2), 0,
31271 +                                                  GLAMO_HOSTBUS2_MMIO_EN_MMC);
31272 +               /* good idea to hold the thing in reset when we power it off? */
31273 +/*             writew(readw(glamo->base + GLAMO_REG_CLOCK_MMC) |
31274 +                     GLAMO_CLOCK_MMC_RESET, glamo->base + GLAMO_REG_CLOCK_MMC);
31275 +*/
31276 +               break;
31277 +       default:
31278 +               break;
31279 +       }
31280 +
31281 +       glamo->engine_enabled_bitfield &= ~(1 << engine);
31282 +
31283 +       return 0;
31284 +}
31285 +int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
31286 +{
31287 +       int ret;
31288 +
31289 +       spin_lock(&glamo->lock);
31290 +
31291 +       ret = __glamo_engine_disable(glamo, engine);
31292 +
31293 +       spin_unlock(&glamo->lock);
31294 +
31295 +       return ret;
31296 +}
31297 +EXPORT_SYMBOL_GPL(glamo_engine_disable);
31298 +
31299 +static const u_int16_t engine_clock_regs[__NUM_GLAMO_ENGINES] = {
31300 +       [GLAMO_ENGINE_LCD]      = GLAMO_REG_CLOCK_LCD,
31301 +       [GLAMO_ENGINE_MMC]      = GLAMO_REG_CLOCK_MMC,
31302 +       [GLAMO_ENGINE_ISP]      = GLAMO_REG_CLOCK_ISP,
31303 +       [GLAMO_ENGINE_JPEG]     = GLAMO_REG_CLOCK_JPEG,
31304 +       [GLAMO_ENGINE_3D]       = GLAMO_REG_CLOCK_3D,
31305 +       [GLAMO_ENGINE_2D]       = GLAMO_REG_CLOCK_2D,
31306 +       [GLAMO_ENGINE_MPEG_ENC] = GLAMO_REG_CLOCK_MPEG,
31307 +       [GLAMO_ENGINE_MPEG_DEC] = GLAMO_REG_CLOCK_MPEG,
31308 +};
31309 +
31310 +void glamo_engine_clkreg_set(struct glamo_core *glamo,
31311 +                            enum glamo_engine engine,
31312 +                            u_int16_t mask, u_int16_t val)
31313 +{
31314 +       reg_set_bit_mask(glamo, engine_clock_regs[engine], mask, val);
31315 +}
31316 +EXPORT_SYMBOL_GPL(glamo_engine_clkreg_set);
31317 +
31318 +u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
31319 +                                 enum glamo_engine engine)
31320 +{
31321 +       u_int16_t val;
31322 +
31323 +       spin_lock(&glamo->lock);
31324 +       val = __reg_read(glamo, engine_clock_regs[engine]);
31325 +       spin_unlock(&glamo->lock);
31326 +
31327 +       return val;
31328 +}
31329 +EXPORT_SYMBOL_GPL(glamo_engine_clkreg_get);
31330 +
31331 +struct glamo_script reset_regs[] = {
31332 +       [GLAMO_ENGINE_LCD] = {
31333 +               GLAMO_REG_CLOCK_LCD, GLAMO_CLOCK_LCD_RESET
31334 +       },
31335 +#if 0
31336 +       [GLAMO_ENGINE_HOST] = {
31337 +               GLAMO_REG_CLOCK_HOST, GLAMO_CLOCK_HOST_RESET
31338 +       },
31339 +       [GLAMO_ENGINE_MEM] = {
31340 +               GLAMO_REG_CLOCK_MEM, GLAMO_CLOCK_MEM_RESET
31341 +       },
31342 +#endif
31343 +       [GLAMO_ENGINE_MMC] = {
31344 +               GLAMO_REG_CLOCK_MMC, GLAMO_CLOCK_MMC_RESET
31345 +       },
31346 +       [GLAMO_ENGINE_2D] = {
31347 +               GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
31348 +       },
31349 +       [GLAMO_ENGINE_JPEG] = {
31350 +               GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET
31351 +       },
31352 +};
31353 +
31354 +void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine)
31355 +{
31356 +       struct glamo_script *rst;
31357 +
31358 +       if (engine >= ARRAY_SIZE(reset_regs)) {
31359 +               dev_warn(&glamo->pdev->dev, "unknown engine %u ", engine);
31360 +               return;
31361 +       }
31362 +
31363 +       rst = &reset_regs[engine];
31364 +
31365 +       spin_lock(&glamo->lock);
31366 +       __reg_set_bit(glamo, rst->reg, rst->val);
31367 +       spin_unlock(&glamo->lock);
31368 +
31369 +       msleep(1);
31370 +
31371 +       spin_lock(&glamo->lock);
31372 +       __reg_clear_bit(glamo, rst->reg, rst->val);
31373 +       spin_unlock(&glamo->lock);
31374 +
31375 +       msleep(1);
31376 +}
31377 +EXPORT_SYMBOL_GPL(glamo_engine_reset);
31378 +
31379 +void glamo_lcm_reset(int level)
31380 +{
31381 +       if (!glamo_handle)
31382 +               return;
31383 +
31384 +       glamo_gpio_setpin(glamo_handle, GLAMO_GPIO4, level);
31385 +       glamo_gpio_cfgpin(glamo_handle, GLAMO_GPIO4_OUTPUT);
31386 +
31387 +}
31388 +EXPORT_SYMBOL_GPL(glamo_lcm_reset);
31389 +
31390 +enum glamo_pll {
31391 +       GLAMO_PLL1,
31392 +       GLAMO_PLL2,
31393 +};
31394 +
31395 +static int glamo_pll_rate(struct glamo_core *glamo,
31396 +                         enum glamo_pll pll)
31397 +{
31398 +       u_int16_t reg;
31399 +       unsigned int div = 512;
31400 +       /* FIXME: move osci into platform_data */
31401 +       unsigned int osci = 32768;
31402 +
31403 +       if (osci == 32768)
31404 +               div = 1;
31405 +
31406 +       switch (pll) {
31407 +       case GLAMO_PLL1:
31408 +               reg = __reg_read(glamo, GLAMO_REG_PLL_GEN1);
31409 +               break;
31410 +       case GLAMO_PLL2:
31411 +               reg = __reg_read(glamo, GLAMO_REG_PLL_GEN3);
31412 +               break;
31413 +       default:
31414 +               return -EINVAL;
31415 +       }
31416 +       return (osci/div)*reg;
31417 +}
31418 +
31419 +int glamo_engine_reclock(struct glamo_core *glamo,
31420 +                        enum glamo_engine engine,
31421 +                        int ps)
31422 +{
31423 +       int pll, khz;
31424 +       u_int16_t reg, mask, val = 0;
31425 +
31426 +       if (!ps)
31427 +               return 0;
31428 +
31429 +       switch (engine) {
31430 +       case GLAMO_ENGINE_LCD:
31431 +               pll = GLAMO_PLL1;
31432 +               reg = GLAMO_REG_CLOCK_GEN7;
31433 +               mask = 0xff;
31434 +               break;
31435 +       default:
31436 +               dev_warn(&glamo->pdev->dev,
31437 +                        "reclock of engine 0x%x not supported\n", engine);
31438 +               return -EINVAL;
31439 +               break;
31440 +       }
31441 +
31442 +       pll = glamo_pll_rate(glamo, pll);
31443 +       khz = 1000000000UL / ps;
31444 +
31445 +       if (khz)
31446 +               val = (pll / khz) / 1000;
31447 +
31448 +       dev_dbg(&glamo->pdev->dev,
31449 +                       "PLL %d, kHZ %d, div %d\n", pll, khz, val);
31450 +
31451 +       if (val) {
31452 +               val--;
31453 +               reg_set_bit_mask(glamo, reg, mask, val);
31454 +               mdelay(5); /* wait some time to stabilize */
31455 +
31456 +               return 0;
31457 +       } else {
31458 +               return -EINVAL;
31459 +       }
31460 +}
31461 +EXPORT_SYMBOL_GPL(glamo_engine_reclock);
31462 +
31463 +/***********************************************************************
31464 + * script support
31465 + ***********************************************************************/
31466 +
31467 +int glamo_run_script(struct glamo_core *glamo, struct glamo_script *script,
31468 +                    int len, int may_sleep)
31469 +{
31470 +       int i;
31471 +
31472 +       for (i = 0; i < len; i++) {
31473 +               struct glamo_script *line = &script[i];
31474 +
31475 +               switch (line->reg) {
31476 +               case 0xffff:
31477 +                       return 0;
31478 +               case 0xfffe:
31479 +                       if (may_sleep)
31480 +                               msleep(line->val);
31481 +                       else
31482 +                               mdelay(line->val * 4);
31483 +                       break;
31484 +               case 0xfffd:
31485 +                       /* spin until PLLs lock */
31486 +                       while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3)
31487 +                               ;
31488 +                       break;
31489 +               default:
31490 +                       __reg_write(glamo, script[i].reg, script[i].val);
31491 +                       break;
31492 +               }
31493 +       }
31494 +
31495 +       return 0;
31496 +}
31497 +EXPORT_SYMBOL(glamo_run_script);
31498 +
31499 +static struct glamo_script glamo_init_script[] = {
31500 +       { GLAMO_REG_CLOCK_HOST,         0x1000 },
31501 +               { 0xfffe, 2 },
31502 +       { GLAMO_REG_CLOCK_MEMORY,       0x1000 },
31503 +       { GLAMO_REG_CLOCK_MEMORY,       0x2000 },
31504 +       { GLAMO_REG_CLOCK_LCD,          0x1000 },
31505 +       { GLAMO_REG_CLOCK_MMC,          0x1000 },
31506 +       { GLAMO_REG_CLOCK_ISP,          0x1000 },
31507 +       { GLAMO_REG_CLOCK_ISP,          0x3000 },
31508 +       { GLAMO_REG_CLOCK_JPEG,         0x1000 },
31509 +       { GLAMO_REG_CLOCK_3D,           0x1000 },
31510 +       { GLAMO_REG_CLOCK_3D,           0x3000 },
31511 +       { GLAMO_REG_CLOCK_2D,           0x1000 },
31512 +       { GLAMO_REG_CLOCK_2D,           0x3000 },
31513 +       { GLAMO_REG_CLOCK_RISC1,        0x1000 },
31514 +       { GLAMO_REG_CLOCK_MPEG,         0x3000 },
31515 +       { GLAMO_REG_CLOCK_MPEG,         0x3000 },
31516 +       { GLAMO_REG_CLOCK_MPROC,        0x1000 /*0x100f*/ },
31517 +               { 0xfffe, 2 },
31518 +       { GLAMO_REG_CLOCK_HOST,         0x0000 },
31519 +       { GLAMO_REG_CLOCK_MEMORY,       0x0000 },
31520 +       { GLAMO_REG_CLOCK_LCD,          0x0000 },
31521 +       { GLAMO_REG_CLOCK_MMC,          0x0000 },
31522 +#if 0
31523 +/* unused engines must be left in reset to stop MMC block read "blackouts" */
31524 +       { GLAMO_REG_CLOCK_ISP,          0x0000 },
31525 +       { GLAMO_REG_CLOCK_ISP,          0x0000 },
31526 +       { GLAMO_REG_CLOCK_JPEG,         0x0000 },
31527 +       { GLAMO_REG_CLOCK_3D,           0x0000 },
31528 +       { GLAMO_REG_CLOCK_3D,           0x0000 },
31529 +       { GLAMO_REG_CLOCK_2D,           0x0000 },
31530 +       { GLAMO_REG_CLOCK_2D,           0x0000 },
31531 +       { GLAMO_REG_CLOCK_RISC1,        0x0000 },
31532 +       { GLAMO_REG_CLOCK_MPEG,         0x0000 },
31533 +       { GLAMO_REG_CLOCK_MPEG,         0x0000 },
31534 +#endif
31535 +       { GLAMO_REG_PLL_GEN1,           0x05db },       /* 48MHz */
31536 +       { GLAMO_REG_PLL_GEN3,           0x0aba },       /* 90MHz */
31537 +       { 0xfffd, 0 },
31538 +       /*
31539 +        * b9 of this register MUST be zero to get any interrupts on INT#
31540 +        * the other set bits enable all the engine interrupt sources
31541 +        */
31542 +       { GLAMO_REG_IRQ_ENABLE,         0x01ff },
31543 +       { GLAMO_REG_CLOCK_GEN6,         0x2000 },
31544 +       { GLAMO_REG_CLOCK_GEN7,         0x0101 },
31545 +       { GLAMO_REG_CLOCK_GEN8,         0x0100 },
31546 +       { GLAMO_REG_CLOCK_HOST,         0x000d },
31547 +       { 0x200,        0x0ef0 },
31548 +       { 0x202,        0x07ff },
31549 +       { 0x212,        0x0000 },
31550 +       { 0x214,        0x4000 },
31551 +       { 0x216,        0xf00e },
31552 +
31553 +       /* S-Media recommended "set tiling mode to 512 mode for memory access
31554 +        * more efficiency when 640x480" */
31555 +       { GLAMO_REG_MEM_TYPE,           0x0c74 }, /* 8MB, 16 word pg wr+rd */
31556 +       { GLAMO_REG_MEM_GEN,            0xafaf }, /* 63 grants min + max */
31557 +       /*
31558 +        * the register below originally 0x0108 makes unreliable Glamo MMC
31559 +        * write operations.  Cranked to 0x05ad to add a wait state, the
31560 +        * unreliability is not seen after 4GB of write / read testing
31561 +        */
31562 +       { GLAMO_REG_MEM_TIMING1,        0x0108 },
31563 +       { GLAMO_REG_MEM_TIMING2,        0x0010 }, /* Taa = 3 MCLK */
31564 +       { GLAMO_REG_MEM_TIMING3,        0x0000 },
31565 +       { GLAMO_REG_MEM_TIMING4,        0x0000 }, /* CE1# delay fall/rise */
31566 +       { GLAMO_REG_MEM_TIMING5,        0x0000 }, /* UB# LB# */
31567 +       { GLAMO_REG_MEM_TIMING6,        0x0000 }, /* OE# */
31568 +       { GLAMO_REG_MEM_TIMING7,        0x0000 }, /* WE# */
31569 +       { GLAMO_REG_MEM_TIMING8,        0x1002 }, /* MCLK delay, was 0x1000 */
31570 +       { GLAMO_REG_MEM_TIMING9,        0x6006 },
31571 +       { GLAMO_REG_MEM_TIMING10,       0x00ff },
31572 +       { GLAMO_REG_MEM_TIMING11,       0x0001 },
31573 +       { GLAMO_REG_MEM_POWER1,         0x0020 },
31574 +       { GLAMO_REG_MEM_POWER2,         0x0000 },
31575 +       { GLAMO_REG_MEM_DRAM1,          0x0000 },
31576 +               { 0xfffe, 1 },
31577 +       { GLAMO_REG_MEM_DRAM1,          0xc100 },
31578 +               { 0xfffe, 1 },
31579 +       { GLAMO_REG_MEM_DRAM1,          0xe100 },
31580 +       { GLAMO_REG_MEM_DRAM2,          0x01d6 },
31581 +       { GLAMO_REG_CLOCK_MEMORY,       0x000b },
31582 +};
31583 +
31584 +
31585 +enum glamo_power {
31586 +       GLAMO_POWER_ON,
31587 +       GLAMO_POWER_SUSPEND,
31588 +};
31589 +
31590 +static void glamo_power(struct glamo_core *glamo,
31591 +                       enum glamo_power new_state)
31592 +{
31593 +       int n;
31594 +
31595 +       spin_lock(&glamo->lock);
31596 +
31597 +       dev_dbg(&glamo->pdev->dev, "***** glamo_power -> %d\n", new_state);
31598 +
31599 +       switch (new_state) {
31600 +       case GLAMO_POWER_ON:
31601 +               /* power up PLL1 and PLL2 */
31602 +               __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN6, 0x0001, 0xffff);
31603 +               __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0x0000);
31604 +
31605 +               /* spin until PLL1 and PLL2 lock */
31606 +               while ((__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 3) != 3)
31607 +                       ;
31608 +
31609 +               /* Get memory out of deep powerdown */
31610 +
31611 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM2,
31612 +                                       (7 << 6) | /* tRC */
31613 +                                       (1 << 4) | /* tRP */
31614 +                                       (1 << 2) | /* tRCD */
31615 +                                       2); /* CAS latency */
31616 +
31617 +               /* Stop self-refresh */
31618 +
31619 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
31620 +                                       GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
31621 +                                       GLAMO_MEM_DRAM1_EN_GATE_CKE |
31622 +                                       GLAMO_MEM_REFRESH_COUNT);
31623 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
31624 +                                       GLAMO_MEM_DRAM1_EN_MODEREG_SET |
31625 +                                       GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
31626 +                                       GLAMO_MEM_DRAM1_EN_GATE_CKE |
31627 +                                       GLAMO_MEM_REFRESH_COUNT);
31628 +
31629 +               /* re-enable clocks to memory */
31630 +
31631 +               __reg_write(glamo, GLAMO_REG_CLOCK_MEMORY,
31632 +                                       GLAMO_CLOCK_MEM_EN_MOCACLK |
31633 +                                       GLAMO_CLOCK_MEM_EN_M1CLK |
31634 +                                       GLAMO_CLOCK_MEM_DG_M1CLK);
31635 +
31636 +               /* restore each engine that was up before suspend */
31637 +               for (n = 0; n < __NUM_GLAMO_ENGINES; n++)
31638 +                       if (glamo->engine_enabled_bitfield_suspend & (1 << n))
31639 +                               __glamo_engine_enable(glamo, n);
31640 +               break;
31641 +
31642 +       case GLAMO_POWER_SUSPEND:
31643 +               /* stash a copy of which engines were running */
31644 +               glamo->engine_enabled_bitfield_suspend =
31645 +                                                glamo->engine_enabled_bitfield;
31646 +
31647 +               /* take down each engine before we kill mem and pll */
31648 +               for (n = 0; n < __NUM_GLAMO_ENGINES; n++)
31649 +                       if (glamo->engine_enabled_bitfield & (1 << n))
31650 +                               __glamo_engine_disable(glamo, n);
31651 +
31652 +               /* enable self-refresh */
31653 +
31654 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
31655 +                                       GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
31656 +                                       GLAMO_MEM_DRAM1_EN_GATE_CKE |
31657 +                                       GLAMO_MEM_DRAM1_SELF_REFRESH |
31658 +                                       GLAMO_MEM_REFRESH_COUNT);
31659 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM1,
31660 +                                       GLAMO_MEM_DRAM1_EN_MODEREG_SET |
31661 +                                       GLAMO_MEM_DRAM1_EN_DRAM_REFRESH |
31662 +                                       GLAMO_MEM_DRAM1_EN_GATE_CKE |
31663 +                                       GLAMO_MEM_DRAM1_SELF_REFRESH |
31664 +                                       GLAMO_MEM_REFRESH_COUNT);
31665 +
31666 +               /* force RAM into deep powerdown */
31667 +
31668 +               __reg_write(glamo, GLAMO_REG_MEM_DRAM2,
31669 +                                       GLAMO_MEM_DRAM2_DEEP_PWRDOWN |
31670 +                                       (7 << 6) | /* tRC */
31671 +                                       (1 << 4) | /* tRP */
31672 +                                       (1 << 2) | /* tRCD */
31673 +                                       2); /* CAS latency */
31674 +
31675 +               /* kill clocks to memory */
31676 +
31677 +               __reg_write(glamo, GLAMO_REG_CLOCK_MEMORY, 0);
31678 +
31679 +               /* power down PLL2 and then PLL1 */
31680 +               __reg_set_bit_mask(glamo, GLAMO_REG_PLL_GEN3, 0x2000, 0xffff);
31681 +               __reg_set_bit_mask(glamo, GLAMO_REG_DFT_GEN5, 0x0001, 0xffff);
31682 +               break;
31683 +       }
31684 +
31685 +       spin_unlock(&glamo->lock);
31686 +}
31687 +
31688 +#if 0
31689 +#define MEMDETECT_RETRY        6
31690 +static unsigned int detect_memsize(struct glamo_core *glamo)
31691 +{
31692 +       int i;
31693 +
31694 +       /*static const u_int16_t pattern[] = {
31695 +               0x1111, 0x8a8a, 0x2222, 0x7a7a,
31696 +               0x3333, 0x6a6a, 0x4444, 0x5a5a,
31697 +               0x5555, 0x4a4a, 0x6666, 0x3a3a,
31698 +               0x7777, 0x2a2a, 0x8888, 0x1a1a
31699 +       }; */
31700 +
31701 +       for (i = 0; i < MEMDETECT_RETRY; i++) {
31702 +               switch (glamo->type) {
31703 +               case 3600:
31704 +                       __reg_write(glamo, GLAMO_REG_MEM_TYPE, 0x0072);
31705 +                       __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100);
31706 +                       break;
31707 +               case 3650:
31708 +                       switch (glamo->revision) {
31709 +                       case GLAMO_CORE_REV_A0:
31710 +                               if (i & 1)
31711 +                                       __reg_write(glamo, GLAMO_REG_MEM_TYPE,
31712 +                                                   0x097a);
31713 +                               else
31714 +                                       __reg_write(glamo, GLAMO_REG_MEM_TYPE,
31715 +                                                   0x0173);
31716 +
31717 +                               __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000);
31718 +                               msleep(1);
31719 +                               __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xc100);
31720 +                               break;
31721 +                       default:
31722 +                               if (i & 1)
31723 +                                       __reg_write(glamo, GLAMO_REG_MEM_TYPE,
31724 +                                                   0x0972);
31725 +                               else
31726 +                                       __reg_write(glamo, GLAMO_REG_MEM_TYPE,
31727 +                                                   0x0872);
31728 +
31729 +                               __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0x0000);
31730 +                               msleep(1);
31731 +                               __reg_write(glamo, GLAMO_REG_MEM_DRAM1, 0xe100);
31732 +                               break;
31733 +                       }
31734 +                       break;
31735 +               case 3700:
31736 +                       /* FIXME */
31737 +               default:
31738 +                       break;
31739 +               }
31740 +
31741 +#if 0
31742 +               /* FIXME: finish implementation */
31743 +               for (j = 0; j < 8; j++) {
31744 +                       __
31745 +#endif
31746 +       }
31747 +
31748 +       return 0;
31749 +}
31750 +#endif
31751 +
31752 +/* Find out if we can support this version of the Glamo chip */
31753 +static int glamo_supported(struct glamo_core *glamo)
31754 +{
31755 +       u_int16_t dev_id, rev_id; /*, memsize; */
31756 +
31757 +       dev_id = __reg_read(glamo, GLAMO_REG_DEVICE_ID);
31758 +       rev_id = __reg_read(glamo, GLAMO_REG_REVISION_ID);
31759 +
31760 +       switch (dev_id) {
31761 +       case 0x3650:
31762 +               switch (rev_id) {
31763 +               case GLAMO_CORE_REV_A2:
31764 +                       break;
31765 +               case GLAMO_CORE_REV_A0:
31766 +               case GLAMO_CORE_REV_A1:
31767 +               case GLAMO_CORE_REV_A3:
31768 +                       dev_warn(&glamo->pdev->dev, "untested core revision "
31769 +                                "%04x, your mileage may vary\n", rev_id);
31770 +                       break;
31771 +               default:
31772 +                       dev_warn(&glamo->pdev->dev, "unknown glamo revision "
31773 +                                "%04x, your mileage may vary\n", rev_id);
31774 +                       /* maybe should abort ? */
31775 +               }
31776 +               break;
31777 +       case 0x3600:
31778 +       case 0x3700:
31779 +       default:
31780 +               dev_err(&glamo->pdev->dev, "unsupported Glamo device %04x\n",
31781 +                       dev_id);
31782 +               return 0;
31783 +       }
31784 +
31785 +       dev_info(&glamo->pdev->dev, "Detected Glamo core %04x Revision %04x "
31786 +                "(%uHz CPU / %uHz Memory)\n", dev_id, rev_id,
31787 +                glamo_pll_rate(glamo, GLAMO_PLL1),
31788 +                glamo_pll_rate(glamo, GLAMO_PLL2));
31789 +
31790 +       return 1;
31791 +}
31792 +
31793 +static ssize_t regs_write(struct device *dev, struct device_attribute *attr,
31794 +                          const char *buf, size_t count)
31795 +{
31796 +       unsigned long reg = simple_strtoul(buf, NULL, 10);
31797 +       struct glamo_core *glamo = dev_get_drvdata(dev);
31798 +
31799 +       while (*buf && (*buf != ' '))
31800 +               buf++;
31801 +       if (*buf != ' ')
31802 +               return -EINVAL;
31803 +       while (*buf && (*buf == ' '))
31804 +               buf++;
31805 +       if (!*buf)
31806 +               return -EINVAL;
31807 +
31808 +       printk(KERN_INFO"reg 0x%02lX <-- 0x%04lX\n",
31809 +              reg, simple_strtoul(buf, NULL, 10));
31810 +
31811 +       __reg_write(glamo, reg, simple_strtoul(buf, NULL, 10));
31812 +
31813 +       return count;
31814 +}
31815 +
31816 +static ssize_t regs_read(struct device *dev, struct device_attribute *attr,
31817 +                       char *buf)
31818 +{
31819 +       struct glamo_core *glamo = dev_get_drvdata(dev);
31820 +       int n, n1 = 0, r;
31821 +       char * end = buf;
31822 +       struct reg_range {
31823 +               int start;
31824 +               int count;
31825 +               char * name;
31826 +       };
31827 +       struct reg_range reg_range[] = {
31828 +               { 0x0000, 0x76, "General" },
31829 +               { 0x0200, 0x100, "Host Bus" },
31830 +               { 0x0300, 0x38, "Memory" },
31831 +/*             { 0x0400, 0x100, "Sensor" },
31832 +               { 0x0500, 0x300, "ISP" },
31833 +               { 0x0800, 0x400, "JPEG" },
31834 +               { 0x0c00, 0x500, "MPEG" },
31835 +               { 0x1100, 0x400, "LCD" },
31836 +               { 0x1500, 0x080, "MPU 0" },
31837 +               { 0x1580, 0x080, "MPU 1" },
31838 +               { 0x1600, 0x080, "Command Queue" },
31839 +               { 0x1680, 0x080, "RISC CPU" },
31840 +               { 0x1700, 0x400, "2D Unit" },
31841 +               { 0x1b00, 0x900, "3D Unit" },
31842 +*/
31843 +       };
31844 +
31845 +       spin_lock(&glamo->lock);
31846 +
31847 +       for (r = 0; r < ARRAY_SIZE(reg_range); r++) {
31848 +               n1 = 0;
31849 +               end += sprintf(end, "\n%s\n", reg_range[r].name);
31850 +               for (n = reg_range[r].start;
31851 +                    n < reg_range[r].start + reg_range[r].count; n += 2) {
31852 +                       if (((n1++) & 7) == 0)
31853 +                               end += sprintf(end, "\n%04X:  ", n);
31854 +                       end += sprintf(end, "%04x ", __reg_read(glamo, n));
31855 +               }
31856 +               end += sprintf(end, "\n");
31857 +       }
31858 +       spin_unlock(&glamo->lock);
31859 +
31860 +       return end - buf;
31861 +}
31862 +
31863 +static DEVICE_ATTR(regs, 0644, regs_read, regs_write);
31864 +static struct attribute *glamo_sysfs_entries[] = {
31865 +       &dev_attr_regs.attr,
31866 +       NULL
31867 +};
31868 +static struct attribute_group glamo_attr_group = {
31869 +       .name   = NULL,
31870 +       .attrs  = glamo_sysfs_entries,
31871 +};
31872 +
31873 +
31874 +
31875 +static int __init glamo_probe(struct platform_device *pdev)
31876 +{
31877 +       int rc = 0, irq;
31878 +       struct glamo_core *glamo;
31879 +
31880 +       if (glamo_handle) {
31881 +               dev_err(&pdev->dev,
31882 +                       "This driver supports only one instance\n");
31883 +               return -EBUSY;
31884 +       }
31885 +
31886 +       glamo = kmalloc(GFP_KERNEL, sizeof(*glamo));
31887 +       if (!glamo)
31888 +               return -ENOMEM;
31889 +
31890 +       spin_lock_init(&glamo->lock);
31891 +       glamo_handle = glamo;
31892 +       glamo->pdev = pdev;
31893 +       glamo->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
31894 +       glamo->irq = platform_get_irq(pdev, 0);
31895 +       glamo->pdata = pdev->dev.platform_data;
31896 +       if (!glamo->mem || !glamo->pdata) {
31897 +               dev_err(&pdev->dev, "platform device with no MEM/PDATA ?\n");
31898 +               rc = -ENOENT;
31899 +               goto out_free;
31900 +       }
31901 +
31902 +       init_resume_dependency_list(&glamo->resume_dependency);
31903 +
31904 +       /* register a number of sibling devices whoise IOMEM resources
31905 +        * are siblings of pdev's IOMEM resource */
31906 +#if 0
31907 +       glamo_core_dev.dev.parent = &pdev.dev;
31908 +       mangle_mem_resources(glamo_core_dev.resources,
31909 +                            glamo_core_dev.num_resources, glamo->mem);
31910 +       glamo_core_dev.resources[1].start = glamo->irq;
31911 +       glamo_core_dev.resources[1].end = glamo->irq;
31912 +       platform_device_register(&glamo_core_dev);
31913 +#endif
31914 +       /* only remap the generic, hostbus and memory controller registers */
31915 +       glamo->base = ioremap(glamo->mem->start, GLAMO_REGOFS_VIDCAP);
31916 +       if (!glamo->base) {
31917 +               dev_err(&pdev->dev, "failed to ioremap() memory region\n");
31918 +               goto out_free;
31919 +       }
31920 +
31921 +       /* bring MCI specific stuff over from our MFD platform data */
31922 +       glamo_mci_def_pdata.glamo_set_mci_power =
31923 +                                       glamo->pdata->glamo_set_mci_power;
31924 +       glamo_mci_def_pdata.glamo_mci_use_slow =
31925 +                                       glamo->pdata->glamo_mci_use_slow;
31926 +       glamo_mci_def_pdata.glamo_irq_is_wired =
31927 +                                       glamo->pdata->glamo_irq_is_wired;
31928 +       glamo_mci_def_pdata.mci_suspending =
31929 +                                       glamo->pdata->mci_suspending;
31930 +       glamo_mci_def_pdata.mci_all_dependencies_resumed =
31931 +                               glamo->pdata->mci_all_dependencies_resumed;
31932 +
31933 +       glamo_2d_dev.dev.parent = &pdev->dev;
31934 +       mangle_mem_resources(glamo_2d_dev.resource,
31935 +                            glamo_2d_dev.num_resources, glamo->mem);
31936 +       platform_device_register(&glamo_2d_dev);
31937 +
31938 +       glamo_3d_dev.dev.parent = &pdev->dev;
31939 +       mangle_mem_resources(glamo_3d_dev.resource,
31940 +                            glamo_3d_dev.num_resources, glamo->mem);
31941 +       platform_device_register(&glamo_3d_dev);
31942 +
31943 +       glamo_jpeg_dev.dev.parent = &pdev->dev;
31944 +       mangle_mem_resources(glamo_jpeg_dev.resource,
31945 +                            glamo_jpeg_dev.num_resources, glamo->mem);
31946 +       platform_device_register(&glamo_jpeg_dev);
31947 +
31948 +       glamo_mpeg_dev.dev.parent = &pdev->dev;
31949 +       mangle_mem_resources(glamo_mpeg_dev.resource,
31950 +                            glamo_mpeg_dev.num_resources, glamo->mem);
31951 +       platform_device_register(&glamo_mpeg_dev);
31952 +
31953 +       glamo->pdata->glamo = glamo;
31954 +       glamo_fb_dev.dev.parent = &pdev->dev;
31955 +       glamo_fb_dev.dev.platform_data = glamo->pdata;
31956 +       mangle_mem_resources(glamo_fb_dev.resource,
31957 +                            glamo_fb_dev.num_resources, glamo->mem);
31958 +       platform_device_register(&glamo_fb_dev);
31959 +
31960 +       glamo->pdata->spigpio_info->glamo = glamo;
31961 +       glamo_spigpio_dev.dev.parent = &pdev->dev;
31962 +       glamo_spigpio_dev.dev.platform_data = glamo->pdata->spigpio_info;
31963 +       platform_device_register(&glamo_spigpio_dev);
31964 +
31965 +       glamo_mmc_dev.dev.parent = &pdev->dev;
31966 +       /* we need it later to give to the engine enable and disable */
31967 +       glamo_mci_def_pdata.pglamo = glamo;
31968 +       mangle_mem_resources(glamo_mmc_dev.resource,
31969 +                            glamo_mmc_dev.num_resources, glamo->mem);
31970 +       platform_device_register(&glamo_mmc_dev);
31971 +
31972 +       /* only request the generic, hostbus and memory controller MMIO */
31973 +       glamo->mem = request_mem_region(glamo->mem->start,
31974 +                                       GLAMO_REGOFS_VIDCAP, "glamo-core");
31975 +       if (!glamo->mem) {
31976 +               dev_err(&pdev->dev, "failed to request memory region\n");
31977 +               goto out_free;
31978 +       }
31979 +
31980 +       if (!glamo_supported(glamo)) {
31981 +               dev_err(&pdev->dev, "This Glamo is not supported\n");
31982 +               goto out_free;
31983 +       }
31984 +
31985 +       rc = sysfs_create_group(&pdev->dev.kobj, &glamo_attr_group);
31986 +       if (rc < 0) {
31987 +               dev_err(&pdev->dev, "cannot create sysfs group\n");
31988 +               goto out_free;
31989 +       }
31990 +
31991 +       platform_set_drvdata(pdev, glamo);
31992 +
31993 +       dev_dbg(&glamo->pdev->dev, "running init script\n");
31994 +       glamo_run_script(glamo, glamo_init_script,
31995 +                        ARRAY_SIZE(glamo_init_script), 1);
31996 +
31997 +       dev_info(&glamo->pdev->dev, "Glamo core now %uHz CPU / %uHz Memory)\n",
31998 +                glamo_pll_rate(glamo, GLAMO_PLL1),
31999 +                glamo_pll_rate(glamo, GLAMO_PLL2));
32000 +
32001 +       glamo_lcm_reset(1);
32002 +
32003 +       for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) {
32004 +               set_irq_chip(irq, &glamo_irq_chip);
32005 +               set_irq_handler(irq, handle_level_irq);
32006 +               set_irq_flags(irq, IRQF_VALID);
32007 +       }
32008 +
32009 +       if (glamo->pdata->glamo_irq_is_wired &&
32010 +           !glamo->pdata->glamo_irq_is_wired()) {
32011 +               set_irq_chained_handler(glamo->irq, glamo_irq_demux_handler);
32012 +               set_irq_type(glamo->irq, IRQT_FALLING);
32013 +               glamo->irq_works = 1;
32014 +       } else
32015 +               glamo->irq_works = 0;
32016 +
32017 +       return 0;
32018 +
32019 +out_free:
32020 +       glamo_handle = NULL;
32021 +       kfree(glamo);
32022 +       return rc;
32023 +}
32024 +
32025 +static int glamo_remove(struct platform_device *pdev)
32026 +{
32027 +       struct glamo_core *glamo = platform_get_drvdata(pdev);
32028 +       int irq;
32029 +
32030 +       disable_irq(glamo->irq);
32031 +       set_irq_chained_handler(glamo->irq, NULL);
32032 +
32033 +       for (irq = IRQ_GLAMO(0); irq <= IRQ_GLAMO(8); irq++) {
32034 +               set_irq_flags(irq, 0);
32035 +               set_irq_chip(irq, NULL);
32036 +       }
32037 +
32038 +       platform_set_drvdata(pdev, NULL);
32039 +       platform_device_unregister(&glamo_fb_dev);
32040 +       platform_device_unregister(&glamo_mmc_dev);
32041 +       iounmap(glamo->base);
32042 +       release_mem_region(glamo->mem->start, GLAMO_REGOFS_VIDCAP);
32043 +       glamo_handle = NULL;
32044 +       kfree(glamo);
32045 +
32046 +       return 0;
32047 +}
32048 +
32049 +#ifdef CONFIG_PM
32050 +
32051 +/* have to export this because struct glamo_core is opaque */
32052 +
32053 +void glamo_register_resume_dependency(struct resume_dependency *
32054 +                                                             resume_dependency)
32055 +{
32056 +       register_resume_dependency(&glamo_handle->resume_dependency,
32057 +                                                            resume_dependency);
32058 +       if (glamo_handle->is_suspended)
32059 +               activate_all_resume_dependencies(
32060 +                                             &glamo_handle->resume_dependency);
32061 +}
32062 +EXPORT_SYMBOL_GPL(glamo_register_resume_dependency);
32063 +
32064 +
32065 +static int glamo_suspend(struct platform_device *pdev, pm_message_t state)
32066 +{
32067 +       glamo_power(glamo_handle, GLAMO_POWER_SUSPEND);
32068 +       glamo_handle->is_suspended = 1;
32069 +       activate_all_resume_dependencies(&glamo_handle->resume_dependency);
32070 +       return 0;
32071 +}
32072 +
32073 +static int glamo_resume(struct platform_device *pdev)
32074 +{
32075 +       glamo_power(glamo_handle, GLAMO_POWER_ON);
32076 +       glamo_handle->is_suspended = 0;
32077 +       callback_all_resume_dependencies(&glamo_handle->resume_dependency);
32078 +
32079 +       return 0;
32080 +}
32081 +#else
32082 +#define glamo_suspend NULL
32083 +#define glamo_resume  NULL
32084 +#endif
32085 +
32086 +static struct platform_driver glamo_driver = {
32087 +       .probe          = glamo_probe,
32088 +       .remove         = glamo_remove,
32089 +       .suspend_late   = glamo_suspend,
32090 +       .resume_early   = glamo_resume,
32091 +       .driver         = {
32092 +               .name   = "glamo3362",
32093 +               .owner  = THIS_MODULE,
32094 +       },
32095 +};
32096 +
32097 +static int __devinit glamo_init(void)
32098 +{
32099 +       return platform_driver_register(&glamo_driver);
32100 +}
32101 +
32102 +static void __exit glamo_cleanup(void)
32103 +{
32104 +       platform_driver_unregister(&glamo_driver);
32105 +}
32106 +
32107 +module_init(glamo_init);
32108 +module_exit(glamo_cleanup);
32109 +
32110 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
32111 +MODULE_DESCRIPTION("Smedia Glamo 336x/337x core/resource driver");
32112 +MODULE_LICENSE("GPL");
32113 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-core.h
32114 ===================================================================
32115 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
32116 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-core.h       2008-12-11 22:46:49.000000000 +0100
32117 @@ -0,0 +1,107 @@
32118 +#ifndef __GLAMO_CORE_H
32119 +#define __GLAMO_CORE_H
32120 +
32121 +#include <asm/system.h>
32122 +#include <linux/resume-dependency.h>
32123 +
32124 +/* for the time being, we put the on-screen framebuffer into the lowest
32125 + * VRAM space.  This should make the code easily compatible with the various
32126 + * 2MB/4MB/8MB variants of the Smedia chips */
32127 +#define GLAMO_OFFSET_VRAM      0x800000
32128 +#define GLAMO_OFFSET_FB        (GLAMO_OFFSET_VRAM)
32129 +
32130 +/* we only allocate the minimum possible size for the framebuffer to make
32131 + * sure we have sufficient memory for other functions of the chip */
32132 +//#define GLAMO_FB_SIZE        (640*480*4)     /* == 0x12c000 */
32133 +#define GLAMO_INTERNAL_RAM_SIZE 0x800000
32134 +#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
32135 +#define GLAMO_FB_SIZE  (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
32136 +
32137 +
32138 +struct glamo_core {
32139 +       int irq;
32140 +       int irq_works; /* 0 means PCB does not support Glamo IRQ */
32141 +       struct resource *mem;
32142 +       struct resource *mem_core;
32143 +       void __iomem *base;
32144 +       struct platform_device *pdev;
32145 +       struct glamofb_platform_data *pdata;
32146 +       u_int16_t type;
32147 +       u_int16_t revision;
32148 +       spinlock_t lock;
32149 +       struct resume_dependency resume_dependency;
32150 +       u32 engine_enabled_bitfield;
32151 +       u32 engine_enabled_bitfield_suspend;
32152 +       int is_suspended;
32153 +};
32154 +
32155 +struct glamo_script {
32156 +       u_int16_t reg;
32157 +       u_int16_t val;
32158 +};
32159 +
32160 +int glamo_run_script(struct glamo_core *glamo,
32161 +                    struct glamo_script *script, int len, int may_sleep);
32162 +
32163 +enum glamo_engine {
32164 +       GLAMO_ENGINE_CAPTURE,
32165 +       GLAMO_ENGINE_ISP,
32166 +       GLAMO_ENGINE_JPEG,
32167 +       GLAMO_ENGINE_MPEG_ENC,
32168 +       GLAMO_ENGINE_MPEG_DEC,
32169 +       GLAMO_ENGINE_LCD,
32170 +       GLAMO_ENGINE_CMDQ,
32171 +       GLAMO_ENGINE_2D,
32172 +       GLAMO_ENGINE_3D,
32173 +       GLAMO_ENGINE_MMC,
32174 +       GLAMO_ENGINE_MICROP0,
32175 +       GLAMO_ENGINE_RISC,
32176 +       GLAMO_ENGINE_MICROP1_MPEG_ENC,
32177 +       GLAMO_ENGINE_MICROP1_MPEG_DEC,
32178 +#if 0
32179 +       GLAMO_ENGINE_H264_DEC,
32180 +       GLAMO_ENGINE_RISC1,
32181 +       GLAMO_ENGINE_SPI,
32182 +#endif
32183 +       __NUM_GLAMO_ENGINES
32184 +};
32185 +
32186 +struct glamo_mci_pdata {
32187 +       struct glamo_core * pglamo;
32188 +       unsigned int    gpio_detect;
32189 +       unsigned int    gpio_wprotect;
32190 +       unsigned long   ocr_avail;
32191 +       void            (*glamo_set_mci_power)(unsigned char power_mode,
32192 +                                    unsigned short vdd);
32193 +       /* glamo-mci asking if it should use the slow clock to card */
32194 +       int             (*glamo_mci_use_slow)(void);
32195 +       int             (*glamo_irq_is_wired)(void);
32196 +       void            (*mci_suspending)(struct platform_device *dev);
32197 +       int             (*mci_all_dependencies_resumed)(struct platform_device
32198 +                                                                         *dev);
32199 +
32200 +};
32201 +
32202 +
32203 +static inline void glamo_reg_access_delay(void)
32204 +{
32205 +       int n;
32206 +
32207 +       for (n = 0; n != 2; n++)
32208 +               nop();
32209 +}
32210 +
32211 +
32212 +int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine);
32213 +int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
32214 +void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
32215 +int glamo_engine_reclock(struct glamo_core *glamo,
32216 +                        enum glamo_engine engine, int ps);
32217 +
32218 +void glamo_engine_clkreg_set(struct glamo_core *glamo,
32219 +                            enum glamo_engine engine,
32220 +                            u_int16_t mask, u_int16_t val);
32221 +
32222 +u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
32223 +                                 enum glamo_engine engine);
32224 +#endif /* __GLAMO_CORE_H */
32225 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-fb.c
32226 ===================================================================
32227 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
32228 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-fb.c 2008-12-11 22:46:49.000000000 +0100
32229 @@ -0,0 +1,911 @@
32230 +/* Smedia Glamo 336x/337x driver
32231 + *
32232 + * (C) 2007-2008 by Openmoko, Inc.
32233 + * Author: Harald Welte <laforge@openmoko.org>
32234 + * All rights reserved.
32235 + *
32236 + * This program is free software; you can redistribute it and/or
32237 + * modify it under the terms of the GNU General Public License as
32238 + * published by the Free Software Foundation; either version 2 of
32239 + * the License, or (at your option) any later version.
32240 + *
32241 + * This program is distributed in the hope that it will be useful,
32242 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
32243 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
32244 + * GNU General Public License for more details.
32245 + *
32246 + * You should have received a copy of the GNU General Public License
32247 + * along with this program; if not, write to the Free Software
32248 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32249 + * MA 02111-1307 USA
32250 + */
32251 +
32252 +#include <linux/module.h>
32253 +#include <linux/kernel.h>
32254 +#include <linux/errno.h>
32255 +#include <linux/string.h>
32256 +#include <linux/mm.h>
32257 +#include <linux/slab.h>
32258 +#include <linux/delay.h>
32259 +#include <linux/fb.h>
32260 +#include <linux/init.h>
32261 +#include <linux/vmalloc.h>
32262 +#include <linux/dma-mapping.h>
32263 +#include <linux/interrupt.h>
32264 +#include <linux/workqueue.h>
32265 +#include <linux/wait.h>
32266 +#include <linux/platform_device.h>
32267 +#include <linux/clk.h>
32268 +#include <linux/spinlock.h>
32269 +
32270 +#include <asm/io.h>
32271 +#include <asm/uaccess.h>
32272 +#include <asm/div64.h>
32273 +
32274 +#ifdef CONFIG_PM
32275 +#include <linux/pm.h>
32276 +#endif
32277 +
32278 +#include <linux/glamofb.h>
32279 +
32280 +#include "glamo-regs.h"
32281 +#include "glamo-core.h"
32282 +
32283 +#ifndef DEBUG
32284 +#define GLAMO_LOG(...)
32285 +#else
32286 +#define GLAMO_LOG(...) \
32287 +do { \
32288 +       printk(KERN_DEBUG "in %s:%s:%d", __FILE__, __func__, __LINE__); \
32289 +       printk(KERN_DEBUG __VA_ARGS__); \
32290 +} while (0);
32291 +#endif
32292 +
32293 +
32294 +#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
32295 +
32296 +struct glamofb_handle {
32297 +       struct fb_info *fb;
32298 +       struct device *dev;
32299 +       struct resource *reg;
32300 +       struct resource *fb_res;
32301 +       char __iomem *base;
32302 +       struct glamofb_platform_data *mach_info;
32303 +       char __iomem *cursor_addr;
32304 +       int cursor_on;
32305 +       u_int32_t pseudo_pal[16];
32306 +       spinlock_t lock_cmd;
32307 +};
32308 +
32309 +/* 'sibling' spi device for lcm init */
32310 +static struct platform_device glamo_spi_dev = {
32311 +       .name           = "glamo-lcm-spi",
32312 +};
32313 +
32314 +
32315 +static int reg_read(struct glamofb_handle *glamo,
32316 +                          u_int16_t reg)
32317 +{
32318 +       glamo_reg_access_delay();
32319 +       return readw(glamo->base + reg);
32320 +}
32321 +
32322 +static void reg_write(struct glamofb_handle *glamo,
32323 +                            u_int16_t reg, u_int16_t val)
32324 +{
32325 +       glamo_reg_access_delay();
32326 +       writew(val, glamo->base + reg);
32327 +}
32328 +
32329 +static struct glamo_script glamo_regs[] = {
32330 +       { GLAMO_REG_LCD_MODE1, 0x0020 },
32331 +       /* no display rotation, no hardware cursor, no dither, no gamma,
32332 +        * no retrace flip, vsync low-active, hsync low active,
32333 +        * no TVCLK, no partial display, hw dest color from fb,
32334 +        * no partial display mode, LCD1, software flip,  */
32335 +       { GLAMO_REG_LCD_MODE2, 0x1020 },
32336 +         /* no video flip, no ptr, no ptr, dhclk off,
32337 +          * normal mode,  no cpuif,
32338 +          * res, serial msb first, single fb, no fr ctrl,
32339 +          * cpu if bits all zero, no crc
32340 +          * 0000 0000 0010  0000 */
32341 +       { GLAMO_REG_LCD_MODE3, 0x0b40 },
32342 +         /* src data rgb565, res, 18bit rgb666
32343 +          * 000 01 011 0100 0000 */
32344 +       { GLAMO_REG_LCD_POLARITY, 0x440c },
32345 +         /* DE high active, no cpu/lcd if, cs0 force low, a0 low active,
32346 +          * np cpu if, 9bit serial data, sclk rising edge latch data
32347 +          * 01 00 0 100 0 000 01 0 0 */
32348 +       { GLAMO_REG_LCD_A_BASE1, 0x0000 }, /* display A base address 15:0 */
32349 +       { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */
32350 +       { GLAMO_REG_LCD_CURSOR_BASE1, 0x0000 }, /* cursor base address 15:0 */
32351 +       { GLAMO_REG_LCD_CURSOR_BASE2, 0x000f }, /* cursor base address 22:16 */
32352 +};
32353 +
32354 +static int glamofb_run_script(struct glamofb_handle *glamo,
32355 +                               struct glamo_script *script, int len)
32356 +{
32357 +       int i;
32358 +
32359 +       for (i = 0; i < len; i++) {
32360 +               struct glamo_script *line = &script[i];
32361 +
32362 +               if (line->reg == 0xffff)
32363 +                       return 0;
32364 +               else if (line->reg == 0xfffe)
32365 +                       msleep(line->val);
32366 +               else
32367 +                       reg_write(glamo, script[i].reg, script[i].val);
32368 +       }
32369 +
32370 +       return 0;
32371 +}
32372 +
32373 +static int glamofb_check_var(struct fb_var_screeninfo *var,
32374 +                            struct fb_info *info)
32375 +{
32376 +       struct glamofb_handle *glamo = info->par;
32377 +
32378 +       if (var->yres > glamo->mach_info->yres.max)
32379 +               var->yres = glamo->mach_info->yres.max;
32380 +       else if (var->yres < glamo->mach_info->yres.min)
32381 +               var->yres = glamo->mach_info->yres.min;
32382 +
32383 +       if (var->xres > glamo->mach_info->xres.max)
32384 +               var->xres = glamo->mach_info->xres.max;
32385 +       else if (var->xres < glamo->mach_info->xres.min)
32386 +               var->xres = glamo->mach_info->xres.min;
32387 +
32388 +       if (var->bits_per_pixel > glamo->mach_info->bpp.max)
32389 +               var->bits_per_pixel = glamo->mach_info->bpp.max;
32390 +       else if (var->bits_per_pixel < glamo->mach_info->bpp.min)
32391 +               var->bits_per_pixel = glamo->mach_info->bpp.min;
32392 +
32393 +       /* FIXME: set rgb positions */
32394 +       switch (var->bits_per_pixel) {
32395 +       case 16:
32396 +               switch (reg_read(glamo, GLAMO_REG_LCD_MODE3) & 0xc000) {
32397 +               case GLAMO_LCD_SRC_RGB565:
32398 +                       var->red.offset         = 11;
32399 +                       var->green.offset       = 5;
32400 +                       var->blue.offset        = 0;
32401 +                       var->red.length         = 5;
32402 +                       var->green.length       = 6;
32403 +                       var->blue.length        = 5;
32404 +                       var->transp.length      = 0;
32405 +                       break;
32406 +               case GLAMO_LCD_SRC_ARGB1555:
32407 +                       var->transp.offset      = 15;
32408 +                       var->red.offset         = 10;
32409 +                       var->green.offset       = 5;
32410 +                       var->blue.offset        = 0;
32411 +                       var->transp.length      = 1;
32412 +                       var->red.length         = 5;
32413 +                       var->green.length       = 5;
32414 +                       var->blue.length        = 5;
32415 +                       break;
32416 +               case GLAMO_LCD_SRC_ARGB4444:
32417 +                       var->transp.offset      = 12;
32418 +                       var->red.offset         = 8;
32419 +                       var->green.offset       = 4;
32420 +                       var->blue.offset        = 0;
32421 +                       var->transp.length      = 4;
32422 +                       var->red.length         = 4;
32423 +                       var->green.length       = 4;
32424 +                       var->blue.length        = 4;
32425 +                       break;
32426 +               }
32427 +               break;
32428 +       case 24:
32429 +       case 32:
32430 +       default:
32431 +               /* The Smedia Glamo doesn't support anything but 16bit color */
32432 +               printk(KERN_ERR
32433 +                      "Smedia driver does not [yet?] support 24/32bpp\n");
32434 +               return -EINVAL;
32435 +       }
32436 +
32437 +       return 0;
32438 +}
32439 +
32440 +static void reg_set_bit_mask(struct glamofb_handle *glamo,
32441 +                            u_int16_t reg, u_int16_t mask,
32442 +                            u_int16_t val)
32443 +{
32444 +       u_int16_t tmp;
32445 +
32446 +       val &= mask;
32447 +
32448 +       tmp = reg_read(glamo, reg);
32449 +       tmp &= ~mask;
32450 +       tmp |= val;
32451 +       reg_write(glamo, reg, tmp);
32452 +}
32453 +
32454 +#define GLAMO_LCD_WIDTH_MASK 0x03FF
32455 +#define GLAMO_LCD_HEIGHT_MASK 0x03FF
32456 +#define GLAMO_LCD_PITCH_MASK 0x07FE
32457 +#define GLAMO_LCD_HV_TOTAL_MASK 0x03FF
32458 +#define GLAMO_LCD_HV_RETR_START_MASK 0x03FF
32459 +#define GLAMO_LCD_HV_RETR_END_MASK 0x03FF
32460 +#define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF
32461 +#define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF
32462 +
32463 +enum orientation {
32464 +    ORIENTATION_PORTRAIT,
32465 +    ORIENTATION_LANDSCAPE
32466 +};
32467 +
32468 +
32469 +/* the caller has to enxure lock_cmd is held and we are in cmd mode */
32470 +static void __rotate_lcd(struct glamofb_handle *glamo, __u32 rotation)
32471 +{
32472 +       int glamo_rot;
32473 +
32474 +       switch (rotation) {
32475 +               case FB_ROTATE_UR:
32476 +                       glamo_rot = GLAMO_LCD_ROT_MODE_0;
32477 +                       break;
32478 +               case FB_ROTATE_CW:
32479 +                       glamo_rot = GLAMO_LCD_ROT_MODE_90;
32480 +                       break;
32481 +               case FB_ROTATE_UD:
32482 +                       glamo_rot = GLAMO_LCD_ROT_MODE_180;
32483 +                       break;
32484 +               case FB_ROTATE_CCW:
32485 +                       glamo_rot = GLAMO_LCD_ROT_MODE_270;
32486 +                       break;
32487 +               default:
32488 +                       glamo_rot = GLAMO_LCD_ROT_MODE_0;
32489 +                       break;
32490 +       }
32491 +
32492 +       reg_set_bit_mask(glamo,
32493 +                        GLAMO_REG_LCD_WIDTH,
32494 +                        GLAMO_LCD_ROT_MODE_MASK,
32495 +                        glamo_rot);
32496 +       reg_set_bit_mask(glamo,
32497 +                        GLAMO_REG_LCD_MODE1,
32498 +                        GLAMO_LCD_MODE1_ROTATE_EN,
32499 +                        (glamo_rot != GLAMO_LCD_ROT_MODE_0)?
32500 +                                GLAMO_LCD_MODE1_ROTATE_EN : 0);
32501 +}
32502 +
32503 +static enum orientation get_orientation(struct fb_var_screeninfo *var)
32504 +{
32505 +       if (var->xres <= var->yres)
32506 +               return ORIENTATION_PORTRAIT;
32507 +
32508 +       return ORIENTATION_LANDSCAPE;
32509 +}
32510 +
32511 +static int will_orientation_change(struct fb_var_screeninfo *var)
32512 +{
32513 +       enum orientation orient = get_orientation(var);
32514 +
32515 +       switch (orient) {
32516 +               case ORIENTATION_LANDSCAPE:
32517 +                       if (var->rotate == FB_ROTATE_UR ||
32518 +                           var->rotate == FB_ROTATE_UD)
32519 +                               return 1;
32520 +                       break;
32521 +               case ORIENTATION_PORTRAIT:
32522 +                       if (var->rotate == FB_ROTATE_CW ||
32523 +                           var->rotate == FB_ROTATE_CCW)
32524 +                               return 1;
32525 +                       break;
32526 +       }
32527 +       return 0;
32528 +}
32529 +
32530 +static void glamofb_update_lcd_controller(struct glamofb_handle *glamo,
32531 +                                         struct fb_var_screeninfo *var)
32532 +{
32533 +       int sync, bp, disp, fp, total, xres, yres, pitch, orientation_changing;
32534 +       unsigned long flags;
32535 +
32536 +       if (!glamo || !var)
32537 +               return;
32538 +
32539 +       spin_lock_irqsave(&glamo->lock_cmd, flags);
32540 +
32541 +       if (glamofb_cmd_mode(glamo, 1))
32542 +               goto out_unlock;
32543 +
32544 +       if (var->pixclock)
32545 +               glamo_engine_reclock(glamo->mach_info->glamo,
32546 +                                    GLAMO_ENGINE_LCD,
32547 +                                    var->pixclock);
32548 +
32549 +       xres = var->xres;
32550 +       yres = var->yres;
32551 +
32552 +       /* figure out if orientation is going to change */
32553 +       orientation_changing = will_orientation_change(var);
32554 +
32555 +        /* adjust the pitch according to new orientation to come */
32556 +        if (orientation_changing) {
32557 +               pitch = var->yres * var->bits_per_pixel / 8;
32558 +        } else {
32559 +               pitch = var->xres * var->bits_per_pixel / 8;
32560 +        }
32561 +
32562 +       /* set the awaiten LCD geometry */
32563 +       reg_set_bit_mask(glamo,
32564 +                        GLAMO_REG_LCD_WIDTH,
32565 +                        GLAMO_LCD_WIDTH_MASK,
32566 +                        xres);
32567 +       reg_set_bit_mask(glamo,
32568 +                        GLAMO_REG_LCD_HEIGHT,
32569 +                        GLAMO_LCD_HEIGHT_MASK,
32570 +                        yres);
32571 +       reg_set_bit_mask(glamo,
32572 +                        GLAMO_REG_LCD_PITCH,
32573 +                        GLAMO_LCD_PITCH_MASK,
32574 +                        pitch);
32575 +
32576 +       /* honour the rotation request */
32577 +       __rotate_lcd(glamo, var->rotate);
32578 +
32579 +       /* update the reported geometry of the framebuffer. */
32580 +       if (orientation_changing) {
32581 +               var->xres_virtual = var->xres = yres;
32582 +               var->yres_virtual = var->yres = xres;
32583 +       } else {
32584 +               var->xres_virtual = var->xres = xres;
32585 +               var->yres_virtual = var->yres = yres;
32586 +       }
32587 +
32588 +       /* update scannout timings */
32589 +       sync = 0;
32590 +       bp = sync + var->hsync_len;
32591 +       disp = bp + var->left_margin;
32592 +       fp = disp + xres;
32593 +       total = fp + var->right_margin;
32594 +
32595 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_TOTAL,
32596 +                        GLAMO_LCD_HV_TOTAL_MASK, total);
32597 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_START,
32598 +                        GLAMO_LCD_HV_RETR_START_MASK, sync);
32599 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_RETR_END,
32600 +                        GLAMO_LCD_HV_RETR_END_MASK, bp);
32601 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_START,
32602 +                         GLAMO_LCD_HV_RETR_DISP_START_MASK, disp);
32603 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_HORIZ_DISP_END,
32604 +                        GLAMO_LCD_HV_RETR_DISP_END_MASK, fp);
32605 +
32606 +       sync = 0;
32607 +       bp = sync + var->vsync_len;
32608 +       disp = bp + var->upper_margin;
32609 +       fp = disp + yres;
32610 +       total = fp + var->lower_margin;
32611 +
32612 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_TOTAL,
32613 +                        GLAMO_LCD_HV_TOTAL_MASK, total);
32614 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_START,
32615 +                         GLAMO_LCD_HV_RETR_START_MASK, sync);
32616 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_RETR_END,
32617 +                        GLAMO_LCD_HV_RETR_END_MASK, bp);
32618 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_START,
32619 +                        GLAMO_LCD_HV_RETR_DISP_START_MASK, disp);
32620 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_VERT_DISP_END,
32621 +                        GLAMO_LCD_HV_RETR_DISP_END_MASK, fp);
32622 +
32623 +       glamofb_cmd_mode(glamo, 0);
32624 +
32625 +out_unlock:
32626 +       spin_unlock_irqrestore(&glamo->lock_cmd, flags);
32627 +}
32628 +
32629 +static int glamofb_set_par(struct fb_info *info)
32630 +{
32631 +       struct glamofb_handle *glamo = info->par;
32632 +       struct fb_var_screeninfo *var = &info->var;
32633 +
32634 +       switch (var->bits_per_pixel) {
32635 +       case 16:
32636 +               info->fix.visual = FB_VISUAL_TRUECOLOR;
32637 +               break;
32638 +       default:
32639 +               printk("Smedia driver doesn't support != 16bpp\n");
32640 +               return -EINVAL;
32641 +       }
32642 +
32643 +       info->fix.line_length = (var->xres * var->bits_per_pixel) / 8;
32644 +
32645 +       glamofb_update_lcd_controller(glamo, var);
32646 +
32647 +       return 0;
32648 +}
32649 +
32650 +static int glamofb_blank(int blank_mode, struct fb_info *info)
32651 +{
32652 +       struct glamofb_handle *gfb = info->par;
32653 +       struct glamo_core *gcore = gfb->mach_info->glamo;
32654 +
32655 +       dev_dbg(gfb->dev, "glamofb_blank(%u)\n", blank_mode);
32656 +
32657 +       switch (blank_mode) {
32658 +       case FB_BLANK_VSYNC_SUSPEND:
32659 +       case FB_BLANK_HSYNC_SUSPEND:
32660 +               /* FIXME: add pdata hook/flag to indicate whether
32661 +                * we should already switch off pixel clock here */
32662 +               break;
32663 +       case FB_BLANK_POWERDOWN:
32664 +               /* disable the pixel clock */
32665 +               glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
32666 +                                       GLAMO_CLOCK_LCD_EN_DCLK, 0);
32667 +               break;
32668 +       case FB_BLANK_UNBLANK:
32669 +       case FB_BLANK_NORMAL:
32670 +               /* enable the pixel clock */
32671 +               glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
32672 +                                       GLAMO_CLOCK_LCD_EN_DCLK,
32673 +                                       GLAMO_CLOCK_LCD_EN_DCLK);
32674 +               break;
32675 +       }
32676 +
32677 +       /* FIXME: once we have proper clock management in glamo-core,
32678 +        * we can determine if other units need MCLK1 or the PLL, and
32679 +        * disable it if not used. */
32680 +       return 0;
32681 +}
32682 +
32683 +static inline unsigned int chan_to_field(unsigned int chan,
32684 +                                        struct fb_bitfield *bf)
32685 +{
32686 +       chan &= 0xffff;
32687 +       chan >>= 16 - bf->length;
32688 +       return chan << bf->offset;
32689 +}
32690 +
32691 +static int glamofb_setcolreg(unsigned regno,
32692 +                            unsigned red, unsigned green, unsigned blue,
32693 +                            unsigned transp, struct fb_info *info)
32694 +{
32695 +       struct glamofb_handle *glamo = info->par;
32696 +       unsigned int val;
32697 +
32698 +       switch (glamo->fb->fix.visual) {
32699 +       case FB_VISUAL_TRUECOLOR:
32700 +       case FB_VISUAL_DIRECTCOLOR:
32701 +               /* true-colour, use pseuo-palette */
32702 +
32703 +               if (regno < 16) {
32704 +                       u32 *pal = glamo->fb->pseudo_palette;
32705 +
32706 +                       val  = chan_to_field(red, &glamo->fb->var.red);
32707 +                       val |= chan_to_field(green, &glamo->fb->var.green);
32708 +                       val |= chan_to_field(blue, &glamo->fb->var.blue);
32709 +
32710 +                       pal[regno] = val;
32711 +               };
32712 +               break;
32713 +       default:
32714 +               return 1; /* unknown type */
32715 +       }
32716 +
32717 +       return 0;
32718 +}
32719 +
32720 +#ifdef CONFIG_MFD_GLAMO_HWACCEL
32721 +static inline void glamofb_vsync_wait(struct glamofb_handle *glamo,
32722 +               int line, int size, int range)
32723 +{
32724 +       int count[2];
32725 +
32726 +       do {
32727 +               count[0] = reg_read(glamo, GLAMO_REG_LCD_STATUS2) & 0x3ff;
32728 +               count[1] = reg_read(glamo, GLAMO_REG_LCD_STATUS2) & 0x3ff;
32729 +       } while (count[0] != count[1] ||
32730 +                       (line < count[0] + range &&
32731 +                        size > count[0] - range) ||
32732 +                       count[0] < range * 2);
32733 +}
32734 +
32735 +/*
32736 + * Enable/disable the hardware cursor mode altogether
32737 + * (for blinking and such, use glamofb_cursor()).
32738 + */
32739 +static void glamofb_cursor_onoff(struct glamofb_handle *glamo, int on)
32740 +{
32741 +       int y, size;
32742 +
32743 +       if (glamo->cursor_on) {
32744 +               y = reg_read(glamo, GLAMO_REG_LCD_CURSOR_Y_POS);
32745 +               size = reg_read(glamo, GLAMO_REG_LCD_CURSOR_Y_SIZE);
32746 +
32747 +               glamofb_vsync_wait(glamo, y, size, 30);
32748 +       }
32749 +
32750 +       reg_set_bit_mask(glamo, GLAMO_REG_LCD_MODE1,
32751 +                       GLAMO_LCD_MODE1_CURSOR_EN,
32752 +                       on ? GLAMO_LCD_MODE1_CURSOR_EN : 0);
32753 +       glamo->cursor_on = on;
32754 +
32755 +       /* Hide the cursor by default */
32756 +       reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_SIZE, 0);
32757 +}
32758 +
32759 +static int glamofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
32760 +{
32761 +       struct glamofb_handle *glamo = info->par;
32762 +       unsigned long flags;
32763 +
32764 +       spin_lock_irqsave(&glamo->lock_cmd, flags);
32765 +
32766 +       reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_SIZE,
32767 +                       cursor->enable ? cursor->image.width : 0);
32768 +
32769 +       if (cursor->set & FB_CUR_SETPOS) {
32770 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_X_POS,
32771 +                         cursor->image.dx);
32772 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_POS,
32773 +                         cursor->image.dy);
32774 +       }
32775 +
32776 +       if (cursor->set & FB_CUR_SETCMAP) {
32777 +               uint16_t fg = glamo->pseudo_pal[cursor->image.fg_color];
32778 +               uint16_t bg = glamo->pseudo_pal[cursor->image.bg_color];
32779 +
32780 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_FG_COLOR, fg);
32781 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_BG_COLOR, bg);
32782 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_DST_COLOR, fg);
32783 +       }
32784 +
32785 +       if (cursor->set & FB_CUR_SETHOT)
32786 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_PRESET,
32787 +                               (cursor->hot.x << 8) | cursor->hot.y);
32788 +
32789 +       if ((cursor->set & FB_CUR_SETSIZE) ||
32790 +           (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE))) {
32791 +               int x, y, pitch, op;
32792 +               const uint8_t *pcol = cursor->image.data;
32793 +               const uint8_t *pmsk = cursor->mask;
32794 +               uint8_t __iomem *dst = glamo->cursor_addr;
32795 +               uint8_t dcol = 0;
32796 +               uint8_t dmsk = 0;
32797 +               uint8_t byte = 0;
32798 +
32799 +               if (cursor->image.depth > 1) {
32800 +                       spin_unlock_irqrestore(&glamo->lock_cmd, flags);
32801 +                       return -EINVAL;
32802 +               }
32803 +
32804 +               pitch = ((cursor->image.width + 7) >> 2) & ~1;
32805 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_PITCH,
32806 +                       pitch);
32807 +               reg_write(glamo, GLAMO_REG_LCD_CURSOR_Y_SIZE,
32808 +                       cursor->image.height);
32809 +
32810 +               for (y = 0; y < cursor->image.height; y++) {
32811 +                       byte = 0;
32812 +                       for (x = 0; x < cursor->image.width; x++) {
32813 +                               if ((x % 8) == 0) {
32814 +                                       dcol = *pcol++;
32815 +                                       dmsk = *pmsk++;
32816 +                               } else {
32817 +                                       dcol >>= 1;
32818 +                                       dmsk >>= 1;
32819 +                               }
32820 +
32821 +                               if (cursor->rop == ROP_COPY)
32822 +                                       op = (dmsk & 1) ?
32823 +                                               (dcol & 1) ? 1 : 3 : 0;
32824 +                               else
32825 +                                       op = ((dmsk & 1) << 1) |
32826 +                                               ((dcol & 1) << 0);
32827 +                               byte |= op << ((x & 3) << 1);
32828 +
32829 +                               if (x % 4 == 3) {
32830 +                                       writeb(byte, dst + x / 4);
32831 +                                       byte = 0;
32832 +                               }
32833 +                       }
32834 +                       if (x % 4) {
32835 +                               writeb(byte, dst + x / 4);
32836 +                               byte = 0;
32837 +                       }
32838 +
32839 +                       dst += pitch;
32840 +               }
32841 +       }
32842 +
32843 +       spin_unlock_irqrestore(&glamo->lock_cmd, flags);
32844 +
32845 +       return 0;
32846 +}
32847 +#endif
32848 +
32849 +static inline int glamofb_cmdq_empty(struct glamofb_handle *gfb)
32850 +{
32851 +       /* DGCMdQempty -- 1 == command queue is empty */
32852 +       return reg_read(gfb, GLAMO_REG_LCD_STATUS1) & (1 << 15);
32853 +}
32854 +
32855 +/* call holding gfb->lock_cmd  when locking, until you unlock */
32856 +int glamofb_cmd_mode(struct glamofb_handle *gfb, int on)
32857 +{
32858 +       int timeout = 200000;
32859 +
32860 +       dev_dbg(gfb->dev, "glamofb_cmd_mode(gfb=%p, on=%d)\n", gfb, on);
32861 +       if (on) {
32862 +               dev_dbg(gfb->dev, "%s: waiting for cmdq empty: ",
32863 +                       __FUNCTION__);
32864 +               while ((!glamofb_cmdq_empty(gfb)) && (timeout--))
32865 +                       yield();
32866 +               if (timeout < 0) {
32867 +                       printk(KERN_ERR"*************"
32868 +                                      "glamofb cmd_queue never got empty"
32869 +                                      "*************\n");
32870 +                       return -EIO;
32871 +               }
32872 +               dev_dbg(gfb->dev, "empty!\n");
32873 +
32874 +               /* display the entire frame then switch to command */
32875 +               reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
32876 +                         GLAMO_LCD_CMD_TYPE_DISP |
32877 +                         GLAMO_LCD_CMD_DATA_FIRE_VSYNC);
32878 +
32879 +               /* wait until LCD is idle */
32880 +               dev_dbg(gfb->dev, "waiting for LCD idle: ");
32881 +               timeout = 200000;
32882 +               while ((!reg_read(gfb, GLAMO_REG_LCD_STATUS2) & (1 << 12)) &&
32883 +                     (timeout--))
32884 +                       yield();
32885 +               if (timeout < 0) {
32886 +                       printk(KERN_ERR"*************"
32887 +                                      "glamofb lcd never idle"
32888 +                                      "*************\n");
32889 +                       return -EIO;
32890 +               }
32891 +               dev_dbg(gfb->dev, "idle!\n");
32892 +
32893 +               mdelay(100);
32894 +       } else {
32895 +               /* RGB interface needs vsync/hsync */
32896 +               if (reg_read(gfb, GLAMO_REG_LCD_MODE3) & GLAMO_LCD_MODE3_RGB)
32897 +                       reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
32898 +                                 GLAMO_LCD_CMD_TYPE_DISP |
32899 +                                 GLAMO_LCD_CMD_DATA_DISP_SYNC);
32900 +
32901 +               reg_write(gfb, GLAMO_REG_LCD_COMMAND1,
32902 +                         GLAMO_LCD_CMD_TYPE_DISP |
32903 +                         GLAMO_LCD_CMD_DATA_DISP_FIRE);
32904 +       }
32905 +
32906 +       return 0;
32907 +}
32908 +EXPORT_SYMBOL_GPL(glamofb_cmd_mode);
32909 +
32910 +int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val)
32911 +{
32912 +       int timeout = 200000;
32913 +
32914 +       dev_dbg(gfb->dev, "%s: waiting for cmdq empty\n", __FUNCTION__);
32915 +       while ((!glamofb_cmdq_empty(gfb)) && (timeout--))
32916 +               yield();
32917 +       if (timeout < 0) {
32918 +               printk(KERN_ERR"*************"
32919 +                               "glamofb cmd_queue never got empty"
32920 +                               "*************\n");
32921 +               return 1;
32922 +       }
32923 +       dev_dbg(gfb->dev, "idle, writing 0x%04x\n", val);
32924 +
32925 +       reg_write(gfb, GLAMO_REG_LCD_COMMAND1, val);
32926 +
32927 +       return 0;
32928 +}
32929 +EXPORT_SYMBOL_GPL(glamofb_cmd_write);
32930 +
32931 +static struct fb_ops glamofb_ops = {
32932 +       .owner          = THIS_MODULE,
32933 +       .fb_check_var   = glamofb_check_var,
32934 +       .fb_set_par     = glamofb_set_par,
32935 +       .fb_blank       = glamofb_blank,
32936 +       .fb_setcolreg   = glamofb_setcolreg,
32937 +#ifdef CONFIG_MFD_GLAMO_HWACCEL
32938 +       .fb_cursor      = glamofb_cursor,
32939 +#endif
32940 +       .fb_fillrect    = cfb_fillrect,
32941 +       .fb_copyarea    = cfb_copyarea,
32942 +       .fb_imageblit   = cfb_imageblit,
32943 +};
32944 +
32945 +static int glamofb_init_regs(struct glamofb_handle *glamo)
32946 +{
32947 +       struct fb_info *info = glamo->fb;
32948 +
32949 +       glamofb_check_var(&info->var, info);
32950 +       glamofb_run_script(glamo, glamo_regs, ARRAY_SIZE(glamo_regs));
32951 +       glamofb_set_par(info);
32952 +
32953 +       return 0;
32954 +}
32955 +
32956 +static int __init glamofb_probe(struct platform_device *pdev)
32957 +{
32958 +       int rc = -EIO;
32959 +       struct fb_info *fbinfo;
32960 +       struct glamofb_handle *glamofb;
32961 +       struct glamofb_platform_data *mach_info = pdev->dev.platform_data;
32962 +
32963 +       printk(KERN_INFO "SMEDIA Glamo frame buffer driver (C) 2007 "
32964 +               "Openmoko, Inc.\n");
32965 +
32966 +       fbinfo = framebuffer_alloc(sizeof(struct glamofb_handle), &pdev->dev);
32967 +       if (!fbinfo)
32968 +               return -ENOMEM;
32969 +
32970 +       glamofb = fbinfo->par;
32971 +       glamofb->fb = fbinfo;
32972 +       glamofb->dev = &pdev->dev;
32973 +
32974 +       strcpy(fbinfo->fix.id, "SMedia Glamo");
32975 +
32976 +       glamofb->reg = platform_get_resource_byname(pdev, IORESOURCE_MEM,
32977 +                                                   "glamo-fb-regs");
32978 +       if (!glamofb->reg) {
32979 +               dev_err(&pdev->dev, "platform device with no registers?\n");
32980 +               rc = -ENOENT;
32981 +               goto out_free;
32982 +       }
32983 +
32984 +       glamofb->fb_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
32985 +                                                       "glamo-fb-mem");
32986 +       if (!glamofb->fb_res) {
32987 +               dev_err(&pdev->dev, "platform device with no memory ?\n");
32988 +               rc = -ENOENT;
32989 +               goto out_free;
32990 +       }
32991 +
32992 +       glamofb->reg = request_mem_region(glamofb->reg->start,
32993 +                                         RESSIZE(glamofb->reg), pdev->name);
32994 +       if (!glamofb->reg) {
32995 +               dev_err(&pdev->dev, "failed to request mmio region\n");
32996 +               goto out_free;
32997 +       }
32998 +
32999 +       glamofb->fb_res = request_mem_region(glamofb->fb_res->start,
33000 +                                            mach_info->fb_mem_size,
33001 +                                            pdev->name);
33002 +       if (!glamofb->fb_res) {
33003 +               dev_err(&pdev->dev, "failed to request vram region\n");
33004 +               goto out_release_reg;
33005 +       }
33006 +
33007 +       /* we want to remap only the registers required for this core
33008 +        * driver. */
33009 +       glamofb->base = ioremap(glamofb->reg->start, RESSIZE(glamofb->reg));
33010 +       if (!glamofb->base) {
33011 +               dev_err(&pdev->dev, "failed to ioremap() mmio memory\n");
33012 +               goto out_release_fb;
33013 +       }
33014 +       fbinfo->fix.smem_start = (unsigned long) glamofb->fb_res->start;
33015 +       fbinfo->fix.smem_len = mach_info->fb_mem_size;
33016 +
33017 +       fbinfo->screen_base = ioremap(glamofb->fb_res->start,
33018 +                                      RESSIZE(glamofb->fb_res));
33019 +       if (!fbinfo->screen_base) {
33020 +               dev_err(&pdev->dev, "failed to ioremap() vram memory\n");
33021 +               goto out_release_fb;
33022 +       }
33023 +       glamofb->cursor_addr = fbinfo->screen_base + 0xf0000;
33024 +
33025 +       platform_set_drvdata(pdev, fbinfo);
33026 +
33027 +       glamofb->mach_info = pdev->dev.platform_data;
33028 +
33029 +       fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
33030 +       fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
33031 +       fbinfo->fix.type_aux = 0;
33032 +       fbinfo->fix.xpanstep = 0;
33033 +       fbinfo->fix.ypanstep = 0;
33034 +       fbinfo->fix.ywrapstep = 0;
33035 +       fbinfo->fix.accel = FB_ACCEL_GLAMO;
33036 +
33037 +       fbinfo->var.nonstd = 0;
33038 +       fbinfo->var.activate = FB_ACTIVATE_NOW;
33039 +       fbinfo->var.height = mach_info->height;
33040 +       fbinfo->var.width = mach_info->width;
33041 +       fbinfo->var.accel_flags = 0;    /* FIXME */
33042 +       fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
33043 +
33044 +       fbinfo->fbops = &glamofb_ops;
33045 +       fbinfo->flags = FBINFO_FLAG_DEFAULT;
33046 +       fbinfo->pseudo_palette = &glamofb->pseudo_pal;
33047 +
33048 +       fbinfo->var.xres = mach_info->xres.defval;
33049 +       fbinfo->var.xres_virtual = mach_info->xres.defval;
33050 +       fbinfo->var.yres = mach_info->yres.defval;
33051 +       fbinfo->var.yres_virtual = mach_info->yres.defval;
33052 +       fbinfo->var.bits_per_pixel = mach_info->bpp.defval;
33053 +
33054 +       fbinfo->var.pixclock = mach_info->pixclock;
33055 +       fbinfo->var.left_margin = mach_info->left_margin;
33056 +       fbinfo->var.right_margin = mach_info->right_margin;
33057 +       fbinfo->var.upper_margin = mach_info->upper_margin;
33058 +       fbinfo->var.lower_margin = mach_info->lower_margin;
33059 +       fbinfo->var.hsync_len = mach_info->hsync_len;
33060 +       fbinfo->var.vsync_len = mach_info->vsync_len;
33061 +
33062 +       memset(fbinfo->screen_base, 0, fbinfo->fix.smem_len);
33063 +
33064 +       glamo_engine_enable(mach_info->glamo, GLAMO_ENGINE_LCD);
33065 +       glamo_engine_reset(mach_info->glamo, GLAMO_ENGINE_LCD);
33066 +
33067 +       spin_lock_init(&glamofb->lock_cmd);
33068 +       glamofb_init_regs(glamofb);
33069 +#ifdef CONFIG_MFD_GLAMO_HWACCEL
33070 +       glamofb_cursor_onoff(glamofb, 1);
33071 +#endif
33072 +
33073 +       rc = register_framebuffer(fbinfo);
33074 +       if (rc < 0) {
33075 +               dev_err(&pdev->dev, "failed to register framebuffer\n");
33076 +               goto out_unmap_fb;
33077 +       }
33078 +
33079 +       if (mach_info->spi_info) {
33080 +               /* register the sibling spi device */
33081 +               mach_info->spi_info->glamofb_handle = glamofb;
33082 +               glamo_spi_dev.dev.parent = &pdev->dev;
33083 +               glamo_spi_dev.dev.platform_data = mach_info->spi_info;
33084 +               platform_device_register(&glamo_spi_dev);
33085 +       }
33086 +
33087 +       printk(KERN_INFO "fb%d: %s frame buffer device\n",
33088 +               fbinfo->node, fbinfo->fix.id);
33089 +
33090 +       return 0;
33091 +
33092 +out_unmap_fb:
33093 +       iounmap(fbinfo->screen_base);
33094 +       iounmap(glamofb->base);
33095 +out_release_fb:
33096 +       release_mem_region(glamofb->fb_res->start, RESSIZE(glamofb->fb_res));
33097 +out_release_reg:
33098 +       release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg));
33099 +out_free:
33100 +       framebuffer_release(fbinfo);
33101 +       return rc;
33102 +}
33103 +
33104 +static int glamofb_remove(struct platform_device *pdev)
33105 +{
33106 +       struct glamofb_handle *glamofb = platform_get_drvdata(pdev);
33107 +
33108 +       platform_set_drvdata(pdev, NULL);
33109 +       iounmap(glamofb->base);
33110 +       release_mem_region(glamofb->reg->start, RESSIZE(glamofb->reg));
33111 +       kfree(glamofb);
33112 +
33113 +       return 0;
33114 +}
33115 +
33116 +static struct platform_driver glamofb_driver = {
33117 +       .probe          = glamofb_probe,
33118 +       .remove         = glamofb_remove,
33119 +       .driver         = {
33120 +               .name   = "glamo-fb",
33121 +               .owner  = THIS_MODULE,
33122 +       },
33123 +};
33124 +
33125 +static int __devinit glamofb_init(void)
33126 +{
33127 +       return platform_driver_register(&glamofb_driver);
33128 +}
33129 +
33130 +static void __exit glamofb_cleanup(void)
33131 +{
33132 +       platform_driver_unregister(&glamofb_driver);
33133 +}
33134 +
33135 +module_init(glamofb_init);
33136 +module_exit(glamofb_cleanup);
33137 +
33138 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
33139 +MODULE_DESCRIPTION("Smedia Glamo 336x/337x framebuffer driver");
33140 +MODULE_LICENSE("GPL");
33141 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-gpio.c
33142 ===================================================================
33143 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
33144 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-gpio.c       2008-12-11 22:46:49.000000000 +0100
33145 @@ -0,0 +1,62 @@
33146 +
33147 +#include <linux/kernel.h>
33148 +#include <linux/module.h>
33149 +#include <linux/spinlock.h>
33150 +#include <linux/io.h>
33151 +
33152 +#include <linux/glamo-gpio.h>
33153 +
33154 +#include "glamo-core.h"
33155 +#include "glamo-regs.h"
33156 +
33157 +void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin,
33158 +                      unsigned int value)
33159 +{
33160 +       unsigned int reg = REG_OF_GPIO(pin);
33161 +       u_int16_t tmp;
33162 +
33163 +       spin_lock(&glamo->lock);
33164 +       tmp = readw(glamo->base + reg);
33165 +       if (value)
33166 +               tmp |= OUTPUT_BIT(pin);
33167 +       else
33168 +               tmp &= ~OUTPUT_BIT(pin);
33169 +       writew(tmp, glamo->base + reg);
33170 +       spin_unlock(&glamo->lock);
33171 +}
33172 +EXPORT_SYMBOL(glamo_gpio_setpin);
33173 +
33174 +int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin)
33175 +{
33176 +       return readw(REG_OF_GPIO(pin)) & INPUT_BIT(pin) ? 1 : 0;
33177 +}
33178 +EXPORT_SYMBOL(glamo_gpio_getpin);
33179 +
33180 +void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc)
33181 +{
33182 +       unsigned int reg = REG_OF_GPIO(pinfunc);
33183 +       u_int16_t tmp;
33184 +
33185 +       spin_lock(&glamo->lock);
33186 +       tmp = readw(glamo->base + reg);
33187 +
33188 +       if ((pinfunc & 0x00f0) == GLAMO_GPIO_F_FUNC) {
33189 +               /* pin is a function pin: clear gpio bit */
33190 +               tmp &= ~FUNC_BIT(pinfunc);
33191 +       } else {
33192 +               /* pin is gpio: set gpio bit */
33193 +               tmp |= FUNC_BIT(pinfunc);
33194 +
33195 +               if (pinfunc & GLAMO_GPIO_F_IN) {
33196 +                       /* gpio input: set bit to disable output mode */
33197 +                       tmp |= GPIO_OUT_BIT(pinfunc);
33198 +               } else if (pinfunc & GLAMO_GPIO_F_OUT) {
33199 +                       /* gpio output: clear bit to enable output mode */
33200 +                       tmp &= ~GPIO_OUT_BIT(pinfunc);
33201 +               }
33202 +       }
33203 +       writew(tmp, glamo->base + reg);
33204 +       spin_unlock(&glamo->lock);
33205 +}
33206 +EXPORT_SYMBOL(glamo_gpio_cfgpin);
33207 +
33208 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-lcm-spi.c
33209 ===================================================================
33210 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
33211 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-lcm-spi.c    2008-12-11 22:46:49.000000000 +0100
33212 @@ -0,0 +1,240 @@
33213 +/*
33214 + * Copyright (C) 2007 Openmoko, Inc.
33215 + * Author: Harald Welte <laforge@openmoko.org>
33216 + *
33217 + * Smedia Glamo GPIO based SPI driver
33218 + *
33219 + * This program is free software; you can redistribute it and/or modify
33220 + * it under the terms of the GNU General Public License version 2 as
33221 + * published by the Free Software Foundation.
33222 + *
33223 + * This driver currently only implements a minimum subset of the hardware
33224 + * features, esp. those features that are required to drive the jbt6k74
33225 + * LCM controller asic in the TD028TTEC1 LCM.
33226 + *
33227 +*/
33228 +
33229 +#define DEBUG
33230 +
33231 +#include <linux/kernel.h>
33232 +#include <linux/init.h>
33233 +#include <linux/delay.h>
33234 +#include <linux/device.h>
33235 +#include <linux/spinlock.h>
33236 +#include <linux/workqueue.h>
33237 +#include <linux/platform_device.h>
33238 +
33239 +#include <linux/spi/spi.h>
33240 +#include <linux/spi/spi_bitbang.h>
33241 +#include <linux/spi/glamo.h>
33242 +
33243 +#include <linux/glamofb.h>
33244 +
33245 +#include <asm/hardware.h>
33246 +
33247 +#include "glamo-core.h"
33248 +#include "glamo-regs.h"
33249 +
33250 +struct glamo_spi {
33251 +       struct spi_bitbang      bitbang;
33252 +       struct spi_master       *master;
33253 +       struct glamo_spi_info   *info;
33254 +       struct device           *dev;
33255 +};
33256 +
33257 +static inline struct glamo_spi *to_gs(struct spi_device *spi)
33258 +{
33259 +       return spi->controller_data;
33260 +}
33261 +
33262 +static int glamo_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
33263 +{
33264 +       unsigned int bpw;
33265 +
33266 +       bpw = t ? t->bits_per_word : spi->bits_per_word;
33267 +
33268 +       if (bpw != 9 && bpw != 8) {
33269 +               dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
33270 +               return -EINVAL;
33271 +       }
33272 +
33273 +       return 0;
33274 +}
33275 +
33276 +static void glamo_spi_chipsel(struct spi_device *spi, int value)
33277 +{
33278 +#if 0
33279 +       struct glamo_spi *gs = to_gs(spi);
33280 +
33281 +       dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n",
33282 +               value, spi, gs, gs->info, gs->info->glamofb_handle);
33283 +
33284 +       glamofb_cmd_mode(gs->info->glamofb_handle, value);
33285 +#endif
33286 +}
33287 +
33288 +static int glamo_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
33289 +{
33290 +       struct glamo_spi *gs = to_gs(spi);
33291 +       const u_int16_t *ui16 = (const u_int16_t *) t->tx_buf;
33292 +       u_int16_t nine_bits;
33293 +       int i;
33294 +
33295 +       dev_dbg(&spi->dev, "txrx: tx %p, rx %p, bpw %d, len %d\n",
33296 +               t->tx_buf, t->rx_buf, t->bits_per_word, t->len);
33297 +
33298 +       if (spi->bits_per_word == 9)
33299 +               nine_bits = (1 << 9);
33300 +       else
33301 +               nine_bits = 0;
33302 +
33303 +       if (t->len > 3 * sizeof(u_int16_t)) {
33304 +               dev_err(&spi->dev, "this driver doesn't support "
33305 +                       "%u sized xfers\n", t->len);
33306 +               return -EINVAL;
33307 +       }
33308 +
33309 +       for (i = 0; i < t->len/sizeof(u_int16_t); i++) {
33310 +               /* actually transfer the data */
33311 +#if 1
33312 +               glamofb_cmd_write(gs->info->glamofb_handle,
33313 +                                 GLAMO_LCD_CMD_TYPE_SERIAL | nine_bits |
33314 +                                 (1 << 10) | (1 << 11) | (ui16[i] & 0x1ff));
33315 +#endif
33316 +               /* FIXME: fire ?!? */
33317 +               if (i == 0 && (ui16[i] & 0x1ff) == 0x29) {
33318 +                       dev_dbg(&spi->dev, "leaving command mode\n");
33319 +                       glamofb_cmd_mode(gs->info->glamofb_handle, 0);
33320 +               }
33321 +       }
33322 +
33323 +       return t->len;
33324 +}
33325 +
33326 +static int glamo_spi_setup(struct spi_device *spi)
33327 +{
33328 +       int ret;
33329 +
33330 +       if (!spi->bits_per_word)
33331 +               spi->bits_per_word = 9;
33332 +
33333 +       /* FIXME: hardware can do this */
33334 +       if (spi->mode & SPI_LSB_FIRST)
33335 +               return -EINVAL;
33336 +
33337 +       ret = glamo_spi_setupxfer(spi, NULL);
33338 +       if (ret < 0) {
33339 +               dev_err(&spi->dev, "setupxfer returned %d\n", ret);
33340 +               return ret;
33341 +       }
33342 +
33343 +       dev_dbg(&spi->dev, "%s: mode %d, %u bpw\n",
33344 +               __FUNCTION__, spi->mode, spi->bits_per_word);
33345 +
33346 +       return 0;
33347 +}
33348 +
33349 +static int glamo_spi_probe(struct platform_device *pdev)
33350 +{
33351 +       struct spi_master *master;
33352 +       struct glamo_spi *sp;
33353 +       int ret;
33354 +       int i;
33355 +
33356 +       master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spi));
33357 +       if (master == NULL) {
33358 +               dev_err(&pdev->dev, "failed to allocate spi master\n");
33359 +               ret = -ENOMEM;
33360 +               goto err;
33361 +       }
33362 +
33363 +       sp = spi_master_get_devdata(master);
33364 +       memset(sp, 0, sizeof(struct glamo_spi));
33365 +
33366 +       sp->master = spi_master_get(master);
33367 +       sp->info = pdev->dev.platform_data;
33368 +       if (!sp->info) {
33369 +               dev_err(&pdev->dev, "can't operate without platform data\n");
33370 +               ret = -EIO;
33371 +               goto err_no_pdev;
33372 +       }
33373 +       dev_dbg(&pdev->dev, "sp->info(pdata) = %p\n", sp->info);
33374 +
33375 +       sp->dev = &pdev->dev;
33376 +
33377 +       platform_set_drvdata(pdev, sp);
33378 +
33379 +       sp->bitbang.master = sp->master;
33380 +       sp->bitbang.setup_transfer = glamo_spi_setupxfer;
33381 +       sp->bitbang.chipselect = glamo_spi_chipsel;
33382 +       sp->bitbang.txrx_bufs = glamo_spi_txrx;
33383 +       sp->bitbang.master->setup = glamo_spi_setup;
33384 +
33385 +       ret = spi_bitbang_start(&sp->bitbang);
33386 +       if (ret)
33387 +               goto err_no_bitbang;
33388 +
33389 +       /* register the chips to go with the board */
33390 +
33391 +       glamofb_cmd_mode(sp->info->glamofb_handle, 1);
33392 +
33393 +       for (i = 0; i < sp->info->board_size; i++) {
33394 +               dev_info(&pdev->dev, "registering %p: %s\n",
33395 +                        &sp->info->board_info[i],
33396 +                        sp->info->board_info[i].modalias);
33397 +
33398 +               sp->info->board_info[i].controller_data = sp;
33399 +               spi_new_device(master, sp->info->board_info + i);
33400 +       }
33401 +
33402 +       return 0;
33403 +
33404 +err_no_bitbang:
33405 +       platform_set_drvdata(pdev, NULL);
33406 +err_no_pdev:
33407 +       spi_master_put(sp->bitbang.master);
33408 +err:
33409 +       return ret;
33410 +
33411 +}
33412 +
33413 +static int glamo_spi_remove(struct platform_device *pdev)
33414 +{
33415 +       struct glamo_spi *sp = platform_get_drvdata(pdev);
33416 +
33417 +       spi_bitbang_stop(&sp->bitbang);
33418 +       spi_master_put(sp->bitbang.master);
33419 +
33420 +       return 0;
33421 +}
33422 +
33423 +#define glamo_spi_suspend NULL
33424 +#define glamo_spi_resume NULL
33425 +
33426 +static struct platform_driver glamo_spi_drv = {
33427 +       .probe          = glamo_spi_probe,
33428 +       .remove         = glamo_spi_remove,
33429 +       .suspend        = glamo_spi_suspend,
33430 +       .resume         = glamo_spi_resume,
33431 +       .driver         = {
33432 +               .name   = "glamo-lcm-spi",
33433 +               .owner  = THIS_MODULE,
33434 +       },
33435 +};
33436 +
33437 +static int __init glamo_spi_init(void)
33438 +{
33439 +       return platform_driver_register(&glamo_spi_drv);
33440 +}
33441 +
33442 +static void __exit glamo_spi_exit(void)
33443 +{
33444 +       platform_driver_unregister(&glamo_spi_drv);
33445 +}
33446 +
33447 +module_init(glamo_spi_init);
33448 +module_exit(glamo_spi_exit);
33449 +
33450 +MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver");
33451 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>")
33452 +MODULE_LICENSE("GPL");
33453 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.c
33454 ===================================================================
33455 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
33456 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.c        2008-12-11 22:46:49.000000000 +0100
33457 @@ -0,0 +1,1062 @@
33458 +/*
33459 + *  linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
33460 + *
33461 + *  Copyright (C) 2007 Openmoko, Inc,  Andy Green <andy@openmoko.com>
33462 + *  Based on S3C MMC driver that was:
33463 + *  Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
33464 + *
33465 + * This program is free software; you can redistribute it and/or modify
33466 + * it under the terms of the GNU General Public License version 2 as
33467 + * published by the Free Software Foundation.
33468 + */
33469 +
33470 +#include <linux/module.h>
33471 +#include <linux/dma-mapping.h>
33472 +#include <linux/clk.h>
33473 +#include <linux/mmc/mmc.h>
33474 +#include <linux/mmc/host.h>
33475 +#include <linux/platform_device.h>
33476 +#include <linux/irq.h>
33477 +#include <linux/pcf50633.h>
33478 +#include <linux/delay.h>
33479 +#include <linux/interrupt.h>
33480 +#include <linux/spinlock.h>
33481 +
33482 +#include <asm/dma.h>
33483 +#include <asm/dma-mapping.h>
33484 +#include <asm/io.h>
33485 +
33486 +#include "glamo-mci.h"
33487 +#include "glamo-core.h"
33488 +#include "glamo-regs.h"
33489 +
33490 +/* from glamo-core.c */
33491 +extern struct glamo_mci_pdata glamo_mci_def_pdata;
33492 +
33493 +static spinlock_t clock_lock;
33494 +
33495 +#define DRIVER_NAME "glamo-mci"
33496 +#define RESSIZE(ressource) (((ressource)->end - (ressource)->start) + 1)
33497 +
33498 +static void glamo_mci_send_request(struct mmc_host *mmc);
33499 +
33500 +/*
33501 + * Max SD clock rate
33502 + *
33503 + * held at /(3 + 1) due to concerns of 100R recommended series resistor
33504 + * allows 16MHz @ 4-bit --> 8MBytes/sec raw
33505 + *
33506 + * you can override this on kernel commandline using
33507 + *
33508 + *   glamo_mci.sd_max_clk=10000000
33509 + *
33510 + * for example
33511 + */
33512 +
33513 +static int sd_max_clk = 50000000 / 3;
33514 +module_param(sd_max_clk, int, 0644);
33515 +
33516 +/*
33517 + * Slow SD clock rate
33518 + *
33519 + * you can override this on kernel commandline using
33520 + *
33521 + *   glamo_mci.sd_slow_ratio=8
33522 + *
33523 + * for example
33524 + *
33525 + * platform callback is used to decide effective clock rate, if not
33526 + * defined then max is used, if defined and returns nonzero, rate is
33527 + * divided by this factor
33528 + */
33529 +
33530 +static int sd_slow_ratio = 8;
33531 +module_param(sd_slow_ratio, int, 0644);
33532 +
33533 +/*
33534 + * Post-power SD clock rate
33535 + *
33536 + * you can override this on kernel commandline using
33537 + *
33538 + *   glamo_mci.sd_post_power_clock=1000000
33539 + *
33540 + * for example
33541 + *
33542 + * After changing power to card, clock is held at this rate until first bulk
33543 + * transfer completes
33544 + */
33545 +
33546 +static int sd_post_power_clock = 1000000;
33547 +module_param(sd_post_power_clock, int, 0644);
33548 +
33549 +
33550 +/*
33551 + * SD Signal drive strength
33552 + *
33553 + * you can override this on kernel commandline using
33554 + *
33555 + *   glamo_mci.sd_drive=0
33556 + *
33557 + * for example
33558 + */
33559 +
33560 +static int sd_drive;
33561 +module_param(sd_drive, int, 0644);
33562 +
33563 +/*
33564 + * SD allow SD clock to run while idle
33565 + *
33566 + * you can override this on kernel commandline using
33567 + *
33568 + *   glamo_mci.sd_idleclk=0
33569 + *
33570 + * for example
33571 + */
33572 +
33573 +static int sd_idleclk = 0; /* disallow idle clock by default */
33574 +module_param(sd_idleclk, int, 0644);
33575 +
33576 +/* used to stash real idleclk state in suspend: we force it to run in there */
33577 +static int suspend_sd_idleclk;
33578 +
33579 +
33580 +unsigned char CRC7(u8 * pu8, int cnt)
33581 +{
33582 +       u8 crc = 0;
33583 +
33584 +       while (cnt--) {
33585 +               int n;
33586 +               u8 d = *pu8++;
33587 +               for (n = 0; n < 8; n++) {
33588 +                       crc <<= 1;
33589 +                       if ((d & 0x80) ^ (crc & 0x80))
33590 +                               crc ^= 0x09;
33591 +                       d <<= 1;
33592 +               }
33593 +       }
33594 +       return (crc << 1) | 1;
33595 +}
33596 +
33597 +/* these _dly versions account for the dead time rules for reg access */
33598 +static u16 readw_dly(u16 __iomem * pu16)
33599 +{
33600 +       glamo_reg_access_delay();
33601 +       return readw(pu16);
33602 +}
33603 +
33604 +static void writew_dly(u16 val, u16 __iomem * pu16)
33605 +{
33606 +       glamo_reg_access_delay();
33607 +       writew(val, pu16);
33608 +}
33609 +
33610 +static int get_data_buffer(struct glamo_mci_host *host,
33611 +                          volatile u32 *words, volatile u16 **pointer)
33612 +{
33613 +       struct scatterlist *sg;
33614 +
33615 +       *words = 0;
33616 +       *pointer = NULL;
33617 +
33618 +       if (host->pio_active == XFER_NONE)
33619 +               return -EINVAL;
33620 +
33621 +       if ((!host->mrq) || (!host->mrq->data))
33622 +               return -EINVAL;
33623 +
33624 +       if (host->pio_sgptr >= host->mrq->data->sg_len) {
33625 +               dev_dbg(&host->pdev->dev, "no more buffers (%i/%i)\n",
33626 +                     host->pio_sgptr, host->mrq->data->sg_len);
33627 +               return -EBUSY;
33628 +       }
33629 +       sg = &host->mrq->data->sg[host->pio_sgptr];
33630 +
33631 +       *words = sg->length >> 1; /* we are working with a 16-bit data bus */
33632 +       *pointer = page_address(sg_page(sg)) + sg->offset;
33633 +
33634 +       BUG_ON(((long)(*pointer)) & 1);
33635 +
33636 +       host->pio_sgptr++;
33637 +
33638 +       /* dev_info(&host->pdev->dev, "new buffer (%i/%i)\n",
33639 +             host->pio_sgptr, host->mrq->data->sg_len); */
33640 +       return 0;
33641 +}
33642 +
33643 +static void do_pio_read(struct glamo_mci_host *host)
33644 +{
33645 +       int res;
33646 +       u16 __iomem *from_ptr = host->base_data + (RESSIZE(host->mem_data) /
33647 +                                                             sizeof(u16) / 2);
33648 +#ifdef DEBUG
33649 +       u16 * block;
33650 +#endif
33651 +
33652 +       while (1) {
33653 +               res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
33654 +               if (res) {
33655 +                       host->pio_active = XFER_NONE;
33656 +                       host->complete_what = COMPLETION_FINALIZE;
33657 +
33658 +                       dev_dbg(&host->pdev->dev, "pio_read(): "
33659 +                               "complete (no more data).\n");
33660 +                       return;
33661 +               }
33662 +
33663 +               dev_dbg(&host->pdev->dev, "pio_read(): host->pio_words: %d\n",
33664 +                               host->pio_words);
33665 +
33666 +               host->pio_count += host->pio_words << 1;
33667 +
33668 +#ifdef DEBUG
33669 +               block = (u16 *)host->pio_ptr;
33670 +               res = host->pio_words << 1;
33671 +#endif
33672 +               while (host->pio_words--)
33673 +                       *host->pio_ptr++ = *from_ptr++;
33674 +#ifdef DEBUG
33675 +               print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1,
33676 +                              (void *)block, res, 1);
33677 +#endif
33678 +       }
33679 +}
33680 +
33681 +static int do_pio_write(struct glamo_mci_host *host)
33682 +{
33683 +       int res = 0;
33684 +       volatile u16 __iomem *to_ptr = host->base_data;
33685 +       int err = 0;
33686 +
33687 +       dev_dbg(&host->pdev->dev, "pio_write():\n");
33688 +       while (!res) {
33689 +               res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
33690 +               if (res)
33691 +                       continue;
33692 +
33693 +               dev_dbg(&host->pdev->dev, "pio_write():new source: [%i]@[%p]\n",
33694 +                       host->pio_words, host->pio_ptr);
33695 +
33696 +               host->pio_count += host->pio_words << 1;
33697 +               while (host->pio_words--)
33698 +                       writew(*host->pio_ptr++, to_ptr++);
33699 +       }
33700 +
33701 +       dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
33702 +       host->pio_active = XFER_NONE;
33703 +       return err;
33704 +}
33705 +
33706 +static void __glamo_mci_fix_card_div(struct glamo_mci_host *host, int div)
33707 +{
33708 +       unsigned long flags;
33709 +
33710 +       spin_lock_irqsave(&clock_lock, flags);
33711 +
33712 +       if (div < 0) {
33713 +               /* stop clock - remove clock from divider input */
33714 +               writew(readw(glamo_mci_def_pdata.pglamo->base +
33715 +                    GLAMO_REG_CLOCK_GEN5_1) & (~GLAMO_CLOCK_GEN51_EN_DIV_TCLK),
33716 +                    glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
33717 +
33718 +               goto done;
33719 +       }
33720 +
33721 +       if (host->force_slow_during_powerup)
33722 +               div = host->clk_rate / sd_post_power_clock;
33723 +       else
33724 +               if (host->pdata->glamo_mci_use_slow)
33725 +                       if ((host->pdata->glamo_mci_use_slow)())
33726 +                               div = div * sd_slow_ratio;
33727 +
33728 +       if (div > 255)
33729 +               div = 255;
33730 +
33731 +       /*
33732 +        * set the nearest prescaler factor
33733 +        *
33734 +        * register shared with SCLK divisor -- no chance of race because
33735 +        * we don't use sensor interface
33736 +        */
33737 +       writew_dly((readw(glamo_mci_def_pdata.pglamo->base +
33738 +                       GLAMO_REG_CLOCK_GEN8) & 0xff00) | div,
33739 +               glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN8);
33740 +       /* enable clock to divider input */
33741 +       writew_dly(readw(glamo_mci_def_pdata.pglamo->base +
33742 +               GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
33743 +               glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
33744 +
33745 +done:
33746 +       spin_unlock_irqrestore(&clock_lock, flags);
33747 +}
33748 +
33749 +static int __glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq,
33750 +                                                                 int *division)
33751 +{
33752 +       int div = 0;
33753 +       int real_rate = 0;
33754 +
33755 +       if (freq) {
33756 +               /* Set clock */
33757 +               for (div = 0; div < 256; div++) {
33758 +                       real_rate = host->clk_rate / (div + 1);
33759 +                       if (real_rate <= freq)
33760 +                               break;
33761 +               }
33762 +               if (div > 255)
33763 +                       div = 255;
33764 +
33765 +               if (division)
33766 +                       *division = div;
33767 +
33768 +               __glamo_mci_fix_card_div(host, div);
33769 +
33770 +       } else {
33771 +               /* stop clock */
33772 +               if (division)
33773 +                       *division = 0xff;
33774 +
33775 +               if (!sd_idleclk && !host->force_slow_during_powerup)
33776 +                       /* clock off */
33777 +                       __glamo_mci_fix_card_div(host, -1);
33778 +       }
33779 +
33780 +       return real_rate;
33781 +}
33782 +
33783 +static void glamo_mci_irq(unsigned int irq, struct irq_desc *desc)
33784 +{
33785 +       struct glamo_mci_host *host = (struct glamo_mci_host *)
33786 +                                     desc->handler_data;
33787 +       u16 status;
33788 +       struct mmc_command *cmd;
33789 +       unsigned long iflags;
33790 +
33791 +       if (!host)
33792 +               return;
33793 +       if (!host->mrq)
33794 +               return;
33795 +       cmd = host->mrq->cmd;
33796 +       if (!cmd)
33797 +               return;
33798 +
33799 +       spin_lock_irqsave(&host->complete_lock, iflags);
33800 +
33801 +       status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1);
33802 +
33803 +       /* ack this interrupt source */
33804 +       writew(GLAMO_IRQ_MMC,
33805 +              glamo_mci_def_pdata.pglamo->base + GLAMO_REG_IRQ_CLEAR);
33806 +
33807 +       if (status & (GLAMO_STAT1_MMC_RTOUT |
33808 +                     GLAMO_STAT1_MMC_DTOUT))
33809 +               cmd->error = -ETIMEDOUT;
33810 +       if (status & (GLAMO_STAT1_MMC_BWERR |
33811 +                     GLAMO_STAT1_MMC_BRERR))
33812 +               cmd->error = -EILSEQ;
33813 +       if (cmd->error) {
33814 +               dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
33815 +               goto done;
33816 +       }
33817 +
33818 +       /* disable the initial slow start after first bulk transfer */
33819 +       if (host->force_slow_during_powerup)
33820 +               host->force_slow_during_powerup--;
33821 +
33822 +       if (host->pio_active == XFER_READ)
33823 +               do_pio_read(host);
33824 +
33825 +       host->mrq->data->bytes_xfered = host->pio_count;
33826 +       dev_dbg(&host->pdev->dev, "status = 0x%04x count=%d\n",
33827 +                status, host->pio_count);
33828 +
33829 +       /* issue STOP if we have been given one to use */
33830 +       if (host->mrq->stop) {
33831 +               host->cmd_is_stop = 1;
33832 +               glamo_mci_send_request(host->mmc);
33833 +               host->cmd_is_stop = 0;
33834 +       }
33835 +
33836 +       if (!sd_idleclk && !host->force_slow_during_powerup)
33837 +               /* clock off */
33838 +               __glamo_mci_fix_card_div(host, -1);
33839 +
33840 +done:
33841 +       host->complete_what = COMPLETION_NONE;
33842 +       host->mrq = NULL;
33843 +       mmc_request_done(host->mmc, cmd->mrq);
33844 +       spin_unlock_irqrestore(&host->complete_lock, iflags);
33845 +}
33846 +
33847 +static int glamo_mci_send_command(struct glamo_mci_host *host,
33848 +                                 struct mmc_command *cmd)
33849 +{
33850 +       u8 u8a[6];
33851 +       u16 fire = 0;
33852 +
33853 +       /* if we can't do it, reject as busy */
33854 +       if (!readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1) &
33855 +            GLAMO_STAT1_MMC_IDLE) {
33856 +               host->mrq = NULL;
33857 +               cmd->error = -EBUSY;
33858 +               mmc_request_done(host->mmc, host->mrq);
33859 +               return -EBUSY;
33860 +       }
33861 +
33862 +       /* create an array in wire order for CRC computation */
33863 +       u8a[0] = 0x40 | (cmd->opcode & 0x3f);
33864 +       u8a[1] = (u8)(cmd->arg >> 24);
33865 +       u8a[2] = (u8)(cmd->arg >> 16);
33866 +       u8a[3] = (u8)(cmd->arg >> 8);
33867 +       u8a[4] = (u8)cmd->arg;
33868 +       u8a[5] = CRC7(&u8a[0], 5); /* CRC7 on first 5 bytes of packet */
33869 +
33870 +       /* issue the wire-order array including CRC in register order */
33871 +       writew_dly((u8a[4] << 8) | u8a[5], host->base + GLAMO_REG_MMC_CMD_REG1);
33872 +       writew_dly((u8a[2] << 8) | u8a[3], host->base + GLAMO_REG_MMC_CMD_REG2);
33873 +       writew_dly((u8a[0] << 8) | u8a[1], host->base + GLAMO_REG_MMC_CMD_REG3);
33874 +
33875 +       /* command index toggle */
33876 +       fire |= (host->ccnt & 1) << 12;
33877 +
33878 +       /* set type of command */
33879 +       switch (mmc_cmd_type(cmd)) {
33880 +       case MMC_CMD_BC:
33881 +               fire |= GLAMO_FIRE_MMC_CMDT_BNR;
33882 +               break;
33883 +       case MMC_CMD_BCR:
33884 +               fire |= GLAMO_FIRE_MMC_CMDT_BR;
33885 +               break;
33886 +       case MMC_CMD_AC:
33887 +               fire |= GLAMO_FIRE_MMC_CMDT_AND;
33888 +               break;
33889 +       case MMC_CMD_ADTC:
33890 +               fire |= GLAMO_FIRE_MMC_CMDT_AD;
33891 +               break;
33892 +       }
33893 +       /*
33894 +        * if it expects a response, set the type expected
33895 +        *
33896 +        * R1, Length  : 48bit, Normal response
33897 +        * R1b, Length : 48bit, same R1, but added card busy status
33898 +        * R2, Length  : 136bit (really 128 bits with CRC snipped)
33899 +        * R3, Length  : 48bit (OCR register value)
33900 +        * R4, Length  : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
33901 +        * R5, Length  : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
33902 +        * R6, Length  : 48bit (RCA register)
33903 +        * R7, Length  : 48bit (interface condition, VHS(voltage supplied),
33904 +        *                     check pattern, CRC7)
33905 +        */
33906 +       switch (mmc_resp_type(cmd)) {
33907 +       case MMC_RSP_R6: /* same index as R7 and R1 */
33908 +               fire |= GLAMO_FIRE_MMC_RSPT_R1;
33909 +               break;
33910 +       case MMC_RSP_R1B:
33911 +               fire |= GLAMO_FIRE_MMC_RSPT_R1b;
33912 +               break;
33913 +       case MMC_RSP_R2:
33914 +               fire |= GLAMO_FIRE_MMC_RSPT_R2;
33915 +               break;
33916 +       case MMC_RSP_R3:
33917 +               fire |= GLAMO_FIRE_MMC_RSPT_R3;
33918 +               break;
33919 +       /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
33920 +       }
33921 +       /*
33922 +        * From the command index, set up the command class in the host ctrllr
33923 +        *
33924 +        * missing guys present on chip but couldn't figure out how to use yet:
33925 +        *     0x0 "stream read"
33926 +        *     0x9 "cancel running command"
33927 +        */
33928 +       switch (cmd->opcode) {
33929 +       case MMC_READ_SINGLE_BLOCK:
33930 +               fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
33931 +               break;
33932 +       case MMC_SWITCH: /* 64 byte payload */
33933 +       case 0x33: /* observed issued by MCI */
33934 +       case MMC_READ_MULTIPLE_BLOCK:
33935 +               /* we will get an interrupt off this */
33936 +               if (!cmd->mrq->stop)
33937 +                       /* multiblock no stop */
33938 +                       fire |= GLAMO_FIRE_MMC_CC_MBRNS;
33939 +               else
33940 +                        /* multiblock with stop */
33941 +                       fire |= GLAMO_FIRE_MMC_CC_MBRS;
33942 +               break;
33943 +       case MMC_WRITE_BLOCK:
33944 +               fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
33945 +               break;
33946 +       case MMC_WRITE_MULTIPLE_BLOCK:
33947 +               if (cmd->mrq->stop)
33948 +                        /* multiblock with stop */
33949 +                       fire |= GLAMO_FIRE_MMC_CC_MBWS;
33950 +               else
33951 +                        /* multiblock NO stop-- 'RESERVED'? */
33952 +                       fire |= GLAMO_FIRE_MMC_CC_MBWNS;
33953 +               break;
33954 +       case MMC_STOP_TRANSMISSION:
33955 +               fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
33956 +               break;
33957 +       default:
33958 +               fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
33959 +               break;
33960 +       }
33961 +
33962 +       /* always largest timeout */
33963 +       writew(0xfff, host->base + GLAMO_REG_MMC_TIMEOUT);
33964 +
33965 +       /* Generate interrupt on txfer */
33966 +       writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) & 0x3e) |
33967 +                  0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
33968 +                  GLAMO_BASIC_MMC_EN_COMPL_INT | (sd_drive << 6),
33969 +                  host->base + GLAMO_REG_MMC_BASIC);
33970 +
33971 +       /* send the command out on the wire */
33972 +       /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
33973 +       writew_dly(fire, host->base + GLAMO_REG_MMC_CMD_FIRE);
33974 +       cmd->error = 0;
33975 +       return 0;
33976 +}
33977 +
33978 +static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
33979 +                                struct mmc_data *data)
33980 +{
33981 +       /*
33982 +        * the S-Media-internal RAM offset for our MMC buffer
33983 +        * Read is halfway up the buffer and write is at the start
33984 +        */
33985 +       if (data->flags & MMC_DATA_READ) {
33986 +               writew_dly((u16)(GLAMO_FB_SIZE + (RESSIZE(host->mem_data) / 2)),
33987 +                          host->base + GLAMO_REG_MMC_WDATADS1);
33988 +               writew_dly((u16)((GLAMO_FB_SIZE +
33989 +                                       (RESSIZE(host->mem_data) / 2)) >> 16),
33990 +                          host->base + GLAMO_REG_MMC_WDATADS2);
33991 +       } else {
33992 +               writew_dly((u16)GLAMO_FB_SIZE, host->base +
33993 +                                              GLAMO_REG_MMC_RDATADS1);
33994 +               writew_dly((u16)(GLAMO_FB_SIZE >> 16), host->base +
33995 +                                                      GLAMO_REG_MMC_RDATADS2);
33996 +       }
33997 +
33998 +       /* set up the block info */
33999 +       writew_dly(data->blksz, host->base + GLAMO_REG_MMC_DATBLKLEN);
34000 +       writew_dly(data->blocks, host->base + GLAMO_REG_MMC_DATBLKCNT);
34001 +       dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
34002 +                                  data->blksz, data->blocks);
34003 +       host->pio_sgptr = 0;
34004 +       host->pio_words = 0;
34005 +       host->pio_count = 0;
34006 +       host->pio_active = 0;
34007 +       /* if write, prep the write into the shared RAM before the command */
34008 +       if (data->flags & MMC_DATA_WRITE) {
34009 +               host->pio_active = XFER_WRITE;
34010 +               return do_pio_write(host);
34011 +       }
34012 +       host->pio_active = XFER_READ;
34013 +       return 0;
34014 +}
34015 +
34016 +static void glamo_mci_send_request(struct mmc_host *mmc)
34017 +{
34018 +       struct glamo_mci_host *host = mmc_priv(mmc);
34019 +       struct mmc_request *mrq = host->mrq;
34020 +       struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
34021 +       u16 * pu16 = (u16 *)&cmd->resp[0];
34022 +       u16 * reg_resp = (u16 *)(host->base + GLAMO_REG_MMC_CMD_RSP1);
34023 +       u16 status;
34024 +       int n;
34025 +       int timeout = 100000000;
34026 +
34027 +       if (host->suspending) {
34028 +               dev_err(&host->pdev->dev, "faking cmd %d "
34029 +                       "during suspend\n", cmd->opcode);
34030 +               mmc_request_done(mmc, mrq);
34031 +               return;
34032 +       }
34033 +
34034 +       host->ccnt++;
34035 +       /*
34036 +        * somehow 2.6.24 MCI manages to issue MMC_WRITE_BLOCK *without* the
34037 +        * MMC_DATA_WRITE flag, WTF?  Work around the madness.
34038 +        */
34039 +       if (cmd->opcode == MMC_WRITE_BLOCK)
34040 +               if (mrq->data)
34041 +                       mrq->data->flags |= MMC_DATA_WRITE;
34042 +
34043 +        /* this guy has data to read/write? */
34044 +       if ((!host->cmd_is_stop) && cmd->data) {
34045 +               int res;
34046 +               host->dcnt++;
34047 +               res = glamo_mci_prepare_pio(host, cmd->data);
34048 +               if (res) {
34049 +                       cmd->error = -EIO;
34050 +                       cmd->data->error = -EIO;
34051 +                       mmc_request_done(mmc, mrq);
34052 +                       return;
34053 +               }
34054 +       }
34055 +
34056 +       dev_dbg(&host->pdev->dev,"cmd 0x%x, "
34057 +                "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
34058 +                cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
34059 +                cmd->flags);
34060 +
34061 +       /* resume requested clock rate
34062 +        * scale it down by sd_slow_ratio if platform requests it
34063 +        */
34064 +       __glamo_mci_fix_card_div(host, host->clk_div);
34065 +
34066 +       if (glamo_mci_send_command(host, cmd))
34067 +               goto bail;
34068 +       /*
34069 +        * we must spin until response is ready or timed out
34070 +        * -- we don't get interrupts unless there is a bulk rx
34071 +        */
34072 +       do
34073 +               status = readw_dly(host->base + GLAMO_REG_MMC_RB_STAT1);
34074 +       while ((((status >> 15) & 1) != (host->ccnt & 1)) ||
34075 +               (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
34076 +                            GLAMO_STAT1_MMC_RTOUT |
34077 +                            GLAMO_STAT1_MMC_DTOUT |
34078 +                            GLAMO_STAT1_MMC_BWERR |
34079 +                            GLAMO_STAT1_MMC_BRERR))));
34080 +
34081 +       if (status & (GLAMO_STAT1_MMC_RTOUT |
34082 +                     GLAMO_STAT1_MMC_DTOUT))
34083 +               cmd->error = -ETIMEDOUT;
34084 +       if (status & (GLAMO_STAT1_MMC_BWERR |
34085 +                     GLAMO_STAT1_MMC_BRERR))
34086 +               cmd->error = -EILSEQ;
34087 +
34088 +       if (host->cmd_is_stop)
34089 +               goto bail;
34090 +
34091 +       if (cmd->error) {
34092 +               dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
34093 +               goto done;
34094 +       }
34095 +       /*
34096 +        * mangle the response registers in two different exciting
34097 +        * undocumented ways discovered by trial and error
34098 +        */
34099 +       if (mmc_resp_type(cmd) == MMC_RSP_R2)
34100 +               /* grab the response */
34101 +               for (n = 0; n < 8; n++) /* super mangle power 1 */
34102 +                       pu16[n ^ 6] = readw_dly(&reg_resp[n]);
34103 +       else
34104 +               for (n = 0; n < 3; n++) /* super mangle power 2 */
34105 +                       pu16[n] = (readw_dly(&reg_resp[n]) >> 8) |
34106 +                                 (readw_dly(&reg_resp[n + 1]) << 8);
34107 +       /*
34108 +        * if we don't have bulk data to take care of, we're done
34109 +        */
34110 +       if (!cmd->data)
34111 +               goto done;
34112 +       if (!(cmd->data->flags & (MMC_DATA_READ | MMC_DATA_WRITE)))
34113 +               goto done;
34114 +
34115 +       /*
34116 +        * Otherwise can can use the interrupt as async completion --
34117 +        * if there is read data coming, or we wait for write data to complete,
34118 +        * exit without mmc_request_done() as the payload interrupt
34119 +        * will service it
34120 +        */
34121 +       dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
34122 +       /*
34123 +        * if the glamo INT# line isn't wired (*cough* it can happen)
34124 +        * I'm afraid we have to spin on the IRQ status bit and "be
34125 +        * our own INT# line"
34126 +        */
34127 +       if (!glamo_mci_def_pdata.pglamo->irq_works) {
34128 +               /*
34129 +                * we have faith we will get an "interrupt"...
34130 +                * but something insane like suspend problems can mean
34131 +                * we spin here forever, so we timeout after a LONG time
34132 +                */
34133 +               while ((!(readw_dly(glamo_mci_def_pdata.pglamo->base +
34134 +                        GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
34135 +                      (timeout--))
34136 +                       ;
34137 +
34138 +               if (timeout < 0) {
34139 +                       if (cmd->data->error)
34140 +                               cmd->data->error = -ETIMEDOUT;
34141 +                       dev_err(&host->pdev->dev, "Payload timeout\n");
34142 +                       goto bail;
34143 +               }
34144 +
34145 +               /* yay we are an interrupt controller! -- call the ISR
34146 +                * it will stop clock to card
34147 +                */
34148 +               glamo_mci_irq(IRQ_GLAMO(GLAMO_IRQIDX_MMC),
34149 +                             irq_desc + IRQ_GLAMO(GLAMO_IRQIDX_MMC));
34150 +       }
34151 +       return;
34152 +
34153 +done:
34154 +       host->complete_what = COMPLETION_NONE;
34155 +       host->mrq = NULL;
34156 +       mmc_request_done(host->mmc, cmd->mrq);
34157 +bail:
34158 +       if (!sd_idleclk && !host->force_slow_during_powerup)
34159 +               /* stop the clock to card */
34160 +               __glamo_mci_fix_card_div(host, -1);
34161 +}
34162 +
34163 +static void glamo_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
34164 +{
34165 +       struct glamo_mci_host *host = mmc_priv(mmc);
34166 +
34167 +       host->cmd_is_stop = 0;
34168 +       host->mrq = mrq;
34169 +       glamo_mci_send_request(mmc);
34170 +}
34171 +
34172 +static void glamo_mci_reset(struct glamo_mci_host *host)
34173 +{
34174 +       dev_dbg(&host->pdev->dev, "******* glamo_mci_reset\n");
34175 +       /* reset MMC controller */
34176 +       writew_dly(GLAMO_CLOCK_MMC_RESET | GLAMO_CLOCK_MMC_DG_TCLK |
34177 +                  GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
34178 +                  GLAMO_CLOCK_MMC_EN_M9CLK,
34179 +                  glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
34180 +       msleep(1);
34181 +       /* and disable reset */
34182 +       writew_dly(GLAMO_CLOCK_MMC_DG_TCLK |
34183 +                  GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
34184 +                  GLAMO_CLOCK_MMC_EN_M9CLK,
34185 +                  glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
34186 +}
34187 +
34188 +
34189 +static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
34190 +{
34191 +       struct glamo_mci_host *host = mmc_priv(mmc);
34192 +       int n = 0;
34193 +       int div;
34194 +       int powering = 0;
34195 +
34196 +       /* Set power */
34197 +       switch(ios->power_mode) {
34198 +       case MMC_POWER_ON:
34199 +       case MMC_POWER_UP:
34200 +               /*
34201 +                * we should use very slow clock until first bulk
34202 +                * transfer completes OK
34203 +                */
34204 +               host->force_slow_during_powerup = 1;
34205 +
34206 +               if (host->vdd_current != ios->vdd) {
34207 +                       host->pdata->glamo_set_mci_power(ios->power_mode,
34208 +                                                        ios->vdd);
34209 +                       host->vdd_current = ios->vdd;
34210 +               }
34211 +               if (host->power_mode_current == MMC_POWER_OFF) {
34212 +                       glamo_engine_enable(glamo_mci_def_pdata.pglamo,
34213 +                                                             GLAMO_ENGINE_MMC);
34214 +                       powering = 1;
34215 +               }
34216 +               break;
34217 +
34218 +       case MMC_POWER_OFF:
34219 +       default:
34220 +               if (host->power_mode_current == MMC_POWER_OFF)
34221 +                       break;
34222 +               /* never want clocking with dead card */
34223 +               __glamo_mci_fix_card_div(host, -1);
34224 +
34225 +               glamo_engine_disable(glamo_mci_def_pdata.pglamo,
34226 +                                    GLAMO_ENGINE_MMC);
34227 +               host->pdata->glamo_set_mci_power(MMC_POWER_OFF, 0);
34228 +               host->vdd_current = -1;
34229 +               break;
34230 +       }
34231 +       host->power_mode_current = ios->power_mode;
34232 +
34233 +       host->real_rate = __glamo_mci_set_card_clock(host, ios->clock, &div);
34234 +       host->clk_div = div;
34235 +
34236 +       /* after power-up, we are meant to give it >= 74 clocks so it can
34237 +        * initialize itself.  Doubt any modern cards need it but anyway...
34238 +        */
34239 +       if (powering)
34240 +               msleep(1);
34241 +
34242 +       if (!sd_idleclk && !host->force_slow_during_powerup)
34243 +               /* stop the clock to card, because we are idle until transfer */
34244 +               __glamo_mci_fix_card_div(host, -1);
34245 +
34246 +       if ((ios->power_mode == MMC_POWER_ON) ||
34247 +           (ios->power_mode == MMC_POWER_UP)) {
34248 +               dev_info(&host->pdev->dev,
34249 +                       "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
34250 +                       "Bus width=%d\n",(int)ios->vdd,
34251 +                       host->real_rate / 1000, (int)host->clk_div,
34252 +                       ios->clock / 1000, (int)ios->bus_width);
34253 +       } else
34254 +               dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
34255 +
34256 +       /* set bus width */
34257 +       host->bus_width = ios->bus_width;
34258 +       if (host->bus_width == MMC_BUS_WIDTH_4)
34259 +               n = GLAMO_BASIC_MMC_EN_4BIT_DATA;
34260 +       writew_dly((readw_dly(host->base + GLAMO_REG_MMC_BASIC) &
34261 +                                         (~(GLAMO_BASIC_MMC_EN_4BIT_DATA |
34262 +                                            GLAMO_BASIC_MMC_EN_DR_STR0 |
34263 +                                            GLAMO_BASIC_MMC_EN_DR_STR1))) | n |
34264 +                              sd_drive << 6, host->base + GLAMO_REG_MMC_BASIC);
34265 +}
34266 +
34267 +
34268 +/*
34269 + * no physical write protect supported by us
34270 + */
34271 +static int glamo_mci_get_ro(struct mmc_host *mmc)
34272 +{
34273 +       return 0;
34274 +}
34275 +
34276 +static struct mmc_host_ops glamo_mci_ops = {
34277 +       .request        = glamo_mci_request,
34278 +       .set_ios        = glamo_mci_set_ios,
34279 +       .get_ro         = glamo_mci_get_ro,
34280 +};
34281 +
34282 +static int glamo_mci_probe(struct platform_device *pdev)
34283 +{
34284 +       struct mmc_host         *mmc;
34285 +       struct glamo_mci_host   *host;
34286 +       int ret;
34287 +
34288 +       dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
34289 +
34290 +       mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
34291 +       if (!mmc) {
34292 +               ret = -ENOMEM;
34293 +               goto probe_out;
34294 +       }
34295 +
34296 +       host = mmc_priv(mmc);
34297 +       host->mmc = mmc;
34298 +       host->pdev = pdev;
34299 +       host->pdata = &glamo_mci_def_pdata;
34300 +       host->power_mode_current = MMC_POWER_OFF;
34301 +
34302 +       host->complete_what = COMPLETION_NONE;
34303 +       host->pio_active = XFER_NONE;
34304 +
34305 +       spin_lock_init(&host->complete_lock);
34306 +
34307 +       host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
34308 +       if (!host->mem) {
34309 +               dev_err(&pdev->dev,
34310 +                       "failed to get io memory region resouce.\n");
34311 +
34312 +               ret = -ENOENT;
34313 +               goto probe_free_host;
34314 +       }
34315 +
34316 +       host->mem = request_mem_region(host->mem->start,
34317 +               RESSIZE(host->mem), pdev->name);
34318 +
34319 +       if (!host->mem) {
34320 +               dev_err(&pdev->dev, "failed to request io memory region.\n");
34321 +               ret = -ENOENT;
34322 +               goto probe_free_host;
34323 +       }
34324 +
34325 +       host->base = ioremap(host->mem->start, RESSIZE(host->mem));
34326 +       if (!host->base) {
34327 +               dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
34328 +               ret = -EINVAL;
34329 +               goto probe_free_mem_region;
34330 +       }
34331 +
34332 +       /* set the handler for our bit of the shared chip irq register */
34333 +       set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq);
34334 +       /* stash host as our handler's private data */
34335 +       set_irq_data(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
34336 +
34337 +       /* Get ahold of our data buffer we use for data in and out on MMC */
34338 +       host->mem_data = platform_get_resource(pdev, IORESOURCE_MEM, 1);
34339 +       if (!host->mem_data) {
34340 +               dev_err(&pdev->dev,
34341 +                       "failed to get io memory region resource.\n");
34342 +               ret = -ENOENT;
34343 +               goto probe_iounmap;
34344 +       }
34345 +
34346 +       host->mem_data = request_mem_region(host->mem_data->start,
34347 +               RESSIZE(host->mem_data), pdev->name);
34348 +
34349 +       if (!host->mem_data) {
34350 +               dev_err(&pdev->dev, "failed to request io memory region.\n");
34351 +               ret = -ENOENT;
34352 +               goto probe_iounmap;
34353 +       }
34354 +       host->base_data = ioremap(host->mem_data->start,
34355 +                                         RESSIZE(host->mem_data));
34356 +       host->data_max_size = RESSIZE(host->mem_data);
34357 +
34358 +       if (host->base_data == 0) {
34359 +               dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
34360 +               ret = -EINVAL;
34361 +               goto probe_free_mem_region_data;
34362 +       }
34363 +
34364 +       host->vdd_current = 0;
34365 +       host->clk_rate = 50000000; /* really it's 49152000 */
34366 +       host->clk_div = 16;
34367 +
34368 +       /* explain our host controller capabilities */
34369 +       mmc->ops        = &glamo_mci_ops;
34370 +       mmc->ocr_avail  = host->pdata->ocr_avail;
34371 +       mmc->caps       = MMC_CAP_4_BIT_DATA |
34372 +                         MMC_CAP_MULTIWRITE |
34373 +                         MMC_CAP_MMC_HIGHSPEED |
34374 +                         MMC_CAP_SD_HIGHSPEED;
34375 +       mmc->f_min      = host->clk_rate / 256;
34376 +       mmc->f_max      = sd_max_clk;
34377 +
34378 +       mmc->max_blk_count      = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
34379 +       mmc->max_blk_size       = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
34380 +       mmc->max_req_size       = RESSIZE(host->mem_data) / 2;
34381 +       mmc->max_seg_size       = mmc->max_req_size;
34382 +       mmc->max_phys_segs      = 1; /* hw doesn't talk about segs??? */
34383 +       mmc->max_hw_segs        = 1;
34384 +
34385 +       dev_info(&host->pdev->dev, "probe: mapped mci_base:%p irq:%u.\n",
34386 +               host->base, host->irq);
34387 +
34388 +       if ((ret = mmc_add_host(mmc))) {
34389 +               dev_err(&pdev->dev, "failed to add mmc host.\n");
34390 +               goto probe_free_mem_region_data;
34391 +       }
34392 +
34393 +       platform_set_drvdata(pdev, mmc);
34394 +
34395 +       dev_info(&pdev->dev,"initialisation done.\n");
34396 +       return 0;
34397 +
34398 + probe_free_mem_region_data:
34399 +       release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
34400 +
34401 + probe_iounmap:
34402 +       iounmap(host->base);
34403 +
34404 + probe_free_mem_region:
34405 +       release_mem_region(host->mem->start, RESSIZE(host->mem));
34406 +
34407 + probe_free_host:
34408 +       mmc_free_host(mmc);
34409 + probe_out:
34410 +       return ret;
34411 +}
34412 +
34413 +static int glamo_mci_remove(struct platform_device *pdev)
34414 +{
34415 +       struct mmc_host         *mmc  = platform_get_drvdata(pdev);
34416 +       struct glamo_mci_host   *host = mmc_priv(mmc);
34417 +
34418 +       mmc_remove_host(mmc);
34419 +       /* stop using our handler, revert it to default */
34420 +       set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), handle_level_irq);
34421 +       iounmap(host->base);
34422 +       iounmap(host->base_data);
34423 +       release_mem_region(host->mem->start, RESSIZE(host->mem));
34424 +       release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
34425 +       mmc_free_host(mmc);
34426 +
34427 +       glamo_engine_disable(glamo_mci_def_pdata.pglamo, GLAMO_ENGINE_MMC);
34428 +       return 0;
34429 +}
34430 +
34431 +
34432 +#ifdef CONFIG_PM
34433 +
34434 +static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
34435 +{
34436 +       struct mmc_host *mmc = platform_get_drvdata(dev);
34437 +       struct glamo_mci_host   *host = mmc_priv(mmc);
34438 +       int ret;
34439 +
34440 +       /*
34441 +        * possible workaround for SD corruption during suspend - resume
34442 +        * make sure the clock was running during suspend and consequently
34443 +        * resume
34444 +        */
34445 +       __glamo_mci_fix_card_div(host, host->clk_div);
34446 +
34447 +       /* we are going to do more commands to override this in
34448 +        * mmc_suspend_host(), so we need to change sd_idleclk for the
34449 +        * duration as well
34450 +        */
34451 +       suspend_sd_idleclk = sd_idleclk;
34452 +       sd_idleclk = 1;
34453 +
34454 +       host->suspending++;
34455 +       if (host->pdata->mci_all_dependencies_resumed)
34456 +               (host->pdata->mci_suspending)(dev);
34457 +
34458 +       ret = mmc_suspend_host(mmc, state);
34459 +
34460 +       /* so that when we resume, we use any modified max rate */
34461 +       mmc->f_max = sd_max_clk;
34462 +
34463 +       return ret;
34464 +}
34465 +
34466 +int glamo_mci_resume(struct platform_device *dev)
34467 +{
34468 +       struct mmc_host *mmc = platform_get_drvdata(dev);
34469 +       struct glamo_mci_host   *host = mmc_priv(mmc);
34470 +       int ret;
34471 +
34472 +       if (host->pdata->mci_all_dependencies_resumed)
34473 +               if (!(host->pdata->mci_all_dependencies_resumed)(dev))
34474 +                       return 0;
34475 +
34476 +       host->suspending--;
34477 +
34478 +       ret = mmc_resume_host(mmc);
34479 +
34480 +       /* put sd_idleclk back to pre-suspend state */
34481 +       sd_idleclk = suspend_sd_idleclk;
34482 +
34483 +       return ret;
34484 +}
34485 +EXPORT_SYMBOL_GPL(glamo_mci_resume);
34486 +
34487 +#else /* CONFIG_PM */
34488 +#define glamo_mci_suspend NULL
34489 +#define glamo_mci_resume NULL
34490 +#endif /* CONFIG_PM */
34491 +
34492 +
34493 +static struct platform_driver glamo_mci_driver =
34494 +{
34495 +       .driver.name    = "glamo-mci",
34496 +       .probe          = glamo_mci_probe,
34497 +       .remove         = glamo_mci_remove,
34498 +       .suspend        = glamo_mci_suspend,
34499 +       .resume         = glamo_mci_resume,
34500 +};
34501 +
34502 +static int __init glamo_mci_init(void)
34503 +{
34504 +       spin_lock_init(&clock_lock);
34505 +       platform_driver_register(&glamo_mci_driver);
34506 +       return 0;
34507 +}
34508 +
34509 +static void __exit glamo_mci_exit(void)
34510 +{
34511 +       platform_driver_unregister(&glamo_mci_driver);
34512 +}
34513 +
34514 +module_init(glamo_mci_init);
34515 +module_exit(glamo_mci_exit);
34516 +
34517 +MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
34518 +MODULE_LICENSE("GPL");
34519 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
34520 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.h
34521 ===================================================================
34522 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
34523 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-mci.h        2008-12-11 22:46:49.000000000 +0100
34524 @@ -0,0 +1,80 @@
34525 +/*
34526 + *  linux/drivers/mmc/host/glamo-mmc.h - GLAMO MCI driver
34527 + *
34528 + *  Copyright (C) 2007-2008 Openmoko, Inc, Andy Green <andy@openmoko.com>
34529 + *   based on S3C MMC driver -->
34530 + *  Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
34531 + *
34532 + * This program is free software; you can redistribute it and/or modify
34533 + * it under the terms of the GNU General Public License version 2 as
34534 + * published by the Free Software Foundation.
34535 + */
34536 +
34537 +
34538 +enum glamo_mci_waitfor {
34539 +       COMPLETION_NONE,
34540 +       COMPLETION_FINALIZE,
34541 +       COMPLETION_CMDSENT,
34542 +       COMPLETION_RSPFIN,
34543 +       COMPLETION_XFERFINISH,
34544 +       COMPLETION_XFERFINISH_RSPFIN,
34545 +};
34546 +
34547 +struct glamo_mci_host {
34548 +       struct platform_device  *pdev;
34549 +       struct glamo_mci_pdata  *pdata;
34550 +       struct mmc_host         *mmc;
34551 +       struct resource         *mem;
34552 +       struct resource         *mem_data;
34553 +       struct clk              *clk;
34554 +       void __iomem            *base;
34555 +       u16 __iomem             *base_data;
34556 +       int                     irq;
34557 +       int                     irq_cd;
34558 +       int                     dma;
34559 +       int                     data_max_size;
34560 +
34561 +       int                     suspending;
34562 +
34563 +       int                     power_mode_current;
34564 +       unsigned int            vdd_current;
34565 +
34566 +       unsigned long           clk_rate;
34567 +       unsigned long           clk_div;
34568 +       unsigned long           real_rate;
34569 +       u8                      prescaler;
34570 +
34571 +       int                     force_slow_during_powerup;
34572 +
34573 +       unsigned                sdiimsk;
34574 +       int                     dodma;
34575 +
34576 +       volatile int            dmatogo;
34577 +
34578 +       struct mmc_request      *mrq;
34579 +       int                     cmd_is_stop;
34580 +
34581 +       spinlock_t              complete_lock;
34582 +       volatile enum glamo_mci_waitfor
34583 +                               complete_what;
34584 +
34585 +       volatile int            dma_complete;
34586 +
34587 +       volatile u32            pio_sgptr;
34588 +       volatile u32            pio_words;
34589 +       volatile u32            pio_count;
34590 +       volatile u16            *pio_ptr;
34591 +#define XFER_NONE 0
34592 +#define XFER_READ 1
34593 +#define XFER_WRITE 2
34594 +       volatile u32            pio_active;
34595 +
34596 +       int                     bus_width;
34597 +
34598 +       char                    dbgmsg_cmd[301];
34599 +       char                    dbgmsg_dat[301];
34600 +       volatile char           *status;
34601 +
34602 +       unsigned int            ccnt, dcnt;
34603 +       struct tasklet_struct   pio_tasklet;
34604 +};
34605 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-regs.h
34606 ===================================================================
34607 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
34608 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-regs.h       2008-12-11 22:46:49.000000000 +0100
34609 @@ -0,0 +1,632 @@
34610 +#ifndef _GLAMO_REGS_H
34611 +#define _GLAMO_REGS_H
34612 +
34613 +/* Smedia Glamo 336x/337x driver
34614 + *
34615 + * (C) 2007 by Openmoko, Inc.
34616 + * Author: Harald Welte <laforge@openmoko.org>
34617 + * All rights reserved.
34618 + *
34619 + * This program is free software; you can redistribute it and/or
34620 + * modify it under the terms of the GNU General Public License as
34621 + * published by the Free Software Foundation; either version 2 of
34622 + * the License, or (at your option) any later version.
34623 + *
34624 + * This program is distributed in the hope that it will be useful,
34625 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
34626 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
34627 + * GNU General Public License for more details.
34628 + *
34629 + * You should have received a copy of the GNU General Public License
34630 + * along with this program; if not, write to the Free Software
34631 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34632 + * MA 02111-1307 USA
34633 + */
34634 +
34635 +enum glamo_regster_offsets {
34636 +       GLAMO_REGOFS_GENERIC    = 0x0000,
34637 +       GLAMO_REGOFS_HOSTBUS    = 0x0200,
34638 +       GLAMO_REGOFS_MEMORY     = 0x0300,
34639 +       GLAMO_REGOFS_VIDCAP     = 0x0400,
34640 +       GLAMO_REGOFS_ISP        = 0x0500,
34641 +       GLAMO_REGOFS_JPEG       = 0x0800,
34642 +       GLAMO_REGOFS_MPEG       = 0x0c00,
34643 +       GLAMO_REGOFS_LCD        = 0x1100,
34644 +       GLAMO_REGOFS_MMC        = 0x1400,
34645 +       GLAMO_REGOFS_MPROC0     = 0x1500,
34646 +       GLAMO_REGOFS_MPROC1     = 0x1580,
34647 +       GLAMO_REGOFS_CMDQUEUE   = 0x1600,
34648 +       GLAMO_REGOFS_RISC       = 0x1680,
34649 +       GLAMO_REGOFS_2D         = 0x1700,
34650 +       GLAMO_REGOFS_3D         = 0x1b00,
34651 +       GLAMO_REGOFS_END        = 0x2400,
34652 +};
34653 +
34654 +
34655 +enum glamo_register_generic {
34656 +       GLAMO_REG_GCONF1        = 0x0000,
34657 +       GLAMO_REG_GCONF2        = 0x0002,
34658 +#define        GLAMO_REG_DEVICE_ID     GLAMO_REG_GCONF2
34659 +       GLAMO_REG_GCONF3        = 0x0004,
34660 +#define        GLAMO_REG_REVISION_ID   GLAMO_REG_GCONF3
34661 +       GLAMO_REG_IRQ_GEN1      = 0x0006,
34662 +#define GLAMO_REG_IRQ_ENABLE   GLAMO_REG_IRQ_GEN1
34663 +       GLAMO_REG_IRQ_GEN2      = 0x0008,
34664 +#define GLAMO_REG_IRQ_SET      GLAMO_REG_IRQ_GEN2
34665 +       GLAMO_REG_IRQ_GEN3      = 0x000a,
34666 +#define GLAMO_REG_IRQ_CLEAR    GLAMO_REG_IRQ_GEN3
34667 +       GLAMO_REG_IRQ_GEN4      = 0x000c,
34668 +#define GLAMO_REG_IRQ_STATUS   GLAMO_REG_IRQ_GEN4
34669 +       GLAMO_REG_CLOCK_HOST    = 0x0010,
34670 +       GLAMO_REG_CLOCK_MEMORY  = 0x0012,
34671 +       GLAMO_REG_CLOCK_LCD     = 0x0014,
34672 +       GLAMO_REG_CLOCK_MMC     = 0x0016,
34673 +       GLAMO_REG_CLOCK_ISP     = 0x0018,
34674 +       GLAMO_REG_CLOCK_JPEG    = 0x001a,
34675 +       GLAMO_REG_CLOCK_3D      = 0x001c,
34676 +       GLAMO_REG_CLOCK_2D      = 0x001e,
34677 +       GLAMO_REG_CLOCK_RISC1   = 0x0020,       /* 3365 only? */
34678 +       GLAMO_REG_CLOCK_RISC2   = 0x0022,       /* 3365 only? */
34679 +       GLAMO_REG_CLOCK_MPEG    = 0x0024,
34680 +       GLAMO_REG_CLOCK_MPROC   = 0x0026,
34681 +
34682 +       GLAMO_REG_CLOCK_GEN5_1  = 0x0030,
34683 +       GLAMO_REG_CLOCK_GEN5_2  = 0x0032,
34684 +       GLAMO_REG_CLOCK_GEN6    = 0x0034,
34685 +       GLAMO_REG_CLOCK_GEN7    = 0x0036,
34686 +       GLAMO_REG_CLOCK_GEN8    = 0x0038,
34687 +       GLAMO_REG_CLOCK_GEN9    = 0x003a,
34688 +       GLAMO_REG_CLOCK_GEN10   = 0x003c,
34689 +       GLAMO_REG_CLOCK_GEN11   = 0x003e,
34690 +       GLAMO_REG_PLL_GEN1      = 0x0040,
34691 +       GLAMO_REG_PLL_GEN2      = 0x0042,
34692 +       GLAMO_REG_PLL_GEN3      = 0x0044,
34693 +       GLAMO_REG_PLL_GEN4      = 0x0046,
34694 +       GLAMO_REG_PLL_GEN5      = 0x0048,
34695 +       GLAMO_REG_GPIO_GEN1     = 0x0050,
34696 +       GLAMO_REG_GPIO_GEN2     = 0x0052,
34697 +       GLAMO_REG_GPIO_GEN3     = 0x0054,
34698 +       GLAMO_REG_GPIO_GEN4     = 0x0056,
34699 +       GLAMO_REG_GPIO_GEN5     = 0x0058,
34700 +       GLAMO_REG_GPIO_GEN6     = 0x005a,
34701 +       GLAMO_REG_GPIO_GEN7     = 0x005c,
34702 +       GLAMO_REG_GPIO_GEN8     = 0x005e,
34703 +       GLAMO_REG_GPIO_GEN9     = 0x0060,
34704 +       GLAMO_REG_GPIO_GEN10    = 0x0062,
34705 +       GLAMO_REG_DFT_GEN1      = 0x0070,
34706 +       GLAMO_REG_DFT_GEN2      = 0x0072,
34707 +       GLAMO_REG_DFT_GEN3      = 0x0074,
34708 +       GLAMO_REG_DFT_GEN4      = 0x0076,
34709 +
34710 +       GLAMO_REG_DFT_GEN5      = 0x01e0,
34711 +       GLAMO_REG_DFT_GEN6      = 0x01f0,
34712 +};
34713 +
34714 +#define GLAMO_REG_HOSTBUS(x)   (GLAMO_REGOFS_HOSTBUS-2+(x*2))
34715 +
34716 +#define REG_MEM(x)             (GLAMO_REGOFS_MEMORY+(x))
34717 +#define GLAMO_REG_MEM_TIMING(x)        (GLAMO_REG_MEM_TIMING1-2+(x*2))
34718 +
34719 +enum glamo_register_mem {
34720 +       GLAMO_REG_MEM_TYPE      = REG_MEM(0x00),
34721 +       GLAMO_REG_MEM_GEN       = REG_MEM(0x02),
34722 +       GLAMO_REG_MEM_TIMING1   = REG_MEM(0x04),
34723 +       GLAMO_REG_MEM_TIMING2   = REG_MEM(0x06),
34724 +       GLAMO_REG_MEM_TIMING3   = REG_MEM(0x08),
34725 +       GLAMO_REG_MEM_TIMING4   = REG_MEM(0x0a),
34726 +       GLAMO_REG_MEM_TIMING5   = REG_MEM(0x0c),
34727 +       GLAMO_REG_MEM_TIMING6   = REG_MEM(0x0e),
34728 +       GLAMO_REG_MEM_TIMING7   = REG_MEM(0x10),
34729 +       GLAMO_REG_MEM_TIMING8   = REG_MEM(0x12),
34730 +       GLAMO_REG_MEM_TIMING9   = REG_MEM(0x14),
34731 +       GLAMO_REG_MEM_TIMING10  = REG_MEM(0x16),
34732 +       GLAMO_REG_MEM_TIMING11  = REG_MEM(0x18),
34733 +       GLAMO_REG_MEM_POWER1    = REG_MEM(0x1a),
34734 +       GLAMO_REG_MEM_POWER2    = REG_MEM(0x1c),
34735 +       GLAMO_REG_MEM_LCD_BUF1  = REG_MEM(0x1e),
34736 +       GLAMO_REG_MEM_LCD_BUF2  = REG_MEM(0x20),
34737 +       GLAMO_REG_MEM_LCD_BUF3  = REG_MEM(0x22),
34738 +       GLAMO_REG_MEM_LCD_BUF4  = REG_MEM(0x24),
34739 +       GLAMO_REG_MEM_BIST1     = REG_MEM(0x26),
34740 +       GLAMO_REG_MEM_BIST2     = REG_MEM(0x28),
34741 +       GLAMO_REG_MEM_BIST3     = REG_MEM(0x2a),
34742 +       GLAMO_REG_MEM_BIST4     = REG_MEM(0x2c),
34743 +       GLAMO_REG_MEM_BIST5     = REG_MEM(0x2e),
34744 +       GLAMO_REG_MEM_MAH1      = REG_MEM(0x30),
34745 +       GLAMO_REG_MEM_MAH2      = REG_MEM(0x32),
34746 +       GLAMO_REG_MEM_DRAM1     = REG_MEM(0x34),
34747 +       GLAMO_REG_MEM_DRAM2     = REG_MEM(0x36),
34748 +       GLAMO_REG_MEM_CRC       = REG_MEM(0x38),
34749 +};
34750 +
34751 +#define GLAMO_MEM_TYPE_MASK    0x03
34752 +
34753 +enum glamo_reg_mem_dram1 {
34754 +       /* b0 - b10 == refresh period, 1 -> 2048 clocks */
34755 +       GLAMO_MEM_DRAM1_EN_GATE_CLK     = (1 << 11),
34756 +       GLAMO_MEM_DRAM1_SELF_REFRESH    = (1 << 12),
34757 +       GLAMO_MEM_DRAM1_EN_GATE_CKE     = (1 << 13),
34758 +       GLAMO_MEM_DRAM1_EN_DRAM_REFRESH = (1 << 14),
34759 +       GLAMO_MEM_DRAM1_EN_MODEREG_SET  = (1 << 15),
34760 +};
34761 +
34762 +enum glamo_reg_mem_dram2 {
34763 +       GLAMO_MEM_DRAM2_DEEP_PWRDOWN    = (1 << 12),
34764 +};
34765 +
34766 +enum glamo_irq_index {
34767 +       GLAMO_IRQIDX_HOSTBUS    = 0,
34768 +       GLAMO_IRQIDX_JPEG       = 1,
34769 +       GLAMO_IRQIDX_MPEG       = 2,
34770 +       GLAMO_IRQIDX_MPROC1     = 3,
34771 +       GLAMO_IRQIDX_MPROC0     = 4,
34772 +       GLAMO_IRQIDX_CMDQUEUE   = 5,
34773 +       GLAMO_IRQIDX_2D         = 6,
34774 +       GLAMO_IRQIDX_MMC        = 7,
34775 +       GLAMO_IRQIDX_RISC       = 8,
34776 +};
34777 +
34778 +enum glamo_irq {
34779 +       GLAMO_IRQ_HOSTBUS       = (1 << GLAMO_IRQIDX_HOSTBUS),
34780 +       GLAMO_IRQ_JPEG          = (1 << GLAMO_IRQIDX_JPEG),
34781 +       GLAMO_IRQ_MPEG          = (1 << GLAMO_IRQIDX_MPEG),
34782 +       GLAMO_IRQ_MPROC1        = (1 << GLAMO_IRQIDX_MPROC1),
34783 +       GLAMO_IRQ_MPROC0        = (1 << GLAMO_IRQIDX_MPROC0),
34784 +       GLAMO_IRQ_CMDQUEUE      = (1 << GLAMO_IRQIDX_CMDQUEUE),
34785 +       GLAMO_IRQ_2D            = (1 << GLAMO_IRQIDX_2D),
34786 +       GLAMO_IRQ_MMC           = (1 << GLAMO_IRQIDX_MMC),
34787 +       GLAMO_IRQ_RISC          = (1 << GLAMO_IRQIDX_RISC),
34788 +};
34789 +
34790 +enum glamo_reg_clock_host {
34791 +       GLAMO_CLOCK_HOST_DG_BCLK        = 0x0001,
34792 +       GLAMO_CLOCK_HOST_DG_M0CLK       = 0x0004,
34793 +       GLAMO_CLOCK_HOST_RESET          = 0x1000,
34794 +};
34795 +
34796 +enum glamo_reg_clock_mem {
34797 +       GLAMO_CLOCK_MEM_DG_M1CLK        = 0x0001,
34798 +       GLAMO_CLOCK_MEM_EN_M1CLK        = 0x0002,
34799 +       GLAMO_CLOCK_MEM_DG_MOCACLK      = 0x0004,
34800 +       GLAMO_CLOCK_MEM_EN_MOCACLK      = 0x0008,
34801 +       GLAMO_CLOCK_MEM_RESET           = 0x1000,
34802 +       GLAMO_CLOCK_MOCA_RESET          = 0x2000,
34803 +};
34804 +
34805 +enum glamo_reg_clock_lcd {
34806 +       GLAMO_CLOCK_LCD_DG_DCLK         = 0x0001,
34807 +       GLAMO_CLOCK_LCD_EN_DCLK         = 0x0002,
34808 +       GLAMO_CLOCK_LCD_DG_DMCLK        = 0x0004,
34809 +       GLAMO_CLOCK_LCD_EN_DMCLK        = 0x0008,
34810 +       //
34811 +       GLAMO_CLOCK_LCD_EN_DHCLK        = 0x0020,
34812 +       GLAMO_CLOCK_LCD_DG_M5CLK        = 0x0040,
34813 +       GLAMO_CLOCK_LCD_EN_M5CLK        = 0x0080,
34814 +       GLAMO_CLOCK_LCD_RESET           = 0x1000,
34815 +};
34816 +
34817 +enum glamo_reg_clock_mmc {
34818 +       GLAMO_CLOCK_MMC_DG_TCLK         = 0x0001,
34819 +       GLAMO_CLOCK_MMC_EN_TCLK         = 0x0002,
34820 +       GLAMO_CLOCK_MMC_DG_M9CLK        = 0x0004,
34821 +       GLAMO_CLOCK_MMC_EN_M9CLK        = 0x0008,
34822 +       GLAMO_CLOCK_MMC_RESET           = 0x1000,
34823 +};
34824 +
34825 +enum glamo_reg_basic_mmc {
34826 +       /* set to disable CRC error rejection */
34827 +       GLAMO_BASIC_MMC_DISABLE_CRC     = 0x0001,
34828 +       /* enable completion interrupt */
34829 +       GLAMO_BASIC_MMC_EN_COMPL_INT    = 0x0002,
34830 +       /* stop MMC clock while enforced idle waiting for data from card */
34831 +       GLAMO_BASIC_MMC_NO_CLK_RD_WAIT  = 0x0004,
34832 +       /* 0 = 1-bit bus to card, 1 = use 4-bit bus (has to be negotiated) */
34833 +       GLAMO_BASIC_MMC_EN_4BIT_DATA    = 0x0008,
34834 +       /* enable 75K pullups on D3..D0 */
34835 +       GLAMO_BASIC_MMC_EN_DATA_PUPS    = 0x0010,
34836 +       /* enable 75K pullup on CMD */
34837 +       GLAMO_BASIC_MMC_EN_CMD_PUP      = 0x0020,
34838 +       /* IO drive strength 00=weak -> 11=strongest */
34839 +       GLAMO_BASIC_MMC_EN_DR_STR0      = 0x0040,
34840 +       GLAMO_BASIC_MMC_EN_DR_STR1      = 0x0080,
34841 +       /* TCLK delay stage A, 0000 = 500ps --> 1111 = 8ns */
34842 +       GLAMO_BASIC_MMC_EN_TCLK_DLYA0   = 0x0100,
34843 +       GLAMO_BASIC_MMC_EN_TCLK_DLYA1   = 0x0200,
34844 +       GLAMO_BASIC_MMC_EN_TCLK_DLYA2   = 0x0400,
34845 +       GLAMO_BASIC_MMC_EN_TCLK_DLYA3   = 0x0800,
34846 +       /* TCLK delay stage B (cumulative), 0000 = 500ps --> 1111 = 8ns */
34847 +       GLAMO_BASIC_MMC_EN_TCLK_DLYB0   = 0x1000,
34848 +       GLAMO_BASIC_MMC_EN_TCLK_DLYB1   = 0x2000,
34849 +       GLAMO_BASIC_MMC_EN_TCLK_DLYB2   = 0x4000,
34850 +       GLAMO_BASIC_MMC_EN_TCLK_DLYB3   = 0x8000,
34851 +};
34852 +
34853 +enum glamo_reg_stat1_mmc {
34854 +       /* command "counter" (really: toggle) */
34855 +       GLAMO_STAT1_MMC_CMD_CTR = 0x8000,
34856 +       /* engine is idle */
34857 +       GLAMO_STAT1_MMC_IDLE    = 0x4000,
34858 +       /* readback response is ready */
34859 +       GLAMO_STAT1_MMC_RB_RRDY = 0x0200,
34860 +       /* readback data is ready */
34861 +       GLAMO_STAT1_MMC_RB_DRDY = 0x0100,
34862 +       /* no response timeout */
34863 +       GLAMO_STAT1_MMC_RTOUT   = 0x0020,
34864 +       /* no data timeout */
34865 +       GLAMO_STAT1_MMC_DTOUT   = 0x0010,
34866 +       /* CRC error on block write */
34867 +       GLAMO_STAT1_MMC_BWERR   = 0x0004,
34868 +       /* CRC error on block read */
34869 +       GLAMO_STAT1_MMC_BRERR   = 0x0002
34870 +};
34871 +
34872 +enum glamo_reg_fire_mmc {
34873 +       /* command "counter" (really: toggle)
34874 +        * the STAT1 register reflects this so you can ensure you don't look
34875 +        * at status for previous command
34876 +        */
34877 +       GLAMO_FIRE_MMC_CMD_CTR  = 0x8000,
34878 +       /* sets kind of response expected */
34879 +       GLAMO_FIRE_MMC_RES_MASK = 0x0700,
34880 +       /* sets command type */
34881 +       GLAMO_FIRE_MMC_TYP_MASK = 0x00C0,
34882 +       /* sets command class */
34883 +       GLAMO_FIRE_MMC_CLS_MASK = 0x000F,
34884 +};
34885 +
34886 +enum glamo_fire_mmc_response_types {
34887 +       GLAMO_FIRE_MMC_RSPT_R1  = 0x0000,
34888 +       GLAMO_FIRE_MMC_RSPT_R1b = 0x0100,
34889 +       GLAMO_FIRE_MMC_RSPT_R2  = 0x0200,
34890 +       GLAMO_FIRE_MMC_RSPT_R3  = 0x0300,
34891 +       GLAMO_FIRE_MMC_RSPT_R4  = 0x0400,
34892 +       GLAMO_FIRE_MMC_RSPT_R5  = 0x0500,
34893 +};
34894 +
34895 +enum glamo_fire_mmc_command_types {
34896 +       /* broadcast, no response */
34897 +       GLAMO_FIRE_MMC_CMDT_BNR = 0x0000,
34898 +       /* broadcast, with response */
34899 +       GLAMO_FIRE_MMC_CMDT_BR  = 0x0040,
34900 +       /* addressed, no data */
34901 +       GLAMO_FIRE_MMC_CMDT_AND = 0x0080,
34902 +       /* addressed, with data */
34903 +       GLAMO_FIRE_MMC_CMDT_AD  = 0x00C0,
34904 +};
34905 +
34906 +enum glamo_fire_mmc_command_class {
34907 +       /* "Stream Read" */
34908 +       GLAMO_FIRE_MMC_CC_STRR  = 0x0000,
34909 +       /* Single Block Read */
34910 +       GLAMO_FIRE_MMC_CC_SBR   = 0x0001,
34911 +       /* Multiple Block Read With Stop */
34912 +       GLAMO_FIRE_MMC_CC_MBRS  = 0x0002,
34913 +       /* Multiple Block Read No Stop */
34914 +       GLAMO_FIRE_MMC_CC_MBRNS = 0x0003,
34915 +       /* RESERVED for "Stream Write" */
34916 +       GLAMO_FIRE_MMC_CC_STRW  = 0x0004,
34917 +       /* "Stream Write" */
34918 +       GLAMO_FIRE_MMC_CC_SBW   = 0x0005,
34919 +       /* RESERVED for Multiple Block Write With Stop */
34920 +       GLAMO_FIRE_MMC_CC_MBWS  = 0x0006,
34921 +       /* Multiple Block Write No Stop */
34922 +       GLAMO_FIRE_MMC_CC_MBWNS = 0x0007,
34923 +       /* STOP command */
34924 +       GLAMO_FIRE_MMC_CC_STOP  = 0x0008,
34925 +       /* Cancel on Running Command */
34926 +       GLAMO_FIRE_MMC_CC_CANCL = 0x0009,
34927 +       /* "Basic Command" */
34928 +       GLAMO_FIRE_MMC_CC_BASIC = 0x000a,
34929 +};
34930 +
34931 +/* these are offsets from the start of the MMC register region */
34932 +enum glamo_register_mmc {
34933 +       /* MMC command, b15..8 = cmd arg b7..0; b7..1 = CRC; b0 = end bit */
34934 +       GLAMO_REG_MMC_CMD_REG1  = 0x00,
34935 +       /* MMC command, b15..0 = cmd arg b23 .. 8 */
34936 +       GLAMO_REG_MMC_CMD_REG2  = 0x02,
34937 +       /* MMC command, b15=start, b14=transmission,
34938 +        * b13..8=cmd idx, b7..0=cmd arg b31..24
34939 +        */
34940 +       GLAMO_REG_MMC_CMD_REG3  = 0x04,
34941 +       GLAMO_REG_MMC_CMD_FIRE  = 0x06,
34942 +       GLAMO_REG_MMC_CMD_RSP1  = 0x10,
34943 +       GLAMO_REG_MMC_CMD_RSP2  = 0x12,
34944 +       GLAMO_REG_MMC_CMD_RSP3  = 0x14,
34945 +       GLAMO_REG_MMC_CMD_RSP4  = 0x16,
34946 +       GLAMO_REG_MMC_CMD_RSP5  = 0x18,
34947 +       GLAMO_REG_MMC_CMD_RSP6  = 0x1a,
34948 +       GLAMO_REG_MMC_CMD_RSP7  = 0x1c,
34949 +       GLAMO_REG_MMC_CMD_RSP8  = 0x1e,
34950 +       GLAMO_REG_MMC_RB_STAT1  = 0x20,
34951 +       GLAMO_REG_MMC_RB_BLKCNT = 0x22,
34952 +       GLAMO_REG_MMC_RB_BLKLEN = 0x24,
34953 +       GLAMO_REG_MMC_BASIC     = 0x30,
34954 +       GLAMO_REG_MMC_RDATADS1  = 0x34,
34955 +       GLAMO_REG_MMC_RDATADS2  = 0x36,
34956 +       GLAMO_REG_MMC_WDATADS1  = 0x38,
34957 +       GLAMO_REG_MMC_WDATADS2  = 0x3a,
34958 +       GLAMO_REG_MMC_DATBLKCNT = 0x3c,
34959 +       GLAMO_REG_MMC_DATBLKLEN = 0x3e,
34960 +       GLAMO_REG_MMC_TIMEOUT   = 0x40,
34961 +
34962 +};
34963 +
34964 +enum glamo_reg_clock_isp {
34965 +       GLAMO_CLOCK_ISP_DG_I1CLK        = 0x0001,
34966 +       GLAMO_CLOCK_ISP_EN_I1CLK        = 0x0002,
34967 +       GLAMO_CLOCK_ISP_DG_CCLK         = 0x0004,
34968 +       GLAMO_CLOCK_ISP_EN_CCLK         = 0x0008,
34969 +       //
34970 +       GLAMO_CLOCK_ISP_EN_SCLK         = 0x0020,
34971 +       GLAMO_CLOCK_ISP_DG_M2CLK        = 0x0040,
34972 +       GLAMO_CLOCK_ISP_EN_M2CLK        = 0x0080,
34973 +       GLAMO_CLOCK_ISP_DG_M15CLK       = 0x0100,
34974 +       GLAMO_CLOCK_ISP_EN_M15CLK       = 0x0200,
34975 +       GLAMO_CLOCK_ISP1_RESET          = 0x1000,
34976 +       GLAMO_CLOCK_ISP2_RESET          = 0x2000,
34977 +};
34978 +
34979 +enum glamo_reg_clock_jpeg {
34980 +       GLAMO_CLOCK_JPEG_DG_JCLK        = 0x0001,
34981 +       GLAMO_CLOCK_JPEG_EN_JCLK        = 0x0002,
34982 +       GLAMO_CLOCK_JPEG_DG_M3CLK       = 0x0004,
34983 +       GLAMO_CLOCK_JPEG_EN_M3CLK       = 0x0008,
34984 +       GLAMO_CLOCK_JPEG_RESET          = 0x1000,
34985 +};
34986 +
34987 +enum glamo_reg_clock_2d {
34988 +       GLAMO_CLOCK_2D_DG_GCLK          = 0x0001,
34989 +       GLAMO_CLOCK_2D_EN_GCLK          = 0x0002,
34990 +       GLAMO_CLOCK_2D_DG_M7CLK         = 0x0004,
34991 +       GLAMO_CLOCK_2D_EN_M7CLK         = 0x0008,
34992 +       GLAMO_CLOCK_2D_DG_M6CLK         = 0x0010,
34993 +       GLAMO_CLOCK_2D_EN_M6CLK         = 0x0020,
34994 +       GLAMO_CLOCK_2D_RESET            = 0x1000,
34995 +       GLAMO_CLOCK_2D_CQ_RESET         = 0x2000,
34996 +};
34997 +
34998 +enum glamo_reg_clock_3d {
34999 +       GLAMO_CLOCK_3D_DG_ECLK          = 0x0001,
35000 +       GLAMO_CLOCK_3D_EN_ECLK          = 0x0002,
35001 +       GLAMO_CLOCK_3D_DG_RCLK          = 0x0004,
35002 +       GLAMO_CLOCK_3D_EN_RCLK          = 0x0008,
35003 +       GLAMO_CLOCK_3D_DG_M8CLK         = 0x0010,
35004 +       GLAMO_CLOCK_3D_EN_M8CLK         = 0x0020,
35005 +       GLAMO_CLOCK_3D_BACK_RESET       = 0x1000,
35006 +       GLAMO_CLOCK_3D_FRONT_RESET      = 0x2000,
35007 +};
35008 +
35009 +enum glamo_reg_clock_mpeg {
35010 +       GLAMO_CLOCK_MPEG_DG_X0CLK       = 0x0001,
35011 +       GLAMO_CLOCK_MPEG_EN_X0CLK       = 0x0002,
35012 +       GLAMO_CLOCK_MPEG_DG_X1CLK       = 0x0004,
35013 +       GLAMO_CLOCK_MPEG_EN_X1CLK       = 0x0008,
35014 +       GLAMO_CLOCK_MPEG_DG_X2CLK       = 0x0010,
35015 +       GLAMO_CLOCK_MPEG_EN_X2CLK       = 0x0020,
35016 +       GLAMO_CLOCK_MPEG_DG_X3CLK       = 0x0040,
35017 +       GLAMO_CLOCK_MPEG_EN_X3CLK       = 0x0080,
35018 +       GLAMO_CLOCK_MPEG_DG_X4CLK       = 0x0100,
35019 +       GLAMO_CLOCK_MPEG_EN_X4CLK       = 0x0200,
35020 +       GLAMO_CLOCK_MPEG_DG_X6CLK       = 0x0400,
35021 +       GLAMO_CLOCK_MPEG_EN_X6CLK       = 0x0800,
35022 +       GLAMO_CLOCK_MPEG_ENC_RESET      = 0x1000,
35023 +       GLAMO_CLOCK_MPEG_DEC_RESET      = 0x2000,
35024 +};
35025 +
35026 +enum glamo_reg_clock51 {
35027 +       GLAMO_CLOCK_GEN51_EN_DIV_MCLK   = 0x0001,
35028 +       GLAMO_CLOCK_GEN51_EN_DIV_SCLK   = 0x0002,
35029 +       GLAMO_CLOCK_GEN51_EN_DIV_JCLK   = 0x0004,
35030 +       GLAMO_CLOCK_GEN51_EN_DIV_DCLK   = 0x0008,
35031 +       GLAMO_CLOCK_GEN51_EN_DIV_DMCLK  = 0x0010,
35032 +       GLAMO_CLOCK_GEN51_EN_DIV_DHCLK  = 0x0020,
35033 +       GLAMO_CLOCK_GEN51_EN_DIV_GCLK   = 0x0040,
35034 +       GLAMO_CLOCK_GEN51_EN_DIV_TCLK   = 0x0080,
35035 +       /* FIXME: higher bits */
35036 +};
35037 +
35038 +enum glamo_reg_hostbus2 {
35039 +       GLAMO_HOSTBUS2_MMIO_EN_ISP      = 0x0001,
35040 +       GLAMO_HOSTBUS2_MMIO_EN_JPEG     = 0x0002,
35041 +       GLAMO_HOSTBUS2_MMIO_EN_MPEG     = 0x0004,
35042 +       GLAMO_HOSTBUS2_MMIO_EN_LCD      = 0x0008,
35043 +       GLAMO_HOSTBUS2_MMIO_EN_MMC      = 0x0010,
35044 +       GLAMO_HOSTBUS2_MMIO_EN_MICROP0  = 0x0020,
35045 +       GLAMO_HOSTBUS2_MMIO_EN_MICROP1  = 0x0040,
35046 +       GLAMO_HOSTBUS2_MMIO_EN_CQ       = 0x0080,
35047 +       GLAMO_HOSTBUS2_MMIO_EN_RISC     = 0x0100,
35048 +       GLAMO_HOSTBUS2_MMIO_EN_2D       = 0x0200,
35049 +       GLAMO_HOSTBUS2_MMIO_EN_3D       = 0x0400,
35050 +};
35051 +
35052 +/* LCD Controller */
35053 +
35054 +#define REG_LCD(x)     (x)
35055 +enum glamo_reg_lcd {
35056 +       GLAMO_REG_LCD_MODE1             = REG_LCD(0x00),
35057 +       GLAMO_REG_LCD_MODE2             = REG_LCD(0x02),
35058 +       GLAMO_REG_LCD_MODE3             = REG_LCD(0x04),
35059 +       GLAMO_REG_LCD_WIDTH             = REG_LCD(0x06),
35060 +       GLAMO_REG_LCD_HEIGHT            = REG_LCD(0x08),
35061 +       GLAMO_REG_LCD_POLARITY          = REG_LCD(0x0a),
35062 +       GLAMO_REG_LCD_A_BASE1           = REG_LCD(0x0c),
35063 +       GLAMO_REG_LCD_A_BASE2           = REG_LCD(0x0e),
35064 +       GLAMO_REG_LCD_B_BASE1           = REG_LCD(0x10),
35065 +       GLAMO_REG_LCD_B_BASE2           = REG_LCD(0x12),
35066 +       GLAMO_REG_LCD_C_BASE1           = REG_LCD(0x14),
35067 +       GLAMO_REG_LCD_C_BASE2           = REG_LCD(0x16),
35068 +       GLAMO_REG_LCD_PITCH             = REG_LCD(0x18),
35069 +       /* RES */
35070 +       GLAMO_REG_LCD_HORIZ_TOTAL       = REG_LCD(0x1c),
35071 +       /* RES */
35072 +       GLAMO_REG_LCD_HORIZ_RETR_START  = REG_LCD(0x20),
35073 +       /* RES */
35074 +       GLAMO_REG_LCD_HORIZ_RETR_END    = REG_LCD(0x24),
35075 +       /* RES */
35076 +       GLAMO_REG_LCD_HORIZ_DISP_START  = REG_LCD(0x28),
35077 +       /* RES */
35078 +       GLAMO_REG_LCD_HORIZ_DISP_END    = REG_LCD(0x2c),
35079 +       /* RES */
35080 +       GLAMO_REG_LCD_VERT_TOTAL        = REG_LCD(0x30),
35081 +       /* RES */
35082 +       GLAMO_REG_LCD_VERT_RETR_START   = REG_LCD(0x34),
35083 +       /* RES */
35084 +       GLAMO_REG_LCD_VERT_RETR_END     = REG_LCD(0x38),
35085 +       /* RES */
35086 +       GLAMO_REG_LCD_VERT_DISP_START   = REG_LCD(0x3c),
35087 +       /* RES */
35088 +       GLAMO_REG_LCD_VERT_DISP_END     = REG_LCD(0x40),
35089 +       /* RES */
35090 +       GLAMO_REG_LCD_POL               = REG_LCD(0x44),
35091 +       GLAMO_REG_LCD_DATA_START        = REG_LCD(0x46),
35092 +       GLAMO_REG_LCD_FRATE_CONTRO      = REG_LCD(0x48),
35093 +       GLAMO_REG_LCD_DATA_CMD_HDR      = REG_LCD(0x4a),
35094 +       GLAMO_REG_LCD_SP_START          = REG_LCD(0x4c),
35095 +       GLAMO_REG_LCD_SP_END            = REG_LCD(0x4e),
35096 +       GLAMO_REG_LCD_CURSOR_BASE1      = REG_LCD(0x50),
35097 +       GLAMO_REG_LCD_CURSOR_BASE2      = REG_LCD(0x52),
35098 +       GLAMO_REG_LCD_CURSOR_PITCH      = REG_LCD(0x54),
35099 +       GLAMO_REG_LCD_CURSOR_X_SIZE     = REG_LCD(0x56),
35100 +       GLAMO_REG_LCD_CURSOR_Y_SIZE     = REG_LCD(0x58),
35101 +       GLAMO_REG_LCD_CURSOR_X_POS      = REG_LCD(0x5a),
35102 +       GLAMO_REG_LCD_CURSOR_Y_POS      = REG_LCD(0x5c),
35103 +       GLAMO_REG_LCD_CURSOR_PRESET     = REG_LCD(0x5e),
35104 +       GLAMO_REG_LCD_CURSOR_FG_COLOR   = REG_LCD(0x60),
35105 +       /* RES */
35106 +       GLAMO_REG_LCD_CURSOR_BG_COLOR   = REG_LCD(0x64),
35107 +       /* RES */
35108 +       GLAMO_REG_LCD_CURSOR_DST_COLOR  = REG_LCD(0x68),
35109 +       /* RES */
35110 +       GLAMO_REG_LCD_STATUS1           = REG_LCD(0x80),
35111 +       GLAMO_REG_LCD_STATUS2           = REG_LCD(0x82),
35112 +       GLAMO_REG_LCD_STATUS3           = REG_LCD(0x84),
35113 +       GLAMO_REG_LCD_STATUS4           = REG_LCD(0x86),
35114 +       /* RES */
35115 +       GLAMO_REG_LCD_COMMAND1          = REG_LCD(0xa0),
35116 +       GLAMO_REG_LCD_COMMAND2          = REG_LCD(0xa2),
35117 +       /* RES */
35118 +       GLAMO_REG_LCD_WFORM_DELAY1      = REG_LCD(0xb0),
35119 +       GLAMO_REG_LCD_WFORM_DELAY2      = REG_LCD(0xb2),
35120 +       /* RES */
35121 +       GLAMO_REG_LCD_GAMMA_CORR        = REG_LCD(0x100),
35122 +       /* RES */
35123 +       GLAMO_REG_LCD_GAMMA_R_ENTRY01   = REG_LCD(0x110),
35124 +       GLAMO_REG_LCD_GAMMA_R_ENTRY23   = REG_LCD(0x112),
35125 +       GLAMO_REG_LCD_GAMMA_R_ENTRY45   = REG_LCD(0x114),
35126 +       GLAMO_REG_LCD_GAMMA_R_ENTRY67   = REG_LCD(0x116),
35127 +       GLAMO_REG_LCD_GAMMA_R_ENTRY8    = REG_LCD(0x118),
35128 +       /* RES */
35129 +       GLAMO_REG_LCD_GAMMA_G_ENTRY01   = REG_LCD(0x130),
35130 +       GLAMO_REG_LCD_GAMMA_G_ENTRY23   = REG_LCD(0x132),
35131 +       GLAMO_REG_LCD_GAMMA_G_ENTRY45   = REG_LCD(0x134),
35132 +       GLAMO_REG_LCD_GAMMA_G_ENTRY67   = REG_LCD(0x136),
35133 +       GLAMO_REG_LCD_GAMMA_G_ENTRY8    = REG_LCD(0x138),
35134 +       /* RES */
35135 +       GLAMO_REG_LCD_GAMMA_B_ENTRY01   = REG_LCD(0x150),
35136 +       GLAMO_REG_LCD_GAMMA_B_ENTRY23   = REG_LCD(0x152),
35137 +       GLAMO_REG_LCD_GAMMA_B_ENTRY45   = REG_LCD(0x154),
35138 +       GLAMO_REG_LCD_GAMMA_B_ENTRY67   = REG_LCD(0x156),
35139 +       GLAMO_REG_LCD_GAMMA_B_ENTRY8    = REG_LCD(0x158),
35140 +       /* RES */
35141 +       GLAMO_REG_LCD_SRAM_DRIVING1     = REG_LCD(0x160),
35142 +       GLAMO_REG_LCD_SRAM_DRIVING2     = REG_LCD(0x162),
35143 +       GLAMO_REG_LCD_SRAM_DRIVING3     = REG_LCD(0x164),
35144 +};
35145 +
35146 +enum glamo_reg_lcd_mode1 {
35147 +       GLAMO_LCD_MODE1_PWRSAVE         = 0x0001,
35148 +       GLAMO_LCD_MODE1_PARTIAL_PRT     = 0x0002,
35149 +       GLAMO_LCD_MODE1_HWFLIP          = 0x0004,
35150 +       GLAMO_LCD_MODE1_LCD2            = 0x0008,
35151 +       /* RES */
35152 +       GLAMO_LCD_MODE1_PARTIAL_MODE    = 0x0020,
35153 +       GLAMO_LCD_MODE1_CURSOR_DSTCOLOR = 0x0040,
35154 +       GLAMO_LCD_MODE1_PARTIAL_ENABLE  = 0x0080,
35155 +       GLAMO_LCD_MODE1_TVCLK_IN_ENABLE = 0x0100,
35156 +       GLAMO_LCD_MODE1_HSYNC_HIGH_ACT  = 0x0200,
35157 +       GLAMO_LCD_MODE1_VSYNC_HIGH_ACT  = 0x0400,
35158 +       GLAMO_LCD_MODE1_HSYNC_FLIP      = 0x0800,
35159 +       GLAMO_LCD_MODE1_GAMMA_COR_EN    = 0x1000,
35160 +       GLAMO_LCD_MODE1_DITHER_EN       = 0x2000,
35161 +       GLAMO_LCD_MODE1_CURSOR_EN       = 0x4000,
35162 +       GLAMO_LCD_MODE1_ROTATE_EN       = 0x8000,
35163 +};
35164 +
35165 +enum glamo_reg_lcd_mode2 {
35166 +       GLAMO_LCD_MODE2_CRC_CHECK_EN    = 0x0001,
35167 +       GLAMO_LCD_MODE2_DCMD_PER_LINE   = 0x0002,
35168 +       GLAMO_LCD_MODE2_NOUSE_BDEF      = 0x0004,
35169 +       GLAMO_LCD_MODE2_OUT_POS_MODE    = 0x0008,
35170 +       GLAMO_LCD_MODE2_FRATE_CTRL_EN   = 0x0010,
35171 +       GLAMO_LCD_MODE2_SINGLE_BUFFER   = 0x0020,
35172 +       GLAMO_LCD_MODE2_SER_LSB_TO_MSB  = 0x0040,
35173 +       /* FIXME */
35174 +};
35175 +
35176 +enum glamo_reg_lcd_mode3 {
35177 +       /* LCD color source data format */
35178 +       GLAMO_LCD_SRC_RGB565            = 0x0000,
35179 +       GLAMO_LCD_SRC_ARGB1555          = 0x4000,
35180 +       GLAMO_LCD_SRC_ARGB4444          = 0x8000,
35181 +       /* interface type */
35182 +       GLAMO_LCD_MODE3_LCD             = 0x1000,
35183 +       GLAMO_LCD_MODE3_RGB             = 0x0800,
35184 +       GLAMO_LCD_MODE3_CPU             = 0x0000,
35185 +       /* mode */
35186 +       GLAMO_LCD_MODE3_RGB332          = 0x0000,
35187 +       GLAMO_LCD_MODE3_RGB444          = 0x0100,
35188 +       GLAMO_LCD_MODE3_RGB565          = 0x0200,
35189 +       GLAMO_LCD_MODE3_RGB666          = 0x0300,
35190 +       /* depth */
35191 +       GLAMO_LCD_MODE3_6BITS           = 0x0000,
35192 +       GLAMO_LCD_MODE3_8BITS           = 0x0010,
35193 +       GLAMO_LCD_MODE3_9BITS           = 0x0020,
35194 +       GLAMO_LCD_MODE3_16BITS          = 0x0030,
35195 +       GLAMO_LCD_MODE3_18BITS          = 0x0040,
35196 +};
35197 +
35198 +enum glamo_lcd_rot_mode {
35199 +        GLAMO_LCD_ROT_MODE_0            = 0x0000,
35200 +        GLAMO_LCD_ROT_MODE_180          = 0x2000,
35201 +        GLAMO_LCD_ROT_MODE_MIRROR       = 0x4000,
35202 +        GLAMO_LCD_ROT_MODE_FLIP         = 0x6000,
35203 +        GLAMO_LCD_ROT_MODE_90           = 0x8000,
35204 +        GLAMO_LCD_ROT_MODE_270          = 0xa000,
35205 +};
35206 +#define GLAMO_LCD_ROT_MODE_MASK         0xe000
35207 +
35208 +enum glamo_lcd_cmd_type {
35209 +       GLAMO_LCD_CMD_TYPE_DISP         = 0x0000,
35210 +       GLAMO_LCD_CMD_TYPE_PARALLEL     = 0x4000,
35211 +       GLAMO_LCD_CMD_TYPE_SERIAL       = 0x8000,
35212 +       GLAMO_LCD_CMD_TYPE_SERIAL_DIRECT= 0xc000,
35213 +};
35214 +#define GLAMO_LCD_CMD_TYPE_MASK                0xc000
35215 +
35216 +enum glamo_lcd_cmds {
35217 +       GLAMO_LCD_CMD_DATA_DISP_FIRE    = 0x00,
35218 +       GLAMO_LCD_CMD_DATA_DISP_SYNC    = 0x01,         /* RGB only */
35219 +       /* switch to command mode, no display */
35220 +       GLAMO_LCD_CMD_DATA_FIRE_NO_DISP = 0x02,
35221 +       /* display until VSYNC, switch to command */
35222 +       GLAMO_LCD_CMD_DATA_FIRE_VSYNC   = 0x11,
35223 +       /* display until HSYNC, switch to command */
35224 +       GLAMO_LCD_CMD_DATA_FIRE_HSYNC   = 0x12,
35225 +       /* display until VSYNC, 1 black frame, VSYNC, switch to command */
35226 +       GLAMO_LCD_CMD_DATA_FIRE_VSYNC_B = 0x13,
35227 +       /* don't care about display and switch to command */
35228 +       GLAMO_LCD_CMD_DATA_FIRE_FREE    = 0x14,         /* RGB only */
35229 +       /* don't care about display, keep data display but disable data,
35230 +        * and switch to command */
35231 +       GLAMO_LCD_CMD_DATA_FIRE_FREE_D  = 0x15,         /* RGB only */
35232 +};
35233 +
35234 +enum glamo_core_revisions {
35235 +       GLAMO_CORE_REV_A0               = 0x0000,
35236 +       GLAMO_CORE_REV_A1               = 0x0001,
35237 +       GLAMO_CORE_REV_A2               = 0x0002,
35238 +       GLAMO_CORE_REV_A3               = 0x0003,
35239 +};
35240 +
35241 +#endif /* _GLAMO_REGS_H */
35242 Index: linux-2.6.24.7/drivers/mfd/glamo/glamo-spi-gpio.c
35243 ===================================================================
35244 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
35245 +++ linux-2.6.24.7/drivers/mfd/glamo/glamo-spi-gpio.c   2008-12-11 22:46:49.000000000 +0100
35246 @@ -0,0 +1,288 @@
35247 +/*
35248 + * Copyright (C) 2007 Openmoko, Inc.
35249 + * Author: Harald Welte <laforge@openmoko.org>
35250 + *
35251 + * Smedia Glamo GPIO based SPI driver
35252 + *
35253 + * This program is free software; you can redistribute it and/or modify
35254 + * it under the terms of the GNU General Public License version 2 as
35255 + * published by the Free Software Foundation.
35256 + *
35257 + * This driver currently only implements a minimum subset of the hardware
35258 + * features, esp. those features that are required to drive the jbt6k74
35259 + * LCM controller asic in the TD028TTEC1 LCM.
35260 + *
35261 +*/
35262 +
35263 +#define DEBUG
35264 +
35265 +#include <linux/kernel.h>
35266 +#include <linux/init.h>
35267 +#include <linux/delay.h>
35268 +#include <linux/device.h>
35269 +#include <linux/spinlock.h>
35270 +#include <linux/workqueue.h>
35271 +#include <linux/platform_device.h>
35272 +
35273 +#include <linux/spi/spi.h>
35274 +#include <linux/spi/spi_bitbang.h>
35275 +#include <linux/spi/glamo.h>
35276 +
35277 +#include <linux/glamofb.h>
35278 +
35279 +#include <asm/hardware.h>
35280 +
35281 +#include "glamo-core.h"
35282 +#include "glamo-regs.h"
35283 +
35284 +struct glamo_spigpio {
35285 +       struct spi_bitbang              bitbang;
35286 +       struct spi_master               *master;
35287 +       struct glamo_spigpio_info       *info;
35288 +       struct glamo_core               *glamo;
35289 +};
35290 +
35291 +static inline struct glamo_spigpio *to_sg(struct spi_device *spi)
35292 +{
35293 +       return spi->controller_data;
35294 +}
35295 +
35296 +static inline void setsck(struct spi_device *dev, int on)
35297 +{
35298 +       struct glamo_spigpio *sg = to_sg(dev);
35299 +       glamo_gpio_setpin(sg->glamo, sg->info->pin_clk, on ? 1 : 0);
35300 +}
35301 +
35302 +static inline void setmosi(struct spi_device *dev, int on)
35303 +{
35304 +       struct glamo_spigpio *sg = to_sg(dev);
35305 +       glamo_gpio_setpin(sg->glamo, sg->info->pin_mosi, on ? 1 : 0);
35306 +}
35307 +
35308 +static inline u32 getmiso(struct spi_device *dev)
35309 +{
35310 +       struct glamo_spigpio *sg = to_sg(dev);
35311 +       if (sg->info->pin_miso)
35312 +               return glamo_gpio_getpin(sg->glamo, sg->info->pin_miso) ? 1 : 0;
35313 +       else
35314 +               return 0;
35315 +}
35316 +
35317 +#define spidelay(x) ndelay(x)
35318 +
35319 +#define EXPAND_BITBANG_TXRX
35320 +#include <linux/spi/spi_bitbang.h>
35321 +
35322 +static u32 glamo_spigpio_txrx_mode0(struct spi_device *spi,
35323 +                                   unsigned nsecs, u32 word, u8 bits)
35324 +{
35325 +       return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
35326 +}
35327 +
35328 +static u32 glamo_spigpio_txrx_mode1(struct spi_device *spi,
35329 +                                   unsigned nsecs, u32 word, u8 bits)
35330 +{
35331 +       return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
35332 +}
35333 +
35334 +static u32 glamo_spigpio_txrx_mode2(struct spi_device *spi,
35335 +                                   unsigned nsecs, u32 word, u8 bits)
35336 +{
35337 +       return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
35338 +}
35339 +
35340 +static u32 glamo_spigpio_txrx_mode3(struct spi_device *spi,
35341 +                                   unsigned nsecs, u32 word, u8 bits)
35342 +{
35343 +       return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
35344 +}
35345 +
35346 +
35347 +#if 0
35348 +static int glamo_spigpio_setupxfer(struct spi_device *spi,
35349 +                                  struct spi_transfer *t)
35350 +{
35351 +       struct glamo_spi *gs = to_sg(spi);
35352 +       unsigned int bpw;
35353 +
35354 +       bpw = t ? t->bits_per_word : spi->bits_per_word;
35355 +
35356 +       if (bpw != 9 && bpw != 8) {
35357 +               dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
35358 +               return -EINVAL;
35359 +       }
35360 +
35361 +       return 0;
35362 +}
35363 +#endif
35364 +
35365 +static void glamo_spigpio_chipsel(struct spi_device *spi, int value)
35366 +{
35367 +       struct glamo_spigpio *gs = to_sg(spi);
35368 +#if 0
35369 +       dev_dbg(&spi->dev, "chipsel %d: spi=%p, gs=%p, info=%p, handle=%p\n",
35370 +               value, spi, gs, gs->info, gs->info->glamo);
35371 +#endif
35372 +       glamo_gpio_setpin(gs->glamo, gs->info->pin_cs, value ? 0 : 1);
35373 +}
35374 +
35375 +
35376 +static int glamo_spigpio_probe(struct platform_device *pdev)
35377 +{
35378 +       struct spi_master *master;
35379 +       struct glamo_spigpio *sp;
35380 +       int ret;
35381 +       int i;
35382 +
35383 +       master = spi_alloc_master(&pdev->dev, sizeof(struct glamo_spigpio));
35384 +       if (master == NULL) {
35385 +               dev_err(&pdev->dev, "failed to allocate spi master\n");
35386 +               ret = -ENOMEM;
35387 +               goto err;
35388 +       }
35389 +
35390 +       sp = spi_master_get_devdata(master);
35391 +       platform_set_drvdata(pdev, sp);
35392 +       sp->info = pdev->dev.platform_data;
35393 +       if (!sp->info) {
35394 +               dev_err(&pdev->dev, "can't operate without platform data\n");
35395 +               ret = -EIO;
35396 +               goto err_no_pdev;
35397 +       }
35398 +
35399 +       master->num_chipselect = 1;
35400 +       master->bus_num = 2; /* FIXME: use dynamic number */
35401 +
35402 +       sp->master = spi_master_get(master);
35403 +       sp->glamo = sp->info->glamo;
35404 +
35405 +       sp->bitbang.master = sp->master;
35406 +       sp->bitbang.chipselect = glamo_spigpio_chipsel;
35407 +       sp->bitbang.txrx_word[SPI_MODE_0] = glamo_spigpio_txrx_mode0;
35408 +       sp->bitbang.txrx_word[SPI_MODE_1] = glamo_spigpio_txrx_mode1;
35409 +       sp->bitbang.txrx_word[SPI_MODE_2] = glamo_spigpio_txrx_mode2;
35410 +       sp->bitbang.txrx_word[SPI_MODE_3] = glamo_spigpio_txrx_mode3;
35411 +
35412 +       /* set state of spi pins */
35413 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_clk, 0);
35414 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_mosi, 0);
35415 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_cs, 1);
35416 +
35417 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_clk);
35418 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_mosi);
35419 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_cs);
35420 +       if (sp->info->pin_miso)
35421 +               glamo_gpio_cfgpin(sp->glamo, sp->info->pin_miso);
35422 +
35423 +       /* bring the LCM panel out of reset if it isn't already */
35424 +
35425 +       glamo_gpio_setpin(sp->glamo, GLAMO_GPIO4, 1);
35426 +       glamo_gpio_cfgpin(sp->glamo, GLAMO_GPIO4_OUTPUT);
35427 +       msleep(90);
35428 +
35429 +#if 0
35430 +       sp->dev = &pdev->dev;
35431 +
35432 +       sp->bitbang.setup_transfer = glamo_spi_setupxfer;
35433 +       sp->bitbang.txrx_bufs = glamo_spi_txrx;
35434 +       sp->bitbang.master->setup = glamo_spi_setup;
35435 +#endif
35436 +
35437 +       ret = spi_bitbang_start(&sp->bitbang);
35438 +       if (ret)
35439 +               goto err_no_bitbang;
35440 +
35441 +       /* register the chips to go with the board */
35442 +
35443 +       for (i = 0; i < sp->info->board_size; i++) {
35444 +               dev_info(&pdev->dev, "registering %p: %s\n",
35445 +                        &sp->info->board_info[i],
35446 +                        sp->info->board_info[i].modalias);
35447 +
35448 +               sp->info->board_info[i].controller_data = sp;
35449 +               spi_new_device(master, sp->info->board_info + i);
35450 +       }
35451 +
35452 +       return 0;
35453 +
35454 +err_no_bitbang:
35455 +       platform_set_drvdata(pdev, NULL);
35456 +err_no_pdev:
35457 +       spi_master_put(sp->bitbang.master);
35458 +err:
35459 +       return ret;
35460 +
35461 +}
35462 +
35463 +static int glamo_spigpio_remove(struct platform_device *pdev)
35464 +{
35465 +       struct glamo_spigpio *sp = platform_get_drvdata(pdev);
35466 +
35467 +       spi_bitbang_stop(&sp->bitbang);
35468 +       spi_master_put(sp->bitbang.master);
35469 +
35470 +       return 0;
35471 +}
35472 +
35473 +/*#define glamo_spigpio_suspend NULL
35474 +#define glamo_spigpio_resume NULL
35475 +*/
35476 +
35477 +
35478 +#ifdef CONFIG_PM
35479 +static int glamo_spigpio_suspend(struct platform_device *pdev, pm_message_t state)
35480 +{
35481 +       return 0;
35482 +}
35483 +
35484 +static int glamo_spigpio_resume(struct platform_device *pdev)
35485 +{
35486 +       struct glamo_spigpio *sp = platform_get_drvdata(pdev);
35487 +
35488 +       if (!sp)
35489 +               return 0;
35490 +
35491 +       /* set state of spi pins */
35492 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_clk, 0);
35493 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_mosi, 0);
35494 +       glamo_gpio_setpin(sp->glamo, sp->info->pin_cs, 1);
35495 +
35496 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_clk);
35497 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_mosi);
35498 +       glamo_gpio_cfgpin(sp->glamo, sp->info->pin_cs);
35499 +       if (sp->info->pin_miso)
35500 +               glamo_gpio_cfgpin(sp->glamo, sp->info->pin_miso);
35501 +
35502 +       return 0;
35503 +}
35504 +#endif
35505 +
35506 +static struct platform_driver glamo_spi_drv = {
35507 +       .probe          = glamo_spigpio_probe,
35508 +       .remove         = glamo_spigpio_remove,
35509 +#ifdef CONFIG_PM
35510 +       .suspend_late   = glamo_spigpio_suspend,
35511 +       .resume_early   = glamo_spigpio_resume,
35512 +#endif
35513 +       .driver         = {
35514 +               .name   = "glamo-spi-gpio",
35515 +               .owner  = THIS_MODULE,
35516 +       },
35517 +};
35518 +
35519 +static int __init glamo_spi_init(void)
35520 +{
35521 +       return platform_driver_register(&glamo_spi_drv);
35522 +}
35523 +
35524 +static void __exit glamo_spi_exit(void)
35525 +{
35526 +       platform_driver_unregister(&glamo_spi_drv);
35527 +}
35528 +
35529 +module_init(glamo_spi_init);
35530 +module_exit(glamo_spi_exit);
35531 +
35532 +MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver");
35533 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>")
35534 +MODULE_LICENSE("GPL");
35535 Index: linux-2.6.24.7/drivers/mfd/glamo/Kconfig
35536 ===================================================================
35537 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
35538 +++ linux-2.6.24.7/drivers/mfd/glamo/Kconfig    2008-12-11 22:46:49.000000000 +0100
35539 @@ -0,0 +1,44 @@
35540 +config MFD_GLAMO
35541 +       bool "Smedia Glamo 336x/337x support"
35542 +       help
35543 +         This enables the core driver for the Smedia Glamo 336x/337x
35544 +         multi-function device.  It includes irq_chip demultiplex as
35545 +         well as clock / power management and GPIO support.
35546 +
35547 +config MFD_GLAMO_FB
35548 +       tristate "Smedia Glamo 336x/337x framebuffer support"
35549 +       depends on FB && MFD_GLAMO
35550 +       help
35551 +         Frame buffer driver for the LCD controller in the Smedia Glamo
35552 +         336x/337x.
35553 +
35554 +         This driver is also available as a module ( = code which can be
35555 +         inserted and removed from the running kernel whenever you want). The
35556 +         module will be called glamofb. If you want to compile it as a module,
35557 +         say M here and read <file:Documentation/modules.txt>.
35558 +
35559 +         If unsure, say N.
35560 +
35561 +config MFD_GLAMO_SPI_GPIO
35562 +       tristate "Glamo GPIO SPI bitbang support"
35563 +       depends on MFD_GLAMO
35564 +       help
35565 +         Enable a bitbanging SPI adapter driver for the Smedia Glamo.
35566 +
35567 +config MFD_GLAMO_SPI_FB
35568 +       tristate "Glamo LCM control channel SPI support"
35569 +       depends on MFD_GLAMO_FB
35570 +       help
35571 +         Enable a bitbanging SPI adapter driver for the Smedia Glamo LCM
35572 +        control channel.  This SPI interface is frequently used to
35573 +        interconnect the LCM control interface.
35574 +
35575 +config MFD_GLAMO_MCI
35576 +       tristate "Glamo S3C SD/MMC Card Interface support"
35577 +       depends on MFD_GLAMO && MMC
35578 +       help
35579 +         This selects a driver for the MCI interface found in
35580 +         the S-Media GLAMO chip, as used in Openmoko
35581 +         neo1973 GTA-02.
35582 +
35583 +         If unsure, say N.
35584 \ No newline at end of file
35585 Index: linux-2.6.24.7/drivers/mfd/glamo/Makefile
35586 ===================================================================
35587 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
35588 +++ linux-2.6.24.7/drivers/mfd/glamo/Makefile   2008-12-11 22:46:49.000000000 +0100
35589 @@ -0,0 +1,12 @@
35590 +#
35591 +# Makefile for the Smedia Glamo framebuffer driver
35592 +#
35593 +
35594 +obj-$(CONFIG_MFD_GLAMO)                        += glamo-core.o glamo-gpio.o
35595 +obj-$(CONFIG_MFD_GLAMO_SPI)            += glamo-spi.o
35596 +obj-$(CONFIG_MFD_GLAMO_SPI_GPIO)       += glamo-spi-gpio.o
35597 +
35598 +obj-$(CONFIG_MFD_GLAMO_FB)             += glamo-fb.o
35599 +obj-$(CONFIG_MFD_GLAMO_SPI_FB)         += glamo-lcm-spi.o
35600 +obj-$(CONFIG_MFD_GLAMO_MCI)            += glamo-mci.o
35601 +
35602 Index: linux-2.6.24.7/drivers/mfd/Kconfig
35603 ===================================================================
35604 --- linux-2.6.24.7.orig/drivers/mfd/Kconfig     2008-12-11 22:46:07.000000000 +0100
35605 +++ linux-2.6.24.7/drivers/mfd/Kconfig  2008-12-11 22:46:49.000000000 +0100
35606 @@ -15,6 +15,8 @@ config MFD_SM501
35607           interface. The device may be connected by PCI or local bus with
35608           varying functions enabled.
35609
35610 +source "drivers/mfd/glamo/Kconfig"
35611 +
35612  endmenu
35613
35614  menu "Multimedia Capabilities Port drivers"
35615 Index: linux-2.6.24.7/drivers/mfd/Makefile
35616 ===================================================================
35617 --- linux-2.6.24.7.orig/drivers/mfd/Makefile    2008-12-11 22:46:07.000000000 +0100
35618 +++ linux-2.6.24.7/drivers/mfd/Makefile 2008-12-11 22:46:49.000000000 +0100
35619 @@ -3,6 +3,7 @@
35620  #
35621
35622  obj-$(CONFIG_MFD_SM501)                += sm501.o
35623 +obj-$(CONFIG_MFD_GLAMO)                += glamo/
35624
35625  obj-$(CONFIG_MCP)              += mcp-core.o
35626  obj-$(CONFIG_MCP_SA11X0)       += mcp-sa11x0.o
35627 Index: linux-2.6.24.7/drivers/mmc/host/Kconfig
35628 ===================================================================
35629 --- linux-2.6.24.7.orig/drivers/mmc/host/Kconfig        2008-12-11 22:46:07.000000000 +0100
35630 +++ linux-2.6.24.7/drivers/mmc/host/Kconfig     2008-12-11 22:46:49.000000000 +0100
35631 @@ -130,3 +130,14 @@ config MMC_SPI
35632
35633           If unsure, or if your system has no SPI master driver, say N.
35634
35635 +config MMC_S3C
35636 +       tristate "Samsung S3C24xx SD/MMC Card Interface support"
35637 +       depends on ARCH_S3C2410 && MMC
35638 +       help
35639 +         This selects a driver for the MCI interface found in
35640 +         Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs.
35641 +         If you have a board based on one of those and a MMC/SD
35642 +         slot, say Y or M here.
35643 +
35644 +         If unsure, say N.
35645 +
35646 Index: linux-2.6.24.7/drivers/mmc/host/Makefile
35647 ===================================================================
35648 --- linux-2.6.24.7.orig/drivers/mmc/host/Makefile       2008-12-11 22:46:07.000000000 +0100
35649 +++ linux-2.6.24.7/drivers/mmc/host/Makefile    2008-12-11 22:46:49.000000000 +0100
35650 @@ -17,4 +17,4 @@ obj-$(CONFIG_MMC_OMAP)                += omap.o
35651  obj-$(CONFIG_MMC_AT91)         += at91_mci.o
35652  obj-$(CONFIG_MMC_TIFM_SD)      += tifm_sd.o
35653  obj-$(CONFIG_MMC_SPI)          += mmc_spi.o
35654 -
35655 +obj-$(CONFIG_MMC_S3C)          += s3cmci.o
35656 Index: linux-2.6.24.7/drivers/mmc/host/s3cmci.c
35657 ===================================================================
35658 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
35659 +++ linux-2.6.24.7/drivers/mmc/host/s3cmci.c    2008-12-11 22:46:49.000000000 +0100
35660 @@ -0,0 +1,1563 @@
35661 +/*
35662 + *  linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
35663 + *
35664 + *  Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
35665 + *  Copyright (C) 2007 Harald Welte <laforge@gnumonks.org>
35666 + *
35667 + * This program is free software; you can redistribute it and/or modify
35668 + * it under the terms of the GNU General Public License version 2 as
35669 + * published by the Free Software Foundation.
35670 + */
35671 +
35672 +#include <linux/module.h>
35673 +#include <linux/dma-mapping.h>
35674 +#include <linux/clk.h>
35675 +#include <linux/mmc/host.h>
35676 +#include <linux/platform_device.h>
35677 +#include <linux/irq.h>
35678 +#include <linux/delay.h>
35679 +#include <linux/spinlock.h>
35680 +
35681 +#include <asm/dma.h>
35682 +#include <asm/dma-mapping.h>
35683 +
35684 +#include <asm/io.h>
35685 +#include <asm/arch/regs-sdi.h>
35686 +#include <asm/arch/regs-gpio.h>
35687 +#include <asm/arch/mci.h>
35688 +#include <asm/arch/dma.h>
35689 +
35690 +#include "s3cmci.h"
35691 +
35692 +#define DRIVER_NAME "s3c-mci"
35693 +
35694 +static spinlock_t clock_lock;
35695 +
35696 +/*
35697 + * Max SD clock rate (in Hz)
35698 + *
35699 + * you can override this on the kernel command line using
35700 + *
35701 + * s3cmci.sd_max_clk=10000000
35702 + *
35703 + * for example.
35704 + */
35705 +
35706 +static int sd_max_clk = 25000000;
35707 +module_param(sd_max_clk, int, 0644);
35708 +
35709 +/*
35710 + * SD allow SD clock to run while idle
35711 + *
35712 + * you can override this on kernel commandline using
35713 + *
35714 + *  s3cmci.sd_idleclk=0
35715 + *
35716 + * for example.
35717 + */
35718 +
35719 +static int sd_idleclk;  /* disallow idle clock by default */
35720 +module_param(sd_idleclk, int, 0644);
35721 +
35722 +/*
35723 + * Slow SD clock rate
35724 + *
35725 + * you can override this on kernel commandline using
35726 + *
35727 + *  s3cmci.sd_slow_ratio=8
35728 + *
35729 + * for example.
35730 + *
35731 + * A platform callback is used to decide effective clock rate.  If not
35732 + * defined, then the max is used, if defined and the callback returns
35733 + * nonzero, the rate is divided by this factor.
35734 + */
35735 +
35736 +static int sd_slow_ratio = 8;
35737 +module_param(sd_slow_ratio, int, 0644);
35738 +
35739 +/* used to stash real idleclk state in suspend: we force it to run in there */
35740 +static int suspend_sd_idleclk;
35741 +
35742 +enum dbg_channels {
35743 +       dbg_err   = (1 << 0),
35744 +       dbg_debug = (1 << 1),
35745 +       dbg_info  = (1 << 2),
35746 +       dbg_irq   = (1 << 3),
35747 +       dbg_sg    = (1 << 4),
35748 +       dbg_dma   = (1 << 5),
35749 +       dbg_pio   = (1 << 6),
35750 +       dbg_fail  = (1 << 7),
35751 +       dbg_conf  = (1 << 8),
35752 +};
35753 +
35754 +static const int dbgmap_err   = dbg_err | dbg_fail;
35755 +static const int dbgmap_info  = dbg_info | dbg_conf;
35756 +static const int dbgmap_debug = dbg_debug;
35757 +
35758 +#define dbg(host, channels, args...)            \
35759 +       do {                                     \
35760 +       if (dbgmap_err & channels)               \
35761 +               dev_err(&host->pdev->dev, args); \
35762 +       else if (dbgmap_info & channels)         \
35763 +               dev_info(&host->pdev->dev, args);\
35764 +       else if (dbgmap_debug & channels)        \
35765 +               dev_dbg(&host->pdev->dev, args); \
35766 +       } while (0)
35767 +
35768 +#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
35769 +
35770 +static struct s3c2410_dma_client s3cmci_dma_client = {
35771 +       .name           = "s3c-mci",
35772 +};
35773 +
35774 +static void finalize_request(struct s3cmci_host *host);
35775 +static void s3cmci_send_request(struct mmc_host *mmc);
35776 +static void s3cmci_reset(struct s3cmci_host *host);
35777 +
35778 +#ifdef CONFIG_MMC_DEBUG
35779 +static inline void dbg_dumpregs(struct s3cmci_host *host, char *prefix)
35780 +{
35781 +       u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
35782 +       u32 datcon, datcnt, datsta, fsta, imask;
35783 +
35784 +       con     = readl(host->base + S3C2410_SDICON);
35785 +       pre     = readl(host->base + S3C2410_SDIPRE);
35786 +       cmdarg  = readl(host->base + S3C2410_SDICMDARG);
35787 +       cmdcon  = readl(host->base + S3C2410_SDICMDCON);
35788 +       cmdsta  = readl(host->base + S3C2410_SDICMDSTAT);
35789 +       r0      = readl(host->base + S3C2410_SDIRSP0);
35790 +       r1      = readl(host->base + S3C2410_SDIRSP1);
35791 +       r2      = readl(host->base + S3C2410_SDIRSP2);
35792 +       r3      = readl(host->base + S3C2410_SDIRSP3);
35793 +       timer   = readl(host->base + S3C2410_SDITIMER);
35794 +       bsize   = readl(host->base + S3C2410_SDIBSIZE);
35795 +       datcon  = readl(host->base + S3C2410_SDIDCON);
35796 +       datcnt  = readl(host->base + S3C2410_SDIDCNT);
35797 +       datsta  = readl(host->base + S3C2410_SDIDSTA);
35798 +       fsta    = readl(host->base + S3C2410_SDIFSTA);
35799 +       imask   = readl(host->base + host->sdiimsk);
35800 +
35801 +       dbg(host, dbg_debug, "%s  CON:[%08x]  PRE:[%08x]  TMR:[%08x]\n",
35802 +                               prefix, con, pre, timer);
35803 +
35804 +       dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
35805 +                               prefix, cmdcon, cmdarg, cmdsta);
35806 +
35807 +       dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
35808 +                              " DSTA:[%08x] DCNT:[%08x]\n",
35809 +                               prefix, datcon, fsta, datsta, datcnt);
35810 +
35811 +       dbg(host, dbg_debug, "%s   R0:[%08x]   R1:[%08x]"
35812 +                              "   R2:[%08x]   R3:[%08x]\n",
35813 +                               prefix, r0, r1, r2, r3);
35814 +}
35815 +
35816 +static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
35817 +                                                               int stop)
35818 +{
35819 +       snprintf(host->dbgmsg_cmd, 300,
35820 +               "#%u%s op:CMD%d arg:0x%08x flags:0x08%x retries:%u",
35821 +               host->ccnt, (stop?" (STOP)":""), cmd->opcode,
35822 +               cmd->arg, cmd->flags, cmd->retries);
35823 +
35824 +       if (cmd->data) {
35825 +               snprintf(host->dbgmsg_dat, 300,
35826 +                       "#%u bsize:%u blocks:%u bytes:%u",
35827 +                       host->dcnt, cmd->data->blksz,
35828 +                       cmd->data->blocks,
35829 +                       cmd->data->blocks * cmd->data->blksz);
35830 +       } else {
35831 +               host->dbgmsg_dat[0] = '\0';
35832 +       }
35833 +}
35834 +
35835 +static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd,
35836 +                                                               int fail)
35837 +{
35838 +       unsigned int dbglvl = fail?dbg_fail:dbg_debug;
35839 +
35840 +       if (!cmd)
35841 +               return;
35842 +
35843 +       if (cmd->error == 0)
35844 +               dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
35845 +                       host->dbgmsg_cmd, cmd->resp[0]);
35846 +       else
35847 +               dbg(host, dbglvl, "CMD[FAIL(%d)] %s Status:%s\n",
35848 +                       cmd->error, host->dbgmsg_cmd, host->status);
35849 +
35850 +       if (!cmd->data)
35851 +               return;
35852 +
35853 +       if (cmd->data->error == 0)
35854 +               dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
35855 +       else
35856 +               dbg(host, dbglvl, "DAT[FAIL(%d)] %s DCNT:0x%08x\n",
35857 +                       cmd->data->error, host->dbgmsg_dat,
35858 +                       readl(host->base + S3C2410_SDIDCNT));
35859 +}
35860 +#endif /* CONFIG_MMC_DEBUG */
35861 +
35862 +static inline u32 enable_imask(struct s3cmci_host *host, u32 imask)
35863 +{
35864 +       u32 newmask;
35865 +
35866 +       newmask = readl(host->base + host->sdiimsk);
35867 +       newmask |= imask;
35868 +
35869 +       writel(newmask, host->base + host->sdiimsk);
35870 +
35871 +       return newmask;
35872 +}
35873 +
35874 +static inline u32 disable_imask(struct s3cmci_host *host, u32 imask)
35875 +{
35876 +       u32 newmask;
35877 +
35878 +       newmask = readl(host->base + host->sdiimsk);
35879 +       newmask &= ~imask;
35880 +
35881 +       writel(newmask, host->base + host->sdiimsk);
35882 +
35883 +       return newmask;
35884 +}
35885 +
35886 +static inline void clear_imask(struct s3cmci_host *host)
35887 +{
35888 +       writel(0, host->base + host->sdiimsk);
35889 +}
35890 +
35891 +static inline int get_data_buffer(struct s3cmci_host *host,
35892 +                                 u32 *bytes, u8 **pointer)
35893 +{
35894 +       struct scatterlist *sg;
35895 +
35896 +       if (host->pio_active == XFER_NONE)
35897 +               return -EINVAL;
35898 +
35899 +       if ((!host->mrq) || (!host->mrq->data))
35900 +               return -EINVAL;
35901 +
35902 +       if (host->pio_sgptr >= host->mrq->data->sg_len) {
35903 +               dbg(host, dbg_debug, "no more buffers (%i/%i)\n",
35904 +                     host->pio_sgptr, host->mrq->data->sg_len);
35905 +               return -EBUSY;
35906 +       }
35907 +       sg = &host->mrq->data->sg[host->pio_sgptr];
35908 +
35909 +       *bytes = sg->length;
35910 +       *pointer = page_address(sg_page(sg)) + sg->offset;
35911 +
35912 +       host->pio_sgptr++;
35913 +
35914 +       dbg(host, dbg_sg, "new buffer (%i/%i)\n",
35915 +             host->pio_sgptr, host->mrq->data->sg_len);
35916 +
35917 +       return 0;
35918 +}
35919 +
35920 +#define FIFO_FILL(host) (readl(host->base + S3C2410_SDIFSTA) &         \
35921 +                               S3C2410_SDIFSTA_COUNTMASK)
35922 +#define FIFO_FREE(host) (63 - (readl(host->base + S3C2410_SDIFSTA)     \
35923 +                               & S3C2410_SDIFSTA_COUNTMASK))
35924 +
35925 +static inline void do_pio_read(struct s3cmci_host *host)
35926 +{
35927 +       int res;
35928 +       int fifo;
35929 +       void __iomem *from_ptr;
35930 +
35931 +       /* write real prescaler to host, it might be set slow to fix */
35932 +       writel(host->sdipre, host->base + S3C2410_SDIPRE);
35933 +
35934 +       from_ptr = host->base + host->sdidata;
35935 +
35936 +       while ((fifo = FIFO_FILL(host))) {
35937 +               if (!host->pio_bytes) {
35938 +                       res = get_data_buffer(host, &host->pio_bytes,
35939 +                                                       &host->pio_ptr);
35940 +                       if (res) {
35941 +                               host->pio_active = XFER_NONE;
35942 +                               host->complete_what = COMPLETION_FINALIZE;
35943 +
35944 +                               dbg(host, dbg_pio, "pio_read(): "
35945 +                                   "complete (no more data).\n");
35946 +                               return;
35947 +                       }
35948 +
35949 +                       dbg(host, dbg_pio, "pio_read(): new target: "
35950 +                           "[%i]@[%p]\n", host->pio_bytes, host->pio_ptr);
35951 +               }
35952 +
35953 +               dbg(host, dbg_pio, "pio_read(): fifo:[%02i] "
35954 +                   "buffer:[%03i] dcnt:[%08X]\n", fifo, host->pio_bytes,
35955 +                   readl(host->base + S3C2410_SDIDCNT));
35956 +
35957 +               if (fifo > host->pio_bytes)
35958 +                       fifo = host->pio_bytes;
35959 +
35960 +               host->pio_bytes -= fifo;
35961 +               host->pio_count += fifo;
35962 +
35963 +               /* we might have an unaligned start of data */
35964 +               while (((unsigned long)host->pio_ptr & 0x03) && fifo) {
35965 +                       *(host->pio_ptr++) = readb(host->base + host->sdidata_b);
35966 +                       fifo--;
35967 +               }
35968 +
35969 +               /* and a major chunk of data in the middle */
35970 +               for (; fifo >= 4; fifo -=4) {
35971 +                       *(u32 *) host->pio_ptr = readl(from_ptr);
35972 +                       host->pio_ptr+= 4;
35973 +               }
35974 +
35975 +               /* as well as some non-modulo-four trailer */
35976 +               while (fifo) {
35977 +                       *(host->pio_ptr++) = readb(host->base + host->sdidata_b);
35978 +                       fifo--;
35979 +               }
35980 +       }
35981 +
35982 +       if (!host->pio_bytes) {
35983 +               res = get_data_buffer(host, &host->pio_bytes, &host->pio_ptr);
35984 +               if (res) {
35985 +                       dbg(host, dbg_pio, "pio_read(): "
35986 +                           "complete (no more buffers).\n");
35987 +                       host->pio_active = XFER_NONE;
35988 +                       host->complete_what = COMPLETION_FINALIZE;
35989 +
35990 +                       return;
35991 +               }
35992 +       }
35993 +
35994 +       enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
35995 +                                               | S3C2410_SDIIMSK_RXFIFOLAST);
35996 +}
35997 +
35998 +static inline void do_pio_write(struct s3cmci_host *host)
35999 +{
36000 +       int res;
36001 +       int fifo;
36002 +
36003 +       void __iomem *to_ptr;
36004 +
36005 +       to_ptr = host->base + host->sdidata;
36006 +
36007 +       while ((fifo = FIFO_FREE(host))) {
36008 +               if (!host->pio_bytes) {
36009 +                       res = get_data_buffer(host, &host->pio_bytes,
36010 +                                                       &host->pio_ptr);
36011 +                       if (res) {
36012 +                               dbg(host, dbg_pio, "pio_write(): "
36013 +                                       "complete (no more data).\n");
36014 +                               host->pio_active = XFER_NONE;
36015 +
36016 +                               return;
36017 +                       }
36018 +
36019 +                       dbg(host, dbg_pio, "pio_write(): "
36020 +                               "new source: [%i]@[%p]\n",
36021 +                               host->pio_bytes, host->pio_ptr);
36022 +
36023 +               }
36024 +
36025 +               if (fifo > host->pio_bytes)
36026 +                       fifo = host->pio_bytes;
36027 +
36028 +               host->pio_bytes -= fifo;
36029 +               host->pio_count += fifo;
36030 +
36031 +               /* we might have an unaligned start of data */
36032 +               while (((unsigned long)host->pio_ptr & 0x03) && fifo) {
36033 +                       writeb(*(host->pio_ptr++), host->base + host->sdidata_b);
36034 +                       fifo--;
36035 +               }
36036 +
36037 +               /* and a major chunk of data in the middle */
36038 +               for (; fifo >= 4; fifo -=4) {
36039 +                       writel(*(u32 *) host->pio_ptr, to_ptr);
36040 +                       host->pio_ptr += 4;
36041 +               }
36042 +
36043 +               /* as well as some non-modulo-four trailer */
36044 +               while (fifo) {
36045 +                       writeb(*(host->pio_ptr++), host->base + host->sdidata_b);
36046 +                       fifo--;
36047 +               }
36048 +       }
36049 +
36050 +       enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
36051 +}
36052 +
36053 +static void pio_tasklet(unsigned long data)
36054 +{
36055 +       struct s3cmci_host *host = (struct s3cmci_host *) data;
36056 +
36057 +       disable_irq(host->irq);
36058 +
36059 +       if (host->pio_active == XFER_WRITE)
36060 +               do_pio_write(host);
36061 +
36062 +       if (host->pio_active == XFER_READ)
36063 +               do_pio_read(host);
36064 +
36065 +       if (host->complete_what == COMPLETION_FINALIZE) {
36066 +               clear_imask(host);
36067 +               if (host->pio_active != XFER_NONE) {
36068 +                       dbg(host, dbg_err, "unfinished %s "
36069 +                               "- pio_count:[%u] pio_bytes:[%u]\n",
36070 +                               (host->pio_active == XFER_READ)?"read":"write",
36071 +                               host->pio_count, host->pio_bytes);
36072 +
36073 +                       host->mrq->data->error = -EIO;
36074 +               }
36075 +
36076 +               finalize_request(host);
36077 +       } else
36078 +               enable_irq(host->irq);
36079 +}
36080 +
36081 +static void __s3cmci_enable_clock(struct s3cmci_host *host)
36082 +{
36083 +       u32 mci_con;
36084 +       unsigned long flags;
36085 +
36086 +       /* enable the clock if clock rate is > 0 */
36087 +       if (host->real_rate) {
36088 +               spin_lock_irqsave(&clock_lock, flags);
36089 +
36090 +               mci_con = readl(host->base + S3C2410_SDICON);
36091 +               mci_con |= S3C2410_SDICON_CLOCKTYPE;
36092 +               writel(mci_con, host->base + S3C2410_SDICON);
36093 +
36094 +               spin_unlock_irqrestore(&clock_lock, flags);
36095 +       }
36096 +}
36097 +
36098 +static void __s3cmci_disable_clock(struct s3cmci_host *host)
36099 +{
36100 +       u32 mci_con;
36101 +       unsigned long flags;
36102 +
36103 +       if (!sd_idleclk) {
36104 +               spin_lock_irqsave(&clock_lock, flags);
36105 +
36106 +               mci_con = readl(host->base + S3C2410_SDICON);
36107 +               mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
36108 +               writel(mci_con, host->base + S3C2410_SDICON);
36109 +
36110 +               spin_unlock_irqrestore(&clock_lock, flags);
36111 +       }
36112 +}
36113 +
36114 +
36115 +/*
36116 + * ISR for SDI Interface IRQ
36117 + * Communication between driver and ISR works as follows:
36118 + *   host->mrq                         points to current request
36119 + *   host->complete_what       tells ISR when the request is considered done
36120 + *     COMPLETION_CMDSENT        when the command was sent
36121 + *     COMPLETION_RSPFIN          when a response was received
36122 + *     COMPLETION_XFERFINISH     when the data transfer is finished
36123 + *     COMPLETION_XFERFINISH_RSPFIN both of the above.
36124 + *   host->complete_request    is the completion-object the driver waits for
36125 + *
36126 + * 1) Driver sets up host->mrq and host->complete_what
36127 + * 2) Driver prepares the transfer
36128 + * 3) Driver enables interrupts
36129 + * 4) Driver starts transfer
36130 + * 5) Driver waits for host->complete_rquest
36131 + * 6) ISR checks for request status (errors and success)
36132 + * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
36133 + * 7) ISR completes host->complete_request
36134 + * 8) ISR disables interrupts
36135 + * 9) Driver wakes up and takes care of the request
36136 + *
36137 + * Note: "->error"-fields are expected to be set to 0 before the request
36138 + *       was issued by mmc.c - therefore they are only set, when an error
36139 + *       contition comes up
36140 + */
36141 +
36142 +static irqreturn_t s3cmci_irq(int irq, void *dev_id)
36143 +{
36144 +       struct s3cmci_host *host;
36145 +       struct mmc_command *cmd;
36146 +       u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk;
36147 +       u32 mci_cclear, mci_dclear;
36148 +       unsigned long iflags;
36149 +       int cardint = 0;
36150 +
36151 +       host = (struct s3cmci_host *)dev_id;
36152 +
36153 +       spin_lock_irqsave(&host->complete_lock, iflags);
36154 +
36155 +       mci_csta        = readl(host->base + S3C2410_SDICMDSTAT);
36156 +       mci_dsta        = readl(host->base + S3C2410_SDIDSTA);
36157 +       mci_dcnt        = readl(host->base + S3C2410_SDIDCNT);
36158 +       mci_fsta        = readl(host->base + S3C2410_SDIFSTA);
36159 +       mci_imsk        = readl(host->base + host->sdiimsk);
36160 +       mci_cclear      = 0;
36161 +       mci_dclear      = 0;
36162 +
36163 +       if ((host->complete_what == COMPLETION_NONE) ||
36164 +                       (host->complete_what == COMPLETION_FINALIZE)) {
36165 +               host->status = "nothing to complete";
36166 +               clear_imask(host);
36167 +               goto irq_out;
36168 +       }
36169 +
36170 +       if (!host->mrq) {
36171 +               host->status = "no active mrq";
36172 +               clear_imask(host);
36173 +               goto irq_out;
36174 +       }
36175 +
36176 +       cmd = host->cmd_is_stop?host->mrq->stop:host->mrq->cmd;
36177 +
36178 +       if (!cmd) {
36179 +               host->status = "no active cmd";
36180 +               clear_imask(host);
36181 +               goto irq_out;
36182 +       }
36183 +
36184 +       if (!host->dodma) {
36185 +               if ((host->pio_active == XFER_WRITE) &&
36186 +                               (mci_fsta & S3C2410_SDIFSTA_TFDET)) {
36187 +
36188 +                       disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
36189 +                       tasklet_schedule(&host->pio_tasklet);
36190 +                       host->status = "pio tx";
36191 +               }
36192 +
36193 +               if ((host->pio_active == XFER_READ) &&
36194 +                               (mci_fsta & S3C2410_SDIFSTA_RFDET)) {
36195 +
36196 +                       disable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF |
36197 +                                               S3C2410_SDIIMSK_RXFIFOLAST);
36198 +
36199 +                       tasklet_schedule(&host->pio_tasklet);
36200 +                       host->status = "pio rx";
36201 +               }
36202 +       }
36203 +
36204 +       if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
36205 +               cmd->error = -ETIMEDOUT;
36206 +               host->status = "error: command timeout";
36207 +               goto fail_transfer;
36208 +       }
36209 +
36210 +       if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) {
36211 +               if (host->complete_what == COMPLETION_CMDSENT) {
36212 +                       host->status = "ok: command sent";
36213 +                       goto close_transfer;
36214 +               }
36215 +
36216 +               mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT;
36217 +       }
36218 +
36219 +       if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) {
36220 +               if (cmd->flags & MMC_RSP_CRC) {
36221 +                       if (host->mrq->cmd->flags & MMC_RSP_136) {
36222 +                               dbg(host, dbg_irq, "fixup for chip bug: "
36223 +                                   "ignore CRC fail with long rsp\n");
36224 +                       } else {
36225 +                               cmd->error = -EILSEQ;
36226 +                               host->status = "error: bad command crc";
36227 +                               goto fail_transfer;
36228 +                       }
36229 +               }
36230 +
36231 +               mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL;
36232 +       }
36233 +
36234 +       if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) {
36235 +               if (host->complete_what == COMPLETION_RSPFIN) {
36236 +                       host->status = "ok: command response received";
36237 +                       goto close_transfer;
36238 +               }
36239 +
36240 +               if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
36241 +                       host->complete_what = COMPLETION_XFERFINISH;
36242 +
36243 +               mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN;
36244 +       }
36245 +
36246 +       /* errors handled after this point are only relevant
36247 +          when a data transfer is in progress */
36248 +
36249 +       if (!cmd->data)
36250 +               goto clear_status_bits;
36251 +
36252 +       /* Check for FIFO failure */
36253 +       if (host->is2440) {
36254 +               if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) {
36255 +                       host->mrq->data->error = -EIO;
36256 +                       host->status = "error: 2440 fifo failure";
36257 +                       goto fail_transfer;
36258 +               }
36259 +       } else {
36260 +               if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) {
36261 +                       cmd->data->error = -EIO;
36262 +                       host->status = "error:  fifo failure";
36263 +                       goto fail_transfer;
36264 +               }
36265 +       }
36266 +
36267 +       if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
36268 +               cmd->data->error = -EILSEQ;
36269 +               host->status = "error: bad data crc (outgoing)";
36270 +               goto fail_transfer;
36271 +       }
36272 +
36273 +       if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) {
36274 +               cmd->data->error = -EIO;
36275 +               host->status = "error: bad data crc (incoming)";
36276 +               goto fail_transfer;
36277 +       }
36278 +
36279 +       if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
36280 +               cmd->data->error = -ETIMEDOUT;
36281 +               host->status = "error: data timeout";
36282 +               goto fail_transfer;
36283 +       }
36284 +
36285 +       if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) {
36286 +               if (host->complete_what == COMPLETION_XFERFINISH) {
36287 +                       host->status = "ok: data transfer completed";
36288 +                       goto close_transfer;
36289 +               }
36290 +
36291 +               if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
36292 +                       host->complete_what = COMPLETION_RSPFIN;
36293 +
36294 +               mci_dclear |= S3C2410_SDIDSTA_XFERFINISH;
36295 +       }
36296 +
36297 +       if (mci_dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) {
36298 +               cardint = 1;
36299 +               mci_dclear |= S3C2410_SDIDSTA_SDIOIRQDETECT;
36300 +       }
36301 +
36302 +clear_status_bits:
36303 +       writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
36304 +       writel(mci_dclear, host->base + S3C2410_SDIDSTA);
36305 +
36306 +       goto irq_out;
36307 +
36308 +fail_transfer:
36309 +       host->pio_active = XFER_NONE;
36310 +
36311 +close_transfer:
36312 +       host->complete_what = COMPLETION_FINALIZE;
36313 +
36314 +       clear_imask(host);
36315 +       tasklet_schedule(&host->pio_tasklet);
36316 +
36317 +       goto irq_out;
36318 +
36319 +irq_out:
36320 +       dbg(host, dbg_irq, "csta:0x%08x dsta:0x%08x "
36321 +                          "fsta:0x%08x dcnt:0x%08x status:%s.\n",
36322 +                               mci_csta, mci_dsta, mci_fsta,
36323 +                               mci_dcnt, host->status);
36324 +
36325 +       spin_unlock_irqrestore(&host->complete_lock, iflags);
36326 +
36327 +       /* We have to delay this as it calls back into the driver */
36328 +       if (cardint)
36329 +               mmc_signal_sdio_irq(host->mmc);
36330 +
36331 +       return IRQ_HANDLED;
36332 +
36333 +}
36334 +
36335 +/*
36336 + * ISR for the CardDetect Pin
36337 +*/
36338 +
36339 +static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id)
36340 +{
36341 +       struct s3cmci_host *host = (struct s3cmci_host *)dev_id;
36342 +
36343 +       dbg(host, dbg_irq, "card detect\n");
36344 +
36345 +       mmc_detect_change(host->mmc, 500);
36346 +
36347 +       return IRQ_HANDLED;
36348 +}
36349 +
36350 +void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch, void *buf_id,
36351 +       int size, enum s3c2410_dma_buffresult result)
36352 +{
36353 +       unsigned long iflags;
36354 +       u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt;
36355 +       struct s3cmci_host *host = (struct s3cmci_host *)buf_id;
36356 +
36357 +       mci_csta        = readl(host->base + S3C2410_SDICMDSTAT);
36358 +       mci_dsta        = readl(host->base + S3C2410_SDIDSTA);
36359 +       mci_fsta        = readl(host->base + S3C2410_SDIFSTA);
36360 +       mci_dcnt        = readl(host->base + S3C2410_SDIDCNT);
36361 +
36362 +       if ((!host->mrq) || (!host->mrq) || (!host->mrq->data))
36363 +               return;
36364 +
36365 +       if (!host->dmatogo)
36366 +               return;
36367 +
36368 +       spin_lock_irqsave(&host->complete_lock, iflags);
36369 +
36370 +       if (result != S3C2410_RES_OK) {
36371 +               dbg(host, dbg_fail, "DMA FAILED: csta=0x%08x dsta=0x%08x "
36372 +                       "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n",
36373 +                       mci_csta, mci_dsta, mci_fsta,
36374 +                       mci_dcnt, result, host->dmatogo);
36375 +
36376 +               goto fail_request;
36377 +       }
36378 +
36379 +       host->dmatogo--;
36380 +       if (host->dmatogo) {
36381 +               dbg(host, dbg_dma, "DMA DONE  Size:%i DSTA:[%08x] "
36382 +                       "DCNT:[%08x] toGo:%u\n",
36383 +                       size, mci_dsta, mci_dcnt, host->dmatogo);
36384 +
36385 +               goto out;
36386 +       }
36387 +
36388 +       dbg(host, dbg_dma, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n",
36389 +               size, mci_dsta, mci_dcnt);
36390 +
36391 +       host->complete_what = COMPLETION_FINALIZE;
36392 +
36393 +out:
36394 +       tasklet_schedule(&host->pio_tasklet);
36395 +       spin_unlock_irqrestore(&host->complete_lock, iflags);
36396 +       return;
36397 +
36398 +
36399 +fail_request:
36400 +       host->mrq->data->error = -EIO;
36401 +       host->complete_what = COMPLETION_FINALIZE;
36402 +       writel(0, host->base + host->sdiimsk);
36403 +       goto out;
36404 +
36405 +}
36406 +
36407 +static void finalize_request(struct s3cmci_host *host)
36408 +{
36409 +       struct mmc_request *mrq = host->mrq;
36410 +       struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd;
36411 +       int debug_as_failure = 0;
36412 +
36413 +       if (host->complete_what != COMPLETION_FINALIZE)
36414 +               return;
36415 +
36416 +       if (!mrq)
36417 +               return;
36418 +
36419 +       if (cmd->data && (cmd->error == 0) &&
36420 +                 (cmd->data->error == 0)) {
36421 +
36422 +               if (host->dodma && (!host->dma_complete)) {
36423 +                       dbg(host, dbg_dma, "DMA Missing!\n");
36424 +                       return;
36425 +               }
36426 +       }
36427 +
36428 +       /* Read response */
36429 +       cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0);
36430 +       cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1);
36431 +       cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2);
36432 +       cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3);
36433 +
36434 +       /* reset clock speed, as it could still be set low for */
36435 +       writel(host->sdipre, host->base + S3C2410_SDIPRE);
36436 +
36437 +       if (cmd->error)
36438 +               debug_as_failure = 1;
36439 +
36440 +       if (cmd->data && cmd->data->error)
36441 +               debug_as_failure = 1;
36442 +
36443 +#ifdef CONFIG_MMC_DEBUG
36444 +       dbg_dumpcmd(host, cmd, debug_as_failure);
36445 +#endif
36446 +       /* Cleanup controller */
36447 +       writel(0, host->base + S3C2410_SDICMDARG);
36448 +       writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
36449 +       writel(0, host->base + S3C2410_SDICMDCON);
36450 +       writel(0, host->base + host->sdiimsk);
36451 +
36452 +       if (cmd->data && cmd->error)
36453 +               cmd->data->error = cmd->error;
36454 +
36455 +       if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
36456 +               host->cmd_is_stop = 1;
36457 +               s3cmci_send_request(host->mmc);
36458 +               return;
36459 +       }
36460 +
36461 +       /* If we have no data transfer we are finished here */
36462 +       if (!mrq->data)
36463 +               goto request_done;
36464 +
36465 +       /* Calulate the amout of bytes transfer, but only if there was
36466 +        * no error */
36467 +       if (mrq->data->error == 0)
36468 +               mrq->data->bytes_xfered =
36469 +                       (mrq->data->blocks * mrq->data->blksz);
36470 +       else
36471 +               mrq->data->bytes_xfered = 0;
36472 +
36473 +       /* If we had an error while transfering data we flush the
36474 +        * DMA channel and the fifo to clear out any garbage */
36475 +       if (mrq->data->error) {
36476 +               if (host->dodma)
36477 +                       s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
36478 +
36479 +               if (host->is2440) {
36480 +                       /* Clear failure register and reset fifo */
36481 +                       writel(S3C2440_SDIFSTA_FIFORESET |
36482 +                              S3C2440_SDIFSTA_FIFOFAIL,
36483 +                              host->base + S3C2410_SDIFSTA);
36484 +               } else {
36485 +                       u32 mci_con;
36486 +
36487 +                       /* reset fifo */
36488 +                       mci_con = readl(host->base + S3C2410_SDICON);
36489 +                       mci_con |= S3C2410_SDICON_FIFORESET;
36490 +
36491 +                       writel(mci_con, host->base + S3C2410_SDICON);
36492 +               }
36493 +       }
36494 +
36495 +request_done:
36496 +       __s3cmci_disable_clock(host);
36497 +       host->complete_what = COMPLETION_NONE;
36498 +       host->mrq = NULL;
36499 +       mmc_request_done(host->mmc, mrq);
36500 +}
36501 +
36502 +
36503 +void s3cmci_dma_setup(struct s3cmci_host *host, enum s3c2410_dmasrc source)
36504 +{
36505 +       static int setup_ok;
36506 +       static enum s3c2410_dmasrc last_source = -1;
36507 +
36508 +       if (last_source == source)
36509 +               return;
36510 +
36511 +       last_source = source;
36512 +
36513 +       s3c2410_dma_devconfig(host->dma, source, 3,
36514 +               host->mem->start + host->sdidata);
36515 +
36516 +       if (!setup_ok) {
36517 +               s3c2410_dma_config(host->dma, 4,
36518 +                       (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
36519 +               s3c2410_dma_set_buffdone_fn(host->dma,
36520 +                                           s3cmci_dma_done_callback);
36521 +               s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
36522 +               setup_ok = 1;
36523 +       }
36524 +}
36525 +
36526 +static void s3cmci_send_command(struct s3cmci_host *host,
36527 +                                       struct mmc_command *cmd)
36528 +{
36529 +       u32 ccon, imsk;
36530 +
36531 +       imsk  = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT |
36532 +               S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT |
36533 +               S3C2410_SDIIMSK_RESPONSECRC;
36534 +
36535 +       enable_imask(host, imsk);
36536 +
36537 +       if (cmd->data)
36538 +               host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
36539 +       else if (cmd->flags & MMC_RSP_PRESENT)
36540 +               host->complete_what = COMPLETION_RSPFIN;
36541 +       else
36542 +               host->complete_what = COMPLETION_CMDSENT;
36543 +
36544 +       writel(cmd->arg, host->base + S3C2410_SDICMDARG);
36545 +
36546 +       ccon = cmd->opcode & S3C2410_SDICMDCON_INDEX;
36547 +       ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
36548 +
36549 +       if (cmd->flags & MMC_RSP_PRESENT)
36550 +               ccon |= S3C2410_SDICMDCON_WAITRSP;
36551 +
36552 +       if (cmd->flags & MMC_RSP_136)
36553 +               ccon |= S3C2410_SDICMDCON_LONGRSP;
36554 +
36555 +       writel(ccon, host->base + S3C2410_SDICMDCON);
36556 +}
36557 +
36558 +static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data)
36559 +{
36560 +       u32 dcon, imsk, stoptries = 3;
36561 +
36562 +       /* write DCON register */
36563 +
36564 +       if (!data) {
36565 +               writel(0, host->base + S3C2410_SDIDCON);
36566 +               return 0;
36567 +       }
36568 +
36569 +       while (readl(host->base + S3C2410_SDIDSTA) &
36570 +               (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
36571 +
36572 +               dbg(host, dbg_err,
36573 +                   "mci_setup_data() transfer stillin progress.\n");
36574 +
36575 +               writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
36576 +               s3cmci_reset(host);
36577 +
36578 +               if (0 == (stoptries--)) {
36579 +#ifdef CONFIG_MMC_DEBUG
36580 +                       dbg_dumpregs(host, "DRF");
36581 +#endif
36582 +
36583 +                       return -EINVAL;
36584 +               }
36585 +       }
36586 +
36587 +       dcon  = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK;
36588 +
36589 +       if (host->dodma)
36590 +               dcon |= S3C2410_SDIDCON_DMAEN;
36591 +
36592 +       if (host->bus_width == MMC_BUS_WIDTH_4)
36593 +               dcon |= S3C2410_SDIDCON_WIDEBUS;
36594 +
36595 +       if (!(data->flags & MMC_DATA_STREAM))
36596 +               dcon |= S3C2410_SDIDCON_BLOCKMODE;
36597 +
36598 +       if (data->flags & MMC_DATA_WRITE) {
36599 +               dcon |= S3C2410_SDIDCON_TXAFTERRESP;
36600 +               dcon |= S3C2410_SDIDCON_XFER_TXSTART;
36601 +       }
36602 +
36603 +       if (data->flags & MMC_DATA_READ) {
36604 +               dcon |= S3C2410_SDIDCON_RXAFTERCMD;
36605 +               dcon |= S3C2410_SDIDCON_XFER_RXSTART;
36606 +       }
36607 +
36608 +       if (host->is2440) {
36609 +               dcon |= S3C2440_SDIDCON_DS_WORD;
36610 +               dcon |= S3C2440_SDIDCON_DATSTART;
36611 +       }
36612 +
36613 +       writel(dcon, host->base + S3C2410_SDIDCON);
36614 +
36615 +       /* write BSIZE register */
36616 +
36617 +       writel(data->blksz, host->base + S3C2410_SDIBSIZE);
36618 +
36619 +       /* add to IMASK register */
36620 +       imsk =  S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
36621 +               S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
36622 +
36623 +       enable_imask(host, imsk);
36624 +
36625 +       /* write TIMER register */
36626 +
36627 +       if (host->is2440) {
36628 +               writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
36629 +       } else {
36630 +               writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
36631 +
36632 +               /* FIX: set slow clock to prevent timeouts on read */
36633 +               if (data->flags & MMC_DATA_READ)
36634 +                       writel(0xFF, host->base + S3C2410_SDIPRE);
36635 +       }
36636 +
36637 +       return 0;
36638 +}
36639 +
36640 +static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data)
36641 +{
36642 +       int rw = (data->flags & MMC_DATA_WRITE)?1:0;
36643 +
36644 +       if (rw != ((data->flags & MMC_DATA_READ)?0:1))
36645 +               return -EINVAL;
36646 +
36647 +       host->pio_sgptr = 0;
36648 +       host->pio_bytes = 0;
36649 +       host->pio_count = 0;
36650 +       host->pio_active = rw?XFER_WRITE:XFER_READ;
36651 +
36652 +       if (rw) {
36653 +               do_pio_write(host);
36654 +               enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
36655 +       } else {
36656 +               enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
36657 +                       | S3C2410_SDIIMSK_RXFIFOLAST);
36658 +       }
36659 +
36660 +       return 0;
36661 +}
36662 +
36663 +static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data)
36664 +{
36665 +       int dma_len, i;
36666 +
36667 +       int rw = (data->flags & MMC_DATA_WRITE)?1:0;
36668 +
36669 +       if (rw != ((data->flags & MMC_DATA_READ)?0:1))
36670 +               return -EINVAL;
36671 +
36672 +       s3cmci_dma_setup(host, rw?S3C2410_DMASRC_MEM:S3C2410_DMASRC_HW);
36673 +       s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
36674 +
36675 +       dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
36676 +                               (rw)?DMA_TO_DEVICE:DMA_FROM_DEVICE);
36677 +
36678 +
36679 +       if (dma_len == 0)
36680 +               return -ENOMEM;
36681 +
36682 +       host->dma_complete = 0;
36683 +       host->dmatogo = dma_len;
36684 +
36685 +       for (i = 0; i < dma_len; i++) {
36686 +               int res;
36687 +
36688 +               dbg(host, dbg_dma, "enqueue %i:%u@%u\n", i,
36689 +                       sg_dma_address(&data->sg[i]),
36690 +                       sg_dma_len(&data->sg[i]));
36691 +
36692 +               res = s3c2410_dma_enqueue(host->dma, (void *) host,
36693 +                               sg_dma_address(&data->sg[i]),
36694 +                               sg_dma_len(&data->sg[i]));
36695 +
36696 +               if (res) {
36697 +                       s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
36698 +                       return -EBUSY;
36699 +               }
36700 +       }
36701 +
36702 +       s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_START);
36703 +
36704 +       return 0;
36705 +}
36706 +
36707 +static void s3cmci_send_request(struct mmc_host *mmc)
36708 +{
36709 +       struct s3cmci_host *host = mmc_priv(mmc);
36710 +       struct mmc_request *mrq = host->mrq;
36711 +       struct mmc_command *cmd = host->cmd_is_stop?mrq->stop:mrq->cmd;
36712 +       int pre;
36713 +
36714 +       host->ccnt++;
36715 +#ifdef CONFIG_MMC_DEBUG
36716 +       prepare_dbgmsg(host, cmd, host->cmd_is_stop);
36717 +#endif
36718 +       /* clear command, data and fifo status registers;
36719 +        * Fifo clear only necessary on 2440, but doesn't hurt on 2410 */
36720 +       writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
36721 +       writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
36722 +       writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
36723 +
36724 +       if (cmd->data) {
36725 +               int res;
36726 +               res = s3cmci_setup_data(host, cmd->data);
36727 +
36728 +               host->dcnt++;
36729 +
36730 +               if (res) {
36731 +                       cmd->error = -EIO;
36732 +                       cmd->data->error = -EIO;
36733 +
36734 +                       mmc_request_done(mmc, mrq);
36735 +                       return;
36736 +               }
36737 +
36738 +
36739 +               if (host->dodma)
36740 +                       res = s3cmci_prepare_dma(host, cmd->data);
36741 +               else
36742 +                       res = s3cmci_prepare_pio(host, cmd->data);
36743 +
36744 +               if (res) {
36745 +                       cmd->error = -EIO;
36746 +                       cmd->data->error = -EIO;
36747 +
36748 +                       mmc_request_done(mmc, mrq);
36749 +                       return;
36750 +               }
36751 +
36752 +       }
36753 +
36754 +       /* establish the correct prescaler depending on the sd_slow_ratio */
36755 +
36756 +       if ((sd_slow_ratio > 1) &&
36757 +           host->pdata->use_slow && (host->pdata->use_slow)()) {
36758 +               /* compute the slower speed */
36759 +               pre = host->prescaler * sd_slow_ratio;
36760 +               if (pre > 255)
36761 +                       pre = 255;
36762 +       } else {
36763 +               /* use the normal speed */
36764 +               pre = host->prescaler;
36765 +       }
36766 +
36767 +       if (host->sdipre != pre) {
36768 +               dbg(host, dbg_conf, "prescaler changed: %d -> %d\n",
36769 +                   (int)host->sdipre, pre);
36770 +               host->sdipre = pre;
36771 +               writel(host->sdipre, host->base + S3C2410_SDIPRE);
36772 +       }
36773 +
36774 +       __s3cmci_enable_clock(host);
36775 +       s3cmci_send_command(host, cmd);
36776 +       enable_irq(host->irq);
36777 +}
36778 +
36779 +static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
36780 +{
36781 +       struct s3cmci_host *host = mmc_priv(mmc);
36782 +
36783 +       host->cmd_is_stop = 0;
36784 +       host->mrq = mrq;
36785 +
36786 +       s3cmci_send_request(mmc);
36787 +}
36788 +
36789 +static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
36790 +{
36791 +       struct s3cmci_host *host = mmc_priv(mmc);
36792 +       u32 mci_psc, mci_con;
36793 +
36794 +       /* Set power */
36795 +       mci_con = readl(host->base + S3C2410_SDICON);
36796 +       switch (ios->power_mode) {
36797 +       case MMC_POWER_ON:
36798 +       case MMC_POWER_UP:
36799 +               s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
36800 +               s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
36801 +               s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
36802 +               s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
36803 +               s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
36804 +               s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
36805 +
36806 +               if (host->pdata->set_power)
36807 +                       host->pdata->set_power(ios->power_mode, ios->vdd);
36808 +
36809 +               if (!host->is2440)
36810 +                       mci_con |= S3C2410_SDICON_FIFORESET;
36811 +
36812 +               break;
36813 +
36814 +       case MMC_POWER_OFF:
36815 +       default:
36816 +               s3c2410_gpio_setpin(S3C2410_GPE5, 0);
36817 +               s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
36818 +
36819 +               if (host->pdata->set_power)
36820 +                       host->pdata->set_power(ios->power_mode, ios->vdd);
36821 +
36822 +               if (host->is2440)
36823 +                       mci_con |= S3C2440_SDICON_SDRESET;
36824 +
36825 +               break;
36826 +       }
36827 +
36828 +       /* Set clock */
36829 +       for (mci_psc = 0; mci_psc < 255; mci_psc++) {
36830 +               host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
36831 +
36832 +               if (host->real_rate <= ios->clock)
36833 +                       break;
36834 +       }
36835 +
36836 +       if (mci_psc > 255)
36837 +               mci_psc = 255;
36838 +       host->prescaler = mci_psc;
36839 +       host->sdipre = mci_psc;
36840 +
36841 +       writel(host->prescaler, host->base + S3C2410_SDIPRE);
36842 +
36843 +       /* If requested clock is 0, real_rate will be 0, too */
36844 +       if (ios->clock == 0)
36845 +               host->real_rate = 0;
36846 +
36847 +       /* Set CLOCK_ENABLE */
36848 +       if (ios->clock)
36849 +               mci_con |= S3C2410_SDICON_CLOCKTYPE;
36850 +       else
36851 +               mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
36852 +
36853 +       writel(mci_con, host->base + S3C2410_SDICON);
36854 +
36855 +       if ((ios->power_mode == MMC_POWER_ON)
36856 +               || (ios->power_mode == MMC_POWER_UP)) {
36857 +
36858 +               dbg(host, dbg_conf,
36859 +                   "powered (vdd: %d), clk: %lukHz div=%lu (req: %ukHz),"
36860 +                   " bus width: %d\n", ios->vdd, host->real_rate / 1000,
36861 +                   host->clk_div * (host->prescaler + 1),
36862 +                   ios->clock / 1000, ios->bus_width);
36863 +
36864 +               /* After power-up, we need to give the card 74 clocks to
36865 +                * initialize, so sleep just a moment before we disable
36866 +                * the clock again.
36867 +                */
36868 +               if (ios->clock)
36869 +                       msleep(1);
36870 +
36871 +       } else {
36872 +               dbg(host, dbg_conf, "powered down.\n");
36873 +       }
36874 +
36875 +       host->bus_width = ios->bus_width;
36876 +
36877 +       /* No need to run the clock until we have data to move */
36878 +       if (!sd_idleclk) {
36879 +               __s3cmci_disable_clock(host);
36880 +               dbg(host, dbg_conf, "SD clock disabled when idle.\n");
36881 +       }
36882 +}
36883 +
36884 +static void s3cmci_reset(struct s3cmci_host *host)
36885 +{
36886 +       u32 con = readl(host->base + S3C2410_SDICON);
36887 +
36888 +       con |= S3C2440_SDICON_SDRESET;
36889 +
36890 +       writel(con, host->base + S3C2410_SDICON);
36891 +}
36892 +
36893 +static int s3cmci_get_ro(struct mmc_host *mmc)
36894 +{
36895 +       struct s3cmci_host *host = mmc_priv(mmc);
36896 +
36897 +       if (host->pdata->gpio_wprotect == 0)
36898 +               return 0;
36899 +
36900 +       return s3c2410_gpio_getpin(host->pdata->gpio_wprotect);
36901 +}
36902 +
36903 +static void s3cmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
36904 +{
36905 +       struct s3cmci_host *host = mmc_priv(mmc);
36906 +
36907 +       if (enable)
36908 +               enable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
36909 +       else
36910 +               disable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
36911 +}
36912 +
36913 +static struct mmc_host_ops s3cmci_ops = {
36914 +       .request        = s3cmci_request,
36915 +       .set_ios        = s3cmci_set_ios,
36916 +       .get_ro         = s3cmci_get_ro,
36917 +       .enable_sdio_irq = s3cmci_enable_sdio_irq,
36918 +};
36919 +
36920 +static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
36921 +       .do_dma         = 0,
36922 +       .gpio_detect    = 0,
36923 +       .set_power      = NULL,
36924 +       .ocr_avail      = MMC_VDD_32_33,
36925 +};
36926 +
36927 +static int s3cmci_probe(struct platform_device *pdev, int is2440)
36928 +{
36929 +       struct mmc_host         *mmc;
36930 +       struct s3cmci_host      *host;
36931 +
36932 +       int ret;
36933 +
36934 +       mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
36935 +       if (!mmc) {
36936 +               ret = -ENOMEM;
36937 +               goto probe_out;
36938 +       }
36939 +
36940 +       host = mmc_priv(mmc);
36941 +       host->mmc       = mmc;
36942 +       host->pdev      = pdev;
36943 +
36944 +       host->pdata = pdev->dev.platform_data;
36945 +       if (!host->pdata) {
36946 +               pdev->dev.platform_data = &s3cmci_def_pdata;
36947 +               host->pdata = &s3cmci_def_pdata;
36948 +       }
36949 +
36950 +       spin_lock_init(&host->complete_lock);
36951 +       tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
36952 +       if (is2440) {
36953 +               host->is2440    = 1;
36954 +               host->sdiimsk   = S3C2440_SDIIMSK;
36955 +               host->sdidata   = S3C2440_SDIDATA;
36956 +               host->sdidata_b = S3C2440_SDIDATA_BYTE;
36957 +               host->clk_div   = 1;
36958 +       } else {
36959 +               host->is2440    = 0;
36960 +               host->sdiimsk   = S3C2410_SDIIMSK;
36961 +               host->sdidata   = S3C2410_SDIDATA;
36962 +               host->sdidata_b = S3C2410_SDIDATA_BYTE;
36963 +               host->clk_div   = 2;
36964 +       }
36965 +       host->dodma             = host->pdata->do_dma;
36966 +       host->complete_what     = COMPLETION_NONE;
36967 +       host->pio_active        = XFER_NONE;
36968 +
36969 +       host->dma               = DMACH_SDI;
36970 +       host->irq_cd = s3c2410_gpio_getirq(host->pdata->gpio_detect);
36971 +       s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ);
36972 +
36973 +       host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
36974 +       if (!host->mem) {
36975 +               dev_err(&pdev->dev,
36976 +                       "failed to get io memory region resouce.\n");
36977 +
36978 +               ret = -ENOENT;
36979 +               goto probe_free_host;
36980 +       }
36981 +
36982 +       host->mem = request_mem_region(host->mem->start,
36983 +               RESSIZE(host->mem), pdev->name);
36984 +
36985 +       if (!host->mem) {
36986 +               dev_err(&pdev->dev, "failed to request io memory region.\n");
36987 +               ret = -ENOENT;
36988 +               goto probe_free_host;
36989 +       }
36990 +
36991 +       host->base = ioremap(host->mem->start, RESSIZE(host->mem));
36992 +       if (host->base == 0) {
36993 +               dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
36994 +               ret = -EINVAL;
36995 +               goto probe_free_mem_region;
36996 +       }
36997 +
36998 +       host->irq = platform_get_irq(pdev, 0);
36999 +       if (host->irq == 0) {
37000 +               dev_err(&pdev->dev, "failed to get interrupt resouce.\n");
37001 +               ret = -EINVAL;
37002 +               goto probe_iounmap;
37003 +       }
37004 +
37005 +       if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) {
37006 +               dev_err(&pdev->dev, "failed to request mci interrupt.\n");
37007 +               ret = -ENOENT;
37008 +               goto probe_iounmap;
37009 +       }
37010 +
37011 +       disable_irq(host->irq);
37012 +
37013 +       s3c2410_gpio_cfgpin(host->pdata->gpio_detect, S3C2410_GPIO_IRQ);
37014 +       set_irq_type(host->irq_cd, IRQT_BOTHEDGE);
37015 +
37016 +       if (request_irq(host->irq_cd, s3cmci_irq_cd, 0, DRIVER_NAME, host)) {
37017 +               dev_err(&pdev->dev,
37018 +                       "failed to request card detect interrupt.\n");
37019 +
37020 +               ret = -ENOENT;
37021 +               goto probe_free_irq;
37022 +       }
37023 +
37024 +       if (host->pdata->gpio_wprotect)
37025 +               s3c2410_gpio_cfgpin(host->pdata->gpio_wprotect,
37026 +                                   S3C2410_GPIO_INPUT);
37027 +
37028 +       if (s3c2410_dma_request(host->dma, &s3cmci_dma_client, NULL)) {
37029 +               dev_err(&pdev->dev, "unable to get DMA channel.\n");
37030 +               ret = -EBUSY;
37031 +               goto probe_free_irq_cd;
37032 +       }
37033 +
37034 +       host->clk = clk_get(&pdev->dev, "sdi");
37035 +       if (IS_ERR(host->clk)) {
37036 +               dev_err(&pdev->dev, "failed to find clock source.\n");
37037 +               ret = PTR_ERR(host->clk);
37038 +               host->clk = NULL;
37039 +               goto probe_free_host;
37040 +       }
37041 +
37042 +       ret = clk_enable(host->clk);
37043 +       if (ret) {
37044 +               dev_err(&pdev->dev, "failed to enable clock source.\n");
37045 +               goto clk_free;
37046 +       }
37047 +
37048 +       host->clk_rate = clk_get_rate(host->clk);
37049 +
37050 +       mmc->ops        = &s3cmci_ops;
37051 +       mmc->ocr_avail  = host->pdata->ocr_avail;
37052 +       mmc->caps       = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
37053 +       mmc->f_min      = host->clk_rate / (host->clk_div * 256);
37054 +       mmc->f_max      = sd_max_clk;
37055 +
37056 +       mmc->max_blk_count      = 4095;
37057 +       mmc->max_blk_size       = 4095;
37058 +       mmc->max_req_size       = 4095 * 512;
37059 +       mmc->max_seg_size       = mmc->max_req_size;
37060 +
37061 +       mmc->max_phys_segs      = 128;
37062 +       mmc->max_hw_segs        = 128;
37063 +
37064 +       dbg(host, dbg_debug, "probe: mode:%s mapped mci_base:%p irq:%u "
37065 +           "irq_cd:%u dma:%u.\n", (host->is2440?"2440":""),
37066 +           host->base, host->irq, host->irq_cd, host->dma);
37067 +
37068 +       ret = mmc_add_host(mmc);
37069 +       if (ret) {
37070 +               dev_err(&pdev->dev, "failed to add mmc host.\n");
37071 +               goto free_dmabuf;
37072 +       }
37073 +
37074 +       platform_set_drvdata(pdev, mmc);
37075 +
37076 +       dev_info(&pdev->dev, "initialisation done.\n");
37077 +       return 0;
37078 +
37079 + free_dmabuf:
37080 +       clk_disable(host->clk);
37081 +
37082 + clk_free:
37083 +       clk_put(host->clk);
37084 +
37085 + probe_free_irq_cd:
37086 +       free_irq(host->irq_cd, host);
37087 +
37088 + probe_free_irq:
37089 +       free_irq(host->irq, host);
37090 +
37091 + probe_iounmap:
37092 +       iounmap(host->base);
37093 +
37094 + probe_free_mem_region:
37095 +       release_mem_region(host->mem->start, RESSIZE(host->mem));
37096 +
37097 + probe_free_host:
37098 +       mmc_free_host(mmc);
37099 + probe_out:
37100 +       return ret;
37101 +}
37102 +
37103 +static int s3cmci_remove(struct platform_device *pdev)
37104 +{
37105 +       struct mmc_host         *mmc  = platform_get_drvdata(pdev);
37106 +       struct s3cmci_host      *host = mmc_priv(mmc);
37107 +
37108 +       mmc_remove_host(mmc);
37109 +       clk_disable(host->clk);
37110 +       clk_put(host->clk);
37111 +       s3c2410_dma_free(host->dma, &s3cmci_dma_client);
37112 +       free_irq(host->irq_cd, host);
37113 +       free_irq(host->irq, host);
37114 +       iounmap(host->base);
37115 +       release_mem_region(host->mem->start, RESSIZE(host->mem));
37116 +       mmc_free_host(mmc);
37117 +
37118 +       return 0;
37119 +}
37120 +
37121 +static int s3cmci_probe_2410(struct platform_device *dev)
37122 +{
37123 +       return s3cmci_probe(dev, 0);
37124 +}
37125 +
37126 +static int s3cmci_probe_2412(struct platform_device *dev)
37127 +{
37128 +       return s3cmci_probe(dev, 1);
37129 +}
37130 +
37131 +static int s3cmci_probe_2440(struct platform_device *dev)
37132 +{
37133 +       return s3cmci_probe(dev, 1);
37134 +}
37135 +
37136 +#ifdef CONFIG_PM
37137 +
37138 +static int s3cmci_suspend(struct platform_device *dev, pm_message_t state)
37139 +{
37140 +       struct mmc_host *mmc = platform_get_drvdata(dev);
37141 +       struct s3cmci_host *host = mmc_priv(mmc);
37142 +       int ret;
37143 +
37144 +       /* Ensure clock is running so it will be running on resume */
37145 +       __s3cmci_enable_clock(host);
37146 +
37147 +       /* We will do more commands, make sure the clock stays running,
37148 +        * and save our state so that we can restore it on resume.
37149 +        */
37150 +       suspend_sd_idleclk = sd_idleclk;
37151 +       sd_idleclk = 1;
37152 +
37153 +       ret = mmc_suspend_host(mmc, state);
37154 +
37155 +       /* so that when we resume, we use any modified max rate */
37156 +       mmc->f_max = sd_max_clk;
37157 +
37158 +       return ret;
37159 +}
37160 +
37161 +static int s3cmci_resume(struct platform_device *dev)
37162 +{
37163 +       struct mmc_host *mmc = platform_get_drvdata(dev);
37164 +
37165 +       /* Put the sd_idleclk state back to what it was */
37166 +       sd_idleclk = suspend_sd_idleclk;
37167 +
37168 +       return mmc_resume_host(mmc);
37169 +}
37170 +
37171 +#else /* CONFIG_PM */
37172 +#define s3cmci_suspend NULL
37173 +#define s3cmci_resume NULL
37174 +#endif /* CONFIG_PM */
37175 +
37176 +
37177 +static struct platform_driver s3cmci_driver_2410 = {
37178 +       .driver.name    = "s3c2410-sdi",
37179 +       .probe          = s3cmci_probe_2410,
37180 +       .remove         = s3cmci_remove,
37181 +       .suspend        = s3cmci_suspend,
37182 +       .resume         = s3cmci_resume,
37183 +};
37184 +
37185 +static struct platform_driver s3cmci_driver_2412 = {
37186 +       .driver.name    = "s3c2412-sdi",
37187 +       .probe          = s3cmci_probe_2412,
37188 +       .remove         = s3cmci_remove,
37189 +       .suspend        = s3cmci_suspend,
37190 +       .resume         = s3cmci_resume,
37191 +};
37192 +
37193 +static struct platform_driver s3cmci_driver_2440 = {
37194 +       .driver.name    = "s3c2440-sdi",
37195 +       .probe          = s3cmci_probe_2440,
37196 +       .remove         = s3cmci_remove,
37197 +       .suspend        = s3cmci_suspend,
37198 +       .resume         = s3cmci_resume,
37199 +};
37200 +
37201 +
37202 +static int __init s3cmci_init(void)
37203 +{
37204 +       spin_lock_init(&clock_lock);
37205 +       platform_driver_register(&s3cmci_driver_2410);
37206 +       platform_driver_register(&s3cmci_driver_2412);
37207 +       platform_driver_register(&s3cmci_driver_2440);
37208 +       return 0;
37209 +}
37210 +
37211 +static void __exit s3cmci_exit(void)
37212 +{
37213 +       platform_driver_unregister(&s3cmci_driver_2410);
37214 +       platform_driver_unregister(&s3cmci_driver_2412);
37215 +       platform_driver_unregister(&s3cmci_driver_2440);
37216 +}
37217 +
37218 +module_init(s3cmci_init);
37219 +module_exit(s3cmci_exit);
37220 +
37221 +MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver");
37222 +MODULE_LICENSE("GPL");
37223 +MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>");
37224 Index: linux-2.6.24.7/drivers/mmc/host/s3cmci.h
37225 ===================================================================
37226 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
37227 +++ linux-2.6.24.7/drivers/mmc/host/s3cmci.h    2008-12-11 22:46:49.000000000 +0100
37228 @@ -0,0 +1,70 @@
37229 +/*
37230 + *  linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
37231 + *
37232 + *  Copyright (C) 2004-2006 Thomas Kleffel, All Rights Reserved.
37233 + *
37234 + * This program is free software; you can redistribute it and/or modify
37235 + * it under the terms of the GNU General Public License version 2 as
37236 + * published by the Free Software Foundation.
37237 + */
37238 +
37239 +enum s3cmci_waitfor {
37240 +       COMPLETION_NONE,
37241 +       COMPLETION_FINALIZE,
37242 +       COMPLETION_CMDSENT,
37243 +       COMPLETION_RSPFIN,
37244 +       COMPLETION_XFERFINISH,
37245 +       COMPLETION_XFERFINISH_RSPFIN,
37246 +};
37247 +
37248 +struct s3cmci_host {
37249 +       struct platform_device  *pdev;
37250 +       struct s3c24xx_mci_pdata *pdata;
37251 +       struct mmc_host         *mmc;
37252 +       struct resource         *mem;
37253 +       struct clk              *clk;
37254 +       void __iomem            *base;
37255 +       int                     irq;
37256 +       int                     irq_cd;
37257 +       int                     dma;
37258 +
37259 +       unsigned long           clk_rate;
37260 +       unsigned long           clk_div;
37261 +       unsigned long           real_rate;
37262 +       u8                      prescaler;
37263 +       u8                      sdipre;
37264 +
37265 +       int                     is2440;
37266 +       unsigned                sdiimsk;
37267 +       unsigned                sdidata;
37268 +       unsigned                sdidata_b;
37269 +       int                     dodma;
37270 +
37271 +       int                     dmatogo;
37272 +
37273 +       struct mmc_request      *mrq;
37274 +       int                     cmd_is_stop;
37275 +
37276 +       spinlock_t              complete_lock;
37277 +       enum s3cmci_waitfor     complete_what;
37278 +
37279 +       int                     dma_complete;
37280 +
37281 +       u32                     pio_sgptr;
37282 +       u32                     pio_bytes;
37283 +       u32                     pio_count;
37284 +       u8                      *pio_ptr;
37285 +#define XFER_NONE 0
37286 +#define XFER_READ 1
37287 +#define XFER_WRITE 2
37288 +       u32                     pio_active;
37289 +
37290 +       int                     bus_width;
37291 +
37292 +       char                    dbgmsg_cmd[301];
37293 +       char                    dbgmsg_dat[301];
37294 +       char                    *status;
37295 +
37296 +       unsigned int            ccnt, dcnt;
37297 +       struct tasklet_struct   pio_tasklet;
37298 +};
37299 Index: linux-2.6.24.7/drivers/mtd/nand/nand_bbt.c
37300 ===================================================================
37301 --- linux-2.6.24.7.orig/drivers/mtd/nand/nand_bbt.c     2008-12-11 22:46:07.000000000 +0100
37302 +++ linux-2.6.24.7/drivers/mtd/nand/nand_bbt.c  2008-12-11 22:46:49.000000000 +0100
37303 @@ -430,8 +430,10 @@ static int create_bbt(struct mtd_info *m
37304
37305                 if (ret) {
37306                         this->bbt[i >> 3] |= 0x03 << (i & 0x6);
37307 +#if 0
37308                         printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
37309                                i >> 1, (unsigned int)from);
37310 +#endif
37311                         mtd->ecc_stats.badblocks++;
37312                 }
37313
37314 Index: linux-2.6.24.7/drivers/mtd/nand/s3c2410.c
37315 ===================================================================
37316 --- linux-2.6.24.7.orig/drivers/mtd/nand/s3c2410.c      2008-12-11 22:46:07.000000000 +0100
37317 +++ linux-2.6.24.7/drivers/mtd/nand/s3c2410.c   2008-12-11 22:46:49.000000000 +0100
37318 @@ -158,6 +158,10 @@ static int s3c_nand_calc_rate(int wanted
37319  {
37320         int result;
37321
37322 +       /* Tacls can be 0ns in some cases */
37323 +       if (wanted == 0)
37324 +               return 0;
37325 +
37326         result = (wanted * clk) / NS_IN_KHZ;
37327         result++;
37328
37329 @@ -168,9 +172,6 @@ static int s3c_nand_calc_rate(int wanted
37330                 return -1;
37331         }
37332
37333 -       if (result < 1)
37334 -               result = 1;
37335 -
37336         return result;
37337  }
37338
37339 @@ -202,7 +203,7 @@ static int s3c2410_nand_inithw(struct s3
37340                 twrph1 = 8;
37341         }
37342
37343 -       if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
37344 +       if (tacls < 0 || twrph0 < 1 || twrph1 < 1) {
37345                 dev_err(info->device, "cannot get suitable timings\n");
37346                 return -EINVAL;
37347         }
37348 @@ -213,14 +214,14 @@ static int s3c2410_nand_inithw(struct s3
37349         switch (info->cpu_type) {
37350         case TYPE_S3C2410:
37351                 cfg = S3C2410_NFCONF_EN;
37352 -               cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
37353 +               cfg |= S3C2410_NFCONF_TACLS(tacls);
37354                 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
37355                 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
37356                 break;
37357
37358         case TYPE_S3C2440:
37359         case TYPE_S3C2412:
37360 -               cfg = S3C2440_NFCONF_TACLS(tacls - 1);
37361 +               cfg = S3C2440_NFCONF_TACLS(tacls);
37362                 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
37363                 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
37364
37365 @@ -364,23 +365,21 @@ static int s3c2410_nand_correct_data(str
37366             ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) {
37367                 /* calculate the bit position of the error */
37368
37369 -               bit  = (diff2 >> 2) & 1;
37370 -               bit |= (diff2 >> 3) & 2;
37371 -               bit |= (diff2 >> 4) & 4;
37372 +               bit  = ((diff2 >> 3) & 1) |
37373 +                      ((diff2 >> 4) & 2) |
37374 +                      ((diff2 >> 5) & 4);
37375
37376                 /* calculate the byte position of the error */
37377
37378 -               byte  = (diff1 << 1) & 0x80;
37379 -               byte |= (diff1 << 2) & 0x40;
37380 -               byte |= (diff1 << 3) & 0x20;
37381 -               byte |= (diff1 << 4) & 0x10;
37382 -
37383 -               byte |= (diff0 >> 3) & 0x08;
37384 -               byte |= (diff0 >> 2) & 0x04;
37385 -               byte |= (diff0 >> 1) & 0x02;
37386 -               byte |= (diff0 >> 0) & 0x01;
37387 -
37388 -               byte |= (diff2 << 8) & 0x100;
37389 +               byte = ((diff2 << 7) & 0x100) |
37390 +                      ((diff1 << 0) & 0x80)  |
37391 +                      ((diff1 << 1) & 0x40)  |
37392 +                      ((diff1 << 2) & 0x20)  |
37393 +                      ((diff1 << 3) & 0x10)  |
37394 +                      ((diff0 >> 4) & 0x08)  |
37395 +                      ((diff0 >> 3) & 0x04)  |
37396 +                      ((diff0 >> 2) & 0x02)  |
37397 +                      ((diff0 >> 1) & 0x01);
37398
37399                 dev_dbg(info->device, "correcting error bit %d, byte %d\n",
37400                         bit, byte);
37401 @@ -399,7 +398,7 @@ static int s3c2410_nand_correct_data(str
37402         if ((diff0 & ~(1<<fls(diff0))) == 0)
37403                 return 1;
37404
37405 -       return 0;
37406 +       return -EBADMSG;
37407  }
37408
37409  /* ECC functions
37410 @@ -473,7 +472,7 @@ static int s3c2440_nand_calculate_ecc(st
37411         ecc_code[1] = ecc >> 8;
37412         ecc_code[2] = ecc >> 16;
37413
37414 -       pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
37415 +       pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
37416
37417         return 0;
37418  }
37419 @@ -559,17 +558,31 @@ static int s3c2410_nand_remove(struct pl
37420  }
37421
37422  #ifdef CONFIG_MTD_PARTITIONS
37423 +const char *part_probes[] = { "cmdlinepart", NULL };
37424  static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
37425                                       struct s3c2410_nand_mtd *mtd,
37426                                       struct s3c2410_nand_set *set)
37427  {
37428 +       struct mtd_partition *part_info;
37429 +       int nr_part = 0;
37430 +
37431         if (set == NULL)
37432                 return add_mtd_device(&mtd->mtd);
37433
37434 -       if (set->nr_partitions > 0 && set->partitions != NULL) {
37435 -               return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
37436 +       if (set->nr_partitions == 0) {
37437 +               mtd->mtd.name = set->name;
37438 +               nr_part = parse_mtd_partitions(&mtd->mtd, part_probes,
37439 +                                               &part_info, 0);
37440 +       } else {
37441 +               if (set->nr_partitions > 0 && set->partitions != NULL) {
37442 +                       nr_part = set->nr_partitions;
37443 +                       part_info = set->partitions;
37444 +               }
37445         }
37446
37447 +       if (nr_part > 0 && part_info)
37448 +               return add_mtd_partitions(&mtd->mtd, part_info, nr_part);
37449 +
37450         return add_mtd_device(&mtd->mtd);
37451  }
37452  #else
37453 @@ -598,9 +611,13 @@ static void s3c2410_nand_init_chip(struc
37454         chip->select_chip  = s3c2410_nand_select_chip;
37455         chip->chip_delay   = 50;
37456         chip->priv         = nmtd;
37457 -       chip->options      = 0;
37458         chip->controller   = &info->controller;
37459
37460 +       if (set->flags & S3C2410_NAND_BBT)
37461 +               chip->options      = NAND_USE_FLASH_BBT;
37462 +       else
37463 +               chip->options      = 0;
37464 +
37465         switch (info->cpu_type) {
37466         case TYPE_S3C2410:
37467                 chip->IO_ADDR_W = regs + S3C2410_NFDATA;
37468 @@ -640,13 +657,10 @@ static void s3c2410_nand_init_chip(struc
37469         nmtd->mtd.owner    = THIS_MODULE;
37470         nmtd->set          = set;
37471
37472 -       if (hardware_ecc) {
37473 +       if (!info->platform->software_ecc && hardware_ecc) {
37474                 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
37475                 chip->ecc.correct   = s3c2410_nand_correct_data;
37476                 chip->ecc.mode      = NAND_ECC_HW;
37477 -               chip->ecc.size      = 512;
37478 -               chip->ecc.bytes     = 3;
37479 -               chip->ecc.layout    = &nand_hw_eccoob;
37480
37481                 switch (info->cpu_type) {
37482                 case TYPE_S3C2410:
37483 @@ -670,6 +684,34 @@ static void s3c2410_nand_init_chip(struc
37484         }
37485  }
37486
37487 +/* s3c2410_nand_update_chip
37488 + *
37489 + * post-probe chip update, to change any items, such as the
37490 + * layout for large page nand
37491 + */
37492 +
37493 +static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
37494 +                                    struct s3c2410_nand_mtd *nmtd)
37495 +{
37496 +       struct nand_chip *chip = &nmtd->chip;
37497 +
37498 +       printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
37499 +
37500 +       if (hardware_ecc) {
37501 +               /* change the behaviour depending on wether we are using
37502 +                * the large or small page nand device */
37503 +
37504 +               if (chip->page_shift > 10) {
37505 +                       chip->ecc.size      = 256;
37506 +                       chip->ecc.bytes     = 3;
37507 +               } else {
37508 +                       chip->ecc.size      = 512;
37509 +                       chip->ecc.bytes     = 3;
37510 +                       chip->ecc.layout    = &nand_hw_eccoob;
37511 +               }
37512 +       }
37513 +}
37514 +
37515  /* s3c2410_nand_probe
37516   *
37517   * called by device layer when it finds a device matching
37518 @@ -776,9 +818,12 @@ static int s3c24xx_nand_probe(struct pla
37519
37520                 s3c2410_nand_init_chip(info, nmtd, sets);
37521
37522 -               nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
37523 +               nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
37524 +                                                (sets) ? sets->nr_chips : 1);
37525
37526                 if (nmtd->scan_res == 0) {
37527 +                       s3c2410_nand_update_chip(info, nmtd);
37528 +                       nand_scan_tail(&nmtd->mtd);
37529                         s3c2410_nand_add_partition(info, nmtd, sets);
37530                 }
37531
37532 Index: linux-2.6.24.7/drivers/net/cs89x0.c
37533 ===================================================================
37534 --- linux-2.6.24.7.orig/drivers/net/cs89x0.c    2008-12-11 22:46:07.000000000 +0100
37535 +++ linux-2.6.24.7/drivers/net/cs89x0.c 2008-12-11 22:46:49.000000000 +0100
37536 @@ -194,6 +194,10 @@ static unsigned int cs8900_irq_map[] = {
37537  #define CIRRUS_DEFAULT_IRQ     VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
37538  static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0};
37539  static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0};
37540 +#elif defined(CONFIG_MACH_QT2410)
37541 +#include <asm/arch/irqs.h>
37542 +static unsigned int netcard_portlist [] __initdata = { 0xe0000300, 0 };
37543 +static unsigned int cs8900_irq_map[] = { IRQ_EINT9, 0, 0, 0 };
37544  #else
37545  static unsigned int netcard_portlist[] __initdata =
37546     { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
37547 @@ -829,6 +833,14 @@ cs89x0_probe1(struct net_device *dev, in
37548
37549         printk(" IRQ %d", dev->irq);
37550
37551 +       dev->dev_addr[0] = 0x00;
37552 +       dev->dev_addr[1] = 0x00;
37553 +       dev->dev_addr[2] = 0xc0;
37554 +       dev->dev_addr[3] = 0xff;
37555 +       dev->dev_addr[4] = 0xee;
37556 +       dev->dev_addr[5] = 0x08;
37557 +       set_mac_address(dev, dev->dev_addr);
37558 +
37559  #if ALLOW_DMA
37560         if (lp->use_dma) {
37561                 get_dma_channel(dev);
37562 @@ -1304,7 +1316,7 @@ net_open(struct net_device *dev)
37563         else
37564  #endif
37565         {
37566 -#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X)
37567 +#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) && !defined(CONFIG_MACH_QT2410)
37568                 if (((1 << dev->irq) & lp->irq_map) == 0) {
37569                         printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
37570                                 dev->name, dev->irq, lp->irq_map);
37571 Index: linux-2.6.24.7/drivers/net/Kconfig
37572 ===================================================================
37573 --- linux-2.6.24.7.orig/drivers/net/Kconfig     2008-12-11 22:46:09.000000000 +0100
37574 +++ linux-2.6.24.7/drivers/net/Kconfig  2008-12-11 22:46:49.000000000 +0100
37575 @@ -1332,7 +1332,7 @@ source "drivers/net/ibm_newemac/Kconfig"
37576
37577  config NET_PCI
37578         bool "EISA, VLB, PCI and on board controllers"
37579 -       depends on ISA || EISA || PCI
37580 +       depends on ISA || EISA || PCI || MACH_QT2410
37581         help
37582           This is another class of network cards which attach directly to the
37583           bus. If you have one of those, say Y and read the Ethernet-HOWTO,
37584 @@ -1508,7 +1508,7 @@ config FORCEDETH_NAPI
37585
37586  config CS89x0
37587         tristate "CS89x0 support"
37588 -       depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X)
37589 +       depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_QT2410)
37590         ---help---
37591           Support for CS89x0 chipset based Ethernet cards. If you have a
37592           network (Ethernet) card of this type, say Y and read the
37593 Index: linux-2.6.24.7/drivers/pnp/Kconfig
37594 ===================================================================
37595 --- linux-2.6.24.7.orig/drivers/pnp/Kconfig     2008-12-11 22:46:07.000000000 +0100
37596 +++ linux-2.6.24.7/drivers/pnp/Kconfig  2008-12-11 22:46:49.000000000 +0100
37597 @@ -5,7 +5,7 @@
37598  menuconfig PNP
37599         bool "Plug and Play support"
37600         depends on HAS_IOMEM
37601 -       depends on ISA || ACPI
37602 +       depends on ISA || ACPI || SDIO
37603         ---help---
37604           Plug and Play (PnP) is a standard for peripherals which allows those
37605           peripherals to be configured by software, e.g. assign IRQ's or other
37606 Index: linux-2.6.24.7/drivers/pnp/resource.c
37607 ===================================================================
37608 --- linux-2.6.24.7.orig/drivers/pnp/resource.c  2008-12-11 22:46:07.000000000 +0100
37609 +++ linux-2.6.24.7/drivers/pnp/resource.c       2008-12-11 22:46:49.000000000 +0100
37610 @@ -431,6 +431,7 @@ int pnp_check_dma(struct pnp_dev *dev, i
37611                 }
37612         }
37613
37614 +#if 0
37615         /* check if the resource is already in use, skip if the
37616          * device is active because it itself may be in use */
37617         if (!dev->active) {
37618 @@ -438,6 +439,7 @@ int pnp_check_dma(struct pnp_dev *dev, i
37619                         return 0;
37620                 free_dma(*dma);
37621         }
37622 +#endif
37623
37624         /* check for conflicts with other pnp devices */
37625         pnp_for_each_dev(tdev) {
37626 Index: linux-2.6.24.7/drivers/power/bq27000_battery.c
37627 ===================================================================
37628 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
37629 +++ linux-2.6.24.7/drivers/power/bq27000_battery.c      2008-12-11 22:46:49.000000000 +0100
37630 @@ -0,0 +1,424 @@
37631 +/*
37632 + * Driver for batteries with bq27000 chips inside via HDQ
37633 + *
37634 + * Copyright 2008 Openmoko, Inc
37635 + * Andy Green <andy@openmoko.com>
37636 + *
37637 + * based on ds2760 driver, original copyright notice for that --->
37638 + *
37639 + * Copyright © 2007 Anton Vorontsov
37640 + *            2004-2007 Matt Reimer
37641 + *            2004 Szabolcs Gyurko
37642 + *
37643 + * Use consistent with the GNU GPL is permitted,
37644 + * provided that this copyright notice is
37645 + * preserved in its entirety in all copies and derived works.
37646 + *
37647 + * Author:  Anton Vorontsov <cbou@mail.ru>
37648 + *         February 2007
37649 + *
37650 + *         Matt Reimer <mreimer@vpop.net>
37651 + *         April 2004, 2005, 2007
37652 + *
37653 + *         Szabolcs Gyurko <szabolcs.gyurko@tlt.hu>
37654 + *         September 2004
37655 + */
37656 +
37657 +#include <linux/module.h>
37658 +#include <linux/param.h>
37659 +#include <linux/jiffies.h>
37660 +#include <linux/delay.h>
37661 +#include <linux/pm.h>
37662 +#include <linux/platform_device.h>
37663 +#include <linux/power_supply.h>
37664 +#include <linux/bq27000_battery.h>
37665 +
37666 +enum bq27000_regs {
37667 +       /* RAM regs */
37668 +               /* read-write after this */
37669 +       BQ27000_CTRL = 0, /* Device Control Register */
37670 +       BQ27000_MODE, /* Device Mode Register */
37671 +       BQ27000_AR_L, /* At-Rate H L */
37672 +       BQ27000_AR_H,
37673 +               /* read-only after this */
37674 +       BQ27000_ARTTE_L, /* At-Rate Time To Empty H L */
37675 +       BQ27000_ARTTE_H,
37676 +       BQ27000_TEMP_L, /* Reported Temperature H L */
37677 +       BQ27000_TEMP_H,
37678 +       BQ27000_VOLT_L, /* Reported Voltage H L */
37679 +       BQ27000_VOLT_H,
37680 +       BQ27000_FLAGS, /* Status Flags */
37681 +       BQ27000_RSOC, /* Relative State of Charge */
37682 +       BQ27000_NAC_L, /* Nominal Available Capacity H L */
37683 +       BQ27000_NAC_H,
37684 +       BQ27000_CACD_L, /* Discharge Compensated H L */
37685 +       BQ27000_CACD_H,
37686 +       BQ27000_CACT_L, /* Temperature Compensated H L */
37687 +       BQ27000_CACT_H,
37688 +       BQ27000_LMD_L, /* Last measured discharge H L */
37689 +       BQ27000_LMD_H,
37690 +       BQ27000_AI_L, /* Average Current H L */
37691 +       BQ27000_AI_H,
37692 +       BQ27000_TTE_L, /* Time to Empty H L */
37693 +       BQ27000_TTE_H,
37694 +       BQ27000_TTF_L, /* Time to Full H L */
37695 +       BQ27000_TTF_H,
37696 +       BQ27000_SI_L, /* Standby Current H L */
37697 +       BQ27000_SI_H,
37698 +       BQ27000_STTE_L, /* Standby Time To Empty H L */
37699 +       BQ27000_STTE_H,
37700 +       BQ27000_MLI_L, /* Max Load Current H L */
37701 +       BQ27000_MLI_H,
37702 +       BQ27000_MLTTE_L, /* Max Load Time To Empty H L */
37703 +       BQ27000_MLTTE_H,
37704 +       BQ27000_SAE_L, /* Available Energy H L */
37705 +       BQ27000_SAE_H,
37706 +       BQ27000_AP_L, /* Available Power H L */
37707 +       BQ27000_AP_H,
37708 +       BQ27000_TTECP_L, /* Time to Empty at Constant Power H L */
37709 +       BQ27000_TTECP_H,
37710 +       BQ27000_CYCL_L, /* Cycle count since learning cycle H L */
37711 +       BQ27000_CYCL_H,
37712 +       BQ27000_CYCT_L, /* Cycle Count Total H L */
37713 +       BQ27000_CYCT_H,
37714 +       BQ27000_CSOC, /* Compensated State Of Charge */
37715 +       /* EEPROM regs */
37716 +               /* read-write after this */
37717 +       BQ27000_EE_EE_EN = 0x6e, /* EEPROM Program Enable */
37718 +       BQ27000_EE_ILMD = 0x76, /* Initial Last Measured Discharge High Byte */
37719 +       BQ27000_EE_SEDVF, /* Scaled EDVF Threshold */
37720 +       BQ27000_EE_SEDV1, /* Scaled EDV1 Threshold */
37721 +       BQ27000_EE_ISLC, /* Initial Standby Load Current */
37722 +       BQ27000_EE_DMFSD, /* Digital Magnitude Filter and Self Discharge */
37723 +       BQ27000_EE_TAPER, /* Aging Estimate Enable, Charge Termination Taper */
37724 +       BQ27000_EE_PKCFG, /* Pack Configuration Values */
37725 +       BQ27000_EE_IMLC, /* Initial Max Load Current or ID #3 */
37726 +       BQ27000_EE_DCOMP, /* Discharge rate compensation constants or ID #2 */
37727 +       BQ27000_EE_TCOMP, /* Temperature Compensation constants or ID #1 */
37728 +};
37729 +
37730 +enum bq27000_status_flags {
37731 +       BQ27000_STATUS_CHGS = 0x80, /* 1 = being charged */
37732 +       BQ27000_STATUS_NOACT = 0x40, /* 1 = no activity */
37733 +       BQ27000_STATUS_IMIN = 0x20, /* 1 = Lion taper current mode */
37734 +       BQ27000_STATUS_CI = 0x10, /* 1 = capacity likely  innacurate */
37735 +       BQ27000_STATUS_CALIP = 0x08, /* 1 = calibration in progress */
37736 +       BQ27000_STATUS_VDQ = 0x04, /* 1 = capacity should be accurate */
37737 +       BQ27000_STATUS_EDV1 = 0x02, /* 1 = end of discharge.. <6% left */
37738 +       BQ27000_STATUS_EDVF = 0x01, /* 1 = no, it's really empty now */
37739 +};
37740 +
37741 +#define NANOVOLTS_UNIT 3750
37742 +
37743 +struct bq27000_device_info {
37744 +       struct device *dev;
37745 +       struct power_supply bat;
37746 +       struct bq27000_platform_data *pdata;
37747 +};
37748 +
37749 +/*
37750 + * reading 16 bit values over HDQ has a special hazard where the
37751 + * hdq device firmware can update the 16-bit register during the time we
37752 + * read the two halves.  TI document SLUS556D recommends the algorithm here
37753 + * to avoid trouble
37754 + */
37755 +
37756 +static int hdq_read16(struct bq27000_device_info *di, int address)
37757 +{
37758 +       int acc;
37759 +       int high;
37760 +       int retries = 3;
37761 +
37762 +       while (retries--) {
37763 +
37764 +               high = (di->pdata->hdq_read)(address + 1); /* high part */
37765 +
37766 +               if (high < 0)
37767 +                       return high;
37768 +               acc = (di->pdata->hdq_read)(address);
37769 +               if (acc < 0)
37770 +                       return acc;
37771 +
37772 +               /* confirm high didn't change between reading it and low */
37773 +               if (high == (di->pdata->hdq_read)(address + 1))
37774 +                       return (high << 8) | acc;
37775 +       }
37776 +
37777 +       return -ETIME;
37778 +}
37779 +
37780 +#define to_bq27000_device_info(x) container_of((x), \
37781 +                                              struct bq27000_device_info, \
37782 +                                              bat);
37783 +
37784 +static void bq27000_battery_external_power_changed(struct power_supply *psy)
37785 +{
37786 +       struct bq27000_device_info *di = to_bq27000_device_info(psy);
37787 +
37788 +       dev_dbg(di->dev, "%s\n", __FUNCTION__);
37789 +}
37790 +
37791 +static int bq27000_battery_get_property(struct power_supply *psy,
37792 +                                      enum power_supply_property psp,
37793 +                                      union power_supply_propval *val)
37794 +{
37795 +       int v, n;
37796 +       struct bq27000_device_info *di = to_bq27000_device_info(psy);
37797 +
37798 +       if (!(di->pdata->hdq_initialized)())
37799 +               return -EINVAL;
37800 +
37801 +       switch (psp) {
37802 +       case POWER_SUPPLY_PROP_STATUS:
37803 +               val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
37804 +
37805 +               if (!di->pdata->get_charger_online_status)
37806 +                       goto use_bat;
37807 +               if ((di->pdata->get_charger_online_status)()) {
37808 +                       /*
37809 +                        * charger is definitively present
37810 +                        * we report our state in terms of what it says it
37811 +                        * is doing
37812 +                        */
37813 +                       if (!di->pdata->get_charger_active_status)
37814 +                               goto use_bat;
37815 +
37816 +                       if ((di->pdata->get_charger_active_status)()) {
37817 +                               val->intval = POWER_SUPPLY_STATUS_CHARGING;
37818 +                               break;
37819 +                       }
37820 +                       val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
37821 +                       break;
37822 +               }
37823 +
37824 +               /*
37825 +                * platform provided definite indication of charger presence,
37826 +                * and it is telling us it isn't there... but we are on so we
37827 +                * must be running from battery --->
37828 +                */
37829 +
37830 +               val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
37831 +               break;
37832 +
37833 +use_bat:
37834 +               /*
37835 +                * either the charger is not connected, or the
37836 +                * platform doesn't give info about charger, use battery state
37837 +                * but... battery state can be out of date by 4 seconds or
37838 +                * so... use the platform callbacks if possible.
37839 +                */
37840 +               v = hdq_read16(di, BQ27000_AI_L);
37841 +               if (v < 0)
37842 +                       return v;
37843 +
37844 +               /* no real activity on the battery */
37845 +               if (v < 2) {
37846 +                       if (!hdq_read16(di, BQ27000_TTF_L))
37847 +                               val->intval = POWER_SUPPLY_STATUS_FULL;
37848 +                       else
37849 +                               val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
37850 +                       break;
37851 +               }
37852 +               /* power is actually going in or out... */
37853 +               v = (di->pdata->hdq_read)(BQ27000_FLAGS);
37854 +               if (v < 0)
37855 +                       return v;
37856 +               if (v & BQ27000_STATUS_CHGS)
37857 +                       val->intval = POWER_SUPPLY_STATUS_CHARGING;
37858 +               else
37859 +                       val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
37860 +               break;
37861 +       case POWER_SUPPLY_PROP_VOLTAGE_NOW:
37862 +               v = hdq_read16(di, BQ27000_VOLT_L);
37863 +               if (v < 0)
37864 +                       return v;
37865 +               /* mV -> uV */
37866 +               val->intval = v * 1000;
37867 +               break;
37868 +       case POWER_SUPPLY_PROP_CURRENT_NOW:
37869 +               v = (di->pdata->hdq_read)(BQ27000_FLAGS);
37870 +               if (v < 0)
37871 +                       return v;
37872 +               if (v & BQ27000_STATUS_CHGS)
37873 +                       n = -NANOVOLTS_UNIT;
37874 +               else
37875 +                       n = NANOVOLTS_UNIT;
37876 +               v = hdq_read16(di, BQ27000_AI_L);
37877 +               if (v < 0)
37878 +                       return v;
37879 +               val->intval = (v * n) / di->pdata->rsense_mohms;
37880 +               break;
37881 +       case POWER_SUPPLY_PROP_CHARGE_FULL:
37882 +               v = hdq_read16(di, BQ27000_LMD_L);
37883 +               if (v < 0)
37884 +                       return v;
37885 +               val->intval = (v * 3570) / di->pdata->rsense_mohms;
37886 +               break;
37887 +       case POWER_SUPPLY_PROP_TEMP:
37888 +               v = hdq_read16(di, BQ27000_TEMP_L);
37889 +               if (v < 0)
37890 +                       return v;
37891 +               /* K (in 0.25K units) is 273.15 up from C (in 0.1C)*/
37892 +               /* 10926 = 27315 * 4 / 10 */
37893 +               val->intval = (((long)v * 10l) - 10926) / 4;
37894 +               break;
37895 +       case POWER_SUPPLY_PROP_TECHNOLOGY:
37896 +               val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
37897 +               break;
37898 +       case POWER_SUPPLY_PROP_CAPACITY:
37899 +               val->intval = (di->pdata->hdq_read)(BQ27000_RSOC);
37900 +               if (val->intval < 0)
37901 +                       return val->intval;
37902 +               break;
37903 +       case POWER_SUPPLY_PROP_PRESENT:
37904 +               v = (di->pdata->hdq_read)(BQ27000_RSOC);
37905 +               val->intval = !(v < 0);
37906 +               break;
37907 +       case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
37908 +               v = hdq_read16(di, BQ27000_TTE_L);
37909 +               if (v < 0)
37910 +                       return v;
37911 +               val->intval = 60 * v;
37912 +               break;
37913 +       case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
37914 +               v = hdq_read16(di, BQ27000_TTF_L);
37915 +               if (v < 0)
37916 +                       return v;
37917 +               val->intval = 60 * v;
37918 +               break;
37919 +       case POWER_SUPPLY_PROP_ONLINE:
37920 +               if (di->pdata->get_charger_online_status)
37921 +                       val->intval = (di->pdata->get_charger_online_status)();
37922 +               else
37923 +                       return -EINVAL;
37924 +               break;
37925 +       default:
37926 +               return -EINVAL;
37927 +       }
37928 +
37929 +       return 0;
37930 +}
37931 +
37932 +static enum power_supply_property bq27000_battery_props[] = {
37933 +       POWER_SUPPLY_PROP_STATUS,
37934 +       POWER_SUPPLY_PROP_VOLTAGE_NOW,
37935 +       POWER_SUPPLY_PROP_CURRENT_NOW,
37936 +       POWER_SUPPLY_PROP_CHARGE_FULL,
37937 +       POWER_SUPPLY_PROP_TEMP,
37938 +       POWER_SUPPLY_PROP_TECHNOLOGY,
37939 +       POWER_SUPPLY_PROP_PRESENT,
37940 +       POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
37941 +       POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
37942 +       POWER_SUPPLY_PROP_CAPACITY,
37943 +       POWER_SUPPLY_PROP_ONLINE
37944 +};
37945 +
37946 +static int bq27000_battery_probe(struct platform_device *pdev)
37947 +{
37948 +       int retval = 0;
37949 +       struct bq27000_device_info *di;
37950 +       struct bq27000_platform_data *pdata;
37951 +
37952 +       dev_info(&pdev->dev, "BQ27000 Battery Driver (C) 2008 Openmoko, Inc\n");
37953 +
37954 +       di = kzalloc(sizeof(*di), GFP_KERNEL);
37955 +       if (!di) {
37956 +               retval = -ENOMEM;
37957 +               goto di_alloc_failed;
37958 +       }
37959 +
37960 +       platform_set_drvdata(pdev, di);
37961 +
37962 +       pdata = pdev->dev.platform_data;
37963 +       di->dev         = &pdev->dev;
37964 +       /* di->w1_dev        = pdev->dev.parent; */
37965 +       di->bat.name       = pdata->name;
37966 +       di->bat.type       = POWER_SUPPLY_TYPE_BATTERY;
37967 +       di->bat.properties     = bq27000_battery_props;
37968 +       di->bat.num_properties = ARRAY_SIZE(bq27000_battery_props);
37969 +       di->bat.get_property   = bq27000_battery_get_property;
37970 +       di->bat.external_power_changed =
37971 +                                 bq27000_battery_external_power_changed;
37972 +       di->bat.use_for_apm = 1;
37973 +       di->pdata = pdata;
37974 +
37975 +       retval = power_supply_register(&pdev->dev, &di->bat);
37976 +       if (retval) {
37977 +               dev_err(di->dev, "failed to register battery\n");
37978 +               goto batt_failed;
37979 +       }
37980 +
37981 +       return 0;
37982 +
37983 +batt_failed:
37984 +       kfree(di);
37985 +di_alloc_failed:
37986 +       return retval;
37987 +}
37988 +
37989 +static int bq27000_battery_remove(struct platform_device *pdev)
37990 +{
37991 +       struct bq27000_device_info *di = platform_get_drvdata(pdev);
37992 +
37993 +       power_supply_unregister(&di->bat);
37994 +
37995 +       return 0;
37996 +}
37997 +
37998 +void bq27000_charging_state_change(struct platform_device *pdev)
37999 +{
38000 +       struct bq27000_device_info *di = platform_get_drvdata(pdev);
38001 +
38002 +       if (!di)
38003 +           return;
38004 +
38005 +       power_supply_changed(&di->bat);
38006 +}
38007 +EXPORT_SYMBOL_GPL(bq27000_charging_state_change);
38008 +
38009 +#ifdef CONFIG_PM
38010 +
38011 +static int bq27000_battery_suspend(struct platform_device *pdev,
38012 +                                 pm_message_t state)
38013 +{
38014 +       return 0;
38015 +}
38016 +
38017 +static int bq27000_battery_resume(struct platform_device *pdev)
38018 +{
38019 +       return 0;
38020 +}
38021 +
38022 +#else
38023 +
38024 +#define bq27000_battery_suspend NULL
38025 +#define bq27000_battery_resume NULL
38026 +
38027 +#endif /* CONFIG_PM */
38028 +
38029 +static struct platform_driver bq27000_battery_driver = {
38030 +       .driver = {
38031 +               .name = "bq27000-battery",
38032 +       },
38033 +       .probe    = bq27000_battery_probe,
38034 +       .remove   = bq27000_battery_remove,
38035 +       .suspend  = bq27000_battery_suspend,
38036 +       .resume   = bq27000_battery_resume,
38037 +};
38038 +
38039 +static int __init bq27000_battery_init(void)
38040 +{
38041 +       return platform_driver_register(&bq27000_battery_driver);
38042 +}
38043 +
38044 +static void __exit bq27000_battery_exit(void)
38045 +{
38046 +       platform_driver_unregister(&bq27000_battery_driver);
38047 +}
38048 +
38049 +module_init(bq27000_battery_init);
38050 +module_exit(bq27000_battery_exit);
38051 +
38052 +MODULE_LICENSE("GPL");
38053 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
38054 +MODULE_DESCRIPTION("bq27000 battery driver");
38055 Index: linux-2.6.24.7/drivers/power/gta01_battery.c
38056 ===================================================================
38057 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
38058 +++ linux-2.6.24.7/drivers/power/gta01_battery.c        2008-12-11 22:46:49.000000000 +0100
38059 @@ -0,0 +1,97 @@
38060 +/*
38061 + * Battery driver for the Openmoko GTA01 device, using the pcf50606 chip.
38062 + *
38063 + * This is nothing more than a write-thru interface to the real logic,
38064 + * which is part of the pcf50606.c multifunction chip driver.
38065 + *     Copyright Â© 2008  Mike Westerhof <mwester@dls.net>
38066 + *
38067 + *
38068 + * Portions liberally borrowed from olpc_battery.c, copyright below:
38069 + *     Copyright Â© 2006  David Woodhouse <dwmw2@infradead.org>
38070 + *
38071 + * This program is free software; you can redistribute it and/or modify
38072 + * it under the terms of the GNU General Public License version 2 as
38073 + * published by the Free Software Foundation.
38074 + */
38075 +
38076 +#include <linux/module.h>
38077 +#include <linux/err.h>
38078 +#include <linux/platform_device.h>
38079 +#include <linux/power_supply.h>
38080 +#include <linux/jiffies.h>
38081 +#include <linux/sched.h>
38082 +
38083 +/*********************************************************************
38084 + * This global is set by the pcf50606 driver to the correct callback
38085 + *********************************************************************/
38086 +
38087 +extern int (*pmu_bat_get_property)(struct power_supply *,
38088 +                                  enum power_supply_property,
38089 +                                  union power_supply_propval *);
38090 +
38091 +
38092 +/*********************************************************************
38093 + *             Battery properties
38094 + *********************************************************************/
38095 +static int gta01_bat_get_property(struct power_supply *psy,
38096 +                                 enum power_supply_property psp,
38097 +                                 union power_supply_propval *val)
38098 +{
38099 +       if (pmu_bat_get_property)
38100 +               return (pmu_bat_get_property)(psy, psp, val);
38101 +       else
38102 +               return -ENODEV;
38103 +}
38104 +
38105 +static enum power_supply_property gta01_bat_props[] = {
38106 +       POWER_SUPPLY_PROP_STATUS,
38107 +       POWER_SUPPLY_PROP_PRESENT,
38108 +       POWER_SUPPLY_PROP_ONLINE,
38109 +       POWER_SUPPLY_PROP_VOLTAGE_NOW,
38110 +       POWER_SUPPLY_PROP_CURRENT_NOW,
38111 +       POWER_SUPPLY_PROP_TEMP,
38112 +       POWER_SUPPLY_PROP_CAPACITY,
38113 +};
38114 +
38115 +/*********************************************************************
38116 + *             Initialisation
38117 + *********************************************************************/
38118 +
38119 +static struct platform_device *bat_pdev;
38120 +
38121 +static struct power_supply gta01_bat = {
38122 +       .properties = gta01_bat_props,
38123 +       .num_properties = ARRAY_SIZE(gta01_bat_props),
38124 +       .get_property = gta01_bat_get_property,
38125 +       .use_for_apm = 0,  /* pcf50606 driver has its own apm driver */
38126 +};
38127 +
38128 +static int __init gta01_bat_init(void)
38129 +{
38130 +       int ret;
38131 +
38132 +       bat_pdev = platform_device_register_simple("bat", 0, NULL, 0);
38133 +       if (IS_ERR(bat_pdev))
38134 +               return PTR_ERR(bat_pdev);
38135 +
38136 +       gta01_bat.name = bat_pdev->name;
38137 +
38138 +       ret = power_supply_register(&bat_pdev->dev, &gta01_bat);
38139 +       if (ret)
38140 +               platform_device_unregister(bat_pdev);
38141 +
38142 +       return ret;
38143 +}
38144 +
38145 +static void __exit gta01_bat_exit(void)
38146 +{
38147 +       power_supply_unregister(&gta01_bat);
38148 +       platform_device_unregister(bat_pdev);
38149 +}
38150 +
38151 +module_init(gta01_bat_init);
38152 +module_exit(gta01_bat_exit);
38153 +
38154 +MODULE_AUTHOR("Mike Westerhof <mwester@dls.net>");
38155 +MODULE_LICENSE("GPL");
38156 +MODULE_DESCRIPTION("Battery driver for GTA01");
38157 Index: linux-2.6.24.7/drivers/power/gta02_hdq.c
38158 ===================================================================
38159 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
38160 +++ linux-2.6.24.7/drivers/power/gta02_hdq.c    2008-12-11 22:46:49.000000000 +0100
38161 @@ -0,0 +1,250 @@
38162 +/*
38163 + * HDQ driver for the FIC Neo1973 GTA02 GSM phone
38164 + *
38165 + * (C) 2006-2007 by Openmoko, Inc.
38166 + * Author: Andy Green <andy@openmoko.com>
38167 + * All rights reserved.
38168 + *
38169 + * This program is free software; you can redistribute it and/or modify
38170 + * it under the terms of the GNU General Public License version 2 as
38171 + * published by the Free Software Foundation.
38172 + *
38173 + */
38174 +
38175 +#include <linux/kernel.h>
38176 +#include <linux/init.h>
38177 +#include <linux/delay.h>
38178 +#include <linux/platform_device.h>
38179 +#include <asm/hardware.h>
38180 +#include <asm/mach-types.h>
38181 +#include <asm/arch/gta02.h>
38182 +#include <asm/arch/fiq_ipc_gta02.h>
38183 +
38184 +
38185 +
38186 +#define HDQ_READ 0
38187 +#define HDQ_WRITE 0x80
38188 +
38189 +
38190 +int gta02hdq_initialized(void)
38191 +{
38192 +       return fiq_ipc.hdq_probed;
38193 +}
38194 +EXPORT_SYMBOL_GPL(gta02hdq_initialized);
38195 +
38196 +int gta02hdq_read(int address)
38197 +{
38198 +       int count_sleeps = 5;
38199 +       int ret = -ETIME;
38200 +
38201 +       mutex_lock(&fiq_ipc.hdq_lock);
38202 +
38203 +       fiq_ipc.hdq_ads = address | HDQ_READ;
38204 +       fiq_ipc.hdq_request_ctr++;
38205 +       fiq_kick();
38206 +       /*
38207 +        * FIQ takes care of it while we block our calling process
38208 +        * But we're not spinning -- other processes run normally while
38209 +        * we wait for the result
38210 +        */
38211 +       while (count_sleeps--) {
38212 +               msleep(10); /* valid transaction always completes in < 10ms */
38213 +
38214 +               if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
38215 +                       continue;
38216 +
38217 +               if (fiq_ipc.hdq_error)
38218 +                       goto done; /* didn't see a response in good time */
38219 +
38220 +               ret = fiq_ipc.hdq_rx_data;
38221 +               goto done;
38222 +       }
38223 +       ret = -EINVAL;
38224 +
38225 +done:
38226 +       mutex_unlock(&fiq_ipc.hdq_lock);
38227 +       return ret;
38228 +}
38229 +EXPORT_SYMBOL_GPL(gta02hdq_read);
38230 +
38231 +int gta02hdq_write(int address, u8 data)
38232 +{
38233 +       int count_sleeps = 5;
38234 +       int ret = -ETIME;
38235 +
38236 +       mutex_lock(&fiq_ipc.hdq_lock);
38237 +
38238 +       fiq_ipc.hdq_ads = address | HDQ_WRITE;
38239 +       fiq_ipc.hdq_tx_data = data;
38240 +       fiq_ipc.hdq_request_ctr++;
38241 +       fiq_kick();
38242 +       /*
38243 +        * FIQ takes care of it while we block our calling process
38244 +        * But we're not spinning -- other processes run normally while
38245 +        * we wait for the result
38246 +        */
38247 +       while (count_sleeps--) {
38248 +               msleep(10); /* valid transaction always completes in < 10ms */
38249 +
38250 +               if (fiq_ipc.hdq_request_ctr != fiq_ipc.hdq_transaction_ctr)
38251 +                       continue; /* something bad with FIQ */
38252 +
38253 +               if (fiq_ipc.hdq_error)
38254 +                       goto done; /* didn't see a response in good time */
38255 +       }
38256 +       ret = -EINVAL;
38257 +
38258 +done:
38259 +       mutex_unlock(&fiq_ipc.hdq_lock);
38260 +       return ret;
38261 +}
38262 +EXPORT_SYMBOL_GPL(gta02hdq_write);
38263 +
38264 +/* sysfs */
38265 +
38266 +static ssize_t hdq_sysfs_dump(struct device *dev, struct device_attribute *attr,
38267 +                        char *buf)
38268 +{
38269 +       int n;
38270 +       int v;
38271 +       u8 u8a[128]; /* whole address space for HDQ */
38272 +       char *end = buf;
38273 +
38274 +       /* the dump does not take care about 16 bit regs, because at this
38275 +        * bus level we don't know about the chip details
38276 +        */
38277 +       for (n = 0; n < sizeof(u8a); n++) {
38278 +               v = gta02hdq_read(n);
38279 +               if (v < 0)
38280 +                       goto bail;
38281 +               u8a[n] = v;
38282 +       }
38283 +
38284 +       for (n = 0; n < sizeof(u8a); n += 16) {
38285 +               hex_dump_to_buffer(u8a + n, sizeof(u8a), 16, 1, end, 4096, 0);
38286 +               end += strlen(end);
38287 +               *end++ = '\n';
38288 +               *end = '\0';
38289 +       }
38290 +       return (end - buf);
38291 +
38292 +bail:
38293 +       return sprintf(buf, "ERROR %d\n", v);
38294 +}
38295 +
38296 +/* you write by <address> <data>, eg, "34 128" */
38297 +
38298 +#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
38299 +
38300 +static ssize_t hdq_sysfs_write(struct device *dev,
38301 +                              struct device_attribute *attr,
38302 +                              const char *buf, size_t count)
38303 +{
38304 +       const char *end = buf + count;
38305 +       int address = atoi(buf);
38306 +
38307 +       while ((buf != end) && (*buf != ' '))
38308 +               buf++;
38309 +       if (buf >= end)
38310 +               return 0;
38311 +       while ((buf < end) && (*buf == ' '))
38312 +               buf++;
38313 +       if (buf >= end)
38314 +               return 0;
38315 +
38316 +       gta02hdq_write(address, atoi(buf));
38317 +
38318 +       return count;
38319 +}
38320 +
38321 +static DEVICE_ATTR(dump, 0400, hdq_sysfs_dump, NULL);
38322 +static DEVICE_ATTR(write, 0600, NULL, hdq_sysfs_write);
38323 +
38324 +static struct attribute *gta02hdq_sysfs_entries[] = {
38325 +       &dev_attr_dump.attr,
38326 +       &dev_attr_write.attr,
38327 +       NULL
38328 +};
38329 +
38330 +static struct attribute_group gta02hdq_attr_group = {
38331 +       .name   = "hdq",
38332 +       .attrs  = gta02hdq_sysfs_entries,
38333 +};
38334 +
38335 +
38336 +#ifdef CONFIG_PM
38337 +static int gta02hdq_suspend(struct platform_device *pdev, pm_message_t state)
38338 +{
38339 +       /* after 18s of this, the battery monitor will also go to sleep */
38340 +       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
38341 +       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
38342 +       return 0;
38343 +}
38344 +
38345 +static int gta02hdq_resume(struct platform_device *pdev)
38346 +{
38347 +       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
38348 +       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
38349 +       return 0;
38350 +}
38351 +#endif
38352 +
38353 +static int __init gta02hdq_probe(struct platform_device *pdev)
38354 +{
38355 +       struct resource *r = platform_get_resource(pdev, 0, 0);
38356 +
38357 +       if (!machine_is_neo1973_gta02())
38358 +               return -EIO;
38359 +
38360 +       if (!r)
38361 +               return -EINVAL;
38362 +
38363 +       platform_set_drvdata(pdev, NULL);
38364 +
38365 +       mutex_init(&fiq_ipc.hdq_lock);
38366 +
38367 +       /* set our HDQ comms pin from the platform data */
38368 +       fiq_ipc.hdq_gpio_pin = r->start;
38369 +
38370 +       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
38371 +       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
38372 +
38373 +       fiq_ipc.hdq_probed = 1; /* we are ready to do stuff now */
38374 +
38375 +       return sysfs_create_group(&pdev->dev.kobj, &gta02hdq_attr_group);
38376 +}
38377 +
38378 +static int gta02hdq_remove(struct platform_device *pdev)
38379 +{
38380 +       sysfs_remove_group(&pdev->dev.kobj, &gta02hdq_attr_group);
38381 +       return 0;
38382 +}
38383 +
38384 +static struct platform_driver gta02hdq_driver = {
38385 +       .probe          = gta02hdq_probe,
38386 +       .remove         = gta02hdq_remove,
38387 +#ifdef CONFIG_PM
38388 +       .suspend        = gta02hdq_suspend,
38389 +       .resume         = gta02hdq_resume,
38390 +#endif
38391 +       .driver         = {
38392 +               .name           = "gta02-hdq",
38393 +       },
38394 +};
38395 +
38396 +static int __init gta02hdq_init(void)
38397 +{
38398 +       return platform_driver_register(&gta02hdq_driver);
38399 +}
38400 +
38401 +static void __exit gta02hdq_exit(void)
38402 +{
38403 +       platform_driver_unregister(&gta02hdq_driver);
38404 +}
38405 +
38406 +module_init(gta02hdq_init);
38407 +module_exit(gta02hdq_exit);
38408 +
38409 +MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
38410 +MODULE_DESCRIPTION("GTA02 HDQ driver");
38411 +MODULE_LICENSE("GPL");
38412 Index: linux-2.6.24.7/drivers/power/Kconfig
38413 ===================================================================
38414 --- linux-2.6.24.7.orig/drivers/power/Kconfig   2008-12-11 22:46:07.000000000 +0100
38415 +++ linux-2.6.24.7/drivers/power/Kconfig        2008-12-11 22:46:49.000000000 +0100
38416 @@ -49,4 +49,24 @@ config BATTERY_OLPC
38417         help
38418           Say Y to enable support for the battery on the OLPC laptop.
38419
38420 +config BATTERY_BQ27000_HDQ
38421 +       tristate "BQ27000 HDQ battery monitor driver"
38422 +       help
38423 +         Say Y to enable support for the battery on the Neo Freerunner
38424 +
38425 +config GTA02_HDQ
38426 +       tristate "Neo Freerunner HDQ"
38427 +       depends on MACH_NEO1973_GTA02 && FIQ && S3C2440_C_FIQ
38428 +       help
38429 +         Say Y to enable support for communicating with an HDQ battery
38430 +         on the Neo Freerunner.  You probably want to select
38431 +         at least BATTERY_BQ27000_HDQ as well
38432 +
38433 +config BATTERY_GTA01
38434 +       tristate "Neo GTA01 battery"
38435 +       depends on MACH_NEO1973_GTA01
38436 +       help
38437 +         Say Y to enable support for the battery on the Neo GTA01
38438 +
38439  endif # POWER_SUPPLY
38440 +
38441 Index: linux-2.6.24.7/drivers/power/Makefile
38442 ===================================================================
38443 --- linux-2.6.24.7.orig/drivers/power/Makefile  2008-12-11 22:46:07.000000000 +0100
38444 +++ linux-2.6.24.7/drivers/power/Makefile       2008-12-11 22:46:49.000000000 +0100
38445 @@ -20,3 +20,7 @@ obj-$(CONFIG_APM_POWER)               += apm_power.o
38446  obj-$(CONFIG_BATTERY_DS2760)   += ds2760_battery.o
38447  obj-$(CONFIG_BATTERY_PMU)      += pmu_battery.o
38448  obj-$(CONFIG_BATTERY_OLPC)     += olpc_battery.o
38449 +obj-$(CONFIG_BATTERY_BQ27000_HDQ)      += bq27000_battery.o
38450 +obj-$(CONFIG_BATTERY_GTA01)    += gta01_battery.o
38451 +
38452 +obj-$(CONFIG_GTA02_HDQ)                += gta02_hdq.o
38453 Index: linux-2.6.24.7/drivers/sdio/function/Kconfig
38454 ===================================================================
38455 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
38456 +++ linux-2.6.24.7/drivers/sdio/function/Kconfig        2008-12-11 22:46:49.000000000 +0100
38457 @@ -0,0 +1,11 @@
38458 +#menu "SDIO function drivers"
38459 +
38460 +config SDIO_AR6000_WLAN
38461 +        tristate "ar6000 wireless networking over sdio"
38462 +       depends on SDIO
38463 +        select WIRELESS_EXT
38464 +        default m
38465 +        help
38466 +          good luck.
38467 +
38468 +#endmenu
38469 \ No newline at end of file
38470 Index: linux-2.6.24.7/drivers/sdio/function/Makefile
38471 ===================================================================
38472 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
38473 +++ linux-2.6.24.7/drivers/sdio/function/Makefile       2008-12-11 22:46:49.000000000 +0100
38474 @@ -0,0 +1 @@
38475 +obj-$(CONFIG_SDIO_AR6000_WLAN)          += wlan/
38476 \ No newline at end of file
38477 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c
38478 ===================================================================
38479 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
38480 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.c        2008-12-11 22:46:49.000000000 +0100
38481 @@ -0,0 +1,3078 @@
38482 +/*
38483 + *
38484 + * Copyright (c) 2004-2007 Atheros Communications Inc.
38485 + * All rights reserved.
38486 + *
38487 + *
38488 + *  This program is free software; you can redistribute it and/or modify
38489 + *  it under the terms of the GNU General Public License version 2 as
38490 + *  published by the Free Software Foundation;
38491 + *
38492 + *  Software distributed under the License is distributed on an "AS
38493 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
38494 + *  implied. See the License for the specific language governing
38495 + *  rights and limitations under the License.
38496 + *
38497 + *
38498 + *
38499 + */
38500 +
38501 +/*
38502 + * This driver is a pseudo ethernet driver to access the Atheros AR6000
38503 + * WLAN Device
38504 + */
38505 +static const char athId[] __attribute__ ((unused)) = "$Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/ar6000_drv.c#2 $";
38506 +
38507 +#include "ar6000_drv.h"
38508 +#include "htc.h"
38509 +
38510 +MODULE_LICENSE("GPL and additional rights");
38511 +
38512 +#ifndef REORG_APTC_HEURISTICS
38513 +#undef ADAPTIVE_POWER_THROUGHPUT_CONTROL
38514 +#endif /* REORG_APTC_HEURISTICS */
38515 +
38516 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
38517 +#define APTC_TRAFFIC_SAMPLING_INTERVAL     100  /* msec */
38518 +#define APTC_UPPER_THROUGHPUT_THRESHOLD    3000 /* Kbps */
38519 +#define APTC_LOWER_THROUGHPUT_THRESHOLD    2000 /* Kbps */
38520 +
38521 +typedef struct aptc_traffic_record {
38522 +    A_BOOL timerScheduled;
38523 +    struct timeval samplingTS;
38524 +    unsigned long bytesReceived;
38525 +    unsigned long bytesTransmitted;
38526 +} APTC_TRAFFIC_RECORD;
38527 +
38528 +A_TIMER aptcTimer;
38529 +APTC_TRAFFIC_RECORD aptcTR;
38530 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
38531 +
38532 +int bmienable = 0;
38533 +unsigned int bypasswmi = 0;
38534 +unsigned int debuglevel = 0;
38535 +int tspecCompliance = 1;
38536 +unsigned int busspeedlow = 0;
38537 +unsigned int onebitmode = 0;
38538 +unsigned int skipflash = 0;
38539 +unsigned int wmitimeout = 2;
38540 +unsigned int wlanNodeCaching = 1;
38541 +unsigned int enableuartprint = 0;
38542 +unsigned int logWmiRawMsgs = 0;
38543 +unsigned int enabletimerwar = 0;
38544 +unsigned int mbox_yield_limit = 99;
38545 +int reduce_credit_dribble = 1 + HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF;
38546 +int allow_trace_signal = 0;
38547 +#ifdef CONFIG_HOST_TCMD_SUPPORT
38548 +unsigned int testmode =0;
38549 +#endif
38550 +
38551 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
38552 +module_param(bmienable, int, 0644);
38553 +module_param(bypasswmi, int, 0644);
38554 +module_param(debuglevel, int, 0644);
38555 +module_param(tspecCompliance, int, 0644);
38556 +module_param(onebitmode, int, 0644);
38557 +module_param(busspeedlow, int, 0644);
38558 +module_param(skipflash, int, 0644);
38559 +module_param(wmitimeout, int, 0644);
38560 +module_param(wlanNodeCaching, int, 0644);
38561 +module_param(logWmiRawMsgs, int, 0644);
38562 +module_param(enableuartprint, int, 0644);
38563 +module_param(enabletimerwar, int, 0644);
38564 +module_param(mbox_yield_limit, int, 0644);
38565 +module_param(reduce_credit_dribble, int, 0644);
38566 +module_param(allow_trace_signal, int, 0644);
38567 +#ifdef CONFIG_HOST_TCMD_SUPPORT
38568 +module_param(testmode, int, 0644);
38569 +#endif
38570 +#else
38571 +
38572 +#define __user
38573 +/* for linux 2.4 and lower */
38574 +MODULE_PARM(bmienable,"i");
38575 +MODULE_PARM(bypasswmi,"i");
38576 +MODULE_PARM(debuglevel, "i");
38577 +MODULE_PARM(onebitmode,"i");
38578 +MODULE_PARM(busspeedlow, "i");
38579 +MODULE_PARM(skipflash, "i");
38580 +MODULE_PARM(wmitimeout, "i");
38581 +MODULE_PARM(wlanNodeCaching, "i");
38582 +MODULE_PARM(enableuartprint,"i");
38583 +MODULE_PARM(logWmiRawMsgs, "i");
38584 +MODULE_PARM(enabletimerwar,"i");
38585 +MODULE_PARM(mbox_yield_limit,"i");
38586 +MODULE_PARM(reduce_credit_dribble,"i");
38587 +MODULE_PARM(allow_trace_signal,"i");
38588 +#ifdef CONFIG_HOST_TCMD_SUPPORT
38589 +MODULE_PARM(testmode, "i");
38590 +#endif
38591 +#endif
38592 +
38593 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
38594 +/* in 2.6.10 and later this is now a pointer to a uint */
38595 +unsigned int _mboxnum = HTC_MAILBOX_NUM_MAX;
38596 +#define mboxnum &_mboxnum
38597 +#else
38598 +unsigned int mboxnum = HTC_MAILBOX_NUM_MAX;
38599 +#endif
38600 +
38601 +#ifdef DEBUG
38602 +A_UINT32 g_dbg_flags = DBG_DEFAULTS;
38603 +unsigned int debugflags = 0;
38604 +int debugdriver = 1;
38605 +unsigned int debughtc = 128;
38606 +unsigned int debugbmi = 1;
38607 +unsigned int debughif = 2;
38608 +unsigned int resetok = 1;
38609 +unsigned int txcreditsavailable[HTC_MAILBOX_NUM_MAX] = {0};
38610 +unsigned int txcreditsconsumed[HTC_MAILBOX_NUM_MAX] = {0};
38611 +unsigned int txcreditintrenable[HTC_MAILBOX_NUM_MAX] = {0};
38612 +unsigned int txcreditintrenableaggregate[HTC_MAILBOX_NUM_MAX] = {0};
38613 +
38614 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
38615 +module_param(debugflags, int, 0644);
38616 +module_param(debugdriver, int, 0644);
38617 +module_param(debughtc, int, 0644);
38618 +module_param(debugbmi, int, 0644);
38619 +module_param(debughif, int, 0644);
38620 +module_param(resetok, int, 0644);
38621 +module_param_array(txcreditsavailable, int, mboxnum, 0644);
38622 +module_param_array(txcreditsconsumed, int, mboxnum, 0644);
38623 +module_param_array(txcreditintrenable, int, mboxnum, 0644);
38624 +module_param_array(txcreditintrenableaggregate, int, mboxnum, 0644);
38625 +#else
38626 +/* linux 2.4 and lower */
38627 +MODULE_PARM(debugflags,"i");
38628 +MODULE_PARM(debugdriver, "i");
38629 +MODULE_PARM(debughtc, "i");
38630 +MODULE_PARM(debugbmi, "i");
38631 +MODULE_PARM(debughif, "i");
38632 +MODULE_PARM(resetok, "i");
38633 +MODULE_PARM(txcreditsavailable, "0-3i");
38634 +MODULE_PARM(txcreditsconsumed, "0-3i");
38635 +MODULE_PARM(txcreditintrenable, "0-3i");
38636 +MODULE_PARM(txcreditintrenableaggregate, "0-3i");
38637 +#endif
38638 +
38639 +#else
38640 +unsigned int resetok = 1;
38641 +
38642 +#endif /* DEBUG */
38643 +
38644 +unsigned int tx_attempt[HTC_MAILBOX_NUM_MAX] = {0};
38645 +unsigned int tx_post[HTC_MAILBOX_NUM_MAX] = {0};
38646 +unsigned int tx_complete[HTC_MAILBOX_NUM_MAX] = {0};
38647 +unsigned int hifBusRequestNumMax = 40;
38648 +unsigned int war23838_disabled = 0;
38649 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
38650 +unsigned int enableAPTCHeuristics = 1;
38651 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
38652 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
38653 +module_param_array(tx_attempt, int, mboxnum, 0644);
38654 +module_param_array(tx_post, int, mboxnum, 0644);
38655 +module_param_array(tx_complete, int, mboxnum, 0644);
38656 +module_param(hifBusRequestNumMax, int, 0644);
38657 +module_param(war23838_disabled, int, 0644);
38658 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
38659 +module_param(enableAPTCHeuristics, int, 0644);
38660 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
38661 +#else
38662 +MODULE_PARM(tx_attempt, "0-3i");
38663 +MODULE_PARM(tx_post, "0-3i");
38664 +MODULE_PARM(tx_complete, "0-3i");
38665 +MODULE_PARM(hifBusRequestNumMax, "i");
38666 +MODULE_PARM(war23838_disabled, "i");
38667 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
38668 +MODULE_PARM(enableAPTCHeuristics, "i");
38669 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
38670 +#endif
38671 +
38672 +#ifdef BLOCK_TX_PATH_FLAG
38673 +int blocktx = 0;
38674 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
38675 +module_param(blocktx, int, 0644);
38676 +#else
38677 +MODULE_PARM(blocktx, "i");
38678 +#endif
38679 +#endif /* BLOCK_TX_PATH_FLAG */
38680 +
38681 +// TODO move to arsoft_c
38682 +USER_RSSI_THOLD rssi_map[12];
38683 +
38684 +int reconnect_flag = 0;
38685 +
38686 +DECLARE_WAIT_QUEUE_HEAD(ar6000_scan_queue);
38687 +
38688 +/* Function declarations */
38689 +static int ar6000_init_module(void);
38690 +static void ar6000_cleanup_module(void);
38691 +
38692 +int ar6000_init(struct net_device *dev);
38693 +static int ar6000_open(struct net_device *dev);
38694 +static int ar6000_close(struct net_device *dev);
38695 +static void ar6000_init_control_info(AR_SOFTC_T *ar);
38696 +static int ar6000_data_tx(struct sk_buff *skb, struct net_device *dev);
38697 +
38698 +static void ar6000_destroy(struct net_device *dev, unsigned int unregister);
38699 +static void ar6000_detect_error(unsigned long ptr);
38700 +static struct net_device_stats *ar6000_get_stats(struct net_device *dev);
38701 +static struct iw_statistics *ar6000_get_iwstats(struct net_device * dev);
38702 +
38703 +/*
38704 + * HTC service connection handlers
38705 + */
38706 +static void ar6000_avail_ev(HTC_HANDLE HTCHandle);
38707 +
38708 +static void ar6000_unavail_ev(void *Instance);
38709 +
38710 +static void ar6000_target_failure(void *Instance, A_STATUS Status);
38711 +
38712 +static void ar6000_rx(void *Context, HTC_PACKET *pPacket);
38713 +
38714 +static void ar6000_rx_refill(void *Context,HTC_ENDPOINT_ID Endpoint);
38715 +
38716 +static void ar6000_tx_complete(void *Context, HTC_PACKET *pPacket);
38717 +
38718 +static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint);
38719 +
38720 +/*
38721 + * Static variables
38722 + */
38723 +
38724 +static struct net_device *ar6000_devices[MAX_AR6000];
38725 +extern struct iw_handler_def ath_iw_handler_def;
38726 +DECLARE_WAIT_QUEUE_HEAD(arEvent);
38727 +static void ar6000_cookie_init(AR_SOFTC_T *ar);
38728 +static void ar6000_cookie_cleanup(AR_SOFTC_T *ar);
38729 +static void ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie);
38730 +static struct ar_cookie *ar6000_alloc_cookie(AR_SOFTC_T *ar);
38731 +static void ar6000_TxDataCleanup(AR_SOFTC_T *ar);
38732 +
38733 +#ifdef USER_KEYS
38734 +static A_STATUS ar6000_reinstall_keys(AR_SOFTC_T *ar,A_UINT8 key_op_ctrl);
38735 +#endif
38736 +
38737 +
38738 +static struct ar_cookie s_ar_cookie_mem[MAX_COOKIE_NUM];
38739 +
38740 +#define HOST_INTEREST_ITEM_ADDRESS(ar, item)    \
38741 +((ar->arTargetType == TARGET_TYPE_AR6001) ?     \
38742 +   AR6001_HOST_INTEREST_ITEM_ADDRESS(item) :    \
38743 +   AR6002_HOST_INTEREST_ITEM_ADDRESS(item))
38744 +
38745 +
38746 +/* Debug log support */
38747 +
38748 +/*
38749 + * Flag to govern whether the debug logs should be parsed in the kernel
38750 + * or reported to the application.
38751 + */
38752 +#ifdef DEBUG
38753 +#define REPORT_DEBUG_LOGS_TO_APP
38754 +#endif
38755 +
38756 +A_STATUS
38757 +ar6000_set_host_app_area(AR_SOFTC_T *ar)
38758 +{
38759 +    A_UINT32 address, data;
38760 +    struct host_app_area_s host_app_area;
38761 +
38762 +    /* Fetch the address of the host_app_area_s instance in the host interest area */
38763 +    address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_app_host_interest);
38764 +    if (ar6000_ReadRegDiag(ar->arHifDevice, &address, &data) != A_OK) {
38765 +        return A_ERROR;
38766 +    }
38767 +    address = data;
38768 +    host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
38769 +    if (ar6000_WriteDataDiag(ar->arHifDevice, address,
38770 +                             (A_UCHAR *)&host_app_area,
38771 +                             sizeof(struct host_app_area_s)) != A_OK)
38772 +    {
38773 +        return A_ERROR;
38774 +    }
38775 +
38776 +    return A_OK;
38777 +}
38778 +
38779 +A_UINT32
38780 +dbglog_get_debug_hdr_ptr(AR_SOFTC_T *ar)
38781 +{
38782 +    A_UINT32 param;
38783 +    A_UINT32 address;
38784 +    A_STATUS status;
38785 +
38786 +    address = HOST_INTEREST_ITEM_ADDRESS(ar, hi_dbglog_hdr);
38787 +    if ((status = ar6000_ReadDataDiag(ar->arHifDevice, address,
38788 +                                      (A_UCHAR *)&param, 4)) != A_OK)
38789 +    {
38790 +        param = 0;
38791 +    }
38792 +
38793 +    return param;
38794 +}
38795 +
38796 +/*
38797 + * The dbglog module has been initialized. Its ok to access the relevant
38798 + * data stuctures over the diagnostic window.
38799 + */
38800 +void
38801 +ar6000_dbglog_init_done(AR_SOFTC_T *ar)
38802 +{
38803 +    ar->dbglog_init_done = TRUE;
38804 +}
38805 +
38806 +A_UINT32
38807 +dbglog_get_debug_fragment(A_INT8 *datap, A_UINT32 len, A_UINT32 limit)
38808 +{
38809 +    A_INT32 *buffer;
38810 +    A_UINT32 count;
38811 +    A_UINT32 numargs;
38812 +    A_UINT32 length;
38813 +    A_UINT32 fraglen;
38814 +
38815 +    count = fraglen = 0;
38816 +    buffer = (A_INT32 *)datap;
38817 +    length = (limit >> 2);
38818 +
38819 +    if (len <= limit) {
38820 +        fraglen = len;
38821 +    } else {
38822 +        while (count < length) {
38823 +            numargs = DBGLOG_GET_NUMARGS(buffer[count]);
38824 +            fraglen = (count << 2);
38825 +            count += numargs + 1;
38826 +        }
38827 +    }
38828 +
38829 +    return fraglen;
38830 +}
38831 +
38832 +void
38833 +dbglog_parse_debug_logs(A_INT8 *datap, A_UINT32 len)
38834 +{
38835 +    A_INT32 *buffer;
38836 +    A_UINT32 count;
38837 +    A_UINT32 timestamp;
38838 +    A_UINT32 debugid;
38839 +    A_UINT32 moduleid;
38840 +    A_UINT32 numargs;
38841 +    A_UINT32 length;
38842 +
38843 +    count = 0;
38844 +    buffer = (A_INT32 *)datap;
38845 +    length = (len >> 2);
38846 +    while (count < length) {
38847 +        debugid = DBGLOG_GET_DBGID(buffer[count]);
38848 +        moduleid = DBGLOG_GET_MODULEID(buffer[count]);
38849 +        numargs = DBGLOG_GET_NUMARGS(buffer[count]);
38850 +        timestamp = DBGLOG_GET_TIMESTAMP(buffer[count]);
38851 +        switch (numargs) {
38852 +            case 0:
38853 +            AR_DEBUG_PRINTF("%d %d (%d)\n", moduleid, debugid, timestamp);
38854 +            break;
38855 +
38856 +            case 1:
38857 +            AR_DEBUG_PRINTF("%d %d (%d): 0x%x\n", moduleid, debugid,
38858 +                            timestamp, buffer[count+1]);
38859 +            break;
38860 +
38861 +            case 2:
38862 +            AR_DEBUG_PRINTF("%d %d (%d): 0x%x, 0x%x\n", moduleid, debugid,
38863 +                            timestamp, buffer[count+1], buffer[count+2]);
38864 +            break;
38865 +
38866 +            default:
38867 +            AR_DEBUG_PRINTF("Invalid args: %d\n", numargs);
38868 +        }
38869 +        count += numargs + 1;
38870 +    }
38871 +}
38872 +
38873 +int
38874 +ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar)
38875 +{
38876 +    struct dbglog_hdr_s debug_hdr;
38877 +    struct dbglog_buf_s debug_buf;
38878 +    A_UINT32 address;
38879 +    A_UINT32 length;
38880 +    A_UINT32 dropped;
38881 +    A_UINT32 firstbuf;
38882 +    A_UINT32 debug_hdr_ptr;
38883 +
38884 +    if (!ar->dbglog_init_done) return A_ERROR;
38885 +
38886 +
38887 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
38888 +
38889 +    if (ar->dbgLogFetchInProgress) {
38890 +        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
38891 +        return A_EBUSY;
38892 +    }
38893 +
38894 +        /* block out others */
38895 +    ar->dbgLogFetchInProgress = TRUE;
38896 +
38897 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
38898 +
38899 +    debug_hdr_ptr = dbglog_get_debug_hdr_ptr(ar);
38900 +    printk("debug_hdr_ptr: 0x%x\n", debug_hdr_ptr);
38901 +
38902 +    /* Get the contents of the ring buffer */
38903 +    if (debug_hdr_ptr) {
38904 +        address = debug_hdr_ptr;
38905 +        length = sizeof(struct dbglog_hdr_s);
38906 +        ar6000_ReadDataDiag(ar->arHifDevice, address,
38907 +                            (A_UCHAR *)&debug_hdr, length);
38908 +        address = (A_UINT32)debug_hdr.dbuf;
38909 +        firstbuf = address;
38910 +        dropped = debug_hdr.dropped;
38911 +        length = sizeof(struct dbglog_buf_s);
38912 +        ar6000_ReadDataDiag(ar->arHifDevice, address,
38913 +                            (A_UCHAR *)&debug_buf, length);
38914 +
38915 +        do {
38916 +            address = (A_UINT32)debug_buf.buffer;
38917 +            length = debug_buf.length;
38918 +            if ((length) && (debug_buf.length <= debug_buf.bufsize)) {
38919 +                /* Rewind the index if it is about to overrun the buffer */
38920 +                if (ar->log_cnt > (DBGLOG_HOST_LOG_BUFFER_SIZE - length)) {
38921 +                    ar->log_cnt = 0;
38922 +                }
38923 +                if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address,
38924 +                                    (A_UCHAR *)&ar->log_buffer[ar->log_cnt], length))
38925 +                {
38926 +                    break;
38927 +                }
38928 +                ar6000_dbglog_event(ar, dropped, &ar->log_buffer[ar->log_cnt], length);
38929 +                ar->log_cnt += length;
38930 +            } else {
38931 +                AR_DEBUG_PRINTF("Length: %d (Total size: %d)\n",
38932 +                                debug_buf.length, debug_buf.bufsize);
38933 +            }
38934 +
38935 +            address = (A_UINT32)debug_buf.next;
38936 +            length = sizeof(struct dbglog_buf_s);
38937 +            if(A_OK != ar6000_ReadDataDiag(ar->arHifDevice, address,
38938 +                                (A_UCHAR *)&debug_buf, length))
38939 +            {
38940 +                break;
38941 +            }
38942 +
38943 +        } while (address != firstbuf);
38944 +    }
38945 +
38946 +    ar->dbgLogFetchInProgress = FALSE;
38947 +
38948 +    return A_OK;
38949 +}
38950 +
38951 +void
38952 +ar6000_dbglog_event(AR_SOFTC_T *ar, A_UINT32 dropped,
38953 +                    A_INT8 *buffer, A_UINT32 length)
38954 +{
38955 +#ifdef REPORT_DEBUG_LOGS_TO_APP
38956 +    #define MAX_WIRELESS_EVENT_SIZE 252
38957 +    /*
38958 +     * Break it up into chunks of MAX_WIRELESS_EVENT_SIZE bytes of messages.
38959 +     * There seems to be a limitation on the length of message that could be
38960 +     * transmitted to the user app via this mechanism.
38961 +     */
38962 +    A_UINT32 send, sent;
38963 +
38964 +    sent = 0;
38965 +    send = dbglog_get_debug_fragment(&buffer[sent], length - sent,
38966 +                                     MAX_WIRELESS_EVENT_SIZE);
38967 +    while (send) {
38968 +        ar6000_send_event_to_app(ar, WMIX_DBGLOG_EVENTID, &buffer[sent], send);
38969 +        sent += send;
38970 +        send = dbglog_get_debug_fragment(&buffer[sent], length - sent,
38971 +                                         MAX_WIRELESS_EVENT_SIZE);
38972 +    }
38973 +#else
38974 +    AR_DEBUG_PRINTF("Dropped logs: 0x%x\nDebug info length: %d\n",
38975 +                    dropped, length);
38976 +
38977 +    /* Interpret the debug logs */
38978 +    dbglog_parse_debug_logs(buffer, length);
38979 +#endif /* REPORT_DEBUG_LOGS_TO_APP */
38980 +}
38981 +
38982 +
38983 +
38984 +static int __init
38985 +ar6000_init_module(void)
38986 +{
38987 +    static int probed = 0;
38988 +    A_STATUS status;
38989 +    HTC_INIT_INFO initInfo;
38990 +
38991 +    A_MEMZERO(&initInfo,sizeof(initInfo));
38992 +    initInfo.AddInstance = ar6000_avail_ev;
38993 +    initInfo.DeleteInstance = ar6000_unavail_ev;
38994 +    initInfo.TargetFailure = ar6000_target_failure;
38995 +
38996 +
38997 +#ifdef DEBUG
38998 +    /* Set the debug flags if specified at load time */
38999 +    if(debugflags != 0)
39000 +    {
39001 +        g_dbg_flags = debugflags;
39002 +    }
39003 +#endif
39004 +
39005 +    if (probed) {
39006 +        return -ENODEV;
39007 +    }
39008 +    probed++;
39009 +
39010 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
39011 +    memset(&aptcTR, 0, sizeof(APTC_TRAFFIC_RECORD));
39012 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
39013 +
39014 +#ifdef CONFIG_HOST_GPIO_SUPPORT
39015 +    ar6000_gpio_init();
39016 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
39017 +
39018 +    status = HTCInit(&initInfo);
39019 +    if(status != A_OK)
39020 +        return -ENODEV;
39021 +
39022 +    return 0;
39023 +}
39024 +
39025 +static void __exit
39026 +ar6000_cleanup_module(void)
39027 +{
39028 +    int i = 0;
39029 +    struct net_device *ar6000_netdev;
39030 +
39031 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
39032 +    /* Delete the Adaptive Power Control timer */
39033 +    if (timer_pending(&aptcTimer)) {
39034 +        del_timer_sync(&aptcTimer);
39035 +    }
39036 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
39037 +
39038 +    for (i=0; i < MAX_AR6000; i++) {
39039 +        if (ar6000_devices[i] != NULL) {
39040 +            ar6000_netdev = ar6000_devices[i];
39041 +            ar6000_devices[i] = NULL;
39042 +            ar6000_destroy(ar6000_netdev, 1);
39043 +        }
39044 +    }
39045 +
39046 +        /* shutting down HTC will cause the HIF layer to detach from the
39047 +         * underlying bus driver which will cause the subsequent deletion of
39048 +         * all HIF and HTC instances */
39049 +    HTCShutDown();
39050 +
39051 +    AR_DEBUG_PRINTF("ar6000_cleanup: success\n");
39052 +}
39053 +
39054 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
39055 +void
39056 +aptcTimerHandler(unsigned long arg)
39057 +{
39058 +    A_UINT32 numbytes;
39059 +    A_UINT32 throughput;
39060 +    AR_SOFTC_T *ar;
39061 +    A_STATUS status;
39062 +
39063 +    ar = (AR_SOFTC_T *)arg;
39064 +    A_ASSERT(ar != NULL);
39065 +    A_ASSERT(!timer_pending(&aptcTimer));
39066 +
39067 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
39068 +
39069 +    /* Get the number of bytes transferred */
39070 +    numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived;
39071 +    aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0;
39072 +
39073 +    /* Calculate and decide based on throughput thresholds */
39074 +    throughput = ((numbytes * 8)/APTC_TRAFFIC_SAMPLING_INTERVAL); /* Kbps */
39075 +    if (throughput < APTC_LOWER_THROUGHPUT_THRESHOLD) {
39076 +        /* Enable Sleep and delete the timer */
39077 +        A_ASSERT(ar->arWmiReady == TRUE);
39078 +        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
39079 +        status = wmi_powermode_cmd(ar->arWmi, REC_POWER);
39080 +        AR6000_SPIN_LOCK(&ar->arLock, 0);
39081 +        A_ASSERT(status == A_OK);
39082 +        aptcTR.timerScheduled = FALSE;
39083 +    } else {
39084 +        A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0);
39085 +    }
39086 +
39087 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
39088 +}
39089 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
39090 +
39091 +
39092 +
39093 +/* set HTC block size, assume BMI is already initialized */
39094 +A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar)
39095 +{
39096 +    A_STATUS status;
39097 +    A_UINT32 blocksizes[HTC_MAILBOX_NUM_MAX];
39098 +
39099 +    do {
39100 +            /* get the block sizes */
39101 +        status = HIFConfigureDevice(ar->arHifDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
39102 +                                    blocksizes, sizeof(blocksizes));
39103 +
39104 +        if (A_FAILED(status)) {
39105 +            AR_DEBUG_PRINTF("Failed to get block size info from HIF layer...\n");
39106 +            break;
39107 +        }
39108 +            /* note: we actually get the block size for mailbox 1, for SDIO the block
39109 +             * size on mailbox 0 is artificially set to 1 */
39110 +            /* must be a power of 2 */
39111 +        A_ASSERT((blocksizes[1] & (blocksizes[1] - 1)) == 0);
39112 +
39113 +            /* set the host interest area for the block size */
39114 +        status = BMIWriteMemory(ar->arHifDevice,
39115 +                                HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz),
39116 +                                (A_UCHAR *)&blocksizes[1],
39117 +                                4);
39118 +
39119 +        if (A_FAILED(status)) {
39120 +            AR_DEBUG_PRINTF("BMIWriteMemory for IO block size failed \n");
39121 +            break;
39122 +        }
39123 +
39124 +        AR_DEBUG_PRINTF("Block Size Set: %d (target address:0x%X)\n",
39125 +                blocksizes[1], HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_io_block_sz));
39126 +
39127 +            /* set the host interest area for the mbox ISR yield limit */
39128 +        status = BMIWriteMemory(ar->arHifDevice,
39129 +                                HOST_INTEREST_ITEM_ADDRESS(ar, hi_mbox_isr_yield_limit),
39130 +                                (A_UCHAR *)&mbox_yield_limit,
39131 +                                4);
39132 +
39133 +        if (A_FAILED(status)) {
39134 +            AR_DEBUG_PRINTF("BMIWriteMemory for yield limit failed \n");
39135 +            break;
39136 +        }
39137 +
39138 +    } while (FALSE);
39139 +
39140 +    return status;
39141 +}
39142 +
39143 +/*
39144 + * HTC Event handlers
39145 + */
39146 +static void
39147 +ar6000_avail_ev(HTC_HANDLE HTCHandle)
39148 +{
39149 +    int i;
39150 +    struct net_device *dev;
39151 +    AR_SOFTC_T *ar;
39152 +    int device_index = 0;
39153 +
39154 +    AR_DEBUG_PRINTF("ar6000_available\n");
39155 +
39156 +    for (i=0; i < MAX_AR6000; i++) {
39157 +        if (ar6000_devices[i] == NULL) {
39158 +            break;
39159 +        }
39160 +    }
39161 +
39162 +    if (i == MAX_AR6000) {
39163 +        AR_DEBUG_PRINTF("ar6000_available: max devices reached\n");
39164 +        return;
39165 +    }
39166 +
39167 +    /* Save this. It gives a bit better readability especially since */
39168 +    /* we use another local "i" variable below.                      */
39169 +    device_index = i;
39170 +
39171 +    A_ASSERT(HTCHandle != NULL);
39172 +
39173 +    dev = alloc_etherdev(sizeof(AR_SOFTC_T));
39174 +    if (dev == NULL) {
39175 +        AR_DEBUG_PRINTF("ar6000_available: can't alloc etherdev\n");
39176 +        return;
39177 +    }
39178 +
39179 +    ether_setup(dev);
39180 +
39181 +    if (dev->priv == NULL) {
39182 +        printk(KERN_CRIT "ar6000_available: Could not allocate memory\n");
39183 +        return;
39184 +    }
39185 +
39186 +    A_MEMZERO(dev->priv, sizeof(AR_SOFTC_T));
39187 +
39188 +    ar                       = (AR_SOFTC_T *)dev->priv;
39189 +    ar->arNetDev             = dev;
39190 +    ar->arHtcTarget          = HTCHandle;
39191 +    ar->arHifDevice          = HTCGetHifDevice(HTCHandle);
39192 +    ar->arWlanState          = WLAN_ENABLED;
39193 +    ar->arRadioSwitch        = WLAN_ENABLED;
39194 +    ar->arDeviceIndex        = device_index;
39195 +
39196 +    A_INIT_TIMER(&ar->arHBChallengeResp.timer, ar6000_detect_error, dev);
39197 +    ar->arHBChallengeResp.seqNum = 0;
39198 +    ar->arHBChallengeResp.outstanding = FALSE;
39199 +    ar->arHBChallengeResp.missCnt = 0;
39200 +    ar->arHBChallengeResp.frequency = AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT;
39201 +    ar->arHBChallengeResp.missThres = AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT;
39202 +
39203 +    ar6000_init_control_info(ar);
39204 +    init_waitqueue_head(&arEvent);
39205 +    sema_init(&ar->arSem, 1);
39206 +
39207 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
39208 +    A_INIT_TIMER(&aptcTimer, aptcTimerHandler, ar);
39209 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
39210 +
39211 +    /*
39212 +     * If requested, perform some magic which requires no cooperation from
39213 +     * the Target.  It causes the Target to ignore flash and execute to the
39214 +     * OS from ROM.
39215 +     *
39216 +     * This is intended to support recovery from a corrupted flash on Targets
39217 +     * that support flash.
39218 +     */
39219 +    if (skipflash)
39220 +    {
39221 +        ar6000_reset_device_skipflash(ar->arHifDevice);
39222 +            }
39223 +
39224 +    BMIInit();
39225 +    {
39226 +        struct bmi_target_info targ_info;
39227 +
39228 +        if (BMIGetTargetInfo(ar->arHifDevice, &targ_info) != A_OK) {
39229 +            return;
39230 +        }
39231 +
39232 +        ar->arVersion.target_ver = targ_info.target_ver;
39233 +        ar->arTargetType = targ_info.target_type;
39234 +    }
39235 +
39236 +    if (enableuartprint) {
39237 +        A_UINT32 param;
39238 +        param = 1;
39239 +        if (BMIWriteMemory(ar->arHifDevice,
39240 +                           HOST_INTEREST_ITEM_ADDRESS(ar, hi_serial_enable),
39241 +                           (A_UCHAR *)&param,
39242 +                           4)!= A_OK)
39243 +        {
39244 +             AR_DEBUG_PRINTF("BMIWriteMemory for enableuartprint failed \n");
39245 +             return ;
39246 +        }
39247 +        AR_DEBUG_PRINTF("Serial console prints enabled\n");
39248 +    }
39249 +#ifdef CONFIG_HOST_TCMD_SUPPORT
39250 +    if(testmode) {
39251 +        ar->arTargetMode = AR6000_TCMD_MODE;
39252 +    }else {
39253 +        ar->arTargetMode = AR6000_WLAN_MODE;
39254 +    }
39255 +#endif
39256 +    if (enabletimerwar) {
39257 +        A_UINT32 param;
39258 +
39259 +        if (BMIReadMemory(ar->arHifDevice,
39260 +            HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag),
39261 +            (A_UCHAR *)&param,
39262 +            4)!= A_OK)
39263 +        {
39264 +            AR_DEBUG_PRINTF("BMIReadMemory for enabletimerwar failed \n");
39265 +            return;
39266 +        }
39267 +
39268 +        param |= HI_OPTION_TIMER_WAR;
39269 +
39270 +        if (BMIWriteMemory(ar->arHifDevice,
39271 +            HOST_INTEREST_ITEM_ADDRESS(ar, hi_option_flag),
39272 +            (A_UCHAR *)&param,
39273 +            4) != A_OK)
39274 +        {
39275 +            AR_DEBUG_PRINTF("BMIWriteMemory for enabletimerwar failed \n");
39276 +            return;
39277 +        }
39278 +        AR_DEBUG_PRINTF("Timer WAR enabled\n");
39279 +    }
39280 +
39281 +
39282 +        /* since BMIInit is called in the driver layer, we have to set the block
39283 +         * size here for the target */
39284 +
39285 +    if (A_FAILED(ar6000_SetHTCBlockSize(ar))) {
39286 +        return;
39287 +    }
39288 +
39289 +    spin_lock_init(&ar->arLock);
39290 +
39291 +    /* Don't install the init function if BMI is requested */
39292 +    if(!bmienable)
39293 +    {
39294 +        dev->init = ar6000_init;
39295 +    } else {
39296 +        AR_DEBUG_PRINTF(" BMI enabled \n");
39297 +    }
39298 +
39299 +    dev->open = &ar6000_open;
39300 +    dev->stop = &ar6000_close;
39301 +    dev->hard_start_xmit = &ar6000_data_tx;
39302 +    dev->get_stats = &ar6000_get_stats;
39303 +
39304 +    /* dev->tx_timeout = ar6000_tx_timeout; */
39305 +    dev->do_ioctl = &ar6000_ioctl;
39306 +    dev->watchdog_timeo = AR6000_TX_TIMEOUT;
39307 +    ar6000_ioctl_iwsetup(&ath_iw_handler_def);
39308 +    dev->wireless_handlers = &ath_iw_handler_def;
39309 +    ath_iw_handler_def.get_wireless_stats = ar6000_get_iwstats; /*Displayed via proc fs */
39310 +
39311 +    /*
39312 +     * We need the OS to provide us with more headroom in order to
39313 +     * perform dix to 802.3, WMI header encap, and the HTC header
39314 +     */
39315 +    dev->hard_header_len = ETH_HLEN + sizeof(ATH_LLC_SNAP_HDR) +
39316 +        sizeof(WMI_DATA_HDR) + HTC_HEADER_LEN;
39317 +
39318 +    /* This runs the init function */
39319 +    SET_NETDEV_DEV(dev, HIFGetOSDevice(ar->arHifDevice));
39320 +    if (register_netdev(dev)) {
39321 +        AR_DEBUG_PRINTF("ar6000_avail: register_netdev failed\n");
39322 +        ar6000_destroy(dev, 0);
39323 +        return;
39324 +    }
39325 +
39326 +    HTCSetInstance(ar->arHtcTarget, ar);
39327 +
39328 +    /* We only register the device in the global list if we succeed. */
39329 +    /* If the device is in the global list, it will be destroyed     */
39330 +    /* when the module is unloaded.                                  */
39331 +    ar6000_devices[device_index] = dev;
39332 +
39333 +    AR_DEBUG_PRINTF("ar6000_avail: name=%s htcTarget=0x%x, dev=0x%x (%d), ar=0x%x\n",
39334 +                    dev->name, (A_UINT32)HTCHandle, (A_UINT32)dev, device_index,
39335 +                    (A_UINT32)ar);
39336 +}
39337 +
39338 +static void ar6000_target_failure(void *Instance, A_STATUS Status)
39339 +{
39340 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance;
39341 +    WMI_TARGET_ERROR_REPORT_EVENT errEvent;
39342 +    static A_BOOL sip = FALSE;
39343 +
39344 +    if (Status != A_OK) {
39345 +        if (timer_pending(&ar->arHBChallengeResp.timer)) {
39346 +            A_UNTIMEOUT(&ar->arHBChallengeResp.timer);
39347 +        }
39348 +
39349 +        /* try dumping target assertion information (if any) */
39350 +        ar6000_dump_target_assert_info(ar->arHifDevice,ar->arTargetType);
39351 +
39352 +        /*
39353 +         * Fetch the logs from the target via the diagnostic
39354 +         * window.
39355 +         */
39356 +        ar6000_dbglog_get_debug_logs(ar);
39357 +
39358 +        /* Report the error only once */
39359 +        if (!sip) {
39360 +            sip = TRUE;
39361 +            errEvent.errorVal = WMI_TARGET_COM_ERR |
39362 +                                WMI_TARGET_FATAL_ERR;
39363 +#ifdef SEND_EVENT_TO_APP
39364 +            ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID,
39365 +                                     (A_UINT8 *)&errEvent,
39366 +                                     sizeof(WMI_TARGET_ERROR_REPORT_EVENT));
39367 +#endif
39368 +        }
39369 +    }
39370 +}
39371 +
39372 +static void
39373 +ar6000_unavail_ev(void *Instance)
39374 +{
39375 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)Instance;
39376 +        /* NULL out it's entry in the global list */
39377 +    ar6000_devices[ar->arDeviceIndex] = NULL;
39378 +    ar6000_destroy(ar->arNetDev, 1);
39379 +}
39380 +
39381 +/*
39382 + * We need to differentiate between the surprise and planned removal of the
39383 + * device because of the following consideration:
39384 + * - In case of surprise removal, the hcd already frees up the pending
39385 + *   for the device and hence there is no need to unregister the function
39386 + *   driver inorder to get these requests. For planned removal, the function
39387 + *   driver has to explictly unregister itself to have the hcd return all the
39388 + *   pending requests before the data structures for the devices are freed up.
39389 + *   Note that as per the current implementation, the function driver will
39390 + *   end up releasing all the devices since there is no API to selectively
39391 + *   release a particular device.
39392 + * - Certain commands issued to the target can be skipped for surprise
39393 + *   removal since they will anyway not go through.
39394 + */
39395 +static void
39396 +ar6000_destroy(struct net_device *dev, unsigned int unregister)
39397 +{
39398 +    AR_SOFTC_T *ar;
39399 +
39400 +    AR_DEBUG_PRINTF("+ar6000_destroy \n");
39401 +
39402 +    if((dev == NULL) || ((ar = netdev_priv(dev)) == NULL))
39403 +    {
39404 +        AR_DEBUG_PRINTF("%s(): Failed to get device structure.\n", __func__);
39405 +        return;
39406 +    }
39407 +
39408 +    /* Stop the transmit queues */
39409 +    netif_stop_queue(dev);
39410 +
39411 +    /* Disable the target and the interrupts associated with it */
39412 +    if (ar->arWmiReady == TRUE)
39413 +    {
39414 +        if (!bypasswmi)
39415 +        {
39416 +            if (ar->arConnected == TRUE || ar->arConnectPending == TRUE)
39417 +            {
39418 +                AR_DEBUG_PRINTF("%s(): Disconnect\n", __func__);
39419 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
39420 +                ar6000_init_profile_info(ar);
39421 +                AR6000_SPIN_UNLOCK(&ar->arLock, 0);
39422 +                wmi_disconnect_cmd(ar->arWmi);
39423 +            }
39424 +
39425 +            ar6000_dbglog_get_debug_logs(ar);
39426 +            ar->arWmiReady  = FALSE;
39427 +            ar->arConnected = FALSE;
39428 +            ar->arConnectPending = FALSE;
39429 +            wmi_shutdown(ar->arWmi);
39430 +            ar->arWmiEnabled = FALSE;
39431 +            ar->arWmi = NULL;
39432 +            ar->arWlanState = WLAN_ENABLED;
39433 +#ifdef USER_KEYS
39434 +            ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
39435 +            ar->user_key_ctrl      = 0;
39436 +#endif
39437 +        }
39438 +
39439 +         AR_DEBUG_PRINTF("%s(): WMI stopped\n", __func__);
39440 +    }
39441 +    else
39442 +    {
39443 +        AR_DEBUG_PRINTF("%s(): WMI not ready 0x%08x 0x%08x\n",
39444 +            __func__, (unsigned int) ar, (unsigned int) ar->arWmi);
39445 +
39446 +        /* Shut down WMI if we have started it */
39447 +        if(ar->arWmiEnabled == TRUE)
39448 +        {
39449 +            AR_DEBUG_PRINTF("%s(): Shut down WMI\n", __func__);
39450 +            wmi_shutdown(ar->arWmi);
39451 +            ar->arWmiEnabled = FALSE;
39452 +            ar->arWmi = NULL;
39453 +        }
39454 +    }
39455 +
39456 +    /* stop HTC */
39457 +    HTCStop(ar->arHtcTarget);
39458 +
39459 +    /* set the instance to NULL so we do not get called back on remove incase we
39460 +     * we're explicity destroyed by module unload */
39461 +    HTCSetInstance(ar->arHtcTarget, NULL);
39462 +
39463 +    if (resetok) {
39464 +        /* try to reset the device if we can
39465 +         * The driver may have been configure NOT to reset the target during
39466 +         * a debug session */
39467 +        AR_DEBUG_PRINTF(" Attempting to reset target on instance destroy.... \n");
39468 +        ar6000_reset_device(ar->arHifDevice, ar->arTargetType);
39469 +    } else {
39470 +        AR_DEBUG_PRINTF(" Host does not want target reset. \n");
39471 +    }
39472 +
39473 +       /* Done with cookies */
39474 +    ar6000_cookie_cleanup(ar);
39475 +
39476 +    /* Cleanup BMI */
39477 +    BMIInit();
39478 +
39479 +    /* Clear the tx counters */
39480 +    memset(tx_attempt, 0, sizeof(tx_attempt));
39481 +    memset(tx_post, 0, sizeof(tx_post));
39482 +    memset(tx_complete, 0, sizeof(tx_complete));
39483 +
39484 +
39485 +    /* Free up the device data structure */
39486 +    if (unregister)
39487 +           unregister_netdev(dev);
39488 +#ifndef free_netdev
39489 +    kfree(dev);
39490 +#else
39491 +    free_netdev(dev);
39492 +#endif
39493 +
39494 +    AR_DEBUG_PRINTF("-ar6000_destroy \n");
39495 +}
39496 +
39497 +static void ar6000_detect_error(unsigned long ptr)
39498 +{
39499 +    struct net_device *dev = (struct net_device *)ptr;
39500 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
39501 +    WMI_TARGET_ERROR_REPORT_EVENT errEvent;
39502 +
39503 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
39504 +
39505 +    if (ar->arHBChallengeResp.outstanding) {
39506 +        ar->arHBChallengeResp.missCnt++;
39507 +    } else {
39508 +        ar->arHBChallengeResp.missCnt = 0;
39509 +    }
39510 +
39511 +    if (ar->arHBChallengeResp.missCnt > ar->arHBChallengeResp.missThres) {
39512 +        /* Send Error Detect event to the application layer and do not reschedule the error detection module timer */
39513 +        ar->arHBChallengeResp.missCnt = 0;
39514 +        ar->arHBChallengeResp.seqNum = 0;
39515 +        errEvent.errorVal = WMI_TARGET_COM_ERR | WMI_TARGET_FATAL_ERR;
39516 +        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
39517 +#ifdef SEND_EVENT_TO_APP
39518 +        ar6000_send_event_to_app(ar, WMI_ERROR_REPORT_EVENTID,
39519 +                                 (A_UINT8 *)&errEvent,
39520 +                                 sizeof(WMI_TARGET_ERROR_REPORT_EVENT));
39521 +#endif
39522 +        return;
39523 +    }
39524 +
39525 +    /* Generate the sequence number for the next challenge */
39526 +    ar->arHBChallengeResp.seqNum++;
39527 +    ar->arHBChallengeResp.outstanding = TRUE;
39528 +
39529 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
39530 +
39531 +    /* Send the challenge on the control channel */
39532 +    if (wmi_get_challenge_resp_cmd(ar->arWmi, ar->arHBChallengeResp.seqNum, DRV_HB_CHALLENGE) != A_OK) {
39533 +        AR_DEBUG_PRINTF("Unable to send heart beat challenge\n");
39534 +    }
39535 +
39536 +
39537 +    /* Reschedule the timer for the next challenge */
39538 +    A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0);
39539 +}
39540 +
39541 +void ar6000_init_profile_info(AR_SOFTC_T *ar)
39542 +{
39543 +    ar->arSsidLen            = 0;
39544 +    A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
39545 +    ar->arNetworkType        = INFRA_NETWORK;
39546 +    ar->arDot11AuthMode      = OPEN_AUTH;
39547 +    ar->arAuthMode           = NONE_AUTH;
39548 +    ar->arPairwiseCrypto     = NONE_CRYPT;
39549 +    ar->arPairwiseCryptoLen  = 0;
39550 +    ar->arGroupCrypto        = NONE_CRYPT;
39551 +    ar->arGroupCryptoLen     = 0;
39552 +    A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList));
39553 +    A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
39554 +    A_MEMZERO(ar->arBssid, sizeof(ar->arBssid));
39555 +    ar->arBssChannel = 0;
39556 +}
39557 +
39558 +static void
39559 +ar6000_init_control_info(AR_SOFTC_T *ar)
39560 +{
39561 +    ar->arWmiEnabled         = FALSE;
39562 +    ar6000_init_profile_info(ar);
39563 +    ar->arDefTxKeyIndex      = 0;
39564 +    A_MEMZERO(ar->arWepKeyList, sizeof(ar->arWepKeyList));
39565 +    ar->arChannelHint        = 0;
39566 +    ar->arListenInterval     = MAX_LISTEN_INTERVAL;
39567 +    ar->arVersion.host_ver   = AR6K_SW_VERSION;
39568 +    ar->arRssi               = 0;
39569 +    ar->arTxPwr              = 0;
39570 +    ar->arTxPwrSet           = FALSE;
39571 +    ar->arSkipScan           = 0;
39572 +    ar->arBeaconInterval     = 0;
39573 +    ar->arBitRate            = 0;
39574 +    ar->arMaxRetries         = 0;
39575 +    ar->arWmmEnabled         = TRUE;
39576 +}
39577 +
39578 +static int
39579 +ar6000_open(struct net_device *dev)
39580 +{
39581 +    /* Wake up the queues */
39582 +    netif_wake_queue(dev);
39583 +
39584 +    return 0;
39585 +}
39586 +
39587 +static int
39588 +ar6000_close(struct net_device *dev)
39589 +{
39590 +    netif_stop_queue(dev);
39591 +
39592 +    return 0;
39593 +}
39594 +
39595 +/* connect to a service */
39596 +static A_STATUS ar6000_connectservice(AR_SOFTC_T               *ar,
39597 +                                      HTC_SERVICE_CONNECT_REQ  *pConnect,
39598 +                                      WMI_PRI_STREAM_ID        WmiStreamID,
39599 +                                      char                     *pDesc)
39600 +{
39601 +    A_STATUS                 status;
39602 +    HTC_SERVICE_CONNECT_RESP response;
39603 +
39604 +    do {
39605 +
39606 +        A_MEMZERO(&response,sizeof(response));
39607 +
39608 +        status = HTCConnectService(ar->arHtcTarget,
39609 +                                   pConnect,
39610 +                                   &response);
39611 +
39612 +        if (A_FAILED(status)) {
39613 +            AR_DEBUG_PRINTF(" Failed to connect to %s service status:%d \n", pDesc, status);
39614 +            break;
39615 +        }
39616 +
39617 +        if (WmiStreamID == WMI_NOT_MAPPED) {
39618 +                /* done */
39619 +            break;
39620 +        }
39621 +
39622 +            /* set endpoint mapping for the WMI stream in the driver layer */
39623 +        arSetWMIStream2EndpointIDMap(ar,WmiStreamID,response.Endpoint);
39624 +
39625 +    } while (FALSE);
39626 +
39627 +    return status;
39628 +}
39629 +
39630 +static void ar6000_TxDataCleanup(AR_SOFTC_T *ar)
39631 +{
39632 +        /* flush all the data (non-control) streams
39633 +         * we only flush packets that are tagged as data, we leave any control packets that
39634 +         * were in the TX queues alone */
39635 +    HTCFlushEndpoint(ar->arHtcTarget,
39636 +                     arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI),
39637 +                     AR6K_DATA_PKT_TAG);
39638 +    HTCFlushEndpoint(ar->arHtcTarget,
39639 +                     arWMIStream2EndpointID(ar,WMI_LOW_PRI),
39640 +                     AR6K_DATA_PKT_TAG);
39641 +    HTCFlushEndpoint(ar->arHtcTarget,
39642 +                     arWMIStream2EndpointID(ar,WMI_HIGH_PRI),
39643 +                     AR6K_DATA_PKT_TAG);
39644 +    HTCFlushEndpoint(ar->arHtcTarget,
39645 +                     arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI),
39646 +                     AR6K_DATA_PKT_TAG);
39647 +}
39648 +
39649 +/* This function does one time initialization for the lifetime of the device */
39650 +int ar6000_init(struct net_device *dev)
39651 +{
39652 +    AR_SOFTC_T *ar;
39653 +    A_STATUS    status;
39654 +    A_INT32     timeleft;
39655 +
39656 +    if((ar = netdev_priv(dev)) == NULL)
39657 +    {
39658 +        return(-EIO);
39659 +    }
39660 +
39661 +    /* Do we need to finish the BMI phase */
39662 +    if(BMIDone(ar->arHifDevice) != A_OK)
39663 +    {
39664 +        return -EIO;
39665 +    }
39666 +
39667 +    if (!bypasswmi)
39668 +    {
39669 +#if 0 /* TBDXXX */
39670 +        if (ar->arVersion.host_ver != ar->arVersion.target_ver) {
39671 +            A_PRINTF("WARNING: Host version 0x%x does not match Target "
39672 +                    " version 0x%x!\n",
39673 +                    ar->arVersion.host_ver, ar->arVersion.target_ver);
39674 +        }
39675 +#endif
39676 +
39677 +        /* Indicate that WMI is enabled (although not ready yet) */
39678 +        ar->arWmiEnabled = TRUE;
39679 +        if ((ar->arWmi = wmi_init((void *) ar)) == NULL)
39680 +        {
39681 +            AR_DEBUG_PRINTF("%s() Failed to initialize WMI.\n", __func__);
39682 +            return(-EIO);
39683 +        }
39684 +
39685 +        AR_DEBUG_PRINTF("%s() Got WMI @ 0x%08x.\n", __func__,
39686 +            (unsigned int) ar->arWmi);
39687 +    }
39688 +
39689 +    do {
39690 +        HTC_SERVICE_CONNECT_REQ connect;
39691 +
39692 +            /* the reason we have to wait for the target here is that the driver layer
39693 +             * has to init BMI in order to set the host block size,
39694 +             */
39695 +        status = HTCWaitTarget(ar->arHtcTarget);
39696 +
39697 +        if (A_FAILED(status)) {
39698 +            break;
39699 +        }
39700 +
39701 +        A_MEMZERO(&connect,sizeof(connect));
39702 +            /* meta data is unused for now */
39703 +        connect.pMetaData = NULL;
39704 +        connect.MetaDataLength = 0;
39705 +            /* these fields are the same for all service endpoints */
39706 +        connect.EpCallbacks.pContext = ar;
39707 +        connect.EpCallbacks.EpTxComplete = ar6000_tx_complete;
39708 +        connect.EpCallbacks.EpRecv = ar6000_rx;
39709 +        connect.EpCallbacks.EpRecvRefill = ar6000_rx_refill;
39710 +        connect.EpCallbacks.EpSendFull = ar6000_tx_queue_full;
39711 +            /* set the max queue depth so that our ar6000_tx_queue_full handler gets called.
39712 +             * Linux has the peculiarity of not providing flow control between the
39713 +             * NIC and the network stack. There is no API to indicate that a TX packet
39714 +             * was sent which could provide some back pressure to the network stack.
39715 +             * Under linux you would have to wait till the network stack consumed all sk_buffs
39716 +             * before any back-flow kicked in. Which isn't very friendly.
39717 +             * So we have to manage this ourselves */
39718 +        connect.MaxSendQueueDepth = 32;
39719 +
39720 +            /* connect to control service */
39721 +        connect.ServiceID = WMI_CONTROL_SVC;
39722 +        status = ar6000_connectservice(ar,
39723 +                                       &connect,
39724 +                                       WMI_CONTROL_PRI,
39725 +                                       "WMI CONTROL");
39726 +        if (A_FAILED(status)) {
39727 +            break;
39728 +        }
39729 +
39730 +            /* for the remaining data services set the connection flag to reduce dribbling,
39731 +             * if configured to do so */
39732 +        if (reduce_credit_dribble) {
39733 +            connect.ConnectionFlags |= HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE;
39734 +            /* the credit dribble trigger threshold is (reduce_credit_dribble - 1) for a value
39735 +             * of 0-3 */
39736 +            connect.ConnectionFlags &= ~HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK;
39737 +            connect.ConnectionFlags |=
39738 +                        ((A_UINT16)reduce_credit_dribble - 1) & HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK;
39739 +        }
39740 +            /* connect to best-effort service */
39741 +        connect.ServiceID = WMI_DATA_BE_SVC;
39742 +
39743 +        status = ar6000_connectservice(ar,
39744 +                                       &connect,
39745 +                                       WMI_BEST_EFFORT_PRI,
39746 +                                       "WMI DATA BE");
39747 +        if (A_FAILED(status)) {
39748 +            break;
39749 +        }
39750 +
39751 +            /* connect to back-ground
39752 +             * map this to WMI LOW_PRI */
39753 +        connect.ServiceID = WMI_DATA_BK_SVC;
39754 +        status = ar6000_connectservice(ar,
39755 +                                       &connect,
39756 +                                       WMI_LOW_PRI,
39757 +                                       "WMI DATA BK");
39758 +        if (A_FAILED(status)) {
39759 +            break;
39760 +        }
39761 +
39762 +            /* connect to Video service, map this to
39763 +             * to HI PRI */
39764 +        connect.ServiceID = WMI_DATA_VI_SVC;
39765 +        status = ar6000_connectservice(ar,
39766 +                                       &connect,
39767 +                                       WMI_HIGH_PRI,
39768 +                                       "WMI DATA VI");
39769 +        if (A_FAILED(status)) {
39770 +            break;
39771 +        }
39772 +
39773 +            /* connect to VO service, this is currently not
39774 +             * mapped to a WMI priority stream due to historical reasons.
39775 +             * WMI originally defined 3 priorities over 3 mailboxes
39776 +             * We can change this when WMI is reworked so that priorities are not
39777 +             * dependent on mailboxes */
39778 +        connect.ServiceID = WMI_DATA_VO_SVC;
39779 +        status = ar6000_connectservice(ar,
39780 +                                       &connect,
39781 +                                       WMI_HIGHEST_PRI,
39782 +                                       "WMI DATA VO");
39783 +        if (A_FAILED(status)) {
39784 +            break;
39785 +        }
39786 +
39787 +        A_ASSERT(arWMIStream2EndpointID(ar,WMI_CONTROL_PRI) != 0);
39788 +        A_ASSERT(arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI) != 0);
39789 +        A_ASSERT(arWMIStream2EndpointID(ar,WMI_LOW_PRI) != 0);
39790 +        A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGH_PRI) != 0);
39791 +        A_ASSERT(arWMIStream2EndpointID(ar,WMI_HIGHEST_PRI) != 0);
39792 +    } while (FALSE);
39793 +
39794 +    if (A_FAILED(status)) {
39795 +        return (-EIO);
39796 +    }
39797 +
39798 +    /*
39799 +     * give our connected endpoints some buffers
39800 +     */
39801 +    ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_CONTROL_PRI));
39802 +
39803 +    ar6000_rx_refill(ar, arWMIStream2EndpointID(ar,WMI_BEST_EFFORT_PRI));
39804 +
39805 +    /*
39806 +     * We will post the receive buffers only for SPE testing and so we are
39807 +     * making it conditional on the 'bypasswmi' flag.
39808 +     */
39809 +    if (bypasswmi) {
39810 +        ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_LOW_PRI));
39811 +        ar6000_rx_refill(ar,arWMIStream2EndpointID(ar,WMI_HIGH_PRI));
39812 +    }
39813 +
39814 +        /* setup credit distribution */
39815 +    ar6000_setup_credit_dist(ar->arHtcTarget, &ar->arCreditStateInfo);
39816 +
39817 +    /* Since cookies are used for HTC transports, they should be */
39818 +    /* initialized prior to enabling HTC.                        */
39819 +    ar6000_cookie_init(ar);
39820 +
39821 +    /* start HTC */
39822 +    status = HTCStart(ar->arHtcTarget);
39823 +
39824 +    if (status != A_OK) {
39825 +        if (ar->arWmiEnabled == TRUE) {
39826 +            wmi_shutdown(ar->arWmi);
39827 +            ar->arWmiEnabled = FALSE;
39828 +            ar->arWmi = NULL;
39829 +        }
39830 +        ar6000_cookie_cleanup(ar);
39831 +        return -EIO;
39832 +    }
39833 +
39834 +    if (!bypasswmi) {
39835 +        /* Wait for Wmi event to be ready */
39836 +        timeleft = wait_event_interruptible_timeout(arEvent,
39837 +            (ar->arWmiReady == TRUE), wmitimeout * HZ);
39838 +
39839 +        if(!timeleft || signal_pending(current))
39840 +        {
39841 +            AR_DEBUG_PRINTF("WMI is not ready or wait was interrupted\n");
39842 +#if defined(DWSIM) /* TBDXXX */
39843 +            AR_DEBUG_PRINTF(".....but proceed anyway.\n");
39844 +#else
39845 +            return -EIO;
39846 +#endif
39847 +        }
39848 +
39849 +        AR_DEBUG_PRINTF("%s() WMI is ready\n", __func__);
39850 +
39851 +        /* Communicate the wmi protocol verision to the target */
39852 +        if ((ar6000_set_host_app_area(ar)) != A_OK) {
39853 +            AR_DEBUG_PRINTF("Unable to set the host app area\n");
39854 +        }
39855 +    }
39856 +
39857 +    ar->arNumDataEndPts = 1;
39858 +
39859 +    return(0);
39860 +}
39861 +
39862 +
39863 +void
39864 +ar6000_bitrate_rx(void *devt, A_INT32 rateKbps)
39865 +{
39866 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
39867 +
39868 +    ar->arBitRate = rateKbps;
39869 +    wake_up(&arEvent);
39870 +}
39871 +
39872 +void
39873 +ar6000_ratemask_rx(void *devt, A_UINT16 ratemask)
39874 +{
39875 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
39876 +
39877 +    ar->arRateMask = ratemask;
39878 +    wake_up(&arEvent);
39879 +}
39880 +
39881 +void
39882 +ar6000_txPwr_rx(void *devt, A_UINT8 txPwr)
39883 +{
39884 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
39885 +
39886 +    ar->arTxPwr = txPwr;
39887 +    wake_up(&arEvent);
39888 +}
39889 +
39890 +
39891 +void
39892 +ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList)
39893 +{
39894 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
39895 +
39896 +    A_MEMCPY(ar->arChannelList, chanList, numChan * sizeof (A_UINT16));
39897 +    ar->arNumChannels = numChan;
39898 +
39899 +    wake_up(&arEvent);
39900 +}
39901 +
39902 +A_UINT8
39903 +ar6000_ibss_map_epid(struct sk_buff *skb, struct net_device *dev, A_UINT32 * mapNo)
39904 +{
39905 +    AR_SOFTC_T      *ar = (AR_SOFTC_T *)dev->priv;
39906 +    A_UINT8         *datap;
39907 +    ATH_MAC_HDR     *macHdr;
39908 +    A_UINT32         i, eptMap;
39909 +
39910 +    (*mapNo) = 0;
39911 +    datap = A_NETBUF_DATA(skb);
39912 +    macHdr = (ATH_MAC_HDR *)(datap + sizeof(WMI_DATA_HDR));
39913 +    if (IEEE80211_IS_MULTICAST(macHdr->dstMac)) {
39914 +        return ENDPOINT_2;
39915 +    }
39916 +
39917 +    eptMap = -1;
39918 +    for (i = 0; i < ar->arNodeNum; i ++) {
39919 +        if (IEEE80211_ADDR_EQ(macHdr->dstMac, ar->arNodeMap[i].macAddress)) {
39920 +            (*mapNo) = i + 1;
39921 +            ar->arNodeMap[i].txPending ++;
39922 +            return ar->arNodeMap[i].epId;
39923 +        }
39924 +
39925 +        if ((eptMap == -1) && !ar->arNodeMap[i].txPending) {
39926 +            eptMap = i;
39927 +        }
39928 +    }
39929 +
39930 +    if (eptMap == -1) {
39931 +        eptMap = ar->arNodeNum;
39932 +        ar->arNodeNum ++;
39933 +        A_ASSERT(ar->arNodeNum <= MAX_NODE_NUM);
39934 +    }
39935 +
39936 +    A_MEMCPY(ar->arNodeMap[eptMap].macAddress, macHdr->dstMac, IEEE80211_ADDR_LEN);
39937 +
39938 +    for (i = ENDPOINT_2; i <= ENDPOINT_5; i ++) {
39939 +        if (!ar->arTxPending[i]) {
39940 +            ar->arNodeMap[eptMap].epId = i;
39941 +            break;
39942 +        }
39943 +        // No free endpoint is available, start redistribution on the inuse endpoints.
39944 +        if (i == ENDPOINT_5) {
39945 +            ar->arNodeMap[eptMap].epId = ar->arNexEpId;
39946 +            ar->arNexEpId ++;
39947 +            if (ar->arNexEpId > ENDPOINT_5) {
39948 +                ar->arNexEpId = ENDPOINT_2;
39949 +            }
39950 +        }
39951 +    }
39952 +
39953 +    (*mapNo) = eptMap + 1;
39954 +    ar->arNodeMap[eptMap].txPending ++;
39955 +
39956 +    return ar->arNodeMap[eptMap].epId;
39957 +}
39958 +
39959 +#ifdef DEBUG
39960 +static void ar6000_dump_skb(struct sk_buff *skb)
39961 +{
39962 +   u_char *ch;
39963 +   for (ch = A_NETBUF_DATA(skb);
39964 +        (A_UINT32)ch < ((A_UINT32)A_NETBUF_DATA(skb) +
39965 +        A_NETBUF_LEN(skb)); ch++)
39966 +    {
39967 +         AR_DEBUG_PRINTF("%2.2x ", *ch);
39968 +    }
39969 +    AR_DEBUG_PRINTF("\n");
39970 +}
39971 +#endif
39972 +
39973 +static int
39974 +ar6000_data_tx(struct sk_buff *skb, struct net_device *dev)
39975 +{
39976 +    AR_SOFTC_T        *ar = (AR_SOFTC_T *)dev->priv;
39977 +    WMI_PRI_STREAM_ID streamID = WMI_NOT_MAPPED;
39978 +    A_UINT32          mapNo = 0;
39979 +    int               len;
39980 +    struct ar_cookie *cookie;
39981 +    A_BOOL            checkAdHocPsMapping = FALSE;
39982 +
39983 +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
39984 +    skb->list = NULL;
39985 +#endif
39986 +
39987 +    AR_DEBUG2_PRINTF("ar6000_data_tx start - skb=0x%x, data=0x%x, len=0x%x\n",
39988 +                     (A_UINT32)skb, (A_UINT32)A_NETBUF_DATA(skb),
39989 +                     A_NETBUF_LEN(skb));
39990 +#ifdef CONFIG_HOST_TCMD_SUPPORT
39991 +     /* TCMD doesnt support any data, free the buf and return */
39992 +    if(ar->arTargetMode == AR6000_TCMD_MODE) {
39993 +        A_NETBUF_FREE(skb);
39994 +        return 0;
39995 +    }
39996 +#endif
39997 +    do {
39998 +
39999 +        if (ar->arWmiReady == FALSE && bypasswmi == 0) {
40000 +            break;
40001 +        }
40002 +
40003 +#ifdef BLOCK_TX_PATH_FLAG
40004 +        if (blocktx) {
40005 +            break;
40006 +        }
40007 +#endif /* BLOCK_TX_PATH_FLAG */
40008 +
40009 +        if (ar->arWmiEnabled) {
40010 +            if (A_NETBUF_HEADROOM(skb) < dev->hard_header_len) {
40011 +                struct sk_buff  *newbuf;
40012 +                /*
40013 +                 * We really should have gotten enough headroom but sometimes
40014 +                 * we still get packets with not enough headroom.  Copy the packet.
40015 +                 */
40016 +                len = A_NETBUF_LEN(skb);
40017 +                newbuf = A_NETBUF_ALLOC(len);
40018 +                if (newbuf == NULL) {
40019 +                    break;
40020 +                }
40021 +                A_NETBUF_PUT(newbuf, len);
40022 +                A_MEMCPY(A_NETBUF_DATA(newbuf), A_NETBUF_DATA(skb), len);
40023 +                A_NETBUF_FREE(skb);
40024 +                skb = newbuf;
40025 +                /* fall through and assemble header */
40026 +            }
40027 +
40028 +            if (wmi_dix_2_dot3(ar->arWmi, skb) != A_OK) {
40029 +                AR_DEBUG_PRINTF("ar6000_data_tx - wmi_dix_2_dot3 failed\n");
40030 +                break;
40031 +            }
40032 +
40033 +            if (wmi_data_hdr_add(ar->arWmi, skb, DATA_MSGTYPE) != A_OK) {
40034 +                AR_DEBUG_PRINTF("ar6000_data_tx - wmi_data_hdr_add failed\n");
40035 +                break;
40036 +            }
40037 +
40038 +            if ((ar->arNetworkType == ADHOC_NETWORK) &&
40039 +                ar->arIbssPsEnable && ar->arConnected) {
40040 +                    /* flag to check adhoc mapping once we take the lock below: */
40041 +                checkAdHocPsMapping = TRUE;
40042 +
40043 +            } else {
40044 +                    /* get the stream mapping */
40045 +                if (ar->arWmmEnabled) {
40046 +                    streamID = wmi_get_stream_id(ar->arWmi,
40047 +                                    wmi_implicit_create_pstream(ar->arWmi, skb, UPLINK_TRAFFIC, UNDEFINED_PRI));
40048 +                } else {
40049 +                    streamID = WMI_BEST_EFFORT_PRI;
40050 +                }
40051 +            }
40052 +
40053 +        } else {
40054 +            struct iphdr    *ipHdr;
40055 +            /*
40056 +             * the endpoint is directly based on the TOS field in the IP
40057 +             * header **** only for testing ******
40058 +             */
40059 +            ipHdr = A_NETBUF_DATA(skb) + sizeof(ATH_MAC_HDR);
40060 +                /* here we map the TOS field to an endpoint number, this is for
40061 +                 * the endpointping test application */
40062 +            streamID = IP_TOS_TO_WMI_PRI(ipHdr->tos);
40063 +        }
40064 +
40065 +    } while (FALSE);
40066 +
40067 +        /* did we succeed ? */
40068 +    if ((streamID == WMI_NOT_MAPPED) && !checkAdHocPsMapping) {
40069 +            /* cleanup and exit */
40070 +        A_NETBUF_FREE(skb);
40071 +        AR6000_STAT_INC(ar, tx_dropped);
40072 +        AR6000_STAT_INC(ar, tx_aborted_errors);
40073 +        return 0;
40074 +    }
40075 +
40076 +    cookie = NULL;
40077 +
40078 +        /* take the lock to protect driver data */
40079 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
40080 +
40081 +    do {
40082 +
40083 +        if (checkAdHocPsMapping) {
40084 +            streamID = ar6000_ibss_map_epid(skb, dev, &mapNo);
40085 +        }
40086 +
40087 +        A_ASSERT(streamID != WMI_NOT_MAPPED);
40088 +
40089 +            /* validate that the endpoint is connected */
40090 +        if (arWMIStream2EndpointID(ar,streamID) == 0) {
40091 +            AR_DEBUG_PRINTF("Stream %d is NOT mapped!\n",streamID);
40092 +            break;
40093 +        }
40094 +            /* allocate resource for this packet */
40095 +        cookie = ar6000_alloc_cookie(ar);
40096 +
40097 +        if (cookie != NULL) {
40098 +                /* update counts while the lock is held */
40099 +            ar->arTxPending[streamID]++;
40100 +            ar->arTotalTxDataPending++;
40101 +        }
40102 +
40103 +    } while (FALSE);
40104 +
40105 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40106 +
40107 +    if (cookie != NULL) {
40108 +        cookie->arc_bp[0] = (A_UINT32)skb;
40109 +        cookie->arc_bp[1] = mapNo;
40110 +        SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt,
40111 +                               cookie,
40112 +                               A_NETBUF_DATA(skb),
40113 +                               A_NETBUF_LEN(skb),
40114 +                               arWMIStream2EndpointID(ar,streamID),
40115 +                               AR6K_DATA_PKT_TAG);
40116 +
40117 +#ifdef DEBUG
40118 +        if (debugdriver >= 3) {
40119 +            ar6000_dump_skb(skb);
40120 +        }
40121 +#endif
40122 +            /* HTC interface is asynchronous, if this fails, cleanup will happen in
40123 +             * the ar6000_tx_complete callback */
40124 +        HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt);
40125 +    } else {
40126 +            /* no packet to send, cleanup */
40127 +        A_NETBUF_FREE(skb);
40128 +        AR6000_STAT_INC(ar, tx_dropped);
40129 +        AR6000_STAT_INC(ar, tx_aborted_errors);
40130 +    }
40131 +
40132 +    return 0;
40133 +}
40134 +
40135 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
40136 +static void
40137 +tvsub(register struct timeval *out, register struct timeval *in)
40138 +{
40139 +    if((out->tv_usec -= in->tv_usec) < 0) {
40140 +        out->tv_sec--;
40141 +        out->tv_usec += 1000000;
40142 +    }
40143 +    out->tv_sec -= in->tv_sec;
40144 +}
40145 +
40146 +void
40147 +applyAPTCHeuristics(AR_SOFTC_T *ar)
40148 +{
40149 +    A_UINT32 duration;
40150 +    A_UINT32 numbytes;
40151 +    A_UINT32 throughput;
40152 +    struct timeval ts;
40153 +    A_STATUS status;
40154 +
40155 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
40156 +
40157 +    if ((enableAPTCHeuristics) && (!aptcTR.timerScheduled)) {
40158 +        do_gettimeofday(&ts);
40159 +        tvsub(&ts, &aptcTR.samplingTS);
40160 +        duration = ts.tv_sec * 1000 + ts.tv_usec / 1000; /* ms */
40161 +        numbytes = aptcTR.bytesTransmitted + aptcTR.bytesReceived;
40162 +
40163 +        if (duration > APTC_TRAFFIC_SAMPLING_INTERVAL) {
40164 +            /* Initialize the time stamp and byte count */
40165 +            aptcTR.bytesTransmitted = aptcTR.bytesReceived = 0;
40166 +            do_gettimeofday(&aptcTR.samplingTS);
40167 +
40168 +            /* Calculate and decide based on throughput thresholds */
40169 +            throughput = ((numbytes * 8) / duration);
40170 +            if (throughput > APTC_UPPER_THROUGHPUT_THRESHOLD) {
40171 +                /* Disable Sleep and schedule a timer */
40172 +                A_ASSERT(ar->arWmiReady == TRUE);
40173 +                AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40174 +                status = wmi_powermode_cmd(ar->arWmi, MAX_PERF_POWER);
40175 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
40176 +                A_TIMEOUT_MS(&aptcTimer, APTC_TRAFFIC_SAMPLING_INTERVAL, 0);
40177 +                aptcTR.timerScheduled = TRUE;
40178 +            }
40179 +        }
40180 +    }
40181 +
40182 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40183 +}
40184 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
40185 +
40186 +static void ar6000_tx_queue_full(void *Context, HTC_ENDPOINT_ID Endpoint)
40187 +{
40188 +    AR_SOFTC_T     *ar = (AR_SOFTC_T *)Context;
40189 +
40190 +
40191 +    if (Endpoint == arWMIStream2EndpointID(ar,WMI_CONTROL_PRI)) {
40192 +        if (!bypasswmi) {
40193 +                /* under normal WMI if this is getting full, then something is running rampant
40194 +                 * the host should not be exhausting the WMI queue with too many commands
40195 +                 * the only exception to this is during testing using endpointping */
40196 +
40197 +            AR6000_SPIN_LOCK(&ar->arLock, 0);
40198 +                /* set flag to handle subsequent messages */
40199 +            ar->arWMIControlEpFull = TRUE;
40200 +            AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40201 +            AR_DEBUG_PRINTF("WMI Control Endpoint is FULL!!! \n");
40202 +        }
40203 +    } else {
40204 +
40205 +        AR6000_SPIN_LOCK(&ar->arLock, 0);
40206 +        ar->arNetQueueStopped = TRUE;
40207 +        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40208 +        /* one of the data endpoints queues is getting full..need to stop network stack
40209 +         * the queue will resume in ar6000_tx_complete() */
40210 +        netif_stop_queue(ar->arNetDev);
40211 +    }
40212 +
40213 +
40214 +}
40215 +
40216 +
40217 +static void
40218 +ar6000_tx_complete(void *Context, HTC_PACKET *pPacket)
40219 +{
40220 +    AR_SOFTC_T     *ar = (AR_SOFTC_T *)Context;
40221 +    void           *cookie = (void *)pPacket->pPktContext;
40222 +    struct sk_buff *skb = NULL;
40223 +    A_UINT32        mapNo = 0;
40224 +    A_STATUS        status;
40225 +    struct ar_cookie * ar_cookie;
40226 +    WMI_PRI_STREAM_ID streamID;
40227 +    A_BOOL          wakeEvent = FALSE;
40228 +
40229 +    status = pPacket->Status;
40230 +    ar_cookie = (struct ar_cookie *)cookie;
40231 +    skb = (struct sk_buff *)ar_cookie->arc_bp[0];
40232 +    streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint);
40233 +    mapNo = ar_cookie->arc_bp[1];
40234 +
40235 +    A_ASSERT(skb);
40236 +    A_ASSERT(pPacket->pBuffer == A_NETBUF_DATA(skb));
40237 +
40238 +    if (A_SUCCESS(status)) {
40239 +        A_ASSERT(pPacket->ActualLength == A_NETBUF_LEN(skb));
40240 +    }
40241 +
40242 +    AR_DEBUG2_PRINTF("ar6000_tx_complete skb=0x%x data=0x%x len=0x%x sid=%d ",
40243 +                     (A_UINT32)skb, (A_UINT32)pPacket->pBuffer,
40244 +                     pPacket->ActualLength,
40245 +                     streamID);
40246 +
40247 +        /* lock the driver as we update internal state */
40248 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
40249 +
40250 +    ar->arTxPending[streamID]--;
40251 +
40252 +    if ((streamID != WMI_CONTROL_PRI) || bypasswmi) {
40253 +        ar->arTotalTxDataPending--;
40254 +    }
40255 +
40256 +    if (streamID == WMI_CONTROL_PRI)
40257 +    {
40258 +        if (ar->arWMIControlEpFull) {
40259 +                /* since this packet completed, the WMI EP is no longer full */
40260 +            ar->arWMIControlEpFull = FALSE;
40261 +        }
40262 +
40263 +        if (ar->arTxPending[streamID] == 0) {
40264 +            wakeEvent = TRUE;
40265 +        }
40266 +    }
40267 +
40268 +    if (A_FAILED(status)) {
40269 +        AR_DEBUG_PRINTF("%s() -TX ERROR, status: 0x%x\n", __func__,
40270 +                        status);
40271 +        AR6000_STAT_INC(ar, tx_errors);
40272 +    } else {
40273 +        AR_DEBUG2_PRINTF("OK\n");
40274 +        AR6000_STAT_INC(ar, tx_packets);
40275 +        ar->arNetStats.tx_bytes += A_NETBUF_LEN(skb);
40276 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
40277 +        aptcTR.bytesTransmitted += a_netbuf_to_len(skb);
40278 +        applyAPTCHeuristics(ar);
40279 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
40280 +    }
40281 +
40282 +    // TODO this needs to be looked at
40283 +    if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable
40284 +        && (streamID != WMI_CONTROL_PRI) && mapNo)
40285 +    {
40286 +        mapNo --;
40287 +        ar->arNodeMap[mapNo].txPending --;
40288 +
40289 +        if (!ar->arNodeMap[mapNo].txPending && (mapNo == (ar->arNodeNum - 1))) {
40290 +            A_UINT32 i;
40291 +            for (i = ar->arNodeNum; i > 0; i --) {
40292 +                if (!ar->arNodeMap[i - 1].txPending) {
40293 +                    A_MEMZERO(&ar->arNodeMap[i - 1], sizeof(struct ar_node_mapping));
40294 +                    ar->arNodeNum --;
40295 +                } else {
40296 +                    break;
40297 +                }
40298 +            }
40299 +        }
40300 +    }
40301 +
40302 +    /* Freeing a cookie should not be contingent on either of */
40303 +    /* these flags, just if we have a cookie or not.           */
40304 +    /* Can we even get here without a cookie? Fix later.       */
40305 +    if (ar->arWmiReady == TRUE || (bypasswmi))
40306 +    {
40307 +        ar6000_free_cookie(ar, cookie);
40308 +    }
40309 +
40310 +    if (ar->arNetQueueStopped) {
40311 +        ar->arNetQueueStopped = FALSE;
40312 +    }
40313 +
40314 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40315 +
40316 +    /* lock is released, we can freely call other kernel APIs */
40317 +
40318 +        /* this indirectly frees the HTC_PACKET */
40319 +    A_NETBUF_FREE(skb);
40320 +
40321 +    if ((ar->arConnected == TRUE) || (bypasswmi)) {
40322 +        if (status != A_ECANCELED) {
40323 +                /* don't wake the queue if we are flushing, other wise it will just
40324 +                 * keep queueing packets, which will keep failing */
40325 +            netif_wake_queue(ar->arNetDev);
40326 +        }
40327 +    }
40328 +
40329 +    if (wakeEvent) {
40330 +        wake_up(&arEvent);
40331 +    }
40332 +
40333 +}
40334 +
40335 +/*
40336 + * Receive event handler.  This is called by HTC when a packet is received
40337 + */
40338 +int pktcount;
40339 +static void
40340 +ar6000_rx(void *Context, HTC_PACKET *pPacket)
40341 +{
40342 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)Context;
40343 +    struct sk_buff *skb = (struct sk_buff *)pPacket->pPktContext;
40344 +    int minHdrLen;
40345 +    A_STATUS        status = pPacket->Status;
40346 +    WMI_PRI_STREAM_ID streamID = arEndpoint2WMIStreamID(ar,pPacket->Endpoint);
40347 +    HTC_ENDPOINT_ID   ept = pPacket->Endpoint;
40348 +
40349 +    A_ASSERT((status != A_OK) || (pPacket->pBuffer == (A_NETBUF_DATA(skb) + HTC_HEADER_LEN)));
40350 +
40351 +    AR_DEBUG2_PRINTF("ar6000_rx ar=0x%x sid=%d, skb=0x%x, data=0x%x, len=0x%x ",
40352 +                    (A_UINT32)ar, streamID, (A_UINT32)skb, (A_UINT32)pPacket->pBuffer,
40353 +                    pPacket->ActualLength);
40354 +    if (status != A_OK) {
40355 +        AR_DEBUG2_PRINTF("ERR\n");
40356 +    } else {
40357 +        AR_DEBUG2_PRINTF("OK\n");
40358 +    }
40359 +
40360 +        /* take lock to protect buffer counts
40361 +         * and adaptive power throughput state */
40362 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
40363 +
40364 +    ar->arRxBuffers[streamID]--;
40365 +
40366 +    if (A_SUCCESS(status)) {
40367 +        AR6000_STAT_INC(ar, rx_packets);
40368 +        ar->arNetStats.rx_bytes += pPacket->ActualLength;
40369 +#ifdef ADAPTIVE_POWER_THROUGHPUT_CONTROL
40370 +        aptcTR.bytesReceived += a_netbuf_to_len(skb);
40371 +        applyAPTCHeuristics(ar);
40372 +#endif /* ADAPTIVE_POWER_THROUGHPUT_CONTROL */
40373 +
40374 +        A_NETBUF_PUT(skb, pPacket->ActualLength +  HTC_HEADER_LEN);
40375 +        A_NETBUF_PULL(skb, HTC_HEADER_LEN);
40376 +
40377 +#ifdef DEBUG
40378 +        if (debugdriver >= 2) {
40379 +            ar6000_dump_skb(skb);
40380 +        }
40381 +#endif /* DEBUG */
40382 +    }
40383 +
40384 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40385 +
40386 +    if (status != A_OK) {
40387 +        AR6000_STAT_INC(ar, rx_errors);
40388 +        A_NETBUF_FREE(skb);
40389 +    } else if (ar->arWmiEnabled == TRUE) {
40390 +        if (streamID == WMI_CONTROL_PRI) {
40391 +           /*
40392 +            * this is a wmi control msg
40393 +            */
40394 +            wmi_control_rx(ar->arWmi, skb);
40395 +        } else {
40396 +            WMI_DATA_HDR *dhdr = (WMI_DATA_HDR *)A_NETBUF_DATA(skb);
40397 +            if (WMI_DATA_HDR_IS_MSG_TYPE(dhdr, CNTL_MSGTYPE)) {
40398 +                /*
40399 +                 * this is a wmi control msg
40400 +                 */
40401 +                /* strip off WMI hdr */
40402 +                wmi_data_hdr_remove(ar->arWmi, skb);
40403 +                wmi_control_rx(ar->arWmi, skb);
40404 +            } else {
40405 +                /*
40406 +                 * this is a wmi data packet
40407 +                 */
40408 +                minHdrLen = sizeof (WMI_DATA_HDR) + sizeof(ATH_MAC_HDR) +
40409 +                            sizeof(ATH_LLC_SNAP_HDR);
40410 +
40411 +                if ((pPacket->ActualLength < minHdrLen) ||
40412 +                    (pPacket->ActualLength > AR6000_BUFFER_SIZE))
40413 +                {
40414 +                    /*
40415 +                     * packet is too short or too long
40416 +                     */
40417 +                    AR_DEBUG_PRINTF("TOO SHORT or TOO LONG\n");
40418 +                    AR6000_STAT_INC(ar, rx_errors);
40419 +                    AR6000_STAT_INC(ar, rx_length_errors);
40420 +                    A_NETBUF_FREE(skb);
40421 +                } else {
40422 +                    if (ar->arWmmEnabled) {
40423 +                        wmi_implicit_create_pstream(ar->arWmi, skb,
40424 +                            DNLINK_TRAFFIC, UNDEFINED_PRI);
40425 +                    }
40426 +#if 0
40427 +                    /* Access RSSI values here */
40428 +                    AR_DEBUG_PRINTF("RSSI %d\n",
40429 +                        ((WMI_DATA_HDR *) A_NETBUF_DATA(skb))->rssi);
40430 +#endif
40431 +                    wmi_data_hdr_remove(ar->arWmi, skb);
40432 +                    wmi_dot3_2_dix(ar->arWmi, skb);
40433 +
40434 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
40435 +                    /*
40436 +                     * extra push and memcpy, for eth_type_trans() of 2.4 kernel
40437 +                     * will pull out hard_header_len bytes of the skb.
40438 +                     */
40439 +                    A_NETBUF_PUSH(skb, sizeof(WMI_DATA_HDR) + sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN);
40440 +                    A_MEMCPY(A_NETBUF_DATA(skb), A_NETBUF_DATA(skb) + sizeof(WMI_DATA_HDR) +
40441 +                             sizeof(ATH_LLC_SNAP_HDR) + HTC_HEADER_LEN, sizeof(ATH_MAC_HDR));
40442 +#endif
40443 +                    if ((ar->arNetDev->flags & IFF_UP) == IFF_UP)
40444 +                    {
40445 +                        skb->dev = ar->arNetDev;
40446 +                        skb->protocol = eth_type_trans(skb, ar->arNetDev);
40447 +                        netif_rx(skb);
40448 +                    }
40449 +                    else
40450 +                    {
40451 +                        A_NETBUF_FREE(skb);
40452 +                    }
40453 +                }
40454 +            }
40455 +        }
40456 +    } else {
40457 +        if ((ar->arNetDev->flags & IFF_UP) == IFF_UP)
40458 +        {
40459 +            skb->dev = ar->arNetDev;
40460 +            skb->protocol = eth_type_trans(skb, ar->arNetDev);
40461 +            netif_rx(skb);
40462 +        }
40463 +        else
40464 +        {
40465 +            A_NETBUF_FREE(skb);
40466 +        }
40467 +    }
40468 +
40469 +    if (status != A_ECANCELED) {
40470 +        /*
40471 +         * HTC provides A_ECANCELED status when it doesn't want to be refilled
40472 +         * (probably due to a shutdown)
40473 +         */
40474 +        ar6000_rx_refill(Context, ept);
40475 +    }
40476 +
40477 +
40478 +}
40479 +
40480 +static void
40481 +ar6000_rx_refill(void *Context, HTC_ENDPOINT_ID Endpoint)
40482 +{
40483 +    AR_SOFTC_T  *ar = (AR_SOFTC_T *)Context;
40484 +    void        *osBuf;
40485 +    int         RxBuffers;
40486 +    int         buffersToRefill;
40487 +    HTC_PACKET  *pPacket;
40488 +    WMI_PRI_STREAM_ID streamId = arEndpoint2WMIStreamID(ar,Endpoint);
40489 +
40490 +    buffersToRefill = (int)AR6000_MAX_RX_BUFFERS -
40491 +                                    (int)ar->arRxBuffers[streamId];
40492 +
40493 +    if (buffersToRefill <= 0) {
40494 +            /* fast return, nothing to fill */
40495 +        return;
40496 +    }
40497 +
40498 +    AR_DEBUG2_PRINTF("ar6000_rx_refill: providing htc with %d buffers at eid=%d\n",
40499 +                    buffersToRefill, Endpoint);
40500 +
40501 +    for (RxBuffers = 0; RxBuffers < buffersToRefill; RxBuffers++) {
40502 +        osBuf = A_NETBUF_ALLOC(AR6000_BUFFER_SIZE);
40503 +        if (NULL == osBuf) {
40504 +            break;
40505 +        }
40506 +            /* the HTC packet wrapper is at the head of the reserved area
40507 +             * in the skb */
40508 +        pPacket = (HTC_PACKET *)(A_NETBUF_HEAD(osBuf));
40509 +            /* set re-fill info */
40510 +        SET_HTC_PACKET_INFO_RX_REFILL(pPacket,osBuf,A_NETBUF_DATA(osBuf),AR6000_BUFFER_SIZE,Endpoint);
40511 +            /* add this packet */
40512 +        HTCAddReceivePkt(ar->arHtcTarget, pPacket);
40513 +    }
40514 +
40515 +        /* update count */
40516 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
40517 +    ar->arRxBuffers[streamId] += RxBuffers;
40518 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
40519 +}
40520 +
40521 +static struct net_device_stats *
40522 +ar6000_get_stats(struct net_device *dev)
40523 +{
40524 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
40525 +    return &ar->arNetStats;
40526 +}
40527 +
40528 +static struct iw_statistics *
40529 +ar6000_get_iwstats(struct net_device * dev)
40530 +{
40531 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
40532 +    TARGET_STATS *pStats = &ar->arTargetStats;
40533 +    struct iw_statistics * pIwStats = &ar->arIwStats;
40534 +
40535 +    if ((ar->arWmiReady == FALSE)
40536 +    /*
40537 +     * The in_atomic function is used to determine if the scheduling is
40538 +     * allowed in the current context or not. This was introduced in 2.6
40539 +     * From what I have read on the differences between 2.4 and 2.6, the
40540 +     * 2.4 kernel did not support preemption and so this check might not
40541 +     * be required for 2.4 kernels.
40542 +     */
40543 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
40544 +        || (in_atomic())
40545 +#endif
40546 +       )
40547 +    {
40548 +        pIwStats->status = 0;
40549 +        pIwStats->qual.qual = 0;
40550 +        pIwStats->qual.level =0;
40551 +        pIwStats->qual.noise = 0;
40552 +        pIwStats->discard.code =0;
40553 +        pIwStats->discard.retries=0;
40554 +        pIwStats->miss.beacon =0;
40555 +        return pIwStats;
40556 +    }
40557 +    if (down_interruptible(&ar->arSem)) {
40558 +        pIwStats->status = 0;
40559 +        return pIwStats;
40560 +    }
40561 +
40562 +
40563 +    ar->statsUpdatePending = TRUE;
40564 +
40565 +    if(wmi_get_stats_cmd(ar->arWmi) != A_OK) {
40566 +        up(&ar->arSem);
40567 +        pIwStats->status = 0;
40568 +        return pIwStats;
40569 +    }
40570 +
40571 +    wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ);
40572 +
40573 +    if (signal_pending(current)) {
40574 +        AR_DEBUG_PRINTF("ar6000 : WMI get stats timeout \n");
40575 +        up(&ar->arSem);
40576 +        pIwStats->status = 0;
40577 +        return pIwStats;
40578 +    }
40579 +    pIwStats->status = 1 ;
40580 +    pIwStats->qual.qual = pStats->cs_aveBeacon_rssi;
40581 +    pIwStats->qual.level =pStats->cs_aveBeacon_rssi + 161;  /* noise is -95 dBm */
40582 +    pIwStats->qual.noise = pStats->noise_floor_calibation;
40583 +    pIwStats->discard.code = pStats->rx_decrypt_err;
40584 +    pIwStats->discard.retries = pStats->tx_retry_cnt;
40585 +    pIwStats->miss.beacon = pStats->cs_bmiss_cnt;
40586 +    up(&ar->arSem);
40587 +    return pIwStats;
40588 +}
40589 +
40590 +void
40591 +ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap)
40592 +{
40593 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
40594 +    struct net_device *dev = ar->arNetDev;
40595 +
40596 +    ar->arWmiReady = TRUE;
40597 +    wake_up(&arEvent);
40598 +    A_MEMCPY(dev->dev_addr, datap, AR6000_ETH_ADDR_LEN);
40599 +    AR_DEBUG_PRINTF("mac address = %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
40600 +        dev->dev_addr[0], dev->dev_addr[1],
40601 +        dev->dev_addr[2], dev->dev_addr[3],
40602 +        dev->dev_addr[4], dev->dev_addr[5]);
40603 +
40604 +    ar->arPhyCapability = phyCap;
40605 +}
40606 +
40607 +A_UINT8
40608 +ar6000_iptos_to_userPriority(A_UINT8 *pkt)
40609 +{
40610 +    struct iphdr *ipHdr = (struct iphdr *)pkt;
40611 +    A_UINT8 userPriority;
40612 +
40613 +    /*
40614 +     * IP Tos format :
40615 +     *      (Refer Pg 57 WMM-test-plan-v1.2)
40616 +     * IP-TOS - 8bits
40617 +     *          : DSCP(6-bits) ECN(2-bits)
40618 +     *          : DSCP - P2 P1 P0 X X X
40619 +     *              where (P2 P1 P0) form 802.1D
40620 +     */
40621 +    userPriority = ipHdr->tos >> 5;
40622 +    return (userPriority & 0x7);
40623 +}
40624 +
40625 +void
40626 +ar6000_connect_event(AR_SOFTC_T *ar, A_UINT16 channel, A_UINT8 *bssid,
40627 +                     A_UINT16 listenInterval, A_UINT16 beaconInterval,
40628 +                     NETWORK_TYPE networkType, A_UINT8 beaconIeLen,
40629 +                     A_UINT8 assocReqLen, A_UINT8 assocRespLen,
40630 +                     A_UINT8 *assocInfo)
40631 +{
40632 +    union iwreq_data wrqu;
40633 +    int i, beacon_ie_pos, assoc_resp_ie_pos, assoc_req_ie_pos;
40634 +    static const char *tag1 = "ASSOCINFO(ReqIEs=";
40635 +    static const char *tag2 = "ASSOCRESPIE=";
40636 +    static const char *beaconIetag = "BEACONIE=";
40637 +    char buf[WMI_CONTROL_MSG_MAX_LEN * 2 + sizeof(tag1)];
40638 +    char *pos;
40639 +    A_UINT8 key_op_ctrl;
40640 +
40641 +    A_MEMCPY(ar->arBssid, bssid, sizeof(ar->arBssid));
40642 +    ar->arBssChannel = channel;
40643 +
40644 +    A_PRINTF("AR6000 connected event on freq %d ", channel);
40645 +    A_PRINTF("with bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x "
40646 +            " listenInterval=%d, beaconInterval = %d, beaconIeLen = %d assocReqLen=%d"
40647 +            " assocRespLen =%d\n",
40648 +             bssid[0], bssid[1], bssid[2],
40649 +             bssid[3], bssid[4], bssid[5],
40650 +             listenInterval, beaconInterval,
40651 +             beaconIeLen, assocReqLen, assocRespLen);
40652 +    if (networkType & ADHOC_NETWORK) {
40653 +        if (networkType & ADHOC_CREATOR) {
40654 +            A_PRINTF("Network: Adhoc (Creator)\n");
40655 +        } else {
40656 +            A_PRINTF("Network: Adhoc (Joiner)\n");
40657 +        }
40658 +    } else {
40659 +        A_PRINTF("Network: Infrastructure\n");
40660 +    }
40661 +
40662 +    if (beaconIeLen && (sizeof(buf) > (9 + beaconIeLen * 2))) {
40663 +        AR_DEBUG_PRINTF("\nBeaconIEs= ");
40664 +
40665 +        beacon_ie_pos = 0;
40666 +        A_MEMZERO(buf, sizeof(buf));
40667 +        sprintf(buf, "%s", beaconIetag);
40668 +        pos = buf + 9;
40669 +        for (i = beacon_ie_pos; i < beacon_ie_pos + beaconIeLen; i++) {
40670 +            AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
40671 +            sprintf(pos, "%2.2x", assocInfo[i]);
40672 +            pos += 2;
40673 +        }
40674 +        AR_DEBUG_PRINTF("\n");
40675 +
40676 +        A_MEMZERO(&wrqu, sizeof(wrqu));
40677 +        wrqu.data.length = strlen(buf);
40678 +        wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
40679 +    }
40680 +
40681 +    if (assocRespLen && (sizeof(buf) > (12 + (assocRespLen * 2))))
40682 +    {
40683 +        assoc_resp_ie_pos = beaconIeLen + assocReqLen +
40684 +                            sizeof(A_UINT16)  +  /* capinfo*/
40685 +                            sizeof(A_UINT16)  +  /* status Code */
40686 +                            sizeof(A_UINT16)  ;  /* associd */
40687 +        A_MEMZERO(buf, sizeof(buf));
40688 +        sprintf(buf, "%s", tag2);
40689 +        pos = buf + 12;
40690 +        AR_DEBUG_PRINTF("\nAssocRespIEs= ");
40691 +        /*
40692 +         * The Association Response Frame w.o. the WLAN header is delivered to
40693 +         * the host, so skip over to the IEs
40694 +         */
40695 +        for (i = assoc_resp_ie_pos; i < assoc_resp_ie_pos + assocRespLen - 6; i++)
40696 +        {
40697 +            AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
40698 +            sprintf(pos, "%2.2x", assocInfo[i]);
40699 +            pos += 2;
40700 +        }
40701 +        AR_DEBUG_PRINTF("\n");
40702 +
40703 +        A_MEMZERO(&wrqu, sizeof(wrqu));
40704 +        wrqu.data.length = strlen(buf);
40705 +        wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
40706 +    }
40707 +
40708 +    if (assocReqLen && (sizeof(buf) > (17 + (assocReqLen * 2)))) {
40709 +        /*
40710 +         * assoc Request includes capability and listen interval. Skip these.
40711 +         */
40712 +        assoc_req_ie_pos =  beaconIeLen +
40713 +                            sizeof(A_UINT16)  +  /* capinfo*/
40714 +                            sizeof(A_UINT16);    /* listen interval */
40715 +
40716 +        A_MEMZERO(buf, sizeof(buf));
40717 +        sprintf(buf, "%s", tag1);
40718 +        pos = buf + 17;
40719 +        AR_DEBUG_PRINTF("AssocReqIEs= ");
40720 +        for (i = assoc_req_ie_pos; i < assoc_req_ie_pos + assocReqLen - 4; i++) {
40721 +            AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
40722 +            sprintf(pos, "%2.2x", assocInfo[i]);
40723 +            pos += 2;;
40724 +        }
40725 +        AR_DEBUG_PRINTF("\n");
40726 +
40727 +        A_MEMZERO(&wrqu, sizeof(wrqu));
40728 +        wrqu.data.length = strlen(buf);
40729 +        wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
40730 +    }
40731 +
40732 +#ifdef USER_KEYS
40733 +    if (ar->user_savedkeys_stat == USER_SAVEDKEYS_STAT_RUN &&
40734 +        ar->user_saved_keys.keyOk == TRUE)
40735 +    {
40736 +
40737 +        key_op_ctrl = KEY_OP_VALID_MASK & ~KEY_OP_INIT_TSC;
40738 +        if (ar->user_key_ctrl & AR6000_USER_SETKEYS_RSC_UNCHANGED) {
40739 +            key_op_ctrl &= ~KEY_OP_INIT_RSC;
40740 +        } else {
40741 +            key_op_ctrl |= KEY_OP_INIT_RSC;
40742 +        }
40743 +        ar6000_reinstall_keys(ar, key_op_ctrl);
40744 +    }
40745 +#endif /* USER_KEYS */
40746 +
40747 +        /* flush data queues */
40748 +    ar6000_TxDataCleanup(ar);
40749 +
40750 +    netif_wake_queue(ar->arNetDev);
40751 +
40752 +    if ((OPEN_AUTH == ar->arDot11AuthMode) &&
40753 +        (NONE_AUTH == ar->arAuthMode)      &&
40754 +        (WEP_CRYPT == ar->arPairwiseCrypto))
40755 +    {
40756 +        if (!ar->arConnected) {
40757 +            ar6000_install_static_wep_keys(ar);
40758 +        }
40759 +    }
40760 +
40761 +    ar->arConnected  = TRUE;
40762 +    ar->arConnectPending = FALSE;
40763 +
40764 +    reconnect_flag = 0;
40765 +
40766 +    A_MEMZERO(&wrqu, sizeof(wrqu));
40767 +    A_MEMCPY(wrqu.addr.sa_data, bssid, IEEE80211_ADDR_LEN);
40768 +    wrqu.addr.sa_family = ARPHRD_ETHER;
40769 +    wireless_send_event(ar->arNetDev, SIOCGIWAP, &wrqu, NULL);
40770 +    if ((ar->arNetworkType == ADHOC_NETWORK) && ar->arIbssPsEnable) {
40771 +        A_MEMZERO(ar->arNodeMap, sizeof(ar->arNodeMap));
40772 +        ar->arNodeNum = 0;
40773 +        ar->arNexEpId = ENDPOINT_2;
40774 +    }
40775 +
40776 +}
40777 +
40778 +void ar6000_set_numdataendpts(AR_SOFTC_T *ar, A_UINT32 num)
40779 +{
40780 +    A_ASSERT(num <= (HTC_MAILBOX_NUM_MAX - 1));
40781 +    ar->arNumDataEndPts = num;
40782 +}
40783 +
40784 +void
40785 +ar6000_disconnect_event(AR_SOFTC_T *ar, A_UINT8 reason, A_UINT8 *bssid,
40786 +                        A_UINT8 assocRespLen, A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus)
40787 +{
40788 +    A_UINT8 i;
40789 +
40790 +    A_PRINTF("AR6000 disconnected");
40791 +    if (bssid[0] || bssid[1] || bssid[2] || bssid[3] || bssid[4] || bssid[5]) {
40792 +        A_PRINTF(" from %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",
40793 +                 bssid[0], bssid[1], bssid[2], bssid[3], bssid[4], bssid[5]);
40794 +    }
40795 +    A_PRINTF("\n");
40796 +
40797 +    AR_DEBUG_PRINTF("\nDisconnect Reason is %d", reason);
40798 +    AR_DEBUG_PRINTF("\nProtocol Reason/Status Code is %d", protocolReasonStatus);
40799 +    AR_DEBUG_PRINTF("\nAssocResp Frame = %s",
40800 +                    assocRespLen ? " " : "NULL");
40801 +    for (i = 0; i < assocRespLen; i++) {
40802 +        if (!(i % 0x10)) {
40803 +            AR_DEBUG_PRINTF("\n");
40804 +        }
40805 +        AR_DEBUG_PRINTF("%2.2x ", assocInfo[i]);
40806 +    }
40807 +    AR_DEBUG_PRINTF("\n");
40808 +    /*
40809 +     * If the event is due to disconnect cmd from the host, only they the target
40810 +     * would stop trying to connect. Under any other condition, target would
40811 +     * keep trying to connect.
40812 +     *
40813 +     */
40814 +    if( reason == DISCONNECT_CMD)
40815 +    {
40816 +        ar->arConnectPending = FALSE;
40817 +    } else {
40818 +        ar->arConnectPending = TRUE;
40819 +        if (((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x11)) ||
40820 +            ((reason == ASSOC_FAILED) && (protocolReasonStatus == 0x0) && (reconnect_flag == 1))) {
40821 +            ar->arConnected = TRUE;
40822 +            return;
40823 +        }
40824 +    }
40825 +    ar->arConnected = FALSE;
40826 +
40827 +    if( (reason != CSERV_DISCONNECT) || (reconnect_flag != 1) ) {
40828 +        reconnect_flag = 0;
40829 +    }
40830 +
40831 +#ifdef USER_KEYS
40832 +    if (reason != CSERV_DISCONNECT)
40833 +    {
40834 +        ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
40835 +        ar->user_key_ctrl      = 0;
40836 +    }
40837 +#endif /* USER_KEYS */
40838 +
40839 +    netif_stop_queue(ar->arNetDev);
40840 +    A_MEMZERO(ar->arBssid, sizeof(ar->arBssid));
40841 +    ar->arBssChannel = 0;
40842 +    ar->arBeaconInterval = 0;
40843 +
40844 +    ar6000_TxDataCleanup(ar);
40845 +}
40846 +
40847 +void
40848 +ar6000_regDomain_event(AR_SOFTC_T *ar, A_UINT32 regCode)
40849 +{
40850 +    A_PRINTF("AR6000 Reg Code = 0x%x\n", regCode);
40851 +    ar->arRegCode = regCode;
40852 +}
40853 +
40854 +void
40855 +ar6000_neighborReport_event(AR_SOFTC_T *ar, int numAps, WMI_NEIGHBOR_INFO *info)
40856 +{
40857 +    static const char *tag = "PRE-AUTH";
40858 +    char buf[128];
40859 +    union iwreq_data wrqu;
40860 +    int i;
40861 +
40862 +    AR_DEBUG_PRINTF("AR6000 Neighbor Report Event\n");
40863 +    for (i=0; i < numAps; info++, i++) {
40864 +        AR_DEBUG_PRINTF("bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",
40865 +            info->bssid[0], info->bssid[1], info->bssid[2],
40866 +            info->bssid[3], info->bssid[4], info->bssid[5]);
40867 +        if (info->bssFlags & WMI_PREAUTH_CAPABLE_BSS) {
40868 +            AR_DEBUG_PRINTF("preauth-cap");
40869 +        }
40870 +        if (info->bssFlags & WMI_PMKID_VALID_BSS) {
40871 +            AR_DEBUG_PRINTF(" pmkid-valid\n");
40872 +            continue;           /* we skip bss if the pmkid is already valid */
40873 +        }
40874 +        AR_DEBUG_PRINTF("\n");
40875 +        snprintf(buf, sizeof(buf), "%s%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x%2.2x",
40876 +                 tag,
40877 +                 info->bssid[0], info->bssid[1], info->bssid[2],
40878 +                 info->bssid[3], info->bssid[4], info->bssid[5],
40879 +                 i, info->bssFlags);
40880 +        A_MEMZERO(&wrqu, sizeof(wrqu));
40881 +        wrqu.data.length = strlen(buf);
40882 +        wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
40883 +    }
40884 +}
40885 +
40886 +void
40887 +ar6000_tkip_micerr_event(AR_SOFTC_T *ar, A_UINT8 keyid, A_BOOL ismcast)
40888 +{
40889 +    static const char *tag = "MLME-MICHAELMICFAILURE.indication";
40890 +    char buf[128];
40891 +    union iwreq_data wrqu;
40892 +
40893 +    A_PRINTF("AR6000 TKIP MIC error received for keyid %d %scast\n",
40894 +             keyid, ismcast ? "multi": "uni");
40895 +    snprintf(buf, sizeof(buf), "%s(keyid=%d %scat)", tag, keyid,
40896 +             ismcast ? "multi" : "uni");
40897 +    memset(&wrqu, 0, sizeof(wrqu));
40898 +    wrqu.data.length = strlen(buf);
40899 +    wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
40900 +}
40901 +
40902 +void
40903 +ar6000_scanComplete_event(AR_SOFTC_T *ar, A_STATUS status)
40904 +{
40905 +       AR_DEBUG_PRINTF("AR6000 scan complete: %d\n", status);
40906 +
40907 +       ar->scan_complete = 1;
40908 +       wake_up_interruptible(&ar6000_scan_queue);
40909 +}
40910 +
40911 +void
40912 +ar6000_targetStats_event(AR_SOFTC_T *ar,  WMI_TARGET_STATS *pTarget)
40913 +{
40914 +    TARGET_STATS *pStats = &ar->arTargetStats;
40915 +    A_UINT8 ac;
40916 +
40917 +    /*A_PRINTF("AR6000 updating target stats\n");*/
40918 +    pStats->tx_packets          += pTarget->txrxStats.tx_stats.tx_packets;
40919 +    pStats->tx_bytes            += pTarget->txrxStats.tx_stats.tx_bytes;
40920 +    pStats->tx_unicast_pkts     += pTarget->txrxStats.tx_stats.tx_unicast_pkts;
40921 +    pStats->tx_unicast_bytes    += pTarget->txrxStats.tx_stats.tx_unicast_bytes;
40922 +    pStats->tx_multicast_pkts   += pTarget->txrxStats.tx_stats.tx_multicast_pkts;
40923 +    pStats->tx_multicast_bytes  += pTarget->txrxStats.tx_stats.tx_multicast_bytes;
40924 +    pStats->tx_broadcast_pkts   += pTarget->txrxStats.tx_stats.tx_broadcast_pkts;
40925 +    pStats->tx_broadcast_bytes  += pTarget->txrxStats.tx_stats.tx_broadcast_bytes;
40926 +    pStats->tx_rts_success_cnt  += pTarget->txrxStats.tx_stats.tx_rts_success_cnt;
40927 +    for(ac = 0; ac < WMM_NUM_AC; ac++)
40928 +        pStats->tx_packet_per_ac[ac] += pTarget->txrxStats.tx_stats.tx_packet_per_ac[ac];
40929 +    pStats->tx_errors           += pTarget->txrxStats.tx_stats.tx_errors;
40930 +    pStats->tx_failed_cnt       += pTarget->txrxStats.tx_stats.tx_failed_cnt;
40931 +    pStats->tx_retry_cnt        += pTarget->txrxStats.tx_stats.tx_retry_cnt;
40932 +    pStats->tx_rts_fail_cnt     += pTarget->txrxStats.tx_stats.tx_rts_fail_cnt;
40933 +    pStats->tx_unicast_rate      = wmi_get_rate(pTarget->txrxStats.tx_stats.tx_unicast_rate);
40934 +
40935 +    pStats->rx_packets          += pTarget->txrxStats.rx_stats.rx_packets;
40936 +    pStats->rx_bytes            += pTarget->txrxStats.rx_stats.rx_bytes;
40937 +    pStats->rx_unicast_pkts     += pTarget->txrxStats.rx_stats.rx_unicast_pkts;
40938 +    pStats->rx_unicast_bytes    += pTarget->txrxStats.rx_stats.rx_unicast_bytes;
40939 +    pStats->rx_multicast_pkts   += pTarget->txrxStats.rx_stats.rx_multicast_pkts;
40940 +    pStats->rx_multicast_bytes  += pTarget->txrxStats.rx_stats.rx_multicast_bytes;
40941 +    pStats->rx_broadcast_pkts   += pTarget->txrxStats.rx_stats.rx_broadcast_pkts;
40942 +    pStats->rx_broadcast_bytes  += pTarget->txrxStats.rx_stats.rx_broadcast_bytes;
40943 +    pStats->rx_fragment_pkt     += pTarget->txrxStats.rx_stats.rx_fragment_pkt;
40944 +    pStats->rx_errors           += pTarget->txrxStats.rx_stats.rx_errors;
40945 +    pStats->rx_crcerr           += pTarget->txrxStats.rx_stats.rx_crcerr;
40946 +    pStats->rx_key_cache_miss   += pTarget->txrxStats.rx_stats.rx_key_cache_miss;
40947 +    pStats->rx_decrypt_err      += pTarget->txrxStats.rx_stats.rx_decrypt_err;
40948 +    pStats->rx_duplicate_frames += pTarget->txrxStats.rx_stats.rx_duplicate_frames;
40949 +    pStats->rx_unicast_rate      = wmi_get_rate(pTarget->txrxStats.rx_stats.rx_unicast_rate);
40950 +
40951 +
40952 +    pStats->tkip_local_mic_failure
40953 +                                += pTarget->txrxStats.tkipCcmpStats.tkip_local_mic_failure;
40954 +    pStats->tkip_counter_measures_invoked
40955 +                                += pTarget->txrxStats.tkipCcmpStats.tkip_counter_measures_invoked;
40956 +    pStats->tkip_replays        += pTarget->txrxStats.tkipCcmpStats.tkip_replays;
40957 +    pStats->tkip_format_errors  += pTarget->txrxStats.tkipCcmpStats.tkip_format_errors;
40958 +    pStats->ccmp_format_errors  += pTarget->txrxStats.tkipCcmpStats.ccmp_format_errors;
40959 +    pStats->ccmp_replays        += pTarget->txrxStats.tkipCcmpStats.ccmp_replays;
40960 +
40961 +
40962 +    pStats->power_save_failure_cnt += pTarget->pmStats.power_save_failure_cnt;
40963 +    pStats->noise_floor_calibation = pTarget->noise_floor_calibation;
40964 +
40965 +    pStats->cs_bmiss_cnt        += pTarget->cservStats.cs_bmiss_cnt;
40966 +    pStats->cs_lowRssi_cnt      += pTarget->cservStats.cs_lowRssi_cnt;
40967 +    pStats->cs_connect_cnt      += pTarget->cservStats.cs_connect_cnt;
40968 +    pStats->cs_disconnect_cnt   += pTarget->cservStats.cs_disconnect_cnt;
40969 +    pStats->cs_aveBeacon_snr    = pTarget->cservStats.cs_aveBeacon_snr;
40970 +    pStats->cs_aveBeacon_rssi   = pTarget->cservStats.cs_aveBeacon_rssi;
40971 +    pStats->cs_lastRoam_msec    = pTarget->cservStats.cs_lastRoam_msec;
40972 +    pStats->cs_snr              = pTarget->cservStats.cs_snr;
40973 +    pStats->cs_rssi             = pTarget->cservStats.cs_rssi;
40974 +
40975 +    pStats->lq_val              = pTarget->lqVal;
40976 +
40977 +    pStats->wow_num_pkts_dropped += pTarget->wowStats.wow_num_pkts_dropped;
40978 +    pStats->wow_num_host_pkt_wakeups += pTarget->wowStats.wow_num_host_pkt_wakeups;
40979 +    pStats->wow_num_host_event_wakeups += pTarget->wowStats.wow_num_host_event_wakeups;
40980 +    pStats->wow_num_events_discarded += pTarget->wowStats.wow_num_events_discarded;
40981 +
40982 +    ar->statsUpdatePending = FALSE;
40983 +    wake_up(&arEvent);
40984 +}
40985 +
40986 +void
40987 +ar6000_rssiThreshold_event(AR_SOFTC_T *ar,  WMI_RSSI_THRESHOLD_VAL newThreshold, A_INT16 rssi)
40988 +{
40989 +    USER_RSSI_THOLD userRssiThold;
40990 +
40991 +    userRssiThold.tag = rssi_map[newThreshold].tag;
40992 +    userRssiThold.rssi = rssi;
40993 +    AR_DEBUG2_PRINTF("rssi Threshold range = %d tag = %d  rssi = %d\n", newThreshold, userRssiThold.tag, rssi);
40994 +#ifdef SEND_EVENT_TO_APP
40995 +    ar6000_send_event_to_app(ar, WMI_RSSI_THRESHOLD_EVENTID,(A_UINT8 *)&userRssiThold, sizeof(USER_RSSI_THOLD));
40996 +#endif
40997 +}
40998 +
40999 +
41000 +void
41001 +ar6000_hbChallengeResp_event(AR_SOFTC_T *ar, A_UINT32 cookie, A_UINT32 source)
41002 +{
41003 +    if (source == APP_HB_CHALLENGE) {
41004 +        /* Report it to the app in case it wants a positive acknowledgement */
41005 +#ifdef SEND_EVENT_TO_APP
41006 +        ar6000_send_event_to_app(ar, WMIX_HB_CHALLENGE_RESP_EVENTID,
41007 +                                 (A_UINT8 *)&cookie, sizeof(cookie));
41008 +#endif
41009 +    } else {
41010 +        /* This would ignore the replys that come in after their due time */
41011 +        if (cookie == ar->arHBChallengeResp.seqNum) {
41012 +            ar->arHBChallengeResp.outstanding = FALSE;
41013 +        }
41014 +    }
41015 +}
41016 +
41017 +
41018 +void
41019 +ar6000_reportError_event(AR_SOFTC_T *ar, WMI_TARGET_ERROR_VAL errorVal)
41020 +{
41021 +    char    *errString[] = {
41022 +                [WMI_TARGET_PM_ERR_FAIL]    "WMI_TARGET_PM_ERR_FAIL",
41023 +                [WMI_TARGET_KEY_NOT_FOUND]  "WMI_TARGET_KEY_NOT_FOUND",
41024 +                [WMI_TARGET_DECRYPTION_ERR] "WMI_TARGET_DECRYPTION_ERR",
41025 +                [WMI_TARGET_BMISS]          "WMI_TARGET_BMISS",
41026 +                [WMI_PSDISABLE_NODE_JOIN]   "WMI_PSDISABLE_NODE_JOIN"
41027 +                };
41028 +
41029 +    A_PRINTF("AR6000 Error on Target. Error = 0x%x\n", errorVal);
41030 +
41031 +    /* One error is reported at a time, and errorval is a bitmask */
41032 +    if(errorVal & (errorVal - 1))
41033 +       return;
41034 +
41035 +    A_PRINTF("AR6000 Error type = ");
41036 +    switch(errorVal)
41037 +    {
41038 +        case WMI_TARGET_PM_ERR_FAIL:
41039 +        case WMI_TARGET_KEY_NOT_FOUND:
41040 +        case WMI_TARGET_DECRYPTION_ERR:
41041 +        case WMI_TARGET_BMISS:
41042 +        case WMI_PSDISABLE_NODE_JOIN:
41043 +            A_PRINTF("%s\n", errString[errorVal]);
41044 +            break;
41045 +        default:
41046 +            A_PRINTF("INVALID\n");
41047 +            break;
41048 +    }
41049 +
41050 +}
41051 +
41052 +
41053 +void
41054 +ar6000_cac_event(AR_SOFTC_T *ar, A_UINT8 ac, A_UINT8 cacIndication,
41055 +                 A_UINT8 statusCode, A_UINT8 *tspecSuggestion)
41056 +{
41057 +    WMM_TSPEC_IE    *tspecIe;
41058 +
41059 +    /*
41060 +     * This is the TSPEC IE suggestion from AP.
41061 +     * Suggestion provided by AP under some error
41062 +     * cases, could be helpful for the host app.
41063 +     * Check documentation.
41064 +     */
41065 +    tspecIe = (WMM_TSPEC_IE *)tspecSuggestion;
41066 +
41067 +    /*
41068 +     * What do we do, if we get TSPEC rejection? One thought
41069 +     * that comes to mind is implictly delete the pstream...
41070 +     */
41071 +    A_PRINTF("AR6000 CAC notification. "
41072 +                "AC = %d, cacIndication = 0x%x, statusCode = 0x%x\n",
41073 +                 ac, cacIndication, statusCode);
41074 +}
41075 +
41076 +#define AR6000_PRINT_BSSID(_pBss)  do {     \
41077 +        A_PRINTF("%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ",\
41078 +                 (_pBss)[0],(_pBss)[1],(_pBss)[2],(_pBss)[3],\
41079 +                 (_pBss)[4],(_pBss)[5]);  \
41080 +} while(0)
41081 +
41082 +void
41083 +ar6000_roam_tbl_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_TBL *pTbl)
41084 +{
41085 +    A_UINT8 i;
41086 +
41087 +    A_PRINTF("ROAM TABLE NO OF ENTRIES is %d ROAM MODE is %d\n",
41088 +              pTbl->numEntries, pTbl->roamMode);
41089 +    for (i= 0; i < pTbl->numEntries; i++) {
41090 +        A_PRINTF("[%d]bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x ", i,
41091 +            pTbl->bssRoamInfo[i].bssid[0], pTbl->bssRoamInfo[i].bssid[1],
41092 +            pTbl->bssRoamInfo[i].bssid[2],
41093 +            pTbl->bssRoamInfo[i].bssid[3],
41094 +            pTbl->bssRoamInfo[i].bssid[4],
41095 +            pTbl->bssRoamInfo[i].bssid[5]);
41096 +        A_PRINTF("RSSI %d RSSIDT %d LAST RSSI %d UTIL %d ROAM_UTIL %d"
41097 +                 " BIAS %d\n",
41098 +            pTbl->bssRoamInfo[i].rssi,
41099 +            pTbl->bssRoamInfo[i].rssidt,
41100 +            pTbl->bssRoamInfo[i].last_rssi,
41101 +            pTbl->bssRoamInfo[i].util,
41102 +            pTbl->bssRoamInfo[i].roam_util,
41103 +            pTbl->bssRoamInfo[i].bias);
41104 +    }
41105 +}
41106 +
41107 +void
41108 +ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters, WMI_GET_WOW_LIST_REPLY *wow_reply)
41109 +{
41110 +    A_UINT8 i,j;
41111 +
41112 +    /*Each event now contains exactly one filter, see bug 26613*/
41113 +    A_PRINTF("WOW pattern %d of %d patterns\n", wow_reply->this_filter_num,                 wow_reply->num_filters);
41114 +    A_PRINTF("wow mode = %s host mode = %s\n",
41115 +            (wow_reply->wow_mode == 0? "disabled":"enabled"),
41116 +            (wow_reply->host_mode == 1 ? "awake":"asleep"));
41117 +
41118 +
41119 +    /*If there are no patterns, the reply will only contain generic
41120 +      WoW information. Pattern information will exist only if there are
41121 +      patterns present. Bug 26716*/
41122 +
41123 +   /* If this event contains pattern information, display it*/
41124 +    if (wow_reply->this_filter_num) {
41125 +        i=0;
41126 +        A_PRINTF("id=%d size=%d offset=%d\n",
41127 +                    wow_reply->wow_filters[i].wow_filter_id,
41128 +                    wow_reply->wow_filters[i].wow_filter_size,
41129 +                    wow_reply->wow_filters[i].wow_filter_offset);
41130 +       A_PRINTF("wow pattern = ");
41131 +       for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
41132 +             A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_pattern[j]);
41133 +        }
41134 +
41135 +        A_PRINTF("\nwow mask = ");
41136 +        for (j=0; j< wow_reply->wow_filters[i].wow_filter_size; j++) {
41137 +            A_PRINTF("%2.2x",wow_reply->wow_filters[i].wow_filter_mask[j]);
41138 +        }
41139 +        A_PRINTF("\n");
41140 +    }
41141 +}
41142 +
41143 +/*
41144 + * Report the Roaming related data collected on the target
41145 + */
41146 +void
41147 +ar6000_display_roam_time(WMI_TARGET_ROAM_TIME *p)
41148 +{
41149 +    A_PRINTF("Disconnect Data : BSSID: ");
41150 +    AR6000_PRINT_BSSID(p->disassoc_bssid);
41151 +    A_PRINTF(" RSSI %d DISASSOC Time %d NO_TXRX_TIME %d\n",
41152 +             p->disassoc_bss_rssi,p->disassoc_time,
41153 +             p->no_txrx_time);
41154 +    A_PRINTF("Connect Data: BSSID: ");
41155 +    AR6000_PRINT_BSSID(p->assoc_bssid);
41156 +    A_PRINTF(" RSSI %d ASSOC Time %d TXRX_TIME %d\n",
41157 +             p->assoc_bss_rssi,p->assoc_time,
41158 +             p->allow_txrx_time);
41159 +    A_PRINTF("Last Data Tx Time (b4 Disassoc) %d "\
41160 +             "First Data Tx Time (after Assoc) %d\n",
41161 +             p->last_data_txrx_time, p->first_data_txrx_time);
41162 +}
41163 +
41164 +void
41165 +ar6000_roam_data_event(AR_SOFTC_T *ar, WMI_TARGET_ROAM_DATA *p)
41166 +{
41167 +    switch (p->roamDataType) {
41168 +        case ROAM_DATA_TIME:
41169 +            ar6000_display_roam_time(&p->u.roamTime);
41170 +            break;
41171 +        default:
41172 +            break;
41173 +    }
41174 +}
41175 +
41176 +void
41177 +ar6000_bssInfo_event_rx(AR_SOFTC_T *ar, A_UINT8 *datap, int len)
41178 +{
41179 +    struct sk_buff *skb;
41180 +    WMI_BSS_INFO_HDR *bih = (WMI_BSS_INFO_HDR *)datap;
41181 +
41182 +
41183 +    if (!ar->arMgmtFilter) {
41184 +        return;
41185 +    }
41186 +    if (((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_BEACON) &&
41187 +        (bih->frameType != BEACON_FTYPE))  ||
41188 +        ((ar->arMgmtFilter & IEEE80211_FILTER_TYPE_PROBE_RESP) &&
41189 +        (bih->frameType != PROBERESP_FTYPE)))
41190 +    {
41191 +        return;
41192 +    }
41193 +
41194 +    if ((skb = A_NETBUF_ALLOC_RAW(len)) != NULL) {
41195 +
41196 +        A_NETBUF_PUT(skb, len);
41197 +        A_MEMCPY(A_NETBUF_DATA(skb), datap, len);
41198 +        skb->dev = ar->arNetDev;
41199 +       printk("MAC RAW...\n");
41200 +//        skb->mac.raw = A_NETBUF_DATA(skb);
41201 +        skb->ip_summed = CHECKSUM_NONE;
41202 +        skb->pkt_type = PACKET_OTHERHOST;
41203 +        skb->protocol = __constant_htons(0x0019);
41204 +        netif_rx(skb);
41205 +    }
41206 +}
41207 +
41208 +A_UINT32 wmiSendCmdNum;
41209 +
41210 +A_STATUS
41211 +ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID)
41212 +{
41213 +    AR_SOFTC_T       *ar = (AR_SOFTC_T *)devt;
41214 +    A_STATUS         status = A_OK;
41215 +    struct ar_cookie *cookie = NULL;
41216 +    int i;
41217 +
41218 +        /* take lock to protect ar6000_alloc_cookie() */
41219 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
41220 +
41221 +    do {
41222 +
41223 +        AR_DEBUG2_PRINTF("ar_contrstatus = ol_tx: skb=0x%x, len=0x%x, sid=%d\n",
41224 +                         (A_UINT32)osbuf, A_NETBUF_LEN(osbuf), streamID);
41225 +
41226 +        if ((streamID == WMI_CONTROL_PRI) && (ar->arWMIControlEpFull)) {
41227 +                /* control endpoint is full, don't allocate resources, we
41228 +                 * are just going to drop this packet */
41229 +            cookie = NULL;
41230 +            AR_DEBUG_PRINTF(" WMI Control EP full, dropping packet : 0x%X, len:%d \n",
41231 +                    (A_UINT32)osbuf, A_NETBUF_LEN(osbuf));
41232 +        } else {
41233 +            cookie = ar6000_alloc_cookie(ar);
41234 +        }
41235 +
41236 +        if (cookie == NULL) {
41237 +            status = A_NO_MEMORY;
41238 +            break;
41239 +        }
41240 +
41241 +        if(logWmiRawMsgs) {
41242 +            A_PRINTF("WMI cmd send, msgNo %d :", wmiSendCmdNum);
41243 +            for(i = 0; i < a_netbuf_to_len(osbuf); i++)
41244 +                A_PRINTF("%x ", ((A_UINT8 *)a_netbuf_to_data(osbuf))[i]);
41245 +            A_PRINTF("\n");
41246 +        }
41247 +
41248 +        wmiSendCmdNum++;
41249 +
41250 +    } while (FALSE);
41251 +
41252 +    if (cookie != NULL) {
41253 +            /* got a structure to send it out on */
41254 +        ar->arTxPending[streamID]++;
41255 +
41256 +        if (streamID != WMI_CONTROL_PRI) {
41257 +            ar->arTotalTxDataPending++;
41258 +        }
41259 +    }
41260 +
41261 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
41262 +
41263 +    if (cookie != NULL) {
41264 +        cookie->arc_bp[0] = (A_UINT32)osbuf;
41265 +        cookie->arc_bp[1] = 0;
41266 +        SET_HTC_PACKET_INFO_TX(&cookie->HtcPkt,
41267 +                               cookie,
41268 +                               A_NETBUF_DATA(osbuf),
41269 +                               A_NETBUF_LEN(osbuf),
41270 +                               arWMIStream2EndpointID(ar,streamID),
41271 +                               AR6K_CONTROL_PKT_TAG);
41272 +            /* this interface is asynchronous, if there is an error, cleanup will happen in the
41273 +             * TX completion callback */
41274 +        HTCSendPkt(ar->arHtcTarget, &cookie->HtcPkt);
41275 +        status = A_OK;
41276 +    }
41277 +
41278 +    return status;
41279 +}
41280 +
41281 +/* indicate tx activity or inactivity on a WMI stream */
41282 +void ar6000_indicate_tx_activity(void *devt, A_UINT8 TrafficClass, A_BOOL Active)
41283 +{
41284 +    AR_SOFTC_T  *ar = (AR_SOFTC_T *)devt;
41285 +    WMI_PRI_STREAM_ID streamid;
41286 +
41287 +    if (ar->arWmiEnabled) {
41288 +        streamid = wmi_get_stream_id(ar->arWmi, TrafficClass);
41289 +    } else {
41290 +            /* for mbox ping testing, the traffic class is mapped directly as a stream ID,
41291 +             * see handling of AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE in ioctl.c */
41292 +        streamid = (WMI_PRI_STREAM_ID)TrafficClass;
41293 +    }
41294 +
41295 +        /* notify HTC, this may cause credit distribution changes */
41296 +
41297 +    HTCIndicateActivityChange(ar->arHtcTarget,
41298 +                              arWMIStream2EndpointID(ar,streamid),
41299 +                              Active);
41300 +
41301 +}
41302 +
41303 +module_init(ar6000_init_module);
41304 +module_exit(ar6000_cleanup_module);
41305 +
41306 +/* Init cookie queue */
41307 +static void
41308 +ar6000_cookie_init(AR_SOFTC_T *ar)
41309 +{
41310 +    A_UINT32    i;
41311 +
41312 +    ar->arCookieList = NULL;
41313 +    A_MEMZERO(s_ar_cookie_mem, sizeof(s_ar_cookie_mem));
41314 +
41315 +    for (i = 0; i < MAX_COOKIE_NUM; i++) {
41316 +        ar6000_free_cookie(ar, &s_ar_cookie_mem[i]);
41317 +    }
41318 +}
41319 +
41320 +/* cleanup cookie queue */
41321 +static void
41322 +ar6000_cookie_cleanup(AR_SOFTC_T *ar)
41323 +{
41324 +    /* It is gone .... */
41325 +    ar->arCookieList = NULL;
41326 +}
41327 +
41328 +/* Init cookie queue */
41329 +static void
41330 +ar6000_free_cookie(AR_SOFTC_T *ar, struct ar_cookie * cookie)
41331 +{
41332 +    /* Insert first */
41333 +    A_ASSERT(ar != NULL);
41334 +    A_ASSERT(cookie != NULL);
41335 +    cookie->arc_list_next = ar->arCookieList;
41336 +    ar->arCookieList = cookie;
41337 +}
41338 +
41339 +/* cleanup cookie queue */
41340 +static struct ar_cookie *
41341 +ar6000_alloc_cookie(AR_SOFTC_T  *ar)
41342 +{
41343 +    struct ar_cookie   *cookie;
41344 +
41345 +    cookie = ar->arCookieList;
41346 +    if(cookie != NULL)
41347 +    {
41348 +        ar->arCookieList = cookie->arc_list_next;
41349 +    }
41350 +
41351 +    return cookie;
41352 +}
41353 +
41354 +#ifdef SEND_EVENT_TO_APP
41355 +/*
41356 + * This function is used to send event which come from taget to
41357 + * the application. The buf which send to application is include
41358 + * the event ID and event content.
41359 + */
41360 +#define EVENT_ID_LEN   2
41361 +void ar6000_send_event_to_app(AR_SOFTC_T *ar, A_UINT16 eventId,
41362 +                              A_UINT8 *datap, int len)
41363 +{
41364 +
41365 +#if (WIRELESS_EXT >= 15)
41366 +
41367 +/* note: IWEVCUSTOM only exists in wireless extensions after version 15 */
41368 +
41369 +    char *buf;
41370 +    A_UINT16 size;
41371 +    union iwreq_data wrqu;
41372 +
41373 +    size = len + EVENT_ID_LEN;
41374 +
41375 +    if (size > IW_CUSTOM_MAX) {
41376 +        AR_DEBUG_PRINTF("WMI event ID : 0x%4.4X, len = %d too big for IWEVCUSTOM (max=%d) \n",
41377 +                eventId, size, IW_CUSTOM_MAX);
41378 +        return;
41379 +    }
41380 +
41381 +    buf = A_MALLOC_NOWAIT(size);
41382 +    A_MEMZERO(buf, size);
41383 +    A_MEMCPY(buf, &eventId, EVENT_ID_LEN);
41384 +    A_MEMCPY(buf+EVENT_ID_LEN, datap, len);
41385 +
41386 +    //AR_DEBUG_PRINTF("event ID = %d,len = %d\n",*(A_UINT16*)buf, size);
41387 +    A_MEMZERO(&wrqu, sizeof(wrqu));
41388 +    wrqu.data.length = size;
41389 +    wireless_send_event(ar->arNetDev, IWEVCUSTOM, &wrqu, buf);
41390 +
41391 +    A_FREE(buf);
41392 +#endif
41393 +
41394 +
41395 +}
41396 +#endif
41397 +
41398 +
41399 +void
41400 +ar6000_tx_retry_err_event(void *devt)
41401 +{
41402 +    AR_DEBUG2_PRINTF("Tx retries reach maximum!\n");
41403 +}
41404 +
41405 +void
41406 +ar6000_snrThresholdEvent_rx(void *devt, WMI_SNR_THRESHOLD_VAL newThreshold, A_UINT8 snr)
41407 +{
41408 +    AR_DEBUG2_PRINTF("snr threshold range %d, snr %d\n", newThreshold, snr);
41409 +}
41410 +
41411 +void
41412 +ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL newThreshold, A_UINT8 lq)
41413 +{
41414 +    AR_DEBUG2_PRINTF("lq threshold range %d, lq %d\n", newThreshold, lq);
41415 +}
41416 +
41417 +
41418 +
41419 +A_UINT32
41420 +a_copy_to_user(void *to, const void *from, A_UINT32 n)
41421 +{
41422 +    return(copy_to_user(to, from, n));
41423 +}
41424 +
41425 +A_UINT32
41426 +a_copy_from_user(void *to, const void *from, A_UINT32 n)
41427 +{
41428 +    return(copy_from_user(to, from, n));
41429 +}
41430 +
41431 +
41432 +A_STATUS
41433 +ar6000_get_driver_cfg(struct net_device *dev,
41434 +                        A_UINT16 cfgParam,
41435 +                        void *result)
41436 +{
41437 +
41438 +    A_STATUS    ret = 0;
41439 +
41440 +    switch(cfgParam)
41441 +    {
41442 +        case AR6000_DRIVER_CFG_GET_WLANNODECACHING:
41443 +           *((A_UINT32 *)result) = wlanNodeCaching;
41444 +           break;
41445 +        case AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS:
41446 +           *((A_UINT32 *)result) = logWmiRawMsgs;
41447 +            break;
41448 +        default:
41449 +           ret = EINVAL;
41450 +           break;
41451 +    }
41452 +
41453 +    return ret;
41454 +}
41455 +
41456 +void
41457 +ar6000_keepalive_rx(void *devt, A_UINT8 configured)
41458 +{
41459 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
41460 +
41461 +    ar->arKeepaliveConfigured = configured;
41462 +    wake_up(&arEvent);
41463 +}
41464 +
41465 +void
41466 +ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID, WMI_PMKID *pmkidList)
41467 +{
41468 +    A_UINT8 i, j;
41469 +
41470 +    A_PRINTF("Number of Cached PMKIDs is %d\n", numPMKID);
41471 +
41472 +    for (i = 0; i < numPMKID; i++) {
41473 +        A_PRINTF("\nPMKID %d ", i);
41474 +            for (j = 0; j < WMI_PMKID_LEN; j++) {
41475 +                A_PRINTF("%2.2x", pmkidList->pmkid[j]);
41476 +            }
41477 +        pmkidList++;
41478 +    }
41479 +}
41480 +
41481 +#ifdef USER_KEYS
41482 +static A_STATUS
41483 +
41484 +ar6000_reinstall_keys(AR_SOFTC_T *ar, A_UINT8 key_op_ctrl)
41485 +{
41486 +    A_STATUS status = A_OK;
41487 +    struct ieee80211req_key *uik = &ar->user_saved_keys.ucast_ik;
41488 +    struct ieee80211req_key *bik = &ar->user_saved_keys.bcast_ik;
41489 +    CRYPTO_TYPE  keyType = ar->user_saved_keys.keyType;
41490 +
41491 +    if (IEEE80211_CIPHER_CCKM_KRK != uik->ik_type) {
41492 +        if (NONE_CRYPT == keyType) {
41493 +            goto _reinstall_keys_out;
41494 +        }
41495 +
41496 +        if (uik->ik_keylen) {
41497 +            status = wmi_addKey_cmd(ar->arWmi, uik->ik_keyix,
41498 +                    ar->user_saved_keys.keyType, PAIRWISE_USAGE,
41499 +                    uik->ik_keylen, (A_UINT8 *)&uik->ik_keyrsc,
41500 +                    uik->ik_keydata, key_op_ctrl, SYNC_BEFORE_WMIFLAG);
41501 +        }
41502 +
41503 +    } else {
41504 +        status = wmi_add_krk_cmd(ar->arWmi, uik->ik_keydata);
41505 +    }
41506 +
41507 +    if (IEEE80211_CIPHER_CCKM_KRK != bik->ik_type) {
41508 +        if (NONE_CRYPT == keyType) {
41509 +            goto _reinstall_keys_out;
41510 +        }
41511 +
41512 +        if (bik->ik_keylen) {
41513 +            status = wmi_addKey_cmd(ar->arWmi, bik->ik_keyix,
41514 +                    ar->user_saved_keys.keyType, GROUP_USAGE,
41515 +                    bik->ik_keylen, (A_UINT8 *)&bik->ik_keyrsc,
41516 +                    bik->ik_keydata, key_op_ctrl, NO_SYNC_WMIFLAG);
41517 +        }
41518 +    } else {
41519 +        status = wmi_add_krk_cmd(ar->arWmi, bik->ik_keydata);
41520 +    }
41521 +
41522 +_reinstall_keys_out:
41523 +    ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_INIT;
41524 +    ar->user_key_ctrl      = 0;
41525 +
41526 +    return status;
41527 +}
41528 +#endif /* USER_KEYS */
41529 +
41530 +
41531 +void
41532 +ar6000_dset_open_req(
41533 +    void *context,
41534 +    A_UINT32 id,
41535 +    A_UINT32 targHandle,
41536 +    A_UINT32 targReplyFn,
41537 +    A_UINT32 targReplyArg)
41538 +{
41539 +}
41540 +
41541 +void
41542 +ar6000_dset_close(
41543 +    void *context,
41544 +    A_UINT32 access_cookie)
41545 +{
41546 +    return;
41547 +}
41548 +
41549 +void
41550 +ar6000_dset_data_req(
41551 +   void *context,
41552 +   A_UINT32 accessCookie,
41553 +   A_UINT32 offset,
41554 +   A_UINT32 length,
41555 +   A_UINT32 targBuf,
41556 +   A_UINT32 targReplyFn,
41557 +   A_UINT32 targReplyArg)
41558 +{
41559 +}
41560 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h
41561 ===================================================================
41562 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
41563 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_drv.h        2008-12-11 22:46:49.000000000 +0100
41564 @@ -0,0 +1,361 @@
41565 +/*
41566 + *
41567 + * Copyright (c) 2004-2007 Atheros Communications Inc.
41568 + * All rights reserved.
41569 + *
41570 + *
41571 + *  This program is free software; you can redistribute it and/or modify
41572 + *  it under the terms of the GNU General Public License version 2 as
41573 + *  published by the Free Software Foundation;
41574 + *
41575 + *  Software distributed under the License is distributed on an "AS
41576 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
41577 + *  implied. See the License for the specific language governing
41578 + *  rights and limitations under the License.
41579 + *
41580 + *
41581 + *
41582 + */
41583 +
41584 +#ifndef _AR6000_H_
41585 +#define _AR6000_H_
41586 +
41587 +#include <linux/version.h>
41588 +
41589 +
41590 +#include <linux/autoconf.h>
41591 +#include <linux/init.h>
41592 +#include <linux/kernel.h>
41593 +#include <linux/spinlock.h>
41594 +#include <linux/skbuff.h>
41595 +#include <linux/if_ether.h>
41596 +#include <linux/netdevice.h>
41597 +#include <linux/etherdevice.h>
41598 +#include <net/iw_handler.h>
41599 +#include <linux/if_arp.h>
41600 +#include <linux/ip.h>
41601 +#include <asm/semaphore.h>
41602 +#include <linux/wireless.h>
41603 +#include <linux/module.h>
41604 +#include <asm/io.h>
41605 +
41606 +#include <a_config.h>
41607 +#include <athdefs.h>
41608 +#include "a_types.h"
41609 +#include "a_osapi.h"
41610 +#include "htc_api.h"
41611 +#include "wmi.h"
41612 +#include "a_drv.h"
41613 +#include "bmi.h"
41614 +#include <ieee80211.h>
41615 +#include <ieee80211_ioctl.h>
41616 +#include <wlan_api.h>
41617 +#include <wmi_api.h>
41618 +#include "gpio_api.h"
41619 +#include "gpio.h"
41620 +#include <host_version.h>
41621 +#include <linux/rtnetlink.h>
41622 +#include <linux/init.h>
41623 +#include <linux/moduleparam.h>
41624 +#include "AR6Khwreg.h"
41625 +#include "ar6000_api.h"
41626 +#ifdef CONFIG_HOST_TCMD_SUPPORT
41627 +#include <testcmd.h>
41628 +#endif
41629 +
41630 +#include "targaddrs.h"
41631 +#include "dbglog_api.h"
41632 +#include "ar6000_diag.h"
41633 +#include "common_drv.h"
41634 +
41635 +#ifndef  __dev_put
41636 +#define  __dev_put(dev) dev_put(dev)
41637 +#endif
41638 +
41639 +#ifdef USER_KEYS
41640 +
41641 +#define USER_SAVEDKEYS_STAT_INIT     0
41642 +#define USER_SAVEDKEYS_STAT_RUN      1
41643 +
41644 +// TODO this needs to move into the AR_SOFTC struct
41645 +struct USER_SAVEDKEYS {
41646 +    struct ieee80211req_key   ucast_ik;
41647 +    struct ieee80211req_key   bcast_ik;
41648 +    CRYPTO_TYPE               keyType;
41649 +    A_BOOL                    keyOk;
41650 +};
41651 +#endif
41652 +
41653 +#define DBG_INFO               0x00000001
41654 +#define DBG_ERROR              0x00000002
41655 +#define DBG_WARNING            0x00000004
41656 +#define DBG_SDIO               0x00000008
41657 +#define DBG_HIF                        0x00000010
41658 +#define DBG_HTC                        0x00000020
41659 +#define DBG_WMI                        0x00000040
41660 +#define DBG_WMI2               0x00000080
41661 +#define DBG_DRIVER             0x00000100
41662 +
41663 +#define DBG_DEFAULTS   (DBG_ERROR|DBG_WARNING)
41664 +
41665 +
41666 +#ifdef DEBUG
41667 +#define AR_DEBUG_PRINTF(args...)        if (debugdriver) A_PRINTF(args);
41668 +#define AR_DEBUG2_PRINTF(args...)        if (debugdriver >= 2) A_PRINTF(args);
41669 +extern int debugdriver;
41670 +#else
41671 +#define AR_DEBUG_PRINTF(args...)
41672 +#define AR_DEBUG2_PRINTF(args...)
41673 +#endif
41674 +
41675 +A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
41676 +A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
41677 +
41678 +#ifdef __cplusplus
41679 +extern "C" {
41680 +#endif
41681 +
41682 +#define        MAX_AR6000                        1
41683 +#define AR6000_MAX_RX_BUFFERS             16
41684 +#define AR6000_BUFFER_SIZE                1664
41685 +#define AR6000_TX_TIMEOUT                 10
41686 +#define        AR6000_ETH_ADDR_LEN               6
41687 +#define        AR6000_MAX_ENDPOINTS              4
41688 +#define MAX_NODE_NUM                      15
41689 +#define MAX_COOKIE_NUM                    150
41690 +#define AR6000_HB_CHALLENGE_RESP_FREQ_DEFAULT        1
41691 +#define AR6000_HB_CHALLENGE_RESP_MISS_THRES_DEFAULT  1
41692 +
41693 +enum {
41694 +    DRV_HB_CHALLENGE = 0,
41695 +    APP_HB_CHALLENGE
41696 +};
41697 +
41698 +/* HTC RAW streams */
41699 +typedef enum _HTC_RAW_STREAM_ID {
41700 +    HTC_RAW_STREAM_NOT_MAPPED = -1,
41701 +    HTC_RAW_STREAM_0 = 0,
41702 +    HTC_RAW_STREAM_1 = 1,
41703 +    HTC_RAW_STREAM_2 = 2,
41704 +    HTC_RAW_STREAM_3 = 3,
41705 +    HTC_RAW_STREAM_NUM_MAX
41706 +} HTC_RAW_STREAM_ID;
41707 +
41708 +#define RAW_HTC_READ_BUFFERS_NUM    4
41709 +#define RAW_HTC_WRITE_BUFFERS_NUM   4
41710 +
41711 +typedef struct {
41712 +    int currPtr;
41713 +    int length;
41714 +    unsigned char data[AR6000_BUFFER_SIZE];
41715 +    HTC_PACKET    HTCPacket;
41716 +} raw_htc_buffer;
41717 +
41718 +#ifdef CONFIG_HOST_TCMD_SUPPORT
41719 +/*
41720 + *  add TCMD_MODE besides wmi and bypasswmi
41721 + *  in TCMD_MODE, only few TCMD releated wmi commands
41722 + *  counld be hanlder
41723 + */
41724 +enum {
41725 +    AR6000_WMI_MODE = 0,
41726 +    AR6000_BYPASS_MODE,
41727 +    AR6000_TCMD_MODE,
41728 +    AR6000_WLAN_MODE
41729 +};
41730 +#endif /* CONFIG_HOST_TCMD_SUPPORT */
41731 +
41732 +struct ar_wep_key {
41733 +    A_UINT8                 arKeyIndex;
41734 +    A_UINT8                 arKeyLen;
41735 +    A_UINT8                 arKey[64];
41736 +} ;
41737 +
41738 +struct ar_node_mapping {
41739 +    A_UINT8                 macAddress[6];
41740 +    A_UINT8                 epId;
41741 +    A_UINT8                 txPending;
41742 +};
41743 +
41744 +struct ar_cookie {
41745 +    A_UINT32               arc_bp[2];    /* Must be first field */
41746 +    HTC_PACKET             HtcPkt;       /* HTC packet wrapper */
41747 +    struct ar_cookie *arc_list_next;
41748 +};
41749 +
41750 +struct ar_hb_chlng_resp {
41751 +    A_TIMER                 timer;
41752 +    A_UINT32                frequency;
41753 +    A_UINT32                seqNum;
41754 +    A_BOOL                  outstanding;
41755 +    A_UINT8                 missCnt;
41756 +    A_UINT8                 missThres;
41757 +};
41758 +
41759 +typedef struct ar6_softc {
41760 +    struct net_device       *arNetDev;    /* net_device pointer */
41761 +    void                    *arWmi;
41762 +    int                     arTxPending[WMI_PRI_MAX_COUNT];
41763 +    int                     arTotalTxDataPending;
41764 +    A_UINT8                 arNumDataEndPts;
41765 +    A_BOOL                  arWmiEnabled;
41766 +    A_BOOL                  arWmiReady;
41767 +    A_BOOL                  arConnected;
41768 +    A_BOOL                  arRadioSwitch;
41769 +    HTC_HANDLE              arHtcTarget;
41770 +    void                    *arHifDevice;
41771 +    spinlock_t              arLock;
41772 +    struct semaphore        arSem;
41773 +    int                     arRxBuffers[WMI_PRI_MAX_COUNT];
41774 +    int                     arSsidLen;
41775 +    u_char                  arSsid[32];
41776 +    A_UINT8                 arNetworkType;
41777 +    A_UINT8                 arDot11AuthMode;
41778 +    A_UINT8                 arAuthMode;
41779 +    A_UINT8                 arPairwiseCrypto;
41780 +    A_UINT8                 arPairwiseCryptoLen;
41781 +    A_UINT8                 arGroupCrypto;
41782 +    A_UINT8                 arGroupCryptoLen;
41783 +    A_UINT8                 arDefTxKeyIndex;
41784 +    struct ar_wep_key       arWepKeyList[WMI_MAX_KEY_INDEX + 1];
41785 +    A_UINT8                 arBssid[6];
41786 +    A_UINT8                 arReqBssid[6];
41787 +    A_UINT16                arChannelHint;
41788 +    A_UINT16                arBssChannel;
41789 +    A_UINT16                arListenInterval;
41790 +    struct ar6000_version   arVersion;
41791 +    A_UINT32                arTargetType;
41792 +    A_INT8                  arRssi;
41793 +    A_UINT8                 arTxPwr;
41794 +    A_BOOL                  arTxPwrSet;
41795 +    A_INT32                 arBitRate;
41796 +    struct net_device_stats arNetStats;
41797 +    struct iw_statistics       arIwStats;
41798 +    A_INT8                  arNumChannels;
41799 +    A_UINT16                arChannelList[32];
41800 +    A_UINT32                arRegCode;
41801 +    A_BOOL                  statsUpdatePending;
41802 +    TARGET_STATS            arTargetStats;
41803 +    A_INT8                  arMaxRetries;
41804 +    A_UINT8                 arPhyCapability;
41805 +#ifdef CONFIG_HOST_TCMD_SUPPORT
41806 +    A_UINT8                 tcmdRxReport;
41807 +    A_UINT32                tcmdRxTotalPkt;
41808 +    A_INT32                 tcmdRxRssi;
41809 +    A_UINT32                tcmdPm;
41810 +   A_UINT32                 arTargetMode;
41811 +#endif
41812 +    AR6000_WLAN_STATE       arWlanState;
41813 +    struct ar_node_mapping  arNodeMap[MAX_NODE_NUM];
41814 +    A_UINT8                 arIbssPsEnable;
41815 +    A_UINT8                 arNodeNum;
41816 +    A_UINT8                 arNexEpId;
41817 +    struct ar_cookie        *arCookieList;
41818 +    A_UINT16                arRateMask;
41819 +    A_UINT8                 arSkipScan;
41820 +    A_UINT16                arBeaconInterval;
41821 +    A_BOOL                  arConnectPending;
41822 +    A_BOOL                  arWmmEnabled;
41823 +    struct ar_hb_chlng_resp arHBChallengeResp;
41824 +    A_UINT8                 arKeepaliveConfigured;
41825 +    A_UINT32                arMgmtFilter;
41826 +    HTC_ENDPOINT_ID         arWmi2EpMapping[WMI_PRI_MAX_COUNT];
41827 +    WMI_PRI_STREAM_ID       arEp2WmiMapping[ENDPOINT_MAX];
41828 +#ifdef HTC_RAW_INTERFACE
41829 +    HTC_ENDPOINT_ID         arRaw2EpMapping[HTC_RAW_STREAM_NUM_MAX];
41830 +    HTC_RAW_STREAM_ID       arEp2RawMapping[ENDPOINT_MAX];
41831 +    struct semaphore        raw_htc_read_sem[HTC_RAW_STREAM_NUM_MAX];
41832 +    struct semaphore        raw_htc_write_sem[HTC_RAW_STREAM_NUM_MAX];
41833 +    wait_queue_head_t       raw_htc_read_queue[HTC_RAW_STREAM_NUM_MAX];
41834 +    wait_queue_head_t       raw_htc_write_queue[HTC_RAW_STREAM_NUM_MAX];
41835 +    raw_htc_buffer          raw_htc_read_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_READ_BUFFERS_NUM];
41836 +    raw_htc_buffer          raw_htc_write_buffer[HTC_RAW_STREAM_NUM_MAX][RAW_HTC_WRITE_BUFFERS_NUM];
41837 +    A_BOOL                  write_buffer_available[HTC_RAW_STREAM_NUM_MAX];
41838 +    A_BOOL                  read_buffer_available[HTC_RAW_STREAM_NUM_MAX];
41839 +#endif
41840 +    A_BOOL                  arNetQueueStopped;
41841 +    A_BOOL                  arRawIfInit;
41842 +    int                     arDeviceIndex;
41843 +    COMMON_CREDIT_STATE_INFO arCreditStateInfo;
41844 +    A_BOOL                  arWMIControlEpFull;
41845 +    A_BOOL                  dbgLogFetchInProgress;
41846 +    A_UCHAR                 log_buffer[DBGLOG_HOST_LOG_BUFFER_SIZE];
41847 +    A_UINT32                log_cnt;
41848 +    A_UINT32                dbglog_init_done;
41849 +    A_UINT32                arConnectCtrlFlags;
41850 +       A_UINT32                scan_complete;
41851 +#ifdef USER_KEYS
41852 +    A_INT32                 user_savedkeys_stat;
41853 +    A_UINT32                user_key_ctrl;
41854 +    struct USER_SAVEDKEYS   user_saved_keys;
41855 +#endif
41856 +} AR_SOFTC_T;
41857 +
41858 +
41859 +#define arWMIStream2EndpointID(ar,wmi)          (ar)->arWmi2EpMapping[(wmi)]
41860 +#define arSetWMIStream2EndpointIDMap(ar,wmi,ep)  \
41861 +{  (ar)->arWmi2EpMapping[(wmi)] = (ep); \
41862 +   (ar)->arEp2WmiMapping[(ep)] = (wmi); }
41863 +#define arEndpoint2WMIStreamID(ar,ep)           (ar)->arEp2WmiMapping[(ep)]
41864 +
41865 +#define arRawIfEnabled(ar) (ar)->arRawIfInit
41866 +#define arRawStream2EndpointID(ar,raw)          (ar)->arRaw2EpMapping[(raw)]
41867 +#define arSetRawStream2EndpointIDMap(ar,raw,ep)  \
41868 +{  (ar)->arRaw2EpMapping[(raw)] = (ep); \
41869 +   (ar)->arEp2RawMapping[(ep)] = (raw); }
41870 +#define arEndpoint2RawStreamID(ar,ep)           (ar)->arEp2RawMapping[(ep)]
41871 +
41872 +struct ar_giwscan_param {
41873 +    char    *current_ev;
41874 +    char    *end_buf;
41875 +    A_BOOL  firstPass;
41876 +};
41877 +
41878 +#define AR6000_STAT_INC(ar, stat)       (ar->arNetStats.stat++)
41879 +
41880 +#define AR6000_SPIN_LOCK(lock, param)   do {                            \
41881 +    if (irqs_disabled()) {                                              \
41882 +        AR_DEBUG_PRINTF("IRQs disabled:AR6000_LOCK\n");                 \
41883 +    }                                                                   \
41884 +    spin_lock_bh(lock);                                                 \
41885 +} while (0)
41886 +
41887 +#define AR6000_SPIN_UNLOCK(lock, param) do {                            \
41888 +    if (irqs_disabled()) {                                              \
41889 +        AR_DEBUG_PRINTF("IRQs disabled: AR6000_UNLOCK\n");              \
41890 +    }                                                                   \
41891 +    spin_unlock_bh(lock);                                               \
41892 +} while (0)
41893 +
41894 +int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
41895 +int ar6000_ioctl_dispatcher(struct net_device *dev, struct ifreq *rq, int cmd);
41896 +void ar6000_ioctl_iwsetup(struct iw_handler_def *def);
41897 +void ar6000_gpio_init(void);
41898 +void ar6000_init_profile_info(AR_SOFTC_T *ar);
41899 +void ar6000_install_static_wep_keys(AR_SOFTC_T *ar);
41900 +int ar6000_init(struct net_device *dev);
41901 +int ar6000_dbglog_get_debug_logs(AR_SOFTC_T *ar);
41902 +A_STATUS ar6000_SetHTCBlockSize(AR_SOFTC_T *ar);
41903 +
41904 +#ifdef HTC_RAW_INTERFACE
41905 +
41906 +#ifndef __user
41907 +#define __user
41908 +#endif
41909 +
41910 +int ar6000_htc_raw_open(AR_SOFTC_T *ar);
41911 +int ar6000_htc_raw_close(AR_SOFTC_T *ar);
41912 +ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar,
41913 +                            HTC_RAW_STREAM_ID StreamID,
41914 +                            char __user *buffer, size_t count);
41915 +ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar,
41916 +                             HTC_RAW_STREAM_ID StreamID,
41917 +                             char __user *buffer, size_t count);
41918 +
41919 +#endif /* HTC_RAW_INTERFACE */
41920 +
41921 +#ifdef __cplusplus
41922 +}
41923 +#endif
41924 +
41925 +#endif /* _AR6000_H_ */
41926 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c
41927 ===================================================================
41928 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
41929 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6000_raw_if.c     2008-12-11 22:46:49.000000000 +0100
41930 @@ -0,0 +1,439 @@
41931 +/*
41932 + *
41933 + * Copyright (c) 2004-2007 Atheros Communications Inc.
41934 + * All rights reserved.
41935 + *
41936 + *
41937 + *  This program is free software; you can redistribute it and/or modify
41938 + *  it under the terms of the GNU General Public License version 2 as
41939 + *  published by the Free Software Foundation;
41940 + *
41941 + *  Software distributed under the License is distributed on an "AS
41942 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
41943 + *  implied. See the License for the specific language governing
41944 + *  rights and limitations under the License.
41945 + *
41946 + *
41947 + *
41948 + */
41949 +
41950 +#include "ar6000_drv.h"
41951 +
41952 +#ifdef HTC_RAW_INTERFACE
41953 +
41954 +static void
41955 +ar6000_htc_raw_read_cb(void *Context, HTC_PACKET *pPacket)
41956 +{
41957 +    AR_SOFTC_T        *ar = (AR_SOFTC_T *)Context;
41958 +    raw_htc_buffer    *busy;
41959 +    HTC_RAW_STREAM_ID streamID;
41960 +
41961 +    busy = (raw_htc_buffer *)pPacket->pPktContext;
41962 +    A_ASSERT(busy != NULL);
41963 +
41964 +    if (pPacket->Status == A_ECANCELED) {
41965 +        /*
41966 +         * HTC provides A_ECANCELED status when it doesn't want to be refilled
41967 +         * (probably due to a shutdown)
41968 +         */
41969 +        return;
41970 +    }
41971 +
41972 +    streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint);
41973 +    A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED);
41974 +
41975 +#ifdef CF
41976 +   if (down_trylock(&ar->raw_htc_read_sem[streamID])) {
41977 +#else
41978 +    if (down_interruptible(&ar->raw_htc_read_sem[streamID])) {
41979 +#endif /* CF */
41980 +        AR_DEBUG2_PRINTF("Unable to down the semaphore\n");
41981 +    }
41982 +
41983 +    A_ASSERT((pPacket->Status != A_OK) ||
41984 +             (pPacket->pBuffer == (busy->data + HTC_HEADER_LEN)));
41985 +
41986 +    busy->length = pPacket->ActualLength + HTC_HEADER_LEN;
41987 +    busy->currPtr = HTC_HEADER_LEN;
41988 +    ar->read_buffer_available[streamID] = TRUE;
41989 +    //AR_DEBUG_PRINTF("raw read cb:  0x%X 0x%X \n", busy->currPtr,busy->length);
41990 +    up(&ar->raw_htc_read_sem[streamID]);
41991 +
41992 +    /* Signal the waiting process */
41993 +    AR_DEBUG2_PRINTF("Waking up the StreamID(%d) read process\n", streamID);
41994 +    wake_up_interruptible(&ar->raw_htc_read_queue[streamID]);
41995 +}
41996 +
41997 +static void
41998 +ar6000_htc_raw_write_cb(void *Context, HTC_PACKET *pPacket)
41999 +{
42000 +    AR_SOFTC_T          *ar = (AR_SOFTC_T  *)Context;
42001 +    raw_htc_buffer      *free;
42002 +    HTC_RAW_STREAM_ID   streamID;
42003 +
42004 +    free = (raw_htc_buffer *)pPacket->pPktContext;
42005 +    A_ASSERT(free != NULL);
42006 +
42007 +    if (pPacket->Status == A_ECANCELED) {
42008 +        /*
42009 +         * HTC provides A_ECANCELED status when it doesn't want to be refilled
42010 +         * (probably due to a shutdown)
42011 +         */
42012 +        return;
42013 +    }
42014 +
42015 +    streamID = arEndpoint2RawStreamID(ar,pPacket->Endpoint);
42016 +    A_ASSERT(streamID != HTC_RAW_STREAM_NOT_MAPPED);
42017 +
42018 +#ifdef CF
42019 +    if (down_trylock(&ar->raw_htc_write_sem[streamID])) {
42020 +#else
42021 +    if (down_interruptible(&ar->raw_htc_write_sem[streamID])) {
42022 +#endif
42023 +        AR_DEBUG2_PRINTF("Unable to down the semaphore\n");
42024 +    }
42025 +
42026 +    A_ASSERT(pPacket->pBuffer == (free->data + HTC_HEADER_LEN));
42027 +
42028 +    free->length = 0;
42029 +    ar->write_buffer_available[streamID] = TRUE;
42030 +    up(&ar->raw_htc_write_sem[streamID]);
42031 +
42032 +    /* Signal the waiting process */
42033 +    AR_DEBUG2_PRINTF("Waking up the StreamID(%d) write process\n", streamID);
42034 +    wake_up_interruptible(&ar->raw_htc_write_queue[streamID]);
42035 +}
42036 +
42037 +/* connect to a service */
42038 +static A_STATUS ar6000_connect_raw_service(AR_SOFTC_T        *ar,
42039 +                                           HTC_RAW_STREAM_ID StreamID)
42040 +{
42041 +    A_STATUS                 status;
42042 +    HTC_SERVICE_CONNECT_RESP response;
42043 +    A_UINT8                  streamNo;
42044 +    HTC_SERVICE_CONNECT_REQ  connect;
42045 +
42046 +    do {
42047 +
42048 +        A_MEMZERO(&connect,sizeof(connect));
42049 +            /* pass the stream ID as meta data to the RAW streams service */
42050 +        streamNo = (A_UINT8)StreamID;
42051 +        connect.pMetaData = &streamNo;
42052 +        connect.MetaDataLength = sizeof(A_UINT8);
42053 +            /* these fields are the same for all endpoints */
42054 +        connect.EpCallbacks.pContext = ar;
42055 +        connect.EpCallbacks.EpTxComplete = ar6000_htc_raw_write_cb;
42056 +        connect.EpCallbacks.EpRecv = ar6000_htc_raw_read_cb;
42057 +            /* simple interface, we don't need these optional callbacks */
42058 +        connect.EpCallbacks.EpRecvRefill = NULL;
42059 +        connect.EpCallbacks.EpSendFull = NULL;
42060 +        connect.MaxSendQueueDepth = RAW_HTC_WRITE_BUFFERS_NUM;
42061 +
42062 +            /* connect to the raw streams service, we may be able to get 1 or more
42063 +             * connections, depending on WHAT is running on the target */
42064 +        connect.ServiceID = HTC_RAW_STREAMS_SVC;
42065 +
42066 +        A_MEMZERO(&response,sizeof(response));
42067 +
42068 +            /* try to connect to the raw stream, it is okay if this fails with
42069 +             * status HTC_SERVICE_NO_MORE_EP */
42070 +        status = HTCConnectService(ar->arHtcTarget,
42071 +                                   &connect,
42072 +                                   &response);
42073 +
42074 +        if (A_FAILED(status)) {
42075 +            if (response.ConnectRespCode == HTC_SERVICE_NO_MORE_EP) {
42076 +                AR_DEBUG_PRINTF("HTC RAW , No more streams allowed \n");
42077 +                status = A_OK;
42078 +            }
42079 +            break;
42080 +        }
42081 +
42082 +            /* set endpoint mapping for the RAW HTC streams */
42083 +        arSetRawStream2EndpointIDMap(ar,StreamID,response.Endpoint);
42084 +
42085 +        AR_DEBUG_PRINTF("HTC RAW : stream ID: %d, endpoint: %d\n",
42086 +                        StreamID, arRawStream2EndpointID(ar,StreamID));
42087 +
42088 +    } while (FALSE);
42089 +
42090 +    return status;
42091 +}
42092 +
42093 +int ar6000_htc_raw_open(AR_SOFTC_T *ar)
42094 +{
42095 +    A_STATUS status;
42096 +    int streamID, endPt, count2;
42097 +    raw_htc_buffer *buffer;
42098 +    HTC_SERVICE_ID servicepriority;
42099 +
42100 +    A_ASSERT(ar->arHtcTarget != NULL);
42101 +
42102 +        /* wait for target */
42103 +    status = HTCWaitTarget(ar->arHtcTarget);
42104 +
42105 +    if (A_FAILED(status)) {
42106 +        AR_DEBUG_PRINTF("HTCWaitTarget failed (%d)\n", status);
42107 +        return -ENODEV;
42108 +    }
42109 +
42110 +    for (endPt = 0; endPt < ENDPOINT_MAX; endPt++) {
42111 +        ar->arEp2RawMapping[endPt] = HTC_RAW_STREAM_NOT_MAPPED;
42112 +    }
42113 +
42114 +    for (streamID = HTC_RAW_STREAM_0; streamID < HTC_RAW_STREAM_NUM_MAX; streamID++) {
42115 +        /* Initialize the data structures */
42116 +        init_MUTEX(&ar->raw_htc_read_sem[streamID]);
42117 +        init_MUTEX(&ar->raw_htc_write_sem[streamID]);
42118 +        init_waitqueue_head(&ar->raw_htc_read_queue[streamID]);
42119 +        init_waitqueue_head(&ar->raw_htc_write_queue[streamID]);
42120 +
42121 +            /* try to connect to the raw service */
42122 +        status = ar6000_connect_raw_service(ar,streamID);
42123 +
42124 +        if (A_FAILED(status)) {
42125 +            break;
42126 +        }
42127 +
42128 +        if (arRawStream2EndpointID(ar,streamID) == 0) {
42129 +            break;
42130 +        }
42131 +
42132 +        for (count2 = 0; count2 < RAW_HTC_READ_BUFFERS_NUM; count2 ++) {
42133 +            /* Initialize the receive buffers */
42134 +            buffer = &ar->raw_htc_write_buffer[streamID][count2];
42135 +            memset(buffer, 0, sizeof(raw_htc_buffer));
42136 +            buffer = &ar->raw_htc_read_buffer[streamID][count2];
42137 +            memset(buffer, 0, sizeof(raw_htc_buffer));
42138 +
42139 +            SET_HTC_PACKET_INFO_RX_REFILL(&buffer->HTCPacket,
42140 +                                          buffer,
42141 +                                          buffer->data,
42142 +                                          AR6000_BUFFER_SIZE,
42143 +                                          arRawStream2EndpointID(ar,streamID));
42144 +
42145 +            /* Queue buffers to HTC for receive */
42146 +            if ((status = HTCAddReceivePkt(ar->arHtcTarget, &buffer->HTCPacket)) != A_OK)
42147 +            {
42148 +                BMIInit();
42149 +                return -EIO;
42150 +            }
42151 +        }
42152 +
42153 +        for (count2 = 0; count2 < RAW_HTC_WRITE_BUFFERS_NUM; count2 ++) {
42154 +            /* Initialize the receive buffers */
42155 +            buffer = &ar->raw_htc_write_buffer[streamID][count2];
42156 +            memset(buffer, 0, sizeof(raw_htc_buffer));
42157 +        }
42158 +
42159 +        ar->read_buffer_available[streamID] = FALSE;
42160 +        ar->write_buffer_available[streamID] = TRUE;
42161 +    }
42162 +
42163 +    if (A_FAILED(status)) {
42164 +        return -EIO;
42165 +    }
42166 +
42167 +    AR_DEBUG_PRINTF("HTC RAW, number of streams the target supports: %d \n", streamID);
42168 +
42169 +    servicepriority = HTC_RAW_STREAMS_SVC;  /* only 1 */
42170 +
42171 +        /* set callbacks and priority list */
42172 +    HTCSetCreditDistribution(ar->arHtcTarget,
42173 +                             ar,
42174 +                             NULL,  /* use default */
42175 +                             NULL,  /* use default */
42176 +                             &servicepriority,
42177 +                             1);
42178 +
42179 +    /* Start the HTC component */
42180 +    if ((status = HTCStart(ar->arHtcTarget)) != A_OK) {
42181 +        BMIInit();
42182 +        return -EIO;
42183 +    }
42184 +
42185 +    (ar)->arRawIfInit = TRUE;
42186 +
42187 +    return 0;
42188 +}
42189 +
42190 +int ar6000_htc_raw_close(AR_SOFTC_T *ar)
42191 +{
42192 +    A_PRINTF("ar6000_htc_raw_close called \n");
42193 +    HTCStop(ar->arHtcTarget);
42194 +
42195 +        /* reset the device */
42196 +    ar6000_reset_device(ar->arHifDevice, ar->arTargetType);
42197 +    /* Initialize the BMI component */
42198 +    BMIInit();
42199 +
42200 +    return 0;
42201 +}
42202 +
42203 +raw_htc_buffer *
42204 +get_filled_buffer(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID)
42205 +{
42206 +    int count;
42207 +    raw_htc_buffer *busy;
42208 +
42209 +    /* Check for data */
42210 +    for (count = 0; count < RAW_HTC_READ_BUFFERS_NUM; count ++) {
42211 +        busy = &ar->raw_htc_read_buffer[StreamID][count];
42212 +        if (busy->length) {
42213 +            break;
42214 +        }
42215 +    }
42216 +    if (busy->length) {
42217 +        ar->read_buffer_available[StreamID] = TRUE;
42218 +    } else {
42219 +        ar->read_buffer_available[StreamID] = FALSE;
42220 +    }
42221 +
42222 +    return busy;
42223 +}
42224 +
42225 +ssize_t ar6000_htc_raw_read(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID,
42226 +                            char __user *buffer, size_t length)
42227 +{
42228 +    int readPtr;
42229 +    raw_htc_buffer *busy;
42230 +
42231 +    if (arRawStream2EndpointID(ar,StreamID) == 0) {
42232 +        AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID);
42233 +        return -EFAULT;
42234 +    }
42235 +
42236 +    if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) {
42237 +        return -ERESTARTSYS;
42238 +    }
42239 +
42240 +    busy = get_filled_buffer(ar,StreamID);
42241 +    while (!ar->read_buffer_available[StreamID]) {
42242 +        up(&ar->raw_htc_read_sem[StreamID]);
42243 +
42244 +        /* Wait for the data */
42245 +        AR_DEBUG2_PRINTF("Sleeping StreamID(%d) read process\n", StreamID);
42246 +        if (wait_event_interruptible(ar->raw_htc_read_queue[StreamID],
42247 +                                     ar->read_buffer_available[StreamID]))
42248 +        {
42249 +            return -EINTR;
42250 +        }
42251 +        if (down_interruptible(&ar->raw_htc_read_sem[StreamID])) {
42252 +            return -ERESTARTSYS;
42253 +        }
42254 +        busy = get_filled_buffer(ar,StreamID);
42255 +    }
42256 +
42257 +    /* Read the data */
42258 +    readPtr = busy->currPtr;
42259 +    if (length > busy->length - HTC_HEADER_LEN) {
42260 +        length = busy->length - HTC_HEADER_LEN;
42261 +    }
42262 +    if (copy_to_user(buffer, &busy->data[readPtr], length)) {
42263 +        up(&ar->raw_htc_read_sem[StreamID]);
42264 +        return -EFAULT;
42265 +    }
42266 +
42267 +    busy->currPtr += length;
42268 +
42269 +    //AR_DEBUG_PRINTF("raw read ioctl:  currPTR : 0x%X 0x%X \n", busy->currPtr,busy->length);
42270 +
42271 +    if (busy->currPtr == busy->length)
42272 +    {
42273 +        busy->currPtr = 0;
42274 +        busy->length = 0;
42275 +        HTC_PACKET_RESET_RX(&busy->HTCPacket);
42276 +        //AR_DEBUG_PRINTF("raw read ioctl:  ep for packet:%d \n", busy->HTCPacket.Endpoint);
42277 +        HTCAddReceivePkt(ar->arHtcTarget, &busy->HTCPacket);
42278 +    }
42279 +    ar->read_buffer_available[StreamID] = FALSE;
42280 +    up(&ar->raw_htc_read_sem[StreamID]);
42281 +
42282 +    return length;
42283 +}
42284 +
42285 +static raw_htc_buffer *
42286 +get_free_buffer(AR_SOFTC_T *ar, HTC_ENDPOINT_ID StreamID)
42287 +{
42288 +    int count;
42289 +    raw_htc_buffer *free;
42290 +
42291 +    free = NULL;
42292 +    for (count = 0; count < RAW_HTC_WRITE_BUFFERS_NUM; count ++) {
42293 +        free = &ar->raw_htc_write_buffer[StreamID][count];
42294 +        if (free->length == 0) {
42295 +            break;
42296 +        }
42297 +    }
42298 +    if (!free->length) {
42299 +        ar->write_buffer_available[StreamID] = TRUE;
42300 +    } else {
42301 +        ar->write_buffer_available[StreamID] = FALSE;
42302 +    }
42303 +
42304 +    return free;
42305 +}
42306 +
42307 +ssize_t ar6000_htc_raw_write(AR_SOFTC_T *ar, HTC_RAW_STREAM_ID StreamID,
42308 +                     char __user *buffer, size_t length)
42309 +{
42310 +    int writePtr;
42311 +    raw_htc_buffer *free;
42312 +
42313 +    if (arRawStream2EndpointID(ar,StreamID) == 0) {
42314 +        AR_DEBUG_PRINTF("StreamID(%d) not connected! \n", StreamID);
42315 +        return -EFAULT;
42316 +    }
42317 +
42318 +    if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) {
42319 +        return -ERESTARTSYS;
42320 +    }
42321 +
42322 +    /* Search for a free buffer */
42323 +    free = get_free_buffer(ar,StreamID);
42324 +
42325 +    /* Check if there is space to write else wait */
42326 +    while (!ar->write_buffer_available[StreamID]) {
42327 +        up(&ar->raw_htc_write_sem[StreamID]);
42328 +
42329 +        /* Wait for buffer to become free */
42330 +        AR_DEBUG2_PRINTF("Sleeping StreamID(%d) write process\n", StreamID);
42331 +        if (wait_event_interruptible(ar->raw_htc_write_queue[StreamID],
42332 +                                     ar->write_buffer_available[StreamID]))
42333 +        {
42334 +            return -EINTR;
42335 +        }
42336 +        if (down_interruptible(&ar->raw_htc_write_sem[StreamID])) {
42337 +            return -ERESTARTSYS;
42338 +        }
42339 +        free = get_free_buffer(ar,StreamID);
42340 +    }
42341 +
42342 +    /* Send the data */
42343 +    writePtr = HTC_HEADER_LEN;
42344 +    if (length > (AR6000_BUFFER_SIZE - HTC_HEADER_LEN)) {
42345 +        length = AR6000_BUFFER_SIZE - HTC_HEADER_LEN;
42346 +    }
42347 +
42348 +    if (copy_from_user(&free->data[writePtr], buffer, length)) {
42349 +        up(&ar->raw_htc_read_sem[StreamID]);
42350 +        return -EFAULT;
42351 +    }
42352 +
42353 +    free->length = length;
42354 +
42355 +    SET_HTC_PACKET_INFO_TX(&free->HTCPacket,
42356 +                           free,
42357 +                           &free->data[writePtr],
42358 +                           length,
42359 +                           arRawStream2EndpointID(ar,StreamID),
42360 +                           AR6K_DATA_PKT_TAG);
42361 +
42362 +    HTCSendPkt(ar->arHtcTarget,&free->HTCPacket);
42363 +
42364 +    ar->write_buffer_available[StreamID] = FALSE;
42365 +    up(&ar->raw_htc_write_sem[StreamID]);
42366 +
42367 +    return length;
42368 +}
42369 +#endif /* HTC_RAW_INTERFACE */
42370 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h
42371 ===================================================================
42372 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
42373 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ar6xapi_linux.h     2008-12-11 22:46:49.000000000 +0100
42374 @@ -0,0 +1,128 @@
42375 +#ifndef _AR6XAPI_LINUX_H
42376 +#define _AR6XAPI_LINUX_H
42377 +/*
42378 + *
42379 + * Copyright (c) 2004-2007 Atheros Communications Inc.
42380 + * All rights reserved.
42381 + *
42382 + *
42383 + *  This program is free software; you can redistribute it and/or modify
42384 + *  it under the terms of the GNU General Public License version 2 as
42385 + *  published by the Free Software Foundation;
42386 + *
42387 + *  Software distributed under the License is distributed on an "AS
42388 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
42389 + *  implied. See the License for the specific language governing
42390 + *  rights and limitations under the License.
42391 + *
42392 + *
42393 + *
42394 + */
42395 +
42396 +#ifdef __cplusplus
42397 +extern "C" {
42398 +#endif
42399 +
42400 +struct ar6_softc;
42401 +
42402 +void ar6000_ready_event(void *devt, A_UINT8 *datap, A_UINT8 phyCap);
42403 +A_UINT8 ar6000_iptos_to_userPriority(A_UINT8 *pkt);
42404 +A_STATUS ar6000_control_tx(void *devt, void *osbuf, WMI_PRI_STREAM_ID streamID);
42405 +void ar6000_connect_event(struct ar6_softc *ar, A_UINT16 channel,
42406 +                          A_UINT8 *bssid, A_UINT16 listenInterval,
42407 +                          A_UINT16 beaconInterval, NETWORK_TYPE networkType,
42408 +                          A_UINT8 beaconIeLen, A_UINT8 assocReqLen,
42409 +                          A_UINT8 assocRespLen,A_UINT8 *assocInfo);
42410 +void ar6000_disconnect_event(struct ar6_softc *ar, A_UINT8 reason,
42411 +                             A_UINT8 *bssid, A_UINT8 assocRespLen,
42412 +                             A_UINT8 *assocInfo, A_UINT16 protocolReasonStatus);
42413 +void ar6000_tkip_micerr_event(struct ar6_softc *ar, A_UINT8 keyid,
42414 +                              A_BOOL ismcast);
42415 +void ar6000_bitrate_rx(void *devt, A_INT32 rateKbps);
42416 +void ar6000_channelList_rx(void *devt, A_INT8 numChan, A_UINT16 *chanList);
42417 +void ar6000_regDomain_event(struct ar6_softc *ar, A_UINT32 regCode);
42418 +void ar6000_txPwr_rx(void *devt, A_UINT8 txPwr);
42419 +void ar6000_keepalive_rx(void *devt, A_UINT8 configured);
42420 +void ar6000_neighborReport_event(struct ar6_softc *ar, int numAps,
42421 +                                 WMI_NEIGHBOR_INFO *info);
42422 +void ar6000_set_numdataendpts(struct ar6_softc *ar, A_UINT32 num);
42423 +void ar6000_scanComplete_event(struct ar6_softc *ar, A_STATUS status);
42424 +void ar6000_targetStats_event(struct ar6_softc *ar,  WMI_TARGET_STATS *pStats);
42425 +void ar6000_rssiThreshold_event(struct ar6_softc *ar,
42426 +                                WMI_RSSI_THRESHOLD_VAL newThreshold,
42427 +                                A_INT16 rssi);
42428 +void ar6000_reportError_event(struct ar6_softc *, WMI_TARGET_ERROR_VAL errorVal);
42429 +void ar6000_cac_event(struct ar6_softc *ar, A_UINT8 ac, A_UINT8 cac_indication,
42430 +                                A_UINT8 statusCode, A_UINT8 *tspecSuggestion);
42431 +void ar6000_hbChallengeResp_event(struct ar6_softc *, A_UINT32 cookie, A_UINT32 source);
42432 +void
42433 +ar6000_roam_tbl_event(struct ar6_softc *ar, WMI_TARGET_ROAM_TBL *pTbl);
42434 +
42435 +void
42436 +ar6000_roam_data_event(struct ar6_softc *ar, WMI_TARGET_ROAM_DATA *p);
42437 +
42438 +void
42439 +ar6000_wow_list_event(struct ar6_softc *ar, A_UINT8 num_filters,
42440 +                      WMI_GET_WOW_LIST_REPLY *wow_reply);
42441 +
42442 +void ar6000_pmkid_list_event(void *devt, A_UINT8 numPMKID,
42443 +                             WMI_PMKID *pmkidList);
42444 +
42445 +void ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values);
42446 +void ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value);
42447 +void ar6000_gpio_ack_rx(void);
42448 +
42449 +void ar6000_dbglog_init_done(struct ar6_softc *ar);
42450 +
42451 +#ifdef SEND_EVENT_TO_APP
42452 +void ar6000_send_event_to_app(struct ar6_softc *ar, A_UINT16 eventId, A_UINT8 *datap, int len);
42453 +#endif
42454 +
42455 +#ifdef CONFIG_HOST_TCMD_SUPPORT
42456 +void ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len);
42457 +#endif
42458 +
42459 +void ar6000_tx_retry_err_event(void *devt);
42460 +
42461 +void ar6000_snrThresholdEvent_rx(void *devt,
42462 +                                 WMI_SNR_THRESHOLD_VAL newThreshold,
42463 +                                 A_UINT8 snr);
42464 +
42465 +void ar6000_lqThresholdEvent_rx(void *devt, WMI_LQ_THRESHOLD_VAL range, A_UINT8 lqVal);
42466 +
42467 +
42468 +void ar6000_ratemask_rx(void *devt, A_UINT16 ratemask);
42469 +
42470 +A_STATUS ar6000_get_driver_cfg(struct net_device *dev,
42471 +                                A_UINT16 cfgParam,
42472 +                                void *result);
42473 +void ar6000_bssInfo_event_rx(struct ar6_softc *ar, A_UINT8 *data, int len);
42474 +
42475 +void ar6000_dbglog_event(struct ar6_softc *ar, A_UINT32 dropped,
42476 +                         A_INT8 *buffer, A_UINT32 length);
42477 +
42478 +int ar6000_dbglog_get_debug_logs(struct ar6_softc *ar);
42479 +
42480 +void ar6000_indicate_tx_activity(void *devt, A_UINT8 trafficClass, A_BOOL Active);
42481 +
42482 +void ar6000_dset_open_req(void *devt,
42483 +                          A_UINT32 id,
42484 +                          A_UINT32 targ_handle,
42485 +                          A_UINT32 targ_reply_fn,
42486 +                          A_UINT32 targ_reply_arg);
42487 +void ar6000_dset_close(void *devt, A_UINT32 access_cookie);
42488 +void ar6000_dset_data_req(void *devt,
42489 +                          A_UINT32 access_cookie,
42490 +                          A_UINT32 offset,
42491 +                          A_UINT32 length,
42492 +                          A_UINT32 targ_buf,
42493 +                          A_UINT32 targ_reply_fn,
42494 +                          A_UINT32 targ_reply_arg);
42495 +
42496 +
42497 +
42498 +#ifdef __cplusplus
42499 +}
42500 +#endif
42501 +
42502 +#endif
42503 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h
42504 ===================================================================
42505 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
42506 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athdrv_linux.h      2008-12-11 22:46:49.000000000 +0100
42507 @@ -0,0 +1,993 @@
42508 +/*
42509 + * Copyright (c) 2004-2006 Atheros Communications Inc.
42510 + * All rights reserved.
42511 + *
42512 + *
42513 + *
42514 + *  This program is free software; you can redistribute it and/or modify
42515 + *  it under the terms of the GNU General Public License version 2 as
42516 + *  published by the Free Software Foundation;
42517 + *
42518 + *  Software distributed under the License is distributed on an "AS
42519 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
42520 + *  implied. See the License for the specific language governing
42521 + *  rights and limitations under the License.
42522 + *
42523 + *
42524 + *
42525 + */
42526 +
42527 +#ifndef _ATHDRV_LINUX_H
42528 +#define _ATHDRV_LINUX_H
42529 +
42530 +#ifdef __cplusplus
42531 +extern "C" {
42532 +#endif
42533 +
42534 +
42535 +/*
42536 + * There are two types of ioctl's here: Standard ioctls and
42537 + * eXtended ioctls.  All extended ioctls (XIOCTL) are multiplexed
42538 + * off of the single ioctl command, AR6000_IOCTL_EXTENDED.  The
42539 + * arguments for every XIOCTL starts with a 32-bit command word
42540 + * that is used to select which extended ioctl is in use.  After
42541 + * the command word are command-specific arguments.
42542 + */
42543 +
42544 +/* Linux standard Wireless Extensions, private ioctl interfaces */
42545 +#define IEEE80211_IOCTL_SETPARAM             (SIOCIWFIRSTPRIV+0)
42546 +#define IEEE80211_IOCTL_GETPARAM             (SIOCIWFIRSTPRIV+1)
42547 +#define IEEE80211_IOCTL_SETKEY               (SIOCIWFIRSTPRIV+2)
42548 +#define IEEE80211_IOCTL_SETWMMPARAMS         (SIOCIWFIRSTPRIV+3)
42549 +#define IEEE80211_IOCTL_DELKEY               (SIOCIWFIRSTPRIV+4)
42550 +#define IEEE80211_IOCTL_GETWMMPARAMS         (SIOCIWFIRSTPRIV+5)
42551 +#define IEEE80211_IOCTL_SETOPTIE             (SIOCIWFIRSTPRIV+6)
42552 +#define IEEE80211_IOCTL_SETMLME              (SIOCIWFIRSTPRIV+7)
42553 +//#define IEEE80211_IOCTL_GETOPTIE             (SIOCIWFIRSTPRIV+7)
42554 +#define IEEE80211_IOCTL_ADDPMKID             (SIOCIWFIRSTPRIV+8)
42555 +//#define IEEE80211_IOCTL_SETAUTHALG           (SIOCIWFIRSTPRIV+10)
42556 +#define IEEE80211_IOCTL_LASTONE              (SIOCIWFIRSTPRIV+9)
42557 +
42558 +
42559 +
42560 +/*                      ====WMI Ioctls====                                    */
42561 +/*
42562 + *
42563 + * Many ioctls simply provide WMI services to application code:
42564 + * an application makes such an ioctl call with a set of arguments
42565 + * that are packaged into the corresponding WMI message, and sent
42566 + * to the Target.
42567 + */
42568 +
42569 +#define AR6000_IOCTL_WMI_GETREV              (SIOCIWFIRSTPRIV+10)
42570 +/*
42571 + * arguments:
42572 + *   ar6000_version *revision
42573 + */
42574 +
42575 +#define AR6000_IOCTL_WMI_SETPWR              (SIOCIWFIRSTPRIV+11)
42576 +/*
42577 + * arguments:
42578 + *   WMI_POWER_MODE_CMD pwrModeCmd (see include/wmi.h)
42579 + * uses: WMI_SET_POWER_MODE_CMDID
42580 + */
42581 +
42582 +#define AR6000_IOCTL_WMI_SETSCAN             (SIOCIWFIRSTPRIV+12)
42583 +/*
42584 + * arguments:
42585 + *   WMI_SCAN_PARAMS_CMD scanParams (see include/wmi.h)
42586 + * uses: WMI_SET_SCAN_PARAMS_CMDID
42587 + */
42588 +
42589 +#define AR6000_IOCTL_WMI_SETLISTENINT        (SIOCIWFIRSTPRIV+13)
42590 +/*
42591 + * arguments:
42592 + *   UINT32 listenInterval
42593 + * uses: WMI_SET_LISTEN_INT_CMDID
42594 + */
42595 +
42596 +#define AR6000_IOCTL_WMI_SETBSSFILTER        (SIOCIWFIRSTPRIV+14)
42597 +/*
42598 + * arguments:
42599 + *   WMI_BSS_FILTER filter (see include/wmi.h)
42600 + * uses: WMI_SET_BSS_FILTER_CMDID
42601 + */
42602 +
42603 +#define AR6000_IOCTL_WMI_SET_CHANNELPARAMS   (SIOCIWFIRSTPRIV+16)
42604 +/*
42605 + * arguments:
42606 + *   WMI_CHANNEL_PARAMS_CMD chParams
42607 + * uses: WMI_SET_CHANNEL_PARAMS_CMDID
42608 + */
42609 +
42610 +#define AR6000_IOCTL_WMI_SET_PROBEDSSID      (SIOCIWFIRSTPRIV+17)
42611 +/*
42612 + * arguments:
42613 + *   WMI_PROBED_SSID_CMD probedSsids (see include/wmi.h)
42614 + * uses: WMI_SETPROBED_SSID_CMDID
42615 + */
42616 +
42617 +#define AR6000_IOCTL_WMI_SET_PMPARAMS        (SIOCIWFIRSTPRIV+18)
42618 +/*
42619 + * arguments:
42620 + *   WMI_POWER_PARAMS_CMD powerParams (see include/wmi.h)
42621 + * uses: WMI_SET_POWER_PARAMS_CMDID
42622 + */
42623 +
42624 +#define AR6000_IOCTL_WMI_SET_BADAP           (SIOCIWFIRSTPRIV+19)
42625 +/*
42626 + * arguments:
42627 + *   WMI_ADD_BAD_AP_CMD badAPs (see include/wmi.h)
42628 + * uses: WMI_ADD_BAD_AP_CMDID
42629 + */
42630 +
42631 +#define AR6000_IOCTL_WMI_GET_QOS_QUEUE       (SIOCIWFIRSTPRIV+20)
42632 +/*
42633 + * arguments:
42634 + *   ar6000_queuereq queueRequest (see below)
42635 + */
42636 +
42637 +#define AR6000_IOCTL_WMI_CREATE_QOS          (SIOCIWFIRSTPRIV+21)
42638 +/*
42639 + * arguments:
42640 + *   WMI_CREATE_PSTREAM createPstreamCmd (see include/wmi.h)
42641 + * uses: WMI_CREATE_PSTREAM_CMDID
42642 + */
42643 +
42644 +#define AR6000_IOCTL_WMI_DELETE_QOS          (SIOCIWFIRSTPRIV+22)
42645 +/*
42646 + * arguments:
42647 + *   WMI_DELETE_PSTREAM_CMD deletePstreamCmd (see include/wmi.h)
42648 + * uses: WMI_DELETE_PSTREAM_CMDID
42649 + */
42650 +
42651 +#define AR6000_IOCTL_WMI_SET_SNRTHRESHOLD   (SIOCIWFIRSTPRIV+23)
42652 +/*
42653 + * arguments:
42654 + *   WMI_SNR_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
42655 + * uses: WMI_SNR_THRESHOLD_PARAMS_CMDID
42656 + */
42657 +
42658 +#define AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK (SIOCIWFIRSTPRIV+24)
42659 +/*
42660 + * arguments:
42661 + *   WMI_TARGET_ERROR_REPORT_BITMASK errorReportBitMask (see include/wmi.h)
42662 + * uses: WMI_TARGET_ERROR_REPORT_BITMASK_CMDID
42663 + */
42664 +
42665 +#define AR6000_IOCTL_WMI_GET_TARGET_STATS    (SIOCIWFIRSTPRIV+25)
42666 +/*
42667 + * arguments:
42668 + *   TARGET_STATS *targetStats (see below)
42669 + * uses: WMI_GET_STATISTICS_CMDID
42670 + */
42671 +
42672 +#define AR6000_IOCTL_WMI_SET_ASSOC_INFO      (SIOCIWFIRSTPRIV+26)
42673 +/*
42674 + * arguments:
42675 + *   WMI_SET_ASSOC_INFO_CMD setAssocInfoCmd
42676 + * uses: WMI_SET_ASSOC_INFO_CMDID
42677 + */
42678 +
42679 +#define AR6000_IOCTL_WMI_SET_ACCESS_PARAMS   (SIOCIWFIRSTPRIV+27)
42680 +/*
42681 + * arguments:
42682 + *   WMI_SET_ACCESS_PARAMS_CMD setAccessParams (see include/wmi.h)
42683 + * uses: WMI_SET_ACCESS_PARAMS_CMDID
42684 + */
42685 +
42686 +#define AR6000_IOCTL_WMI_SET_BMISS_TIME      (SIOCIWFIRSTPRIV+28)
42687 +/*
42688 + * arguments:
42689 + *   UINT32 beaconMissTime
42690 + * uses: WMI_SET_BMISS_TIME_CMDID
42691 + */
42692 +
42693 +#define AR6000_IOCTL_WMI_SET_DISC_TIMEOUT    (SIOCIWFIRSTPRIV+29)
42694 +/*
42695 + * arguments:
42696 + *   WMI_DISC_TIMEOUT_CMD disconnectTimeoutCmd (see include/wmi.h)
42697 + * uses: WMI_SET_DISC_TIMEOUT_CMDID
42698 + */
42699 +
42700 +#define AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS    (SIOCIWFIRSTPRIV+30)
42701 +/*
42702 + * arguments:
42703 + *   WMI_IBSS_PM_CAPS_CMD ibssPowerMgmtCapsCmd
42704 + * uses: WMI_SET_IBSS_PM_CAPS_CMDID
42705 + */
42706 +
42707 +/*
42708 + * There is a very small space available for driver-private
42709 + * wireless ioctls.  In order to circumvent this limitation,
42710 + * we multiplex a bunch of ioctls (XIOCTLs) on top of a
42711 + * single AR6000_IOCTL_EXTENDED ioctl.
42712 + */
42713 +#define AR6000_IOCTL_EXTENDED                (SIOCIWFIRSTPRIV+31)
42714 +
42715 +
42716 +/*                         ====BMI Extended Ioctls====                        */
42717 +
42718 +#define AR6000_XIOCTL_BMI_DONE                                  1
42719 +/*
42720 + * arguments:
42721 + *   UINT32 cmd (AR6000_XIOCTL_BMI_DONE)
42722 + * uses: BMI_DONE
42723 + */
42724 +
42725 +#define AR6000_XIOCTL_BMI_READ_MEMORY                           2
42726 +/*
42727 + * arguments:
42728 + *   union {
42729 + *     struct {
42730 + *       UINT32 cmd (AR6000_XIOCTL_BMI_READ_MEMORY)
42731 + *       UINT32 address
42732 + *       UINT32 length
42733 + *     }
42734 + *     char results[length]
42735 + *   }
42736 + * uses: BMI_READ_MEMORY
42737 + */
42738 +
42739 +#define AR6000_XIOCTL_BMI_WRITE_MEMORY                          3
42740 +/*
42741 + * arguments:
42742 + *   UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_MEMORY)
42743 + *   UINT32 address
42744 + *   UINT32 length
42745 + *   char data[length]
42746 + * uses: BMI_WRITE_MEMORY
42747 + */
42748 +
42749 +#define AR6000_XIOCTL_BMI_EXECUTE                               4
42750 +/*
42751 + * arguments:
42752 + *   UINT32 cmd (AR6000_XIOCTL_BMI_EXECUTE)
42753 + *   UINT32 TargetAddress
42754 + *   UINT32 parameter
42755 + * uses: BMI_EXECUTE
42756 + */
42757 +
42758 +#define AR6000_XIOCTL_BMI_SET_APP_START                         5
42759 +/*
42760 + * arguments:
42761 + *   UINT32 cmd (AR6000_XIOCTL_BMI_SET_APP_START)
42762 + *   UINT32 TargetAddress
42763 + * uses: BMI_SET_APP_START
42764 + */
42765 +
42766 +#define AR6000_XIOCTL_BMI_READ_SOC_REGISTER                     6
42767 +/*
42768 + * arguments:
42769 + *   union {
42770 + *     struct {
42771 + *       UINT32 cmd (AR6000_XIOCTL_BMI_READ_SOC_REGISTER)
42772 + *       UINT32 TargetAddress, 32-bit aligned
42773 + *     }
42774 + *     UINT32 result
42775 + *   }
42776 + * uses: BMI_READ_SOC_REGISTER
42777 + */
42778 +
42779 +#define AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER                    7
42780 +/*
42781 + * arguments:
42782 + *     struct {
42783 + *       UINT32 cmd (AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER)
42784 + *       UINT32 TargetAddress, 32-bit aligned
42785 + *       UINT32 newValue
42786 + *     }
42787 + * uses: BMI_WRITE_SOC_REGISTER
42788 + */
42789 +
42790 +#define AR6000_XIOCTL_BMI_TEST                                  8
42791 +/*
42792 + * arguments:
42793 + *   UINT32 cmd (AR6000_XIOCTL_BMI_TEST)
42794 + *   UINT32 address
42795 + *   UINT32 length
42796 + *   UINT32 count
42797 + */
42798 +
42799 +
42800 +
42801 +/* Historical Host-side DataSet support */
42802 +#define AR6000_XIOCTL_UNUSED9                                   9
42803 +#define AR6000_XIOCTL_UNUSED10                                  10
42804 +#define AR6000_XIOCTL_UNUSED11                                  11
42805 +
42806 +/*                      ====Misc Extended Ioctls====                          */
42807 +
42808 +#define AR6000_XIOCTL_FORCE_TARGET_RESET                        12
42809 +/*
42810 + * arguments:
42811 + *   UINT32 cmd (AR6000_XIOCTL_FORCE_TARGET_RESET)
42812 + */
42813 +
42814 +
42815 +#ifdef HTC_RAW_INTERFACE
42816 +/* HTC Raw Interface Ioctls */
42817 +#define AR6000_XIOCTL_HTC_RAW_OPEN                              13
42818 +/*
42819 + * arguments:
42820 + *   UINT32 cmd (AR6000_XIOCTL_HTC_RAW_OPEN)
42821 + */
42822 +
42823 +#define AR6000_XIOCTL_HTC_RAW_CLOSE                             14
42824 +/*
42825 + * arguments:
42826 + *   UINT32 cmd (AR6000_XIOCTL_HTC_RAW_CLOSE)
42827 + */
42828 +
42829 +#define AR6000_XIOCTL_HTC_RAW_READ                              15
42830 +/*
42831 + * arguments:
42832 + *   union {
42833 + *     struct {
42834 + *       UINT32 cmd (AR6000_XIOCTL_HTC_RAW_READ)
42835 + *       UINT32 mailboxID
42836 + *       UINT32 length
42837 + *     }
42838 + *     results[length]
42839 + *   }
42840 + */
42841 +
42842 +#define AR6000_XIOCTL_HTC_RAW_WRITE                             16
42843 +/*
42844 + * arguments:
42845 + *   UINT32 cmd (AR6000_XIOCTL_HTC_RAW_WRITE)
42846 + *   UINT32 mailboxID
42847 + *   UINT32 length
42848 + *   char buffer[length]
42849 + */
42850 +#endif /* HTC_RAW_INTERFACE */
42851 +
42852 +#define AR6000_XIOCTL_CHECK_TARGET_READY                        17
42853 +/*
42854 + * arguments:
42855 + *   UINT32 cmd (AR6000_XIOCTL_CHECK_TARGET_READY)
42856 + */
42857 +
42858 +
42859 +
42860 +/*                ====GPIO (General Purpose I/O) Extended Ioctls====          */
42861 +
42862 +#define AR6000_XIOCTL_GPIO_OUTPUT_SET                           18
42863 +/*
42864 + * arguments:
42865 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_OUTPUT_SET)
42866 + *   ar6000_gpio_output_set_cmd_s (see below)
42867 + * uses: WMIX_GPIO_OUTPUT_SET_CMDID
42868 + */
42869 +
42870 +#define AR6000_XIOCTL_GPIO_INPUT_GET                            19
42871 +/*
42872 + * arguments:
42873 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_INPUT_GET)
42874 + * uses: WMIX_GPIO_INPUT_GET_CMDID
42875 + */
42876 +
42877 +#define AR6000_XIOCTL_GPIO_REGISTER_SET                         20
42878 +/*
42879 + * arguments:
42880 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_SET)
42881 + *   ar6000_gpio_register_cmd_s (see below)
42882 + * uses: WMIX_GPIO_REGISTER_SET_CMDID
42883 + */
42884 +
42885 +#define AR6000_XIOCTL_GPIO_REGISTER_GET                         21
42886 +/*
42887 + * arguments:
42888 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_REGISTER_GET)
42889 + *   ar6000_gpio_register_cmd_s (see below)
42890 + * uses: WMIX_GPIO_REGISTER_GET_CMDID
42891 + */
42892 +
42893 +#define AR6000_XIOCTL_GPIO_INTR_ACK                             22
42894 +/*
42895 + * arguments:
42896 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_ACK)
42897 + *   ar6000_cpio_intr_ack_cmd_s (see below)
42898 + * uses: WMIX_GPIO_INTR_ACK_CMDID
42899 + */
42900 +
42901 +#define AR6000_XIOCTL_GPIO_INTR_WAIT                            23
42902 +/*
42903 + * arguments:
42904 + *   UINT32 cmd (AR6000_XIOCTL_GPIO_INTR_WAIT)
42905 + */
42906 +
42907 +
42908 +
42909 +/*                    ====more wireless commands====                          */
42910 +
42911 +#define AR6000_XIOCTL_SET_ADHOC_BSSID                           24
42912 +/*
42913 + * arguments:
42914 + *   UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BSSID)
42915 + *   WMI_SET_ADHOC_BSSID_CMD setAdHocBssidCmd (see include/wmi.h)
42916 + */
42917 +
42918 +#define AR6000_XIOCTL_SET_OPT_MODE                              25
42919 +/*
42920 + * arguments:
42921 + *   UINT32 cmd (AR6000_XIOCTL_SET_OPT_MODE)
42922 + *   WMI_SET_OPT_MODE_CMD setOptModeCmd (see include/wmi.h)
42923 + * uses: WMI_SET_OPT_MODE_CMDID
42924 + */
42925 +
42926 +#define AR6000_XIOCTL_OPT_SEND_FRAME                            26
42927 +/*
42928 + * arguments:
42929 + *   UINT32 cmd (AR6000_XIOCTL_OPT_SEND_FRAME)
42930 + *   WMI_OPT_TX_FRAME_CMD optTxFrameCmd (see include/wmi.h)
42931 + * uses: WMI_OPT_TX_FRAME_CMDID
42932 + */
42933 +
42934 +#define AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL                   27
42935 +/*
42936 + * arguments:
42937 + *   UINT32 cmd (AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL)
42938 + *   WMI_BEACON_INT_CMD beaconIntCmd (see include/wmi.h)
42939 + * uses: WMI_SET_BEACON_INT_CMDID
42940 + */
42941 +
42942 +
42943 +#define IEEE80211_IOCTL_SETAUTHALG                              28
42944 +
42945 +
42946 +#define AR6000_XIOCTL_SET_VOICE_PKT_SIZE                        29
42947 +/*
42948 + * arguments:
42949 + *   UINT32 cmd (AR6000_XIOCTL_SET_VOICE_PKT_SIZE)
42950 + *   WMI_SET_VOICE_PKT_SIZE_CMD setVoicePktSizeCmd (see include/wmi.h)
42951 + * uses: WMI_SET_VOICE_PKT_SIZE_CMDID
42952 + */
42953 +
42954 +
42955 +#define AR6000_XIOCTL_SET_MAX_SP                                30
42956 +/*
42957 + * arguments:
42958 + *   UINT32 cmd (AR6000_XIOCTL_SET_MAX_SP)
42959 + *   WMI_SET_MAX_SP_LEN_CMD maxSPLen(see include/wmi.h)
42960 + * uses: WMI_SET_MAX_SP_LEN_CMDID
42961 + */
42962 +
42963 +#define AR6000_XIOCTL_WMI_GET_ROAM_TBL                          31
42964 +
42965 +#define AR6000_XIOCTL_WMI_SET_ROAM_CTRL                         32
42966 +
42967 +#define AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS                 33
42968 +
42969 +
42970 +/*
42971 + * arguments:
42972 + *   UINT32 cmd (AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS)
42973 + *   WMI_SET_POWERSAVE_TIMERS_CMD powerSaveTimers(see include/wmi.h)
42974 + *   WMI_SET_POWERSAVE_TIMERS_CMDID
42975 + */
42976 +
42977 +#define AR6000_XIOCTRL_WMI_GET_POWER_MODE                        34
42978 +/*
42979 + * arguments:
42980 + *   UINT32 cmd (AR6000_XIOCTRL_WMI_GET_POWER_MODE)
42981 + */
42982 +
42983 +#define AR6000_XIOCTRL_WMI_SET_WLAN_STATE                       35
42984 +typedef enum {
42985 +    WLAN_DISABLED,
42986 +    WLAN_ENABLED
42987 +} AR6000_WLAN_STATE;
42988 +/*
42989 + * arguments:
42990 + * enable/disable
42991 + */
42992 +
42993 +#define AR6000_XIOCTL_WMI_GET_ROAM_DATA                         36
42994 +
42995 +#define AR6000_XIOCTL_WMI_SETRETRYLIMITS                37
42996 +/*
42997 + * arguments:
42998 + *   WMI_SET_RETRY_LIMITS_CMD ibssSetRetryLimitsCmd
42999 + * uses: WMI_SET_RETRY_LIMITS_CMDID
43000 + */
43001 +
43002 +#ifdef CONFIG_HOST_TCMD_SUPPORT
43003 +/*       ====extended commands for radio test ====                          */
43004 +
43005 +#define AR6000_XIOCTL_TCMD_CONT_TX                      38
43006 +/*
43007 + * arguments:
43008 + *   UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_TX)
43009 + *   WMI_TCMD_CONT_TX_CMD contTxCmd (see include/wmi.h)
43010 + * uses: WMI_TCMD_CONT_TX_CMDID
43011 + */
43012 +
43013 +#define AR6000_XIOCTL_TCMD_CONT_RX                      39
43014 +/*
43015 + * arguments:
43016 + *   UINT32 cmd (AR6000_XIOCTL_TCMD_CONT_RX)
43017 + *   WMI_TCMD_CONT_RX_CMD rxCmd (see include/wmi.h)
43018 + * uses: WMI_TCMD_CONT_RX_CMDID
43019 + */
43020 +
43021 +#define AR6000_XIOCTL_TCMD_PM                           40
43022 +/*
43023 + * arguments:
43024 + *   UINT32 cmd (AR6000_XIOCTL_TCMD_PM)
43025 + *   WMI_TCMD_PM_CMD pmCmd (see include/wmi.h)
43026 + * uses: WMI_TCMD_PM_CMDID
43027 + */
43028 +
43029 +#endif /* CONFIG_HOST_TCMD_SUPPORT */
43030 +
43031 +#define AR6000_XIOCTL_WMI_STARTSCAN                     41
43032 +/*
43033 + * arguments:
43034 + *   UINT32 cmd (AR6000_XIOCTL_WMI_STARTSCAN)
43035 + *   UINT8  scanType
43036 + *   UINT8  scanConnected
43037 + *   A_BOOL forceFgScan
43038 + * uses: WMI_START_SCAN_CMDID
43039 + */
43040 +
43041 +#define AR6000_XIOCTL_WMI_SETFIXRATES                   42
43042 +
43043 +#define AR6000_XIOCTL_WMI_GETFIXRATES                   43
43044 +
43045 +
43046 +#define AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD             44
43047 +/*
43048 + * arguments:
43049 + *   WMI_RSSI_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
43050 + * uses: WMI_RSSI_THRESHOLD_PARAMS_CMDID
43051 + */
43052 +
43053 +#define AR6000_XIOCTL_WMI_CLR_RSSISNR                   45
43054 +/*
43055 + * arguments:
43056 + *   WMI_CLR_RSSISNR_CMD thresholdParams (see include/wmi.h)
43057 + * uses: WMI_CLR_RSSISNR_CMDID
43058 + */
43059 +
43060 +#define AR6000_XIOCTL_WMI_SET_LQTHRESHOLD               46
43061 +/*
43062 + * arguments:
43063 + *   WMI_LQ_THRESHOLD_PARAMS_CMD thresholdParams (see include/wmi.h)
43064 + * uses: WMI_LQ_THRESHOLD_PARAMS_CMDID
43065 + */
43066 +
43067 +#define AR6000_XIOCTL_WMI_SET_RTS                        47
43068 +/*
43069 + * arguments:
43070 + *   WMI_SET_RTS_MODE_CMD (see include/wmi.h)
43071 + * uses: WMI_SET_RTS_MODE_CMDID
43072 + */
43073 +
43074 +#define AR6000_XIOCTL_WMI_SET_LPREAMBLE                 48
43075 +
43076 +#define AR6000_XIOCTL_WMI_SET_AUTHMODE                  49
43077 +/*
43078 + * arguments:
43079 + *   UINT32 cmd (AR6000_XIOCTL_WMI_SET_AUTHMODE)
43080 + *   UINT8  mode
43081 + * uses: WMI_SET_RECONNECT_AUTH_MODE_CMDID
43082 + */
43083 +
43084 +#define AR6000_XIOCTL_WMI_SET_REASSOCMODE               50
43085 +
43086 +/*
43087 + * arguments:
43088 + *   UINT32 cmd (AR6000_XIOCTL_WMI_SET_WMM)
43089 + *   UINT8  mode
43090 + * uses: WMI_SET_WMM_CMDID
43091 + */
43092 +#define AR6000_XIOCTL_WMI_SET_WMM                       51
43093 +
43094 +/*
43095 + * arguments:
43096 + * UINT32 cmd (AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS)
43097 + * UINT32 frequency
43098 + * UINT8  threshold
43099 + */
43100 +#define AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS  52
43101 +
43102 +/*
43103 + * arguments:
43104 + * UINT32 cmd (AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP)
43105 + * UINT32 cookie
43106 + */
43107 +#define AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP         53
43108 +
43109 +/*
43110 + * arguments:
43111 + *   UINT32 cmd (AR6000_XIOCTL_WMI_GET_RD)
43112 + *   UINT32 regDomain
43113 + */
43114 +#define AR6000_XIOCTL_WMI_GET_RD                        54
43115 +
43116 +#define AR6000_XIOCTL_DIAG_READ                         55
43117 +
43118 +#define AR6000_XIOCTL_DIAG_WRITE                        56
43119 +
43120 +/*
43121 + * arguments cmd (AR6000_XIOCTL_SET_TXOP)
43122 + * WMI_TXOP_CFG  txopEnable
43123 + */
43124 +#define AR6000_XIOCTL_WMI_SET_TXOP                      57
43125 +
43126 +#ifdef USER_KEYS
43127 +/*
43128 + * arguments:
43129 + * UINT32 cmd (AR6000_XIOCTL_USER_SETKEYS)
43130 + * UINT32 keyOpCtrl
43131 + * uses AR6000_USER_SETKEYS_INFO
43132 + */
43133 +#define AR6000_XIOCTL_USER_SETKEYS                      58
43134 +#endif /* USER_KEYS */
43135 +
43136 +#define AR6000_XIOCTL_WMI_SET_KEEPALIVE                 59
43137 +/*
43138 + * arguments:
43139 + *   UINT8 cmd (AR6000_XIOCTL_WMI_SET_KEEPALIVE)
43140 + *   UINT8 keepaliveInterval
43141 + * uses: WMI_SET_KEEPALIVE_CMDID
43142 + */
43143 +
43144 +#define AR6000_XIOCTL_WMI_GET_KEEPALIVE                 60
43145 +/*
43146 + * arguments:
43147 + *   UINT8 cmd (AR6000_XIOCTL_WMI_GET_KEEPALIVE)
43148 + *   UINT8 keepaliveInterval
43149 + *   A_BOOL configured
43150 + * uses: WMI_GET_KEEPALIVE_CMDID
43151 + */
43152 +
43153 +/*               ====ROM Patching Extended Ioctls====                       */
43154 +
43155 +#define AR6000_XIOCTL_BMI_ROMPATCH_INSTALL              61
43156 +/*
43157 + * arguments:
43158 + *     union {
43159 + *       struct {
43160 + *         UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_INSTALL)
43161 + *         UINT32 ROM Address
43162 + *         UINT32 RAM Address
43163 + *         UINT32 number of bytes
43164 + *         UINT32 activate? (0 or 1)
43165 + *       }
43166 + *       A_UINT32 resulting rompatch ID
43167 + *     }
43168 + * uses: BMI_ROMPATCH_INSTALL
43169 + */
43170 +
43171 +#define AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL            62
43172 +/*
43173 + * arguments:
43174 + *     struct {
43175 + *       UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL)
43176 + *       UINT32 rompatch ID
43177 + *     }
43178 + * uses: BMI_ROMPATCH_UNINSTALL
43179 + */
43180 +
43181 +#define AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE             63
43182 +/*
43183 + * arguments:
43184 + *     struct {
43185 + *       UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE)
43186 + *       UINT32 rompatch count
43187 + *       UINT32 rompatch IDs[rompatch count]
43188 + *     }
43189 + * uses: BMI_ROMPATCH_ACTIVATE
43190 + */
43191 +
43192 +#define AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE           64
43193 +/*
43194 + * arguments:
43195 + *     struct {
43196 + *       UINT32 cmd (AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE)
43197 + *       UINT32 rompatch count
43198 + *       UINT32 rompatch IDs[rompatch count]
43199 + *     }
43200 + * uses: BMI_ROMPATCH_DEACTIVATE
43201 + */
43202 +
43203 +#define AR6000_XIOCTL_WMI_SET_APPIE             65
43204 +/*
43205 + * arguments:
43206 + *      struct {
43207 + *          UINT32 cmd (AR6000_XIOCTL_WMI_SET_APPIE)
43208 + *          UINT32  app_frmtype;
43209 + *          UINT32  app_buflen;
43210 + *          UINT8   app_buf[];
43211 + *      }
43212 + */
43213 +#define AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER    66
43214 +/*
43215 + * arguments:
43216 + *      A_UINT32 filter_type;
43217 + */
43218 +
43219 +#define AR6000_XIOCTL_DBGLOG_CFG_MODULE             67
43220 +
43221 +#define AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS         68
43222 +
43223 +#define AR6000_XIOCTL_WMI_SET_WSC_STATUS               70
43224 +/*
43225 + * arguments:
43226 + *      A_UINT32 wsc_status;
43227 + *            (WSC_REG_INACTIVE or WSC_REG_ACTIVE)
43228 + */
43229 +
43230 +/*
43231 + * arguments:
43232 + *      struct {
43233 + *          A_UINT8 streamType;
43234 + *          A_UINT8 status;
43235 + *      }
43236 + * uses: WMI_SET_BT_STATUS_CMDID
43237 + */
43238 +#define AR6000_XIOCTL_WMI_SET_BT_STATUS             71
43239 +
43240 +/*
43241 + * arguments:
43242 + *      struct {
43243 + *           A_UINT8 paramType;
43244 + *           union {
43245 + *               A_UINT8 noSCOPkts;
43246 + *               BT_PARAMS_A2DP a2dpParams;
43247 + *               BT_COEX_REGS regs;
43248 + *           };
43249 + *      }
43250 + * uses: WMI_SET_BT_PARAM_CMDID
43251 + */
43252 +#define AR6000_XIOCTL_WMI_SET_BT_PARAMS             72
43253 +
43254 +#define AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE       73
43255 +#define AR6000_XIOCTL_WMI_SET_WOW_MODE              74
43256 +#define AR6000_XIOCTL_WMI_GET_WOW_LIST              75
43257 +#define AR6000_XIOCTL_WMI_ADD_WOW_PATTERN           76
43258 +#define AR6000_XIOCTL_WMI_DEL_WOW_PATTERN           77
43259 +
43260 +
43261 +
43262 +#define AR6000_XIOCTL_TARGET_INFO                   78
43263 +/*
43264 + * arguments:
43265 + *   UINT32 cmd (AR6000_XIOCTL_TARGET_INFO)
43266 + *   A_UINT32 TargetVersion (returned)
43267 + *   A_UINT32 TargetType    (returned)
43268 + * (See also bmi_msg.h target_ver and target_type)
43269 + */
43270 +
43271 +#define AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE         79
43272 +/*
43273 + * arguments:
43274 + *      none
43275 + */
43276 +
43277 +#define AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE       80
43278 +/*
43279 + * This ioctl is used to emulate traffic activity
43280 + * timeouts.  Activity/inactivity will trigger the driver
43281 + * to re-balance credits.
43282 + *
43283 + * arguments:
43284 + *      ar6000_traffic_activity_change
43285 + */
43286 +
43287 +#define AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS    81
43288 +/*
43289 + * This ioctl is used to set the connect control flags
43290 + *
43291 + * arguments:
43292 + *      A_UINT32 connectCtrlFlags
43293 + */
43294 +
43295 +#define AR6000_XIOCTL_WMI_SET_AKMP_PARAMS              82
43296 +/*
43297 + * This IOCTL sets any Authentication,Key Management and Protection
43298 + * related parameters. This is used along with the information set in
43299 + * Connect Command.
43300 + * Currently this enables Multiple PMKIDs to an AP.
43301 + *
43302 + * arguments:
43303 + *      struct {
43304 + *          A_UINT32    akmpInfo;
43305 + *      }
43306 + * uses: WMI_SET_AKMP_PARAMS_CMD
43307 + */
43308 +
43309 +#define AR6000_XIOCTL_WMI_GET_PMKID_LIST            83
43310 +
43311 +#define AR6000_XIOCTL_WMI_SET_PMKID_LIST            84
43312 +/*
43313 + * This IOCTL is used to set a list of PMKIDs. This list of
43314 + * PMKIDs is used in the [Re]AssocReq Frame. This list is used
43315 + * only if the MultiPMKID option is enabled via the
43316 + * AR6000_XIOCTL_WMI_SET_AKMP_PARAMS  IOCTL.
43317 + *
43318 + * arguments:
43319 + *      struct {
43320 + *          A_UINT32    numPMKID;
43321 + *          WMI_PMKID   pmkidList[WMI_MAX_PMKID_CACHE];
43322 + *      }
43323 + * uses: WMI_SET_PMKIDLIST_CMD
43324 + */
43325 +
43326 +/* Historical DSETPATCH support for INI patches */
43327 +#define AR6000_XIOCTL_UNUSED90                      90
43328 +
43329 +
43330 +
43331 +/* used by AR6000_IOCTL_WMI_GETREV */
43332 +struct ar6000_version {
43333 +    A_UINT32        host_ver;
43334 +    A_UINT32        target_ver;
43335 +};
43336 +
43337 +/* used by AR6000_IOCTL_WMI_GET_QOS_QUEUE */
43338 +struct ar6000_queuereq {
43339 +    A_UINT8         trafficClass;
43340 +    A_UINT16        activeTsids;
43341 +};
43342 +
43343 +/* used by AR6000_IOCTL_WMI_GET_TARGET_STATS */
43344 +typedef struct targetStats_t {
43345 +    A_UINT64    tx_packets;
43346 +    A_UINT64    tx_bytes;
43347 +    A_UINT64    tx_unicast_pkts;
43348 +    A_UINT64    tx_unicast_bytes;
43349 +    A_UINT64    tx_multicast_pkts;
43350 +    A_UINT64    tx_multicast_bytes;
43351 +    A_UINT64    tx_broadcast_pkts;
43352 +    A_UINT64    tx_broadcast_bytes;
43353 +    A_UINT64    tx_rts_success_cnt;
43354 +    A_UINT64    tx_packet_per_ac[4];
43355 +
43356 +    A_UINT64    tx_errors;
43357 +    A_UINT64    tx_failed_cnt;
43358 +    A_UINT64    tx_retry_cnt;
43359 +    A_UINT64    tx_rts_fail_cnt;
43360 +    A_INT32     tx_unicast_rate;
43361 +    A_UINT64    rx_packets;
43362 +    A_UINT64    rx_bytes;
43363 +    A_UINT64    rx_unicast_pkts;
43364 +    A_UINT64    rx_unicast_bytes;
43365 +    A_UINT64    rx_multicast_pkts;
43366 +    A_UINT64    rx_multicast_bytes;
43367 +    A_UINT64    rx_broadcast_pkts;
43368 +    A_UINT64    rx_broadcast_bytes;
43369 +    A_UINT64    rx_fragment_pkt;
43370 +
43371 +    A_UINT64    rx_errors;
43372 +    A_UINT64    rx_crcerr;
43373 +    A_UINT64    rx_key_cache_miss;
43374 +    A_UINT64    rx_decrypt_err;
43375 +    A_UINT64    rx_duplicate_frames;
43376 +    A_INT32     rx_unicast_rate;
43377 +
43378 +    A_UINT64    tkip_local_mic_failure;
43379 +    A_UINT64    tkip_counter_measures_invoked;
43380 +    A_UINT64    tkip_replays;
43381 +    A_UINT64    tkip_format_errors;
43382 +    A_UINT64    ccmp_format_errors;
43383 +    A_UINT64    ccmp_replays;
43384 +
43385 +    A_UINT64    power_save_failure_cnt;
43386 +    A_INT16     noise_floor_calibation;
43387 +
43388 +    A_UINT64    cs_bmiss_cnt;
43389 +    A_UINT64    cs_lowRssi_cnt;
43390 +    A_UINT64    cs_connect_cnt;
43391 +    A_UINT64    cs_disconnect_cnt;
43392 +    A_UINT8     cs_aveBeacon_snr;
43393 +    A_INT16     cs_aveBeacon_rssi;
43394 +    A_UINT8     cs_lastRoam_msec;
43395 +    A_UINT8     cs_snr;
43396 +    A_INT16     cs_rssi;
43397 +
43398 +    A_UINT32    lq_val;
43399 +
43400 +    A_UINT32    wow_num_pkts_dropped;
43401 +    A_UINT8     wow_num_host_pkt_wakeups;
43402 +    A_UINT8     wow_num_host_event_wakeups;
43403 +    A_UINT16    wow_num_events_discarded;
43404 +
43405 +}TARGET_STATS;
43406 +
43407 +typedef struct targetStats_cmd_t {
43408 +    TARGET_STATS targetStats;
43409 +    int clearStats;
43410 +} TARGET_STATS_CMD;
43411 +
43412 +/* used by AR6000_XIOCTL_USER_SETKEYS */
43413 +
43414 +/*
43415 + * Setting this bit to 1 doesnot initialize the RSC on the firmware
43416 + */
43417 +#define AR6000_XIOCTL_USER_SETKEYS_RSC_CTRL    1
43418 +#define AR6000_USER_SETKEYS_RSC_UNCHANGED     0x00000002
43419 +
43420 +typedef struct {
43421 +    A_UINT32  keyOpCtrl;  /* Bit Map of Key Mgmt Ctrl Flags */
43422 +} AR6000_USER_SETKEYS_INFO;
43423 +
43424 +
43425 +/* used by AR6000_XIOCTL_GPIO_OUTPUT_SET */
43426 +struct ar6000_gpio_output_set_cmd_s {
43427 +    A_UINT32 set_mask;
43428 +    A_UINT32 clear_mask;
43429 +    A_UINT32 enable_mask;
43430 +    A_UINT32 disable_mask;
43431 +};
43432 +
43433 +/*
43434 + * used by AR6000_XIOCTL_GPIO_REGISTER_GET and AR6000_XIOCTL_GPIO_REGISTER_SET
43435 + */
43436 +struct ar6000_gpio_register_cmd_s {
43437 +    A_UINT32 gpioreg_id;
43438 +    A_UINT32 value;
43439 +};
43440 +
43441 +/* used by AR6000_XIOCTL_GPIO_INTR_ACK */
43442 +struct ar6000_gpio_intr_ack_cmd_s {
43443 +    A_UINT32 ack_mask;
43444 +};
43445 +
43446 +/* used by AR6000_XIOCTL_GPIO_INTR_WAIT */
43447 +struct ar6000_gpio_intr_wait_cmd_s {
43448 +    A_UINT32 intr_mask;
43449 +    A_UINT32 input_values;
43450 +};
43451 +
43452 +/* used by the AR6000_XIOCTL_DBGLOG_CFG_MODULE */
43453 +typedef struct ar6000_dbglog_module_config_s {
43454 +    A_UINT32 valid;
43455 +    A_UINT16 mmask;
43456 +    A_UINT16 tsr;
43457 +    A_BOOL   rep;
43458 +    A_UINT16 size;
43459 +} DBGLOG_MODULE_CONFIG;
43460 +
43461 +typedef struct user_rssi_thold_t {
43462 +    A_INT16     tag;
43463 +    A_INT16     rssi;
43464 +} USER_RSSI_THOLD;
43465 +
43466 +typedef struct user_rssi_params_t {
43467 +    A_UINT8            weight;
43468 +    A_UINT32           pollTime;
43469 +    USER_RSSI_THOLD    tholds[12];
43470 +} USER_RSSI_PARAMS;
43471 +
43472 +/*
43473 + * Host driver may have some config parameters. Typically, these
43474 + * config params are one time config parameters. These could
43475 + * correspond to any of the underlying modules. Host driver exposes
43476 + * an api for the underlying modules to get this config.
43477 + */
43478 +#define AR6000_DRIVER_CFG_BASE                  0x8000
43479 +
43480 +/* Should driver perform wlan node caching? */
43481 +#define AR6000_DRIVER_CFG_GET_WLANNODECACHING   0x8001
43482 +/*Should we log raw WMI msgs */
43483 +#define AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS      0x8002
43484 +
43485 +/* used by AR6000_XIOCTL_DIAG_READ & AR6000_XIOCTL_DIAG_WRITE */
43486 +struct ar6000_diag_window_cmd_s {
43487 +    unsigned int addr;
43488 +    unsigned int value;
43489 +};
43490 +
43491 +
43492 +struct ar6000_traffic_activity_change {
43493 +    A_UINT32    StreamID;   /* stream ID to indicate activity change */
43494 +    A_UINT32    Active;     /* active (1) or inactive (0) */
43495 +};
43496 +
43497 +#ifdef __cplusplus
43498 +}
43499 +#endif
43500 +#endif
43501 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h
43502 ===================================================================
43503 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
43504 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/athtypes_linux.h    2008-12-11 22:46:49.000000000 +0100
43505 @@ -0,0 +1,47 @@
43506 +/*
43507 + * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/athtypes_linux.h#1 $
43508 + *
43509 + * This file contains the definitions of the basic atheros data types.
43510 + * It is used to map the data types in atheros files to a platform specific
43511 + * type.
43512 + *
43513 + * Copyright 2003-2005 Atheros Communications, Inc.,  All Rights Reserved.
43514 + *
43515 + *
43516 + *  This program is free software; you can redistribute it and/or modify
43517 + *  it under the terms of the GNU General Public License version 2 as
43518 + *  published by the Free Software Foundation;
43519 + *
43520 + *  Software distributed under the License is distributed on an "AS
43521 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
43522 + *  implied. See the License for the specific language governing
43523 + *  rights and limitations under the License.
43524 + *
43525 + *
43526 + *
43527 + */
43528 +
43529 +#ifndef _ATHTYPES_LINUX_H_
43530 +#define _ATHTYPES_LINUX_H_
43531 +
43532 +#ifdef __KERNEL__
43533 +#include <linux/types.h>
43534 +#endif
43535 +
43536 +typedef int8_t      A_INT8;
43537 +typedef int16_t     A_INT16;
43538 +typedef int32_t     A_INT32;
43539 +typedef int64_t     A_INT64;
43540 +
43541 +typedef u_int8_t     A_UINT8;
43542 +typedef u_int16_t    A_UINT16;
43543 +typedef u_int32_t    A_UINT32;
43544 +typedef u_int64_t    A_UINT64;
43545 +
43546 +typedef int             A_BOOL;
43547 +typedef char            A_CHAR;
43548 +typedef unsigned char   A_UCHAR;
43549 +typedef unsigned long   A_ATH_TIMER;
43550 +
43551 +
43552 +#endif /* _ATHTYPES_LINUX_H_ */
43553 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h
43554 ===================================================================
43555 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
43556 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/config_linux.h      2008-12-11 22:46:49.000000000 +0100
43557 @@ -0,0 +1,44 @@
43558 +/*
43559 + * Copyright (c) 2004-2007 Atheros Communications Inc.
43560 + * All rights reserved.
43561 + *
43562 + *
43563 + *  This program is free software; you can redistribute it and/or modify
43564 + *  it under the terms of the GNU General Public License version 2 as
43565 + *  published by the Free Software Foundation;
43566 + *
43567 + *  Software distributed under the License is distributed on an "AS
43568 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
43569 + *  implied. See the License for the specific language governing
43570 + *  rights and limitations under the License.
43571 + *
43572 + *
43573 + *
43574 + */
43575 +
43576 +#ifndef _CONFIG_LINUX_H_
43577 +#define _CONFIG_LINUX_H_
43578 +
43579 +#ifdef __cplusplus
43580 +extern "C" {
43581 +#endif
43582 +
43583 +/*
43584 + * Host-side GPIO support is optional.
43585 + * If run-time access to GPIO pins is not required, then
43586 + * this should be changed to #undef.
43587 + */
43588 +#define CONFIG_HOST_GPIO_SUPPORT
43589 +
43590 +/*
43591 + * Host side Test Command support
43592 + */
43593 +#define CONFIG_HOST_TCMD_SUPPORT
43594 +
43595 +#define USE_4BYTE_REGISTER_ACCESS
43596 +
43597 +#ifdef __cplusplus
43598 +}
43599 +#endif
43600 +
43601 +#endif
43602 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h
43603 ===================================================================
43604 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
43605 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/debug_linux.h       2008-12-11 22:46:49.000000000 +0100
43606 @@ -0,0 +1,86 @@
43607 +/*
43608 + * Copyright (c) 2004-2006 Atheros Communications Inc.
43609 + * All rights reserved.
43610 + *
43611 + *
43612 + *  This program is free software; you can redistribute it and/or modify
43613 + *  it under the terms of the GNU General Public License version 2 as
43614 + *  published by the Free Software Foundation;
43615 + *
43616 + *  Software distributed under the License is distributed on an "AS
43617 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
43618 + *  implied. See the License for the specific language governing
43619 + *  rights and limitations under the License.
43620 + *
43621 + *
43622 + *
43623 + */
43624 +
43625 +#ifndef _DEBUG_LINUX_H_
43626 +#define _DEBUG_LINUX_H_
43627 +
43628 +#define DBG_DEFAULTS   (DBG_ERROR|DBG_WARNING)
43629 +
43630 +extern A_UINT32 g_dbg_flags;
43631 +
43632 +#define DBGFMT  "%s() : "
43633 +#define DBGARG  __func__
43634 +#define DBGFN  A_PRINTF
43635 +
43636 +/* ------- Debug related stuff ------- */
43637 +enum {
43638 +    ATH_DEBUG_SEND = 0x0001,
43639 +    ATH_DEBUG_RECV = 0x0002,
43640 +    ATH_DEBUG_SYNC = 0x0004,
43641 +    ATH_DEBUG_DUMP = 0x0008,
43642 +    ATH_DEBUG_IRQ  = 0x0010,
43643 +    ATH_DEBUG_TRC  = 0x0020,
43644 +    ATH_DEBUG_WARN = 0x0040,
43645 +    ATH_DEBUG_ERR  = 0x0080,
43646 +    ATH_LOG_INF           = 0x0100,
43647 +    ATH_DEBUG_BMI  = 0x0110,
43648 +    ATH_DEBUG_WMI  = 0x0120,
43649 +    ATH_DEBUG_HIF  = 0x0140,
43650 +    ATH_DEBUG_HTC  = 0x0180,
43651 +    ATH_DEBUG_WLAN = 0x1000,
43652 +    ATH_LOG_ERR           = 0x1010,
43653 +    ATH_DEBUG_ANY  = 0xFFFF,
43654 +};
43655 +
43656 +#ifdef DEBUG
43657 +
43658 +#define A_DPRINTF(f, a) \
43659 +       if(g_dbg_flags & (f)) \
43660 +       {       \
43661 +               DBGFN a ; \
43662 +       }
43663 +
43664 +
43665 +// TODO FIX usage of A_PRINTF!
43666 +#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl))
43667 +#define AR_DEBUG_PRINTBUF(buffer, length, desc) do {   \
43668 +    if (debughtc & ATH_DEBUG_DUMP) {             \
43669 +        DebugDumpBytes(buffer, length,desc);               \
43670 +    }                                            \
43671 +} while(0)
43672 +#define PRINTX_ARG(arg...) arg
43673 +#define AR_DEBUG_PRINTF(flags, args) do {        \
43674 +    if (debughtc & (flags)) {                    \
43675 +        A_PRINTF(KERN_ALERT PRINTX_ARG args);    \
43676 +    }                                            \
43677 +} while (0)
43678 +#define AR_DEBUG_ASSERT(test) do {               \
43679 +    if (!(test)) {                               \
43680 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test));         \
43681 +    }                                            \
43682 +} while(0)
43683 +extern int debughtc;
43684 +#else
43685 +#define AR_DEBUG_PRINTF(flags, args)
43686 +#define AR_DEBUG_PRINTBUF(buffer, length, desc)
43687 +#define AR_DEBUG_ASSERT(test)
43688 +#define AR_DEBUG_LVL_CHECK(lvl) 0
43689 +#define A_DPRINTF(f, a)
43690 +#endif
43691 +
43692 +#endif /* _DEBUG_LINUX_H_ */
43693 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c
43694 ===================================================================
43695 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
43696 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/ioctl.c     2008-12-11 22:46:49.000000000 +0100
43697 @@ -0,0 +1,2540 @@
43698 +/*
43699 + *
43700 + * Copyright (c) 2004-2007 Atheros Communications Inc.
43701 + * All rights reserved.
43702 + *
43703 + *
43704 + *  This program is free software; you can redistribute it and/or modify
43705 + *  it under the terms of the GNU General Public License version 2 as
43706 + *  published by the Free Software Foundation;
43707 + *
43708 + *  Software distributed under the License is distributed on an "AS
43709 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
43710 + *  implied. See the License for the specific language governing
43711 + *  rights and limitations under the License.
43712 + *
43713 + *
43714 + *
43715 + */
43716 +
43717 +#include "ar6000_drv.h"
43718 +
43719 +static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
43720 +static A_UINT8 null_mac[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
43721 +extern USER_RSSI_THOLD rssi_map[12];
43722 +extern unsigned int wmitimeout;
43723 +extern A_WAITQUEUE_HEAD arEvent;
43724 +extern int tspecCompliance;
43725 +extern int bmienable;
43726 +extern int bypasswmi;
43727 +
43728 +static int
43729 +ar6000_ioctl_get_roam_tbl(struct net_device *dev, struct ifreq *rq)
43730 +{
43731 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43732 +
43733 +    if (ar->arWmiReady == FALSE) {
43734 +        return -EIO;
43735 +    }
43736 +
43737 +    if(wmi_get_roam_tbl_cmd(ar->arWmi) != A_OK) {
43738 +        return -EIO;
43739 +    }
43740 +
43741 +    return 0;
43742 +}
43743 +
43744 +static int
43745 +ar6000_ioctl_get_roam_data(struct net_device *dev, struct ifreq *rq)
43746 +{
43747 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43748 +
43749 +    if (ar->arWmiReady == FALSE) {
43750 +        return -EIO;
43751 +    }
43752 +
43753 +
43754 +    /* currently assume only roam times are required */
43755 +    if(wmi_get_roam_data_cmd(ar->arWmi, ROAM_DATA_TIME) != A_OK) {
43756 +        return -EIO;
43757 +    }
43758 +
43759 +
43760 +    return 0;
43761 +}
43762 +
43763 +static int
43764 +ar6000_ioctl_set_roam_ctrl(struct net_device *dev, char *userdata)
43765 +{
43766 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43767 +    WMI_SET_ROAM_CTRL_CMD cmd;
43768 +    A_UINT8 size = sizeof(cmd);
43769 +
43770 +    if (ar->arWmiReady == FALSE) {
43771 +        return -EIO;
43772 +    }
43773 +
43774 +
43775 +    if (copy_from_user(&cmd, userdata, size)) {
43776 +        return -EFAULT;
43777 +    }
43778 +
43779 +    if (cmd.roamCtrlType == WMI_SET_HOST_BIAS) {
43780 +        if (cmd.info.bssBiasInfo.numBss > 1) {
43781 +            size += (cmd.info.bssBiasInfo.numBss - 1) * sizeof(WMI_BSS_BIAS);
43782 +        }
43783 +    }
43784 +
43785 +    if (copy_from_user(&cmd, userdata, size)) {
43786 +        return -EFAULT;
43787 +    }
43788 +
43789 +    if(wmi_set_roam_ctrl_cmd(ar->arWmi, &cmd, size) != A_OK) {
43790 +        return -EIO;
43791 +    }
43792 +
43793 +    return 0;
43794 +}
43795 +
43796 +static int
43797 +ar6000_ioctl_set_powersave_timers(struct net_device *dev, char *userdata)
43798 +{
43799 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43800 +    WMI_POWERSAVE_TIMERS_POLICY_CMD cmd;
43801 +    A_UINT8 size = sizeof(cmd);
43802 +
43803 +    if (ar->arWmiReady == FALSE) {
43804 +        return -EIO;
43805 +    }
43806 +
43807 +    if (copy_from_user(&cmd, userdata, size)) {
43808 +        return -EFAULT;
43809 +    }
43810 +
43811 +    if (copy_from_user(&cmd, userdata, size)) {
43812 +        return -EFAULT;
43813 +    }
43814 +
43815 +    if(wmi_set_powersave_timers_cmd(ar->arWmi, &cmd, size) != A_OK) {
43816 +        return -EIO;
43817 +    }
43818 +
43819 +    return 0;
43820 +}
43821 +
43822 +static int
43823 +ar6000_ioctl_set_wmm(struct net_device *dev, struct ifreq *rq)
43824 +{
43825 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43826 +    WMI_SET_WMM_CMD cmd;
43827 +    A_STATUS ret;
43828 +
43829 +    if ((dev->flags & IFF_UP) != IFF_UP) {
43830 +        return -EIO;
43831 +    }
43832 +    if (ar->arWmiReady == FALSE) {
43833 +        return -EIO;
43834 +    }
43835 +
43836 +    if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1),
43837 +                                sizeof(cmd)))
43838 +    {
43839 +        return -EFAULT;
43840 +    }
43841 +
43842 +    if (cmd.status == WMI_WMM_ENABLED) {
43843 +        ar->arWmmEnabled = TRUE;
43844 +    } else {
43845 +        ar->arWmmEnabled = FALSE;
43846 +    }
43847 +
43848 +    ret = wmi_set_wmm_cmd(ar->arWmi, cmd.status);
43849 +
43850 +    switch (ret) {
43851 +        case A_OK:
43852 +            return 0;
43853 +        case A_EBUSY :
43854 +            return -EBUSY;
43855 +        case A_NO_MEMORY:
43856 +            return -ENOMEM;
43857 +        case A_EINVAL:
43858 +        default:
43859 +            return -EFAULT;
43860 +    }
43861 +}
43862 +
43863 +static int
43864 +ar6000_ioctl_set_txop(struct net_device *dev, struct ifreq *rq)
43865 +{
43866 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43867 +    WMI_SET_WMM_TXOP_CMD cmd;
43868 +    A_STATUS ret;
43869 +
43870 +    if ((dev->flags & IFF_UP) != IFF_UP) {
43871 +        return -EIO;
43872 +    }
43873 +    if (ar->arWmiReady == FALSE) {
43874 +        return -EIO;
43875 +    }
43876 +
43877 +    if (copy_from_user(&cmd, (char *)((unsigned int*)rq->ifr_data + 1),
43878 +                                sizeof(cmd)))
43879 +    {
43880 +        return -EFAULT;
43881 +    }
43882 +
43883 +    ret = wmi_set_wmm_txop(ar->arWmi, cmd.txopEnable);
43884 +
43885 +    switch (ret) {
43886 +        case A_OK:
43887 +            return 0;
43888 +        case A_EBUSY :
43889 +            return -EBUSY;
43890 +        case A_NO_MEMORY:
43891 +            return -ENOMEM;
43892 +        case A_EINVAL:
43893 +        default:
43894 +            return -EFAULT;
43895 +    }
43896 +}
43897 +
43898 +static int
43899 +ar6000_ioctl_get_rd(struct net_device *dev, struct ifreq *rq)
43900 +{
43901 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43902 +    A_STATUS ret = 0;
43903 +
43904 +    if ((dev->flags & IFF_UP) != IFF_UP || ar->arWmiReady == FALSE) {
43905 +        return -EIO;
43906 +    }
43907 +
43908 +    if(copy_to_user((char *)((unsigned int*)rq->ifr_data + 1),
43909 +                            &ar->arRegCode, sizeof(ar->arRegCode)))
43910 +        ret = -EFAULT;
43911 +
43912 +    return ret;
43913 +}
43914 +
43915 +
43916 +/* Get power mode command */
43917 +static int
43918 +ar6000_ioctl_get_power_mode(struct net_device *dev, struct ifreq *rq)
43919 +{
43920 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43921 +    WMI_POWER_MODE_CMD power_mode;
43922 +    int ret = 0;
43923 +
43924 +    if (ar->arWmiReady == FALSE) {
43925 +        return -EIO;
43926 +    }
43927 +
43928 +    power_mode.powerMode = wmi_get_power_mode_cmd(ar->arWmi);
43929 +    if (copy_to_user(rq->ifr_data, &power_mode, sizeof(WMI_POWER_MODE_CMD))) {
43930 +        ret = -EFAULT;
43931 +    }
43932 +
43933 +    return ret;
43934 +}
43935 +
43936 +
43937 +static int
43938 +ar6000_ioctl_set_channelParams(struct net_device *dev, struct ifreq *rq)
43939 +{
43940 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43941 +    WMI_CHANNEL_PARAMS_CMD cmd, *cmdp;
43942 +    int ret = 0;
43943 +
43944 +    if (ar->arWmiReady == FALSE) {
43945 +        return -EIO;
43946 +    }
43947 +
43948 +
43949 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
43950 +        return -EFAULT;
43951 +    }
43952 +
43953 +    if (cmd.numChannels > 1) {
43954 +        cmdp = A_MALLOC(130);
43955 +        if (copy_from_user(cmdp, rq->ifr_data,
43956 +                           sizeof (*cmdp) +
43957 +                           ((cmd.numChannels - 1) * sizeof(A_UINT16))))
43958 +        {
43959 +            kfree(cmdp);
43960 +            return -EFAULT;
43961 +        }
43962 +    } else {
43963 +        cmdp = &cmd;
43964 +    }
43965 +
43966 +    if ((ar->arPhyCapability == WMI_11G_CAPABILITY) &&
43967 +        ((cmdp->phyMode == WMI_11A_MODE) || (cmdp->phyMode == WMI_11AG_MODE)))
43968 +    {
43969 +        ret = -EINVAL;
43970 +    }
43971 +
43972 +    if (!ret &&
43973 +        (wmi_set_channelParams_cmd(ar->arWmi, cmdp->scanParam, cmdp->phyMode,
43974 +                                   cmdp->numChannels, cmdp->channelList)
43975 +         != A_OK))
43976 +    {
43977 +        ret = -EIO;
43978 +    }
43979 +
43980 +    if (cmd.numChannels > 1) {
43981 +        kfree(cmdp);
43982 +    }
43983 +
43984 +    return ret;
43985 +}
43986 +
43987 +static int
43988 +ar6000_ioctl_set_snr_threshold(struct net_device *dev, struct ifreq *rq)
43989 +{
43990 +
43991 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
43992 +    WMI_SNR_THRESHOLD_PARAMS_CMD cmd;
43993 +    int ret = 0;
43994 +
43995 +    if (ar->arWmiReady == FALSE) {
43996 +        return -EIO;
43997 +    }
43998 +
43999 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44000 +        return -EFAULT;
44001 +    }
44002 +
44003 +    if( wmi_set_snr_threshold_params(ar->arWmi, &cmd) != A_OK ) {
44004 +        ret = -EIO;
44005 +    }
44006 +
44007 +    return ret;
44008 +}
44009 +
44010 +static int
44011 +ar6000_ioctl_set_rssi_threshold(struct net_device *dev, struct ifreq *rq)
44012 +{
44013 +#define SWAP_THOLD(thold1, thold2) do { \
44014 +    USER_RSSI_THOLD tmpThold;           \
44015 +    tmpThold.tag = thold1.tag;          \
44016 +    tmpThold.rssi = thold1.rssi;        \
44017 +    thold1.tag = thold2.tag;            \
44018 +    thold1.rssi = thold2.rssi;          \
44019 +    thold2.tag = tmpThold.tag;          \
44020 +    thold2.rssi = tmpThold.rssi;        \
44021 +} while (0)
44022 +
44023 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44024 +    WMI_RSSI_THRESHOLD_PARAMS_CMD cmd;
44025 +    USER_RSSI_PARAMS rssiParams;
44026 +    A_INT32 i, j;
44027 +
44028 +    int ret = 0;
44029 +
44030 +    if (ar->arWmiReady == FALSE) {
44031 +        return -EIO;
44032 +    }
44033 +
44034 +    if (copy_from_user((char *)&rssiParams, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(USER_RSSI_PARAMS))) {
44035 +        return -EFAULT;
44036 +    }
44037 +    cmd.weight = rssiParams.weight;
44038 +    cmd.pollTime = rssiParams.pollTime;
44039 +
44040 +    A_MEMCPY(rssi_map, &rssiParams.tholds, sizeof(rssi_map));
44041 +    /*
44042 +     *  only 6 elements, so use bubble sorting, in ascending order
44043 +     */
44044 +    for (i = 5; i > 0; i--) {
44045 +        for (j = 0; j < i; j++) { /* above tholds */
44046 +            if (rssi_map[j+1].rssi < rssi_map[j].rssi) {
44047 +                SWAP_THOLD(rssi_map[j+1], rssi_map[j]);
44048 +            } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) {
44049 +                return EFAULT;
44050 +            }
44051 +        }
44052 +    }
44053 +    for (i = 11; i > 6; i--) {
44054 +        for (j = 6; j < i; j++) { /* below tholds */
44055 +            if (rssi_map[j+1].rssi < rssi_map[j].rssi) {
44056 +                SWAP_THOLD(rssi_map[j+1], rssi_map[j]);
44057 +            } else if (rssi_map[j+1].rssi == rssi_map[j].rssi) {
44058 +                return EFAULT;
44059 +            }
44060 +        }
44061 +    }
44062 +
44063 +#ifdef DEBUG
44064 +    for (i = 0; i < 12; i++) {
44065 +        AR_DEBUG2_PRINTF("thold[%d].tag: %d, thold[%d].rssi: %d \n",
44066 +                i, rssi_map[i].tag, i, rssi_map[i].rssi);
44067 +    }
44068 +#endif
44069 +    cmd.thresholdAbove1_Val = rssi_map[0].rssi;
44070 +    cmd.thresholdAbove2_Val = rssi_map[1].rssi;
44071 +    cmd.thresholdAbove3_Val = rssi_map[2].rssi;
44072 +    cmd.thresholdAbove4_Val = rssi_map[3].rssi;
44073 +    cmd.thresholdAbove5_Val = rssi_map[4].rssi;
44074 +    cmd.thresholdAbove6_Val = rssi_map[5].rssi;
44075 +    cmd.thresholdBelow1_Val = rssi_map[6].rssi;
44076 +    cmd.thresholdBelow2_Val = rssi_map[7].rssi;
44077 +    cmd.thresholdBelow3_Val = rssi_map[8].rssi;
44078 +    cmd.thresholdBelow4_Val = rssi_map[9].rssi;
44079 +    cmd.thresholdBelow5_Val = rssi_map[10].rssi;
44080 +    cmd.thresholdBelow6_Val = rssi_map[11].rssi;
44081 +
44082 +    if( wmi_set_rssi_threshold_params(ar->arWmi, &cmd) != A_OK ) {
44083 +        ret = -EIO;
44084 +    }
44085 +
44086 +    return ret;
44087 +}
44088 +
44089 +static int
44090 +ar6000_ioctl_set_lq_threshold(struct net_device *dev, struct ifreq *rq)
44091 +{
44092 +
44093 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44094 +    WMI_LQ_THRESHOLD_PARAMS_CMD cmd;
44095 +    int ret = 0;
44096 +
44097 +    if (ar->arWmiReady == FALSE) {
44098 +        return -EIO;
44099 +    }
44100 +
44101 +    if (copy_from_user(&cmd, (char *)((unsigned int *)rq->ifr_data + 1), sizeof(cmd))) {
44102 +        return -EFAULT;
44103 +    }
44104 +
44105 +    if( wmi_set_lq_threshold_params(ar->arWmi, &cmd) != A_OK ) {
44106 +        ret = -EIO;
44107 +    }
44108 +
44109 +    return ret;
44110 +}
44111 +
44112 +
44113 +static int
44114 +ar6000_ioctl_set_probedSsid(struct net_device *dev, struct ifreq *rq)
44115 +{
44116 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44117 +    WMI_PROBED_SSID_CMD cmd;
44118 +    int ret = 0;
44119 +
44120 +    if (ar->arWmiReady == FALSE) {
44121 +        return -EIO;
44122 +    }
44123 +
44124 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44125 +        return -EFAULT;
44126 +    }
44127 +
44128 +    if (wmi_probedSsid_cmd(ar->arWmi, cmd.entryIndex, cmd.flag, cmd.ssidLength,
44129 +                                  cmd.ssid) != A_OK)
44130 +    {
44131 +        ret = -EIO;
44132 +    }
44133 +
44134 +    return ret;
44135 +}
44136 +
44137 +static int
44138 +ar6000_ioctl_set_badAp(struct net_device *dev, struct ifreq *rq)
44139 +{
44140 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44141 +    WMI_ADD_BAD_AP_CMD cmd;
44142 +    int ret = 0;
44143 +
44144 +    if (ar->arWmiReady == FALSE) {
44145 +        return -EIO;
44146 +    }
44147 +
44148 +
44149 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44150 +        return -EFAULT;
44151 +    }
44152 +
44153 +    if (cmd.badApIndex > WMI_MAX_BAD_AP_INDEX) {
44154 +        return -EIO;
44155 +    }
44156 +
44157 +    if (A_MEMCMP(cmd.bssid, null_mac, AR6000_ETH_ADDR_LEN) == 0) {
44158 +        /*
44159 +         * This is a delete badAP.
44160 +         */
44161 +        if (wmi_deleteBadAp_cmd(ar->arWmi, cmd.badApIndex) != A_OK) {
44162 +            ret = -EIO;
44163 +        }
44164 +    } else {
44165 +        if (wmi_addBadAp_cmd(ar->arWmi, cmd.badApIndex, cmd.bssid) != A_OK) {
44166 +            ret = -EIO;
44167 +        }
44168 +    }
44169 +
44170 +    return ret;
44171 +}
44172 +
44173 +static int
44174 +ar6000_ioctl_create_qos(struct net_device *dev, struct ifreq *rq)
44175 +{
44176 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44177 +    WMI_CREATE_PSTREAM_CMD cmd;
44178 +    A_STATUS ret;
44179 +
44180 +    if (ar->arWmiReady == FALSE) {
44181 +        return -EIO;
44182 +    }
44183 +
44184 +
44185 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44186 +        return -EFAULT;
44187 +    }
44188 +
44189 +    ret = wmi_verify_tspec_params(&cmd, tspecCompliance);
44190 +    if (ret == A_OK)
44191 +        ret = wmi_create_pstream_cmd(ar->arWmi, &cmd);
44192 +
44193 +    switch (ret) {
44194 +        case A_OK:
44195 +            return 0;
44196 +        case A_EBUSY :
44197 +            return -EBUSY;
44198 +        case A_NO_MEMORY:
44199 +            return -ENOMEM;
44200 +        case A_EINVAL:
44201 +        default:
44202 +            return -EFAULT;
44203 +    }
44204 +}
44205 +
44206 +static int
44207 +ar6000_ioctl_delete_qos(struct net_device *dev, struct ifreq *rq)
44208 +{
44209 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44210 +    WMI_DELETE_PSTREAM_CMD cmd;
44211 +    int ret = 0;
44212 +
44213 +    if (ar->arWmiReady == FALSE) {
44214 +        return -EIO;
44215 +    }
44216 +
44217 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44218 +        return -EFAULT;
44219 +    }
44220 +
44221 +    ret = wmi_delete_pstream_cmd(ar->arWmi, cmd.trafficClass, cmd.tsid);
44222 +
44223 +    switch (ret) {
44224 +        case A_OK:
44225 +            return 0;
44226 +        case A_EBUSY :
44227 +            return -EBUSY;
44228 +        case A_NO_MEMORY:
44229 +            return -ENOMEM;
44230 +        case A_EINVAL:
44231 +        default:
44232 +            return -EFAULT;
44233 +    }
44234 +}
44235 +
44236 +static int
44237 +ar6000_ioctl_get_qos_queue(struct net_device *dev, struct ifreq *rq)
44238 +{
44239 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44240 +    struct ar6000_queuereq qreq;
44241 +    int ret = 0;
44242 +
44243 +    if (ar->arWmiReady == FALSE) {
44244 +        return -EIO;
44245 +    }
44246 +
44247 +    if( copy_from_user(&qreq, rq->ifr_data,
44248 +                  sizeof(struct ar6000_queuereq)))
44249 +        return -EFAULT;
44250 +
44251 +    qreq.activeTsids = wmi_get_mapped_qos_queue(ar->arWmi, qreq.trafficClass);
44252 +
44253 +    if (copy_to_user(rq->ifr_data, &qreq,
44254 +                 sizeof(struct ar6000_queuereq)))
44255 +    {
44256 +        ret = -EFAULT;
44257 +    }
44258 +
44259 +    return ret;
44260 +}
44261 +
44262 +#ifdef CONFIG_HOST_TCMD_SUPPORT
44263 +static A_STATUS
44264 +ar6000_ioctl_tcmd_get_rx_report(struct net_device *dev,
44265 +                                 struct ifreq *rq, A_UINT8 *data, A_UINT32 len)
44266 +{
44267 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44268 +    A_UINT32    buf[2];
44269 +    int ret = 0;
44270 +
44271 +    if (ar->arWmiReady == FALSE) {
44272 +        return -EIO;
44273 +    }
44274 +
44275 +    if (down_interruptible(&ar->arSem)) {
44276 +        return -ERESTARTSYS;
44277 +    }
44278 +    ar->tcmdRxReport = 0;
44279 +    if (wmi_test_cmd(ar->arWmi, data, len) != A_OK) {
44280 +        up(&ar->arSem);
44281 +        return -EIO;
44282 +    }
44283 +
44284 +    wait_event_interruptible_timeout(arEvent, ar->tcmdRxReport != 0, wmitimeout * HZ);
44285 +
44286 +    if (signal_pending(current)) {
44287 +        ret = -EINTR;
44288 +    }
44289 +
44290 +    buf[0] = ar->tcmdRxTotalPkt;
44291 +    buf[1] = ar->tcmdRxRssi;
44292 +    if (!ret && copy_to_user(rq->ifr_data, buf, sizeof(buf))) {
44293 +        ret = -EFAULT;
44294 +    }
44295 +
44296 +    up(&ar->arSem);
44297 +
44298 +    return ret;
44299 +}
44300 +
44301 +void
44302 +ar6000_tcmd_rx_report_event(void *devt, A_UINT8 * results, int len)
44303 +{
44304 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)devt;
44305 +    TCMD_CONT_RX * rx_rep = (TCMD_CONT_RX *)results;
44306 +
44307 +    ar->tcmdRxTotalPkt = rx_rep->u.report.totalPkt;
44308 +    ar->tcmdRxRssi = rx_rep->u.report.rssiInDBm;
44309 +    ar->tcmdRxReport = 1;
44310 +
44311 +    wake_up(&arEvent);
44312 +}
44313 +#endif /* CONFIG_HOST_TCMD_SUPPORT*/
44314 +
44315 +static int
44316 +ar6000_ioctl_set_error_report_bitmask(struct net_device *dev, struct ifreq *rq)
44317 +{
44318 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44319 +    WMI_TARGET_ERROR_REPORT_BITMASK cmd;
44320 +    int ret = 0;
44321 +
44322 +    if (ar->arWmiReady == FALSE) {
44323 +        return -EIO;
44324 +    }
44325 +
44326 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44327 +        return -EFAULT;
44328 +    }
44329 +
44330 +    ret = wmi_set_error_report_bitmask(ar->arWmi, cmd.bitmask);
44331 +
44332 +    return  (ret==0 ? ret : -EINVAL);
44333 +}
44334 +
44335 +static int
44336 +ar6000_clear_target_stats(struct net_device *dev)
44337 +{
44338 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44339 +    TARGET_STATS *pStats = &ar->arTargetStats;
44340 +    int ret = 0;
44341 +
44342 +    if (ar->arWmiReady == FALSE) {
44343 +       return -EIO;
44344 +    }
44345 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
44346 +    A_MEMZERO(pStats, sizeof(TARGET_STATS));
44347 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
44348 +    return ret;
44349 +}
44350 +
44351 +static int
44352 +ar6000_ioctl_get_target_stats(struct net_device *dev, struct ifreq *rq)
44353 +{
44354 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44355 +    TARGET_STATS_CMD cmd;
44356 +    TARGET_STATS *pStats = &ar->arTargetStats;
44357 +    int ret = 0;
44358 +
44359 +    if (ar->arWmiReady == FALSE) {
44360 +        return -EIO;
44361 +    }
44362 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44363 +        return -EFAULT;
44364 +    }
44365 +    if (down_interruptible(&ar->arSem)) {
44366 +        return -ERESTARTSYS;
44367 +    }
44368 +
44369 +    ar->statsUpdatePending = TRUE;
44370 +
44371 +    if(wmi_get_stats_cmd(ar->arWmi) != A_OK) {
44372 +        up(&ar->arSem);
44373 +        return -EIO;
44374 +    }
44375 +
44376 +    wait_event_interruptible_timeout(arEvent, ar->statsUpdatePending == FALSE, wmitimeout * HZ);
44377 +
44378 +    if (signal_pending(current)) {
44379 +        ret = -EINTR;
44380 +    }
44381 +
44382 +    if (!ret && copy_to_user(rq->ifr_data, pStats, sizeof(*pStats))) {
44383 +        ret = -EFAULT;
44384 +    }
44385 +
44386 +    if (cmd.clearStats == 1) {
44387 +        ret = ar6000_clear_target_stats(dev);
44388 +    }
44389 +
44390 +    up(&ar->arSem);
44391 +
44392 +    return ret;
44393 +}
44394 +
44395 +static int
44396 +ar6000_ioctl_set_access_params(struct net_device *dev, struct ifreq *rq)
44397 +{
44398 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44399 +    WMI_SET_ACCESS_PARAMS_CMD cmd;
44400 +    int ret = 0;
44401 +
44402 +    if (ar->arWmiReady == FALSE) {
44403 +        return -EIO;
44404 +    }
44405 +
44406 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44407 +        return -EFAULT;
44408 +    }
44409 +
44410 +    if (wmi_set_access_params_cmd(ar->arWmi, cmd.txop, cmd.eCWmin, cmd.eCWmax,
44411 +                                  cmd.aifsn) == A_OK)
44412 +    {
44413 +        ret = 0;
44414 +    } else {
44415 +        ret = -EINVAL;
44416 +    }
44417 +
44418 +    return (ret);
44419 +}
44420 +
44421 +static int
44422 +ar6000_ioctl_set_disconnect_timeout(struct net_device *dev, struct ifreq *rq)
44423 +{
44424 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44425 +    WMI_DISC_TIMEOUT_CMD cmd;
44426 +    int ret = 0;
44427 +
44428 +    if (ar->arWmiReady == FALSE) {
44429 +        return -EIO;
44430 +    }
44431 +
44432 +    if (copy_from_user(&cmd, rq->ifr_data, sizeof(cmd))) {
44433 +        return -EFAULT;
44434 +    }
44435 +
44436 +    if (wmi_disctimeout_cmd(ar->arWmi, cmd.disconnectTimeout) == A_OK)
44437 +    {
44438 +        ret = 0;
44439 +    } else {
44440 +        ret = -EINVAL;
44441 +    }
44442 +
44443 +    return (ret);
44444 +}
44445 +
44446 +static int
44447 +ar6000_xioctl_set_voice_pkt_size(struct net_device *dev, char * userdata)
44448 +{
44449 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44450 +    WMI_SET_VOICE_PKT_SIZE_CMD cmd;
44451 +    int ret = 0;
44452 +
44453 +    if (ar->arWmiReady == FALSE) {
44454 +        return -EIO;
44455 +    }
44456 +
44457 +    if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
44458 +        return -EFAULT;
44459 +    }
44460 +
44461 +    if (wmi_set_voice_pkt_size_cmd(ar->arWmi, cmd.voicePktSize) == A_OK)
44462 +    {
44463 +        ret = 0;
44464 +    } else {
44465 +        ret = -EINVAL;
44466 +    }
44467 +
44468 +
44469 +    return (ret);
44470 +}
44471 +
44472 +static int
44473 +ar6000_xioctl_set_max_sp_len(struct net_device *dev, char * userdata)
44474 +{
44475 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44476 +    WMI_SET_MAX_SP_LEN_CMD cmd;
44477 +    int ret = 0;
44478 +
44479 +    if (ar->arWmiReady == FALSE) {
44480 +        return -EIO;
44481 +    }
44482 +
44483 +    if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
44484 +        return -EFAULT;
44485 +    }
44486 +
44487 +    if (wmi_set_max_sp_len_cmd(ar->arWmi, cmd.maxSPLen) == A_OK)
44488 +    {
44489 +        ret = 0;
44490 +    } else {
44491 +        ret = -EINVAL;
44492 +    }
44493 +
44494 +    return (ret);
44495 +}
44496 +
44497 +
44498 +static int
44499 +ar6000_xioctl_set_bt_status_cmd(struct net_device *dev, char * userdata)
44500 +{
44501 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44502 +    WMI_SET_BT_STATUS_CMD cmd;
44503 +    int ret = 0;
44504 +
44505 +    if (ar->arWmiReady == FALSE) {
44506 +        return -EIO;
44507 +    }
44508 +
44509 +    if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
44510 +        return -EFAULT;
44511 +    }
44512 +
44513 +    if (wmi_set_bt_status_cmd(ar->arWmi, cmd.streamType, cmd.status) == A_OK)
44514 +    {
44515 +        ret = 0;
44516 +    } else {
44517 +        ret = -EINVAL;
44518 +    }
44519 +
44520 +    return (ret);
44521 +}
44522 +
44523 +static int
44524 +ar6000_xioctl_set_bt_params_cmd(struct net_device *dev, char * userdata)
44525 +{
44526 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44527 +    WMI_SET_BT_PARAMS_CMD cmd;
44528 +    int ret = 0;
44529 +
44530 +    if (ar->arWmiReady == FALSE) {
44531 +        return -EIO;
44532 +    }
44533 +
44534 +    if (copy_from_user(&cmd, userdata, sizeof(cmd))) {
44535 +        return -EFAULT;
44536 +    }
44537 +
44538 +    if (wmi_set_bt_params_cmd(ar->arWmi, &cmd) == A_OK)
44539 +    {
44540 +        ret = 0;
44541 +    } else {
44542 +        ret = -EINVAL;
44543 +    }
44544 +
44545 +    return (ret);
44546 +}
44547 +
44548 +#ifdef CONFIG_HOST_GPIO_SUPPORT
44549 +struct ar6000_gpio_intr_wait_cmd_s  gpio_intr_results;
44550 +/* gpio_reg_results and gpio_data_available are protected by arSem */
44551 +static struct ar6000_gpio_register_cmd_s gpio_reg_results;
44552 +static A_BOOL gpio_data_available; /* Requested GPIO data available */
44553 +static A_BOOL gpio_intr_available; /* GPIO interrupt info available */
44554 +static A_BOOL gpio_ack_received;   /* GPIO ack was received */
44555 +
44556 +/* Host-side initialization for General Purpose I/O support */
44557 +void ar6000_gpio_init(void)
44558 +{
44559 +    gpio_intr_available = FALSE;
44560 +    gpio_data_available = FALSE;
44561 +    gpio_ack_received   = FALSE;
44562 +}
44563 +
44564 +/*
44565 + * Called when a GPIO interrupt is received from the Target.
44566 + * intr_values shows which GPIO pins have interrupted.
44567 + * input_values shows a recent value of GPIO pins.
44568 + */
44569 +void
44570 +ar6000_gpio_intr_rx(A_UINT32 intr_mask, A_UINT32 input_values)
44571 +{
44572 +    gpio_intr_results.intr_mask = intr_mask;
44573 +    gpio_intr_results.input_values = input_values;
44574 +    *((volatile A_BOOL *)&gpio_intr_available) = TRUE;
44575 +    wake_up(&arEvent);
44576 +}
44577 +
44578 +/*
44579 + * This is called when a response is received from the Target
44580 + * for a previous or ar6000_gpio_input_get or ar6000_gpio_register_get
44581 + * call.
44582 + */
44583 +void
44584 +ar6000_gpio_data_rx(A_UINT32 reg_id, A_UINT32 value)
44585 +{
44586 +    gpio_reg_results.gpioreg_id = reg_id;
44587 +    gpio_reg_results.value = value;
44588 +    *((volatile A_BOOL *)&gpio_data_available) = TRUE;
44589 +    wake_up(&arEvent);
44590 +}
44591 +
44592 +/*
44593 + * This is called when an acknowledgement is received from the Target
44594 + * for a previous or ar6000_gpio_output_set or ar6000_gpio_register_set
44595 + * call.
44596 + */
44597 +void
44598 +ar6000_gpio_ack_rx(void)
44599 +{
44600 +    gpio_ack_received = TRUE;
44601 +    wake_up(&arEvent);
44602 +}
44603 +
44604 +A_STATUS
44605 +ar6000_gpio_output_set(struct net_device *dev,
44606 +                       A_UINT32 set_mask,
44607 +                       A_UINT32 clear_mask,
44608 +                       A_UINT32 enable_mask,
44609 +                       A_UINT32 disable_mask)
44610 +{
44611 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44612 +
44613 +    gpio_ack_received = FALSE;
44614 +    return wmi_gpio_output_set(ar->arWmi,
44615 +                set_mask, clear_mask, enable_mask, disable_mask);
44616 +}
44617 +
44618 +static A_STATUS
44619 +ar6000_gpio_input_get(struct net_device *dev)
44620 +{
44621 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44622 +
44623 +    *((volatile A_BOOL *)&gpio_data_available) = FALSE;
44624 +    return wmi_gpio_input_get(ar->arWmi);
44625 +}
44626 +
44627 +static A_STATUS
44628 +ar6000_gpio_register_set(struct net_device *dev,
44629 +                         A_UINT32 gpioreg_id,
44630 +                         A_UINT32 value)
44631 +{
44632 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44633 +
44634 +    gpio_ack_received = FALSE;
44635 +    return wmi_gpio_register_set(ar->arWmi, gpioreg_id, value);
44636 +}
44637 +
44638 +static A_STATUS
44639 +ar6000_gpio_register_get(struct net_device *dev,
44640 +                         A_UINT32 gpioreg_id)
44641 +{
44642 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44643 +
44644 +    *((volatile A_BOOL *)&gpio_data_available) = FALSE;
44645 +    return wmi_gpio_register_get(ar->arWmi, gpioreg_id);
44646 +}
44647 +
44648 +static A_STATUS
44649 +ar6000_gpio_intr_ack(struct net_device *dev,
44650 +                     A_UINT32 ack_mask)
44651 +{
44652 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44653 +
44654 +    gpio_intr_available = FALSE;
44655 +    return wmi_gpio_intr_ack(ar->arWmi, ack_mask);
44656 +}
44657 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
44658 +
44659 +int ar6000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
44660 +{
44661 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
44662 +    HIF_DEVICE *hifDevice = ar->arHifDevice;
44663 +    int ret, param, param2;
44664 +    unsigned int address = 0;
44665 +    unsigned int length = 0;
44666 +    unsigned char *buffer;
44667 +    char *userdata;
44668 +    A_UINT32 connectCtrlFlags;
44669 +
44670 +
44671 +    static WMI_SCAN_PARAMS_CMD scParams = {0, 0, 0, 0, 0,
44672 +                                           WMI_SHORTSCANRATIO_DEFAULT,
44673 +                                           DEFAULT_SCAN_CTRL_FLAGS,
44674 +                                           0};
44675 +    WMI_SET_AKMP_PARAMS_CMD  akmpParams;
44676 +    WMI_SET_PMKID_LIST_CMD   pmkidInfo;
44677 +
44678 +    if (cmd == AR6000_IOCTL_EXTENDED)
44679 +    {
44680 +        /*
44681 +         * This allows for many more wireless ioctls than would otherwise
44682 +         * be available.  Applications embed the actual ioctl command in
44683 +         * the first word of the parameter block, and use the command
44684 +         * AR6000_IOCTL_EXTENDED_CMD on the ioctl call.
44685 +         */
44686 +        get_user(cmd, (int *)rq->ifr_data);
44687 +        userdata = (char *)(((unsigned int *)rq->ifr_data)+1);
44688 +    }
44689 +    else
44690 +    {
44691 +        userdata = (char *)rq->ifr_data;
44692 +    }
44693 +
44694 +    if ((ar->arWlanState == WLAN_DISABLED) &&
44695 +        ((cmd != AR6000_XIOCTRL_WMI_SET_WLAN_STATE) &&
44696 +         (cmd != AR6000_XIOCTL_DIAG_READ) &&
44697 +         (cmd != AR6000_XIOCTL_DIAG_WRITE)))
44698 +    {
44699 +        return -EIO;
44700 +    }
44701 +
44702 +    ret = 0;
44703 +    switch(cmd)
44704 +    {
44705 +#ifdef CONFIG_HOST_TCMD_SUPPORT
44706 +        case AR6000_XIOCTL_TCMD_CONT_TX:
44707 +            {
44708 +                TCMD_CONT_TX txCmd;
44709 +
44710 +                if (ar->tcmdPm == TCMD_PM_SLEEP) {
44711 +                    A_PRINTF("Can NOT send tx tcmd when target is asleep! \n");
44712 +                    return -EFAULT;
44713 +                }
44714 +
44715 +                if(copy_from_user(&txCmd, userdata, sizeof(TCMD_CONT_TX)))
44716 +                    return -EFAULT;
44717 +                wmi_test_cmd(ar->arWmi,(A_UINT8 *)&txCmd, sizeof(TCMD_CONT_TX));
44718 +            }
44719 +            break;
44720 +        case AR6000_XIOCTL_TCMD_CONT_RX:
44721 +            {
44722 +                TCMD_CONT_RX rxCmd;
44723 +
44724 +                if (ar->tcmdPm == TCMD_PM_SLEEP) {
44725 +                    A_PRINTF("Can NOT send rx tcmd when target is asleep! \n");
44726 +                    return -EFAULT;
44727 +                }
44728 +                if(copy_from_user(&rxCmd, userdata, sizeof(TCMD_CONT_RX)))
44729 +                    return -EFAULT;
44730 +                switch(rxCmd.act)
44731 +                {
44732 +                    case TCMD_CONT_RX_PROMIS:
44733 +                    case TCMD_CONT_RX_FILTER:
44734 +                    case TCMD_CONT_RX_SETMAC:
44735 +                         wmi_test_cmd(ar->arWmi,(A_UINT8 *)&rxCmd,
44736 +                                                sizeof(TCMD_CONT_RX));
44737 +                         break;
44738 +                    case TCMD_CONT_RX_REPORT:
44739 +                         ar6000_ioctl_tcmd_get_rx_report(dev, rq,
44740 +                         (A_UINT8 *)&rxCmd, sizeof(TCMD_CONT_RX));
44741 +                         break;
44742 +                    default:
44743 +                         A_PRINTF("Unknown Cont Rx mode: %d\n",rxCmd.act);
44744 +                         return -EINVAL;
44745 +                }
44746 +            }
44747 +            break;
44748 +        case AR6000_XIOCTL_TCMD_PM:
44749 +            {
44750 +                TCMD_PM pmCmd;
44751 +
44752 +                if(copy_from_user(&pmCmd, userdata, sizeof(TCMD_PM)))
44753 +                    return -EFAULT;
44754 +                ar->tcmdPm = pmCmd.mode;
44755 +                wmi_test_cmd(ar->arWmi, (A_UINT8*)&pmCmd, sizeof(TCMD_PM));
44756 +            }
44757 +            break;
44758 +#endif /* CONFIG_HOST_TCMD_SUPPORT */
44759 +
44760 +        case AR6000_XIOCTL_BMI_DONE:
44761 +            if(bmienable)
44762 +            {
44763 +                ret = ar6000_init(dev);
44764 +            }
44765 +            else
44766 +            {
44767 +                ret = BMIDone(hifDevice);
44768 +            }
44769 +            break;
44770 +
44771 +        case AR6000_XIOCTL_BMI_READ_MEMORY:
44772 +            get_user(address, (unsigned int *)userdata);
44773 +            get_user(length, (unsigned int *)userdata + 1);
44774 +            AR_DEBUG_PRINTF("Read Memory (address: 0x%x, length: %d)\n",
44775 +                             address, length);
44776 +            if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
44777 +                A_MEMZERO(buffer, length);
44778 +                ret = BMIReadMemory(hifDevice, address, buffer, length);
44779 +                if (copy_to_user(rq->ifr_data, buffer, length)) {
44780 +                    ret = -EFAULT;
44781 +                }
44782 +                A_FREE(buffer);
44783 +            } else {
44784 +                ret = -ENOMEM;
44785 +            }
44786 +            break;
44787 +
44788 +        case AR6000_XIOCTL_BMI_WRITE_MEMORY:
44789 +            get_user(address, (unsigned int *)userdata);
44790 +            get_user(length, (unsigned int *)userdata + 1);
44791 +            AR_DEBUG_PRINTF("Write Memory (address: 0x%x, length: %d)\n",
44792 +                             address, length);
44793 +            if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
44794 +                A_MEMZERO(buffer, length);
44795 +                if (copy_from_user(buffer, &userdata[sizeof(address) +
44796 +                                   sizeof(length)], length))
44797 +                {
44798 +                    ret = -EFAULT;
44799 +                } else {
44800 +                    ret = BMIWriteMemory(hifDevice, address, buffer, length);
44801 +                }
44802 +                A_FREE(buffer);
44803 +            } else {
44804 +                ret = -ENOMEM;
44805 +            }
44806 +            break;
44807 +
44808 +        case AR6000_XIOCTL_BMI_TEST:
44809 +           AR_DEBUG_PRINTF("No longer supported\n");
44810 +           ret = -EOPNOTSUPP;
44811 +           break;
44812 +
44813 +        case AR6000_XIOCTL_BMI_EXECUTE:
44814 +            get_user(address, (unsigned int *)userdata);
44815 +            get_user(param, (unsigned int *)userdata + 1);
44816 +            AR_DEBUG_PRINTF("Execute (address: 0x%x, param: %d)\n",
44817 +                             address, param);
44818 +            ret = BMIExecute(hifDevice, address, &param);
44819 +            put_user(param, (unsigned int *)rq->ifr_data); /* return value */
44820 +            break;
44821 +
44822 +        case AR6000_XIOCTL_BMI_SET_APP_START:
44823 +            get_user(address, (unsigned int *)userdata);
44824 +            AR_DEBUG_PRINTF("Set App Start (address: 0x%x)\n", address);
44825 +            ret = BMISetAppStart(hifDevice, address);
44826 +            break;
44827 +
44828 +        case AR6000_XIOCTL_BMI_READ_SOC_REGISTER:
44829 +            get_user(address, (unsigned int *)userdata);
44830 +            ret = BMIReadSOCRegister(hifDevice, address, &param);
44831 +            put_user(param, (unsigned int *)rq->ifr_data); /* return value */
44832 +            break;
44833 +
44834 +        case AR6000_XIOCTL_BMI_WRITE_SOC_REGISTER:
44835 +            get_user(address, (unsigned int *)userdata);
44836 +            get_user(param, (unsigned int *)userdata + 1);
44837 +            ret = BMIWriteSOCRegister(hifDevice, address, param);
44838 +            break;
44839 +
44840 +#ifdef HTC_RAW_INTERFACE
44841 +        case AR6000_XIOCTL_HTC_RAW_OPEN:
44842 +            ret = A_OK;
44843 +            if (!arRawIfEnabled(ar)) {
44844 +                /* make sure block size is set in case the target was reset since last
44845 +                  * BMI phase (i.e. flashup downloads) */
44846 +                ret = ar6000_SetHTCBlockSize(ar);
44847 +                if (A_FAILED(ret)) {
44848 +                    break;
44849 +                }
44850 +                /* Terminate the BMI phase */
44851 +                ret = BMIDone(hifDevice);
44852 +                if (ret == A_OK) {
44853 +                    ret = ar6000_htc_raw_open(ar);
44854 +                }
44855 +            }
44856 +            break;
44857 +
44858 +        case AR6000_XIOCTL_HTC_RAW_CLOSE:
44859 +            if (arRawIfEnabled(ar)) {
44860 +                ret = ar6000_htc_raw_close(ar);
44861 +                arRawIfEnabled(ar) = FALSE;
44862 +            } else {
44863 +                ret = A_ERROR;
44864 +            }
44865 +            break;
44866 +
44867 +        case AR6000_XIOCTL_HTC_RAW_READ:
44868 +            if (arRawIfEnabled(ar)) {
44869 +                unsigned int streamID;
44870 +                get_user(streamID, (unsigned int *)userdata);
44871 +                get_user(length, (unsigned int *)userdata + 1);
44872 +                buffer = rq->ifr_data + sizeof(length);
44873 +                ret = ar6000_htc_raw_read(ar, (HTC_RAW_STREAM_ID)streamID,
44874 +                                          buffer, length);
44875 +                put_user(ret, (unsigned int *)rq->ifr_data);
44876 +            } else {
44877 +                ret = A_ERROR;
44878 +            }
44879 +            break;
44880 +
44881 +        case AR6000_XIOCTL_HTC_RAW_WRITE:
44882 +            if (arRawIfEnabled(ar)) {
44883 +                unsigned int streamID;
44884 +                get_user(streamID, (unsigned int *)userdata);
44885 +                get_user(length, (unsigned int *)userdata + 1);
44886 +                buffer = userdata + sizeof(streamID) + sizeof(length);
44887 +                ret = ar6000_htc_raw_write(ar, (HTC_RAW_STREAM_ID)streamID,
44888 +                                           buffer, length);
44889 +                put_user(ret, (unsigned int *)rq->ifr_data);
44890 +            } else {
44891 +                ret = A_ERROR;
44892 +            }
44893 +            break;
44894 +#endif /* HTC_RAW_INTERFACE */
44895 +
44896 +        case AR6000_IOCTL_WMI_GETREV:
44897 +        {
44898 +            if (copy_to_user(rq->ifr_data, &ar->arVersion,
44899 +                             sizeof(ar->arVersion)))
44900 +            {
44901 +                ret = -EFAULT;
44902 +            }
44903 +            break;
44904 +        }
44905 +        case AR6000_IOCTL_WMI_SETPWR:
44906 +        {
44907 +            WMI_POWER_MODE_CMD pwrModeCmd;
44908 +
44909 +            if (ar->arWmiReady == FALSE) {
44910 +                ret = -EIO;
44911 +            } else if (copy_from_user(&pwrModeCmd, userdata,
44912 +                                   sizeof(pwrModeCmd)))
44913 +            {
44914 +                ret = -EFAULT;
44915 +            } else {
44916 +                if (wmi_powermode_cmd(ar->arWmi, pwrModeCmd.powerMode)
44917 +                       != A_OK)
44918 +                {
44919 +                    ret = -EIO;
44920 +                }
44921 +            }
44922 +            break;
44923 +        }
44924 +        case AR6000_IOCTL_WMI_SET_IBSS_PM_CAPS:
44925 +        {
44926 +            WMI_IBSS_PM_CAPS_CMD ibssPmCaps;
44927 +
44928 +            if (ar->arWmiReady == FALSE) {
44929 +                ret = -EIO;
44930 +            } else if (copy_from_user(&ibssPmCaps, userdata,
44931 +                                   sizeof(ibssPmCaps)))
44932 +            {
44933 +                ret = -EFAULT;
44934 +            } else {
44935 +                if (wmi_ibsspmcaps_cmd(ar->arWmi, ibssPmCaps.power_saving, ibssPmCaps.ttl,
44936 +                    ibssPmCaps.atim_windows, ibssPmCaps.timeout_value) != A_OK)
44937 +                {
44938 +                    ret = -EIO;
44939 +                }
44940 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
44941 +                ar->arIbssPsEnable = ibssPmCaps.power_saving;
44942 +                AR6000_SPIN_UNLOCK(&ar->arLock, 0);
44943 +            }
44944 +            break;
44945 +        }
44946 +        case AR6000_IOCTL_WMI_SET_PMPARAMS:
44947 +        {
44948 +            WMI_POWER_PARAMS_CMD pmParams;
44949 +
44950 +            if (ar->arWmiReady == FALSE) {
44951 +                ret = -EIO;
44952 +            } else if (copy_from_user(&pmParams, userdata,
44953 +                                      sizeof(pmParams)))
44954 +            {
44955 +                ret = -EFAULT;
44956 +            } else {
44957 +                if (wmi_pmparams_cmd(ar->arWmi, pmParams.idle_period,
44958 +                                     pmParams.pspoll_number,
44959 +                                     pmParams.dtim_policy) != A_OK)
44960 +                {
44961 +                    ret = -EIO;
44962 +                }
44963 +            }
44964 +            break;
44965 +        }
44966 +        case AR6000_IOCTL_WMI_SETSCAN:
44967 +        {
44968 +            if (ar->arWmiReady == FALSE) {
44969 +                ret = -EIO;
44970 +            } else if (copy_from_user(&scParams, userdata,
44971 +                                      sizeof(scParams)))
44972 +            {
44973 +                ret = -EFAULT;
44974 +            } else {
44975 +                if (CAN_SCAN_IN_CONNECT(scParams.scanCtrlFlags)) {
44976 +                    ar->arSkipScan = FALSE;
44977 +                } else {
44978 +                    ar->arSkipScan = TRUE;
44979 +                }
44980 +
44981 +                if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period,
44982 +                                       scParams.fg_end_period,
44983 +                                       scParams.bg_period,
44984 +                                       scParams.minact_chdwell_time,
44985 +                                       scParams.maxact_chdwell_time,
44986 +                                       scParams.pas_chdwell_time,
44987 +                                       scParams.shortScanRatio,
44988 +                                       scParams.scanCtrlFlags,
44989 +                                       scParams.max_dfsch_act_time) != A_OK)
44990 +                {
44991 +                    ret = -EIO;
44992 +                }
44993 +            }
44994 +            break;
44995 +        }
44996 +        case AR6000_IOCTL_WMI_SETLISTENINT:
44997 +        {
44998 +            WMI_LISTEN_INT_CMD listenCmd;
44999 +
45000 +            if (ar->arWmiReady == FALSE) {
45001 +                ret = -EIO;
45002 +            } else if (copy_from_user(&listenCmd, userdata,
45003 +                                      sizeof(listenCmd)))
45004 +            {
45005 +                ret = -EFAULT;
45006 +            } else {
45007 +                    if (wmi_listeninterval_cmd(ar->arWmi, listenCmd.listenInterval, listenCmd.numBeacons) != A_OK) {
45008 +                        ret = -EIO;
45009 +                    } else {
45010 +                        AR6000_SPIN_LOCK(&ar->arLock, 0);
45011 +                        ar->arListenInterval = param;
45012 +                        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45013 +                    }
45014 +
45015 +                }
45016 +            break;
45017 +        }
45018 +        case AR6000_IOCTL_WMI_SET_BMISS_TIME:
45019 +        {
45020 +            WMI_BMISS_TIME_CMD bmissCmd;
45021 +
45022 +            if (ar->arWmiReady == FALSE) {
45023 +                ret = -EIO;
45024 +            } else if (copy_from_user(&bmissCmd, userdata,
45025 +                                      sizeof(bmissCmd)))
45026 +            {
45027 +                ret = -EFAULT;
45028 +            } else {
45029 +                if (wmi_bmisstime_cmd(ar->arWmi, bmissCmd.bmissTime, bmissCmd.numBeacons) != A_OK) {
45030 +                    ret = -EIO;
45031 +                }
45032 +            }
45033 +            break;
45034 +        }
45035 +        case AR6000_IOCTL_WMI_SETBSSFILTER:
45036 +        {
45037 +            if (ar->arWmiReady == FALSE) {
45038 +                ret = -EIO;
45039 +            } else {
45040 +
45041 +                get_user(param, (unsigned char *)userdata);
45042 +                get_user(param2, (unsigned int *)(userdata + 1));
45043 +               printk("SETBSSFILTER: filter 0x%x, mask: 0x%x\n", param, param2);
45044 +                if (wmi_bssfilter_cmd(ar->arWmi, param, param2) != A_OK) {
45045 +                    ret = -EIO;
45046 +                }
45047 +            }
45048 +            break;
45049 +        }
45050 +        case AR6000_IOCTL_WMI_SET_SNRTHRESHOLD:
45051 +        {
45052 +            ret = ar6000_ioctl_set_snr_threshold(dev, rq);
45053 +            break;
45054 +        }
45055 +        case AR6000_XIOCTL_WMI_SET_RSSITHRESHOLD:
45056 +        {
45057 +            ret = ar6000_ioctl_set_rssi_threshold(dev, rq);
45058 +            break;
45059 +        }
45060 +        case AR6000_XIOCTL_WMI_CLR_RSSISNR:
45061 +        {
45062 +            if (ar->arWmiReady == FALSE) {
45063 +                ret = -EIO;
45064 +            }
45065 +            ret = wmi_clr_rssi_snr(ar->arWmi);
45066 +            break;
45067 +        }
45068 +        case AR6000_XIOCTL_WMI_SET_LQTHRESHOLD:
45069 +        {
45070 +            ret = ar6000_ioctl_set_lq_threshold(dev, rq);
45071 +            break;
45072 +        }
45073 +        case AR6000_XIOCTL_WMI_SET_LPREAMBLE:
45074 +        {
45075 +            WMI_SET_LPREAMBLE_CMD setLpreambleCmd;
45076 +
45077 +            if (ar->arWmiReady == FALSE) {
45078 +                ret = -EIO;
45079 +            } else if (copy_from_user(&setLpreambleCmd, userdata,
45080 +                                   sizeof(setLpreambleCmd)))
45081 +            {
45082 +                ret = -EFAULT;
45083 +            } else {
45084 +                if (wmi_set_lpreamble_cmd(ar->arWmi, setLpreambleCmd.status)
45085 +                       != A_OK)
45086 +                {
45087 +                    ret = -EIO;
45088 +                }
45089 +            }
45090 +
45091 +            break;
45092 +        }
45093 +        case AR6000_XIOCTL_WMI_SET_RTS:
45094 +        {
45095 +            WMI_SET_RTS_CMD rtsCmd;
45096 +
45097 +            if (ar->arWmiReady == FALSE) {
45098 +                ret = -EIO;
45099 +            } else if (copy_from_user(&rtsCmd, userdata,
45100 +                                   sizeof(rtsCmd)))
45101 +            {
45102 +                ret = -EFAULT;
45103 +            } else {
45104 +                if (wmi_set_rts_cmd(ar->arWmi, rtsCmd.threshold)
45105 +                       != A_OK)
45106 +                {
45107 +                    ret = -EIO;
45108 +                }
45109 +            }
45110 +
45111 +            break;
45112 +        }
45113 +        case AR6000_XIOCTL_WMI_SET_WMM:
45114 +        {
45115 +            ret = ar6000_ioctl_set_wmm(dev, rq);
45116 +            break;
45117 +        }
45118 +        case AR6000_XIOCTL_WMI_SET_TXOP:
45119 +        {
45120 +            ret = ar6000_ioctl_set_txop(dev, rq);
45121 +            break;
45122 +        }
45123 +        case AR6000_XIOCTL_WMI_GET_RD:
45124 +        {
45125 +            ret = ar6000_ioctl_get_rd(dev, rq);
45126 +            break;
45127 +        }
45128 +        case AR6000_IOCTL_WMI_SET_CHANNELPARAMS:
45129 +        {
45130 +            ret = ar6000_ioctl_set_channelParams(dev, rq);
45131 +            break;
45132 +        }
45133 +        case AR6000_IOCTL_WMI_SET_PROBEDSSID:
45134 +        {
45135 +            ret = ar6000_ioctl_set_probedSsid(dev, rq);
45136 +            break;
45137 +        }
45138 +        case AR6000_IOCTL_WMI_SET_BADAP:
45139 +        {
45140 +            ret = ar6000_ioctl_set_badAp(dev, rq);
45141 +            break;
45142 +        }
45143 +        case AR6000_IOCTL_WMI_CREATE_QOS:
45144 +        {
45145 +            ret = ar6000_ioctl_create_qos(dev, rq);
45146 +            break;
45147 +        }
45148 +        case AR6000_IOCTL_WMI_DELETE_QOS:
45149 +        {
45150 +            ret = ar6000_ioctl_delete_qos(dev, rq);
45151 +            break;
45152 +        }
45153 +        case AR6000_IOCTL_WMI_GET_QOS_QUEUE:
45154 +        {
45155 +            ret = ar6000_ioctl_get_qos_queue(dev, rq);
45156 +            break;
45157 +        }
45158 +        case AR6000_IOCTL_WMI_GET_TARGET_STATS:
45159 +        {
45160 +            ret = ar6000_ioctl_get_target_stats(dev, rq);
45161 +            break;
45162 +        }
45163 +        case AR6000_IOCTL_WMI_SET_ERROR_REPORT_BITMASK:
45164 +        {
45165 +            ret = ar6000_ioctl_set_error_report_bitmask(dev, rq);
45166 +            break;
45167 +        }
45168 +        case AR6000_IOCTL_WMI_SET_ASSOC_INFO:
45169 +        {
45170 +            WMI_SET_ASSOC_INFO_CMD cmd;
45171 +            A_UINT8 assocInfo[WMI_MAX_ASSOC_INFO_LEN];
45172 +
45173 +            if (ar->arWmiReady == FALSE) {
45174 +                ret = -EIO;
45175 +            } else {
45176 +                get_user(cmd.ieType, userdata);
45177 +                if (cmd.ieType >= WMI_MAX_ASSOC_INFO_TYPE) {
45178 +                    ret = -EIO;
45179 +                } else {
45180 +                    get_user(cmd.bufferSize, userdata + 1);
45181 +                    if (cmd.bufferSize > WMI_MAX_ASSOC_INFO_LEN) {
45182 +                        ret = -EFAULT;
45183 +                        break;
45184 +                    }
45185 +                    if (copy_from_user(assocInfo, userdata + 2,
45186 +                                       cmd.bufferSize))
45187 +                    {
45188 +                        ret = -EFAULT;
45189 +                    } else {
45190 +                        if (wmi_associnfo_cmd(ar->arWmi, cmd.ieType,
45191 +                                                 cmd.bufferSize,
45192 +                                                 assocInfo) != A_OK)
45193 +                        {
45194 +                            ret = -EIO;
45195 +                        }
45196 +                    }
45197 +                }
45198 +            }
45199 +            break;
45200 +        }
45201 +        case AR6000_IOCTL_WMI_SET_ACCESS_PARAMS:
45202 +        {
45203 +            ret = ar6000_ioctl_set_access_params(dev, rq);
45204 +            break;
45205 +        }
45206 +        case AR6000_IOCTL_WMI_SET_DISC_TIMEOUT:
45207 +        {
45208 +            ret = ar6000_ioctl_set_disconnect_timeout(dev, rq);
45209 +            break;
45210 +        }
45211 +        case AR6000_XIOCTL_FORCE_TARGET_RESET:
45212 +        {
45213 +            if (ar->arHtcTarget)
45214 +            {
45215 +//                HTCForceReset(htcTarget);
45216 +            }
45217 +            else
45218 +            {
45219 +                AR_DEBUG_PRINTF("ar6000_ioctl cannot attempt reset.\n");
45220 +            }
45221 +            break;
45222 +        }
45223 +        case AR6000_XIOCTL_TARGET_INFO:
45224 +        case AR6000_XIOCTL_CHECK_TARGET_READY: /* backwards compatibility */
45225 +        {
45226 +            /* If we made it to here, then the Target exists and is ready. */
45227 +
45228 +            if (cmd == AR6000_XIOCTL_TARGET_INFO) {
45229 +                if (copy_to_user((A_UINT32 *)rq->ifr_data, &ar->arVersion.target_ver,
45230 +                                 sizeof(ar->arVersion.target_ver)))
45231 +                {
45232 +                    ret = -EFAULT;
45233 +                }
45234 +                if (copy_to_user(((A_UINT32 *)rq->ifr_data)+1, &ar->arTargetType,
45235 +                                 sizeof(ar->arTargetType)))
45236 +                {
45237 +                    ret = -EFAULT;
45238 +                }
45239 +            }
45240 +            break;
45241 +        }
45242 +        case AR6000_XIOCTL_WMI_SET_HB_CHALLENGE_RESP_PARAMS:
45243 +        {
45244 +            WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD hbparam;
45245 +
45246 +            if (copy_from_user(&hbparam, userdata, sizeof(hbparam)))
45247 +            {
45248 +                ret = -EFAULT;
45249 +            } else {
45250 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
45251 +                /* Start a cyclic timer with the parameters provided. */
45252 +                if (hbparam.frequency) {
45253 +                    ar->arHBChallengeResp.frequency = hbparam.frequency;
45254 +                }
45255 +                if (hbparam.threshold) {
45256 +                    ar->arHBChallengeResp.missThres = hbparam.threshold;
45257 +                }
45258 +
45259 +                /* Delete the pending timer and start a new one */
45260 +                if (timer_pending(&ar->arHBChallengeResp.timer)) {
45261 +                    A_UNTIMEOUT(&ar->arHBChallengeResp.timer);
45262 +                }
45263 +                A_TIMEOUT_MS(&ar->arHBChallengeResp.timer, ar->arHBChallengeResp.frequency * 1000, 0);
45264 +                AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45265 +            }
45266 +            break;
45267 +        }
45268 +        case AR6000_XIOCTL_WMI_GET_HB_CHALLENGE_RESP:
45269 +        {
45270 +            A_UINT32 cookie;
45271 +
45272 +            if (copy_from_user(&cookie, userdata, sizeof(cookie))) {
45273 +                return -EFAULT;
45274 +            }
45275 +
45276 +            /* Send the challenge on the control channel */
45277 +            if (wmi_get_challenge_resp_cmd(ar->arWmi, cookie, APP_HB_CHALLENGE) != A_OK) {
45278 +                return -EIO;
45279 +            }
45280 +            break;
45281 +        }
45282 +#ifdef USER_KEYS
45283 +        case AR6000_XIOCTL_USER_SETKEYS:
45284 +        {
45285 +
45286 +            ar->user_savedkeys_stat = USER_SAVEDKEYS_STAT_RUN;
45287 +
45288 +            if (copy_from_user(&ar->user_key_ctrl, userdata,
45289 +                               sizeof(ar->user_key_ctrl)))
45290 +            {
45291 +                return -EFAULT;
45292 +            }
45293 +
45294 +            A_PRINTF("ar6000 USER set key %x\n", ar->user_key_ctrl);
45295 +            break;
45296 +        }
45297 +#endif /* USER_KEYS */
45298 +
45299 +#ifdef CONFIG_HOST_GPIO_SUPPORT
45300 +        case AR6000_XIOCTL_GPIO_OUTPUT_SET:
45301 +        {
45302 +            struct ar6000_gpio_output_set_cmd_s gpio_output_set_cmd;
45303 +
45304 +            if (ar->arWmiReady == FALSE) {
45305 +                return -EIO;
45306 +            }
45307 +            if (down_interruptible(&ar->arSem)) {
45308 +                return -ERESTARTSYS;
45309 +            }
45310 +
45311 +            if (copy_from_user(&gpio_output_set_cmd, userdata,
45312 +                                sizeof(gpio_output_set_cmd)))
45313 +            {
45314 +                ret = -EFAULT;
45315 +            } else {
45316 +                ret = ar6000_gpio_output_set(dev,
45317 +                                             gpio_output_set_cmd.set_mask,
45318 +                                             gpio_output_set_cmd.clear_mask,
45319 +                                             gpio_output_set_cmd.enable_mask,
45320 +                                             gpio_output_set_cmd.disable_mask);
45321 +                if (ret != A_OK) {
45322 +                    ret = EIO;
45323 +                }
45324 +            }
45325 +            up(&ar->arSem);
45326 +            break;
45327 +        }
45328 +        case AR6000_XIOCTL_GPIO_INPUT_GET:
45329 +        {
45330 +            if (ar->arWmiReady == FALSE) {
45331 +                return -EIO;
45332 +            }
45333 +            if (down_interruptible(&ar->arSem)) {
45334 +                return -ERESTARTSYS;
45335 +            }
45336 +
45337 +            ret = ar6000_gpio_input_get(dev);
45338 +            if (ret != A_OK) {
45339 +                up(&ar->arSem);
45340 +                return -EIO;
45341 +            }
45342 +
45343 +            /* Wait for Target to respond. */
45344 +            wait_event_interruptible(arEvent, gpio_data_available);
45345 +            if (signal_pending(current)) {
45346 +                ret = -EINTR;
45347 +            } else {
45348 +                A_ASSERT(gpio_reg_results.gpioreg_id == GPIO_ID_NONE);
45349 +
45350 +                if (copy_to_user(userdata, &gpio_reg_results.value,
45351 +                                 sizeof(gpio_reg_results.value)))
45352 +                {
45353 +                    ret = -EFAULT;
45354 +                }
45355 +            }
45356 +            up(&ar->arSem);
45357 +            break;
45358 +        }
45359 +        case AR6000_XIOCTL_GPIO_REGISTER_SET:
45360 +        {
45361 +            struct ar6000_gpio_register_cmd_s gpio_register_cmd;
45362 +
45363 +            if (ar->arWmiReady == FALSE) {
45364 +                return -EIO;
45365 +            }
45366 +            if (down_interruptible(&ar->arSem)) {
45367 +                return -ERESTARTSYS;
45368 +            }
45369 +
45370 +            if (copy_from_user(&gpio_register_cmd, userdata,
45371 +                                sizeof(gpio_register_cmd)))
45372 +            {
45373 +                ret = -EFAULT;
45374 +            } else {
45375 +                ret = ar6000_gpio_register_set(dev,
45376 +                                               gpio_register_cmd.gpioreg_id,
45377 +                                               gpio_register_cmd.value);
45378 +                if (ret != A_OK) {
45379 +                    ret = EIO;
45380 +                }
45381 +
45382 +                /* Wait for acknowledgement from Target */
45383 +                wait_event_interruptible(arEvent, gpio_ack_received);
45384 +                if (signal_pending(current)) {
45385 +                    ret = -EINTR;
45386 +                }
45387 +            }
45388 +            up(&ar->arSem);
45389 +            break;
45390 +        }
45391 +        case AR6000_XIOCTL_GPIO_REGISTER_GET:
45392 +        {
45393 +            struct ar6000_gpio_register_cmd_s gpio_register_cmd;
45394 +
45395 +            if (ar->arWmiReady == FALSE) {
45396 +                return -EIO;
45397 +            }
45398 +            if (down_interruptible(&ar->arSem)) {
45399 +                return -ERESTARTSYS;
45400 +            }
45401 +
45402 +            if (copy_from_user(&gpio_register_cmd, userdata,
45403 +                                sizeof(gpio_register_cmd)))
45404 +            {
45405 +                ret = -EFAULT;
45406 +            } else {
45407 +                ret = ar6000_gpio_register_get(dev, gpio_register_cmd.gpioreg_id);
45408 +                if (ret != A_OK) {
45409 +                    up(&ar->arSem);
45410 +                    return -EIO;
45411 +                }
45412 +
45413 +                /* Wait for Target to respond. */
45414 +                wait_event_interruptible(arEvent, gpio_data_available);
45415 +                if (signal_pending(current)) {
45416 +                    ret = -EINTR;
45417 +                } else {
45418 +                    A_ASSERT(gpio_register_cmd.gpioreg_id == gpio_reg_results.gpioreg_id);
45419 +                    if (copy_to_user(userdata, &gpio_reg_results,
45420 +                                     sizeof(gpio_reg_results)))
45421 +                    {
45422 +                        ret = -EFAULT;
45423 +                    }
45424 +                }
45425 +            }
45426 +            up(&ar->arSem);
45427 +            break;
45428 +        }
45429 +        case AR6000_XIOCTL_GPIO_INTR_ACK:
45430 +        {
45431 +            struct ar6000_gpio_intr_ack_cmd_s gpio_intr_ack_cmd;
45432 +
45433 +            if (ar->arWmiReady == FALSE) {
45434 +                return -EIO;
45435 +            }
45436 +            if (down_interruptible(&ar->arSem)) {
45437 +                return -ERESTARTSYS;
45438 +            }
45439 +
45440 +            if (copy_from_user(&gpio_intr_ack_cmd, userdata,
45441 +                                sizeof(gpio_intr_ack_cmd)))
45442 +            {
45443 +                ret = -EFAULT;
45444 +            } else {
45445 +                ret = ar6000_gpio_intr_ack(dev, gpio_intr_ack_cmd.ack_mask);
45446 +                if (ret != A_OK) {
45447 +                    ret = EIO;
45448 +                }
45449 +            }
45450 +            up(&ar->arSem);
45451 +            break;
45452 +        }
45453 +        case AR6000_XIOCTL_GPIO_INTR_WAIT:
45454 +        {
45455 +            /* Wait for Target to report an interrupt. */
45456 +            dev_hold(dev);
45457 +            rtnl_unlock();
45458 +            wait_event_interruptible(arEvent, gpio_intr_available);
45459 +            rtnl_lock();
45460 +            __dev_put(dev);
45461 +
45462 +            if (signal_pending(current)) {
45463 +                ret = -EINTR;
45464 +            } else {
45465 +                if (copy_to_user(userdata, &gpio_intr_results,
45466 +                                 sizeof(gpio_intr_results)))
45467 +                {
45468 +                    ret = -EFAULT;
45469 +                }
45470 +            }
45471 +            break;
45472 +        }
45473 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
45474 +
45475 +        case AR6000_XIOCTL_DBGLOG_CFG_MODULE:
45476 +        {
45477 +            struct ar6000_dbglog_module_config_s config;
45478 +
45479 +            if (copy_from_user(&config, userdata, sizeof(config))) {
45480 +                return -EFAULT;
45481 +            }
45482 +
45483 +            /* Send the challenge on the control channel */
45484 +            if (wmi_config_debug_module_cmd(ar->arWmi, config.mmask,
45485 +                                            config.tsr, config.rep,
45486 +                                            config.size, config.valid) != A_OK)
45487 +            {
45488 +                return -EIO;
45489 +            }
45490 +            break;
45491 +        }
45492 +
45493 +        case AR6000_XIOCTL_DBGLOG_GET_DEBUG_LOGS:
45494 +        {
45495 +            /* Send the challenge on the control channel */
45496 +            if (ar6000_dbglog_get_debug_logs(ar) != A_OK)
45497 +            {
45498 +                return -EIO;
45499 +            }
45500 +            break;
45501 +        }
45502 +
45503 +        case AR6000_XIOCTL_SET_ADHOC_BSSID:
45504 +        {
45505 +            WMI_SET_ADHOC_BSSID_CMD adhocBssid;
45506 +
45507 +            if (ar->arWmiReady == FALSE) {
45508 +                ret = -EIO;
45509 +            } else if (copy_from_user(&adhocBssid, userdata,
45510 +                                      sizeof(adhocBssid)))
45511 +            {
45512 +                ret = -EFAULT;
45513 +            } else if (A_MEMCMP(adhocBssid.bssid, bcast_mac,
45514 +                                AR6000_ETH_ADDR_LEN) == 0)
45515 +            {
45516 +                ret = -EFAULT;
45517 +            } else {
45518 +
45519 +                A_MEMCPY(ar->arReqBssid, adhocBssid.bssid, sizeof(ar->arReqBssid));
45520 +        }
45521 +            break;
45522 +        }
45523 +
45524 +        case AR6000_XIOCTL_SET_OPT_MODE:
45525 +        {
45526 +        WMI_SET_OPT_MODE_CMD optModeCmd;
45527 +            AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
45528 +
45529 +            if (ar->arWmiReady == FALSE) {
45530 +                ret = -EIO;
45531 +            } else if (copy_from_user(&optModeCmd, userdata,
45532 +                                      sizeof(optModeCmd)))
45533 +            {
45534 +                ret = -EFAULT;
45535 +            } else if (ar->arConnected && optModeCmd.optMode == SPECIAL_ON) {
45536 +                ret = -EFAULT;
45537 +
45538 +            } else if (wmi_set_opt_mode_cmd(ar->arWmi, optModeCmd.optMode)
45539 +                       != A_OK)
45540 +            {
45541 +                ret = -EIO;
45542 +            }
45543 +            break;
45544 +        }
45545 +
45546 +        case AR6000_XIOCTL_OPT_SEND_FRAME:
45547 +        {
45548 +        WMI_OPT_TX_FRAME_CMD optTxFrmCmd;
45549 +            A_UINT8 data[MAX_OPT_DATA_LEN];
45550 +
45551 +            if (ar->arWmiReady == FALSE) {
45552 +                ret = -EIO;
45553 +            } else if (copy_from_user(&optTxFrmCmd, userdata,
45554 +                                      sizeof(optTxFrmCmd)))
45555 +            {
45556 +                ret = -EFAULT;
45557 +            } else if (copy_from_user(data,
45558 +                                      userdata+sizeof(WMI_OPT_TX_FRAME_CMD)-1,
45559 +                                      optTxFrmCmd.optIEDataLen))
45560 +            {
45561 +                ret = -EFAULT;
45562 +            } else {
45563 +                ret = wmi_opt_tx_frame_cmd(ar->arWmi,
45564 +                                           optTxFrmCmd.frmType,
45565 +                                           optTxFrmCmd.dstAddr,
45566 +                                           optTxFrmCmd.bssid,
45567 +                                           optTxFrmCmd.optIEDataLen,
45568 +                                           data);
45569 +            }
45570 +
45571 +            break;
45572 +        }
45573 +        case AR6000_XIOCTL_WMI_SETRETRYLIMITS:
45574 +        {
45575 +            WMI_SET_RETRY_LIMITS_CMD setRetryParams;
45576 +
45577 +            if (ar->arWmiReady == FALSE) {
45578 +                ret = -EIO;
45579 +            } else if (copy_from_user(&setRetryParams, userdata,
45580 +                                      sizeof(setRetryParams)))
45581 +            {
45582 +                ret = -EFAULT;
45583 +            } else {
45584 +                if (wmi_set_retry_limits_cmd(ar->arWmi, setRetryParams.frameType,
45585 +                                          setRetryParams.trafficClass,
45586 +                                          setRetryParams.maxRetries,
45587 +                                          setRetryParams.enableNotify) != A_OK)
45588 +                {
45589 +                    ret = -EIO;
45590 +                }
45591 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
45592 +                ar->arMaxRetries = setRetryParams.maxRetries;
45593 +                AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45594 +            }
45595 +            break;
45596 +        }
45597 +
45598 +        case AR6000_XIOCTL_SET_ADHOC_BEACON_INTVAL:
45599 +        {
45600 +            WMI_BEACON_INT_CMD bIntvlCmd;
45601 +
45602 +            if (ar->arWmiReady == FALSE) {
45603 +                ret = -EIO;
45604 +            } else if (copy_from_user(&bIntvlCmd, userdata,
45605 +                       sizeof(bIntvlCmd)))
45606 +            {
45607 +                ret = -EFAULT;
45608 +            } else if (wmi_set_adhoc_bconIntvl_cmd(ar->arWmi, bIntvlCmd.beaconInterval)
45609 +                        != A_OK)
45610 +            {
45611 +                ret = -EIO;
45612 +            }
45613 +            break;
45614 +        }
45615 +        case IEEE80211_IOCTL_SETAUTHALG:
45616 +        {
45617 +            AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
45618 +            struct ieee80211req_authalg req;
45619 +
45620 +            if (ar->arWmiReady == FALSE) {
45621 +                ret = -EIO;
45622 +            } else if (copy_from_user(&req, userdata,
45623 +                       sizeof(struct ieee80211req_authalg)))
45624 +            {
45625 +                ret = -EFAULT;
45626 +            } else if (req.auth_alg == AUTH_ALG_OPEN_SYSTEM) {
45627 +                ar->arDot11AuthMode  = OPEN_AUTH;
45628 +                ar->arPairwiseCrypto  = NONE_CRYPT;
45629 +                ar->arGroupCrypto     = NONE_CRYPT;
45630 +            } else if (req.auth_alg == AUTH_ALG_LEAP) {
45631 +                ar->arDot11AuthMode   = LEAP_AUTH;
45632 +            } else {
45633 +                ret = -EIO;
45634 +            }
45635 +            break;
45636 +        }
45637 +
45638 +        case AR6000_XIOCTL_SET_VOICE_PKT_SIZE:
45639 +            ret = ar6000_xioctl_set_voice_pkt_size(dev, userdata);
45640 +            break;
45641 +
45642 +        case AR6000_XIOCTL_SET_MAX_SP:
45643 +            ret = ar6000_xioctl_set_max_sp_len(dev, userdata);
45644 +            break;
45645 +
45646 +        case AR6000_XIOCTL_WMI_GET_ROAM_TBL:
45647 +            ret = ar6000_ioctl_get_roam_tbl(dev, rq);
45648 +            break;
45649 +        case AR6000_XIOCTL_WMI_SET_ROAM_CTRL:
45650 +            ret = ar6000_ioctl_set_roam_ctrl(dev, userdata);
45651 +            break;
45652 +        case AR6000_XIOCTRL_WMI_SET_POWERSAVE_TIMERS:
45653 +            ret = ar6000_ioctl_set_powersave_timers(dev, userdata);
45654 +            break;
45655 +        case AR6000_XIOCTRL_WMI_GET_POWER_MODE:
45656 +            ret = ar6000_ioctl_get_power_mode(dev, rq);
45657 +            break;
45658 +        case AR6000_XIOCTRL_WMI_SET_WLAN_STATE:
45659 +            get_user(ar->arWlanState, (unsigned int *)userdata);
45660 +            if (ar->arWmiReady == FALSE) {
45661 +                ret = -EIO;
45662 +                break;
45663 +            }
45664 +
45665 +            if (ar->arWlanState == WLAN_ENABLED) {
45666 +                /* Enable foreground scanning */
45667 +                if (wmi_scanparams_cmd(ar->arWmi, scParams.fg_start_period,
45668 +                                       scParams.fg_end_period,
45669 +                                       scParams.bg_period,
45670 +                                       scParams.minact_chdwell_time,
45671 +                                       scParams.maxact_chdwell_time,
45672 +                                       scParams.pas_chdwell_time,
45673 +                                       scParams.shortScanRatio,
45674 +                                       scParams.scanCtrlFlags,
45675 +                                       scParams.max_dfsch_act_time) != A_OK)
45676 +                {
45677 +                    ret = -EIO;
45678 +                }
45679 +                if (ar->arSsidLen) {
45680 +                    ar->arConnectPending = TRUE;
45681 +                    if (wmi_connect_cmd(ar->arWmi, ar->arNetworkType,
45682 +                                        ar->arDot11AuthMode, ar->arAuthMode,
45683 +                                        ar->arPairwiseCrypto,
45684 +                                        ar->arPairwiseCryptoLen,
45685 +                                        ar->arGroupCrypto, ar->arGroupCryptoLen,
45686 +                                        ar->arSsidLen, ar->arSsid,
45687 +                                        ar->arReqBssid, ar->arChannelHint,
45688 +                                        ar->arConnectCtrlFlags) != A_OK)
45689 +                    {
45690 +                        ret = -EIO;
45691 +                        ar->arConnectPending = FALSE;
45692 +                    }
45693 +                }
45694 +            } else {
45695 +                /* Disconnect from the AP and disable foreground scanning */
45696 +                AR6000_SPIN_LOCK(&ar->arLock, 0);
45697 +                if (ar->arConnected == TRUE || ar->arConnectPending == TRUE) {
45698 +                    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45699 +                    wmi_disconnect_cmd(ar->arWmi);
45700 +                } else {
45701 +                    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45702 +                }
45703 +
45704 +                if (wmi_scanparams_cmd(ar->arWmi, 0xFFFF, 0, 0, 0, 0, 0, 0, 0xFF, 0) != A_OK)
45705 +                {
45706 +                    ret = -EIO;
45707 +                }
45708 +            }
45709 +            break;
45710 +        case AR6000_XIOCTL_WMI_GET_ROAM_DATA:
45711 +            ret = ar6000_ioctl_get_roam_data(dev, rq);
45712 +            break;
45713 +        case AR6000_XIOCTL_WMI_SET_BT_STATUS:
45714 +            ret = ar6000_xioctl_set_bt_status_cmd(dev, userdata);
45715 +            break;
45716 +        case AR6000_XIOCTL_WMI_SET_BT_PARAMS:
45717 +            ret = ar6000_xioctl_set_bt_params_cmd(dev, userdata);
45718 +            break;
45719 +        case AR6000_XIOCTL_WMI_STARTSCAN:
45720 +        {
45721 +            WMI_START_SCAN_CMD setStartScanCmd;
45722 +
45723 +            if (ar->arWmiReady == FALSE) {
45724 +                    ret = -EIO;
45725 +                } else if (copy_from_user(&setStartScanCmd, userdata,
45726 +                                          sizeof(setStartScanCmd)))
45727 +                {
45728 +                    ret = -EFAULT;
45729 +                } else {
45730 +                    if (wmi_startscan_cmd(ar->arWmi, setStartScanCmd.scanType,
45731 +                                    setStartScanCmd.forceFgScan,
45732 +                                    setStartScanCmd.isLegacy,
45733 +                                    setStartScanCmd.homeDwellTime,
45734 +                                    setStartScanCmd.forceScanInterval) != A_OK)
45735 +                    {
45736 +                        ret = -EIO;
45737 +                    }
45738 +                }
45739 +            break;
45740 +        }
45741 +        case AR6000_XIOCTL_WMI_SETFIXRATES:
45742 +        {
45743 +            WMI_FIX_RATES_CMD setFixRatesCmd;
45744 +            A_STATUS returnStatus;
45745 +
45746 +            if (ar->arWmiReady == FALSE) {
45747 +                    ret = -EIO;
45748 +                } else if (copy_from_user(&setFixRatesCmd, userdata,
45749 +                                          sizeof(setFixRatesCmd)))
45750 +                {
45751 +                    ret = -EFAULT;
45752 +                } else {
45753 +                    returnStatus = wmi_set_fixrates_cmd(ar->arWmi, setFixRatesCmd.fixRateMask);
45754 +                    if (returnStatus == A_EINVAL)
45755 +                    {
45756 +                        ret = -EINVAL;
45757 +                    }
45758 +                    else if(returnStatus != A_OK) {
45759 +                        ret = -EIO;
45760 +                    }
45761 +                }
45762 +            break;
45763 +        }
45764 +
45765 +        case AR6000_XIOCTL_WMI_GETFIXRATES:
45766 +        {
45767 +            WMI_FIX_RATES_CMD getFixRatesCmd;
45768 +            AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
45769 +            int ret = 0;
45770 +
45771 +            if (ar->arWmiReady == FALSE) {
45772 +                return -EIO;
45773 +            }
45774 +
45775 +            if (down_interruptible(&ar->arSem)) {
45776 +                return -ERESTARTSYS;
45777 +            }
45778 +            /* Used copy_from_user/copy_to_user to access user space data */
45779 +            if (copy_from_user(&getFixRatesCmd, userdata, sizeof(getFixRatesCmd))) {
45780 +                ret = -EFAULT;
45781 +            } else {
45782 +                ar->arRateMask = 0xFFFF;
45783 +
45784 +                if (wmi_get_ratemask_cmd(ar->arWmi) != A_OK) {
45785 +                    up(&ar->arSem);
45786 +                    return -EIO;
45787 +                }
45788 +
45789 +                wait_event_interruptible_timeout(arEvent, ar->arRateMask != 0xFFFF, wmitimeout * HZ);
45790 +
45791 +                if (signal_pending(current)) {
45792 +                    ret = -EINTR;
45793 +                }
45794 +
45795 +                if (!ret) {
45796 +                    getFixRatesCmd.fixRateMask = ar->arRateMask;
45797 +                }
45798 +
45799 +                if(copy_to_user(userdata, &getFixRatesCmd, sizeof(getFixRatesCmd))) {
45800 +                   ret = -EFAULT;
45801 +                }
45802 +
45803 +                up(&ar->arSem);
45804 +            }
45805 +            break;
45806 +        }
45807 +        case AR6000_XIOCTL_WMI_SET_AUTHMODE:
45808 +        {
45809 +            WMI_SET_AUTH_MODE_CMD setAuthMode;
45810 +
45811 +            if (ar->arWmiReady == FALSE) {
45812 +                ret = -EIO;
45813 +            } else if (copy_from_user(&setAuthMode, userdata,
45814 +                                      sizeof(setAuthMode)))
45815 +            {
45816 +                ret = -EFAULT;
45817 +            } else {
45818 +                if (wmi_set_authmode_cmd(ar->arWmi, setAuthMode.mode) != A_OK)
45819 +                {
45820 +                    ret = -EIO;
45821 +                }
45822 +            }
45823 +            break;
45824 +        }
45825 +        case AR6000_XIOCTL_WMI_SET_REASSOCMODE:
45826 +        {
45827 +            WMI_SET_REASSOC_MODE_CMD setReassocMode;
45828 +
45829 +            if (ar->arWmiReady == FALSE) {
45830 +                ret = -EIO;
45831 +            } else if (copy_from_user(&setReassocMode, userdata,
45832 +                                      sizeof(setReassocMode)))
45833 +            {
45834 +                ret = -EFAULT;
45835 +            } else {
45836 +                if (wmi_set_reassocmode_cmd(ar->arWmi, setReassocMode.mode) != A_OK)
45837 +                {
45838 +                    ret = -EIO;
45839 +                }
45840 +            }
45841 +            break;
45842 +        }
45843 +        case AR6000_XIOCTL_DIAG_READ:
45844 +        {
45845 +            A_UINT32 addr, data;
45846 +            get_user(addr, (unsigned int *)userdata);
45847 +            if (ar6000_ReadRegDiag(ar->arHifDevice, &addr, &data) != A_OK) {
45848 +                ret = -EIO;
45849 +            }
45850 +            put_user(data, (unsigned int *)userdata + 1);
45851 +            break;
45852 +        }
45853 +        case AR6000_XIOCTL_DIAG_WRITE:
45854 +        {
45855 +            A_UINT32 addr, data;
45856 +            get_user(addr, (unsigned int *)userdata);
45857 +            get_user(data, (unsigned int *)userdata + 1);
45858 +            if (ar6000_WriteRegDiag(ar->arHifDevice, &addr, &data) != A_OK) {
45859 +                ret = -EIO;
45860 +            }
45861 +            break;
45862 +        }
45863 +        case AR6000_XIOCTL_WMI_SET_KEEPALIVE:
45864 +        {
45865 +             WMI_SET_KEEPALIVE_CMD setKeepAlive;
45866 +             if (ar->arWmiReady == FALSE) {
45867 +                 return -EIO;
45868 +             } else if (copy_from_user(&setKeepAlive, userdata,
45869 +                        sizeof(setKeepAlive))){
45870 +                 ret = -EFAULT;
45871 +             } else {
45872 +                 if (wmi_set_keepalive_cmd(ar->arWmi, setKeepAlive.keepaliveInterval) != A_OK) {
45873 +                     ret = -EIO;
45874 +               }
45875 +             }
45876 +             break;
45877 +        }
45878 +        case AR6000_XIOCTL_WMI_GET_KEEPALIVE:
45879 +        {
45880 +            AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
45881 +            WMI_GET_KEEPALIVE_CMD getKeepAlive;
45882 +            int ret = 0;
45883 +            if (ar->arWmiReady == FALSE) {
45884 +               return -EIO;
45885 +            }
45886 +            if (down_interruptible(&ar->arSem)) {
45887 +                return -ERESTARTSYS;
45888 +            }
45889 +            if (copy_from_user(&getKeepAlive, userdata,sizeof(getKeepAlive))) {
45890 +               ret = -EFAULT;
45891 +            } else {
45892 +            getKeepAlive.keepaliveInterval = wmi_get_keepalive_cmd(ar->arWmi);
45893 +            ar->arKeepaliveConfigured = 0xFF;
45894 +            if (wmi_get_keepalive_configured(ar->arWmi) != A_OK){
45895 +                up(&ar->arSem);
45896 +                return -EIO;
45897 +            }
45898 +            wait_event_interruptible_timeout(arEvent, ar->arKeepaliveConfigured != 0xFF, wmitimeout * HZ);
45899 +            if (signal_pending(current)) {
45900 +                ret = -EINTR;
45901 +            }
45902 +
45903 +            if (!ret) {
45904 +                getKeepAlive.configured = ar->arKeepaliveConfigured;
45905 +            }
45906 +            if (copy_to_user(userdata, &getKeepAlive, sizeof(getKeepAlive))) {
45907 +               ret = -EFAULT;
45908 +            }
45909 +            up(&ar->arSem);
45910 +            }
45911 +            break;
45912 +        }
45913 +        case AR6000_XIOCTL_WMI_SET_APPIE:
45914 +        {
45915 +            WMI_SET_APPIE_CMD appIEcmd;
45916 +            A_UINT8           appIeInfo[IEEE80211_APPIE_FRAME_MAX_LEN];
45917 +            A_UINT32            fType,ieLen;
45918 +
45919 +           if (ar->arWmiReady == FALSE) {
45920 +                   return -EIO;
45921 +           }
45922 +           get_user(fType, (A_UINT32 *)userdata);
45923 +           appIEcmd.mgmtFrmType = fType;
45924 +           if (appIEcmd.mgmtFrmType >= IEEE80211_APPIE_NUM_OF_FRAME) {
45925 +                   ret = -EIO;
45926 +           } else {
45927 +                   get_user(ieLen, (A_UINT32 *)(userdata + 4));
45928 +                   appIEcmd.ieLen = ieLen;
45929 +                   if (appIEcmd.ieLen > IEEE80211_APPIE_FRAME_MAX_LEN) {
45930 +                           ret = -EIO;
45931 +                           break;
45932 +                   }
45933 +                   if (copy_from_user(appIeInfo, userdata + 8, appIEcmd.ieLen)) {
45934 +                           ret = -EFAULT;
45935 +                   } else {
45936 +                           if (wmi_set_appie_cmd(ar->arWmi, appIEcmd.mgmtFrmType,
45937 +                                                 appIEcmd.ieLen,  appIeInfo) != A_OK)
45938 +                           {
45939 +                                   ret = -EIO;
45940 +                           }
45941 +                   }
45942 +            }
45943 +            break;
45944 +        }
45945 +        case AR6000_XIOCTL_WMI_SET_MGMT_FRM_RX_FILTER:
45946 +        {
45947 +            WMI_BSS_FILTER_CMD cmd;
45948 +            A_UINT32    filterType;
45949 +
45950 +            if (copy_from_user(&filterType, userdata, sizeof(A_UINT32)))
45951 +            {
45952 +                return -EFAULT;
45953 +            }
45954 +            if (filterType & (IEEE80211_FILTER_TYPE_BEACON |
45955 +                                    IEEE80211_FILTER_TYPE_PROBE_RESP))
45956 +            {
45957 +                cmd.bssFilter = ALL_BSS_FILTER;
45958 +            } else {
45959 +                cmd.bssFilter = NONE_BSS_FILTER;
45960 +            }
45961 +            if (wmi_bssfilter_cmd(ar->arWmi, cmd.bssFilter, 0) != A_OK) {
45962 +                ret = -EIO;
45963 +            }
45964 +
45965 +            AR6000_SPIN_LOCK(&ar->arLock, 0);
45966 +            ar->arMgmtFilter = filterType;
45967 +            AR6000_SPIN_UNLOCK(&ar->arLock, 0);
45968 +            break;
45969 +        }
45970 +        case AR6000_XIOCTL_WMI_SET_WSC_STATUS:
45971 +        {
45972 +            A_UINT32    wsc_status;
45973 +
45974 +            if (copy_from_user(&wsc_status, userdata, sizeof(A_UINT32)))
45975 +            {
45976 +                return -EFAULT;
45977 +            }
45978 +            if (wmi_set_wsc_status_cmd(ar->arWmi, wsc_status) != A_OK) {
45979 +                ret = -EIO;
45980 +            }
45981 +            break;
45982 +        }
45983 +        case AR6000_XIOCTL_BMI_ROMPATCH_INSTALL:
45984 +        {
45985 +            A_UINT32 ROM_addr;
45986 +            A_UINT32 RAM_addr;
45987 +            A_UINT32 nbytes;
45988 +            A_UINT32 do_activate;
45989 +            A_UINT32 rompatch_id;
45990 +
45991 +            get_user(ROM_addr, (A_UINT32 *)userdata);
45992 +            get_user(RAM_addr, (A_UINT32 *)userdata + 1);
45993 +            get_user(nbytes, (A_UINT32 *)userdata + 2);
45994 +            get_user(do_activate, (A_UINT32 *)userdata + 3);
45995 +            AR_DEBUG_PRINTF("Install rompatch from ROM: 0x%x to RAM: 0x%x  length: %d\n",
45996 +                             ROM_addr, RAM_addr, nbytes);
45997 +            ret = BMIrompatchInstall(hifDevice, ROM_addr, RAM_addr,
45998 +                                        nbytes, do_activate, &rompatch_id);
45999 +            if (ret == A_OK) {
46000 +                put_user(rompatch_id, (unsigned int *)rq->ifr_data); /* return value */
46001 +            }
46002 +            break;
46003 +        }
46004 +
46005 +        case AR6000_XIOCTL_BMI_ROMPATCH_UNINSTALL:
46006 +        {
46007 +            A_UINT32 rompatch_id;
46008 +
46009 +            get_user(rompatch_id, (A_UINT32 *)userdata);
46010 +            AR_DEBUG_PRINTF("UNinstall rompatch_id %d\n", rompatch_id);
46011 +            ret = BMIrompatchUninstall(hifDevice, rompatch_id);
46012 +            break;
46013 +        }
46014 +
46015 +        case AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE:
46016 +        case AR6000_XIOCTL_BMI_ROMPATCH_DEACTIVATE:
46017 +        {
46018 +            A_UINT32 rompatch_count;
46019 +
46020 +            get_user(rompatch_count, (A_UINT32 *)userdata);
46021 +            AR_DEBUG_PRINTF("Change rompatch activation count=%d\n", rompatch_count);
46022 +            length = sizeof(A_UINT32) * rompatch_count;
46023 +            if ((buffer = (unsigned char *)A_MALLOC(length)) != NULL) {
46024 +                A_MEMZERO(buffer, length);
46025 +                if (copy_from_user(buffer, &userdata[sizeof(rompatch_count)], length))
46026 +                {
46027 +                    ret = -EFAULT;
46028 +                } else {
46029 +                    if (cmd == AR6000_XIOCTL_BMI_ROMPATCH_ACTIVATE) {
46030 +                        ret = BMIrompatchActivate(hifDevice, rompatch_count, (A_UINT32 *)buffer);
46031 +                    } else {
46032 +                        ret = BMIrompatchDeactivate(hifDevice, rompatch_count, (A_UINT32 *)buffer);
46033 +                    }
46034 +                }
46035 +                A_FREE(buffer);
46036 +            } else {
46037 +                ret = -ENOMEM;
46038 +            }
46039 +
46040 +            break;
46041 +        }
46042 +
46043 +        case AR6000_XIOCTL_WMI_SET_HOST_SLEEP_MODE:
46044 +        {
46045 +            WMI_SET_HOST_SLEEP_MODE_CMD setHostSleepMode;
46046 +
46047 +            if (ar->arWmiReady == FALSE) {
46048 +                ret = -EIO;
46049 +            } else if (copy_from_user(&setHostSleepMode, userdata,
46050 +                                      sizeof(setHostSleepMode)))
46051 +            {
46052 +                ret = -EFAULT;
46053 +            } else {
46054 +                if (wmi_set_host_sleep_mode_cmd(ar->arWmi,
46055 +                                &setHostSleepMode) != A_OK)
46056 +                {
46057 +                    ret = -EIO;
46058 +                }
46059 +            }
46060 +            break;
46061 +        }
46062 +        case AR6000_XIOCTL_WMI_SET_WOW_MODE:
46063 +        {
46064 +            WMI_SET_WOW_MODE_CMD setWowMode;
46065 +
46066 +            if (ar->arWmiReady == FALSE) {
46067 +                ret = -EIO;
46068 +            } else if (copy_from_user(&setWowMode, userdata,
46069 +                                      sizeof(setWowMode)))
46070 +            {
46071 +                ret = -EFAULT;
46072 +            } else {
46073 +                if (wmi_set_wow_mode_cmd(ar->arWmi,
46074 +                                &setWowMode) != A_OK)
46075 +                {
46076 +                    ret = -EIO;
46077 +                }
46078 +            }
46079 +            break;
46080 +        }
46081 +        case AR6000_XIOCTL_WMI_GET_WOW_LIST:
46082 +        {
46083 +            WMI_GET_WOW_LIST_CMD getWowList;
46084 +
46085 +            if (ar->arWmiReady == FALSE) {
46086 +                ret = -EIO;
46087 +            } else if (copy_from_user(&getWowList, userdata,
46088 +                                      sizeof(getWowList)))
46089 +            {
46090 +                ret = -EFAULT;
46091 +            } else {
46092 +                if (wmi_get_wow_list_cmd(ar->arWmi,
46093 +                                &getWowList) != A_OK)
46094 +                {
46095 +                    ret = -EIO;
46096 +                }
46097 +            }
46098 +            break;
46099 +        }
46100 +        case AR6000_XIOCTL_WMI_ADD_WOW_PATTERN:
46101 +        {
46102 +#define WOW_PATTERN_SIZE 64
46103 +#define WOW_MASK_SIZE 64
46104 +
46105 +            WMI_ADD_WOW_PATTERN_CMD cmd;
46106 +            A_UINT8 mask_data[WOW_PATTERN_SIZE]={0};
46107 +            A_UINT8 pattern_data[WOW_PATTERN_SIZE]={0};
46108 +
46109 +            if (ar->arWmiReady == FALSE) {
46110 +                ret = -EIO;
46111 +            } else {
46112 +
46113 +                if(copy_from_user(&cmd, userdata,
46114 +                            sizeof(WMI_ADD_WOW_PATTERN_CMD)))
46115 +                      return -EFAULT;
46116 +                if (copy_from_user(pattern_data,
46117 +                                      userdata + 3,
46118 +                                      cmd.filter_size)){
46119 +                        ret = -EFAULT;
46120 +                        break;
46121 +                }
46122 +                if (copy_from_user(mask_data,
46123 +                                      (userdata + 3 + cmd.filter_size),
46124 +                                      cmd.filter_size)){
46125 +                        ret = -EFAULT;
46126 +                        break;
46127 +                } else {
46128 +                    if (wmi_add_wow_pattern_cmd(ar->arWmi,
46129 +                                &cmd, pattern_data, mask_data, cmd.filter_size) != A_OK){
46130 +                        ret = -EIO;
46131 +                    }
46132 +                }
46133 +            }
46134 +#undef WOW_PATTERN_SIZE
46135 +#undef WOW_MASK_SIZE
46136 +            break;
46137 +        }
46138 +        case AR6000_XIOCTL_WMI_DEL_WOW_PATTERN:
46139 +        {
46140 +            WMI_DEL_WOW_PATTERN_CMD delWowPattern;
46141 +
46142 +            if (ar->arWmiReady == FALSE) {
46143 +                ret = -EIO;
46144 +            } else if (copy_from_user(&delWowPattern, userdata,
46145 +                                      sizeof(delWowPattern)))
46146 +            {
46147 +                ret = -EFAULT;
46148 +            } else {
46149 +                if (wmi_del_wow_pattern_cmd(ar->arWmi,
46150 +                                &delWowPattern) != A_OK)
46151 +                {
46152 +                    ret = -EIO;
46153 +                }
46154 +            }
46155 +            break;
46156 +        }
46157 +        case AR6000_XIOCTL_DUMP_HTC_CREDIT_STATE:
46158 +            if (ar->arHtcTarget != NULL) {
46159 +                HTCDumpCreditStates(ar->arHtcTarget);
46160 +            }
46161 +            break;
46162 +        case AR6000_XIOCTL_TRAFFIC_ACTIVITY_CHANGE:
46163 +            if (ar->arHtcTarget != NULL) {
46164 +                struct ar6000_traffic_activity_change data;
46165 +
46166 +                if (copy_from_user(&data, userdata, sizeof(data)))
46167 +                {
46168 +                    return -EFAULT;
46169 +                }
46170 +                    /* note, this is used for testing (mbox ping testing), indicate activity
46171 +                     * change using the stream ID as the traffic class */
46172 +                ar6000_indicate_tx_activity(ar,
46173 +                                            (A_UINT8)data.StreamID,
46174 +                                            data.Active ? TRUE : FALSE);
46175 +            }
46176 +            break;
46177 +        case AR6000_XIOCTL_WMI_SET_CONNECT_CTRL_FLAGS:
46178 +            if (ar->arWmiReady == FALSE) {
46179 +                ret = -EIO;
46180 +            } else if (copy_from_user(&connectCtrlFlags, userdata,
46181 +                                      sizeof(connectCtrlFlags)))
46182 +            {
46183 +                ret = -EFAULT;
46184 +            } else {
46185 +                ar->arConnectCtrlFlags = connectCtrlFlags;
46186 +            }
46187 +            break;
46188 +        case AR6000_XIOCTL_WMI_SET_AKMP_PARAMS:
46189 +            if (ar->arWmiReady == FALSE) {
46190 +                ret = -EIO;
46191 +            } else if (copy_from_user(&akmpParams, userdata,
46192 +                                      sizeof(WMI_SET_AKMP_PARAMS_CMD)))
46193 +            {
46194 +                ret = -EFAULT;
46195 +            } else {
46196 +                if (wmi_set_akmp_params_cmd(ar->arWmi, &akmpParams) != A_OK) {
46197 +                    ret = -EIO;
46198 +                }
46199 +            }
46200 +            break;
46201 +        case AR6000_XIOCTL_WMI_SET_PMKID_LIST:
46202 +            if (ar->arWmiReady == FALSE) {
46203 +                ret = -EIO;
46204 +            } else {
46205 +                if (copy_from_user(&pmkidInfo.numPMKID, userdata,
46206 +                                      sizeof(pmkidInfo.numPMKID)))
46207 +                {
46208 +                    ret = -EFAULT;
46209 +                    break;
46210 +                }
46211 +                if (copy_from_user(&pmkidInfo.pmkidList,
46212 +                                   userdata + sizeof(pmkidInfo.numPMKID),
46213 +                                   pmkidInfo.numPMKID * sizeof(WMI_PMKID)))
46214 +                {
46215 +                    ret = -EFAULT;
46216 +                    break;
46217 +                }
46218 +                if (wmi_set_pmkid_list_cmd(ar->arWmi, &pmkidInfo) != A_OK) {
46219 +                    ret = -EIO;
46220 +                }
46221 +            }
46222 +            break;
46223 +        case AR6000_XIOCTL_WMI_GET_PMKID_LIST:
46224 +            if (ar->arWmiReady == FALSE) {
46225 +                ret = -EIO;
46226 +            } else  {
46227 +                if (wmi_get_pmkid_list_cmd(ar->arWmi) != A_OK) {
46228 +                    ret = -EIO;
46229 +                }
46230 +            }
46231 +            break;
46232 +        default:
46233 +            ret = -EOPNOTSUPP;
46234 +    }
46235 +    return ret;
46236 +}
46237 +
46238 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c
46239 ===================================================================
46240 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
46241 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/netbuf.c    2008-12-11 22:46:49.000000000 +0100
46242 @@ -0,0 +1,225 @@
46243 +
46244 +/*
46245 + *
46246 + * Copyright (c) 2004-2007 Atheros Communications Inc.
46247 + * All rights reserved.
46248 + *
46249 + *
46250 + *  This program is free software; you can redistribute it and/or modify
46251 + *  it under the terms of the GNU General Public License version 2 as
46252 + *  published by the Free Software Foundation;
46253 + *
46254 + *  Software distributed under the License is distributed on an "AS
46255 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
46256 + *  implied. See the License for the specific language governing
46257 + *  rights and limitations under the License.
46258 + *
46259 + *
46260 + *
46261 + */
46262 +#include <linux/kernel.h>
46263 +#include <linux/skbuff.h>
46264 +#include <a_config.h>
46265 +#include "athdefs.h"
46266 +#include "a_types.h"
46267 +#include "a_osapi.h"
46268 +#include "htc_packet.h"
46269 +
46270 +#define AR6000_DATA_OFFSET    64
46271 +
46272 +void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt)
46273 +{
46274 +    skb_queue_tail((struct sk_buff_head *) q, (struct sk_buff *) pkt);
46275 +}
46276 +
46277 +void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt)
46278 +{
46279 +    skb_queue_head((struct sk_buff_head *) q, (struct sk_buff *) pkt);
46280 +}
46281 +
46282 +void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q)
46283 +{
46284 +    return((void *) skb_dequeue((struct sk_buff_head *) q));
46285 +}
46286 +
46287 +int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q)
46288 +{
46289 +    return(skb_queue_len((struct sk_buff_head *) q));
46290 +}
46291 +
46292 +int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q)
46293 +{
46294 +    return(skb_queue_empty((struct sk_buff_head *) q));
46295 +}
46296 +
46297 +void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q)
46298 +{
46299 +    skb_queue_head_init((struct sk_buff_head *) q);
46300 +}
46301 +
46302 +void *
46303 +a_netbuf_alloc(int size)
46304 +{
46305 +    struct sk_buff *skb;
46306 +    skb = dev_alloc_skb(AR6000_DATA_OFFSET + sizeof(HTC_PACKET) + size);
46307 +    skb_reserve(skb, AR6000_DATA_OFFSET + sizeof(HTC_PACKET));
46308 +    return ((void *)skb);
46309 +}
46310 +
46311 +/*
46312 + * Allocate an SKB w.o. any encapsulation requirement.
46313 + */
46314 +void *
46315 +a_netbuf_alloc_raw(int size)
46316 +{
46317 +    struct sk_buff *skb;
46318 +
46319 +    skb = dev_alloc_skb(size);
46320 +
46321 +    return ((void *)skb);
46322 +}
46323 +
46324 +void
46325 +a_netbuf_free(void *bufPtr)
46326 +{
46327 +    struct sk_buff *skb = (struct sk_buff *)bufPtr;
46328 +
46329 +    dev_kfree_skb(skb);
46330 +}
46331 +
46332 +A_UINT32
46333 +a_netbuf_to_len(void *bufPtr)
46334 +{
46335 +    return (((struct sk_buff *)bufPtr)->len);
46336 +}
46337 +
46338 +void *
46339 +a_netbuf_to_data(void *bufPtr)
46340 +{
46341 +    return (((struct sk_buff *)bufPtr)->data);
46342 +}
46343 +
46344 +/*
46345 + * Add len # of bytes to the beginning of the network buffer
46346 + * pointed to by bufPtr
46347 + */
46348 +A_STATUS
46349 +a_netbuf_push(void *bufPtr, A_INT32 len)
46350 +{
46351 +    skb_push((struct sk_buff *)bufPtr, len);
46352 +
46353 +    return A_OK;
46354 +}
46355 +
46356 +/*
46357 + * Add len # of bytes to the beginning of the network buffer
46358 + * pointed to by bufPtr and also fill with data
46359 + */
46360 +A_STATUS
46361 +a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len)
46362 +{
46363 +    skb_push((struct sk_buff *) bufPtr, len);
46364 +    A_MEMCPY(((struct sk_buff *)bufPtr)->data, srcPtr, len);
46365 +
46366 +    return A_OK;
46367 +}
46368 +
46369 +/*
46370 + * Add len # of bytes to the end of the network buffer
46371 + * pointed to by bufPtr
46372 + */
46373 +A_STATUS
46374 +a_netbuf_put(void *bufPtr, A_INT32 len)
46375 +{
46376 +    skb_put((struct sk_buff *)bufPtr, len);
46377 +
46378 +    return A_OK;
46379 +}
46380 +
46381 +/*
46382 + * Add len # of bytes to the end of the network buffer
46383 + * pointed to by bufPtr and also fill with data
46384 + */
46385 +A_STATUS
46386 +a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len)
46387 +{
46388 +    char *start = ((struct sk_buff *)bufPtr)->data +
46389 +        ((struct sk_buff *)bufPtr)->len;
46390 +    skb_put((struct sk_buff *)bufPtr, len);
46391 +    A_MEMCPY(start, srcPtr, len);
46392 +
46393 +    return A_OK;
46394 +}
46395 +
46396 +
46397 +/*
46398 + * Trim the network buffer pointed to by bufPtr to len # of bytes
46399 + */
46400 +A_STATUS
46401 +a_netbuf_setlen(void *bufPtr, A_INT32 len)
46402 +{
46403 +    skb_trim((struct sk_buff *)bufPtr, len);
46404 +
46405 +    return A_OK;
46406 +}
46407 +
46408 +/*
46409 + * Chop of len # of bytes from the end of the buffer.
46410 + */
46411 +A_STATUS
46412 +a_netbuf_trim(void *bufPtr, A_INT32 len)
46413 +{
46414 +    skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len);
46415 +
46416 +    return A_OK;
46417 +}
46418 +
46419 +/*
46420 + * Chop of len # of bytes from the end of the buffer and return the data.
46421 + */
46422 +A_STATUS
46423 +a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len)
46424 +{
46425 +    char *start = ((struct sk_buff *)bufPtr)->data +
46426 +        (((struct sk_buff *)bufPtr)->len - len);
46427 +
46428 +    A_MEMCPY(dstPtr, start, len);
46429 +    skb_trim((struct sk_buff *)bufPtr, ((struct sk_buff *)bufPtr)->len - len);
46430 +
46431 +    return A_OK;
46432 +}
46433 +
46434 +
46435 +/*
46436 + * Returns the number of bytes available to a a_netbuf_push()
46437 + */
46438 +A_INT32
46439 +a_netbuf_headroom(void *bufPtr)
46440 +{
46441 +    return (skb_headroom((struct sk_buff *)bufPtr));
46442 +}
46443 +
46444 +/*
46445 + * Removes specified number of bytes from the beginning of the buffer
46446 + */
46447 +A_STATUS
46448 +a_netbuf_pull(void *bufPtr, A_INT32 len)
46449 +{
46450 +    skb_pull((struct sk_buff *)bufPtr, len);
46451 +
46452 +    return A_OK;
46453 +}
46454 +
46455 +/*
46456 + * Removes specified number of bytes from the beginning of the buffer
46457 + * and return the data
46458 + */
46459 +A_STATUS
46460 +a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len)
46461 +{
46462 +    A_MEMCPY(dstPtr, ((struct sk_buff *)bufPtr)->data, len);
46463 +    skb_pull((struct sk_buff *)bufPtr, len);
46464 +
46465 +    return A_OK;
46466 +}
46467 +
46468 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h
46469 ===================================================================
46470 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
46471 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/osapi_linux.h       2008-12-11 22:46:49.000000000 +0100
46472 @@ -0,0 +1,319 @@
46473 +/*
46474 + * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/osapi_linux.h#1 $
46475 + *
46476 + * This file contains the definitions of the basic atheros data types.
46477 + * It is used to map the data types in atheros files to a platform specific
46478 + * type.
46479 + *
46480 + * Copyright 2003-2005 Atheros Communications, Inc.,  All Rights Reserved.
46481 + *
46482 + *
46483 + *  This program is free software; you can redistribute it and/or modify
46484 + *  it under the terms of the GNU General Public License version 2 as
46485 + *  published by the Free Software Foundation;
46486 + *
46487 + *  Software distributed under the License is distributed on an "AS
46488 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
46489 + *  implied. See the License for the specific language governing
46490 + *  rights and limitations under the License.
46491 + *
46492 + *
46493 + *
46494 + */
46495 +
46496 +#ifndef _OSAPI_LINUX_H_
46497 +#define _OSAPI_LINUX_H_
46498 +
46499 +#ifdef __KERNEL__
46500 +
46501 +#include <linux/version.h>
46502 +#include <linux/types.h>
46503 +#include <linux/kernel.h>
46504 +#include <linux/string.h>
46505 +#include <linux/skbuff.h>
46506 +#include <linux/netdevice.h>
46507 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
46508 +#include <linux/jiffies.h>
46509 +#endif
46510 +#include <linux/timer.h>
46511 +#include <linux/delay.h>
46512 +#include <linux/wait.h>
46513 +#ifdef KERNEL_2_4
46514 +#include <asm/arch/irq.h>
46515 +#include <asm/irq.h>
46516 +#endif
46517 +
46518 +#ifdef __GNUC__
46519 +#define __ATTRIB_PACK           __attribute__ ((packed))
46520 +#define __ATTRIB_PRINTF         __attribute__ ((format (printf, 1, 2)))
46521 +#define __ATTRIB_NORETURN       __attribute__ ((noreturn))
46522 +#ifndef INLINE
46523 +#define INLINE                  __inline__
46524 +#endif
46525 +#else /* Not GCC */
46526 +#define __ATTRIB_PACK
46527 +#define __ATTRIB_PRINTF
46528 +#define __ATTRIB_NORETURN
46529 +#ifndef INLINE
46530 +#define INLINE                  __inline
46531 +#endif
46532 +#endif /* End __GNUC__ */
46533 +
46534 +#define PREPACK
46535 +#define POSTPACK                __ATTRIB_PACK
46536 +
46537 +/*
46538 + * Endianes macros
46539 + */
46540 +#define A_BE2CPU8(x)       ntohb(x)
46541 +#define A_BE2CPU16(x)      ntohs(x)
46542 +#define A_BE2CPU32(x)      ntohl(x)
46543 +
46544 +#define A_LE2CPU8(x)       (x)
46545 +#define A_LE2CPU16(x)      (x)
46546 +#define A_LE2CPU32(x)      (x)
46547 +
46548 +#define A_CPU2BE8(x)       htonb(x)
46549 +#define A_CPU2BE16(x)      htons(x)
46550 +#define A_CPU2BE32(x)      htonl(x)
46551 +
46552 +#define A_MEMCPY(dst, src, len)         memcpy((A_UINT8 *)(dst), (src), (len))
46553 +#define A_MEMZERO(addr, len)            memset(addr, 0, len)
46554 +#define A_MEMCMP(addr1, addr2, len)     memcmp((addr1), (addr2), (len))
46555 +#define A_MALLOC(size)                  kmalloc((size), GFP_KERNEL)
46556 +#define A_MALLOC_NOWAIT(size)           kmalloc((size), GFP_ATOMIC)
46557 +#define A_FREE(addr)                    kfree(addr)
46558 +#define A_PRINTF(args...)               printk(args)
46559 +
46560 +/* Mutual Exclusion */
46561 +typedef spinlock_t                      A_MUTEX_T;
46562 +#define A_MUTEX_INIT(mutex)             spin_lock_init(mutex)
46563 +#define A_MUTEX_LOCK(mutex)             spin_lock_bh(mutex)
46564 +#define A_MUTEX_UNLOCK(mutex)           spin_unlock_bh(mutex)
46565 +#define A_IS_MUTEX_VALID(mutex)         TRUE  /* okay to return true, since A_MUTEX_DELETE does nothing */
46566 +#define A_MUTEX_DELETE(mutex)           /* spin locks are not kernel resources so nothing to free.. */
46567 +
46568 +/* Get current time in ms adding a constant offset (in ms) */
46569 +#define A_GET_MS(offset)    \
46570 +       (jiffies + ((offset) / 1000) * HZ)
46571 +
46572 +/*
46573 + * Timer Functions
46574 + */
46575 +#define A_MDELAY(msecs)                 mdelay(msecs)
46576 +typedef struct timer_list               A_TIMER;
46577 +
46578 +#define A_INIT_TIMER(pTimer, pFunction, pArg) do {              \
46579 +    init_timer(pTimer);                                         \
46580 +    (pTimer)->function = (pFunction);                           \
46581 +    (pTimer)->data   = (unsigned long)(pArg);                   \
46582 +} while (0)
46583 +
46584 +/*
46585 + * Start a Timer that elapses after 'periodMSec' milli-seconds
46586 + * Support is provided for a one-shot timer. The 'repeatFlag' is
46587 + * ignored.
46588 + */
46589 +#define A_TIMEOUT_MS(pTimer, periodMSec, repeatFlag) do {                   \
46590 +    if (repeatFlag) {                                                       \
46591 +        printk("\n" __FILE__ ":%d: Timer Repeat requested\n",__LINE__);     \
46592 +        panic("Timer Repeat");                                              \
46593 +    }                                                                       \
46594 +    mod_timer((pTimer), jiffies + HZ * (periodMSec) / 1000);                \
46595 +} while (0)
46596 +
46597 +/*
46598 + * Cancel the Timer.
46599 + */
46600 +#define A_UNTIMEOUT(pTimer) do {                                \
46601 +    del_timer((pTimer));                                        \
46602 +} while (0)
46603 +
46604 +#define A_DELETE_TIMER(pTimer) do {                             \
46605 +} while (0)
46606 +
46607 +/*
46608 + * Wait Queue related functions
46609 + */
46610 +typedef wait_queue_head_t               A_WAITQUEUE_HEAD;
46611 +#define A_INIT_WAITQUEUE_HEAD(head)     init_waitqueue_head(head)
46612 +#ifndef wait_event_interruptible_timeout
46613 +#define __wait_event_interruptible_timeout(wq, condition, ret)          \
46614 +do {                                                                    \
46615 +        wait_queue_t __wait;                                            \
46616 +        init_waitqueue_entry(&__wait, current);                         \
46617 +                                                                        \
46618 +        add_wait_queue(&wq, &__wait);                                   \
46619 +        for (;;) {                                                      \
46620 +                set_current_state(TASK_INTERRUPTIBLE);                  \
46621 +                if (condition)                                          \
46622 +                        break;                                          \
46623 +                if (!signal_pending(current)) {                         \
46624 +                        ret = schedule_timeout(ret);                    \
46625 +                        if (!ret)                                       \
46626 +                                break;                                  \
46627 +                        continue;                                       \
46628 +                }                                                       \
46629 +                ret = -ERESTARTSYS;                                     \
46630 +                break;                                                  \
46631 +        }                                                               \
46632 +        current->state = TASK_RUNNING;                                  \
46633 +        remove_wait_queue(&wq, &__wait);                                \
46634 +} while (0)
46635 +
46636 +#define wait_event_interruptible_timeout(wq, condition, timeout)        \
46637 +({                                                                      \
46638 +        long __ret = timeout;                                           \
46639 +        if (!(condition))                                               \
46640 +                __wait_event_interruptible_timeout(wq, condition, __ret); \
46641 +        __ret;                                                          \
46642 +})
46643 +#endif /* wait_event_interruptible_timeout */
46644 +
46645 +#define A_WAIT_EVENT_INTERRUPTIBLE_TIMEOUT(head, condition, timeout) do { \
46646 +    wait_event_interruptible_timeout(head, condition, timeout); \
46647 +} while (0)
46648 +
46649 +#define A_WAKE_UP(head)                 wake_up(head)
46650 +
46651 +#ifdef DEBUG
46652 +#define A_ASSERT(expr)  \
46653 +    if (!(expr)) {   \
46654 +        printk(KERN_ALERT "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \
46655 +        panic(#expr); \
46656 +    }
46657 +
46658 +#else
46659 +#define A_ASSERT(expr)
46660 +#endif /* DEBUG */
46661 +
46662 +/*
46663 + * Initialization of the network buffer subsystem
46664 + */
46665 +#define A_NETBUF_INIT()
46666 +
46667 +/*
46668 + * Network buffer queue support
46669 + */
46670 +typedef struct sk_buff_head A_NETBUF_QUEUE_T;
46671 +
46672 +#define A_NETBUF_QUEUE_INIT(q)  \
46673 +    a_netbuf_queue_init(q)
46674 +
46675 +#define A_NETBUF_ENQUEUE(q, pkt) \
46676 +    a_netbuf_enqueue((q), (pkt))
46677 +#define A_NETBUF_PREQUEUE(q, pkt) \
46678 +    a_netbuf_prequeue((q), (pkt))
46679 +#define A_NETBUF_DEQUEUE(q) \
46680 +    (a_netbuf_dequeue(q))
46681 +#define A_NETBUF_QUEUE_SIZE(q)  \
46682 +    a_netbuf_queue_size(q)
46683 +#define A_NETBUF_QUEUE_EMPTY(q) \
46684 +    a_netbuf_queue_empty(q)
46685 +
46686 +/*
46687 + * Network buffer support
46688 + */
46689 +#define A_NETBUF_ALLOC(size) \
46690 +    a_netbuf_alloc(size)
46691 +#define A_NETBUF_ALLOC_RAW(size) \
46692 +    a_netbuf_alloc_raw(size)
46693 +#define A_NETBUF_FREE(bufPtr) \
46694 +    a_netbuf_free(bufPtr)
46695 +#define A_NETBUF_DATA(bufPtr) \
46696 +    a_netbuf_to_data(bufPtr)
46697 +#define A_NETBUF_LEN(bufPtr) \
46698 +    a_netbuf_to_len(bufPtr)
46699 +#define A_NETBUF_PUSH(bufPtr, len) \
46700 +    a_netbuf_push(bufPtr, len)
46701 +#define A_NETBUF_PUT(bufPtr, len) \
46702 +    a_netbuf_put(bufPtr, len)
46703 +#define A_NETBUF_TRIM(bufPtr,len) \
46704 +    a_netbuf_trim(bufPtr, len)
46705 +#define A_NETBUF_PULL(bufPtr, len) \
46706 +    a_netbuf_pull(bufPtr, len)
46707 +#define A_NETBUF_HEADROOM(bufPtr)\
46708 +    a_netbuf_headroom(bufPtr)
46709 +#define A_NETBUF_SETLEN(bufPtr,len) \
46710 +    a_netbuf_setlen(bufPtr, len)
46711 +
46712 +/* Add data to end of a buffer  */
46713 +#define A_NETBUF_PUT_DATA(bufPtr, srcPtr,  len) \
46714 +    a_netbuf_put_data(bufPtr, srcPtr, len)
46715 +
46716 +/* Add data to start of the  buffer */
46717 +#define A_NETBUF_PUSH_DATA(bufPtr, srcPtr,  len) \
46718 +    a_netbuf_push_data(bufPtr, srcPtr, len)
46719 +
46720 +/* Remove data at start of the buffer */
46721 +#define A_NETBUF_PULL_DATA(bufPtr, dstPtr, len) \
46722 +    a_netbuf_pull_data(bufPtr, dstPtr, len)
46723 +
46724 +/* Remove data from the end of the buffer */
46725 +#define A_NETBUF_TRIM_DATA(bufPtr, dstPtr, len) \
46726 +    a_netbuf_trim_data(bufPtr, dstPtr, len)
46727 +
46728 +/* View data as "size" contiguous bytes of type "t" */
46729 +#define A_NETBUF_VIEW_DATA(bufPtr, t, size) \
46730 +    (t )( ((struct skbuf *)(bufPtr))->data)
46731 +
46732 +/* return the beginning of the headroom for the buffer */
46733 +#define A_NETBUF_HEAD(bufPtr) \
46734 +        ((((struct sk_buff *)(bufPtr))->head))
46735 +
46736 +/*
46737 + * OS specific network buffer access routines
46738 + */
46739 +void *a_netbuf_alloc(int size);
46740 +void *a_netbuf_alloc_raw(int size);
46741 +void a_netbuf_free(void *bufPtr);
46742 +void *a_netbuf_to_data(void *bufPtr);
46743 +A_UINT32 a_netbuf_to_len(void *bufPtr);
46744 +A_STATUS a_netbuf_push(void *bufPtr, A_INT32 len);
46745 +A_STATUS a_netbuf_push_data(void *bufPtr, char *srcPtr, A_INT32 len);
46746 +A_STATUS a_netbuf_put(void *bufPtr, A_INT32 len);
46747 +A_STATUS a_netbuf_put_data(void *bufPtr, char *srcPtr, A_INT32 len);
46748 +A_STATUS a_netbuf_pull(void *bufPtr, A_INT32 len);
46749 +A_STATUS a_netbuf_pull_data(void *bufPtr, char *dstPtr, A_INT32 len);
46750 +A_STATUS a_netbuf_trim(void *bufPtr, A_INT32 len);
46751 +A_STATUS a_netbuf_trim_data(void *bufPtr, char *dstPtr, A_INT32 len);
46752 +A_STATUS a_netbuf_setlen(void *bufPtr, A_INT32 len);
46753 +A_INT32 a_netbuf_headroom(void *bufPtr);
46754 +void a_netbuf_enqueue(A_NETBUF_QUEUE_T *q, void *pkt);
46755 +void a_netbuf_prequeue(A_NETBUF_QUEUE_T *q, void *pkt);
46756 +void *a_netbuf_dequeue(A_NETBUF_QUEUE_T *q);
46757 +int a_netbuf_queue_size(A_NETBUF_QUEUE_T *q);
46758 +int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q);
46759 +int a_netbuf_queue_empty(A_NETBUF_QUEUE_T *q);
46760 +void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q);
46761 +
46762 +/*
46763 + * Kernel v.s User space functions
46764 + */
46765 +A_UINT32 a_copy_to_user(void *to, const void *from, A_UINT32 n);
46766 +A_UINT32 a_copy_from_user(void *to, const void *from, A_UINT32 n);
46767 +
46768 +#else /* __KERNEL__ */
46769 +
46770 +#ifdef __GNUC__
46771 +#define __ATTRIB_PACK           __attribute__ ((packed))
46772 +#define __ATTRIB_PRINTF         __attribute__ ((format (printf, 1, 2)))
46773 +#define __ATTRIB_NORETURN       __attribute__ ((noreturn))
46774 +#ifndef INLINE
46775 +#define INLINE                  __inline__
46776 +#endif
46777 +#else /* Not GCC */
46778 +#define __ATTRIB_PACK
46779 +#define __ATTRIB_PRINTF
46780 +#define __ATTRIB_NORETURN
46781 +#ifndef INLINE
46782 +#define INLINE                  __inline
46783 +#endif
46784 +#endif /* End __GNUC__ */
46785 +
46786 +#define PREPACK
46787 +#define POSTPACK                __ATTRIB_PACK
46788 +
46789 +#endif /* __KERNEL__ */
46790 +
46791 +#endif /* _OSAPI_LINUX_H_ */
46792 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c
46793 ===================================================================
46794 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
46795 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/ar6000/wireless_ext.c      2008-12-11 22:46:49.000000000 +0100
46796 @@ -0,0 +1,1952 @@
46797 +/*
46798 + *
46799 + * Copyright (c) 2004-2007 Atheros Communications Inc.
46800 + * All rights reserved.
46801 + *
46802 + *
46803 + *  This program is free software; you can redistribute it and/or modify
46804 + *  it under the terms of the GNU General Public License version 2 as
46805 + *  published by the Free Software Foundation;
46806 + *
46807 + *  Software distributed under the License is distributed on an "AS
46808 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
46809 + *  implied. See the License for the specific language governing
46810 + *  rights and limitations under the License.
46811 + *
46812 + *
46813 + *
46814 + */
46815 +
46816 +#include "ar6000_drv.h"
46817 +
46818 +static A_UINT8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
46819 +static void ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi);
46820 +extern unsigned int wmitimeout;
46821 +extern A_WAITQUEUE_HEAD arEvent;
46822 +extern wait_queue_head_t ar6000_scan_queue;
46823 +
46824 +/*
46825 + * Encode a WPA or RSN information element as a custom
46826 + * element using the hostap format.
46827 + */
46828 +static u_int
46829 +encode_ie(void *buf, size_t bufsize,
46830 +    const u_int8_t *ie, size_t ielen,
46831 +    const char *leader, size_t leader_len)
46832 +{
46833 +    u_int8_t *p;
46834 +    int i;
46835 +
46836 +    if (bufsize < leader_len)
46837 +        return 0;
46838 +    p = buf;
46839 +    memcpy(p, leader, leader_len);
46840 +    bufsize -= leader_len;
46841 +    p += leader_len;
46842 +    for (i = 0; i < ielen && bufsize > 2; i++)
46843 +        p += sprintf(p, "%02x", ie[i]);
46844 +    return (i == ielen ? p - (u_int8_t *)buf : 0);
46845 +}
46846 +
46847 +void
46848 +ar6000_scan_node(void *arg, bss_t *ni)
46849 +{
46850 +    struct iw_event iwe;
46851 +#if WIRELESS_EXT > 14
46852 +    char buf[64*2 + 30];
46853 +#endif
46854 +    struct ar_giwscan_param *param;
46855 +    A_CHAR *current_ev;
46856 +    A_CHAR *end_buf;
46857 +    struct ieee80211_common_ie  *cie;
46858 +
46859 +    param = (struct ar_giwscan_param *)arg;
46860 +
46861 +    if (param->current_ev >= param->end_buf) {
46862 +        return;
46863 +    }
46864 +    if ((param->firstPass == TRUE) &&
46865 +        ((ni->ni_cie.ie_wpa == NULL) && (ni->ni_cie.ie_rsn == NULL))) {
46866 +        /*
46867 +         * Only forward wpa bss's in first pass
46868 +         */
46869 +        return;
46870 +    }
46871 +
46872 +     if ((param->firstPass == FALSE) &&
46873 +        ((ni->ni_cie.ie_wpa != NULL) || (ni->ni_cie.ie_rsn != NULL))) {
46874 +        /*
46875 +         * Only forward non-wpa bss's in 2nd pass
46876 +         */
46877 +        return;
46878 +    }
46879 +
46880 +    current_ev = param->current_ev;
46881 +    end_buf = param->end_buf;
46882 +
46883 +    cie = &ni->ni_cie;
46884 +
46885 +    A_MEMZERO(&iwe, sizeof(iwe));
46886 +    iwe.cmd = SIOCGIWAP;
46887 +    iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
46888 +    A_MEMCPY(iwe.u.ap_addr.sa_data, ni->ni_macaddr, 6);
46889 +    current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
46890 +                                      IW_EV_ADDR_LEN);
46891 +
46892 +    A_MEMZERO(&iwe, sizeof(iwe));
46893 +    iwe.cmd = SIOCGIWESSID;
46894 +    iwe.u.data.flags = 1;
46895 +    iwe.u.data.length = cie->ie_ssid[1];
46896 +    current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe,
46897 +                                      &cie->ie_ssid[2]);
46898 +
46899 +    if (cie->ie_capInfo & (IEEE80211_CAPINFO_ESS|IEEE80211_CAPINFO_IBSS)) {
46900 +        A_MEMZERO(&iwe, sizeof(iwe));
46901 +        iwe.cmd = SIOCGIWMODE;
46902 +        iwe.u.mode = cie->ie_capInfo & IEEE80211_CAPINFO_ESS ?
46903 +                IW_MODE_MASTER : IW_MODE_ADHOC;
46904 +        current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
46905 +                                          IW_EV_UINT_LEN);
46906 +    }
46907 +
46908 +    A_MEMZERO(&iwe, sizeof(iwe));
46909 +    iwe.cmd = SIOCGIWFREQ;
46910 +    iwe.u.freq.m = cie->ie_chan * 100000;
46911 +    iwe.u.freq.e = 1;
46912 +    current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
46913 +                                      IW_EV_FREQ_LEN);
46914 +
46915 +    A_MEMZERO(&iwe, sizeof(iwe));
46916 +    iwe.cmd = IWEVQUAL;
46917 +    ar6000_set_quality(&iwe.u.qual, ni->ni_snr);
46918 +    current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe,
46919 +                                      IW_EV_QUAL_LEN);
46920 +
46921 +    A_MEMZERO(&iwe, sizeof(iwe));
46922 +    iwe.cmd = SIOCGIWENCODE;
46923 +    if (cie->ie_capInfo & IEEE80211_CAPINFO_PRIVACY) {
46924 +        iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
46925 +    } else {
46926 +        iwe.u.data.flags = IW_ENCODE_DISABLED;
46927 +    }
46928 +    iwe.u.data.length = 0;
46929 +    current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, "");
46930 +
46931 +    A_MEMZERO(&iwe, sizeof(iwe));
46932 +    iwe.cmd = IWEVCUSTOM;
46933 +    snprintf(buf, sizeof(buf), "bcn_int=%d", cie->ie_beaconInt);
46934 +    iwe.u.data.length = strlen(buf);
46935 +    current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
46936 +
46937 +    if (cie->ie_wpa != NULL) {
46938 +        static const char wpa_leader[] = "wpa_ie=";
46939 +
46940 +        A_MEMZERO(&iwe, sizeof(iwe));
46941 +        iwe.cmd = IWEVCUSTOM;
46942 +        iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wpa,
46943 +                                      cie->ie_wpa[1]+2,
46944 +                                      wpa_leader, sizeof(wpa_leader)-1);
46945 +
46946 +        if (iwe.u.data.length != 0) {
46947 +            current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
46948 +        }
46949 +    }
46950 +
46951 +    if (cie->ie_rsn != NULL && cie->ie_rsn[0] == IEEE80211_ELEMID_RSN) {
46952 +        static const char rsn_leader[] = "rsn_ie=";
46953 +
46954 +        A_MEMZERO(&iwe, sizeof(iwe));
46955 +        iwe.cmd = IWEVCUSTOM;
46956 +        iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_rsn,
46957 +                                      cie->ie_rsn[1]+2,
46958 +                                      rsn_leader, sizeof(rsn_leader)-1);
46959 +
46960 +        if (iwe.u.data.length != 0) {
46961 +            current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
46962 +        }
46963 +    }
46964 +
46965 +    if (cie->ie_wmm != NULL) {
46966 +        static const char wmm_leader[] = "wmm_ie=";
46967 +
46968 +        A_MEMZERO(&iwe, sizeof(iwe));
46969 +        iwe.cmd = IWEVCUSTOM;
46970 +        iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_wmm,
46971 +                                      cie->ie_wmm[1]+2,
46972 +                                      wmm_leader, sizeof(wmm_leader)-1);
46973 +        if (iwe.u.data.length != 0) {
46974 +            current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
46975 +        }
46976 +    }
46977 +
46978 +    if (cie->ie_ath != NULL) {
46979 +        static const char ath_leader[] = "ath_ie=";
46980 +
46981 +        A_MEMZERO(&iwe, sizeof(iwe));
46982 +        iwe.cmd = IWEVCUSTOM;
46983 +        iwe.u.data.length = encode_ie(buf, sizeof(buf), cie->ie_ath,
46984 +                                      cie->ie_ath[1]+2,
46985 +                                      ath_leader, sizeof(ath_leader)-1);
46986 +        if (iwe.u.data.length != 0) {
46987 +            current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, buf);
46988 +        }
46989 +    }
46990 +
46991 +    param->current_ev = current_ev;
46992 +}
46993 +
46994 +int
46995 +ar6000_ioctl_giwscan(struct net_device *dev,
46996 +            struct iw_request_info *info,
46997 +            struct iw_point *data, char *extra)
46998 +{
46999 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47000 +    struct ar_giwscan_param param;
47001 +    int i;
47002 +
47003 +    if (ar->arWlanState == WLAN_DISABLED) {
47004 +        return -EIO;
47005 +    }
47006 +
47007 +    if (ar->arWmiReady == FALSE) {
47008 +        return -EIO;
47009 +    }
47010 +
47011 +    param.current_ev = extra;
47012 +    param.end_buf = extra + IW_SCAN_MAX_DATA;
47013 +    param.firstPass = TRUE;
47014 +
47015 +    /*
47016 +     * Do two passes to insure WPA scan candidates
47017 +     * are sorted to the front.  This is a hack to deal with
47018 +     * the wireless extensions capping scan results at
47019 +     * IW_SCAN_MAX_DATA bytes.  In densely populated environments
47020 +     * it's easy to overflow this buffer (especially with WPA/RSN
47021 +     * information elements).  Note this sorting hack does not
47022 +     * guarantee we won't overflow anyway.
47023 +     */
47024 +    for (i = 0; i < 2; i++) {
47025 +        /*
47026 +         * Translate data to WE format.
47027 +         */
47028 +        wmi_iterate_nodes(ar->arWmi, ar6000_scan_node, &param);
47029 +        param.firstPass = FALSE;
47030 +        if (param.current_ev >= param.end_buf) {
47031 +            data->length = param.current_ev - extra;
47032 +            return -E2BIG;
47033 +        }
47034 +    }
47035 +
47036 +    if(!(data->length = param.current_ev - extra)) {
47037 +           printk("%s(): data length %d\n", __FUNCTION__, data->length);
47038 +           return -EAGAIN;
47039 +    }
47040 +    return 0;
47041 +}
47042 +
47043 +extern int reconnect_flag;
47044 +/* SIOCSIWESSID */
47045 +static int
47046 +ar6000_ioctl_siwessid(struct net_device *dev,
47047 +                     struct iw_request_info *info,
47048 +                     struct iw_point *data, char *ssid)
47049 +{
47050 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47051 +    A_STATUS status;
47052 +    A_UINT8     arNetworkType;
47053 +
47054 +    if (ar->arWlanState == WLAN_DISABLED) {
47055 +        return -EIO;
47056 +    }
47057 +
47058 +    if (ar->arWmiReady == FALSE) {
47059 +        return -EIO;
47060 +    }
47061 +
47062 +    /*
47063 +     * iwconfig passes a string with length excluding any trailing NUL.
47064 +     * FIXME: we should be able to set an ESSID of 32 bytes, yet things fall
47065 +     * over badly if we do. So we limit the ESSID to 31 bytes.
47066 +     */
47067 +    if (data->flags && (!data->length || data->length >= sizeof(ar->arSsid))) {
47068 +        /*
47069 +         * ssid is invalid
47070 +         */
47071 +        return -EINVAL;
47072 +    }
47073 +    /* Added for bug 25178, return an IOCTL error instead of target returning
47074 +       Illegal parameter error when either the BSSID or channel is missing
47075 +       and we cannot scan during connect.
47076 +     */
47077 +    if (data->flags) {
47078 +        if (ar->arSkipScan == TRUE &&
47079 +            (ar->arChannelHint == 0 ||
47080 +             (!ar->arReqBssid[0] && !ar->arReqBssid[1] && !ar->arReqBssid[2] &&
47081 +              !ar->arReqBssid[3] && !ar->arReqBssid[4] && !ar->arReqBssid[5])))
47082 +        {
47083 +            return -EINVAL;
47084 +        }
47085 +    }
47086 +
47087 +    if (down_interruptible(&ar->arSem)) {
47088 +        return -ERESTARTSYS;
47089 +    }
47090 +
47091 +    if (ar->arTxPending[WMI_CONTROL_PRI]) {
47092 +        /*
47093 +         * sleep until the command queue drains
47094 +         */
47095 +        wait_event_interruptible_timeout(arEvent,
47096 +            ar->arTxPending[WMI_CONTROL_PRI] == 0, wmitimeout * HZ);
47097 +        if (signal_pending(current)) {
47098 +            return -EINTR;
47099 +        }
47100 +    }
47101 +
47102 +    if (!data->flags) {
47103 +        arNetworkType = ar->arNetworkType;
47104 +        ar6000_init_profile_info(ar);
47105 +        ar->arNetworkType = arNetworkType;
47106 +    }
47107 +
47108 +    if ((ar->arSsidLen) || (!data->flags))
47109 +    {
47110 +        if ((!data->flags) ||
47111 +            (A_MEMCMP(ar->arSsid, ssid, ar->arSsidLen) != 0) ||
47112 +            (ar->arSsidLen != (data->length)))
47113 +        {
47114 +            /*
47115 +             * SSID set previously or essid off has been issued.
47116 +             *
47117 +             * Disconnect Command is issued in two cases after wmi is ready
47118 +             * (1) ssid is different from the previous setting
47119 +             * (2) essid off has been issued
47120 +             *
47121 +             */
47122 +            if (ar->arWmiReady == TRUE) {
47123 +                reconnect_flag = 0;
47124 +                status = wmi_disconnect_cmd(ar->arWmi);
47125 +                A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
47126 +                ar->arSsidLen = 0;
47127 +                if (ar->arSkipScan == FALSE) {
47128 +                    A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
47129 +                }
47130 +                if (!data->flags) {
47131 +                    up(&ar->arSem);
47132 +                    return 0;
47133 +                }
47134 +            } else {
47135 +                 up(&ar->arSem);
47136 +            }
47137 +        }
47138 +        else
47139 +        {
47140 +            /*
47141 +             * SSID is same, so we assume profile hasn't changed.
47142 +             * If the interface is up and wmi is ready, we issue
47143 +             * a reconnect cmd. Issue a reconnect only we are already
47144 +             * connected.
47145 +             */
47146 +            if((ar->arConnected == TRUE) && (ar->arWmiReady == TRUE))
47147 +            {
47148 +                reconnect_flag = TRUE;
47149 +                status = wmi_reconnect_cmd(ar->arWmi,ar->arReqBssid,
47150 +                                           ar->arChannelHint);
47151 +                up(&ar->arSem);
47152 +                if (status != A_OK) {
47153 +                    return -EIO;
47154 +                }
47155 +                return 0;
47156 +            }
47157 +            else{
47158 +                /*
47159 +                 * Dont return if connect is pending.
47160 +                 */
47161 +                if(!(ar->arConnectPending)) {
47162 +                    up(&ar->arSem);
47163 +                    return 0;
47164 +                }
47165 +            }
47166 +        }
47167 +    }
47168 +
47169 +    ar->arSsidLen = data->length;
47170 +    A_MEMCPY(ar->arSsid, ssid, ar->arSsidLen);
47171 +
47172 +    /* The ssid length check prevents second "essid off" from the user,
47173 +       to be treated as a connect cmd. The second "essid off" is ignored.
47174 +    */
47175 +    if((ar->arWmiReady == TRUE) && (ar->arSsidLen > 0) )
47176 +    {
47177 +        AR6000_SPIN_LOCK(&ar->arLock, 0);
47178 +        if (SHARED_AUTH == ar->arDot11AuthMode) {
47179 +            ar6000_install_static_wep_keys(ar);
47180 +        }
47181 +        AR_DEBUG_PRINTF("Connect called with authmode %d dot11 auth %d"\
47182 +                        " PW crypto %d PW crypto Len %d GRP crypto %d"\
47183 +                        " GRP crypto Len %d\n",
47184 +                        ar->arAuthMode, ar->arDot11AuthMode,
47185 +                        ar->arPairwiseCrypto, ar->arPairwiseCryptoLen,
47186 +                        ar->arGroupCrypto, ar->arGroupCryptoLen);
47187 +        reconnect_flag = 0;
47188 +        AR6000_SPIN_UNLOCK(&ar->arLock, 0);
47189 +        status = wmi_connect_cmd(ar->arWmi, ar->arNetworkType,
47190 +                                 ar->arDot11AuthMode, ar->arAuthMode,
47191 +                                 ar->arPairwiseCrypto, ar->arPairwiseCryptoLen,
47192 +                                 ar->arGroupCrypto,ar->arGroupCryptoLen,
47193 +                                 ar->arSsidLen, ar->arSsid,
47194 +                                 ar->arReqBssid, ar->arChannelHint,
47195 +                                 ar->arConnectCtrlFlags);
47196 +
47197 +
47198 +        up(&ar->arSem);
47199 +
47200 +        if (status != A_OK) {
47201 +            return -EIO;
47202 +        }
47203 +        ar->arConnectPending = TRUE;
47204 +    }else{
47205 +      up(&ar->arSem);
47206 +    }
47207 +    return 0;
47208 +}
47209 +
47210 +/* SIOCGIWESSID */
47211 +static int
47212 +ar6000_ioctl_giwessid(struct net_device *dev,
47213 +                     struct iw_request_info *info,
47214 +                     struct iw_point *data, char *essid)
47215 +{
47216 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47217 +
47218 +    if (ar->arWlanState == WLAN_DISABLED) {
47219 +        return -EIO;
47220 +    }
47221 +
47222 +    data->flags = 1;
47223 +    data->length = ar->arSsidLen;
47224 +    A_MEMCPY(essid, ar->arSsid, ar->arSsidLen);
47225 +
47226 +    return 0;
47227 +}
47228 +
47229 +
47230 +void ar6000_install_static_wep_keys(AR_SOFTC_T *ar)
47231 +{
47232 +    A_UINT8 index;
47233 +    A_UINT8 keyUsage;
47234 +
47235 +    for (index = WMI_MIN_KEY_INDEX; index <= WMI_MAX_KEY_INDEX; index++) {
47236 +        if (ar->arWepKeyList[index].arKeyLen) {
47237 +            keyUsage = GROUP_USAGE;
47238 +            if (index == ar->arDefTxKeyIndex) {
47239 +                keyUsage |= TX_USAGE;
47240 +            }
47241 +            wmi_addKey_cmd(ar->arWmi,
47242 +                           index,
47243 +                           WEP_CRYPT,
47244 +                           keyUsage,
47245 +                           ar->arWepKeyList[index].arKeyLen,
47246 +                           NULL,
47247 +                           ar->arWepKeyList[index].arKey, KEY_OP_INIT_VAL,
47248 +                           NO_SYNC_WMIFLAG);
47249 +        }
47250 +    }
47251 +}
47252 +
47253 +int
47254 +ar6000_ioctl_delkey(struct net_device *dev, struct iw_request_info *info,
47255 +             void *w, char *extra)
47256 +{
47257 +    return 0;
47258 +}
47259 +
47260 +int
47261 +ar6000_ioctl_setmlme(struct net_device *dev, struct iw_request_info *info,
47262 +             void *w, char *extra)
47263 +{
47264 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47265 +    struct ieee80211req_mlme *mlme = (struct ieee80211req_mlme *)extra;
47266 +
47267 +    if ((ar->arWmiReady == FALSE) || (ar->arConnected != TRUE))
47268 +               return -EIO;
47269 +
47270 +    switch (mlme->im_op) {
47271 +        case IEEE80211_MLME_DISASSOC:
47272 +        case IEEE80211_MLME_DEAUTH:
47273 +            /* Not Supported */
47274 +            break;
47275 +        default:
47276 +            break;
47277 +    }
47278 +    return 0;
47279 +}
47280 +
47281 +
47282 +int
47283 +ar6000_ioctl_setwmmparams(struct net_device *dev, struct iw_request_info *info,
47284 +             void *w, char *extra)
47285 +{
47286 +    return -EIO;            /* for now */
47287 +}
47288 +
47289 +int
47290 +ar6000_ioctl_getwmmparams(struct net_device *dev, struct iw_request_info *info,
47291 +             void *w, char *extra)
47292 +{
47293 +    return -EIO;            /* for now */
47294 +}
47295 +
47296 +int ar6000_ioctl_setoptie(struct net_device *dev, struct iw_request_info *info,
47297 +                         struct iw_point *data, char *extra)
47298 +{
47299 +       /* The target generates the WPA/RSN IE */
47300 +       return 0;
47301 +}
47302 +
47303 +int
47304 +ar6000_ioctl_setauthalg(struct net_device *dev, struct iw_request_info *info,
47305 +             void *w, char *extra)
47306 +{
47307 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47308 +    struct ieee80211req_authalg *req = (struct ieee80211req_authalg *)extra;
47309 +    int ret = 0;
47310 +
47311 +
47312 +    AR6000_SPIN_LOCK(&ar->arLock, 0);
47313 +
47314 +    if (req->auth_alg == AUTH_ALG_OPEN_SYSTEM) {
47315 +        ar->arDot11AuthMode  = OPEN_AUTH;
47316 +    } else if (req->auth_alg == AUTH_ALG_LEAP) {
47317 +        ar->arDot11AuthMode   = LEAP_AUTH;
47318 +        ar->arPairwiseCrypto  = WEP_CRYPT;
47319 +        ar->arGroupCrypto     = WEP_CRYPT;
47320 +    } else {
47321 +        ret = -EIO;
47322 +    }
47323 +
47324 +    AR6000_SPIN_UNLOCK(&ar->arLock, 0);
47325 +
47326 +    return ret;
47327 +}
47328 +static int
47329 +ar6000_ioctl_addpmkid(struct net_device *dev, struct iw_request_info *info,
47330 +             void *w, char *extra)
47331 +{
47332 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47333 +    struct ieee80211req_addpmkid  *req = (struct ieee80211req_addpmkid *)extra;
47334 +    A_STATUS status;
47335 +
47336 +    if (ar->arWlanState == WLAN_DISABLED) {
47337 +        return -EIO;
47338 +    }
47339 +
47340 +    AR_DEBUG_PRINTF("Add pmkid for %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x en=%d\n",
47341 +                    req->pi_bssid[0], req->pi_bssid[1], req->pi_bssid[2],
47342 +                    req->pi_bssid[3], req->pi_bssid[4], req->pi_bssid[5],
47343 +                    req->pi_enable);
47344 +
47345 +    status = wmi_setPmkid_cmd(ar->arWmi, req->pi_bssid, req->pi_pmkid,
47346 +                              req->pi_enable);
47347 +
47348 +    if (status != A_OK) {
47349 +        return -EIO;
47350 +    }
47351 +
47352 +    return 0;
47353 +}
47354 +
47355 +/*
47356 + * SIOCSIWRATE
47357 + */
47358 +int
47359 +ar6000_ioctl_siwrate(struct net_device *dev,
47360 +            struct iw_request_info *info,
47361 +            struct iw_param *rrq, char *extra)
47362 +{
47363 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47364 +    A_UINT32  kbps;
47365 +
47366 +    if (rrq->fixed) {
47367 +        kbps = rrq->value / 1000;           /* rrq->value is in bps */
47368 +    } else {
47369 +        kbps = -1;                          /* -1 indicates auto rate */
47370 +    }
47371 +    if(kbps != -1 && wmi_validate_bitrate(ar->arWmi, kbps) == A_EINVAL)
47372 +    {
47373 +        AR_DEBUG_PRINTF("BitRate is not Valid %d\n", kbps);
47374 +        return -EINVAL;
47375 +    }
47376 +    ar->arBitRate = kbps;
47377 +    if(ar->arWmiReady == TRUE)
47378 +    {
47379 +        if (wmi_set_bitrate_cmd(ar->arWmi, kbps) != A_OK) {
47380 +            return -EINVAL;
47381 +        }
47382 +    }
47383 +    return 0;
47384 +}
47385 +
47386 +/*
47387 + * SIOCGIWRATE
47388 + */
47389 +int
47390 +ar6000_ioctl_giwrate(struct net_device *dev,
47391 +            struct iw_request_info *info,
47392 +            struct iw_param *rrq, char *extra)
47393 +{
47394 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47395 +    int ret = 0;
47396 +
47397 +    if (down_interruptible(&ar->arSem)) {
47398 +        return -ERESTARTSYS;
47399 +    }
47400 +    if(ar->arWmiReady == TRUE)
47401 +    {
47402 +        ar->arBitRate = 0xFFFF;
47403 +        if (wmi_get_bitrate_cmd(ar->arWmi) != A_OK) {
47404 +            up(&ar->arSem);
47405 +            return -EIO;
47406 +        }
47407 +        wait_event_interruptible_timeout(arEvent, ar->arBitRate != 0xFFFF, wmitimeout * HZ);
47408 +        if (signal_pending(current)) {
47409 +            ret = -EINTR;
47410 +        }
47411 +    }
47412 +    /* If the interface is down or wmi is not ready or the target is not
47413 +       connected - return the value stored in the device structure */
47414 +    if (!ret) {
47415 +        if (ar->arBitRate == -1) {
47416 +            rrq->fixed = TRUE;
47417 +            rrq->value = 0;
47418 +        } else {
47419 +            rrq->value = ar->arBitRate * 1000;
47420 +        }
47421 +    }
47422 +
47423 +    up(&ar->arSem);
47424 +
47425 +    return ret;
47426 +}
47427 +
47428 +/*
47429 + * SIOCSIWTXPOW
47430 + */
47431 +static int
47432 +ar6000_ioctl_siwtxpow(struct net_device *dev,
47433 +             struct iw_request_info *info,
47434 +             struct iw_param *rrq, char *extra)
47435 +{
47436 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47437 +    A_UINT8 dbM;
47438 +
47439 +    if (ar->arWlanState == WLAN_DISABLED) {
47440 +        return -EIO;
47441 +    }
47442 +
47443 +    if (ar->arRadioSwitch == WLAN_ENABLED
47444 +       && rrq->disabled) {
47445 +           if (wmi_switch_radio(ar->arWmi, WLAN_DISABLED) < 0)
47446 +                   return -EIO;
47447 +           ar->arRadioSwitch = WLAN_DISABLED;
47448 +    } else if (ar->arRadioSwitch == WLAN_DISABLED
47449 +              && !rrq->disabled) {
47450 +           if (wmi_switch_radio(ar->arWmi, WLAN_ENABLED) < 0)
47451 +                   return -EIO;
47452 +           ar->arRadioSwitch = WLAN_ENABLED;
47453 +    }
47454 +
47455 +    if (rrq->fixed) {
47456 +        if (rrq->flags != IW_TXPOW_DBM) {
47457 +            return -EOPNOTSUPP;
47458 +        }
47459 +        ar->arTxPwr= dbM = rrq->value;
47460 +        ar->arTxPwrSet = TRUE;
47461 +    } else {
47462 +        ar->arTxPwr = dbM = 0;
47463 +        ar->arTxPwrSet = FALSE;
47464 +    }
47465 +    if(ar->arWmiReady == TRUE)
47466 +    {
47467 +        AR_DEBUG_PRINTF("Set tx pwr cmd %d dbM\n", dbM);
47468 +        wmi_set_txPwr_cmd(ar->arWmi, dbM);
47469 +    }
47470 +    return 0;
47471 +}
47472 +
47473 +/*
47474 + * SIOCGIWTXPOW
47475 + */
47476 +int
47477 +ar6000_ioctl_giwtxpow(struct net_device *dev,
47478 +            struct iw_request_info *info,
47479 +            struct iw_param *rrq, char *extra)
47480 +{
47481 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47482 +    int ret = 0;
47483 +
47484 +    if (ar->arWlanState == WLAN_DISABLED) {
47485 +        return -EIO;
47486 +    }
47487 +
47488 +    if (ar->arRadioSwitch == WLAN_DISABLED) {
47489 +           rrq->disabled = 1;
47490 +           return 0;
47491 +    }
47492 +
47493 +    if (down_interruptible(&ar->arSem)) {
47494 +        return -ERESTARTSYS;
47495 +    }
47496 +    if((ar->arWmiReady == TRUE) && (ar->arConnected == TRUE))
47497 +    {
47498 +        ar->arTxPwr = 0;
47499 +
47500 +        if (wmi_get_txPwr_cmd(ar->arWmi) != A_OK) {
47501 +            up(&ar->arSem);
47502 +            return -EIO;
47503 +        }
47504 +
47505 +        wait_event_interruptible_timeout(arEvent, ar->arTxPwr != 0, wmitimeout * HZ);
47506 +
47507 +        if (signal_pending(current)) {
47508 +            ret = -EINTR;
47509 +         }
47510 +    }
47511 +   /* If the interace is down or wmi is not ready or target is not connected
47512 +      then return value stored in the device structure */
47513 +
47514 +    if (!ret) {
47515 +         if (ar->arTxPwrSet == TRUE) {
47516 +            rrq->fixed = TRUE;
47517 +        }
47518 +        rrq->value = ar->arTxPwr;
47519 +        rrq->flags = IW_TXPOW_DBM;
47520 +    }
47521 +
47522 +    up(&ar->arSem);
47523 +
47524 +    return ret;
47525 +}
47526 +
47527 +/*
47528 + * SIOCSIWRETRY
47529 + * since iwconfig only provides us with one max retry value, we use it
47530 + * to apply to data frames of the BE traffic class.
47531 + */
47532 +static int
47533 +ar6000_ioctl_siwretry(struct net_device *dev,
47534 +             struct iw_request_info *info,
47535 +             struct iw_param *rrq, char *extra)
47536 +{
47537 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47538 +
47539 +    if (ar->arWlanState == WLAN_DISABLED) {
47540 +        return -EIO;
47541 +    }
47542 +
47543 +    if (rrq->disabled) {
47544 +        return -EOPNOTSUPP;
47545 +    }
47546 +
47547 +    if ((rrq->flags & IW_RETRY_TYPE) != IW_RETRY_LIMIT) {
47548 +        return -EOPNOTSUPP;
47549 +    }
47550 +
47551 +    if ( !(rrq->value >= WMI_MIN_RETRIES) || !(rrq->value <= WMI_MAX_RETRIES)) {
47552 +            return - EINVAL;
47553 +    }
47554 +    if(ar->arWmiReady == TRUE)
47555 +    {
47556 +        if (wmi_set_retry_limits_cmd(ar->arWmi, DATA_FRAMETYPE, WMM_AC_BE,
47557 +                                     rrq->value, 0) != A_OK){
47558 +            return -EINVAL;
47559 +        }
47560 +    }
47561 +    ar->arMaxRetries = rrq->value;
47562 +    return 0;
47563 +}
47564 +
47565 +/*
47566 + * SIOCGIWRETRY
47567 + */
47568 +static int
47569 +ar6000_ioctl_giwretry(struct net_device *dev,
47570 +             struct iw_request_info *info,
47571 +             struct iw_param *rrq, char *extra)
47572 +{
47573 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47574 +
47575 +    if (ar->arWlanState == WLAN_DISABLED) {
47576 +        return -EIO;
47577 +    }
47578 +
47579 +    rrq->disabled = 0;
47580 +    switch (rrq->flags & IW_RETRY_TYPE) {
47581 +    case IW_RETRY_LIFETIME:
47582 +        return -EOPNOTSUPP;
47583 +        break;
47584 +    case IW_RETRY_LIMIT:
47585 +        rrq->flags = IW_RETRY_LIMIT;
47586 +        switch (rrq->flags & IW_RETRY_MODIFIER) {
47587 +        case IW_RETRY_MIN:
47588 +            rrq->flags |= IW_RETRY_MIN;
47589 +            rrq->value = WMI_MIN_RETRIES;
47590 +            break;
47591 +        case IW_RETRY_MAX:
47592 +            rrq->flags |= IW_RETRY_MAX;
47593 +            rrq->value = ar->arMaxRetries;
47594 +            break;
47595 +        }
47596 +        break;
47597 +    }
47598 +    return 0;
47599 +}
47600 +
47601 +/*
47602 + * SIOCSIWENCODE
47603 + */
47604 +static int
47605 +ar6000_ioctl_siwencode(struct net_device *dev,
47606 +              struct iw_request_info *info,
47607 +              struct iw_point *erq, char *keybuf)
47608 +{
47609 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
47610 +    int index;
47611 +    A_INT32 auth = ar->arDot11AuthMode;
47612 +
47613 +    if (ar->arWlanState == WLAN_DISABLED) {
47614 +        return -EIO;
47615 +    }
47616 +
47617 +    index = erq->flags & IW_ENCODE_INDEX;
47618 +
47619 +    if (index && (((index - 1) < WMI_MIN_KEY_INDEX) ||
47620 +                  ((index - 1) > WMI_MAX_KEY_INDEX)))
47621 +    {
47622 +        return -EIO;
47623 +    }
47624 +
47625 +    if (erq->flags & IW_ENCODE_DISABLED) {
47626 +        /*
47627 +         * Encryption disabled
47628 +         */
47629 +        if (index) {
47630 +            /*
47631 +             * If key index was specified then clear the specified key
47632 +             */
47633 +            index--;
47634 +            A_MEMZERO(ar->arWepKeyList[index].arKey,
47635 +                      sizeof(ar->arWepKeyList[index].arKey));
47636 +            ar->arWepKeyList[index].arKeyLen = 0;
47637 +        }
47638 +        ar->arDot11AuthMode       = OPEN_AUTH;
47639 +        ar->arPairwiseCrypto      = NONE_CRYPT;
47640 +        ar->arGroupCrypto         = NONE_CRYPT;
47641 +        ar->arAuthMode            = NONE_AUTH;
47642 +    } else {
47643 +        /*
47644 +         * Enabling WEP encryption
47645 +         */
47646 +        if (index) {
47647 +            index--;                /* keyindex is off base 1 in iwconfig */
47648 +        }
47649 +
47650 +        if (erq->flags & IW_ENCODE_OPEN) {
47651 +            auth = OPEN_AUTH;
47652 +        } else if (erq->flags & IW_ENCODE_RESTRICTED) {
47653 +            auth = SHARED_AUTH;
47654 +        }
47655 +
47656 +        if (erq->length) {
47657 +            if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(erq->length)) {
47658 +                return -EIO;
47659 +            }
47660 +
47661 +            A_MEMZERO(ar->arWepKeyList[index].arKey,
47662 +                      sizeof(ar->arWepKeyList[index].arKey));
47663 +            A_MEMCPY(ar->arWepKeyList[index].arKey, keybuf, erq->length);
47664 +            ar->arWepKeyList[index].arKeyLen = erq->length;
47665 +        } else {
47666 +            if (ar->arWepKeyList[index].arKeyLen == 0) {
47667 +                return -EIO;
47668 +            }
47669 +            ar->arDefTxKeyIndex = index;
47670 +        }
47671 +
47672 +        ar->arPairwiseCrypto      = WEP_CRYPT;
47673 +        ar->arGroupCrypto         = WEP_CRYPT;
47674 +        ar->arDot11AuthMode       = auth;
47675 +        ar->arAuthMode            = NONE_AUTH;
47676 +    }
47677 +
47678 +    /*
47679 +     * profile has changed.  Erase ssid to signal change
47680 +     */
47681 +    A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
47682 +    ar->arSsidLen = 0;
47683 +
47684 +    return 0;
47685 +}
47686 +
47687 +static int
47688 +ar6000_ioctl_giwencode(struct net_device *dev,
47689 +              struct iw_request_info *info,
47690 +              struct iw_point *erq, char *key)
47691 +{
47692 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
47693 +    A_UINT8 keyIndex;
47694 +    struct ar_wep_key *wk;
47695 +
47696 +    if (ar->arWlanState == WLAN_DISABLED) {
47697 +        return -EIO;
47698 +    }
47699 +
47700 +    if (ar->arPairwiseCrypto == NONE_CRYPT) {
47701 +        erq->length = 0;
47702 +        erq->flags = IW_ENCODE_DISABLED;
47703 +    } else {
47704 +        /* get the keyIndex */
47705 +        keyIndex = erq->flags & IW_ENCODE_INDEX;
47706 +        if (0 == keyIndex) {
47707 +            keyIndex = ar->arDefTxKeyIndex;
47708 +        } else if ((keyIndex - 1 < WMI_MIN_KEY_INDEX) ||
47709 +                   (keyIndex - 1 > WMI_MAX_KEY_INDEX))
47710 +        {
47711 +            keyIndex = WMI_MIN_KEY_INDEX;
47712 +        } else {
47713 +            keyIndex--;
47714 +        }
47715 +        erq->flags = keyIndex + 1;
47716 +        erq->flags |= IW_ENCODE_ENABLED;
47717 +        wk = &ar->arWepKeyList[keyIndex];
47718 +        if (erq->length > wk->arKeyLen) {
47719 +            erq->length = wk->arKeyLen;
47720 +        }
47721 +        if (wk->arKeyLen) {
47722 +            A_MEMCPY(key, wk->arKey, erq->length);
47723 +        }
47724 +        if (ar->arDot11AuthMode == OPEN_AUTH) {
47725 +            erq->flags |= IW_ENCODE_OPEN;
47726 +        } else if (ar->arDot11AuthMode == SHARED_AUTH) {
47727 +            erq->flags |= IW_ENCODE_RESTRICTED;
47728 +        }
47729 +    }
47730 +
47731 +    return 0;
47732 +}
47733 +
47734 +static int ar6000_ioctl_siwpower(struct net_device *dev,
47735 +                                struct iw_request_info *info,
47736 +                                union iwreq_data *wrqu, char *extra)
47737 +{
47738 +       AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
47739 +       WMI_POWER_MODE power_mode;
47740 +
47741 +       if (wrqu->power.disabled)
47742 +               power_mode = MAX_PERF_POWER;
47743 +       else
47744 +               power_mode = REC_POWER;
47745 +
47746 +       if (wmi_powermode_cmd(ar->arWmi, power_mode) < 0)
47747 +               return -EIO;
47748 +
47749 +       return 0;
47750 +}
47751 +
47752 +static int ar6000_ioctl_giwpower(struct net_device *dev,
47753 +                                struct iw_request_info *info,
47754 +                                union iwreq_data *wrqu, char *extra)
47755 +{
47756 +       AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
47757 +
47758 +       return wmi_get_power_mode_cmd(ar->arWmi);
47759 +}
47760 +
47761 +static int ar6000_ioctl_siwgenie(struct net_device *dev,
47762 +                                struct iw_request_info *info,
47763 +                                struct iw_point *dwrq,
47764 +                                char *extra)
47765 +{
47766 +       /* The target does that for us */
47767 +       return 0;
47768 +}
47769 +
47770 +static int ar6000_ioctl_giwgenie(struct net_device *dev,
47771 +                                struct iw_request_info *info,
47772 +                                struct iw_point *dwrq,
47773 +                                char *extra)
47774 +{
47775 +       return 0;
47776 +}
47777 +
47778 +static int ar6000_ioctl_siwauth(struct net_device *dev,
47779 +                               struct iw_request_info *info,
47780 +                               struct iw_param *param,
47781 +                               char *extra)
47782 +{
47783 +       AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
47784 +       int reset = 0;
47785 +
47786 +       switch (param->flags & IW_AUTH_INDEX) {
47787 +       case IW_AUTH_WPA_VERSION:
47788 +               if (param->value & IW_AUTH_WPA_VERSION_DISABLED) {
47789 +                       ar->arAuthMode = NONE_AUTH;
47790 +               }
47791 +               if (param->value & IW_AUTH_WPA_VERSION_WPA) {
47792 +                       ar->arAuthMode = WPA_AUTH;
47793 +               }
47794 +               if (param->value & IW_AUTH_WPA_VERSION_WPA2) {
47795 +                       ar->arAuthMode = WPA2_AUTH;
47796 +               }
47797 +
47798 +               reset = 1;
47799 +               break;
47800 +       case IW_AUTH_CIPHER_PAIRWISE:
47801 +               if (param->value & IW_AUTH_CIPHER_NONE) {
47802 +                       ar->arPairwiseCrypto = NONE_CRYPT;
47803 +               }
47804 +               if (param->value & IW_AUTH_CIPHER_WEP40) {
47805 +                       ar->arPairwiseCrypto = WEP_CRYPT;
47806 +               }
47807 +               if (param->value & IW_AUTH_CIPHER_TKIP) {
47808 +                       ar->arPairwiseCrypto = TKIP_CRYPT;
47809 +               }
47810 +               if (param->value & IW_AUTH_CIPHER_CCMP) {
47811 +                       ar->arPairwiseCrypto = AES_CRYPT;
47812 +               }
47813 +
47814 +               reset = 1;
47815 +               break;
47816 +       case IW_AUTH_CIPHER_GROUP:
47817 +               if (param->value & IW_AUTH_CIPHER_NONE) {
47818 +                       ar->arGroupCrypto = NONE_CRYPT;
47819 +               }
47820 +               if (param->value & IW_AUTH_CIPHER_WEP40) {
47821 +                       ar->arGroupCrypto = WEP_CRYPT;
47822 +               }
47823 +               if (param->value & IW_AUTH_CIPHER_TKIP) {
47824 +                       ar->arGroupCrypto = TKIP_CRYPT;
47825 +               }
47826 +               if (param->value & IW_AUTH_CIPHER_CCMP) {
47827 +                       ar->arGroupCrypto = AES_CRYPT;
47828 +               }
47829 +
47830 +               reset = 1;
47831 +               break;
47832 +       case IW_AUTH_KEY_MGMT:
47833 +               if (param->value & IW_AUTH_KEY_MGMT_PSK) {
47834 +                       if (ar->arAuthMode == WPA_AUTH) {
47835 +                               ar->arAuthMode = WPA_PSK_AUTH;
47836 +                       } else if (ar->arAuthMode == WPA2_AUTH) {
47837 +                               ar->arAuthMode = WPA2_PSK_AUTH;
47838 +                       }
47839 +
47840 +                       reset = 1;
47841 +               }
47842 +               break;
47843 +
47844 +       case IW_AUTH_TKIP_COUNTERMEASURES:
47845 +               if (ar->arWmiReady == FALSE) {
47846 +                       return -EIO;
47847 +               }
47848 +               wmi_set_tkip_countermeasures_cmd(ar->arWmi, param->value);
47849 +               break;
47850 +
47851 +       case IW_AUTH_DROP_UNENCRYPTED:
47852 +               break;
47853 +
47854 +       case IW_AUTH_80211_AUTH_ALG:
47855 +               if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
47856 +                       ar->arDot11AuthMode  = OPEN_AUTH;
47857 +               }
47858 +               if (param->value & IW_AUTH_ALG_SHARED_KEY) {
47859 +                       ar->arDot11AuthMode  = SHARED_AUTH;
47860 +               }
47861 +               if (param->value & IW_AUTH_ALG_LEAP) {
47862 +                       ar->arDot11AuthMode   = LEAP_AUTH;
47863 +                       ar->arPairwiseCrypto  = WEP_CRYPT;
47864 +                       ar->arGroupCrypto     = WEP_CRYPT;
47865 +               }
47866 +
47867 +               reset = 1;
47868 +               break;
47869 +
47870 +       case IW_AUTH_WPA_ENABLED:
47871 +               reset = 1;
47872 +               break;
47873 +
47874 +       case IW_AUTH_RX_UNENCRYPTED_EAPOL:
47875 +               break;
47876 +
47877 +       case IW_AUTH_PRIVACY_INVOKED:
47878 +               break;
47879 +
47880 +       default:
47881 +               printk("%s(): Unknown flag 0x%x\n", __FUNCTION__, param->flags);
47882 +               return -EOPNOTSUPP;
47883 +       }
47884 +
47885 +       if (reset) {
47886 +               A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
47887 +               ar->arSsidLen = 0;
47888 +       }
47889 +
47890 +       return 0;
47891 +}
47892 +
47893 +static int ar6000_ioctl_giwauth(struct net_device *dev,
47894 +                               struct iw_request_info *info,
47895 +                               struct iw_param *dwrq,
47896 +                               char *extra)
47897 +{
47898 +       return 0;
47899 +}
47900 +
47901 +static int ar6000_ioctl_siwencodeext(struct net_device *dev,
47902 +                                    struct iw_request_info *info,
47903 +                                    union iwreq_data *wrqu,
47904 +                                    char *extra)
47905 +{
47906 +       AR_SOFTC_T *ar = (AR_SOFTC_T *)netdev_priv(dev);
47907 +       struct iw_point *encoding = &wrqu->encoding;
47908 +       struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
47909 +       int alg = ext->alg, idx;
47910 +
47911 +       if (ar->arWlanState == WLAN_DISABLED) {
47912 +               return -EIO;
47913 +       }
47914 +
47915 +       /* Determine and validate the key index */
47916 +       idx = (encoding->flags & IW_ENCODE_INDEX) - 1;
47917 +       if (idx) {
47918 +               if (idx < 0 || idx > 3)
47919 +                       return -EINVAL;
47920 +       }
47921 +
47922 +       if ((alg == IW_ENCODE_ALG_TKIP) || (alg == IW_ENCODE_ALG_CCMP)) {
47923 +               struct ieee80211req_key ik;
47924 +               KEY_USAGE key_usage;
47925 +               CRYPTO_TYPE key_type = NONE_CRYPT;
47926 +               int status;
47927 +
47928 +               ar->user_saved_keys.keyOk = FALSE;
47929 +
47930 +               if (alg == IW_ENCODE_ALG_TKIP) {
47931 +                       key_type = TKIP_CRYPT;
47932 +                       ik.ik_type = IEEE80211_CIPHER_TKIP;
47933 +               } else {
47934 +                       key_type = AES_CRYPT;
47935 +                       ik.ik_type = IEEE80211_CIPHER_AES_CCM;
47936 +               }
47937 +
47938 +               ik.ik_keyix = idx;
47939 +               ik.ik_keylen = ext->key_len;
47940 +               ik.ik_flags = IEEE80211_KEY_RECV;
47941 +               if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
47942 +                       ik.ik_flags |= IEEE80211_KEY_XMIT
47943 +                               | IEEE80211_KEY_DEFAULT;
47944 +               }
47945 +
47946 +               if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
47947 +                       memcpy(&ik.ik_keyrsc, ext->rx_seq, 8);
47948 +               }
47949 +
47950 +               memcpy(ik.ik_keydata, ext->key, ext->key_len);
47951 +
47952 +               ar->user_saved_keys.keyType = key_type;
47953 +               if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
47954 +                       key_usage = GROUP_USAGE;
47955 +                       memset(ik.ik_macaddr, 0, ETH_ALEN);
47956 +                       memcpy(&ar->user_saved_keys.bcast_ik, &ik,
47957 +                              sizeof(struct ieee80211req_key));
47958 +               } else {
47959 +                       key_usage = PAIRWISE_USAGE;
47960 +                       memcpy(ik.ik_macaddr, ext->addr.sa_data, ETH_ALEN);
47961 +                       memcpy(&ar->user_saved_keys.ucast_ik, &ik,
47962 +                              sizeof(struct ieee80211req_key));
47963 +               }
47964 +
47965 +               status = wmi_addKey_cmd(ar->arWmi, ik.ik_keyix, key_type,
47966 +                                       key_usage, ik.ik_keylen,
47967 +                                       (A_UINT8 *)&ik.ik_keyrsc,
47968 +                                       ik.ik_keydata,
47969 +                                       KEY_OP_INIT_VAL, SYNC_BEFORE_WMIFLAG);
47970 +
47971 +               if (status < 0)
47972 +                       return -EIO;
47973 +
47974 +               ar->user_saved_keys.keyOk = TRUE;
47975 +
47976 +               return 0;
47977 +
47978 +       } else {
47979 +               /* WEP falls back to SIWENCODE */
47980 +               return -EOPNOTSUPP;
47981 +       }
47982 +
47983 +       return 0;
47984 +}
47985 +
47986 +
47987 +static int ar6000_ioctl_giwencodeext(struct net_device *dev,
47988 +                                    struct iw_request_info *info,
47989 +                                    struct iw_point *dwrq,
47990 +                                    char *extra)
47991 +{
47992 +       return 0;
47993 +}
47994 +
47995 +
47996 +static int
47997 +ar6000_ioctl_setparam(struct net_device *dev,
47998 +                      struct iw_request_info *info,
47999 +                      void *erq, char *extra)
48000 +{
48001 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48002 +    int *i = (int *)extra;
48003 +    int param = i[0];
48004 +    int value = i[1];
48005 +    int ret = 0;
48006 +    A_BOOL profChanged = FALSE;
48007 +
48008 +    if (ar->arWlanState == WLAN_DISABLED) {
48009 +        return -EIO;
48010 +    }
48011 +
48012 +    switch (param) {
48013 +        case IEEE80211_PARAM_WPA:
48014 +            switch (value) {
48015 +                case WPA_MODE_WPA1:
48016 +                    ar->arAuthMode = WPA_AUTH;
48017 +                    profChanged    = TRUE;
48018 +                    break;
48019 +                case WPA_MODE_WPA2:
48020 +                    ar->arAuthMode = WPA2_AUTH;
48021 +                    profChanged    = TRUE;
48022 +                    break;
48023 +                case WPA_MODE_NONE:
48024 +                    ar->arAuthMode = NONE_AUTH;
48025 +                    profChanged    = TRUE;
48026 +                    break;
48027 +           default:
48028 +                   printk("IEEE80211_PARAM_WPA: Unknown value %d\n", value);
48029 +            }
48030 +            break;
48031 +        case IEEE80211_PARAM_AUTHMODE:
48032 +            switch(value) {
48033 +                case IEEE80211_AUTH_WPA_PSK:
48034 +                    if (WPA_AUTH == ar->arAuthMode) {
48035 +                        ar->arAuthMode = WPA_PSK_AUTH;
48036 +                        profChanged    = TRUE;
48037 +                    } else if (WPA2_AUTH == ar->arAuthMode) {
48038 +                        ar->arAuthMode = WPA2_PSK_AUTH;
48039 +                        profChanged    = TRUE;
48040 +                    } else {
48041 +                        AR_DEBUG_PRINTF("Error -  Setting PSK mode when WPA "\
48042 +                                        "param was set to %d\n",
48043 +                                        ar->arAuthMode);
48044 +                        ret = -1;
48045 +                    }
48046 +                    break;
48047 +                case IEEE80211_AUTH_WPA_CCKM:
48048 +                    if (WPA2_AUTH == ar->arAuthMode) {
48049 +                        ar->arAuthMode = WPA2_AUTH_CCKM;
48050 +                    } else {
48051 +                        ar->arAuthMode = WPA_AUTH_CCKM;
48052 +                    }
48053 +                    break;
48054 +                default:
48055 +                    break;
48056 +            }
48057 +            break;
48058 +        case IEEE80211_PARAM_UCASTCIPHER:
48059 +            switch (value) {
48060 +                case IEEE80211_CIPHER_AES_CCM:
48061 +                    ar->arPairwiseCrypto = AES_CRYPT;
48062 +                    profChanged          = TRUE;
48063 +                    break;
48064 +                case IEEE80211_CIPHER_TKIP:
48065 +                    ar->arPairwiseCrypto = TKIP_CRYPT;
48066 +                    profChanged          = TRUE;
48067 +                    break;
48068 +                case IEEE80211_CIPHER_WEP:
48069 +                    ar->arPairwiseCrypto = WEP_CRYPT;
48070 +                    profChanged          = TRUE;
48071 +                    break;
48072 +                case IEEE80211_CIPHER_NONE:
48073 +                    ar->arPairwiseCrypto = NONE_CRYPT;
48074 +                    profChanged          = TRUE;
48075 +                    break;
48076 +            }
48077 +            break;
48078 +        case IEEE80211_PARAM_UCASTKEYLEN:
48079 +            if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) {
48080 +                ret = -EIO;
48081 +            } else {
48082 +                ar->arPairwiseCryptoLen = value;
48083 +            }
48084 +            break;
48085 +        case IEEE80211_PARAM_MCASTCIPHER:
48086 +            switch (value) {
48087 +                case IEEE80211_CIPHER_AES_CCM:
48088 +                    ar->arGroupCrypto = AES_CRYPT;
48089 +                    profChanged       = TRUE;
48090 +                    break;
48091 +                case IEEE80211_CIPHER_TKIP:
48092 +                    ar->arGroupCrypto = TKIP_CRYPT;
48093 +                    profChanged       = TRUE;
48094 +                    break;
48095 +                case IEEE80211_CIPHER_WEP:
48096 +                    ar->arGroupCrypto = WEP_CRYPT;
48097 +                    profChanged       = TRUE;
48098 +                    break;
48099 +                case IEEE80211_CIPHER_NONE:
48100 +                    ar->arGroupCrypto = NONE_CRYPT;
48101 +                    profChanged       = TRUE;
48102 +                    break;
48103 +            }
48104 +            break;
48105 +        case IEEE80211_PARAM_MCASTKEYLEN:
48106 +            if (!IEEE80211_IS_VALID_WEP_CIPHER_LEN(value)) {
48107 +                ret = -EIO;
48108 +            } else {
48109 +                ar->arGroupCryptoLen = value;
48110 +            }
48111 +            break;
48112 +        case IEEE80211_PARAM_COUNTERMEASURES:
48113 +            if (ar->arWmiReady == FALSE) {
48114 +                return -EIO;
48115 +            }
48116 +            wmi_set_tkip_countermeasures_cmd(ar->arWmi, value);
48117 +            break;
48118 +        default:
48119 +            break;
48120 +    }
48121 +
48122 +    if (profChanged == TRUE) {
48123 +        /*
48124 +         * profile has changed.  Erase ssid to signal change
48125 +         */
48126 +       A_MEMZERO(ar->arSsid, sizeof(ar->arSsid));
48127 +       ar->arSsidLen = 0;
48128 +    }
48129 +
48130 +    return ret;
48131 +}
48132 +
48133 +int
48134 +ar6000_ioctl_getparam(struct net_device *dev, struct iw_request_info *info,
48135 +            void *w, char *extra)
48136 +{
48137 +    return -EIO;            /* for now */
48138 +}
48139 +
48140 +int
48141 +ar6000_ioctl_setkey(struct net_device *dev, struct iw_request_info *info,
48142 +                   void *w, char *extra)
48143 +{
48144 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48145 +    struct ieee80211req_key *ik = (struct ieee80211req_key *)extra;
48146 +    KEY_USAGE keyUsage;
48147 +    A_STATUS status;
48148 +    CRYPTO_TYPE keyType = NONE_CRYPT;
48149 +
48150 +    if (ar->arWlanState == WLAN_DISABLED) {
48151 +        return -EIO;
48152 +    }
48153 +
48154 +    ar->user_saved_keys.keyOk = FALSE;
48155 +
48156 +    if ( 0 == memcmp(ik->ik_macaddr, "\x00\x00\x00\x00\x00\x00",
48157 +                     IEEE80211_ADDR_LEN)) {
48158 +        keyUsage = GROUP_USAGE;
48159 +        A_MEMCPY(&ar->user_saved_keys.bcast_ik, ik,
48160 +                 sizeof(struct ieee80211req_key));
48161 +    } else {
48162 +        keyUsage = PAIRWISE_USAGE;
48163 +        A_MEMCPY(&ar->user_saved_keys.ucast_ik, ik,
48164 +                 sizeof(struct ieee80211req_key));
48165 +    }
48166 +
48167 +    switch (ik->ik_type) {
48168 +        case IEEE80211_CIPHER_WEP:
48169 +            keyType = WEP_CRYPT;
48170 +            break;
48171 +        case IEEE80211_CIPHER_TKIP:
48172 +            keyType = TKIP_CRYPT;
48173 +            break;
48174 +        case IEEE80211_CIPHER_AES_CCM:
48175 +            keyType = AES_CRYPT;
48176 +            break;
48177 +        default:
48178 +            break;
48179 +    }
48180 +    ar->user_saved_keys.keyType = keyType;
48181 +
48182 +    if (IEEE80211_CIPHER_CCKM_KRK != ik->ik_type) {
48183 +        if (NONE_CRYPT == keyType) {
48184 +            return -EIO;
48185 +        }
48186 +
48187 +        status = wmi_addKey_cmd(ar->arWmi, ik->ik_keyix, keyType, keyUsage,
48188 +                                ik->ik_keylen, (A_UINT8 *)&ik->ik_keyrsc,
48189 +                                ik->ik_keydata, KEY_OP_INIT_VAL,
48190 +                                SYNC_BEFORE_WMIFLAG);
48191 +
48192 +        if (status != A_OK) {
48193 +            return -EIO;
48194 +        }
48195 +    } else {
48196 +        status = wmi_add_krk_cmd(ar->arWmi, ik->ik_keydata);
48197 +    }
48198 +
48199 +    ar->user_saved_keys.keyOk = TRUE;
48200 +
48201 +    return 0;
48202 +}
48203 +
48204 +
48205 +/*
48206 + * SIOCGIWNAME
48207 + */
48208 +int
48209 +ar6000_ioctl_giwname(struct net_device *dev,
48210 +           struct iw_request_info *info,
48211 +           char *name, char *extra)
48212 +{
48213 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48214 +
48215 +    if (ar->arWlanState == WLAN_DISABLED) {
48216 +        return -EIO;
48217 +    }
48218 +
48219 +    switch (ar->arPhyCapability) {
48220 +    case (WMI_11A_CAPABILITY):
48221 +        strncpy(name, "AR6000 802.11a", IFNAMSIZ);
48222 +        break;
48223 +    case (WMI_11G_CAPABILITY):
48224 +        strncpy(name, "AR6000 802.11g", IFNAMSIZ);
48225 +        break;
48226 +    case (WMI_11AG_CAPABILITY):
48227 +        strncpy(name, "AR6000 802.11ag", IFNAMSIZ);
48228 +        break;
48229 +    default:
48230 +        strncpy(name, "AR6000 802.11", IFNAMSIZ);
48231 +        break;
48232 +    }
48233 +
48234 +    return 0;
48235 +}
48236 +
48237 +/*
48238 + * SIOCSIWFREQ
48239 + */
48240 +int
48241 +ar6000_ioctl_siwfreq(struct net_device *dev,
48242 +            struct iw_request_info *info,
48243 +            struct iw_freq *freq, char *extra)
48244 +{
48245 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48246 +
48247 +    if (ar->arWlanState == WLAN_DISABLED) {
48248 +        return -EIO;
48249 +    }
48250 +
48251 +    /*
48252 +     * We support limiting the channels via wmiconfig.
48253 +     *
48254 +     * We use this command to configure the channel hint for the connect cmd
48255 +     * so it is possible the target will end up connecting to a different
48256 +     * channel.
48257 +     */
48258 +    if (freq->e > 1) {
48259 +        return -EINVAL;
48260 +    } else if (freq->e == 1) {
48261 +        ar->arChannelHint = freq->m / 100000;
48262 +    } else {
48263 +        ar->arChannelHint = wlan_ieee2freq(freq->m);
48264 +    }
48265 +
48266 +    A_PRINTF("channel hint set to %d\n", ar->arChannelHint);
48267 +    return 0;
48268 +}
48269 +
48270 +/*
48271 + * SIOCGIWFREQ
48272 + */
48273 +int
48274 +ar6000_ioctl_giwfreq(struct net_device *dev,
48275 +                struct iw_request_info *info,
48276 +                struct iw_freq *freq, char *extra)
48277 +{
48278 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48279 +
48280 +    if (ar->arWlanState == WLAN_DISABLED) {
48281 +        return -EIO;
48282 +    }
48283 +
48284 +    if (ar->arConnected != TRUE) {
48285 +        return -EINVAL;
48286 +    }
48287 +
48288 +    freq->m = ar->arBssChannel * 100000;
48289 +    freq->e = 1;
48290 +
48291 +    return 0;
48292 +}
48293 +
48294 +/*
48295 + * SIOCSIWMODE
48296 + */
48297 +int
48298 +ar6000_ioctl_siwmode(struct net_device *dev,
48299 +            struct iw_request_info *info,
48300 +            __u32 *mode, char *extra)
48301 +{
48302 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48303 +
48304 +    if (ar->arWlanState == WLAN_DISABLED) {
48305 +        return -EIO;
48306 +    }
48307 +
48308 +    switch (*mode) {
48309 +    case IW_MODE_INFRA:
48310 +        ar->arNetworkType = INFRA_NETWORK;
48311 +        break;
48312 +    case IW_MODE_ADHOC:
48313 +        ar->arNetworkType = ADHOC_NETWORK;
48314 +        break;
48315 +    default:
48316 +        return -EINVAL;
48317 +    }
48318 +
48319 +    return 0;
48320 +}
48321 +
48322 +/*
48323 + * SIOCGIWMODE
48324 + */
48325 +int
48326 +ar6000_ioctl_giwmode(struct net_device *dev,
48327 +            struct iw_request_info *info,
48328 +            __u32 *mode, char *extra)
48329 +{
48330 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48331 +
48332 +    if (ar->arWlanState == WLAN_DISABLED) {
48333 +        return -EIO;
48334 +    }
48335 +
48336 +    switch (ar->arNetworkType) {
48337 +    case INFRA_NETWORK:
48338 +        *mode = IW_MODE_INFRA;
48339 +        break;
48340 +    case ADHOC_NETWORK:
48341 +        *mode = IW_MODE_ADHOC;
48342 +        break;
48343 +    default:
48344 +        return -EIO;
48345 +    }
48346 +    return 0;
48347 +}
48348 +
48349 +/*
48350 + * SIOCSIWSENS
48351 + */
48352 +int
48353 +ar6000_ioctl_siwsens(struct net_device *dev,
48354 +            struct iw_request_info *info,
48355 +            struct iw_param *sens, char *extra)
48356 +{
48357 +    return 0;
48358 +}
48359 +
48360 +/*
48361 + * SIOCGIWSENS
48362 + */
48363 +int
48364 +ar6000_ioctl_giwsens(struct net_device *dev,
48365 +            struct iw_request_info *info,
48366 +            struct iw_param *sens, char *extra)
48367 +{
48368 +    sens->value = 0;
48369 +    sens->fixed = 1;
48370 +
48371 +    return 0;
48372 +}
48373 +
48374 +/*
48375 + * SIOCGIWRANGE
48376 + */
48377 +int
48378 +ar6000_ioctl_giwrange(struct net_device *dev,
48379 +             struct iw_request_info *info,
48380 +             struct iw_point *data, char *extra)
48381 +{
48382 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48383 +    struct iw_range *range = (struct iw_range *) extra;
48384 +    int i, ret = 0;
48385 +
48386 +    if (ar->arWmiReady == FALSE) {
48387 +        return -EIO;
48388 +    }
48389 +
48390 +    if (ar->arWlanState == WLAN_DISABLED) {
48391 +        return -EIO;
48392 +    }
48393 +
48394 +    if (down_interruptible(&ar->arSem)) {
48395 +        return -ERESTARTSYS;
48396 +    }
48397 +    ar->arNumChannels = -1;
48398 +    A_MEMZERO(ar->arChannelList, sizeof (ar->arChannelList));
48399 +
48400 +    if (wmi_get_channelList_cmd(ar->arWmi) != A_OK) {
48401 +        up(&ar->arSem);
48402 +        return -EIO;
48403 +    }
48404 +
48405 +    wait_event_interruptible_timeout(arEvent, ar->arNumChannels != -1, wmitimeout * HZ);
48406 +
48407 +    if (signal_pending(current)) {
48408 +        up(&ar->arSem);
48409 +        return -EINTR;
48410 +    }
48411 +
48412 +    data->length = sizeof(struct iw_range);
48413 +    A_MEMZERO(range, sizeof(struct iw_range));
48414 +
48415 +    range->txpower_capa = IW_TXPOW_DBM;
48416 +
48417 +    range->min_pmp = 1 * 1024;
48418 +    range->max_pmp = 65535 * 1024;
48419 +    range->min_pmt = 1 * 1024;
48420 +    range->max_pmt = 1000 * 1024;
48421 +    range->pmp_flags = IW_POWER_PERIOD;
48422 +    range->pmt_flags = IW_POWER_TIMEOUT;
48423 +    range->pm_capa = 0;
48424 +
48425 +    range->we_version_compiled = WIRELESS_EXT;
48426 +    range->we_version_source = 13;
48427 +
48428 +    range->retry_capa = IW_RETRY_LIMIT;
48429 +    range->retry_flags = IW_RETRY_LIMIT;
48430 +    range->min_retry = 0;
48431 +    range->max_retry = 255;
48432 +
48433 +    range->num_frequency = range->num_channels = ar->arNumChannels;
48434 +    for (i = 0; i < ar->arNumChannels; i++) {
48435 +        range->freq[i].i = wlan_freq2ieee(ar->arChannelList[i]);
48436 +        range->freq[i].m = ar->arChannelList[i] * 100000;
48437 +        range->freq[i].e = 1;
48438 +         /*
48439 +         * Linux supports max of 32 channels, bail out once you
48440 +         * reach the max.
48441 +         */
48442 +        if (i == IW_MAX_FREQUENCIES) {
48443 +            break;
48444 +        }
48445 +    }
48446 +
48447 +    /* Max quality is max field value minus noise floor */
48448 +    range->max_qual.qual  = 0xff - 161;
48449 +
48450 +    /*
48451 +     * In order to use dBm measurements, 'level' must be lower
48452 +     * than any possible measurement (see iw_print_stats() in
48453 +     * wireless tools).  It's unclear how this is meant to be
48454 +     * done, but setting zero in these values forces dBm and
48455 +     * the actual numbers are not used.
48456 +     */
48457 +    range->max_qual.level = 0;
48458 +    range->max_qual.noise = 0;
48459 +
48460 +    range->sensitivity = 3;
48461 +
48462 +    range->max_encoding_tokens = 4;
48463 +    /* XXX query driver to find out supported key sizes */
48464 +    range->num_encoding_sizes = 3;
48465 +    range->encoding_size[0] = 5;        /* 40-bit */
48466 +    range->encoding_size[1] = 13;       /* 104-bit */
48467 +    range->encoding_size[2] = 16;       /* 128-bit */
48468 +
48469 +    range->num_bitrates = 0;
48470 +
48471 +    /* estimated maximum TCP throughput values (bps) */
48472 +    range->throughput = 22000000;
48473 +
48474 +    range->min_rts = 0;
48475 +    range->max_rts = 2347;
48476 +    range->min_frag = 256;
48477 +    range->max_frag = 2346;
48478 +
48479 +    up(&ar->arSem);
48480 +
48481 +    return ret;
48482 +}
48483 +
48484 +
48485 +/*
48486 + * SIOCSIWAP
48487 + * This ioctl is used to set the desired bssid for the connect command.
48488 + */
48489 +int
48490 +ar6000_ioctl_siwap(struct net_device *dev,
48491 +              struct iw_request_info *info,
48492 +              struct sockaddr *ap_addr, char *extra)
48493 +{
48494 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48495 +
48496 +    if (ar->arWlanState == WLAN_DISABLED) {
48497 +        return -EIO;
48498 +    }
48499 +
48500 +    if (ap_addr->sa_family != ARPHRD_ETHER) {
48501 +        return -EIO;
48502 +    }
48503 +
48504 +    if (A_MEMCMP(&ap_addr->sa_data, bcast_mac, AR6000_ETH_ADDR_LEN) == 0) {
48505 +        A_MEMZERO(ar->arReqBssid, sizeof(ar->arReqBssid));
48506 +    } else {
48507 +        A_MEMCPY(ar->arReqBssid, &ap_addr->sa_data,  sizeof(ar->arReqBssid));
48508 +    }
48509 +
48510 +    return 0;
48511 +}
48512 +
48513 +/*
48514 + * SIOCGIWAP
48515 + */
48516 +int
48517 +ar6000_ioctl_giwap(struct net_device *dev,
48518 +              struct iw_request_info *info,
48519 +              struct sockaddr *ap_addr, char *extra)
48520 +{
48521 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48522 +
48523 +    if (ar->arWlanState == WLAN_DISABLED) {
48524 +        return -EIO;
48525 +    }
48526 +
48527 +    if (ar->arConnected != TRUE) {
48528 +        return -EINVAL;
48529 +    }
48530 +
48531 +    A_MEMCPY(&ap_addr->sa_data, ar->arBssid, sizeof(ar->arBssid));
48532 +    ap_addr->sa_family = ARPHRD_ETHER;
48533 +
48534 +    return 0;
48535 +}
48536 +
48537 +/*
48538 + * SIOCGIWAPLIST
48539 + */
48540 +int
48541 +ar6000_ioctl_iwaplist(struct net_device *dev,
48542 +            struct iw_request_info *info,
48543 +            struct iw_point *data, char *extra)
48544 +{
48545 +    return -EIO;            /* for now */
48546 +}
48547 +
48548 +/*
48549 + * SIOCSIWSCAN
48550 + */
48551 +int
48552 +ar6000_ioctl_siwscan(struct net_device *dev,
48553 +                     struct iw_request_info *info,
48554 +                     struct iw_point *data, char *extra)
48555 +{
48556 +#define ACT_DWELLTIME_DEFAULT   105
48557 +#define HOME_TXDRAIN_TIME       100
48558 +#define SCAN_INT                HOME_TXDRAIN_TIME + ACT_DWELLTIME_DEFAULT
48559 +    AR_SOFTC_T *ar = (AR_SOFTC_T *)dev->priv;
48560 +    int ret = 0;
48561 +
48562 +    if (ar->arWmiReady == FALSE) {
48563 +        return -EIO;
48564 +    }
48565 +
48566 +    if (ar->arWlanState == WLAN_DISABLED) {
48567 +        return -EIO;
48568 +    }
48569 +
48570 +    /* We ask for everything from the target */
48571 +    if (wmi_bssfilter_cmd(ar->arWmi, ALL_BSS_FILTER, 0) != A_OK) {
48572 +           printk("Couldn't set filtering\n");
48573 +           ret = -EIO;
48574 +    }
48575 +
48576 +    if (wmi_startscan_cmd(ar->arWmi, WMI_LONG_SCAN, FALSE, FALSE, \
48577 +                          HOME_TXDRAIN_TIME, SCAN_INT) != A_OK) {
48578 +        ret = -EIO;
48579 +    }
48580 +
48581 +    ar->scan_complete = 0;
48582 +    wait_event_interruptible_timeout(ar6000_scan_queue, ar->scan_complete,
48583 +                                    5 * HZ);
48584 +
48585 +    if (wmi_bssfilter_cmd(ar->arWmi, NONE_BSS_FILTER, 0) != A_OK) {
48586 +           printk("Couldn't set filtering\n");
48587 +           ret = -EIO;
48588 +    }
48589 +
48590 +    return ret;
48591 +#undef  ACT_DWELLTIME_DEFAULT
48592 +#undef HOME_TXDRAIN_TIME
48593 +#undef SCAN_INT
48594 +}
48595 +
48596 +
48597 +/*
48598 + * Units are in db above the noise floor. That means the
48599 + * rssi values reported in the tx/rx descriptors in the
48600 + * driver are the SNR expressed in db.
48601 + *
48602 + * If you assume that the noise floor is -95, which is an
48603 + * excellent assumption 99.5 % of the time, then you can
48604 + * derive the absolute signal level (i.e. -95 + rssi).
48605 + * There are some other slight factors to take into account
48606 + * depending on whether the rssi measurement is from 11b,
48607 + * 11g, or 11a.   These differences are at most 2db and
48608 + * can be documented.
48609 + *
48610 + * NB: various calculations are based on the orinoco/wavelan
48611 + *     drivers for compatibility
48612 + */
48613 +static void
48614 +ar6000_set_quality(struct iw_quality *iq, A_INT8 rssi)
48615 +{
48616 +    if (rssi < 0) {
48617 +        iq->qual = 0;
48618 +    } else {
48619 +        iq->qual = rssi;
48620 +    }
48621 +
48622 +    /* NB: max is 94 because noise is hardcoded to 161 */
48623 +    if (iq->qual > 94)
48624 +        iq->qual = 94;
48625 +
48626 +    iq->noise = 161;        /* -95dBm */
48627 +    iq->level = iq->noise + iq->qual;
48628 +    iq->updated = 7;
48629 +}
48630 +
48631 +
48632 +/* Structures to export the Wireless Handlers */
48633 +static const iw_handler ath_handlers[] = {
48634 +    (iw_handler) NULL,                          /* SIOCSIWCOMMIT */
48635 +    (iw_handler) ar6000_ioctl_giwname,          /* SIOCGIWNAME */
48636 +    (iw_handler) NULL,                          /* SIOCSIWNWID */
48637 +    (iw_handler) NULL,                          /* SIOCGIWNWID */
48638 +    (iw_handler) ar6000_ioctl_siwfreq,          /* SIOCSIWFREQ */
48639 +    (iw_handler) ar6000_ioctl_giwfreq,          /* SIOCGIWFREQ */
48640 +    (iw_handler) ar6000_ioctl_siwmode,          /* SIOCSIWMODE */
48641 +    (iw_handler) ar6000_ioctl_giwmode,          /* SIOCGIWMODE */
48642 +    (iw_handler) ar6000_ioctl_siwsens,          /* SIOCSIWSENS */
48643 +    (iw_handler) ar6000_ioctl_giwsens,          /* SIOCGIWSENS */
48644 +    (iw_handler) NULL /* not _used */,          /* SIOCSIWRANGE */
48645 +    (iw_handler) ar6000_ioctl_giwrange,         /* SIOCGIWRANGE */
48646 +    (iw_handler) NULL /* not used */,           /* SIOCSIWPRIV */
48647 +    (iw_handler) NULL /* kernel code */,        /* SIOCGIWPRIV */
48648 +    (iw_handler) NULL /* not used */,           /* SIOCSIWSTATS */
48649 +    (iw_handler) NULL /* kernel code */,        /* SIOCGIWSTATS */
48650 +    (iw_handler) NULL,                          /* SIOCSIWSPY */
48651 +    (iw_handler) NULL,                          /* SIOCGIWSPY */
48652 +    (iw_handler) NULL,                          /* SIOCSIWTHRSPY */
48653 +    (iw_handler) NULL,                          /* SIOCGIWTHRSPY */
48654 +    (iw_handler) ar6000_ioctl_siwap,            /* SIOCSIWAP */
48655 +    (iw_handler) ar6000_ioctl_giwap,            /* SIOCGIWAP */
48656 +    (iw_handler) NULL,                          /* -- hole -- */
48657 +    (iw_handler) ar6000_ioctl_iwaplist,         /* SIOCGIWAPLIST */
48658 +    (iw_handler) ar6000_ioctl_siwscan,          /* SIOCSIWSCAN */
48659 +    (iw_handler) ar6000_ioctl_giwscan,          /* SIOCGIWSCAN */
48660 +    (iw_handler) ar6000_ioctl_siwessid,         /* SIOCSIWESSID */
48661 +    (iw_handler) ar6000_ioctl_giwessid,         /* SIOCGIWESSID */
48662 +    (iw_handler) NULL,                          /* SIOCSIWNICKN */
48663 +    (iw_handler) NULL,                          /* SIOCGIWNICKN */
48664 +    (iw_handler) NULL,                          /* -- hole -- */
48665 +    (iw_handler) NULL,                          /* -- hole -- */
48666 +    (iw_handler) ar6000_ioctl_siwrate,          /* SIOCSIWRATE */
48667 +    (iw_handler) ar6000_ioctl_giwrate,          /* SIOCGIWRATE */
48668 +    (iw_handler) NULL,           /* SIOCSIWRTS */
48669 +    (iw_handler) NULL,           /* SIOCGIWRTS */
48670 +    (iw_handler) NULL,          /* SIOCSIWFRAG */
48671 +    (iw_handler) NULL,          /* SIOCGIWFRAG */
48672 +    (iw_handler) ar6000_ioctl_siwtxpow,         /* SIOCSIWTXPOW */
48673 +    (iw_handler) ar6000_ioctl_giwtxpow,         /* SIOCGIWTXPOW */
48674 +    (iw_handler) ar6000_ioctl_siwretry,         /* SIOCSIWRETRY */
48675 +    (iw_handler) ar6000_ioctl_giwretry,         /* SIOCGIWRETRY */
48676 +    (iw_handler) ar6000_ioctl_siwencode,        /* SIOCSIWENCODE */
48677 +    (iw_handler) ar6000_ioctl_giwencode,        /* SIOCGIWENCODE */
48678 +    (iw_handler) ar6000_ioctl_siwpower,         /* SIOCSIWPOWER */
48679 +    (iw_handler) ar6000_ioctl_giwpower,         /* SIOCGIWPOWER */
48680 +    (iw_handler) NULL, /* -- hole -- */
48681 +    (iw_handler) NULL, /* -- hole -- */
48682 +    (iw_handler) ar6000_ioctl_siwgenie,        /* SIOCSIWGENIE */
48683 +    (iw_handler) ar6000_ioctl_giwgenie,        /* SIOCGIWGENIE */
48684 +    (iw_handler) ar6000_ioctl_siwauth, /* SIOCSIWAUTH */
48685 +    (iw_handler) ar6000_ioctl_giwauth, /* SIOCGIWAUTH */
48686 +    (iw_handler) ar6000_ioctl_siwencodeext,/* SIOCSIWENCODEEXT */
48687 +    (iw_handler) ar6000_ioctl_giwencodeext,/* SIOCGIWENCODEEXT */
48688 +    (iw_handler) NULL,         /* SIOCSIWPMKSA */
48689 +};
48690 +
48691 +static const iw_handler ath_priv_handlers[] = {
48692 +    (iw_handler) ar6000_ioctl_setparam,         /* SIOCWFIRSTPRIV+0 */
48693 +    (iw_handler) ar6000_ioctl_getparam,         /* SIOCWFIRSTPRIV+1 */
48694 +    (iw_handler) ar6000_ioctl_setkey,           /* SIOCWFIRSTPRIV+2 */
48695 +    (iw_handler) ar6000_ioctl_setwmmparams,     /* SIOCWFIRSTPRIV+3 */
48696 +    (iw_handler) ar6000_ioctl_delkey,           /* SIOCWFIRSTPRIV+4 */
48697 +    (iw_handler) ar6000_ioctl_getwmmparams,     /* SIOCWFIRSTPRIV+5 */
48698 +    (iw_handler) ar6000_ioctl_setoptie,         /* SIOCWFIRSTPRIV+6 */
48699 +    (iw_handler) ar6000_ioctl_setmlme,          /* SIOCWFIRSTPRIV+7 */
48700 +    (iw_handler) ar6000_ioctl_addpmkid,         /* SIOCWFIRSTPRIV+8 */
48701 +};
48702 +
48703 +#define IW_PRIV_TYPE_KEY \
48704 +    (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_key))
48705 +#define IW_PRIV_TYPE_DELKEY \
48706 +    (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_del_key))
48707 +#define IW_PRIV_TYPE_MLME \
48708 +    (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_mlme))
48709 +#define IW_PRIV_TYPE_ADDPMKID \
48710 +    (IW_PRIV_TYPE_BYTE | sizeof(struct ieee80211req_addpmkid))
48711 +
48712 +static const struct iw_priv_args ar6000_priv_args[] = {
48713 +    { IEEE80211_IOCTL_SETKEY,
48714 +      IW_PRIV_TYPE_KEY | IW_PRIV_SIZE_FIXED, 0,       "setkey"},
48715 +    { IEEE80211_IOCTL_DELKEY,
48716 +      IW_PRIV_TYPE_DELKEY | IW_PRIV_SIZE_FIXED, 0,    "delkey"},
48717 +    { IEEE80211_IOCTL_SETPARAM,
48718 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0,   "setparam"},
48719 +    { IEEE80211_IOCTL_GETPARAM,
48720 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
48721 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,      "getparam"},
48722 +    { IEEE80211_IOCTL_SETWMMPARAMS,
48723 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 4, 0,   "setwmmparams"},
48724 +    { IEEE80211_IOCTL_GETWMMPARAMS,
48725 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3,
48726 +      IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,      "getwmmparams"},
48727 +    { IEEE80211_IOCTL_SETOPTIE,
48728 +      IW_PRIV_TYPE_BYTE, 0,       "setie"},
48729 +    { IEEE80211_IOCTL_SETMLME,
48730 +      IW_PRIV_TYPE_MLME, 0,       "setmlme"},
48731 +    { IEEE80211_IOCTL_ADDPMKID,
48732 +      IW_PRIV_TYPE_ADDPMKID | IW_PRIV_SIZE_FIXED, 0,  "addpmkid"},
48733 +};
48734 +
48735 +void ar6000_ioctl_iwsetup(struct iw_handler_def *def)
48736 +{
48737 +    def->private_args = (struct iw_priv_args *)ar6000_priv_args;
48738 +    def->num_private_args = ARRAY_SIZE(ar6000_priv_args);
48739 +}
48740 +
48741 +struct iw_handler_def ath_iw_handler_def = {
48742 +    .standard         = (iw_handler *)ath_handlers,
48743 +    .num_standard     = ARRAY_SIZE(ath_handlers),
48744 +    .private          = (iw_handler *)ath_priv_handlers,
48745 +    .num_private      = ARRAY_SIZE(ath_priv_handlers),
48746 +};
48747 +
48748 +
48749 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi.c
48750 ===================================================================
48751 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
48752 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi.c  2008-12-11 22:46:49.000000000 +0100
48753 @@ -0,0 +1,657 @@
48754 +/*
48755 + * Copyright (c) 2004-2007 Atheros Communications Inc.
48756 + * All rights reserved.
48757 + *
48758 + *
48759 + *  This program is free software; you can redistribute it and/or modify
48760 + *  it under the terms of the GNU General Public License version 2 as
48761 + *  published by the Free Software Foundation;
48762 + *
48763 + *  Software distributed under the License is distributed on an "AS
48764 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
48765 + *  implied. See the License for the specific language governing
48766 + *  rights and limitations under the License.
48767 + *
48768 + *
48769 + *
48770 + */
48771 +
48772 +#include "hif.h"
48773 +#include "bmi.h"
48774 +#include "htc_api.h"
48775 +#include "bmi_internal.h"
48776 +
48777 +/*
48778 +Although we had envisioned BMI to run on top of HTC, this is not what the
48779 +final implementation boiled down to on dragon. Its a part of BSP and does
48780 +not use the HTC protocol either. On the host side, however, we were still
48781 +living with the original idea. I think the time has come to accept the truth
48782 +and separate it from HTC which has been carrying BMI's burden all this while.
48783 +It shall make HTC state machine relatively simpler
48784 +*/
48785 +
48786 +/* APIs visible to the driver */
48787 +void
48788 +BMIInit(void)
48789 +{
48790 +    bmiDone = FALSE;
48791 +}
48792 +
48793 +A_STATUS
48794 +BMIDone(HIF_DEVICE *device)
48795 +{
48796 +    A_STATUS status;
48797 +    A_UINT32 cid;
48798 +
48799 +    if (bmiDone) {
48800 +        AR_DEBUG_PRINTF (ATH_DEBUG_BMI, ("BMIDone skipped\n"));
48801 +        return A_OK;
48802 +    }
48803 +
48804 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Enter (device: 0x%p)\n", device));
48805 +    bmiDone = TRUE;
48806 +    cid = BMI_DONE;
48807 +
48808 +    status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
48809 +    if (status != A_OK) {
48810 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
48811 +        return A_ERROR;
48812 +    }
48813 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Done: Exit\n"));
48814 +
48815 +    return A_OK;
48816 +}
48817 +
48818 +A_STATUS
48819 +BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info)
48820 +{
48821 +    A_STATUS status;
48822 +    A_UINT32 cid;
48823 +
48824 +    if (bmiDone) {
48825 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
48826 +        return A_ERROR;
48827 +    }
48828 +
48829 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Enter (device: 0x%p)\n", device));
48830 +    cid = BMI_GET_TARGET_INFO;
48831 +
48832 +    status = bmiBufferSend(device, (A_UCHAR *)&cid, sizeof(cid));
48833 +    if (status != A_OK) {
48834 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
48835 +        return A_ERROR;
48836 +    }
48837 +
48838 +    status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_ver,
48839 +                                                sizeof(targ_info->target_ver));
48840 +    if (status != A_OK) {
48841 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Version from the device\n"));
48842 +        return A_ERROR;
48843 +    }
48844 +
48845 +    if (targ_info->target_ver == TARGET_VERSION_SENTINAL) {
48846 +        /* Determine how many bytes are in the Target's targ_info */
48847 +        status = bmiBufferReceive(device, (A_UCHAR *)&targ_info->target_info_byte_count,
48848 +                                            sizeof(targ_info->target_info_byte_count));
48849 +        if (status != A_OK) {
48850 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info Byte Count from the device\n"));
48851 +            return A_ERROR;
48852 +        }
48853 +
48854 +        /*
48855 +         * The Target's targ_info doesn't match the Host's targ_info.
48856 +         * We need to do some backwards compatibility work to make this OK.
48857 +         */
48858 +        A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info));
48859 +
48860 +        /* Read the remainder of the targ_info */
48861 +        status = bmiBufferReceive(device,
48862 +                        ((A_UCHAR *)targ_info)+sizeof(targ_info->target_info_byte_count),
48863 +                        sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count));
48864 +        if (status != A_OK) {
48865 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info (%d bytes) from the device\n",
48866 +                                                               targ_info->target_info_byte_count));
48867 +            return A_ERROR;
48868 +        }
48869 +    } else {
48870 +        /*
48871 +         * Target must be an AR6001 whose firmware does not
48872 +         * support BMI_GET_TARGET_INFO.  Construct the data
48873 +         * that it would have sent.
48874 +         */
48875 +        targ_info->target_info_byte_count = sizeof(targ_info);
48876 +        targ_info->target_type = TARGET_TYPE_AR6001;
48877 +    }
48878 +
48879 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
48880 +                                                               targ_info->target_ver, targ_info->target_type));
48881 +    printk("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
48882 +          targ_info->target_ver, targ_info->target_type);
48883 +
48884 +    return A_OK;
48885 +}
48886 +
48887 +A_STATUS
48888 +BMIReadMemory(HIF_DEVICE *device,
48889 +              A_UINT32 address,
48890 +              A_UCHAR *buffer,
48891 +              A_UINT32 length)
48892 +{
48893 +    A_UINT32 cid;
48894 +    A_STATUS status;
48895 +    A_UINT32 offset;
48896 +    A_UINT32 remaining, rxlen;
48897 +    static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)];
48898 +    memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length));
48899 +
48900 +    if (bmiDone) {
48901 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
48902 +        return A_ERROR;
48903 +    }
48904 +
48905 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
48906 +                               ("BMI Read Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
48907 +                               device, address, length));
48908 +
48909 +    cid = BMI_READ_MEMORY;
48910 +
48911 +    remaining = length;
48912 +
48913 +    while (remaining)
48914 +    {
48915 +        rxlen = (remaining < BMI_DATASZ_MAX) ? remaining : BMI_DATASZ_MAX;
48916 +        offset = 0;
48917 +        A_MEMCPY(&data[offset], &cid, sizeof(cid));
48918 +        offset += sizeof(cid);
48919 +        A_MEMCPY(&data[offset], &address, sizeof(address));
48920 +        offset += sizeof(address);
48921 +        A_MEMCPY(&data[offset], &rxlen, sizeof(rxlen));
48922 +        offset += sizeof(length);
48923 +
48924 +        status = bmiBufferSend(device, data, offset);
48925 +        if (status != A_OK) {
48926 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
48927 +            return A_ERROR;
48928 +        }
48929 +        status = bmiBufferReceive(device, data, rxlen);
48930 +        if (status != A_OK) {
48931 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
48932 +            return A_ERROR;
48933 +        }
48934 +        A_MEMCPY(&buffer[length - remaining], data, rxlen);
48935 +        remaining -= rxlen; address += rxlen;
48936 +    }
48937 +
48938 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read Memory: Exit\n"));
48939 +    return A_OK;
48940 +}
48941 +
48942 +A_STATUS
48943 +BMIWriteMemory(HIF_DEVICE *device,
48944 +               A_UINT32 address,
48945 +               A_UCHAR *buffer,
48946 +               A_UINT32 length)
48947 +{
48948 +    A_UINT32 cid;
48949 +    A_STATUS status;
48950 +    A_UINT32 offset;
48951 +    A_UINT32 remaining, txlen;
48952 +    const A_UINT32 header = sizeof(cid) + sizeof(address) + sizeof(length);
48953 +    static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)];
48954 +       memset (&data, 0, header);
48955 +
48956 +    if (bmiDone) {
48957 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
48958 +        return A_ERROR;
48959 +    }
48960 +
48961 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
48962 +         ("BMI Write Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
48963 +         device, address, length));
48964 +
48965 +    cid = BMI_WRITE_MEMORY;
48966 +
48967 +    remaining = length;
48968 +    while (remaining)
48969 +    {
48970 +        txlen = (remaining < (BMI_DATASZ_MAX - header)) ?
48971 +                                       remaining : (BMI_DATASZ_MAX - header);
48972 +        offset = 0;
48973 +        A_MEMCPY(&data[offset], &cid, sizeof(cid));
48974 +        offset += sizeof(cid);
48975 +        A_MEMCPY(&data[offset], &address, sizeof(address));
48976 +        offset += sizeof(address);
48977 +        A_MEMCPY(&data[offset], &txlen, sizeof(txlen));
48978 +        offset += sizeof(txlen);
48979 +        A_MEMCPY(&data[offset], &buffer[length - remaining], txlen);
48980 +        offset += txlen;
48981 +        status = bmiBufferSend(device, data, offset);
48982 +        if (status != A_OK) {
48983 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
48984 +            return A_ERROR;
48985 +        }
48986 +        remaining -= txlen; address += txlen;
48987 +    }
48988 +
48989 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Write Memory: Exit\n"));
48990 +
48991 +    return A_OK;
48992 +}
48993 +
48994 +A_STATUS
48995 +BMIExecute(HIF_DEVICE *device,
48996 +           A_UINT32 address,
48997 +           A_UINT32 *param)
48998 +{
48999 +    A_UINT32 cid;
49000 +    A_STATUS status;
49001 +    A_UINT32 offset;
49002 +    static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(*param)];
49003 +    memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(*param));
49004 +
49005 +    if (bmiDone) {
49006 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49007 +        return A_ERROR;
49008 +    }
49009 +
49010 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49011 +       ("BMI Execute: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
49012 +        device, address, *param));
49013 +
49014 +    cid = BMI_EXECUTE;
49015 +
49016 +    offset = 0;
49017 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49018 +    offset += sizeof(cid);
49019 +    A_MEMCPY(&data[offset], &address, sizeof(address));
49020 +    offset += sizeof(address);
49021 +    A_MEMCPY(&data[offset], param, sizeof(*param));
49022 +    offset += sizeof(*param);
49023 +    status = bmiBufferSend(device, data, offset);
49024 +    if (status != A_OK) {
49025 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49026 +        return A_ERROR;
49027 +    }
49028 +
49029 +    status = bmiBufferReceive(device, data, sizeof(*param));
49030 +    if (status != A_OK) {
49031 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
49032 +        return A_ERROR;
49033 +    }
49034 +
49035 +    A_MEMCPY(param, data, sizeof(*param));
49036 +
49037 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Execute: Exit (param: %d)\n", *param));
49038 +    return A_OK;
49039 +}
49040 +
49041 +A_STATUS
49042 +BMISetAppStart(HIF_DEVICE *device,
49043 +               A_UINT32 address)
49044 +{
49045 +    A_UINT32 cid;
49046 +    A_STATUS status;
49047 +    A_UINT32 offset;
49048 +    static A_UCHAR data[sizeof(cid) + sizeof(address)];
49049 +    memset (&data, 0, sizeof(cid) + sizeof(address));
49050 +
49051 +    if (bmiDone) {
49052 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49053 +        return A_ERROR;
49054 +    }
49055 +
49056 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49057 +       ("BMI Set App Start: Enter (device: 0x%p, address: 0x%x)\n",
49058 +        device, address));
49059 +
49060 +    cid = BMI_SET_APP_START;
49061 +
49062 +    offset = 0;
49063 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49064 +    offset += sizeof(cid);
49065 +    A_MEMCPY(&data[offset], &address, sizeof(address));
49066 +    offset += sizeof(address);
49067 +    status = bmiBufferSend(device, data, offset);
49068 +    if (status != A_OK) {
49069 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49070 +        return A_ERROR;
49071 +    }
49072 +
49073 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Set App Start: Exit\n"));
49074 +    return A_OK;
49075 +}
49076 +
49077 +A_STATUS
49078 +BMIReadSOCRegister(HIF_DEVICE *device,
49079 +                   A_UINT32 address,
49080 +                   A_UINT32 *param)
49081 +{
49082 +    A_UINT32 cid;
49083 +    A_STATUS status;
49084 +    A_UINT32 offset;
49085 +    static A_UCHAR data[sizeof(cid) + sizeof(address)];
49086 +    memset (&data, 0, sizeof(cid) + sizeof(address));
49087 +
49088 +    if (bmiDone) {
49089 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49090 +        return A_ERROR;
49091 +    }
49092 +
49093 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49094 +       ("BMI Read SOC Register: Enter (device: 0x%p, address: 0x%x)\n",
49095 +       device, address));
49096 +
49097 +    cid = BMI_READ_SOC_REGISTER;
49098 +
49099 +    offset = 0;
49100 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49101 +    offset += sizeof(cid);
49102 +    A_MEMCPY(&data[offset], &address, sizeof(address));
49103 +    offset += sizeof(address);
49104 +
49105 +    status = bmiBufferSend(device, data, offset);
49106 +    if (status != A_OK) {
49107 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49108 +        return A_ERROR;
49109 +    }
49110 +
49111 +    status = bmiBufferReceive(device, data, sizeof(*param));
49112 +    if (status != A_OK) {
49113 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
49114 +        return A_ERROR;
49115 +    }
49116 +    A_MEMCPY(param, data, sizeof(*param));
49117 +
49118 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit (value: %d)\n", *param));
49119 +    return A_OK;
49120 +}
49121 +
49122 +A_STATUS
49123 +BMIWriteSOCRegister(HIF_DEVICE *device,
49124 +                    A_UINT32 address,
49125 +                    A_UINT32 param)
49126 +{
49127 +    A_UINT32 cid;
49128 +    A_STATUS status;
49129 +    A_UINT32 offset;
49130 +    static A_UCHAR data[sizeof(cid) + sizeof(address) + sizeof(param)];
49131 +
49132 +    memset (&data, 0, sizeof(cid) + sizeof(address) + sizeof(param));
49133 +
49134 +    if (bmiDone) {
49135 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49136 +        return A_ERROR;
49137 +    }
49138 +
49139 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49140 +     ("BMI Write SOC Register: Enter (device: 0x%p, address: 0x%x, param: %d)\n",
49141 +     device, address, param));
49142 +
49143 +    cid = BMI_WRITE_SOC_REGISTER;
49144 +
49145 +    offset = 0;
49146 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49147 +    offset += sizeof(cid);
49148 +    A_MEMCPY(&data[offset], &address, sizeof(address));
49149 +    offset += sizeof(address);
49150 +    A_MEMCPY(&data[offset], &param, sizeof(param));
49151 +    offset += sizeof(param);
49152 +    status = bmiBufferSend(device, data, offset);
49153 +    if (status != A_OK) {
49154 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49155 +        return A_ERROR;
49156 +    }
49157 +
49158 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read SOC Register: Exit\n"));
49159 +    return A_OK;
49160 +}
49161 +
49162 +A_STATUS
49163 +BMIrompatchInstall(HIF_DEVICE *device,
49164 +                   A_UINT32 ROM_addr,
49165 +                   A_UINT32 RAM_addr,
49166 +                   A_UINT32 nbytes,
49167 +                   A_UINT32 do_activate,
49168 +                   A_UINT32 *rompatch_id)
49169 +{
49170 +    A_UINT32 cid;
49171 +    A_STATUS status;
49172 +    A_UINT32 offset;
49173 +    static A_UCHAR data[sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
49174 +                                sizeof(nbytes) + sizeof(do_activate)];
49175 +
49176 +       memset (&data, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
49177 +                      sizeof(nbytes) + sizeof(do_activate));
49178 +
49179 +    if (bmiDone) {
49180 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49181 +        return A_ERROR;
49182 +    }
49183 +
49184 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49185 +         ("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n",
49186 +         device, ROM_addr, RAM_addr, nbytes, do_activate));
49187 +
49188 +    cid = BMI_ROMPATCH_INSTALL;
49189 +
49190 +    offset = 0;
49191 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49192 +    offset += sizeof(cid);
49193 +    A_MEMCPY(&data[offset], &ROM_addr, sizeof(ROM_addr));
49194 +    offset += sizeof(ROM_addr);
49195 +    A_MEMCPY(&data[offset], &RAM_addr, sizeof(RAM_addr));
49196 +    offset += sizeof(RAM_addr);
49197 +    A_MEMCPY(&data[offset], &nbytes, sizeof(nbytes));
49198 +    offset += sizeof(nbytes);
49199 +    A_MEMCPY(&data[offset], &do_activate, sizeof(do_activate));
49200 +    offset += sizeof(do_activate);
49201 +    status = bmiBufferSend(device, data, offset);
49202 +    if (status != A_OK) {
49203 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49204 +        return A_ERROR;
49205 +    }
49206 +
49207 +    status = bmiBufferReceive(device, (A_UCHAR *)rompatch_id, sizeof(*rompatch_id));
49208 +    if (status != A_OK) {
49209 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
49210 +        return A_ERROR;
49211 +    }
49212 +
49213 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id));
49214 +    return A_OK;
49215 +}
49216 +
49217 +A_STATUS
49218 +BMIrompatchUninstall(HIF_DEVICE *device,
49219 +                     A_UINT32 rompatch_id)
49220 +{
49221 +    A_UINT32 cid;
49222 +    A_STATUS status;
49223 +    A_UINT32 offset;
49224 +    static A_UCHAR data[sizeof(cid) + sizeof(rompatch_id)];
49225 +    memset (&data, 0, sizeof(cid) + sizeof(rompatch_id));
49226 +
49227 +    if (bmiDone) {
49228 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49229 +        return A_ERROR;
49230 +    }
49231 +
49232 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49233 +         ("BMI rompatch Uninstall: Enter (device: 0x%p, rompatch_id: %d)\n",
49234 +                                                                        device, rompatch_id));
49235 +
49236 +    cid = BMI_ROMPATCH_UNINSTALL;
49237 +
49238 +    offset = 0;
49239 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49240 +    offset += sizeof(cid);
49241 +    A_MEMCPY(&data[offset], &rompatch_id, sizeof(rompatch_id));
49242 +    offset += sizeof(rompatch_id);
49243 +    status = bmiBufferSend(device, data, offset);
49244 +    if (status != A_OK) {
49245 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49246 +        return A_ERROR;
49247 +    }
49248 +
49249 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch UNinstall: (rompatch_id=0x%x)\n", rompatch_id));
49250 +    return A_OK;
49251 +}
49252 +
49253 +static A_STATUS
49254 +_BMIrompatchChangeActivation(HIF_DEVICE *device,
49255 +                             A_UINT32 rompatch_count,
49256 +                             A_UINT32 *rompatch_list,
49257 +                             A_UINT32 do_activate)
49258 +{
49259 +    A_UINT32 cid;
49260 +    A_STATUS status;
49261 +    A_UINT32 offset;
49262 +    static A_UCHAR data[BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count)];
49263 +    A_UINT32 length;
49264 +
49265 +       memset (&data, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(rompatch_count));
49266 +
49267 +    if (bmiDone) {
49268 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
49269 +        return A_ERROR;
49270 +    }
49271 +
49272 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
49273 +         ("BMI Change rompatch Activation: Enter (device: 0x%p, count: %d)\n",
49274 +           device, rompatch_count));
49275 +
49276 +    cid = do_activate ? BMI_ROMPATCH_ACTIVATE : BMI_ROMPATCH_DEACTIVATE;
49277 +
49278 +    offset = 0;
49279 +    A_MEMCPY(&data[offset], &cid, sizeof(cid));
49280 +    offset += sizeof(cid);
49281 +    A_MEMCPY(&data[offset], &rompatch_count, sizeof(rompatch_count));
49282 +    offset += sizeof(rompatch_count);
49283 +    length = rompatch_count * sizeof(*rompatch_list);
49284 +    A_MEMCPY(&data[offset], rompatch_list, length);
49285 +    offset += length;
49286 +    status = bmiBufferSend(device, data, offset);
49287 +    if (status != A_OK) {
49288 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
49289 +        return A_ERROR;
49290 +    }
49291 +
49292 +    AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Change rompatch Activation: Exit\n"));
49293 +
49294 +    return A_OK;
49295 +}
49296 +
49297 +A_STATUS
49298 +BMIrompatchActivate(HIF_DEVICE *device,
49299 +                    A_UINT32 rompatch_count,
49300 +                    A_UINT32 *rompatch_list)
49301 +{
49302 +    return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 1);
49303 +}
49304 +
49305 +A_STATUS
49306 +BMIrompatchDeactivate(HIF_DEVICE *device,
49307 +                      A_UINT32 rompatch_count,
49308 +                      A_UINT32 *rompatch_list)
49309 +{
49310 +    return _BMIrompatchChangeActivation(device, rompatch_count, rompatch_list, 0);
49311 +}
49312 +
49313 +/* BMI Access routines */
49314 +A_STATUS
49315 +bmiBufferSend(HIF_DEVICE *device,
49316 +              A_UCHAR *buffer,
49317 +              A_UINT32 length)
49318 +{
49319 +    A_STATUS status;
49320 +    A_UINT32 timeout;
49321 +    A_UINT32 address;
49322 +    static A_UINT32 cmdCredits;
49323 +    A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
49324 +
49325 +    HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
49326 +                       &mboxAddress, sizeof(mboxAddress));
49327 +
49328 +    cmdCredits = 0;
49329 +    timeout = BMI_COMMUNICATION_TIMEOUT;
49330 +
49331 +    while(timeout-- && !cmdCredits) {
49332 +        /* Read the counter register to get the command credits */
49333 +        address = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
49334 +        /* hit the credit counter with a 4-byte access, the first byte read will hit the counter and cause
49335 +         * a decrement, while the remaining 3 bytes has no effect.  The rationale behind this is to
49336 +         * make all HIF accesses 4-byte aligned */
49337 +        status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, 4,
49338 +            HIF_RD_SYNC_BYTE_INC, NULL);
49339 +        if (status != A_OK) {
49340 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to decrement the command credit count register\n"));
49341 +            return A_ERROR;
49342 +        }
49343 +        /* the counter is only 8=bits, ignore anything in the upper 3 bytes */
49344 +        cmdCredits &= 0xFF;
49345 +    }
49346 +
49347 +    if (cmdCredits) {
49348 +        address = mboxAddress[ENDPOINT1];
49349 +        status = HIFReadWrite(device, address, buffer, length,
49350 +            HIF_WR_SYNC_BYTE_INC, NULL);
49351 +        if (status != A_OK) {
49352 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to send the BMI data to the device\n"));
49353 +            return A_ERROR;
49354 +        }
49355 +    } else {
49356 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("BMI Communication timeout\n"));
49357 +        return A_ERROR;
49358 +    }
49359 +
49360 +    return status;
49361 +}
49362 +
49363 +A_STATUS
49364 +bmiBufferReceive(HIF_DEVICE *device,
49365 +                 A_UCHAR *buffer,
49366 +                 A_UINT32 length)
49367 +{
49368 +    A_STATUS status;
49369 +    A_UINT32 address;
49370 +    A_UINT32 timeout;
49371 +    static A_UINT32 cmdCredits;
49372 +    A_UINT32 mboxAddress[HTC_MAILBOX_NUM_MAX];
49373 +
49374 +    HIFConfigureDevice(device, HIF_DEVICE_GET_MBOX_ADDR,
49375 +                       &mboxAddress, sizeof(mboxAddress));
49376 +
49377 +    cmdCredits = 0;
49378 +    timeout = BMI_COMMUNICATION_TIMEOUT;
49379 +    while(timeout-- && !cmdCredits) {
49380 +        /* Read the counter register to get the command credits */
49381 +        address = COUNT_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 1;
49382 +        /* read the counter using a 4-byte read.  Since the counter is NOT auto-decrementing,
49383 +         * we can read this counter multiple times using a non-incrementing address mode.
49384 +         * The rationale here is to make all HIF accesses a multiple of 4 bytes */
49385 +        status = HIFReadWrite(device, address, (A_UINT8 *)&cmdCredits, sizeof(cmdCredits),
49386 +            HIF_RD_SYNC_BYTE_FIX, NULL);
49387 +        if (status != A_OK) {
49388 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the command credit count register\n"));
49389 +            return A_ERROR;
49390 +        }
49391 +            /* we did a 4-byte read to the same count register so mask off upper bytes */
49392 +        cmdCredits &= 0xFF;
49393 +        status = A_ERROR;
49394 +    }
49395 +
49396 +    if (cmdCredits) {
49397 +        address = mboxAddress[ENDPOINT1];
49398 +        status = HIFReadWrite(device, address, buffer, length,
49399 +            HIF_RD_SYNC_BYTE_INC, NULL);
49400 +        if (status != A_OK) {
49401 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read the BMI data from the device\n"));
49402 +            return A_ERROR;
49403 +        }
49404 +    } else {
49405 +        AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Communication timeout\n"));
49406 +        return A_ERROR;
49407 +    }
49408 +
49409 +    return status;
49410 +}
49411 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h
49412 ===================================================================
49413 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
49414 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/bmi/bmi_internal.h 2008-12-11 22:46:49.000000000 +0100
49415 @@ -0,0 +1,45 @@
49416 +#ifndef BMI_INTERNAL_H
49417 +#define BMI_INTERNAL_H
49418 +/*
49419 + *
49420 + * Copyright (c) 2004-2007 Atheros Communications Inc.
49421 + * All rights reserved.
49422 + *
49423 + *
49424 + *  This program is free software; you can redistribute it and/or modify
49425 + *  it under the terms of the GNU General Public License version 2 as
49426 + *  published by the Free Software Foundation;
49427 + *
49428 + *  Software distributed under the License is distributed on an "AS
49429 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
49430 + *  implied. See the License for the specific language governing
49431 + *  rights and limitations under the License.
49432 + *
49433 + *
49434 + *
49435 + */
49436 +
49437 +#include "a_config.h"
49438 +#include "athdefs.h"
49439 +#include "a_types.h"
49440 +#include "a_osapi.h"
49441 +#include "a_debug.h"
49442 +#include "AR6Khwreg.h"
49443 +#include "bmi_msg.h"
49444 +
49445 +#define BMI_COMMUNICATION_TIMEOUT       100000
49446 +
49447 +/* ------ Global Variable Declarations ------- */
49448 +A_BOOL bmiDone;
49449 +
49450 +A_STATUS
49451 +bmiBufferSend(HIF_DEVICE *device,
49452 +              A_UCHAR *buffer,
49453 +              A_UINT32 length);
49454 +
49455 +A_STATUS
49456 +bmiBufferReceive(HIF_DEVICE *device,
49457 +                 A_UCHAR *buffer,
49458 +                 A_UINT32 length);
49459 +
49460 +#endif
49461 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif.c
49462 ===================================================================
49463 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
49464 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif.c  2008-12-11 22:46:49.000000000 +0100
49465 @@ -0,0 +1,824 @@
49466 +/*
49467 + * @file: hif.c
49468 + *
49469 + * @abstract: HIF layer reference implementation for Atheros SDIO stack
49470 + *
49471 + * @notice: Copyright (c) 2004-2006 Atheros Communications Inc.
49472 + *
49473 + *
49474 + *  This program is free software; you can redistribute it and/or modify
49475 + *  it under the terms of the GNU General Public License version 2 as
49476 + *  published by the Free Software Foundation;
49477 + *
49478 + *  Software distributed under the License is distributed on an "AS
49479 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
49480 + *  implied. See the License for the specific language governing
49481 + *  rights and limitations under the License.
49482 + *
49483 + *
49484 + *
49485 + */
49486 +
49487 +#include "hif_internal.h"
49488 +
49489 +/* ------ Static Variables ------ */
49490 +
49491 +/* ------ Global Variable Declarations ------- */
49492 +SD_PNP_INFO Ids[] = {
49493 +    {
49494 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xB,
49495 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49496 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49497 +        .SDIO_FunctionNo = 1
49498 +    },
49499 +    {
49500 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0xA,
49501 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49502 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49503 +        .SDIO_FunctionNo = 1
49504 +    },
49505 +    {
49506 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x9,
49507 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49508 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49509 +        .SDIO_FunctionNo = 1
49510 +    },
49511 +    {
49512 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6001_BASE | 0x8,
49513 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49514 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49515 +        .SDIO_FunctionNo = 1
49516 +    },
49517 +    {
49518 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x0,
49519 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49520 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49521 +        .SDIO_FunctionNo = 1
49522 +    },
49523 +    {
49524 +        .SDIO_ManufacturerID = MANUFACTURER_ID_AR6002_BASE | 0x1,
49525 +        .SDIO_ManufacturerCode = MANUFACTURER_CODE,
49526 +        .SDIO_FunctionClass = FUNCTION_CLASS,
49527 +        .SDIO_FunctionNo = 1
49528 +    },
49529 +    {
49530 +    }                      //list is null termintaed
49531 +};
49532 +
49533 +TARGET_FUNCTION_CONTEXT FunctionContext = {
49534 +    .function.Version    = CT_SDIO_STACK_VERSION_CODE,
49535 +    .function.pName      = "sdio_wlan",
49536 +    .function.MaxDevices = 1,
49537 +    .function.NumDevices = 0,
49538 +    .function.pIds       = Ids,
49539 +    .function.pProbe     = hifDeviceInserted,
49540 +    .function.pRemove    = hifDeviceRemoved,
49541 +    .function.pSuspend   = NULL,
49542 +    .function.pResume    = NULL,
49543 +    .function.pWake      = NULL,
49544 +    .function.pContext   = &FunctionContext,
49545 +};
49546 +
49547 +HIF_DEVICE hifDevice[HIF_MAX_DEVICES];
49548 +HTC_CALLBACKS htcCallbacks;
49549 +BUS_REQUEST busRequest[BUS_REQUEST_MAX_NUM];
49550 +static BUS_REQUEST *s_busRequestFreeQueue = NULL;
49551 +OS_CRITICALSECTION lock;
49552 +extern A_UINT32 onebitmode;
49553 +extern A_UINT32 busspeedlow;
49554 +
49555 +#ifdef DEBUG
49556 +extern A_UINT32 debughif;
49557 +#define ATH_DEBUG_ERROR 1
49558 +#define ATH_DEBUG_WARN  2
49559 +#define ATH_DEBUG_TRACE 3
49560 +#define _AR_DEBUG_PRINTX_ARG(arg...) arg
49561 +#define AR_DEBUG_PRINTF(lvl, args)\
49562 +    {if (lvl <= debughif)\
49563 +        A_PRINTF(KERN_ALERT _AR_DEBUG_PRINTX_ARG args);\
49564 +    }
49565 +#else
49566 +#define AR_DEBUG_PRINTF(lvl, args)
49567 +#endif
49568 +
49569 +static BUS_REQUEST *hifAllocateBusRequest(void);
49570 +static void hifFreeBusRequest(BUS_REQUEST *busrequest);
49571 +static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper);
49572 +static void ResetAllCards(void);
49573 +
49574 +/* ------ Functions ------ */
49575 +int HIFInit(HTC_CALLBACKS *callbacks)
49576 +{
49577 +    SDIO_STATUS status;
49578 +    DBG_ASSERT(callbacks != NULL);
49579 +
49580 +    /* Store the callback and event handlers */
49581 +    htcCallbacks.deviceInsertedHandler = callbacks->deviceInsertedHandler;
49582 +    htcCallbacks.deviceRemovedHandler = callbacks->deviceRemovedHandler;
49583 +    htcCallbacks.deviceSuspendHandler = callbacks->deviceSuspendHandler;
49584 +    htcCallbacks.deviceResumeHandler = callbacks->deviceResumeHandler;
49585 +    htcCallbacks.deviceWakeupHandler = callbacks->deviceWakeupHandler;
49586 +    htcCallbacks.rwCompletionHandler = callbacks->rwCompletionHandler;
49587 +    htcCallbacks.dsrHandler = callbacks->dsrHandler;
49588 +
49589 +    CriticalSectionInit(&lock);
49590 +
49591 +    /* Register with bus driver core */
49592 +    status = SDIO_RegisterFunction(&FunctionContext.function);
49593 +    DBG_ASSERT(SDIO_SUCCESS(status));
49594 +
49595 +    return(0);
49596 +}
49597 +
49598 +A_STATUS
49599 +HIFReadWrite(HIF_DEVICE *device,
49600 +             A_UINT32 address,
49601 +             A_UCHAR *buffer,
49602 +             A_UINT32 length,
49603 +             A_UINT32 request,
49604 +             void *context)
49605 +{
49606 +    A_UINT8 rw;
49607 +    A_UINT8 mode;
49608 +    A_UINT8 funcNo;
49609 +    A_UINT8 opcode;
49610 +    A_UINT16 count;
49611 +    SDREQUEST *sdrequest;
49612 +    SDIO_STATUS sdiostatus;
49613 +    BUS_REQUEST *busrequest;
49614 +    A_STATUS    status = A_OK;
49615 +
49616 +    DBG_ASSERT(device != NULL);
49617 +    DBG_ASSERT(device->handle != NULL);
49618 +
49619 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
49620 +
49621 +    do {
49622 +        busrequest = hifAllocateBusRequest();
49623 +        if (busrequest == NULL) {
49624 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("HIF Unable to allocate bus request\n"));
49625 +            status = A_NO_RESOURCE;
49626 +            break;
49627 +        }
49628 +
49629 +        sdrequest = busrequest->request;
49630 +        busrequest->context = context;
49631 +
49632 +        sdrequest->pDataBuffer = buffer;
49633 +        if (request & HIF_SYNCHRONOUS) {
49634 +            sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS;
49635 +            sdrequest->pCompleteContext = NULL;
49636 +            sdrequest->pCompletion = NULL;
49637 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Synchronous\n"));
49638 +        } else if (request & HIF_ASYNCHRONOUS) {
49639 +            sdrequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5 | SDREQ_FLAGS_DATA_TRANS |
49640 +                               SDREQ_FLAGS_TRANS_ASYNC;
49641 +            sdrequest->pCompleteContext = busrequest;
49642 +            sdrequest->pCompletion = hifRWCompletionHandler;
49643 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Execution mode: Asynchronous\n"));
49644 +        } else {
49645 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49646 +                            ("Invalid execution mode: 0x%08x\n", request));
49647 +            status = A_EINVAL;
49648 +            break;
49649 +        }
49650 +
49651 +        if (request & HIF_EXTENDED_IO) {
49652 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Command type: CMD53\n"));
49653 +            sdrequest->Command = CMD53;
49654 +        } else {
49655 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49656 +                            ("Invalid command type: 0x%08x\n", request));
49657 +            status = A_EINVAL;
49658 +            break;
49659 +        }
49660 +
49661 +        if (request & HIF_BLOCK_BASIS) {
49662 +            mode = CMD53_BLOCK_BASIS;
49663 +            sdrequest->BlockLen = HIF_MBOX_BLOCK_SIZE;
49664 +            sdrequest->BlockCount = length / HIF_MBOX_BLOCK_SIZE;
49665 +            count = sdrequest->BlockCount;
49666 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
49667 +                            ("Block mode (BlockLen: %d, BlockCount: %d)\n",
49668 +                            sdrequest->BlockLen, sdrequest->BlockCount));
49669 +        } else if (request & HIF_BYTE_BASIS) {
49670 +            mode = CMD53_BYTE_BASIS;
49671 +            sdrequest->BlockLen = length;
49672 +            sdrequest->BlockCount = 1;
49673 +            count = sdrequest->BlockLen;
49674 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
49675 +                            ("Byte mode (BlockLen: %d, BlockCount: %d)\n",
49676 +                            sdrequest->BlockLen, sdrequest->BlockCount));
49677 +        } else {
49678 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49679 +                            ("Invalid data mode: 0x%08x\n", request));
49680 +            status = A_EINVAL;
49681 +            break;
49682 +        }
49683 +
49684 +#if 0
49685 +        /* useful for checking register accesses */
49686 +        if (length & 0x3) {
49687 +            A_PRINTF(KERN_ALERT"HIF (%s) is not a multiple of 4 bytes, addr:0x%X, len:%d\n",
49688 +                                request & HIF_WRITE ? "write":"read", address, length);
49689 +        }
49690 +#endif
49691 +
49692 +        if ((address >= HIF_MBOX_START_ADDR(0)) &&
49693 +            (address <= HIF_MBOX_END_ADDR(3)))
49694 +        {
49695 +
49696 +            DBG_ASSERT(length <= HIF_MBOX_WIDTH);
49697 +
49698 +            /*
49699 +             * Mailbox write. Adjust the address so that the last byte
49700 +             * falls on the EOM address.
49701 +             */
49702 +            address += (HIF_MBOX_WIDTH - length);
49703 +        }
49704 +
49705 +
49706 +
49707 +        if (request & HIF_WRITE) {
49708 +            rw = CMD53_WRITE;
49709 +            sdrequest->Flags |= SDREQ_FLAGS_DATA_WRITE;
49710 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Write\n"));
49711 +        } else if (request & HIF_READ) {
49712 +            rw = CMD53_READ;
49713 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Direction: Read\n"));
49714 +        } else {
49715 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49716 +                            ("Invalid direction: 0x%08x\n", request));
49717 +            status = A_EINVAL;
49718 +            break;
49719 +        }
49720 +
49721 +        if (request & HIF_FIXED_ADDRESS) {
49722 +            opcode = CMD53_FIXED_ADDRESS;
49723 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Fixed\n"));
49724 +        } else if (request & HIF_INCREMENTAL_ADDRESS) {
49725 +            opcode = CMD53_INCR_ADDRESS;
49726 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Address mode: Incremental\n"));
49727 +        } else {
49728 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49729 +                            ("Invalid address mode: 0x%08x\n", request));
49730 +            status = A_EINVAL;
49731 +            break;
49732 +        }
49733 +
49734 +        funcNo = SDDEVICE_GET_SDIO_FUNCNO(device->handle);
49735 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Function number: %d\n", funcNo));
49736 +        SDIO_SET_CMD53_ARG(sdrequest->Argument, rw, funcNo,
49737 +                           mode, opcode, address, count);
49738 +
49739 +        /* Send the command out */
49740 +        sdiostatus = SDDEVICE_CALL_REQUEST_FUNC(device->handle, sdrequest);
49741 +
49742 +        if (!SDIO_SUCCESS(sdiostatus)) {
49743 +            status = A_ERROR;
49744 +        }
49745 +
49746 +    } while (FALSE);
49747 +
49748 +    if (A_FAILED(status) || (request & HIF_SYNCHRONOUS)) {
49749 +        if (busrequest != NULL) {
49750 +            hifFreeBusRequest(busrequest);
49751 +        }
49752 +    }
49753 +
49754 +    if (A_FAILED(status) && (request & HIF_ASYNCHRONOUS)) {
49755 +            /* call back async handler on failure */
49756 +        htcCallbacks.rwCompletionHandler(context, status);
49757 +    }
49758 +
49759 +    return status;
49760 +}
49761 +
49762 +A_STATUS
49763 +HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode,
49764 +                   void *config, A_UINT32 configLen)
49765 +{
49766 +    A_UINT32 count;
49767 +
49768 +    switch(opcode) {
49769 +        case HIF_DEVICE_GET_MBOX_BLOCK_SIZE:
49770 +            ((A_UINT32 *)config)[0] = HIF_MBOX0_BLOCK_SIZE;
49771 +            ((A_UINT32 *)config)[1] = HIF_MBOX1_BLOCK_SIZE;
49772 +            ((A_UINT32 *)config)[2] = HIF_MBOX2_BLOCK_SIZE;
49773 +            ((A_UINT32 *)config)[3] = HIF_MBOX3_BLOCK_SIZE;
49774 +            break;
49775 +
49776 +        case HIF_DEVICE_GET_MBOX_ADDR:
49777 +            for (count = 0; count < 4; count ++) {
49778 +                ((A_UINT32 *)config)[count] = HIF_MBOX_START_ADDR(count);
49779 +            }
49780 +            break;
49781 +        case HIF_DEVICE_GET_IRQ_PROC_MODE:
49782 +                /* the SDIO stack allows the interrupts to be processed either way, ASYNC or SYNC */
49783 +            *((HIF_DEVICE_IRQ_PROCESSING_MODE *)config) = HIF_DEVICE_IRQ_ASYNC_SYNC;
49784 +            break;
49785 +        default:
49786 +            AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
49787 +                            ("Unsupported configuration opcode: %d\n", opcode));
49788 +            return A_ERROR;
49789 +    }
49790 +
49791 +    return A_OK;
49792 +}
49793 +
49794 +void
49795 +HIFShutDownDevice(HIF_DEVICE *device)
49796 +{
49797 +    A_UINT8 data;
49798 +    A_UINT32 count;
49799 +    SDIO_STATUS status;
49800 +    SDCONFIG_BUS_MODE_DATA busSettings;
49801 +    SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
49802 +
49803 +    if (device != NULL) {
49804 +        DBG_ASSERT(device->handle != NULL);
49805 +
49806 +        /* Remove the allocated current if any */
49807 +        status = SDLIB_IssueConfig(device->handle,
49808 +                                   SDCONFIG_FUNC_FREE_SLOT_CURRENT, NULL, 0);
49809 +        DBG_ASSERT(SDIO_SUCCESS(status));
49810 +
49811 +        /* Disable the card */
49812 +        fData.EnableFlags = SDCONFIG_DISABLE_FUNC;
49813 +        fData.TimeOut = 1;
49814 +        status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ENABLE_DISABLE,
49815 +                                   &fData, sizeof(fData));
49816 +        DBG_ASSERT(SDIO_SUCCESS(status));
49817 +
49818 +        /* Perform a soft I/O reset */
49819 +        data = SDIO_IO_RESET;
49820 +        status = SDLIB_IssueCMD52(device->handle, 0, SDIO_IO_ABORT_REG,
49821 +                                  &data, 1, 1);
49822 +        DBG_ASSERT(SDIO_SUCCESS(status));
49823 +
49824 +        /*
49825 +         * WAR - Codetelligence driver does not seem to shutdown correctly in 1
49826 +         * bit mode. By default it configures the HC in the 4 bit. Its later in
49827 +         * our driver that we switch to 1 bit mode. If we try to shutdown, the
49828 +         * driver hangs so we revert to 4 bit mode, to be transparent to the
49829 +         * underlying bus driver.
49830 +         */
49831 +        if (onebitmode) {
49832 +            ZERO_OBJECT(busSettings);
49833 +            busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(device->handle);
49834 +            SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags,
49835 +                                   SDCONFIG_BUS_WIDTH_4_BIT);
49836 +
49837 +            /* Issue config request to change the bus width to 4 bit */
49838 +            status = SDLIB_IssueConfig(device->handle, SDCONFIG_BUS_MODE_CTRL,
49839 +                                       &busSettings,
49840 +                                       sizeof(SDCONFIG_BUS_MODE_DATA));
49841 +            DBG_ASSERT(SDIO_SUCCESS(status));
49842 +        }
49843 +
49844 +        /* Free the bus requests */
49845 +        for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) {
49846 +            SDDeviceFreeRequest(device->handle, busRequest[count].request);
49847 +        }
49848 +        /* Clean up the queue */
49849 +        s_busRequestFreeQueue = NULL;
49850 +    } else {
49851 +            /* since we are unloading the driver anyways, reset all cards in case the SDIO card
49852 +             * is externally powered and we are unloading the SDIO stack.  This avoids the problem when
49853 +             * the SDIO stack is reloaded and attempts are made to re-enumerate a card that is already
49854 +             * enumerated */
49855 +        ResetAllCards();
49856 +        /* Unregister with bus driver core */
49857 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
49858 +                        ("Unregistering with the bus driver\n"));
49859 +        status = SDIO_UnregisterFunction(&FunctionContext.function);
49860 +        DBG_ASSERT(SDIO_SUCCESS(status));
49861 +    }
49862 +}
49863 +
49864 +void
49865 +hifRWCompletionHandler(SDREQUEST *request)
49866 +{
49867 +    A_STATUS status;
49868 +    void *context;
49869 +    BUS_REQUEST *busrequest;
49870 +
49871 +    if (SDIO_SUCCESS(request->Status)) {
49872 +        status = A_OK;
49873 +    } else {
49874 +        status = A_ERROR;
49875 +    }
49876 +
49877 +    DBG_ASSERT(status == A_OK);
49878 +    busrequest = (BUS_REQUEST *) request->pCompleteContext;
49879 +    context = (void *) busrequest->context;
49880 +        /* free the request before calling the callback, in case the
49881 +         * callback submits another request, this guarantees that
49882 +         * there is at least 1 free request available everytime the callback
49883 +         * is invoked */
49884 +    hifFreeBusRequest(busrequest);
49885 +    htcCallbacks.rwCompletionHandler(context, status);
49886 +}
49887 +
49888 +void
49889 +hifIRQHandler(void *context)
49890 +{
49891 +    A_STATUS status;
49892 +    HIF_DEVICE *device;
49893 +
49894 +    device = (HIF_DEVICE *)context;
49895 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
49896 +    status = htcCallbacks.dsrHandler(device->htc_handle);
49897 +    DBG_ASSERT(status == A_OK);
49898 +}
49899 +
49900 +BOOL
49901 +hifDeviceInserted(SDFUNCTION *function, SDDEVICE *handle)
49902 +{
49903 +    BOOL enabled;
49904 +    A_UINT8 data;
49905 +    A_UINT32 count;
49906 +    HIF_DEVICE *device;
49907 +    SDIO_STATUS status;
49908 +    A_UINT16 maxBlocks;
49909 +    A_UINT16 maxBlockSize;
49910 +    SDCONFIG_BUS_MODE_DATA busSettings;
49911 +    SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
49912 +    TARGET_FUNCTION_CONTEXT *functionContext;
49913 +    SDCONFIG_FUNC_SLOT_CURRENT_DATA slotCurrent;
49914 +    SD_BUSCLOCK_RATE                currentBusClock;
49915 +
49916 +    DBG_ASSERT(function != NULL);
49917 +    DBG_ASSERT(handle != NULL);
49918 +
49919 +    device = addHifDevice(handle);
49920 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device: %p\n", device));
49921 +    functionContext =  (TARGET_FUNCTION_CONTEXT *)function->pContext;
49922 +
49923 +    /*
49924 +     * Issue commands to get the manufacturer ID and stuff and compare it
49925 +     * against the rev Id derived from the ID registered during the
49926 +     * initialization process. Report the device only in the case there
49927 +     * is a match. In the case od SDIO, the bus driver has already queried
49928 +     * these details so we just need to use their data structures to get the
49929 +     * relevant values. Infact, the driver has already matched it against
49930 +     * the Ids that we registered with it so we dont need to the step here.
49931 +     */
49932 +
49933 +    /* Configure the SDIO Bus Width */
49934 +    if (onebitmode) {
49935 +        data = SDIO_BUS_WIDTH_1_BIT;
49936 +        status = SDLIB_IssueCMD52(handle, 0, SDIO_BUS_IF_REG, &data, 1, 1);
49937 +        if (!SDIO_SUCCESS(status)) {
49938 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49939 +                            ("Unable to set the bus width to 1 bit\n"));
49940 +            return FALSE;
49941 +        }
49942 +    }
49943 +
49944 +    /* Get current bus flags */
49945 +    ZERO_OBJECT(busSettings);
49946 +
49947 +    busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(handle);
49948 +    if (onebitmode) {
49949 +        SDCONFIG_SET_BUS_WIDTH(busSettings.BusModeFlags,
49950 +                               SDCONFIG_BUS_WIDTH_1_BIT);
49951 +    }
49952 +
49953 +        /* get the current operating clock, the bus driver sets us up based
49954 +         * on what our CIS reports and what the host controller can handle
49955 +         * we can use this to determine whether we want to drop our clock rate
49956 +         * down */
49957 +    currentBusClock = SDDEVICE_GET_OPER_CLOCK(handle);
49958 +    busSettings.ClockRate = currentBusClock;
49959 +
49960 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
49961 +                        ("HIF currently running at: %d \n",currentBusClock));
49962 +
49963 +        /* see if HIF wants to run at a lower clock speed, we may already be
49964 +         * at that lower clock speed */
49965 +    if (currentBusClock > (SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow)) {
49966 +        busSettings.ClockRate = SDIO_CLOCK_FREQUENCY_DEFAULT >> busspeedlow;
49967 +        AR_DEBUG_PRINTF(ATH_DEBUG_WARN,
49968 +                        ("HIF overriding clock to %d \n",busSettings.ClockRate));
49969 +    }
49970 +
49971 +    /* Issue config request to override clock rate */
49972 +    status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_CHANGE_BUS_MODE, &busSettings,
49973 +                               sizeof(SDCONFIG_BUS_MODE_DATA));
49974 +    if (!SDIO_SUCCESS(status)) {
49975 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
49976 +                        ("Unable to configure the host clock\n"));
49977 +        return FALSE;
49978 +    } else {
49979 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
49980 +                        ("Configured clock: %d, Maximum clock: %d\n",
49981 +                        busSettings.ActualClockRate,
49982 +                        SDDEVICE_GET_MAX_CLOCK(handle)));
49983 +    }
49984 +
49985 +    /*
49986 +     * Check if the target supports block mode. This result of this check
49987 +     * can be used to implement the HIFReadWrite API.
49988 +     */
49989 +    if (SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle)) {
49990 +        /* Limit block size to operational block limit or card function
49991 +           capability */
49992 +        maxBlockSize = min(SDDEVICE_GET_OPER_BLOCK_LEN(handle),
49993 +                           SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(handle));
49994 +
49995 +        /* check if the card support multi-block transfers */
49996 +        if (!(SDDEVICE_GET_SDIOCARD_CAPS(handle) & SDIO_CAPS_MULTI_BLOCK)) {
49997 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Byte basis only\n"));
49998 +
49999 +            /* Limit block size to max byte basis */
50000 +            maxBlockSize =  min(maxBlockSize,
50001 +                                (A_UINT16)SDIO_MAX_LENGTH_BYTE_BASIS);
50002 +            maxBlocks = 1;
50003 +        } else {
50004 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Multi-block capable\n"));
50005 +            maxBlocks = SDDEVICE_GET_OPER_BLOCKS(handle);
50006 +            status = SDLIB_SetFunctionBlockSize(handle, HIF_MBOX_BLOCK_SIZE);
50007 +            if (!SDIO_SUCCESS(status)) {
50008 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
50009 +                                ("Failed to set block size. Err:%d\n", status));
50010 +                return FALSE;
50011 +            }
50012 +        }
50013 +
50014 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
50015 +                        ("Bytes Per Block: %d bytes, Block Count:%d \n",
50016 +                        maxBlockSize, maxBlocks));
50017 +    } else {
50018 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
50019 +                        ("Function does not support Block Mode!\n"));
50020 +        return FALSE;
50021 +    }
50022 +
50023 +    /* Allocate the slot current */
50024 +    status = SDLIB_GetDefaultOpCurrent(handle, &slotCurrent.SlotCurrent);
50025 +    if (SDIO_SUCCESS(status)) {
50026 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Allocating Slot current: %d mA\n",
50027 +                                slotCurrent.SlotCurrent));
50028 +        status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ALLOC_SLOT_CURRENT,
50029 +                                   &slotCurrent, sizeof(slotCurrent));
50030 +        if (!SDIO_SUCCESS(status)) {
50031 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
50032 +                            ("Failed to allocate slot current %d\n", status));
50033 +            return FALSE;
50034 +        }
50035 +    }
50036 +
50037 +    /* Enable the dragon function */
50038 +    count = 0;
50039 +    enabled = FALSE;
50040 +    fData.TimeOut = 1;
50041 +    fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
50042 +    while ((count++ < SDWLAN_ENABLE_DISABLE_TIMEOUT) && !enabled)
50043 +    {
50044 +        /* Enable dragon */
50045 +        status = SDLIB_IssueConfig(handle, SDCONFIG_FUNC_ENABLE_DISABLE,
50046 +                                   &fData, sizeof(fData));
50047 +        if (!SDIO_SUCCESS(status)) {
50048 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
50049 +                            ("Attempting to enable the card again\n"));
50050 +            continue;
50051 +        }
50052 +
50053 +        /* Mark the status as enabled */
50054 +        enabled = TRUE;
50055 +    }
50056 +
50057 +    /* Check if we were succesful in enabling the target */
50058 +    if (!enabled) {
50059 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERROR,
50060 +                        ("Failed to communicate with the target\n"));
50061 +        return FALSE;
50062 +    }
50063 +
50064 +    /* Allocate the bus requests to be used later */
50065 +    A_MEMZERO(busRequest, sizeof(busRequest));
50066 +    for (count = 0; count < BUS_REQUEST_MAX_NUM; count ++) {
50067 +        if ((busRequest[count].request = SDDeviceAllocRequest(handle)) == NULL){
50068 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERROR, ("Unable to allocate memory\n"));
50069 +            /* TODO: Free the memory that has already been allocated */
50070 +            return FALSE;
50071 +        }
50072 +        hifFreeBusRequest(&busRequest[count]);
50073 +
50074 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
50075 +                ("0x%08x = busRequest[%d].request = 0x%08x\n",
50076 +                               (unsigned int) &busRequest[count], count,
50077 +                               (unsigned int) busRequest[count].request));
50078 +    }
50079 +
50080 +        /* Schedule a worker to handle device inserted, this is a temporary workaround
50081 +         * to fix a deadlock if the device fails to intialize in the insertion handler
50082 +         * The failure causes the instance to shutdown the HIF layer and unregister the
50083 +         * function driver within the busdriver probe context which can deadlock
50084 +         *
50085 +         * NOTE: we cannot use the default work queue because that would block
50086 +         * SD bus request processing for all synchronous I/O. We must use a kernel
50087 +         * thread that is creating using the helper library.
50088 +         * */
50089 +
50090 +    if (SDIO_SUCCESS(SDLIB_OSCreateHelper(&device->insert_helper,
50091 +                         insert_helper_func,
50092 +                         device))) {
50093 +        device->helper_started = TRUE;
50094 +    }
50095 +
50096 +    return TRUE;
50097 +}
50098 +
50099 +static THREAD_RETURN insert_helper_func(POSKERNEL_HELPER pHelper)
50100 +{
50101 +
50102 +    /*
50103 +     * Adding a wait of around a second before we issue the very first
50104 +     * command to dragon. During the process of loading/unloading the
50105 +     * driver repeatedly it was observed that we get a data timeout
50106 +     * while accessing function 1 registers in the chip. The theory at
50107 +     * this point is that some initialization delay in dragon is
50108 +     * causing the SDIO state in dragon core to be not ready even after
50109 +     * the ready bit indicates that function 1 is ready. Accomodating
50110 +     * for this behavior by adding some delay in the driver before it
50111 +     * issues the first command after switching on dragon. Need to
50112 +     * investigate this a bit more - TODO
50113 +     */
50114 +
50115 +    A_MDELAY(1000);
50116 +        /* Inform HTC */
50117 +    if ((htcCallbacks.deviceInsertedHandler(SD_GET_OS_HELPER_CONTEXT(pHelper))) != A_OK) {
50118 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRACE, ("Device rejected\n"));
50119 +    }
50120 +
50121 +    return 0;
50122 +}
50123 +
50124 +void
50125 +HIFAckInterrupt(HIF_DEVICE *device)
50126 +{
50127 +    SDIO_STATUS status;
50128 +    DBG_ASSERT(device != NULL);
50129 +    DBG_ASSERT(device->handle != NULL);
50130 +
50131 +    /* Acknowledge our function IRQ */
50132 +    status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_ACK_IRQ,
50133 +                               NULL, 0);
50134 +    DBG_ASSERT(SDIO_SUCCESS(status));
50135 +}
50136 +
50137 +void
50138 +HIFUnMaskInterrupt(HIF_DEVICE *device)
50139 +{
50140 +    SDIO_STATUS status;
50141 +
50142 +    DBG_ASSERT(device != NULL);
50143 +    DBG_ASSERT(device->handle != NULL);
50144 +
50145 +    /* Register the IRQ Handler */
50146 +    SDDEVICE_SET_IRQ_HANDLER(device->handle, hifIRQHandler, device);
50147 +
50148 +    /* Unmask our function IRQ */
50149 +    status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_UNMASK_IRQ,
50150 +                               NULL, 0);
50151 +    DBG_ASSERT(SDIO_SUCCESS(status));
50152 +}
50153 +
50154 +void HIFMaskInterrupt(HIF_DEVICE *device)
50155 +{
50156 +    SDIO_STATUS status;
50157 +    DBG_ASSERT(device != NULL);
50158 +    DBG_ASSERT(device->handle != NULL);
50159 +
50160 +    /* Mask our function IRQ */
50161 +    status = SDLIB_IssueConfig(device->handle, SDCONFIG_FUNC_MASK_IRQ,
50162 +                               NULL, 0);
50163 +    DBG_ASSERT(SDIO_SUCCESS(status));
50164 +
50165 +    /* Unregister the IRQ Handler */
50166 +    SDDEVICE_SET_IRQ_HANDLER(device->handle, NULL, NULL);
50167 +}
50168 +
50169 +static BUS_REQUEST *hifAllocateBusRequest(void)
50170 +{
50171 +    BUS_REQUEST *busrequest;
50172 +
50173 +    /* Acquire lock */
50174 +    CriticalSectionAcquire(&lock);
50175 +
50176 +    /* Remove first in list */
50177 +    if((busrequest = s_busRequestFreeQueue) != NULL)
50178 +    {
50179 +        s_busRequestFreeQueue = busrequest->next;
50180 +    }
50181 +
50182 +    /* Release lock */
50183 +    CriticalSectionRelease(&lock);
50184 +
50185 +    return busrequest;
50186 +}
50187 +
50188 +static void
50189 +hifFreeBusRequest(BUS_REQUEST *busrequest)
50190 +{
50191 +    DBG_ASSERT(busrequest != NULL);
50192 +
50193 +    /* Acquire lock */
50194 +    CriticalSectionAcquire(&lock);
50195 +
50196 +    /* Insert first in list */
50197 +    busrequest->next = s_busRequestFreeQueue;
50198 +    s_busRequestFreeQueue = busrequest;
50199 +
50200 +    /* Release lock */
50201 +    CriticalSectionRelease(&lock);
50202 +}
50203 +
50204 +void
50205 +hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *handle)
50206 +{
50207 +    A_STATUS status;
50208 +    HIF_DEVICE *device;
50209 +    DBG_ASSERT(function != NULL);
50210 +    DBG_ASSERT(handle != NULL);
50211 +
50212 +    device = getHifDevice(handle);
50213 +    status = htcCallbacks.deviceRemovedHandler(device->htc_handle, A_OK);
50214 +
50215 +        /* cleanup the helper thread */
50216 +    if (device->helper_started) {
50217 +        SDLIB_OSDeleteHelper(&device->insert_helper);
50218 +        device->helper_started = FALSE;
50219 +    }
50220 +
50221 +    delHifDevice(handle);
50222 +    DBG_ASSERT(status == A_OK);
50223 +}
50224 +
50225 +HIF_DEVICE *
50226 +addHifDevice(SDDEVICE *handle)
50227 +{
50228 +    DBG_ASSERT(handle != NULL);
50229 +    hifDevice[0].handle = handle;
50230 +    return &hifDevice[0];
50231 +}
50232 +
50233 +HIF_DEVICE *
50234 +getHifDevice(SDDEVICE *handle)
50235 +{
50236 +    DBG_ASSERT(handle != NULL);
50237 +    return &hifDevice[0];
50238 +}
50239 +
50240 +void
50241 +delHifDevice(SDDEVICE *handle)
50242 +{
50243 +    DBG_ASSERT(handle != NULL);
50244 +    hifDevice[0].handle = NULL;
50245 +}
50246 +
50247 +struct device*
50248 +HIFGetOSDevice(HIF_DEVICE *device)
50249 +{
50250 +    return &device->handle->Device.dev;
50251 +}
50252 +
50253 +static void ResetAllCards(void)
50254 +{
50255 +    UINT8       data;
50256 +    SDIO_STATUS status;
50257 +    int         i;
50258 +
50259 +    data = SDIO_IO_RESET;
50260 +
50261 +    /* set the I/O CARD reset bit:
50262 +     * NOTE: we are exploiting a "feature" of the SDIO core that resets the core when you
50263 +     * set the RES bit in the SDIO_IO_ABORT register.  This bit however "normally" resets the
50264 +     * I/O functions leaving the SDIO core in the same state (as per SDIO spec).
50265 +     * In this design, this reset can be used to reset the SDIO core itself */
50266 +    for (i = 0; i < HIF_MAX_DEVICES; i++) {
50267 +        if (hifDevice[i].handle != NULL) {
50268 +            AR_DEBUG_PRINTF(ATH_DEBUG_TRACE,
50269 +                        ("Issuing I/O Card reset for instance: %d \n",i));
50270 +                /* set the I/O Card reset bit */
50271 +            status = SDLIB_IssueCMD52(hifDevice[i].handle,
50272 +                                      0,                    /* function 0 space */
50273 +                                      SDIO_IO_ABORT_REG,
50274 +                                      &data,
50275 +                                      1,                    /* 1 byte */
50276 +                                      TRUE);                /* write */
50277 +        }
50278 +    }
50279 +
50280 +}
50281 +
50282 +void HIFSetHandle(void *hif_handle, void *handle)
50283 +{
50284 +    HIF_DEVICE *device = (HIF_DEVICE *) hif_handle;
50285 +
50286 +    device->htc_handle = handle;
50287 +
50288 +    return;
50289 +}
50290 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h
50291 ===================================================================
50292 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
50293 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/hif/hif_internal.h 2008-12-11 22:46:49.000000000 +0100
50294 @@ -0,0 +1,102 @@
50295 +/*
50296 + * @file: hif_internal.h
50297 + *
50298 + * @abstract: internal header file for hif layer
50299 + *
50300 + * @notice: Copyright (c) 2004-2006 Atheros Communications Inc.
50301 + *
50302 + *
50303 + *  This program is free software; you can redistribute it and/or modify
50304 + *  it under the terms of the GNU General Public License version 2 as
50305 + *  published by the Free Software Foundation;
50306 + *
50307 + *  Software distributed under the License is distributed on an "AS
50308 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
50309 + *  implied. See the License for the specific language governing
50310 + *  rights and limitations under the License.
50311 + *
50312 + *
50313 + *
50314 + */
50315 +
50316 +#include <linux/sdio/ctsystem.h>
50317 +#include <linux/sdio/sdio_busdriver.h>
50318 +#include <linux/sdio/_sdio_defs.h>
50319 +#include <linux/sdio/sdio_lib.h>
50320 +#include "a_config.h"
50321 +#include "athdefs.h"
50322 +#include "a_types.h"
50323 +#include "a_osapi.h"
50324 +#include "hif.h"
50325 +
50326 +#define MANUFACTURER_ID_AR6001_BASE        0x100
50327 +#define MANUFACTURER_ID_AR6002_BASE        0x200
50328 +#define FUNCTION_CLASS                     0x0
50329 +#define MANUFACTURER_CODE                  0x271
50330 +
50331 +#define BUS_REQUEST_MAX_NUM                64
50332 +
50333 +#define SDIO_CLOCK_FREQUENCY_DEFAULT       25000000
50334 +#define SDWLAN_ENABLE_DISABLE_TIMEOUT      20
50335 +#define FLAGS_CARD_ENAB                    0x02
50336 +#define FLAGS_CARD_IRQ_UNMSK               0x04
50337 +
50338 +#define HIF_MBOX_BLOCK_SIZE                128
50339 +#define HIF_MBOX_BASE_ADDR                 0x800
50340 +#define HIF_MBOX_WIDTH                     0x800
50341 +#define HIF_MBOX0_BLOCK_SIZE               1
50342 +#define HIF_MBOX1_BLOCK_SIZE               HIF_MBOX_BLOCK_SIZE
50343 +#define HIF_MBOX2_BLOCK_SIZE               HIF_MBOX_BLOCK_SIZE
50344 +#define HIF_MBOX3_BLOCK_SIZE               HIF_MBOX_BLOCK_SIZE
50345 +
50346 +#define HIF_MBOX_START_ADDR(mbox)                        \
50347 +    HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH
50348 +
50349 +#define HIF_MBOX_END_ADDR(mbox)                                 \
50350 +    HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1
50351 +
50352 +struct hif_device {
50353 +    SDDEVICE *handle;
50354 +    void *htc_handle;
50355 +    OSKERNEL_HELPER insert_helper;
50356 +    BOOL  helper_started;
50357 +};
50358 +
50359 +typedef struct target_function_context {
50360 +    SDFUNCTION           function; /* function description of the bus driver */
50361 +    OS_SEMAPHORE         instanceSem; /* instance lock. Unused */
50362 +    SDLIST               instanceList; /* list of instances. Unused */
50363 +} TARGET_FUNCTION_CONTEXT;
50364 +
50365 +typedef struct bus_request {
50366 +    struct bus_request *next;
50367 +    SDREQUEST *request;
50368 +    void *context;
50369 +} BUS_REQUEST;
50370 +
50371 +BOOL
50372 +hifDeviceInserted(SDFUNCTION *function, SDDEVICE *device);
50373 +
50374 +void
50375 +hifDeviceRemoved(SDFUNCTION *function, SDDEVICE *device);
50376 +
50377 +SDREQUEST *
50378 +hifAllocateDeviceRequest(SDDEVICE *device);
50379 +
50380 +void
50381 +hifFreeDeviceRequest(SDREQUEST *request);
50382 +
50383 +void
50384 +hifRWCompletionHandler(SDREQUEST *request);
50385 +
50386 +void
50387 +hifIRQHandler(void *context);
50388 +
50389 +HIF_DEVICE *
50390 +addHifDevice(SDDEVICE *handle);
50391 +
50392 +HIF_DEVICE *
50393 +getHifDevice(SDDEVICE *handle);
50394 +
50395 +void
50396 +delHifDevice(SDDEVICE *handle);
50397 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.c
50398 ===================================================================
50399 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
50400 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.c 2008-12-11 22:46:49.000000000 +0100
50401 @@ -0,0 +1,991 @@
50402 +/*
50403 + * AR6K device layer that handles register level I/O
50404 + *
50405 + * Copyright (c) 2007 Atheros Communications Inc.
50406 + * All rights reserved.
50407 + *
50408 + *
50409 + *  This program is free software; you can redistribute it and/or modify
50410 + *  it under the terms of the GNU General Public License version 2 as
50411 + *  published by the Free Software Foundation;
50412 + *
50413 + *  Software distributed under the License is distributed on an "AS
50414 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
50415 + *  implied. See the License for the specific language governing
50416 + *  rights and limitations under the License.
50417 + *
50418 + *
50419 + *
50420 + */
50421 +#include "a_config.h"
50422 +#include "athdefs.h"
50423 +#include "a_types.h"
50424 +#include "AR6Khwreg.h"
50425 +#include "a_osapi.h"
50426 +#include "a_debug.h"
50427 +#include "hif.h"
50428 +#include "htc_packet.h"
50429 +#include "ar6k.h"
50430 +
50431 +#define MAILBOX_FOR_BLOCK_SIZE 1
50432 +
50433 +extern A_UINT32 resetok;
50434 +
50435 +static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev);
50436 +static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev);
50437 +
50438 +#define LOCK_AR6K(p)      A_MUTEX_LOCK(&(p)->Lock);
50439 +#define UNLOCK_AR6K(p)    A_MUTEX_UNLOCK(&(p)->Lock);
50440 +
50441 +void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket)
50442 +{
50443 +    LOCK_AR6K(pDev);
50444 +    HTC_PACKET_ENQUEUE(&pDev->RegisterIOList,pPacket);
50445 +    UNLOCK_AR6K(pDev);
50446 +}
50447 +
50448 +HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev)
50449 +{
50450 +    HTC_PACKET *pPacket;
50451 +
50452 +    LOCK_AR6K(pDev);
50453 +    pPacket = HTC_PACKET_DEQUEUE(&pDev->RegisterIOList);
50454 +    UNLOCK_AR6K(pDev);
50455 +
50456 +    return pPacket;
50457 +}
50458 +
50459 +A_STATUS DevSetup(AR6K_DEVICE *pDev)
50460 +{
50461 +    A_UINT32 mailboxaddrs[AR6K_MAILBOXES];
50462 +    A_UINT32 blocksizes[AR6K_MAILBOXES];
50463 +    A_STATUS status = A_OK;
50464 +    int      i;
50465 +
50466 +    AR_DEBUG_ASSERT(AR6K_IRQ_PROC_REGS_SIZE == 16);
50467 +    AR_DEBUG_ASSERT(AR6K_IRQ_ENABLE_REGS_SIZE == 4);
50468 +
50469 +    do {
50470 +            /* give a handle to HIF for this target */
50471 +        HIFSetHandle(pDev->HIFDevice, (void *)pDev);
50472 +            /* initialize our free list of IO packets */
50473 +        INIT_HTC_PACKET_QUEUE(&pDev->RegisterIOList);
50474 +        A_MUTEX_INIT(&pDev->Lock);
50475 +
50476 +            /* get the addresses for all 4 mailboxes */
50477 +        status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
50478 +                                    mailboxaddrs, sizeof(mailboxaddrs));
50479 +
50480 +        if (status != A_OK) {
50481 +            AR_DEBUG_ASSERT(FALSE);
50482 +            break;
50483 +        }
50484 +
50485 +            /* carve up register I/O packets (these are for ASYNC register I/O ) */
50486 +        for (i = 0; i < AR6K_MAX_REG_IO_BUFFERS; i++) {
50487 +            HTC_PACKET *pIOPacket;
50488 +            pIOPacket = &pDev->RegIOBuffers[i].HtcPacket;
50489 +            SET_HTC_PACKET_INFO_RX_REFILL(pIOPacket,
50490 +                                          pDev,
50491 +                                          pDev->RegIOBuffers[i].Buffer,
50492 +                                          AR6K_REG_IO_BUFFER_SIZE,
50493 +                                          0); /* don't care */
50494 +            AR6KFreeIOPacket(pDev,pIOPacket);
50495 +        }
50496 +
50497 +            /* get the address of the mailbox we are using */
50498 +        pDev->MailboxAddress = mailboxaddrs[HTC_MAILBOX];
50499 +
50500 +            /* get the block sizes */
50501 +        status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
50502 +                                    blocksizes, sizeof(blocksizes));
50503 +
50504 +        if (status != A_OK) {
50505 +            AR_DEBUG_ASSERT(FALSE);
50506 +            break;
50507 +        }
50508 +
50509 +            /* note: we actually get the block size of a mailbox other than 0, for SDIO the block
50510 +             * size on mailbox 0 is artificially set to 1.  So we use the block size that is set
50511 +             * for the other 3 mailboxes */
50512 +        pDev->BlockSize = blocksizes[MAILBOX_FOR_BLOCK_SIZE];
50513 +            /* must be a power of 2 */
50514 +        AR_DEBUG_ASSERT((pDev->BlockSize & (pDev->BlockSize - 1)) == 0);
50515 +
50516 +            /* assemble mask, used for padding to a block */
50517 +        pDev->BlockMask = pDev->BlockSize - 1;
50518 +
50519 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("BlockSize: %d, MailboxAddress:0x%X \n",
50520 +                    pDev->BlockSize, pDev->MailboxAddress));
50521 +
50522 +        pDev->GetPendingEventsFunc = NULL;
50523 +            /* see if the HIF layer implements the get pending events function  */
50524 +        HIFConfigureDevice(pDev->HIFDevice,
50525 +                           HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
50526 +                           &pDev->GetPendingEventsFunc,
50527 +                           sizeof(pDev->GetPendingEventsFunc));
50528 +
50529 +            /* assume we can process HIF interrupt events asynchronously */
50530 +        pDev->HifIRQProcessingMode = HIF_DEVICE_IRQ_ASYNC_SYNC;
50531 +
50532 +            /* see if the HIF layer overrides this assumption */
50533 +        HIFConfigureDevice(pDev->HIFDevice,
50534 +                           HIF_DEVICE_GET_IRQ_PROC_MODE,
50535 +                           &pDev->HifIRQProcessingMode,
50536 +                           sizeof(pDev->HifIRQProcessingMode));
50537 +
50538 +        switch (pDev->HifIRQProcessingMode) {
50539 +            case HIF_DEVICE_IRQ_SYNC_ONLY:
50540 +                AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is SYNC ONLY\n"));
50541 +                break;
50542 +            case HIF_DEVICE_IRQ_ASYNC_SYNC:
50543 +                AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF Interrupt processing is ASYNC and SYNC\n"));
50544 +                break;
50545 +            default:
50546 +                AR_DEBUG_ASSERT(FALSE);
50547 +        }
50548 +
50549 +        pDev->HifMaskUmaskRecvEvent = NULL;
50550 +
50551 +            /* see if the HIF layer implements the mask/unmask recv events function  */
50552 +        HIFConfigureDevice(pDev->HIFDevice,
50553 +                           HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC,
50554 +                           &pDev->HifMaskUmaskRecvEvent,
50555 +                           sizeof(pDev->HifMaskUmaskRecvEvent));
50556 +
50557 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("HIF special overrides : 0x%X , 0x%X\n",
50558 +                 (A_UINT32)pDev->GetPendingEventsFunc, (A_UINT32)pDev->HifMaskUmaskRecvEvent));
50559 +
50560 +        status = DevDisableInterrupts(pDev);
50561 +
50562 +    } while (FALSE);
50563 +
50564 +    if (A_FAILED(status)) {
50565 +            /* make sure handle is cleared */
50566 +        HIFSetHandle(pDev->HIFDevice, NULL);
50567 +    }
50568 +
50569 +    return status;
50570 +
50571 +}
50572 +
50573 +static A_STATUS DevEnableInterrupts(AR6K_DEVICE *pDev)
50574 +{
50575 +    A_STATUS                  status;
50576 +    AR6K_IRQ_ENABLE_REGISTERS regs;
50577 +
50578 +    LOCK_AR6K(pDev);
50579 +
50580 +        /* Enable all the interrupts except for the dragon interrupt */
50581 +    pDev->IrqEnableRegisters.int_status_enable = INT_STATUS_ENABLE_ERROR_SET(0x01) |
50582 +                                      INT_STATUS_ENABLE_CPU_SET(0x01) |
50583 +                                      INT_STATUS_ENABLE_COUNTER_SET(0x01);
50584 +
50585 +    if (NULL == pDev->GetPendingEventsFunc) {
50586 +        pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
50587 +    } else {
50588 +        /* The HIF layer provided us with a pending events function which means that
50589 +         * the detection of pending mbox messages is handled in the HIF layer.
50590 +         * This is the case for the SPI2 interface.
50591 +         * In the normal case we enable MBOX interrupts, for the case
50592 +         * with HIFs that offer this mechanism, we keep these interrupts
50593 +         * masked */
50594 +        pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
50595 +    }
50596 +
50597 +
50598 +    /* Set up the CPU Interrupt Status Register */
50599 +    pDev->IrqEnableRegisters.cpu_int_status_enable = CPU_INT_STATUS_ENABLE_BIT_SET(0x00);
50600 +
50601 +    /* Set up the Error Interrupt Status Register */
50602 +    pDev->IrqEnableRegisters.error_status_enable =
50603 +                                  ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(0x01) |
50604 +                                  ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(0x01);
50605 +
50606 +    /* Set up the Counter Interrupt Status Register (only for debug interrupt to catch fatal errors) */
50607 +    pDev->IrqEnableRegisters.counter_int_status_enable =
50608 +        COUNTER_INT_STATUS_ENABLE_BIT_SET(AR6K_TARGET_DEBUG_INTR_MASK);
50609 +
50610 +        /* copy into our temp area */
50611 +    A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
50612 +
50613 +    UNLOCK_AR6K(pDev);
50614 +
50615 +        /* always synchronous */
50616 +    status = HIFReadWrite(pDev->HIFDevice,
50617 +                          INT_STATUS_ENABLE_ADDRESS,
50618 +                          &regs.int_status_enable,
50619 +                          AR6K_IRQ_ENABLE_REGS_SIZE,
50620 +                          HIF_WR_SYNC_BYTE_INC,
50621 +                          NULL);
50622 +
50623 +    if (status != A_OK) {
50624 +        /* Can't write it for some reason */
50625 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
50626 +                        ("Failed to update interrupt control registers err: %d\n", status));
50627 +
50628 +    }
50629 +
50630 +    return status;
50631 +}
50632 +
50633 +static A_STATUS DevDisableInterrupts(AR6K_DEVICE *pDev)
50634 +{
50635 +    AR6K_IRQ_ENABLE_REGISTERS regs;
50636 +
50637 +    LOCK_AR6K(pDev);
50638 +        /* Disable all interrupts */
50639 +    pDev->IrqEnableRegisters.int_status_enable = 0;
50640 +    pDev->IrqEnableRegisters.cpu_int_status_enable = 0;
50641 +    pDev->IrqEnableRegisters.error_status_enable = 0;
50642 +    pDev->IrqEnableRegisters.counter_int_status_enable = 0;
50643 +        /* copy into our temp area */
50644 +    A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
50645 +
50646 +    UNLOCK_AR6K(pDev);
50647 +
50648 +        /* always synchronous */
50649 +    return HIFReadWrite(pDev->HIFDevice,
50650 +                        INT_STATUS_ENABLE_ADDRESS,
50651 +                        &regs.int_status_enable,
50652 +                        AR6K_IRQ_ENABLE_REGS_SIZE,
50653 +                        HIF_WR_SYNC_BYTE_INC,
50654 +                        NULL);
50655 +}
50656 +
50657 +/* enable device interrupts */
50658 +A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev)
50659 +{
50660 +        /* Unmask the host controller interrupts */
50661 +    HIFUnMaskInterrupt(pDev->HIFDevice);
50662 +
50663 +    return DevEnableInterrupts(pDev);
50664 +}
50665 +
50666 +/* disable all device interrupts */
50667 +A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev)
50668 +{
50669 +    A_STATUS status;
50670 +
50671 +    status = DevDisableInterrupts(pDev);
50672 +
50673 +    if (A_SUCCESS(status)) {
50674 +            /* Disable the interrupt at the HIF layer */
50675 +        HIFMaskInterrupt(pDev->HIFDevice);
50676 +    }
50677 +
50678 +    return status;
50679 +}
50680 +
50681 +/* callback when our fetch to enable/disable completes */
50682 +static void DevDoEnableDisableRecvAsyncHandler(void *Context, HTC_PACKET *pPacket)
50683 +{
50684 +    AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
50685 +
50686 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDoEnableDisableRecvAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
50687 +
50688 +    if (A_FAILED(pPacket->Status)) {
50689 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
50690 +                (" Failed to disable receiver, status:%d \n", pPacket->Status));
50691 +    }
50692 +        /* free this IO packet */
50693 +    AR6KFreeIOPacket(pDev,pPacket);
50694 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDoEnableDisableRecvAsyncHandler \n"));
50695 +}
50696 +
50697 +/* disable packet reception (used in case the host runs out of buffers)
50698 + * this is the "override" method when the HIF reports another methods to
50699 + * disable recv events */
50700 +static A_STATUS DevDoEnableDisableRecvOverride(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
50701 +{
50702 +    A_STATUS                  status = A_OK;
50703 +    HTC_PACKET                *pIOPacket = NULL;
50704 +
50705 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC,("DevDoEnableDisableRecvOverride: Enable:%d Mode:%d\n",
50706 +            EnableRecv,AsyncMode));
50707 +
50708 +    do {
50709 +
50710 +        if (AsyncMode) {
50711 +
50712 +            pIOPacket = AR6KAllocIOPacket(pDev);
50713 +
50714 +            if (NULL == pIOPacket) {
50715 +                status = A_NO_MEMORY;
50716 +                AR_DEBUG_ASSERT(FALSE);
50717 +                break;
50718 +            }
50719 +
50720 +                /* stick in our completion routine when the I/O operation completes */
50721 +            pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
50722 +            pIOPacket->pContext = pDev;
50723 +
50724 +                /* call the HIF layer override and do this asynchronously */
50725 +            status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
50726 +                                                 EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
50727 +                                                 pIOPacket);
50728 +            break;
50729 +        }
50730 +
50731 +            /* if we get here we are doing it synchronously */
50732 +        status = pDev->HifMaskUmaskRecvEvent(pDev->HIFDevice,
50733 +                                             EnableRecv ? HIF_UNMASK_RECV : HIF_MASK_RECV,
50734 +                                             NULL);
50735 +
50736 +    } while (FALSE);
50737 +
50738 +    if (A_FAILED(status) && (pIOPacket != NULL)) {
50739 +        AR6KFreeIOPacket(pDev,pIOPacket);
50740 +    }
50741 +
50742 +    return status;
50743 +}
50744 +
50745 +/* disable packet reception (used in case the host runs out of buffers)
50746 + * this is the "normal" method using the interrupt enable registers through
50747 + * the host I/F */
50748 +static A_STATUS DevDoEnableDisableRecvNormal(AR6K_DEVICE *pDev, A_BOOL EnableRecv, A_BOOL AsyncMode)
50749 +{
50750 +    A_STATUS                  status = A_OK;
50751 +    HTC_PACKET                *pIOPacket = NULL;
50752 +    AR6K_IRQ_ENABLE_REGISTERS regs;
50753 +
50754 +        /* take the lock to protect interrupt enable shadows */
50755 +    LOCK_AR6K(pDev);
50756 +
50757 +    if (EnableRecv) {
50758 +        pDev->IrqEnableRegisters.int_status_enable |= INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
50759 +    } else {
50760 +        pDev->IrqEnableRegisters.int_status_enable &= ~INT_STATUS_ENABLE_MBOX_DATA_SET(0x01);
50761 +    }
50762 +
50763 +        /* copy into our temp area */
50764 +    A_MEMCPY(&regs,&pDev->IrqEnableRegisters,AR6K_IRQ_ENABLE_REGS_SIZE);
50765 +    UNLOCK_AR6K(pDev);
50766 +
50767 +    do {
50768 +
50769 +        if (AsyncMode) {
50770 +
50771 +            pIOPacket = AR6KAllocIOPacket(pDev);
50772 +
50773 +            if (NULL == pIOPacket) {
50774 +                status = A_NO_MEMORY;
50775 +                AR_DEBUG_ASSERT(FALSE);
50776 +                break;
50777 +            }
50778 +
50779 +                /* copy values to write to our async I/O buffer */
50780 +            A_MEMCPY(pIOPacket->pBuffer,&regs,AR6K_IRQ_ENABLE_REGS_SIZE);
50781 +
50782 +                /* stick in our completion routine when the I/O operation completes */
50783 +            pIOPacket->Completion = DevDoEnableDisableRecvAsyncHandler;
50784 +            pIOPacket->pContext = pDev;
50785 +
50786 +                /* write it out asynchronously */
50787 +            HIFReadWrite(pDev->HIFDevice,
50788 +                         INT_STATUS_ENABLE_ADDRESS,
50789 +                         pIOPacket->pBuffer,
50790 +                         AR6K_IRQ_ENABLE_REGS_SIZE,
50791 +                         HIF_WR_ASYNC_BYTE_INC,
50792 +                         pIOPacket);
50793 +            break;
50794 +        }
50795 +
50796 +        /* if we get here we are doing it synchronously */
50797 +
50798 +        status = HIFReadWrite(pDev->HIFDevice,
50799 +                              INT_STATUS_ENABLE_ADDRESS,
50800 +                              &regs.int_status_enable,
50801 +                              AR6K_IRQ_ENABLE_REGS_SIZE,
50802 +                              HIF_WR_SYNC_BYTE_INC,
50803 +                              NULL);
50804 +
50805 +    } while (FALSE);
50806 +
50807 +    if (A_FAILED(status) && (pIOPacket != NULL)) {
50808 +        AR6KFreeIOPacket(pDev,pIOPacket);
50809 +    }
50810 +
50811 +    return status;
50812 +}
50813 +
50814 +
50815 +A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
50816 +{
50817 +    if (NULL == pDev->HifMaskUmaskRecvEvent) {
50818 +        return DevDoEnableDisableRecvNormal(pDev,FALSE,AsyncMode);
50819 +    } else {
50820 +        return DevDoEnableDisableRecvOverride(pDev,FALSE,AsyncMode);
50821 +    }
50822 +}
50823 +
50824 +A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL AsyncMode)
50825 +{
50826 +    if (NULL == pDev->HifMaskUmaskRecvEvent) {
50827 +        return DevDoEnableDisableRecvNormal(pDev,TRUE,AsyncMode);
50828 +    } else {
50829 +        return DevDoEnableDisableRecvOverride(pDev,TRUE,AsyncMode);
50830 +    }
50831 +}
50832 +
50833 +void DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS   *pIrqProcRegs,
50834 +                      AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs)
50835 +{
50836 +
50837 +    AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("\n<------- Register Table -------->\n"));
50838 +
50839 +    if (pIrqProcRegs != NULL) {
50840 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50841 +            ("Int Status:               0x%x\n",pIrqProcRegs->host_int_status));
50842 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50843 +            ("CPU Int Status:            0x%x\n",pIrqProcRegs->cpu_int_status));
50844 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50845 +            ("Error Int Status:          0x%x\n",pIrqProcRegs->error_int_status));
50846 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50847 +            ("Counter Int Status:        0x%x\n",pIrqProcRegs->counter_int_status));
50848 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50849 +            ("Mbox Frame:                0x%x\n",pIrqProcRegs->mbox_frame));
50850 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50851 +            ("Rx Lookahead Valid:        0x%x\n",pIrqProcRegs->rx_lookahead_valid));
50852 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50853 +            ("Rx Lookahead 0:            0x%x\n",pIrqProcRegs->rx_lookahead[0]));
50854 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50855 +            ("Rx Lookahead 1:            0x%x\n",pIrqProcRegs->rx_lookahead[1]));
50856 +    }
50857 +
50858 +    if (pIrqEnableRegs != NULL) {
50859 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50860 +            ("Int Status Enable:         0x%x\n",pIrqEnableRegs->int_status_enable));
50861 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP,
50862 +            ("Counter Int Status Enable: 0x%x\n",pIrqEnableRegs->counter_int_status_enable));
50863 +        AR_DEBUG_PRINTF(ATH_DEBUG_DUMP, ("<------------------------------->\n"));
50864 +    }
50865 +}
50866 +
50867 +
50868 +#ifdef MBOXHW_UNIT_TEST
50869 +
50870 +
50871 +/* This is a mailbox hardware unit test that must be called in a schedulable context
50872 + * This test is very simple, it will send a list of buffers with a counting pattern
50873 + * and the target will invert the data and send the message back
50874 + *
50875 + * the unit test has the following constraints:
50876 + *
50877 + * The target has at least 8 buffers of 256 bytes each. The host will send
50878 + * the following pattern of buffers in rapid succession :
50879 + *
50880 + * 1 buffer - 128 bytes
50881 + * 1 buffer - 256 bytes
50882 + * 1 buffer - 512 bytes
50883 + * 1 buffer - 1024 bytes
50884 + *
50885 + * The host will send the buffers to one mailbox and wait for buffers to be reflected
50886 + * back from the same mailbox. The target sends the buffers FIFO order.
50887 + * Once the final buffer has been received for a mailbox, the next mailbox is tested.
50888 + *
50889 + *
50890 + * Note:  To simplifythe test , we assume that the chosen buffer sizes
50891 + *        will fall on a nice block pad
50892 + *
50893 + * It is expected that higher-order tests will be written to stress the mailboxes using
50894 + * a message-based protocol (with some performance timming) that can create more
50895 + * randomness in the packets sent over mailboxes.
50896 + *
50897 + * */
50898 +
50899 +#define A_ROUND_UP_PWR2(x, align)    (((int) (x) + ((align)-1)) & ~((align)-1))
50900 +
50901 +#define BUFFER_BLOCK_PAD 128
50902 +
50903 +#if 0
50904 +#define BUFFER1 128
50905 +#define BUFFER2 256
50906 +#define BUFFER3 512
50907 +#define BUFFER4 1024
50908 +#endif
50909 +
50910 +#if 1
50911 +#define BUFFER1 80
50912 +#define BUFFER2 200
50913 +#define BUFFER3 444
50914 +#define BUFFER4 800
50915 +#endif
50916 +
50917 +#define TOTAL_BYTES (A_ROUND_UP_PWR2(BUFFER1,BUFFER_BLOCK_PAD) + \
50918 +                     A_ROUND_UP_PWR2(BUFFER2,BUFFER_BLOCK_PAD) + \
50919 +                     A_ROUND_UP_PWR2(BUFFER3,BUFFER_BLOCK_PAD) + \
50920 +                     A_ROUND_UP_PWR2(BUFFER4,BUFFER_BLOCK_PAD) )
50921 +
50922 +#define TEST_BYTES (BUFFER1 +  BUFFER2 + BUFFER3 + BUFFER4)
50923 +
50924 +#define TEST_CREDITS_RECV_TIMEOUT 100
50925 +
50926 +static A_UINT8  g_Buffer[TOTAL_BYTES];
50927 +static A_UINT32 g_MailboxAddrs[AR6K_MAILBOXES];
50928 +static A_UINT32 g_BlockSizes[AR6K_MAILBOXES];
50929 +
50930 +#define BUFFER_PROC_LIST_DEPTH 4
50931 +
50932 +typedef struct _BUFFER_PROC_LIST{
50933 +    A_UINT8  *pBuffer;
50934 +    A_UINT32 length;
50935 +}BUFFER_PROC_LIST;
50936 +
50937 +
50938 +#define PUSH_BUFF_PROC_ENTRY(pList,len,pCurrpos) \
50939 +{                                                   \
50940 +    (pList)->pBuffer = (pCurrpos);                  \
50941 +    (pList)->length = (len);                        \
50942 +    (pCurrpos) += (len);                            \
50943 +    (pList)++;                                      \
50944 +}
50945 +
50946 +/* a simple and crude way to send different "message" sizes */
50947 +static void AssembleBufferList(BUFFER_PROC_LIST *pList)
50948 +{
50949 +    A_UINT8 *pBuffer = g_Buffer;
50950 +
50951 +#if BUFFER_PROC_LIST_DEPTH < 4
50952 +#error "Buffer processing list depth is not deep enough!!"
50953 +#endif
50954 +
50955 +    PUSH_BUFF_PROC_ENTRY(pList,BUFFER1,pBuffer);
50956 +    PUSH_BUFF_PROC_ENTRY(pList,BUFFER2,pBuffer);
50957 +    PUSH_BUFF_PROC_ENTRY(pList,BUFFER3,pBuffer);
50958 +    PUSH_BUFF_PROC_ENTRY(pList,BUFFER4,pBuffer);
50959 +
50960 +}
50961 +
50962 +#define FILL_ZERO     TRUE
50963 +#define FILL_COUNTING FALSE
50964 +static void InitBuffers(A_BOOL Zero)
50965 +{
50966 +    A_UINT16 *pBuffer16 = (A_UINT16 *)g_Buffer;
50967 +    int      i;
50968 +
50969 +        /* fill buffer with 16 bit counting pattern or zeros */
50970 +    for (i = 0; i <  (TOTAL_BYTES / 2) ; i++) {
50971 +        if (!Zero) {
50972 +            pBuffer16[i] = (A_UINT16)i;
50973 +        } else {
50974 +            pBuffer16[i] = 0;
50975 +        }
50976 +    }
50977 +}
50978 +
50979 +
50980 +static A_BOOL CheckOneBuffer(A_UINT16 *pBuffer16, int Length)
50981 +{
50982 +    int      i;
50983 +    A_UINT16 startCount;
50984 +    A_BOOL   success = TRUE;
50985 +
50986 +        /* get the starting count */
50987 +    startCount = pBuffer16[0];
50988 +        /* invert it, this is the expected value */
50989 +    startCount = ~startCount;
50990 +        /* scan the buffer and verify */
50991 +    for (i = 0; i < (Length / 2) ; i++,startCount++) {
50992 +            /* target will invert all the data */
50993 +        if ((A_UINT16)pBuffer16[i] != (A_UINT16)~startCount) {
50994 +            success = FALSE;
50995 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Invalid Data Got:0x%X, Expecting:0x%X (offset:%d, total:%d) \n",
50996 +                        pBuffer16[i], ((A_UINT16)~startCount), i, Length));
50997 +             AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("0x%X 0x%X 0x%X 0x%X \n",
50998 +                        pBuffer16[i], pBuffer16[i + 1], pBuffer16[i + 2],pBuffer16[i+3]));
50999 +            break;
51000 +        }
51001 +    }
51002 +
51003 +    return success;
51004 +}
51005 +
51006 +static A_BOOL CheckBuffers(void)
51007 +{
51008 +    int      i;
51009 +    A_BOOL   success = TRUE;
51010 +    BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
51011 +
51012 +        /* assemble the list */
51013 +    AssembleBufferList(checkList);
51014 +
51015 +        /* scan the buffers and verify */
51016 +    for (i = 0; i < BUFFER_PROC_LIST_DEPTH ; i++) {
51017 +        success = CheckOneBuffer((A_UINT16 *)checkList[i].pBuffer, checkList[i].length);
51018 +        if (!success) {
51019 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer : 0x%X, Length:%d failed verify \n",
51020 +                        (A_UINT32)checkList[i].pBuffer, checkList[i].length));
51021 +            break;
51022 +        }
51023 +    }
51024 +
51025 +    return success;
51026 +}
51027 +
51028 +    /* find the end marker for the last buffer we will be sending */
51029 +static A_UINT16 GetEndMarker(void)
51030 +{
51031 +    A_UINT8  *pBuffer;
51032 +    BUFFER_PROC_LIST checkList[BUFFER_PROC_LIST_DEPTH];
51033 +
51034 +        /* fill up buffers with the normal counting pattern */
51035 +    InitBuffers(FILL_COUNTING);
51036 +
51037 +        /* assemble the list we will be sending down */
51038 +    AssembleBufferList(checkList);
51039 +        /* point to the last 2 bytes of the last buffer */
51040 +    pBuffer = &(checkList[BUFFER_PROC_LIST_DEPTH - 1].pBuffer[(checkList[BUFFER_PROC_LIST_DEPTH - 1].length) - 2]);
51041 +
51042 +        /* the last count in the last buffer is the marker */
51043 +    return (A_UINT16)pBuffer[0] | ((A_UINT16)pBuffer[1] << 8);
51044 +}
51045 +
51046 +#define ATH_PRINT_OUT_ZONE ATH_DEBUG_ERR
51047 +
51048 +/* send the ordered buffers to the target */
51049 +static A_STATUS SendBuffers(AR6K_DEVICE *pDev, int mbox)
51050 +{
51051 +    A_STATUS         status = A_OK;
51052 +    A_UINT32         request = HIF_WR_SYNC_BLOCK_INC;
51053 +    BUFFER_PROC_LIST sendList[BUFFER_PROC_LIST_DEPTH];
51054 +    int              i;
51055 +    int              totalBytes = 0;
51056 +    int              paddedLength;
51057 +    int              totalwPadding = 0;
51058 +
51059 +    AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sending buffers on mailbox : %d \n",mbox));
51060 +
51061 +        /* fill buffer with counting pattern */
51062 +    InitBuffers(FILL_COUNTING);
51063 +
51064 +        /* assemble the order in which we send */
51065 +    AssembleBufferList(sendList);
51066 +
51067 +    for (i = 0; i < BUFFER_PROC_LIST_DEPTH; i++) {
51068 +
51069 +            /* we are doing block transfers, so we need to pad everything to a block size */
51070 +        paddedLength = (sendList[i].length + (g_BlockSizes[mbox] - 1)) &
51071 +                       (~(g_BlockSizes[mbox] - 1));
51072 +
51073 +            /* send each buffer synchronously */
51074 +        status = HIFReadWrite(pDev->HIFDevice,
51075 +                              g_MailboxAddrs[mbox],
51076 +                              sendList[i].pBuffer,
51077 +                              paddedLength,
51078 +                              request,
51079 +                              NULL);
51080 +        if (status != A_OK) {
51081 +            break;
51082 +        }
51083 +        totalBytes += sendList[i].length;
51084 +        totalwPadding += paddedLength;
51085 +    }
51086 +
51087 +    AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Sent %d bytes (%d padded bytes) to mailbox : %d \n",totalBytes,totalwPadding,mbox));
51088 +
51089 +    return status;
51090 +}
51091 +
51092 +/* poll the mailbox credit counter until we get a credit or timeout */
51093 +static A_STATUS GetCredits(AR6K_DEVICE *pDev, int mbox, int *pCredits)
51094 +{
51095 +    A_STATUS status = A_OK;
51096 +    int      timeout = TEST_CREDITS_RECV_TIMEOUT;
51097 +    A_UINT8  credits = 0;
51098 +    A_UINT32 address;
51099 +
51100 +    while (TRUE) {
51101 +
51102 +            /* Read the counter register to get credits, this auto-decrements  */
51103 +        address = COUNT_DEC_ADDRESS + (AR6K_MAILBOXES + mbox) * 4;
51104 +        status = HIFReadWrite(pDev->HIFDevice, address, &credits, sizeof(credits),
51105 +                              HIF_RD_SYNC_BYTE_FIX, NULL);
51106 +        if (status != A_OK) {
51107 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
51108 +                ("Unable to decrement the command credit count register (mbox=%d)\n",mbox));
51109 +            status = A_ERROR;
51110 +            break;
51111 +        }
51112 +
51113 +        if (credits) {
51114 +            break;
51115 +        }
51116 +
51117 +        timeout--;
51118 +
51119 +        if (timeout <= 0) {
51120 +              AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
51121 +                (" Timeout reading credit registers (mbox=%d, address:0x%X) \n",mbox,address));
51122 +            status = A_ERROR;
51123 +            break;
51124 +        }
51125 +
51126 +         /* delay a little, target may not be ready */
51127 +         A_MDELAY(1000);
51128 +
51129 +    }
51130 +
51131 +    if (status == A_OK) {
51132 +        *pCredits = credits;
51133 +    }
51134 +
51135 +    return status;
51136 +}
51137 +
51138 +
51139 +/* wait for the buffers to come back */
51140 +static A_STATUS RecvBuffers(AR6K_DEVICE *pDev, int mbox)
51141 +{
51142 +    A_STATUS         status = A_OK;
51143 +    A_UINT32         request = HIF_RD_SYNC_BLOCK_INC;
51144 +    BUFFER_PROC_LIST recvList[BUFFER_PROC_LIST_DEPTH];
51145 +    int              curBuffer;
51146 +    int              credits;
51147 +    int              i;
51148 +    int              totalBytes = 0;
51149 +    int              paddedLength;
51150 +    int              totalwPadding = 0;
51151 +
51152 +    AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for buffers on mailbox : %d \n",mbox));
51153 +
51154 +        /* zero the buffers */
51155 +    InitBuffers(FILL_ZERO);
51156 +
51157 +        /* assemble the order in which we should receive */
51158 +    AssembleBufferList(recvList);
51159 +
51160 +    curBuffer = 0;
51161 +
51162 +    while (curBuffer < BUFFER_PROC_LIST_DEPTH) {
51163 +
51164 +            /* get number of buffers that have been completed, this blocks
51165 +             * until we get at least 1 credit or it times out */
51166 +        status = GetCredits(pDev, mbox, &credits);
51167 +
51168 +        if (status != A_OK) {
51169 +            break;
51170 +        }
51171 +
51172 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got %d messages on mailbox : %d \n",credits, mbox));
51173 +
51174 +            /* get all the buffers that are sitting on the queue */
51175 +        for (i = 0; i < credits; i++) {
51176 +            AR_DEBUG_ASSERT(curBuffer < BUFFER_PROC_LIST_DEPTH);
51177 +                /* recv the current buffer synchronously, the buffers should come back in
51178 +                 * order... with padding applied by the target */
51179 +            paddedLength = (recvList[curBuffer].length + (g_BlockSizes[mbox] - 1)) &
51180 +                       (~(g_BlockSizes[mbox] - 1));
51181 +
51182 +            status = HIFReadWrite(pDev->HIFDevice,
51183 +                                  g_MailboxAddrs[mbox],
51184 +                                  recvList[curBuffer].pBuffer,
51185 +                                  paddedLength,
51186 +                                  request,
51187 +                                  NULL);
51188 +            if (status != A_OK) {
51189 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to read %d bytes on mailbox:%d : address:0x%X \n",
51190 +                        recvList[curBuffer].length, mbox, g_MailboxAddrs[mbox]));
51191 +                break;
51192 +            }
51193 +
51194 +            totalwPadding += paddedLength;
51195 +            totalBytes += recvList[curBuffer].length;
51196 +            curBuffer++;
51197 +        }
51198 +
51199 +        if (status != A_OK) {
51200 +            break;
51201 +        }
51202 +            /* go back and get some more */
51203 +        credits = 0;
51204 +    }
51205 +
51206 +    if (totalBytes != TEST_BYTES) {
51207 +        AR_DEBUG_ASSERT(FALSE);
51208 +    }  else {
51209 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Got all buffers on mbox:%d total recv :%d (w/Padding : %d) \n",
51210 +            mbox, totalBytes, totalwPadding));
51211 +    }
51212 +
51213 +    return status;
51214 +
51215 +
51216 +}
51217 +
51218 +static A_STATUS DoOneMboxHWTest(AR6K_DEVICE *pDev, int mbox)
51219 +{
51220 +    A_STATUS status;
51221 +
51222 +    do {
51223 +            /* send out buffers */
51224 +        status = SendBuffers(pDev,mbox);
51225 +
51226 +        if (status != A_OK) {
51227 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Sending buffers Failed : %d mbox:%d\n",status,mbox));
51228 +            break;
51229 +        }
51230 +
51231 +            /* go get them, this will block */
51232 +        status =  RecvBuffers(pDev, mbox);
51233 +
51234 +        if (status != A_OK) {
51235 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Recv buffers Failed : %d mbox:%d\n",status,mbox));
51236 +            break;
51237 +        }
51238 +
51239 +            /* check the returned data patterns */
51240 +        if (!CheckBuffers()) {
51241 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Buffer Verify Failed : mbox:%d\n",mbox));
51242 +            status = A_ERROR;
51243 +            break;
51244 +        }
51245 +
51246 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" Send/Recv success! mailbox : %d \n",mbox));
51247 +
51248 +    }  while (FALSE);
51249 +
51250 +    return status;
51251 +}
51252 +
51253 +/* here is where the test starts */
51254 +A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev)
51255 +{
51256 +    int      i;
51257 +    A_STATUS status;
51258 +    int      credits = 0;
51259 +    A_UINT8  params[4];
51260 +    int      numBufs;
51261 +    int      bufferSize;
51262 +    A_UINT16 temp;
51263 +
51264 +
51265 +    AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest START -  \n"));
51266 +
51267 +    do {
51268 +            /* get the addresses for all 4 mailboxes */
51269 +        status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_ADDR,
51270 +                                    g_MailboxAddrs, sizeof(g_MailboxAddrs));
51271 +
51272 +        if (status != A_OK) {
51273 +            AR_DEBUG_ASSERT(FALSE);
51274 +            break;
51275 +        }
51276 +
51277 +            /* get the block sizes */
51278 +        status = HIFConfigureDevice(pDev->HIFDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
51279 +                                    g_BlockSizes, sizeof(g_BlockSizes));
51280 +
51281 +        if (status != A_OK) {
51282 +            AR_DEBUG_ASSERT(FALSE);
51283 +            break;
51284 +        }
51285 +
51286 +            /* note, the HIF layer usually reports mbox 0 to have a block size of
51287 +             * 1, but our test wants to run in block-mode for all mailboxes, so we treat all mailboxes
51288 +             * the same. */
51289 +        g_BlockSizes[0] = g_BlockSizes[1];
51290 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Block Size to use: %d \n",g_BlockSizes[0]));
51291 +
51292 +        if (g_BlockSizes[1] > BUFFER_BLOCK_PAD) {
51293 +            AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("%d Block size is too large for buffer pad %d\n",
51294 +                g_BlockSizes[1], BUFFER_BLOCK_PAD));
51295 +            break;
51296 +        }
51297 +
51298 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Waiting for target.... \n"));
51299 +
51300 +            /* the target lets us know it is ready by giving us 1 credit on
51301 +             * mailbox 0 */
51302 +        status = GetCredits(pDev, 0, &credits);
51303 +
51304 +        if (status != A_OK) {
51305 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait for target ready \n"));
51306 +            break;
51307 +        }
51308 +
51309 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Target is ready ...\n"));
51310 +
51311 +            /* read the first 4 scratch registers */
51312 +        status = HIFReadWrite(pDev->HIFDevice,
51313 +                              SCRATCH_ADDRESS,
51314 +                              params,
51315 +                              4,
51316 +                              HIF_RD_SYNC_BYTE_INC,
51317 +                              NULL);
51318 +
51319 +        if (status != A_OK) {
51320 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to wait get parameters \n"));
51321 +            break;
51322 +        }
51323 +
51324 +        numBufs = params[0];
51325 +        bufferSize = (int)(((A_UINT16)params[2] << 8) | (A_UINT16)params[1]);
51326 +
51327 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE,
51328 +            ("Target parameters: bufs per mailbox:%d, buffer size:%d bytes (total space: %d, minimum required space (w/padding): %d) \n",
51329 +            numBufs, bufferSize, (numBufs * bufferSize), TOTAL_BYTES));
51330 +
51331 +        if ((numBufs * bufferSize) < TOTAL_BYTES) {
51332 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Not Enough buffer space to run test! need:%d, got:%d \n",
51333 +                TOTAL_BYTES, (numBufs*bufferSize)));
51334 +            status = A_ERROR;
51335 +            break;
51336 +        }
51337 +
51338 +        temp = GetEndMarker();
51339 +
51340 +        status = HIFReadWrite(pDev->HIFDevice,
51341 +                              SCRATCH_ADDRESS + 4,
51342 +                              (A_UINT8 *)&temp,
51343 +                              2,
51344 +                              HIF_WR_SYNC_BYTE_INC,
51345 +                              NULL);
51346 +
51347 +        if (status != A_OK) {
51348 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write end marker \n"));
51349 +            break;
51350 +        }
51351 +
51352 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("End Marker: 0x%X \n",temp));
51353 +
51354 +        temp = (A_UINT16)g_BlockSizes[1];
51355 +            /* convert to a mask */
51356 +        temp = temp - 1;
51357 +        status = HIFReadWrite(pDev->HIFDevice,
51358 +                              SCRATCH_ADDRESS + 6,
51359 +                              (A_UINT8 *)&temp,
51360 +                              2,
51361 +                              HIF_WR_SYNC_BYTE_INC,
51362 +                              NULL);
51363 +
51364 +        if (status != A_OK) {
51365 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Failed to write block mask \n"));
51366 +            break;
51367 +        }
51368 +
51369 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, ("Set Block Mask: 0x%X \n",temp));
51370 +
51371 +            /* execute the test on each mailbox */
51372 +        for (i = 0; i < AR6K_MAILBOXES; i++) {
51373 +            status = DoOneMboxHWTest(pDev, i);
51374 +            if (status != A_OK) {
51375 +                break;
51376 +            }
51377 +        }
51378 +
51379 +    } while (FALSE);
51380 +
51381 +    if (status == A_OK) {
51382 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - SUCCESS! -  \n"));
51383 +    } else {
51384 +        AR_DEBUG_PRINTF(ATH_PRINT_OUT_ZONE, (" DoMboxHWTest DONE - FAILED! -  \n"));
51385 +    }
51386 +        /* don't let HTC_Start continue, the target is actually not running any HTC code */
51387 +    return A_ERROR;
51388 +}
51389 +#endif
51390 +
51391 +
51392 +
51393 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c
51394 ===================================================================
51395 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
51396 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k_events.c  2008-12-11 22:46:49.000000000 +0100
51397 @@ -0,0 +1,638 @@
51398 +/*
51399 + * AR6K Driver layer event handling (i.e. interrupts, message polling)
51400 + *
51401 + * Copyright (c) 2007 Atheros Communications Inc.
51402 + * All rights reserved.
51403 + *
51404 + *
51405 + *  This program is free software; you can redistribute it and/or modify
51406 + *  it under the terms of the GNU General Public License version 2 as
51407 + *  published by the Free Software Foundation;
51408 + *
51409 + *  Software distributed under the License is distributed on an "AS
51410 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
51411 + *  implied. See the License for the specific language governing
51412 + *  rights and limitations under the License.
51413 + *
51414 + *
51415 + *
51416 + */
51417 +#include "a_config.h"
51418 +#include "athdefs.h"
51419 +#include "a_types.h"
51420 +#include "AR6Khwreg.h"
51421 +#include "a_osapi.h"
51422 +#include "a_debug.h"
51423 +#include "hif.h"
51424 +#include "htc_packet.h"
51425 +#include "ar6k.h"
51426 +
51427 +extern void AR6KFreeIOPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket);
51428 +extern HTC_PACKET *AR6KAllocIOPacket(AR6K_DEVICE *pDev);
51429 +
51430 +static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev);
51431 +
51432 +#define DELAY_PER_INTERVAL_MS 10  /* 10 MS delay per polling interval */
51433 +
51434 +/* completion routine for ALL HIF layer async I/O */
51435 +A_STATUS DevRWCompletionHandler(void *context, A_STATUS status)
51436 +{
51437 +    HTC_PACKET *pPacket = (HTC_PACKET *)context;
51438 +
51439 +    COMPLETE_HTC_PACKET(pPacket,status);
51440 +
51441 +    return A_OK;
51442 +}
51443 +
51444 +/* mailbox recv message polling */
51445 +A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
51446 +                            A_UINT32    *pLookAhead,
51447 +                            int          TimeoutMS)
51448 +{
51449 +    A_STATUS status = A_OK;
51450 +    int      timeout = TimeoutMS/DELAY_PER_INTERVAL_MS;
51451 +
51452 +    AR_DEBUG_ASSERT(timeout > 0);
51453 +
51454 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+DevPollMboxMsgRecv \n"));
51455 +
51456 +    while (TRUE) {
51457 +
51458 +        if (pDev->GetPendingEventsFunc != NULL)
51459 +               {
51460 +
51461 +            HIF_PENDING_EVENTS_INFO events;
51462 +
51463 +            /* the HIF layer uses a special mechanism to get events, do this
51464 +             * synchronously */
51465 +            status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
51466 +                                            &events,
51467 +                                            NULL);
51468 +            if (A_FAILED(status))
51469 +                       {
51470 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to get pending events \n"));
51471 +                               break;
51472 +            }
51473 +
51474 +            if (events.Events & HIF_RECV_MSG_AVAIL)
51475 +                       {
51476 +                    /*  there is a message available, the lookahead should be valid now */
51477 +                *pLookAhead = events.LookAhead;
51478 +
51479 +                break;
51480 +            }
51481 +        }
51482 +               else
51483 +               {
51484 +
51485 +                /* this is the standard HIF way.... */
51486 +                /* load the register table */
51487 +            status = HIFReadWrite(pDev->HIFDevice,
51488 +                                  HOST_INT_STATUS_ADDRESS,
51489 +                                  (A_UINT8 *)&pDev->IrqProcRegisters,
51490 +                                  AR6K_IRQ_PROC_REGS_SIZE,
51491 +                                  HIF_RD_SYNC_BYTE_INC,
51492 +                                  NULL);
51493 +
51494 +            if (A_FAILED(status))
51495 +                       {
51496 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Failed to read register table \n"));
51497 +                break;
51498 +            }
51499 +
51500 +                /* check for MBOX data and valid lookahead */
51501 +            if (pDev->IrqProcRegisters.host_int_status & (1 << HTC_MAILBOX))
51502 +                       {
51503 +                if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX))
51504 +                               {
51505 +                    /* mailbox has a message and the look ahead is valid */
51506 +                    *pLookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
51507 +                    break;
51508 +                }
51509 +            }
51510 +
51511 +        }
51512 +
51513 +        timeout--;
51514 +
51515 +        if (timeout <= 0)
51516 +               {
51517 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Timeout waiting for recv message \n"));
51518 +            status = A_ERROR;
51519 +
51520 +                /* check if the target asserted */
51521 +            if ( pDev->IrqProcRegisters.counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
51522 +                    /* target signaled an assert, process this pending interrupt
51523 +                     * this will call the target failure handler */
51524 +                DevServiceDebugInterrupt(pDev);
51525 +            }
51526 +
51527 +            break;
51528 +        }
51529 +
51530 +            /* delay a little  */
51531 +         A_MDELAY(DELAY_PER_INTERVAL_MS);
51532 +         AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("  Retry Mbox Poll : %d \n",timeout));
51533 +    }
51534 +
51535 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-DevPollMboxMsgRecv \n"));
51536 +
51537 +    return status;
51538 +}
51539 +
51540 +static A_STATUS DevServiceCPUInterrupt(AR6K_DEVICE *pDev)
51541 +{
51542 +    A_STATUS status;
51543 +    A_UINT8  cpu_int_status;
51544 +    A_UINT8  regBuffer[4];
51545 +
51546 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("CPU Interrupt\n"));
51547 +    cpu_int_status = pDev->IrqProcRegisters.cpu_int_status &
51548 +                     pDev->IrqEnableRegisters.cpu_int_status_enable;
51549 +    AR_DEBUG_ASSERT(cpu_int_status);
51550 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51551 +                    ("Valid interrupt source(s) in CPU_INT_STATUS: 0x%x\n",
51552 +                    cpu_int_status));
51553 +
51554 +        /* Clear the interrupt */
51555 +    pDev->IrqProcRegisters.cpu_int_status &= ~cpu_int_status; /* W1C */
51556 +
51557 +        /* set up the register transfer buffer to hit the register 4 times , this is done
51558 +         * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
51559 +         * restrict bus transfer lengths to be a multiple of 4-bytes */
51560 +
51561 +        /* set W1C value to clear the interrupt, this hits the register first */
51562 +    regBuffer[0] = cpu_int_status;
51563 +        /* the remaining 4 values are set to zero which have no-effect  */
51564 +    regBuffer[1] = 0;
51565 +    regBuffer[2] = 0;
51566 +    regBuffer[3] = 0;
51567 +
51568 +    status = HIFReadWrite(pDev->HIFDevice,
51569 +                          CPU_INT_STATUS_ADDRESS,
51570 +                          regBuffer,
51571 +                          4,
51572 +                          HIF_WR_SYNC_BYTE_FIX,
51573 +                          NULL);
51574 +
51575 +    AR_DEBUG_ASSERT(status == A_OK);
51576 +    return status;
51577 +}
51578 +
51579 +
51580 +static A_STATUS DevServiceErrorInterrupt(AR6K_DEVICE *pDev)
51581 +{
51582 +    A_STATUS status;
51583 +    A_UINT8  error_int_status;
51584 +    A_UINT8  regBuffer[4];
51585 +
51586 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error Interrupt\n"));
51587 +    error_int_status = pDev->IrqProcRegisters.error_int_status & 0x0F;
51588 +    AR_DEBUG_ASSERT(error_int_status);
51589 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51590 +                    ("Valid interrupt source(s) in ERROR_INT_STATUS: 0x%x\n",
51591 +                    error_int_status));
51592 +
51593 +    if (ERROR_INT_STATUS_WAKEUP_GET(error_int_status)) {
51594 +        /* Wakeup */
51595 +        AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error : Wakeup\n"));
51596 +    }
51597 +
51598 +    if (ERROR_INT_STATUS_RX_UNDERFLOW_GET(error_int_status)) {
51599 +        /* Rx Underflow */
51600 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Rx Underflow\n"));
51601 +    }
51602 +
51603 +    if (ERROR_INT_STATUS_TX_OVERFLOW_GET(error_int_status)) {
51604 +        /* Tx Overflow */
51605 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Tx Overflow\n"));
51606 +    }
51607 +
51608 +        /* Clear the interrupt */
51609 +    pDev->IrqProcRegisters.error_int_status &= ~error_int_status; /* W1C */
51610 +
51611 +        /* set up the register transfer buffer to hit the register 4 times , this is done
51612 +         * to make the access 4-byte aligned to mitigate issues with host bus interconnects that
51613 +         * restrict bus transfer lengths to be a multiple of 4-bytes */
51614 +
51615 +        /* set W1C value to clear the interrupt, this hits the register first */
51616 +    regBuffer[0] = error_int_status;
51617 +        /* the remaining 4 values are set to zero which have no-effect  */
51618 +    regBuffer[1] = 0;
51619 +    regBuffer[2] = 0;
51620 +    regBuffer[3] = 0;
51621 +
51622 +    status = HIFReadWrite(pDev->HIFDevice,
51623 +                          ERROR_INT_STATUS_ADDRESS,
51624 +                          regBuffer,
51625 +                          4,
51626 +                          HIF_WR_SYNC_BYTE_FIX,
51627 +                          NULL);
51628 +
51629 +    AR_DEBUG_ASSERT(status == A_OK);
51630 +    return status;
51631 +}
51632 +
51633 +static A_STATUS DevServiceDebugInterrupt(AR6K_DEVICE *pDev)
51634 +{
51635 +    A_UINT32 dummy;
51636 +    A_STATUS status;
51637 +
51638 +    /* Send a target failure event to the application */
51639 +    AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Target debug interrupt\n"));
51640 +
51641 +    if (pDev->TargetFailureCallback != NULL) {
51642 +        pDev->TargetFailureCallback(pDev->HTCContext);
51643 +    }
51644 +
51645 +    /* clear the interrupt , the debug error interrupt is
51646 +     * counter 0 */
51647 +        /* read counter to clear interrupt */
51648 +    status = HIFReadWrite(pDev->HIFDevice,
51649 +                          COUNT_DEC_ADDRESS,
51650 +                          (A_UINT8 *)&dummy,
51651 +                          4,
51652 +                          HIF_RD_SYNC_BYTE_INC,
51653 +                          NULL);
51654 +
51655 +    AR_DEBUG_ASSERT(status == A_OK);
51656 +    return status;
51657 +}
51658 +
51659 +static A_STATUS DevServiceCounterInterrupt(AR6K_DEVICE *pDev)
51660 +{
51661 +    A_UINT8 counter_int_status;
51662 +
51663 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Counter Interrupt\n"));
51664 +
51665 +    counter_int_status = pDev->IrqProcRegisters.counter_int_status &
51666 +                         pDev->IrqEnableRegisters.counter_int_status_enable;
51667 +
51668 +    AR_DEBUG_ASSERT(counter_int_status);
51669 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51670 +                    ("Valid interrupt source(s) in COUNTER_INT_STATUS: 0x%x\n",
51671 +                    counter_int_status));
51672 +
51673 +    /* Check if the debug interrupt is pending */
51674 +    if (counter_int_status & AR6K_TARGET_DEBUG_INTR_MASK) {
51675 +        return DevServiceDebugInterrupt(pDev);
51676 +    }
51677 +
51678 +    return A_OK;
51679 +}
51680 +
51681 +/* callback when our fetch to get interrupt status registers completes */
51682 +static void DevGetEventAsyncHandler(void *Context, HTC_PACKET *pPacket)
51683 +{
51684 +    AR6K_DEVICE *pDev = (AR6K_DEVICE *)Context;
51685 +    A_UINT32    lookAhead = 0;
51686 +    A_BOOL      otherInts = FALSE;
51687 +
51688 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevGetEventAsyncHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
51689 +
51690 +    do {
51691 +
51692 +        if (A_FAILED(pPacket->Status)) {
51693 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
51694 +                    (" GetEvents I/O request failed, status:%d \n", pPacket->Status));
51695 +            /* bail out, don't unmask HIF interrupt */
51696 +            break;
51697 +        }
51698 +
51699 +        if (pDev->GetPendingEventsFunc != NULL) {
51700 +                /* the HIF layer collected the information for us */
51701 +            HIF_PENDING_EVENTS_INFO *pEvents = (HIF_PENDING_EVENTS_INFO *)pPacket->pBuffer;
51702 +            if (pEvents->Events & HIF_RECV_MSG_AVAIL) {
51703 +                lookAhead = pEvents->LookAhead;
51704 +                if (0 == lookAhead) {
51705 +                    AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler1, lookAhead is zero! \n"));
51706 +                }
51707 +            }
51708 +            if (pEvents->Events & HIF_OTHER_EVENTS) {
51709 +                otherInts = TRUE;
51710 +            }
51711 +        } else {
51712 +                /* standard interrupt table handling.... */
51713 +            AR6K_IRQ_PROC_REGISTERS *pReg = (AR6K_IRQ_PROC_REGISTERS *)pPacket->pBuffer;
51714 +            A_UINT8                 host_int_status;
51715 +
51716 +            host_int_status = pReg->host_int_status & pDev->IrqEnableRegisters.int_status_enable;
51717 +
51718 +            if (host_int_status & (1 << HTC_MAILBOX)) {
51719 +                host_int_status &= ~(1 << HTC_MAILBOX);
51720 +                if (pReg->rx_lookahead_valid & (1 << HTC_MAILBOX)) {
51721 +                        /* mailbox has a message and the look ahead is valid */
51722 +                    lookAhead = pReg->rx_lookahead[HTC_MAILBOX];
51723 +                    if (0 == lookAhead) {
51724 +                        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" DevGetEventAsyncHandler2, lookAhead is zero! \n"));
51725 +                    }
51726 +                }
51727 +            }
51728 +
51729 +            if (host_int_status) {
51730 +                    /* there are other interrupts to handle */
51731 +                otherInts = TRUE;
51732 +            }
51733 +        }
51734 +
51735 +        if (otherInts || (lookAhead == 0)) {
51736 +            /* if there are other interrupts to process, we cannot do this in the async handler so
51737 +             * ack the interrupt which will cause our sync handler to run again
51738 +             * if however there are no more messages, we can now ack the interrupt  */
51739 +            AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51740 +                (" Acking interrupt from DevGetEventAsyncHandler (otherints:%d, lookahead:0x%X)\n",
51741 +                otherInts, lookAhead));
51742 +            HIFAckInterrupt(pDev->HIFDevice);
51743 +        } else {
51744 +            AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51745 +                    (" DevGetEventAsyncHandler : detected another message, lookahead :0x%X \n",
51746 +                    lookAhead));
51747 +                /* lookahead is non-zero and there are no other interrupts to service,
51748 +                 * go get the next message */
51749 +            pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, NULL);
51750 +        }
51751 +
51752 +    } while (FALSE);
51753 +
51754 +        /* free this IO packet */
51755 +    AR6KFreeIOPacket(pDev,pPacket);
51756 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevGetEventAsyncHandler \n"));
51757 +}
51758 +
51759 +/* called by the HTC layer when it wants us to check if the device has any more pending
51760 + * recv messages, this starts off a series of async requests to read interrupt registers  */
51761 +A_STATUS DevCheckPendingRecvMsgsAsync(void *context)
51762 +{
51763 +    AR6K_DEVICE  *pDev = (AR6K_DEVICE *)context;
51764 +    A_STATUS      status = A_OK;
51765 +    HTC_PACKET   *pIOPacket;
51766 +
51767 +    /* this is called in an ASYNC only context, we may NOT block, sleep or call any apis that can
51768 +     * cause us to switch contexts */
51769 +
51770 +   AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevCheckPendingRecvMsgsAsync: (dev: 0x%X)\n", (A_UINT32)pDev));
51771 +
51772 +   do {
51773 +
51774 +        if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
51775 +                /* break the async processing chain right here, no need to continue.
51776 +                 * The DevDsrHandler() will handle things in a loop when things are driven
51777 +                 * synchronously  */
51778 +            break;
51779 +        }
51780 +            /* first allocate one of our HTC packets we created for async I/O
51781 +             * we reuse HTC packet definitions so that we can use the completion mechanism
51782 +             * in DevRWCompletionHandler() */
51783 +        pIOPacket = AR6KAllocIOPacket(pDev);
51784 +
51785 +        if (NULL == pIOPacket) {
51786 +                /* there should be only 1 asynchronous request out at a time to read these registers
51787 +                 * so this should actually never happen */
51788 +            status = A_NO_MEMORY;
51789 +            AR_DEBUG_ASSERT(FALSE);
51790 +            break;
51791 +        }
51792 +
51793 +            /* stick in our completion routine when the I/O operation completes */
51794 +        pIOPacket->Completion = DevGetEventAsyncHandler;
51795 +        pIOPacket->pContext = pDev;
51796 +
51797 +        if (pDev->GetPendingEventsFunc) {
51798 +                /* HIF layer has it's own mechanism, pass the IO to it.. */
51799 +            status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
51800 +                                                (HIF_PENDING_EVENTS_INFO *)pIOPacket->pBuffer,
51801 +                                                pIOPacket);
51802 +
51803 +        } else {
51804 +                /* standard way, read the interrupt register table asynchronously again */
51805 +            status = HIFReadWrite(pDev->HIFDevice,
51806 +                                  HOST_INT_STATUS_ADDRESS,
51807 +                                  pIOPacket->pBuffer,
51808 +                                  AR6K_IRQ_PROC_REGS_SIZE,
51809 +                                  HIF_RD_ASYNC_BYTE_INC,
51810 +                                  pIOPacket);
51811 +        }
51812 +
51813 +        AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Async IO issued to get interrupt status...\n"));
51814 +   } while (FALSE);
51815 +
51816 +   AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevCheckPendingRecvMsgsAsync \n"));
51817 +
51818 +   return status;
51819 +}
51820 +
51821 +/* process pending interrupts synchronously */
51822 +static A_STATUS ProcessPendingIRQs(AR6K_DEVICE *pDev, A_BOOL *pDone, A_BOOL *pASyncProcessing)
51823 +{
51824 +    A_STATUS    status = A_OK;
51825 +    A_UINT8     host_int_status = 0;
51826 +    A_UINT32    lookAhead = 0;
51827 +
51828 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+ProcessPendingIRQs: (dev: 0x%X)\n", (A_UINT32)pDev));
51829 +
51830 +    /*** NOTE: the HIF implementation guarantees that the context of this call allows
51831 +     *         us to perform SYNCHRONOUS I/O, that is we can block, sleep or call any API that
51832 +     *         can block or switch thread/task ontexts.
51833 +     *         This is a fully schedulable context.
51834 +     * */
51835 +    do {
51836 +
51837 +        if (pDev->GetPendingEventsFunc != NULL) {
51838 +            HIF_PENDING_EVENTS_INFO events;
51839 +
51840 +                /* the HIF layer uses a special mechanism to get events
51841 +                 * get this synchronously  */
51842 +            status = pDev->GetPendingEventsFunc(pDev->HIFDevice,
51843 +                                                &events,
51844 +                                                NULL);
51845 +
51846 +            if (A_FAILED(status)) {
51847 +                break;
51848 +            }
51849 +
51850 +            if (events.Events & HIF_RECV_MSG_AVAIL) {
51851 +                lookAhead = events.LookAhead;
51852 +                if (0 == lookAhead) {
51853 +                    AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs1 lookAhead is zero! \n"));
51854 +                }
51855 +            }
51856 +
51857 +            if (!(events.Events & HIF_OTHER_EVENTS) ||
51858 +                !(pDev->IrqEnableRegisters.int_status_enable & OTHER_INTS_ENABLED)) {
51859 +                    /* no need to read the register table, no other interesting interrupts.
51860 +                     * Some interfaces (like SPI) can shadow interrupt sources without
51861 +                     * requiring the host to do a full table read */
51862 +                break;
51863 +            }
51864 +
51865 +            /* otherwise fall through and read the register table */
51866 +        }
51867 +
51868 +        /*
51869 +         * Read the first 28 bytes of the HTC register table. This will yield us
51870 +         * the value of different int status registers and the lookahead
51871 +         * registers.
51872 +         *    length = sizeof(int_status) + sizeof(cpu_int_status) +
51873 +         *             sizeof(error_int_status) + sizeof(counter_int_status) +
51874 +         *             sizeof(mbox_frame) + sizeof(rx_lookahead_valid) +
51875 +         *             sizeof(hole) +  sizeof(rx_lookahead) +
51876 +         *             sizeof(int_status_enable) + sizeof(cpu_int_status_enable) +
51877 +         *             sizeof(error_status_enable) +
51878 +         *             sizeof(counter_int_status_enable);
51879 +         *
51880 +        */
51881 +        status = HIFReadWrite(pDev->HIFDevice,
51882 +                              HOST_INT_STATUS_ADDRESS,
51883 +                              (A_UINT8 *)&pDev->IrqProcRegisters,
51884 +                              AR6K_IRQ_PROC_REGS_SIZE,
51885 +                              HIF_RD_SYNC_BYTE_INC,
51886 +                              NULL);
51887 +
51888 +        if (A_FAILED(status)) {
51889 +            break;
51890 +        }
51891 +
51892 +        if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_IRQ)) {
51893 +            DevDumpRegisters(&pDev->IrqProcRegisters,
51894 +                             &pDev->IrqEnableRegisters);
51895 +        }
51896 +
51897 +            /* Update only those registers that are enabled */
51898 +        host_int_status = pDev->IrqProcRegisters.host_int_status &
51899 +                          pDev->IrqEnableRegisters.int_status_enable;
51900 +
51901 +        if (NULL == pDev->GetPendingEventsFunc) {
51902 +                /* only look at mailbox status if the HIF layer did not provide this function,
51903 +                 * on some HIF interfaces reading the RX lookahead is not valid to do */
51904 +            if (host_int_status & (1 << HTC_MAILBOX)) {
51905 +                    /* mask out pending mailbox value, we use "lookAhead" as the real flag for
51906 +                     * mailbox processing below */
51907 +                host_int_status &= ~(1 << HTC_MAILBOX);
51908 +                if (pDev->IrqProcRegisters.rx_lookahead_valid & (1 << HTC_MAILBOX)) {
51909 +                        /* mailbox has a message and the look ahead is valid */
51910 +                    lookAhead = pDev->IrqProcRegisters.rx_lookahead[HTC_MAILBOX];
51911 +                    if (0 == lookAhead) {
51912 +                        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" ProcessPendingIRQs2, lookAhead is zero! \n"));
51913 +                    }
51914 +                }
51915 +            }
51916 +        } else {
51917 +                /* not valid to check if the HIF has another mechanism for reading mailbox pending status*/
51918 +            host_int_status &= ~(1 << HTC_MAILBOX);
51919 +        }
51920 +
51921 +    } while (FALSE);
51922 +
51923 +
51924 +    do {
51925 +
51926 +            /* did the interrupt status fetches succeed? */
51927 +        if (A_FAILED(status)) {
51928 +            break;
51929 +        }
51930 +
51931 +        if ((0 == host_int_status) && (0 == lookAhead)) {
51932 +                /* nothing to process, the caller can use this to break out of a loop */
51933 +            *pDone = TRUE;
51934 +            break;
51935 +        }
51936 +
51937 +        if (lookAhead != 0) {
51938 +            AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("Pending mailbox message, LookAhead: 0x%X\n",lookAhead));
51939 +                /* Mailbox Interrupt, the HTC layer may issue async requests to empty the
51940 +                 * mailbox...
51941 +                 * When emptying the recv mailbox we use the async handler above called from the
51942 +                 * completion routine of the callers read request. This can improve performance
51943 +                 * by reducing context switching when we rapidly pull packets */
51944 +            status = pDev->MessagePendingCallback(pDev->HTCContext, lookAhead, pASyncProcessing);
51945 +            if (A_FAILED(status)) {
51946 +                break;
51947 +            }
51948 +        }
51949 +
51950 +            /* now handle the rest of them */
51951 +        AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
51952 +                            (" Valid interrupt source(s) for OTHER interrupts: 0x%x\n",
51953 +                            host_int_status));
51954 +
51955 +        if (HOST_INT_STATUS_CPU_GET(host_int_status)) {
51956 +                /* CPU Interrupt */
51957 +            status = DevServiceCPUInterrupt(pDev);
51958 +            if (A_FAILED(status)){
51959 +                break;
51960 +            }
51961 +        }
51962 +
51963 +        if (HOST_INT_STATUS_ERROR_GET(host_int_status)) {
51964 +                /* Error Interrupt */
51965 +            status = DevServiceErrorInterrupt(pDev);
51966 +            if (A_FAILED(status)){
51967 +                break;
51968 +            }
51969 +        }
51970 +
51971 +        if (HOST_INT_STATUS_COUNTER_GET(host_int_status)) {
51972 +                /* Counter Interrupt */
51973 +            status = DevServiceCounterInterrupt(pDev);
51974 +            if (A_FAILED(status)){
51975 +                break;
51976 +            }
51977 +        }
51978 +
51979 +    } while (FALSE);
51980 +
51981 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-ProcessPendingIRQs: (done:%d, async:%d) status=%d \n",
51982 +                *pDone, *pASyncProcessing, status));
51983 +
51984 +    return status;
51985 +}
51986 +
51987 +
51988 +/* Synchronousinterrupt handler, this handler kicks off all interrupt processing.*/
51989 +A_STATUS DevDsrHandler(void *context)
51990 +{
51991 +    AR6K_DEVICE *pDev = (AR6K_DEVICE *)context;
51992 +    A_STATUS    status = A_OK;
51993 +    A_BOOL      done = FALSE;
51994 +    A_BOOL      asyncProc = FALSE;
51995 +
51996 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("+DevDsrHandler: (dev: 0x%X)\n", (A_UINT32)pDev));
51997 +
51998 +
51999 +    while (!done) {
52000 +        status = ProcessPendingIRQs(pDev, &done, &asyncProc);
52001 +        if (A_FAILED(status)) {
52002 +            break;
52003 +        }
52004 +
52005 +        if (HIF_DEVICE_IRQ_SYNC_ONLY == pDev->HifIRQProcessingMode) {
52006 +            /* the HIF layer does not allow async IRQ processing, override the asyncProc flag */
52007 +            asyncProc = FALSE;
52008 +            /* this will cause us to re-enter ProcessPendingIRQ() and re-read interrupt status registers.
52009 +             * this has a nice side effect of blocking us until all async read requests are completed.
52010 +             * This behavior is required on some HIF implementations that do not allow ASYNC
52011 +             * processing in interrupt handlers (like Windows CE) */
52012 +        }
52013 +
52014 +        if (asyncProc) {
52015 +                /* the function performed some async I/O for performance, we
52016 +                   need to exit the ISR immediately, the check below will prevent the interrupt from being
52017 +                   Ack'd while we handle it asynchronously */
52018 +            break;
52019 +        }
52020 +
52021 +    }
52022 +
52023 +    if (A_SUCCESS(status) && !asyncProc) {
52024 +            /* Ack the interrupt only if :
52025 +             *  1. we did not get any errors in processing interrupts
52026 +             *  2. there are no outstanding async processing requests */
52027 +        AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,(" Acking interrupt from DevDsrHandler \n"));
52028 +        HIFAckInterrupt(pDev->HIFDevice);
52029 +    }
52030 +
52031 +    AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,("-DevDsrHandler \n"));
52032 +    return A_OK;
52033 +}
52034 +
52035 +
52036 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.h
52037 ===================================================================
52038 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
52039 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/ar6k.h 2008-12-11 22:46:49.000000000 +0100
52040 @@ -0,0 +1,191 @@
52041 +/*
52042 + *
52043 + * Copyright (c) 2007 Atheros Communications Inc.
52044 + * All rights reserved.
52045 + *
52046 + *
52047 + *  This program is free software; you can redistribute it and/or modify
52048 + *  it under the terms of the GNU General Public License version 2 as
52049 + *  published by the Free Software Foundation;
52050 + *
52051 + *  Software distributed under the License is distributed on an "AS
52052 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
52053 + *  implied. See the License for the specific language governing
52054 + *  rights and limitations under the License.
52055 + *
52056 + *
52057 + *
52058 + */
52059 +
52060 +#ifndef AR6K_H_
52061 +#define AR6K_H_
52062 +
52063 +#define AR6K_MAILBOXES 4
52064 +
52065 +/* HTC runs over mailbox 0 */
52066 +#define HTC_MAILBOX          0
52067 +
52068 +#define AR6K_TARGET_DEBUG_INTR_MASK     0x01
52069 +
52070 +#define OTHER_INTS_ENABLED (INT_STATUS_ENABLE_ERROR_MASK |   \
52071 +                            INT_STATUS_ENABLE_CPU_MASK   |   \
52072 +                            INT_STATUS_ENABLE_COUNTER_MASK)
52073 +
52074 +//#define MBOXHW_UNIT_TEST 1
52075 +
52076 +#include "athstartpack.h"
52077 +typedef PREPACK struct _AR6K_IRQ_PROC_REGISTERS {
52078 +    A_UINT8                      host_int_status;
52079 +    A_UINT8                      cpu_int_status;
52080 +    A_UINT8                      error_int_status;
52081 +    A_UINT8                      counter_int_status;
52082 +    A_UINT8                      mbox_frame;
52083 +    A_UINT8                      rx_lookahead_valid;
52084 +    A_UINT8                      hole[2];
52085 +    A_UINT32                     rx_lookahead[2];
52086 +} POSTPACK AR6K_IRQ_PROC_REGISTERS;
52087 +
52088 +#define AR6K_IRQ_PROC_REGS_SIZE sizeof(AR6K_IRQ_PROC_REGISTERS)
52089 +
52090 +
52091 +
52092 +typedef PREPACK struct _AR6K_IRQ_ENABLE_REGISTERS {
52093 +    A_UINT8                      int_status_enable;
52094 +    A_UINT8                      cpu_int_status_enable;
52095 +    A_UINT8                      error_status_enable;
52096 +    A_UINT8                      counter_int_status_enable;
52097 +} POSTPACK AR6K_IRQ_ENABLE_REGISTERS;
52098 +
52099 +#include "athendpack.h"
52100 +
52101 +#define AR6K_IRQ_ENABLE_REGS_SIZE sizeof(AR6K_IRQ_ENABLE_REGISTERS)
52102 +
52103 +#define AR6K_REG_IO_BUFFER_SIZE     32
52104 +#define AR6K_MAX_REG_IO_BUFFERS     8
52105 +
52106 +/* buffers for ASYNC I/O */
52107 +typedef struct AR6K_ASYNC_REG_IO_BUFFER {
52108 +    HTC_PACKET    HtcPacket;   /* we use an HTC packet as a wrapper for our async register-based I/O */
52109 +    A_UINT8       Buffer[AR6K_REG_IO_BUFFER_SIZE];
52110 +} AR6K_ASYNC_REG_IO_BUFFER;
52111 +
52112 +typedef struct _AR6K_DEVICE {
52113 +    A_MUTEX_T                   Lock;
52114 +    AR6K_IRQ_PROC_REGISTERS     IrqProcRegisters;
52115 +    AR6K_IRQ_ENABLE_REGISTERS   IrqEnableRegisters;
52116 +    void                        *HIFDevice;
52117 +    A_UINT32                    BlockSize;
52118 +    A_UINT32                    BlockMask;
52119 +    A_UINT32                    MailboxAddress;
52120 +    HIF_PENDING_EVENTS_FUNC     GetPendingEventsFunc;
52121 +    void                        *HTCContext;
52122 +    HTC_PACKET_QUEUE            RegisterIOList;
52123 +    AR6K_ASYNC_REG_IO_BUFFER    RegIOBuffers[AR6K_MAX_REG_IO_BUFFERS];
52124 +    void                        (*TargetFailureCallback)(void *Context);
52125 +    A_STATUS                    (*MessagePendingCallback)(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc);
52126 +    HIF_DEVICE_IRQ_PROCESSING_MODE  HifIRQProcessingMode;
52127 +    HIF_MASK_UNMASK_RECV_EVENT      HifMaskUmaskRecvEvent;
52128 +} AR6K_DEVICE;
52129 +
52130 +#define IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(pDev) ((pDev)->HifIRQProcessingMode != HIF_DEVICE_IRQ_SYNC_ONLY)
52131 +
52132 +A_STATUS DevSetup(AR6K_DEVICE *pDev);
52133 +A_STATUS DevUnmaskInterrupts(AR6K_DEVICE *pDev);
52134 +A_STATUS DevMaskInterrupts(AR6K_DEVICE *pDev);
52135 +A_STATUS DevPollMboxMsgRecv(AR6K_DEVICE *pDev,
52136 +                            A_UINT32    *pLookAhead,
52137 +                            int          TimeoutMS);
52138 +A_STATUS DevRWCompletionHandler(void *context, A_STATUS status);
52139 +A_STATUS DevDsrHandler(void *context);
52140 +A_STATUS DevCheckPendingRecvMsgsAsync(void *context);
52141 +void     DevDumpRegisters(AR6K_IRQ_PROC_REGISTERS   *pIrqProcRegs,
52142 +                          AR6K_IRQ_ENABLE_REGISTERS *pIrqEnableRegs);
52143 +
52144 +#define DEV_STOP_RECV_ASYNC TRUE
52145 +#define DEV_STOP_RECV_SYNC  FALSE
52146 +#define DEV_ENABLE_RECV_ASYNC TRUE
52147 +#define DEV_ENABLE_RECV_SYNC  FALSE
52148 +A_STATUS DevStopRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
52149 +A_STATUS DevEnableRecv(AR6K_DEVICE *pDev, A_BOOL ASyncMode);
52150 +
52151 +static INLINE A_STATUS DevSendPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 SendLength) {
52152 +    A_UINT32 paddedLength;
52153 +    A_BOOL   sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
52154 +    A_STATUS status;
52155 +
52156 +       /* adjust the length to be a multiple of block size if appropriate */
52157 +    paddedLength = (SendLength + (pDev->BlockMask)) &
52158 +                    (~(pDev->BlockMask));
52159 +#if 0 // BufferLength may not be set in , fix this...
52160 +    if (paddedLength > pPacket->BufferLength) {
52161 +        AR_DEBUG_ASSERT(FALSE);
52162 +        if (pPacket->Completion != NULL) {
52163 +            COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
52164 +        }
52165 +        return A_EINVAL;
52166 +    }
52167 +#endif
52168 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
52169 +                ("DevSendPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
52170 +                paddedLength,
52171 +                pDev->MailboxAddress,
52172 +                sync ? "SYNC" : "ASYNC"));
52173 +
52174 +    status = HIFReadWrite(pDev->HIFDevice,
52175 +                          pDev->MailboxAddress,
52176 +                          pPacket->pBuffer,
52177 +                          paddedLength,     /* the padded length */
52178 +                          sync ? HIF_WR_SYNC_BLOCK_INC : HIF_WR_ASYNC_BLOCK_INC,
52179 +                          sync ? NULL : pPacket);  /* pass the packet as the context to the HIF request */
52180 +
52181 +    if (sync) {
52182 +        pPacket->Status = status;
52183 +    }
52184 +
52185 +    return status;
52186 +}
52187 +
52188 +static INLINE A_STATUS DevRecvPacket(AR6K_DEVICE *pDev, HTC_PACKET *pPacket, A_UINT32 RecvLength) {
52189 +    A_UINT32 paddedLength;
52190 +    A_STATUS status;
52191 +    A_BOOL   sync = (pPacket->Completion == NULL) ? TRUE : FALSE;
52192 +
52193 +        /* adjust the length to be a multiple of block size if appropriate */
52194 +    paddedLength = (RecvLength + (pDev->BlockMask)) &
52195 +                    (~(pDev->BlockMask));
52196 +    if (paddedLength > pPacket->BufferLength) {
52197 +        AR_DEBUG_ASSERT(FALSE);
52198 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
52199 +                ("DevRecvPacket, Not enough space for padlen:%d recvlen:%d bufferlen:%d \n",
52200 +                    paddedLength,RecvLength,pPacket->BufferLength));
52201 +        if (pPacket->Completion != NULL) {
52202 +            COMPLETE_HTC_PACKET(pPacket,A_EINVAL);
52203 +        }
52204 +        return A_EINVAL;
52205 +    }
52206 +
52207 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
52208 +                ("DevRecvPacket, Padded Length: %d Mbox:0x%X (mode:%s)\n",
52209 +                paddedLength,
52210 +                pDev->MailboxAddress,
52211 +                sync ? "SYNC" : "ASYNC"));
52212 +
52213 +    status = HIFReadWrite(pDev->HIFDevice,
52214 +                          pDev->MailboxAddress,
52215 +                          pPacket->pBuffer,
52216 +                          paddedLength,
52217 +                          sync ? HIF_RD_SYNC_BLOCK_INC : HIF_RD_ASYNC_BLOCK_INC,
52218 +                          sync ? NULL : pPacket);  /* pass the packet as the context to the HIF request */
52219 +
52220 +    if (sync) {
52221 +        pPacket->Status = status;
52222 +    }
52223 +
52224 +    return status;
52225 +}
52226 +
52227 +#ifdef MBOXHW_UNIT_TEST
52228 +A_STATUS DoMboxHWTest(AR6K_DEVICE *pDev);
52229 +#endif
52230 +
52231 +#endif /*AR6K_H_*/
52232 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc.c
52233 ===================================================================
52234 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
52235 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc.c  2008-12-11 22:46:49.000000000 +0100
52236 @@ -0,0 +1,507 @@
52237 +/*
52238 + *
52239 + * Copyright (c) 2007 Atheros Communications Inc.
52240 + * All rights reserved.
52241 + *
52242 + *
52243 + *  This program is free software; you can redistribute it and/or modify
52244 + *  it under the terms of the GNU General Public License version 2 as
52245 + *  published by the Free Software Foundation;
52246 + *
52247 + *  Software distributed under the License is distributed on an "AS
52248 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
52249 + *  implied. See the License for the specific language governing
52250 + *  rights and limitations under the License.
52251 + *
52252 + *
52253 + *
52254 + */
52255 +
52256 +#include "htc_internal.h"
52257 +
52258 +
52259 +static HTC_INIT_INFO  HTCInitInfo = {NULL,NULL,NULL};
52260 +static A_BOOL         HTCInitialized = FALSE;
52261 +
52262 +static A_STATUS HTCTargetInsertedHandler(void *hif_handle);
52263 +static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status);
52264 +static void HTCReportFailure(void *Context);
52265 +
52266 +/* Initializes the HTC layer */
52267 +A_STATUS HTCInit(HTC_INIT_INFO *pInitInfo)
52268 +{
52269 +    HTC_CALLBACKS htcCallbacks;
52270 +
52271 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Enter\n"));
52272 +    if (HTCInitialized) {
52273 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n"));
52274 +        return A_OK;
52275 +    }
52276 +
52277 +    A_MEMCPY(&HTCInitInfo,pInitInfo,sizeof(HTC_INIT_INFO));
52278 +
52279 +    A_MEMZERO(&htcCallbacks, sizeof(HTC_CALLBACKS));
52280 +
52281 +        /* setup HIF layer callbacks */
52282 +    htcCallbacks.deviceInsertedHandler = HTCTargetInsertedHandler;
52283 +    htcCallbacks.deviceRemovedHandler = HTCTargetRemovedHandler;
52284 +        /* the device layer handles these */
52285 +    htcCallbacks.rwCompletionHandler = DevRWCompletionHandler;
52286 +    htcCallbacks.dsrHandler = DevDsrHandler;
52287 +    HIFInit(&htcCallbacks);
52288 +    HTCInitialized = TRUE;
52289 +
52290 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCInit: Exit\n"));
52291 +    return A_OK;
52292 +}
52293 +
52294 +void HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList)
52295 +{
52296 +    LOCK_HTC(target);
52297 +    HTC_PACKET_ENQUEUE(pList,pPacket);
52298 +    UNLOCK_HTC(target);
52299 +}
52300 +
52301 +HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target,  HTC_PACKET_QUEUE *pList)
52302 +{
52303 +    HTC_PACKET *pPacket;
52304 +
52305 +    LOCK_HTC(target);
52306 +    pPacket = HTC_PACKET_DEQUEUE(pList);
52307 +    UNLOCK_HTC(target);
52308 +
52309 +    return pPacket;
52310 +}
52311 +
52312 +/* cleanup the HTC instance */
52313 +static void HTCCleanup(HTC_TARGET *target)
52314 +{
52315 +    if (A_IS_MUTEX_VALID(&target->HTCLock)) {
52316 +        A_MUTEX_DELETE(&target->HTCLock);
52317 +    }
52318 +
52319 +    if (A_IS_MUTEX_VALID(&target->HTCRxLock)) {
52320 +        A_MUTEX_DELETE(&target->HTCRxLock);
52321 +    }
52322 +
52323 +    if (A_IS_MUTEX_VALID(&target->HTCTxLock)) {
52324 +        A_MUTEX_DELETE(&target->HTCTxLock);
52325 +    }
52326 +        /* free our instance */
52327 +    A_FREE(target);
52328 +}
52329 +
52330 +/* registered target arrival callback from the HIF layer */
52331 +static A_STATUS HTCTargetInsertedHandler(void *hif_handle)
52332 +{
52333 +    HTC_TARGET              *target = NULL;
52334 +    A_STATUS                 status;
52335 +    int                      i;
52336 +
52337 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Enter\n"));
52338 +
52339 +    do {
52340 +
52341 +            /* allocate target memory */
52342 +        if ((target = (HTC_TARGET *)A_MALLOC(sizeof(HTC_TARGET))) == NULL) {
52343 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to allocate memory\n"));
52344 +            status = A_ERROR;
52345 +            break;
52346 +        }
52347 +
52348 +        A_MEMZERO(target, sizeof(HTC_TARGET));
52349 +        A_MUTEX_INIT(&target->HTCLock);
52350 +        A_MUTEX_INIT(&target->HTCRxLock);
52351 +        A_MUTEX_INIT(&target->HTCTxLock);
52352 +        INIT_HTC_PACKET_QUEUE(&target->ControlBufferTXFreeList);
52353 +        INIT_HTC_PACKET_QUEUE(&target->ControlBufferRXFreeList);
52354 +
52355 +            /* give device layer the hif device handle */
52356 +        target->Device.HIFDevice = hif_handle;
52357 +            /* give the device layer our context (for event processing)
52358 +             * the device layer will register it's own context with HIF
52359 +             * so we need to set this so we can fetch it in the target remove handler */
52360 +        target->Device.HTCContext = target;
52361 +            /* set device layer target failure callback */
52362 +        target->Device.TargetFailureCallback = HTCReportFailure;
52363 +            /* set device layer recv message pending callback */
52364 +        target->Device.MessagePendingCallback = HTCRecvMessagePendingHandler;
52365 +        target->EpWaitingForBuffers = ENDPOINT_MAX;
52366 +
52367 +            /* setup device layer */
52368 +        status = DevSetup(&target->Device);
52369 +
52370 +        if (A_FAILED(status)) {
52371 +            break;
52372 +        }
52373 +
52374 +            /* carve up buffers/packets for control messages */
52375 +        for (i = 0; i < NUM_CONTROL_RX_BUFFERS; i++) {
52376 +            HTC_PACKET *pControlPacket;
52377 +            pControlPacket = &target->HTCControlBuffers[i].HtcPacket;
52378 +            SET_HTC_PACKET_INFO_RX_REFILL(pControlPacket,
52379 +                                          target,
52380 +                                          target->HTCControlBuffers[i].Buffer,
52381 +                                          HTC_CONTROL_BUFFER_SIZE,
52382 +                                          ENDPOINT_0);
52383 +            HTC_FREE_CONTROL_RX(target,pControlPacket);
52384 +        }
52385 +
52386 +        for (;i < NUM_CONTROL_BUFFERS;i++) {
52387 +             HTC_PACKET *pControlPacket;
52388 +             pControlPacket = &target->HTCControlBuffers[i].HtcPacket;
52389 +             INIT_HTC_PACKET_INFO(pControlPacket,
52390 +                                  target->HTCControlBuffers[i].Buffer,
52391 +                                  HTC_CONTROL_BUFFER_SIZE);
52392 +             HTC_FREE_CONTROL_TX(target,pControlPacket);
52393 +        }
52394 +
52395 +    } while (FALSE);
52396 +
52397 +    if (A_SUCCESS(status)) {
52398 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" calling AddInstance callback \n"));
52399 +            /* announce ourselves */
52400 +        HTCInitInfo.AddInstance((HTC_HANDLE)target);
52401 +    } else {
52402 +        if (target != NULL) {
52403 +            HTCCleanup(target);
52404 +        }
52405 +    }
52406 +
52407 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("htcTargetInserted - Exit\n"));
52408 +
52409 +    return status;
52410 +}
52411 +
52412 +/* registered removal callback from the HIF layer */
52413 +static A_STATUS HTCTargetRemovedHandler(void *handle, A_STATUS status)
52414 +{
52415 +    HTC_TARGET *target;
52416 +
52417 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCTargetRemovedHandler handle:0x%X \n",(A_UINT32)handle));
52418 +
52419 +    if (NULL == handle) {
52420 +            /* this could be NULL in the event that target initialization failed */
52421 +        return A_OK;
52422 +    }
52423 +
52424 +    target = ((AR6K_DEVICE *)handle)->HTCContext;
52425 +
52426 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("   removing target:0x%X instance:0x%X ... \n",
52427 +            (A_UINT32)target, (A_UINT32)target->pInstanceContext));
52428 +
52429 +    if (target->pInstanceContext != NULL) {
52430 +            /* let upper layer know, it needs to call HTCStop() */
52431 +        HTCInitInfo.DeleteInstance(target->pInstanceContext);
52432 +    }
52433 +
52434 +    HIFShutDownDevice(target->Device.HIFDevice);
52435 +
52436 +    HTCCleanup(target);
52437 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCTargetRemovedHandler \n"));
52438 +    return A_OK;
52439 +}
52440 +
52441 +/* get the low level HIF device for the caller , the caller may wish to do low level
52442 + * HIF requests */
52443 +void *HTCGetHifDevice(HTC_HANDLE HTCHandle)
52444 +{
52445 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52446 +    return target->Device.HIFDevice;
52447 +}
52448 +
52449 +/* set the instance block for this HTC handle, so that on removal, the blob can be
52450 + * returned to the caller */
52451 +void HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance)
52452 +{
52453 +    HTC_TARGET  *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52454 +
52455 +    target->pInstanceContext = Instance;
52456 +}
52457 +
52458 +/* wait for the target to arrive (sends HTC Ready message)
52459 + * this operation is fully synchronous and the message is polled for */
52460 +A_STATUS HTCWaitTarget(HTC_HANDLE HTCHandle)
52461 +{
52462 +    HTC_TARGET              *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52463 +    A_STATUS                 status;
52464 +    HTC_PACKET              *pPacket = NULL;
52465 +    HTC_READY_MSG           *pRdyMsg;
52466 +    HTC_SERVICE_CONNECT_REQ  connect;
52467 +    HTC_SERVICE_CONNECT_RESP resp;
52468 +
52469 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Enter (target:0x%X) \n", (A_UINT32)target));
52470 +
52471 +    do {
52472 +
52473 +#ifdef MBOXHW_UNIT_TEST
52474 +
52475 +        status = DoMboxHWTest(&target->Device);
52476 +
52477 +        if (status != A_OK) {
52478 +            break;
52479 +        }
52480 +
52481 +#endif
52482 +
52483 +            /* we should be getting 1 control message that the target is ready */
52484 +        status = HTCWaitforControlMessage(target, &pPacket);
52485 +
52486 +        if (A_FAILED(status)) {
52487 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" Target Not Available!!\n"));
52488 +            break;
52489 +        }
52490 +
52491 +            /* we controlled the buffer creation so it has to be properly aligned */
52492 +        pRdyMsg = (HTC_READY_MSG *)pPacket->pBuffer;
52493 +
52494 +        if ((pRdyMsg->MessageID != HTC_MSG_READY_ID) ||
52495 +            (pPacket->ActualLength < sizeof(HTC_READY_MSG))) {
52496 +                /* this message is not valid */
52497 +            AR_DEBUG_ASSERT(FALSE);
52498 +            status = A_EPROTO;
52499 +            break;
52500 +        }
52501 +
52502 +        if (pRdyMsg->CreditCount == 0 || pRdyMsg->CreditSize == 0) {
52503 +              /* this message is not valid */
52504 +            AR_DEBUG_ASSERT(FALSE);
52505 +            status = A_EPROTO;
52506 +            break;
52507 +        }
52508 +
52509 +        target->TargetCredits = pRdyMsg->CreditCount;
52510 +        target->TargetCreditSize = pRdyMsg->CreditSize;
52511 +
52512 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC, (" Target Ready: credits: %d credit size: %d\n",
52513 +                target->TargetCredits, target->TargetCreditSize));
52514 +
52515 +            /* setup our pseudo HTC control endpoint connection */
52516 +        A_MEMZERO(&connect,sizeof(connect));
52517 +        A_MEMZERO(&resp,sizeof(resp));
52518 +        connect.EpCallbacks.pContext = target;
52519 +        connect.EpCallbacks.EpTxComplete = HTCControlTxComplete;
52520 +        connect.EpCallbacks.EpRecv = HTCControlRecv;
52521 +        connect.EpCallbacks.EpRecvRefill = NULL;  /* not needed */
52522 +        connect.EpCallbacks.EpSendFull = NULL;    /* not nedded */
52523 +        connect.MaxSendQueueDepth = NUM_CONTROL_BUFFERS;
52524 +        connect.ServiceID = HTC_CTRL_RSVD_SVC;
52525 +
52526 +            /* connect fake service */
52527 +        status = HTCConnectService((HTC_HANDLE)target,
52528 +                                   &connect,
52529 +                                   &resp);
52530 +
52531 +        if (!A_FAILED(status)) {
52532 +            break;
52533 +        }
52534 +
52535 +    } while (FALSE);
52536 +
52537 +    if (pPacket != NULL) {
52538 +        HTC_FREE_CONTROL_RX(target,pPacket);
52539 +    }
52540 +
52541 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCWaitTarget - Exit\n"));
52542 +
52543 +    return status;
52544 +}
52545 +
52546 +
52547 +
52548 +/* Start HTC, enable interrupts and let the target know host has finished setup */
52549 +A_STATUS HTCStart(HTC_HANDLE HTCHandle)
52550 +{
52551 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52552 +    HTC_PACKET *pPacket;
52553 +    A_STATUS   status;
52554 +
52555 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Enter\n"));
52556 +
52557 +        /* now that we are starting, push control receive buffers into the
52558 +         * HTC control endpoint */
52559 +
52560 +    while (1) {
52561 +        pPacket = HTC_ALLOC_CONTROL_RX(target);
52562 +        if (NULL == pPacket) {
52563 +            break;
52564 +        }
52565 +        HTCAddReceivePkt((HTC_HANDLE)target,pPacket);
52566 +    }
52567 +
52568 +    do {
52569 +
52570 +        AR_DEBUG_ASSERT(target->InitCredits != NULL);
52571 +        AR_DEBUG_ASSERT(target->EpCreditDistributionListHead != NULL);
52572 +        AR_DEBUG_ASSERT(target->EpCreditDistributionListHead->pNext != NULL);
52573 +
52574 +            /* call init credits callback to do the distribution ,
52575 +             * NOTE: the first entry in the distribution list is ENDPOINT_0, so
52576 +             * we pass the start of the list after this one. */
52577 +        target->InitCredits(target->pCredDistContext,
52578 +                            target->EpCreditDistributionListHead->pNext,
52579 +                            target->TargetCredits);
52580 +
52581 +        if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_TRC)) {
52582 +            DumpCreditDistStates(target);
52583 +        }
52584 +
52585 +            /* the caller is done connecting to services, so we can indicate to the
52586 +            * target that the setup phase is complete */
52587 +        status = HTCSendSetupComplete(target);
52588 +
52589 +        if (A_FAILED(status)) {
52590 +            break;
52591 +        }
52592 +
52593 +            /* unmask interrupts */
52594 +        status = DevUnmaskInterrupts(&target->Device);
52595 +
52596 +        if (A_FAILED(status)) {
52597 +            HTCStop(target);
52598 +        }
52599 +
52600 +    } while (FALSE);
52601 +
52602 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HTCStart Exit\n"));
52603 +    return status;
52604 +}
52605 +
52606 +
52607 +/* stop HTC communications, i.e. stop interrupt reception, and flush all queued buffers */
52608 +void HTCStop(HTC_HANDLE HTCHandle)
52609 +{
52610 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52611 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCStop \n"));
52612 +
52613 +        /* mark that we are shutting down .. */
52614 +    target->HTCStateFlags |= HTC_STATE_STOPPING;
52615 +
52616 +        /* Masking interrupts is a synchronous operation, when this function returns
52617 +         * all pending HIF I/O has completed, we can safely flush the queues */
52618 +    DevMaskInterrupts(&target->Device);
52619 +
52620 +        /* flush all send packets */
52621 +    HTCFlushSendPkts(target);
52622 +        /* flush all recv buffers */
52623 +    HTCFlushRecvBuffers(target);
52624 +
52625 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCStop \n"));
52626 +}
52627 +
52628 +/* undo what was done in HTCInit() */
52629 +void HTCShutDown(void)
52630 +{
52631 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCShutDown: \n"));
52632 +    HTCInitialized = FALSE;
52633 +        /* undo HTCInit */
52634 +    HIFShutDownDevice(NULL);
52635 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCShutDown: \n"));
52636 +}
52637 +
52638 +void HTCDumpCreditStates(HTC_HANDLE HTCHandle)
52639 +{
52640 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52641 +
52642 +    LOCK_HTC_TX(target);
52643 +
52644 +    DumpCreditDistStates(target);
52645 +
52646 +    UNLOCK_HTC_TX(target);
52647 +}
52648 +
52649 +/* report a target failure from the device, this is a callback from the device layer
52650 + * which uses a mechanism to report errors from the target (i.e. special interrupts) */
52651 +static void HTCReportFailure(void *Context)
52652 +{
52653 +    HTC_TARGET *target = (HTC_TARGET *)Context;
52654 +
52655 +    target->TargetFailure = TRUE;
52656 +
52657 +    if ((target->pInstanceContext != NULL) && (HTCInitInfo.TargetFailure != NULL)) {
52658 +            /* let upper layer know, it needs to call HTCStop() */
52659 +        HTCInitInfo.TargetFailure(target->pInstanceContext, A_ERROR);
52660 +    }
52661 +}
52662 +
52663 +void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription)
52664 +{
52665 +    A_CHAR stream[60];
52666 +    A_UINT32 i;
52667 +    A_UINT16 offset, count;
52668 +
52669 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<---------Dumping %d Bytes : %s ------>\n", length, pDescription));
52670 +
52671 +    count = 0;
52672 +    offset = 0;
52673 +    for(i = 0; i < length; i++) {
52674 +        sprintf(stream + offset, "%2.2X ", buffer[i]);
52675 +        count ++;
52676 +        offset += 3;
52677 +
52678 +        if(count == 16) {
52679 +            count = 0;
52680 +            offset = 0;
52681 +            AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream));
52682 +            A_MEMZERO(stream, 60);
52683 +        }
52684 +    }
52685 +
52686 +    if(offset != 0) {
52687 +        AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("[H]: %s\n", stream));
52688 +    }
52689 +
52690 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("<------------------------------------------------->\n"));
52691 +}
52692 +
52693 +A_BOOL HTCGetEndpointStatistics(HTC_HANDLE               HTCHandle,
52694 +                                HTC_ENDPOINT_ID          Endpoint,
52695 +                                HTC_ENDPOINT_STAT_ACTION Action,
52696 +                                HTC_ENDPOINT_STATS       *pStats)
52697 +{
52698 +
52699 +#ifdef HTC_EP_STAT_PROFILING
52700 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
52701 +    A_BOOL     clearStats = FALSE;
52702 +    A_BOOL     sample = FALSE;
52703 +
52704 +    switch (Action) {
52705 +        case HTC_EP_STAT_SAMPLE :
52706 +            sample = TRUE;
52707 +            break;
52708 +        case HTC_EP_STAT_SAMPLE_AND_CLEAR :
52709 +            sample = TRUE;
52710 +            clearStats = TRUE;
52711 +            break;
52712 +        case HTC_EP_STAT_CLEAR :
52713 +            clearStats = TRUE;
52714 +            break;
52715 +        default:
52716 +            break;
52717 +    }
52718 +
52719 +    A_ASSERT(Endpoint < ENDPOINT_MAX);
52720 +
52721 +        /* lock out TX and RX while we sample and/or clear */
52722 +    LOCK_HTC_TX(target);
52723 +    LOCK_HTC_RX(target);
52724 +
52725 +    if (sample) {
52726 +        A_ASSERT(pStats != NULL);
52727 +            /* return the stats to the caller */
52728 +        A_MEMCPY(pStats, &target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS));
52729 +    }
52730 +
52731 +    if (clearStats) {
52732 +            /* reset stats */
52733 +        A_MEMZERO(&target->EndPoint[Endpoint].EndPointStats, sizeof(HTC_ENDPOINT_STATS));
52734 +    }
52735 +
52736 +    UNLOCK_HTC_RX(target);
52737 +    UNLOCK_HTC_TX(target);
52738 +
52739 +    return TRUE;
52740 +#else
52741 +    return FALSE;
52742 +#endif
52743 +}
52744 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h
52745 ===================================================================
52746 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
52747 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_debug.h    2008-12-11 22:46:49.000000000 +0100
52748 @@ -0,0 +1,65 @@
52749 +#ifndef HTC_DEBUG_H_
52750 +#define HTC_DEBUG_H_
52751 +/*
52752 + *
52753 + * Copyright (c) 2004-2007 Atheros Communications Inc.
52754 + * All rights reserved.
52755 + *
52756 + *
52757 + *  This program is free software; you can redistribute it and/or modify
52758 + *  it under the terms of the GNU General Public License version 2 as
52759 + *  published by the Free Software Foundation;
52760 + *
52761 + *  Software distributed under the License is distributed on an "AS
52762 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
52763 + *  implied. See the License for the specific language governing
52764 + *  rights and limitations under the License.
52765 + *
52766 + *
52767 + *
52768 + */
52769 +
52770 +/* ------- Debug related stuff ------- */
52771 +enum {
52772 +    ATH_DEBUG_SEND = 0x0001,
52773 +    ATH_DEBUG_RECV = 0x0002,
52774 +    ATH_DEBUG_SYNC = 0x0004,
52775 +    ATH_DEBUG_DUMP = 0x0008,
52776 +    ATH_DEBUG_IRQ  = 0x0010,
52777 +    ATH_DEBUG_TRC  = 0x0020,
52778 +    ATH_DEBUG_WARN = 0x0040,
52779 +    ATH_DEBUG_ERR  = 0x0080,
52780 +    ATH_DEBUG_ANY  = 0xFFFF,
52781 +};
52782 +
52783 +#ifdef DEBUG
52784 +
52785 +// TODO FIX usage of A_PRINTF!
52786 +#define AR_DEBUG_LVL_CHECK(lvl) (debughtc & (lvl))
52787 +#define AR_DEBUG_PRINTBUF(buffer, length, desc) do {   \
52788 +    if (debughtc & ATH_DEBUG_DUMP) {             \
52789 +        DebugDumpBytes(buffer, length,desc);               \
52790 +    }                                            \
52791 +} while(0)
52792 +#define PRINTX_ARG(arg...) arg
52793 +#define AR_DEBUG_PRINTF(flags, args) do {        \
52794 +    if (debughtc & (flags)) {                    \
52795 +        A_PRINTF(KERN_ALERT PRINTX_ARG args);    \
52796 +    }                                            \
52797 +} while (0)
52798 +#define AR_DEBUG_ASSERT(test) do {               \
52799 +    if (!(test)) {                               \
52800 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test));         \
52801 +    }                                            \
52802 +} while(0)
52803 +extern int debughtc;
52804 +#else
52805 +#define AR_DEBUG_PRINTF(flags, args)
52806 +#define AR_DEBUG_PRINTBUF(buffer, length, desc)
52807 +#define AR_DEBUG_ASSERT(test)
52808 +#define AR_DEBUG_LVL_CHECK(lvl) 0
52809 +#endif
52810 +
52811 +void DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription);
52812 +
52813 +#endif /*HTC_DEBUG_H_*/
52814 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h
52815 ===================================================================
52816 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
52817 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_internal.h 2008-12-11 22:46:49.000000000 +0100
52818 @@ -0,0 +1,168 @@
52819 +/*
52820 + *
52821 + * Copyright (c) 2007 Atheros Communications Inc.
52822 + * All rights reserved.
52823 + *
52824 + *
52825 + *  This program is free software; you can redistribute it and/or modify
52826 + *  it under the terms of the GNU General Public License version 2 as
52827 + *  published by the Free Software Foundation;
52828 + *
52829 + *  Software distributed under the License is distributed on an "AS
52830 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
52831 + *  implied. See the License for the specific language governing
52832 + *  rights and limitations under the License.
52833 + *
52834 + *
52835 + *
52836 + */
52837 +
52838 +#ifndef _HTC_INTERNAL_H_
52839 +#define _HTC_INTERNAL_H_
52840 +
52841 +/* for debugging, uncomment this to capture the last frame header, on frame header
52842 + * processing errors, the last frame header is dump for comparison */
52843 +//#define HTC_CAPTURE_LAST_FRAME
52844 +
52845 +//#define HTC_EP_STAT_PROFILING
52846 +
52847 +#ifdef __cplusplus
52848 +extern "C" {
52849 +#endif /* __cplusplus */
52850 +
52851 +/* Header files */
52852 +#include "a_config.h"
52853 +#include "athdefs.h"
52854 +#include "a_types.h"
52855 +#include "a_osapi.h"
52856 +#include "a_debug.h"
52857 +#include "htc.h"
52858 +#include "htc_api.h"
52859 +#include "bmi_msg.h"
52860 +#include "hif.h"
52861 +#include "ar6k.h"
52862 +
52863 +/* HTC operational parameters */
52864 +#define HTC_TARGET_RESPONSE_TIMEOUT        2000 /* in ms */
52865 +#define HTC_TARGET_DEBUG_INTR_MASK         0x01
52866 +#define HTC_TARGET_CREDIT_INTR_MASK        0xF0
52867 +
52868 +typedef struct _HTC_ENDPOINT {
52869 +    HTC_SERVICE_ID              ServiceID;      /* service ID this endpoint is bound to
52870 +                                                   non-zero value means this endpoint is in use */
52871 +    HTC_PACKET_QUEUE            TxQueue;        /* HTC frame buffer TX queue */
52872 +    HTC_PACKET_QUEUE            RxBuffers;      /* HTC frame buffer RX list */
52873 +    HTC_ENDPOINT_CREDIT_DIST    CreditDist;     /* credit distribution structure (exposed to driver layer) */
52874 +    HTC_EP_CALLBACKS            EpCallBacks;    /* callbacks associated with this endpoint */
52875 +    int                         MaxTxQueueDepth;   /* max depth of the TX queue before we need to
52876 +                                                      call driver's full handler */
52877 +    int                         CurrentTxQueueDepth; /* current TX queue depth */
52878 +    int                         MaxMsgLength;        /* max length of endpoint message */
52879 +#ifdef HTC_EP_STAT_PROFILING
52880 +    HTC_ENDPOINT_STATS          EndPointStats;  /* endpoint statistics */
52881 +#endif
52882 +} HTC_ENDPOINT;
52883 +
52884 +#ifdef HTC_EP_STAT_PROFILING
52885 +#define INC_HTC_EP_STAT(p,stat,count) (p)->EndPointStats.stat += (count);
52886 +#else
52887 +#define INC_HTC_EP_STAT(p,stat,count)
52888 +#endif
52889 +
52890 +#define HTC_SERVICE_TX_PACKET_TAG  HTC_TX_PACKET_TAG_INTERNAL
52891 +
52892 +#define NUM_CONTROL_BUFFERS     8
52893 +#define NUM_CONTROL_TX_BUFFERS  2
52894 +#define NUM_CONTROL_RX_BUFFERS  (NUM_CONTROL_BUFFERS - NUM_CONTROL_TX_BUFFERS)
52895 +
52896 +#define HTC_CONTROL_BUFFER_SIZE (HTC_MAX_CONTROL_MESSAGE_LENGTH + HTC_HDR_LENGTH)
52897 +
52898 +typedef struct HTC_CONTROL_BUFFER {
52899 +    HTC_PACKET    HtcPacket;
52900 +    A_UINT8       Buffer[HTC_CONTROL_BUFFER_SIZE];
52901 +} HTC_CONTROL_BUFFER;
52902 +
52903 +/* our HTC target state */
52904 +typedef struct _HTC_TARGET {
52905 +    HTC_ENDPOINT                EndPoint[ENDPOINT_MAX];
52906 +    HTC_CONTROL_BUFFER          HTCControlBuffers[NUM_CONTROL_BUFFERS];
52907 +    HTC_ENDPOINT_CREDIT_DIST   *EpCreditDistributionListHead;
52908 +    HTC_PACKET_QUEUE            ControlBufferTXFreeList;
52909 +    HTC_PACKET_QUEUE            ControlBufferRXFreeList;
52910 +    HTC_CREDIT_DIST_CALLBACK    DistributeCredits;
52911 +    HTC_CREDIT_INIT_CALLBACK    InitCredits;
52912 +    void                       *pCredDistContext;
52913 +    int                         TargetCredits;
52914 +    int                         TargetCreditSize;
52915 +    A_MUTEX_T                   HTCLock;
52916 +    A_MUTEX_T                   HTCRxLock;
52917 +    A_MUTEX_T                   HTCTxLock;
52918 +    AR6K_DEVICE                 Device;         /* AR6K - specific state */
52919 +    A_UINT32                    HTCStateFlags;
52920 +    HTC_ENDPOINT_ID             EpWaitingForBuffers;
52921 +    A_BOOL                      TargetFailure;
52922 +    void                       *pInstanceContext;
52923 +#define HTC_STATE_WAIT_BUFFERS  (1 << 0)
52924 +#define HTC_STATE_STOPPING      (1 << 1)
52925 +#ifdef HTC_CAPTURE_LAST_FRAME
52926 +    HTC_FRAME_HDR               LastFrameHdr;  /* useful for debugging */
52927 +    A_UINT8                     LastTrailer[256];
52928 +    A_UINT8                     LastTrailerLength;
52929 +#endif
52930 +} HTC_TARGET;
52931 +
52932 +#define HTC_STOPPING(t) ((t)->HTCStateFlags & HTC_STATE_STOPPING)
52933 +#define LOCK_HTC(t)      A_MUTEX_LOCK(&(t)->HTCLock);
52934 +#define UNLOCK_HTC(t)    A_MUTEX_UNLOCK(&(t)->HTCLock);
52935 +#define LOCK_HTC_RX(t)   A_MUTEX_LOCK(&(t)->HTCRxLock);
52936 +#define UNLOCK_HTC_RX(t) A_MUTEX_UNLOCK(&(t)->HTCRxLock);
52937 +#define LOCK_HTC_TX(t)   A_MUTEX_LOCK(&(t)->HTCTxLock);
52938 +#define UNLOCK_HTC_TX(t) A_MUTEX_UNLOCK(&(t)->HTCTxLock);
52939 +
52940 +#define GET_HTC_TARGET_FROM_HANDLE(hnd) ((HTC_TARGET *)(hnd))
52941 +#define HTC_RECYCLE_RX_PKT(target,p)                \
52942 +{                                                   \
52943 +    HTC_PACKET_RESET_RX(pPacket);                   \
52944 +    HTCAddReceivePkt((HTC_HANDLE)(target),(p));     \
52945 +}
52946 +
52947 +/* internal HTC functions */
52948 +void        HTCControlTxComplete(void *Context, HTC_PACKET *pPacket);
52949 +void        HTCControlRecv(void *Context, HTC_PACKET *pPacket);
52950 +A_STATUS    HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket);
52951 +HTC_PACKET *HTCAllocControlBuffer(HTC_TARGET *target, HTC_PACKET_QUEUE *pList);
52952 +void        HTCFreeControlBuffer(HTC_TARGET *target, HTC_PACKET *pPacket, HTC_PACKET_QUEUE *pList);
52953 +A_STATUS    HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 Flags);
52954 +A_STATUS    HTCIssueRecv(HTC_TARGET *target, HTC_PACKET *pPacket);
52955 +void        HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket);
52956 +A_STATUS    HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc);
52957 +void        HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint);
52958 +A_STATUS    HTCSendSetupComplete(HTC_TARGET *target);
52959 +void        HTCFlushRecvBuffers(HTC_TARGET *target);
52960 +void        HTCFlushSendPkts(HTC_TARGET *target);
52961 +void        DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist);
52962 +void        DumpCreditDistStates(HTC_TARGET *target);
52963 +void           DebugDumpBytes(A_UCHAR *buffer, A_UINT16 length, char *pDescription);
52964 +
52965 +static INLINE HTC_PACKET *HTC_ALLOC_CONTROL_TX(HTC_TARGET *target) {
52966 +    HTC_PACKET *pPacket = HTCAllocControlBuffer(target,&target->ControlBufferTXFreeList);
52967 +    if (pPacket != NULL) {
52968 +            /* set payload pointer area with some headroom */
52969 +        pPacket->pBuffer = pPacket->pBufferStart + HTC_HDR_LENGTH;
52970 +    }
52971 +    return pPacket;
52972 +}
52973 +
52974 +#define HTC_FREE_CONTROL_TX(t,p) HTCFreeControlBuffer((t),(p),&(t)->ControlBufferTXFreeList)
52975 +#define HTC_ALLOC_CONTROL_RX(t)  HTCAllocControlBuffer((t),&(t)->ControlBufferRXFreeList)
52976 +#define HTC_FREE_CONTROL_RX(t,p) \
52977 +{                                                                \
52978 +    HTC_PACKET_RESET_RX(p);                                      \
52979 +    HTCFreeControlBuffer((t),(p),&(t)->ControlBufferRXFreeList); \
52980 +}
52981 +
52982 +#ifdef __cplusplus
52983 +}
52984 +#endif
52985 +
52986 +#endif /* _HTC_INTERNAL_H_ */
52987 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c
52988 ===================================================================
52989 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
52990 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_recv.c     2008-12-11 22:46:49.000000000 +0100
52991 @@ -0,0 +1,703 @@
52992 +/*
52993 + *
52994 + * Copyright (c) 2007 Atheros Communications Inc.
52995 + * All rights reserved.
52996 + *
52997 + *
52998 + *  This program is free software; you can redistribute it and/or modify
52999 + *  it under the terms of the GNU General Public License version 2 as
53000 + *  published by the Free Software Foundation;
53001 + *
53002 + *  Software distributed under the License is distributed on an "AS
53003 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
53004 + *  implied. See the License for the specific language governing
53005 + *  rights and limitations under the License.
53006 + *
53007 + *
53008 + *
53009 + */
53010 +
53011 +#include "htc_internal.h"
53012 +
53013 +#define HTCIssueRecv(t, p) \
53014 +    DevRecvPacket(&(t)->Device,  \
53015 +                  (p),          \
53016 +                  (p)->ActualLength)
53017 +
53018 +#define DO_RCV_COMPLETION(t,p,e)            \
53019 +{                                           \
53020 +    if ((p)->ActualLength > 0) {            \
53021 +        AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" completing packet 0x%X (%d bytes) on ep : %d \n", \
53022 +            (A_UINT32)(p), (p)->ActualLength, (p)->Endpoint));  \
53023 +        (e)->EpCallBacks.EpRecv((e)->EpCallBacks.pContext,      \
53024 +                                (p));                           \
53025 +    } else {                                                    \
53026 +        AR_DEBUG_PRINTF(ATH_DEBUG_RECV, (" recycling empty packet \n"));  \
53027 +        HTC_RECYCLE_RX_PKT((t), (p));                           \
53028 +    }                                                           \
53029 +}
53030 +
53031 +#ifdef HTC_EP_STAT_PROFILING
53032 +#define HTC_RX_STAT_PROFILE(t,ep,lookAhead)            \
53033 +{                                                      \
53034 +    LOCK_HTC_RX((t));                                  \
53035 +    INC_HTC_EP_STAT((ep), RxReceived, 1);              \
53036 +    if ((lookAhead) != 0) {                            \
53037 +        INC_HTC_EP_STAT((ep), RxLookAheads, 1);        \
53038 +    }                                                  \
53039 +    UNLOCK_HTC_RX((t));                                \
53040 +}
53041 +#else
53042 +#define HTC_RX_STAT_PROFILE(t,ep,lookAhead)
53043 +#endif
53044 +
53045 +static INLINE A_STATUS HTCProcessTrailer(HTC_TARGET *target,
53046 +                                         A_UINT8    *pBuffer,
53047 +                                         int         Length,
53048 +                                         A_UINT32   *pNextLookAhead,
53049 +                                         HTC_ENDPOINT_ID FromEndpoint)
53050 +{
53051 +    HTC_RECORD_HDR          *pRecord;
53052 +    A_UINT8                 *pRecordBuf;
53053 +    HTC_LOOKAHEAD_REPORT    *pLookAhead;
53054 +    A_UINT8                 *pOrigBuffer;
53055 +    int                     origLength;
53056 +    A_STATUS                status;
53057 +
53058 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessTrailer (length:%d) \n", Length));
53059 +
53060 +    if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
53061 +        AR_DEBUG_PRINTBUF(pBuffer,Length,"Recv Trailer");
53062 +    }
53063 +
53064 +    pOrigBuffer = pBuffer;
53065 +    origLength = Length;
53066 +    status = A_OK;
53067 +
53068 +    while (Length > 0) {
53069 +
53070 +        if (Length < sizeof(HTC_RECORD_HDR)) {
53071 +            status = A_EPROTO;
53072 +            break;
53073 +        }
53074 +            /* these are byte aligned structs */
53075 +        pRecord = (HTC_RECORD_HDR *)pBuffer;
53076 +        Length -= sizeof(HTC_RECORD_HDR);
53077 +        pBuffer += sizeof(HTC_RECORD_HDR);
53078 +
53079 +        if (pRecord->Length > Length) {
53080 +                /* no room left in buffer for record */
53081 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53082 +                (" invalid record length: %d (id:%d) buffer has: %d bytes left \n",
53083 +                        pRecord->Length, pRecord->RecordID, Length));
53084 +            status = A_EPROTO;
53085 +            break;
53086 +        }
53087 +            /* start of record follows the header */
53088 +        pRecordBuf = pBuffer;
53089 +
53090 +        switch (pRecord->RecordID) {
53091 +            case HTC_RECORD_CREDITS:
53092 +                AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_CREDIT_REPORT));
53093 +                HTCProcessCreditRpt(target,
53094 +                                    (HTC_CREDIT_REPORT *)pRecordBuf,
53095 +                                    pRecord->Length / (sizeof(HTC_CREDIT_REPORT)),
53096 +                                    FromEndpoint);
53097 +                break;
53098 +            case HTC_RECORD_LOOKAHEAD:
53099 +                AR_DEBUG_ASSERT(pRecord->Length >= sizeof(HTC_LOOKAHEAD_REPORT));
53100 +                pLookAhead = (HTC_LOOKAHEAD_REPORT *)pRecordBuf;
53101 +                if ((pLookAhead->PreValid == ((~pLookAhead->PostValid) & 0xFF)) &&
53102 +                    (pNextLookAhead != NULL)) {
53103 +
53104 +                    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
53105 +                                (" LookAhead Report Found (pre valid:0x%X, post valid:0x%X) \n",
53106 +                                pLookAhead->PreValid,
53107 +                                pLookAhead->PostValid));
53108 +
53109 +                        /* look ahead bytes are valid, copy them over */
53110 +                    ((A_UINT8 *)pNextLookAhead)[0] = pLookAhead->LookAhead[0];
53111 +                    ((A_UINT8 *)pNextLookAhead)[1] = pLookAhead->LookAhead[1];
53112 +                    ((A_UINT8 *)pNextLookAhead)[2] = pLookAhead->LookAhead[2];
53113 +                    ((A_UINT8 *)pNextLookAhead)[3] = pLookAhead->LookAhead[3];
53114 +
53115 +                    if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
53116 +                        DebugDumpBytes((A_UINT8 *)pNextLookAhead,4,"Next Look Ahead");
53117 +                    }
53118 +                }
53119 +                break;
53120 +            default:
53121 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR, (" unhandled record: id:%d length:%d \n",
53122 +                        pRecord->RecordID, pRecord->Length));
53123 +                break;
53124 +        }
53125 +
53126 +        if (A_FAILED(status)) {
53127 +            break;
53128 +        }
53129 +
53130 +            /* advance buffer past this record for next time around */
53131 +        pBuffer += pRecord->Length;
53132 +        Length -= pRecord->Length;
53133 +    }
53134 +
53135 +    if (A_FAILED(status)) {
53136 +        DebugDumpBytes(pOrigBuffer,origLength,"BAD Recv Trailer");
53137 +    }
53138 +
53139 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessTrailer \n"));
53140 +    return status;
53141 +
53142 +}
53143 +
53144 +/* process a received message (i.e. strip off header, process any trailer data)
53145 + * note : locks must be released when this function is called */
53146 +static A_STATUS HTCProcessRecvHeader(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT32 *pNextLookAhead)
53147 +{
53148 +    A_UINT8   temp;
53149 +    A_UINT8   *pBuf;
53150 +    A_STATUS  status = A_OK;
53151 +    A_UINT16  payloadLen;
53152 +    A_UINT32  lookAhead;
53153 +
53154 +    pBuf = pPacket->pBuffer;
53155 +
53156 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCProcessRecvHeader \n"));
53157 +
53158 +    if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
53159 +        AR_DEBUG_PRINTBUF(pBuf,pPacket->ActualLength,"HTC Recv PKT");
53160 +    }
53161 +
53162 +    do {
53163 +        /* note, we cannot assume the alignment of pBuffer, so we use the safe macros to
53164 +         * retrieve 16 bit fields */
53165 +        payloadLen = A_GET_UINT16_FIELD(pBuf, HTC_FRAME_HDR, PayloadLen);
53166 +
53167 +        ((A_UINT8 *)&lookAhead)[0] = pBuf[0];
53168 +        ((A_UINT8 *)&lookAhead)[1] = pBuf[1];
53169 +        ((A_UINT8 *)&lookAhead)[2] = pBuf[2];
53170 +        ((A_UINT8 *)&lookAhead)[3] = pBuf[3];
53171 +
53172 +        if (lookAhead != pPacket->HTCReserved) {
53173 +            /* somehow the lookahead that gave us the full read length did not
53174 +             * reflect the actual header in the pending message */
53175 +             AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53176 +                    ("HTCProcessRecvHeader, lookahead mismatch! \n"));
53177 +             DebugDumpBytes((A_UINT8 *)&pPacket->HTCReserved,4,"Expected Message LookAhead");
53178 +             DebugDumpBytes(pBuf,sizeof(HTC_FRAME_HDR),"Current Frame Header");
53179 +#ifdef HTC_CAPTURE_LAST_FRAME
53180 +            DebugDumpBytes((A_UINT8 *)&target->LastFrameHdr,sizeof(HTC_FRAME_HDR),"Last Frame Header");
53181 +            if (target->LastTrailerLength != 0) {
53182 +                DebugDumpBytes(target->LastTrailer,
53183 +                               target->LastTrailerLength,
53184 +                               "Last trailer");
53185 +            }
53186 +#endif
53187 +            status = A_EPROTO;
53188 +            break;
53189 +        }
53190 +
53191 +            /* get flags */
53192 +        temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, Flags);
53193 +
53194 +        if (temp & HTC_FLAGS_RECV_TRAILER) {
53195 +            /* this packet has a trailer */
53196 +
53197 +                /* extract the trailer length in control byte 0 */
53198 +            temp = A_GET_UINT8_FIELD(pBuf, HTC_FRAME_HDR, ControlBytes[0]);
53199 +
53200 +            if ((temp < sizeof(HTC_RECORD_HDR)) || (temp > payloadLen)) {
53201 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53202 +                    ("HTCProcessRecvHeader, invalid header (payloadlength should be :%d, CB[0] is:%d) \n",
53203 +                        payloadLen, temp));
53204 +                status = A_EPROTO;
53205 +                break;
53206 +            }
53207 +
53208 +                /* process trailer data that follows HDR + application payload */
53209 +            status = HTCProcessTrailer(target,
53210 +                                       (pBuf + HTC_HDR_LENGTH + payloadLen - temp),
53211 +                                       temp,
53212 +                                       pNextLookAhead,
53213 +                                       pPacket->Endpoint);
53214 +
53215 +            if (A_FAILED(status)) {
53216 +                break;
53217 +            }
53218 +
53219 +#ifdef HTC_CAPTURE_LAST_FRAME
53220 +            A_MEMCPY(target->LastTrailer, (pBuf + HTC_HDR_LENGTH + payloadLen - temp), temp);
53221 +            target->LastTrailerLength = temp;
53222 +#endif
53223 +                /* trim length by trailer bytes */
53224 +            pPacket->ActualLength -= temp;
53225 +        }
53226 +#ifdef HTC_CAPTURE_LAST_FRAME
53227 +         else {
53228 +            target->LastTrailerLength = 0;
53229 +        }
53230 +#endif
53231 +
53232 +            /* if we get to this point, the packet is good */
53233 +            /* remove header and adjust length */
53234 +        pPacket->pBuffer += HTC_HDR_LENGTH;
53235 +        pPacket->ActualLength -= HTC_HDR_LENGTH;
53236 +
53237 +    } while (FALSE);
53238 +
53239 +    if (A_FAILED(status)) {
53240 +            /* dump the whole packet */
53241 +        DebugDumpBytes(pBuf,pPacket->ActualLength,"BAD HTC Recv PKT");
53242 +    } else {
53243 +#ifdef HTC_CAPTURE_LAST_FRAME
53244 +        A_MEMCPY(&target->LastFrameHdr,pBuf,sizeof(HTC_FRAME_HDR));
53245 +#endif
53246 +        if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_RECV)) {
53247 +            if (pPacket->ActualLength > 0) {
53248 +                AR_DEBUG_PRINTBUF(pPacket->pBuffer,pPacket->ActualLength,"HTC - Application Msg");
53249 +            }
53250 +        }
53251 +    }
53252 +
53253 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCProcessRecvHeader \n"));
53254 +    return status;
53255 +}
53256 +
53257 +/* asynchronous completion handler for recv packet fetching, when the device layer
53258 + * completes a read request, it will call this completion handler */
53259 +void HTCRecvCompleteHandler(void *Context, HTC_PACKET *pPacket)
53260 +{
53261 +    HTC_TARGET      *target = (HTC_TARGET *)Context;
53262 +    HTC_ENDPOINT    *pEndpoint;
53263 +    A_UINT32        nextLookAhead = 0;
53264 +    A_STATUS        status;
53265 +
53266 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("+HTCRecvCompleteHandler (status:%d, ep:%d) \n",
53267 +                pPacket->Status, pPacket->Endpoint));
53268 +
53269 +    AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX);
53270 +    pEndpoint = &target->EndPoint[pPacket->Endpoint];
53271 +    pPacket->Completion = NULL;
53272 +
53273 +        /* get completion status */
53274 +    status = pPacket->Status;
53275 +
53276 +    do {
53277 +        if (A_FAILED(status)) {
53278 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("HTCRecvCompleteHandler: request failed (status:%d, ep:%d) \n",
53279 +                pPacket->Status, pPacket->Endpoint));
53280 +            break;
53281 +        }
53282 +            /* process the header for any trailer data */
53283 +        status = HTCProcessRecvHeader(target,pPacket,&nextLookAhead);
53284 +
53285 +        if (A_FAILED(status)) {
53286 +            break;
53287 +        }
53288 +            /* was there a lookahead for the next packet? */
53289 +        if (nextLookAhead != 0) {
53290 +            A_STATUS nextStatus;
53291 +            AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
53292 +                            ("HTCRecvCompleteHandler - next look ahead was non-zero : 0x%X \n",
53293 +                             nextLookAhead));
53294 +                /* we have another packet, get the next packet fetch started (pipelined) before
53295 +                 * we call into the endpoint's callback, this will start another async request */
53296 +            nextStatus = HTCRecvMessagePendingHandler(target,nextLookAhead,NULL);
53297 +            if (A_EPROTO == nextStatus) {
53298 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53299 +                            ("Next look ahead from recv header was INVALID\n"));
53300 +                DebugDumpBytes((A_UINT8 *)&nextLookAhead,
53301 +                                4,
53302 +                                "BAD lookahead from lookahead report");
53303 +            }
53304 +        } else {
53305 +             AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
53306 +            ("HTCRecvCompleteHandler - rechecking for more messages...\n"));
53307 +            /* if we did not get anything on the look-ahead,
53308 +             * call device layer to asynchronously re-check for messages. If we can keep the async
53309 +             * processing going we get better performance.  If there is a pending message we will keep processing
53310 +             * messages asynchronously which should pipeline things nicely */
53311 +            DevCheckPendingRecvMsgsAsync(&target->Device);
53312 +        }
53313 +
53314 +        HTC_RX_STAT_PROFILE(target,pEndpoint,nextLookAhead);
53315 +        DO_RCV_COMPLETION(target,pPacket,pEndpoint);
53316 +
53317 +    } while (FALSE);
53318 +
53319 +    if (A_FAILED(status)) {
53320 +         AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53321 +                         ("HTCRecvCompleteHandler , message fetch failed (status = %d) \n",
53322 +                         status));
53323 +            /* recyle this packet */
53324 +         HTC_RECYCLE_RX_PKT(target, pPacket);
53325 +    }
53326 +
53327 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("-HTCRecvCompleteHandler\n"));
53328 +}
53329 +
53330 +/* synchronously wait for a control message from the target,
53331 + * This function is used at initialization time ONLY.  At init messages
53332 + * on ENDPOINT 0 are expected. */
53333 +A_STATUS HTCWaitforControlMessage(HTC_TARGET *target, HTC_PACKET **ppControlPacket)
53334 +{
53335 +    A_STATUS        status;
53336 +    A_UINT32        lookAhead;
53337 +    HTC_PACKET      *pPacket = NULL;
53338 +    HTC_FRAME_HDR   *pHdr;
53339 +
53340 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCWaitforControlMessage \n"));
53341 +
53342 +    do  {
53343 +
53344 +        *ppControlPacket = NULL;
53345 +
53346 +            /* call the polling function to see if we have a message */
53347 +        status = DevPollMboxMsgRecv(&target->Device,
53348 +                                    &lookAhead,
53349 +                                    HTC_TARGET_RESPONSE_TIMEOUT);
53350 +
53351 +        if (A_FAILED(status)) {
53352 +            break;
53353 +        }
53354 +
53355 +        AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
53356 +                ("HTCWaitforControlMessage : lookAhead : 0x%X \n", lookAhead));
53357 +
53358 +            /* check the lookahead */
53359 +        pHdr = (HTC_FRAME_HDR *)&lookAhead;
53360 +
53361 +        if (pHdr->EndpointID != ENDPOINT_0) {
53362 +                /* unexpected endpoint number, should be zero */
53363 +            AR_DEBUG_ASSERT(FALSE);
53364 +            status = A_EPROTO;
53365 +            break;
53366 +        }
53367 +
53368 +        if (A_FAILED(status)) {
53369 +                /* bad message */
53370 +            AR_DEBUG_ASSERT(FALSE);
53371 +            status = A_EPROTO;
53372 +            break;
53373 +        }
53374 +
53375 +        pPacket = HTC_ALLOC_CONTROL_RX(target);
53376 +
53377 +        if (pPacket == NULL) {
53378 +            AR_DEBUG_ASSERT(FALSE);
53379 +            status = A_NO_MEMORY;
53380 +            break;
53381 +        }
53382 +
53383 +        pPacket->HTCReserved = lookAhead;
53384 +        pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH;
53385 +
53386 +        if (pPacket->ActualLength > pPacket->BufferLength) {
53387 +            AR_DEBUG_ASSERT(FALSE);
53388 +            status = A_EPROTO;
53389 +            break;
53390 +        }
53391 +
53392 +            /* we want synchronous operation */
53393 +        pPacket->Completion = NULL;
53394 +
53395 +            /* get the message from the device, this will block */
53396 +        status = HTCIssueRecv(target, pPacket);
53397 +
53398 +        if (A_FAILED(status)) {
53399 +            break;
53400 +        }
53401 +
53402 +            /* process receive header */
53403 +        status = HTCProcessRecvHeader(target,pPacket,NULL);
53404 +
53405 +        pPacket->Status = status;
53406 +
53407 +        if (A_FAILED(status)) {
53408 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53409 +                    ("HTCWaitforControlMessage, HTCProcessRecvHeader failed (status = %d) \n",
53410 +                     status));
53411 +            break;
53412 +        }
53413 +
53414 +            /* give the caller this control message packet, they are responsible to free */
53415 +        *ppControlPacket = pPacket;
53416 +
53417 +    } while (FALSE);
53418 +
53419 +    if (A_FAILED(status)) {
53420 +        if (pPacket != NULL) {
53421 +                /* cleanup buffer on error */
53422 +            HTC_FREE_CONTROL_RX(target,pPacket);
53423 +        }
53424 +    }
53425 +
53426 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCWaitforControlMessage \n"));
53427 +
53428 +    return status;
53429 +}
53430 +
53431 +/* callback when device layer or lookahead report parsing detects a pending message */
53432 +A_STATUS HTCRecvMessagePendingHandler(void *Context, A_UINT32 LookAhead, A_BOOL *pAsyncProc)
53433 +{
53434 +    HTC_TARGET      *target = (HTC_TARGET *)Context;
53435 +    A_STATUS         status = A_OK;
53436 +    HTC_PACKET      *pPacket = NULL;
53437 +    HTC_FRAME_HDR   *pHdr;
53438 +    HTC_ENDPOINT    *pEndpoint;
53439 +    A_BOOL          asyncProc = FALSE;
53440 +
53441 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("+HTCRecvMessagePendingHandler LookAhead:0x%X \n",LookAhead));
53442 +
53443 +    if (IS_DEV_IRQ_PROCESSING_ASYNC_ALLOWED(&target->Device)) {
53444 +            /* We use async mode to get the packets if the device layer supports it.
53445 +             * The device layer interfaces with HIF in which HIF may have restrictions on
53446 +             * how interrupts are processed */
53447 +        asyncProc = TRUE;
53448 +    }
53449 +
53450 +    if (pAsyncProc != NULL) {
53451 +            /* indicate to caller how we decided to process this */
53452 +        *pAsyncProc = asyncProc;
53453 +    }
53454 +
53455 +    while (TRUE) {
53456 +
53457 +        pHdr = (HTC_FRAME_HDR *)&LookAhead;
53458 +
53459 +        if (pHdr->EndpointID >= ENDPOINT_MAX) {
53460 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Invalid Endpoint in look-ahead: %d \n",pHdr->EndpointID));
53461 +                /* invalid endpoint */
53462 +            status = A_EPROTO;
53463 +            break;
53464 +        }
53465 +
53466 +        if (pHdr->PayloadLen > HTC_MAX_PAYLOAD_LENGTH) {
53467 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Payload length %d exceeds max HTC : %d !\n",
53468 +                    pHdr->PayloadLen, HTC_MAX_PAYLOAD_LENGTH));
53469 +            status = A_EPROTO;
53470 +            break;
53471 +        }
53472 +
53473 +        pEndpoint = &target->EndPoint[pHdr->EndpointID];
53474 +
53475 +        if (0 == pEndpoint->ServiceID) {
53476 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("Endpoint %d is not connected !\n",pHdr->EndpointID));
53477 +                /* endpoint isn't even connected */
53478 +            status = A_EPROTO;
53479 +            break;
53480 +        }
53481 +
53482 +            /* lock RX to get a buffer */
53483 +        LOCK_HTC_RX(target);
53484 +
53485 +            /* get a packet from the endpoint recv queue */
53486 +        pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
53487 +
53488 +        if (NULL == pPacket) {
53489 +                /* check for refill handler */
53490 +            if (pEndpoint->EpCallBacks.EpRecvRefill != NULL) {
53491 +                UNLOCK_HTC_RX(target);
53492 +                    /* call the re-fill handler */
53493 +                pEndpoint->EpCallBacks.EpRecvRefill(pEndpoint->EpCallBacks.pContext,
53494 +                                                    pHdr->EndpointID);
53495 +                LOCK_HTC_RX(target);
53496 +                    /* check if we have more buffers */
53497 +                pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
53498 +                    /* fall through */
53499 +            }
53500 +        }
53501 +
53502 +        if (NULL == pPacket) {
53503 +                /* this is not an error, we simply need to mark that we are waiting for buffers.*/
53504 +            target->HTCStateFlags |= HTC_STATE_WAIT_BUFFERS;
53505 +            target->EpWaitingForBuffers = pHdr->EndpointID;
53506 +            status = A_NO_MEMORY;
53507 +        }
53508 +
53509 +        UNLOCK_HTC_RX(target);
53510 +
53511 +        if (A_FAILED(status)) {
53512 +                /* no buffers */
53513 +            break;
53514 +        }
53515 +
53516 +        AR_DEBUG_ASSERT(pPacket->Endpoint == pHdr->EndpointID);
53517 +
53518 +            /* make sure this message can fit in the endpoint buffer */
53519 +        if ((pHdr->PayloadLen + HTC_HDR_LENGTH) > pPacket->BufferLength) {
53520 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53521 +                    ("Payload Length Error : header reports payload of: %d, endpoint buffer size: %d \n",
53522 +                    pHdr->PayloadLen, pPacket->BufferLength));
53523 +            status = A_EPROTO;
53524 +            break;
53525 +        }
53526 +
53527 +        pPacket->HTCReserved = LookAhead; /* set expected look ahead */
53528 +            /* set the amount of data to fetch */
53529 +        pPacket->ActualLength = pHdr->PayloadLen + HTC_HDR_LENGTH;
53530 +
53531 +        if (asyncProc) {
53532 +                /* we use async mode to get the packet if the device layer supports it
53533 +                 * set our callback and context */
53534 +            pPacket->Completion = HTCRecvCompleteHandler;
53535 +            pPacket->pContext = target;
53536 +        } else {
53537 +                /* fully synchronous */
53538 +            pPacket->Completion = NULL;
53539 +        }
53540 +
53541 +            /* go fetch the packet */
53542 +        status = HTCIssueRecv(target, pPacket);
53543 +
53544 +        if (A_FAILED(status)) {
53545 +            break;
53546 +        }
53547 +
53548 +        if (asyncProc) {
53549 +                /* we did this asynchronously so we can get out of the loop, the asynch processing
53550 +                 * creates a chain of requests to continue processing pending messages in the
53551 +                 * context of callbacks  */
53552 +            break;
53553 +        }
53554 +
53555 +            /* in the sync case, we process the packet, check lookaheads and then repeat */
53556 +
53557 +        LookAhead = 0;
53558 +        status = HTCProcessRecvHeader(target,pPacket,&LookAhead);
53559 +
53560 +        if (A_FAILED(status)) {
53561 +            break;
53562 +        }
53563 +
53564 +        HTC_RX_STAT_PROFILE(target,pEndpoint,LookAhead);
53565 +        DO_RCV_COMPLETION(target,pPacket,pEndpoint);
53566 +
53567 +        pPacket = NULL;
53568 +
53569 +        if (0 == LookAhead) {
53570 +            break;
53571 +        }
53572 +
53573 +    }
53574 +
53575 +    if (A_NO_MEMORY == status) {
53576 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53577 +                (" Endpoint :%d has no buffers, blocking receiver to prevent overrun.. \n",
53578 +                pHdr->EndpointID));
53579 +            /* try to stop receive at the device layer */
53580 +        DevStopRecv(&target->Device, asyncProc ? DEV_STOP_RECV_ASYNC : DEV_STOP_RECV_SYNC);
53581 +        status = A_OK;
53582 +    } else if (A_FAILED(status)) {
53583 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53584 +                        ("Failed to get pending message : LookAhead Value: 0x%X (status = %d) \n",
53585 +                        LookAhead, status));
53586 +        if (pPacket != NULL) {
53587 +                /* clean up packet on error */
53588 +            HTC_RECYCLE_RX_PKT(target, pPacket);
53589 +        }
53590 +    }
53591 +
53592 +    AR_DEBUG_PRINTF(ATH_DEBUG_RECV,("-HTCRecvMessagePendingHandler \n"));
53593 +
53594 +    return status;
53595 +}
53596 +
53597 +/* Makes a buffer available to the HTC module */
53598 +A_STATUS HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket)
53599 +{
53600 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
53601 +    HTC_ENDPOINT *pEndpoint;
53602 +    A_BOOL       unblockRecv = FALSE;
53603 +    A_STATUS     status = A_OK;
53604 +
53605 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
53606 +                    ("+- HTCAddReceivePkt: endPointId: %d, buffer: 0x%X, length: %d\n",
53607 +                    pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->BufferLength));
53608 +
53609 +    do {
53610 +
53611 +        if (HTC_STOPPING(target)) {
53612 +            status = A_ECANCELED;
53613 +            break;
53614 +        }
53615 +
53616 +        AR_DEBUG_ASSERT(pPacket->Endpoint < ENDPOINT_MAX);
53617 +
53618 +        pEndpoint = &target->EndPoint[pPacket->Endpoint];
53619 +
53620 +        LOCK_HTC_RX(target);
53621 +
53622 +            /* store receive packet */
53623 +        HTC_PACKET_ENQUEUE(&pEndpoint->RxBuffers, pPacket);
53624 +
53625 +            /* check if we are blocked waiting for a new buffer */
53626 +        if (target->HTCStateFlags & HTC_STATE_WAIT_BUFFERS) {
53627 +            if (target->EpWaitingForBuffers == pPacket->Endpoint) {
53628 +                AR_DEBUG_PRINTF(ATH_DEBUG_RECV,(" receiver was blocked on ep:%d, unblocking.. \n",
53629 +                    target->EpWaitingForBuffers));
53630 +                target->HTCStateFlags &= ~HTC_STATE_WAIT_BUFFERS;
53631 +                target->EpWaitingForBuffers = ENDPOINT_MAX;
53632 +                unblockRecv = TRUE;
53633 +            }
53634 +        }
53635 +
53636 +        UNLOCK_HTC_RX(target);
53637 +
53638 +        if (unblockRecv && !HTC_STOPPING(target)) {
53639 +                /* TODO : implement a buffer threshold count? */
53640 +            DevEnableRecv(&target->Device,DEV_ENABLE_RECV_SYNC);
53641 +        }
53642 +
53643 +    } while (FALSE);
53644 +
53645 +    return status;
53646 +}
53647 +
53648 +static void HTCFlushEndpointRX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint)
53649 +{
53650 +    HTC_PACKET  *pPacket;
53651 +
53652 +    LOCK_HTC_RX(target);
53653 +
53654 +    while (1) {
53655 +        pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->RxBuffers);
53656 +        if (NULL == pPacket) {
53657 +            break;
53658 +        }
53659 +        UNLOCK_HTC_RX(target);
53660 +        pPacket->Status = A_ECANCELED;
53661 +        pPacket->ActualLength = 0;
53662 +        AR_DEBUG_PRINTF(ATH_DEBUG_RECV, ("  Flushing RX packet:0x%X, length:%d, ep:%d \n",
53663 +                (A_UINT32)pPacket, pPacket->BufferLength, pPacket->Endpoint));
53664 +            /* give the packet back */
53665 +        pEndpoint->EpCallBacks.EpRecv(pEndpoint->EpCallBacks.pContext,
53666 +                                      pPacket);
53667 +        LOCK_HTC_RX(target);
53668 +    }
53669 +
53670 +    UNLOCK_HTC_RX(target);
53671 +
53672 +
53673 +}
53674 +
53675 +void HTCFlushRecvBuffers(HTC_TARGET *target)
53676 +{
53677 +    HTC_ENDPOINT    *pEndpoint;
53678 +    int             i;
53679 +
53680 +        /* NOTE: no need to flush endpoint 0, these buffers were
53681 +         * allocated as part of the HTC struct */
53682 +    for (i = ENDPOINT_1; i < ENDPOINT_MAX; i++) {
53683 +        pEndpoint = &target->EndPoint[i];
53684 +        if (pEndpoint->ServiceID == 0) {
53685 +                /* not in use.. */
53686 +            continue;
53687 +        }
53688 +        HTCFlushEndpointRX(target,pEndpoint);
53689 +    }
53690 +
53691 +
53692 +}
53693 +
53694 +
53695 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_send.c
53696 ===================================================================
53697 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
53698 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_send.c     2008-12-11 22:46:49.000000000 +0100
53699 @@ -0,0 +1,543 @@
53700 +/*
53701 + *
53702 + * Copyright (c) 2007 Atheros Communications Inc.
53703 + * All rights reserved.
53704 + *
53705 + *
53706 + *  This program is free software; you can redistribute it and/or modify
53707 + *  it under the terms of the GNU General Public License version 2 as
53708 + *  published by the Free Software Foundation;
53709 + *
53710 + *  Software distributed under the License is distributed on an "AS
53711 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
53712 + *  implied. See the License for the specific language governing
53713 + *  rights and limitations under the License.
53714 + *
53715 + *
53716 + *
53717 + */
53718 +
53719 +#include "htc_internal.h"
53720 +
53721 +#define DO_EP_TX_COMPLETION(ep,p)                                    \
53722 +{                                                                    \
53723 +    (p)->Completion = NULL;                                          \
53724 +    (ep)->EpCallBacks.EpTxComplete((ep)->EpCallBacks.pContext,(p));  \
53725 +}
53726 +
53727 +
53728 +/* call the distribute credits callback with the distribution */
53729 +#define DO_DISTRIBUTION(t,reason,description,pList) \
53730 +{                                             \
53731 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,           \
53732 +        ("  calling distribute function (%s) (dfn:0x%X, ctxt:0x%X, dist:0x%X) \n", \
53733 +                (description),                                           \
53734 +                (A_UINT32)(t)->DistributeCredits,                        \
53735 +                (A_UINT32)(t)->pCredDistContext,                         \
53736 +                (A_UINT32)pList));                                       \
53737 +    (t)->DistributeCredits((t)->pCredDistContext,                        \
53738 +                           (pList),                                      \
53739 +                           (reason));                                    \
53740 +}
53741 +
53742 +/* our internal send packet completion handler when packets are submited to the AR6K device
53743 + * layer */
53744 +static void HTCSendPktCompletionHandler(void *Context, HTC_PACKET *pPacket)
53745 +{
53746 +    HTC_TARGET      *target = (HTC_TARGET *)Context;
53747 +    HTC_ENDPOINT    *pEndpoint = &target->EndPoint[pPacket->Endpoint];
53748 +
53749 +
53750 +    if (A_FAILED(pPacket->Status)) {
53751 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
53752 +            ("HTCSendPktCompletionHandler: request failed (status:%d, ep:%d) \n",
53753 +                pPacket->Status, pPacket->Endpoint));
53754 +    }
53755 +        /* first, fixup the head room we allocated */
53756 +    pPacket->pBuffer += HTC_HDR_LENGTH;
53757 +        /* do completion */
53758 +    DO_EP_TX_COMPLETION(pEndpoint,pPacket);
53759 +}
53760 +
53761 +A_STATUS HTCIssueSend(HTC_TARGET *target, HTC_PACKET *pPacket, A_UINT8 SendFlags)
53762 +{
53763 +    A_STATUS status;
53764 +    A_UINT8 *pHdrBuf;
53765 +    A_BOOL   sync = FALSE;
53766 +
53767 +        /* caller always provides headrooom */
53768 +    pPacket->pBuffer -= HTC_HDR_LENGTH;
53769 +    pHdrBuf = pPacket->pBuffer;
53770 +        /* setup frame header */
53771 +    A_SET_UINT16_FIELD(pHdrBuf,HTC_FRAME_HDR,PayloadLen,(A_UINT16)pPacket->ActualLength);
53772 +    A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,Flags,SendFlags);
53773 +    A_SET_UINT8_FIELD(pHdrBuf,HTC_FRAME_HDR,EndpointID, (A_UINT8)pPacket->Endpoint);
53774 +
53775 +    if (pPacket->Completion == NULL) {
53776 +            /* mark that this request was synchronously issued */
53777 +        sync = TRUE;
53778 +    }
53779 +
53780 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
53781 +                    ("+-HTCIssueSend: transmit length : %d (%s) \n",
53782 +                    pPacket->ActualLength + HTC_HDR_LENGTH,
53783 +                    sync ? "SYNC" : "ASYNC" ));
53784 +
53785 +        /* send message to device */
53786 +    status = DevSendPacket(&target->Device,
53787 +                           pPacket,
53788 +                           pPacket->ActualLength + HTC_HDR_LENGTH);
53789 +
53790 +    if (sync) {
53791 +            /* use local sync variable.  If this was issued asynchronously, pPacket is no longer
53792 +             * safe to access. */
53793 +        pPacket->pBuffer += HTC_HDR_LENGTH;
53794 +    }
53795 +
53796 +    /* if this request was asynchronous, the packet completion routine will be invoked by
53797 +     * the device layer when the HIF layer completes the request */
53798 +
53799 +    return status;
53800 +}
53801 +
53802 +/* try to send the current packet or a packet at the head of the TX queue,
53803 + * if there are no credits, the packet remains in the queue.
53804 + * this function always succeeds and returns a flag if the TX queue for
53805 + * the endpoint has hit the set limit */
53806 +static A_BOOL HTCTrySend(HTC_TARGET   *target,
53807 +                         HTC_ENDPOINT *pEndpoint,
53808 +                         HTC_PACKET   *pPacketToSend)
53809 +{
53810 +    HTC_PACKET  *pPacket;
53811 +    int         creditsRequired;
53812 +    int         remainder;
53813 +    A_UINT8     sendFlags;
53814 +    A_BOOL      epFull = FALSE;
53815 +
53816 +    LOCK_HTC_TX(target);
53817 +
53818 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("+HTCTrySend (pPkt:0x%X)\n",(A_UINT32)pPacketToSend));
53819 +
53820 +    if (pPacketToSend != NULL) {
53821 +        /* caller supplied us a packet to queue to the tail of the HTC TX queue before
53822 +         * we check the tx queue */
53823 +        HTC_PACKET_ENQUEUE(&pEndpoint->TxQueue,pPacketToSend);
53824 +        pEndpoint->CurrentTxQueueDepth++;
53825 +    }
53826 +
53827 +        /* now drain the TX queue for transmission as long as we have enough
53828 +         * credits */
53829 +
53830 +    while (1) {
53831 +
53832 +        if (HTC_QUEUE_EMPTY(&pEndpoint->TxQueue)) {
53833 +                /* nothing in the queue */
53834 +            break;
53835 +        }
53836 +
53837 +        sendFlags = 0;
53838 +
53839 +            /* get packet at head, but don't remove it */
53840 +        pPacket = HTC_GET_PKT_AT_HEAD(&pEndpoint->TxQueue);
53841 +        AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Got head packet:0x%X , Queue Depth: %d\n",
53842 +                (A_UINT32)pPacket, pEndpoint->CurrentTxQueueDepth));
53843 +
53844 +            /* figure out how many credits this message requires */
53845 +        creditsRequired = (pPacket->ActualLength + HTC_HDR_LENGTH) / target->TargetCreditSize;
53846 +        remainder = (pPacket->ActualLength + HTC_HDR_LENGTH) % target->TargetCreditSize;
53847 +
53848 +        if (remainder) {
53849 +            creditsRequired++;
53850 +        }
53851 +
53852 +        AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Creds Required:%d   Got:%d\n",
53853 +                            creditsRequired, pEndpoint->CreditDist.TxCredits));
53854 +
53855 +        if (pEndpoint->CreditDist.TxCredits < creditsRequired) {
53856 +
53857 +            /* not enough credits */
53858 +
53859 +            if (pPacket->Endpoint == ENDPOINT_0) {
53860 +                    /* leave it in the queue */
53861 +                break;
53862 +            }
53863 +                /* invoke the registered distribution function only if this is not
53864 +                 * endpoint 0, we let the driver layer provide more credits if it can.
53865 +                 * We pass the credit distribution list starting at the endpoint in question
53866 +                 * */
53867 +
53868 +                /* set how many credits we need  */
53869 +            pEndpoint->CreditDist.TxCreditsSeek =
53870 +                                    creditsRequired - pEndpoint->CreditDist.TxCredits;
53871 +            DO_DISTRIBUTION(target,
53872 +                            HTC_CREDIT_DIST_SEEK_CREDITS,
53873 +                            "Seek Credits",
53874 +                            &pEndpoint->CreditDist);
53875 +
53876 +            pEndpoint->CreditDist.TxCreditsSeek = 0;
53877 +
53878 +            if (pEndpoint->CreditDist.TxCredits < creditsRequired) {
53879 +                    /* still not enough credits to send, leave packet in the queue */
53880 +                AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
53881 +                    (" Not enough credits for ep %d leaving packet in queue..\n",
53882 +                    pPacket->Endpoint));
53883 +                break;
53884 +            }
53885 +
53886 +        }
53887 +
53888 +        pEndpoint->CreditDist.TxCredits -= creditsRequired;
53889 +        INC_HTC_EP_STAT(pEndpoint, TxCreditsConsummed, creditsRequired);
53890 +
53891 +            /* check if we need credits */
53892 +        if (pEndpoint->CreditDist.TxCredits < pEndpoint->CreditDist.TxCreditsPerMaxMsg) {
53893 +            sendFlags |= HTC_FLAGS_NEED_CREDIT_UPDATE;
53894 +            INC_HTC_EP_STAT(pEndpoint, TxCreditLowIndications, 1);
53895 +            AR_DEBUG_PRINTF(ATH_DEBUG_SEND,(" Host Needs Credits  \n"));
53896 +        }
53897 +
53898 +            /* now we can fully dequeue */
53899 +        pPacket = HTC_PACKET_DEQUEUE(&pEndpoint->TxQueue);
53900 +        pEndpoint->CurrentTxQueueDepth--;
53901 +
53902 +        INC_HTC_EP_STAT(pEndpoint, TxIssued, 1);
53903 +
53904 +        UNLOCK_HTC_TX(target);
53905 +
53906 +        HTCIssueSend(target, pPacket, sendFlags);
53907 +
53908 +        LOCK_HTC_TX(target);
53909 +
53910 +        /* go back and check for more messages */
53911 +    }
53912 +
53913 +    if (pEndpoint->CurrentTxQueueDepth >= pEndpoint->MaxTxQueueDepth) {
53914 +            /* let caller know that this endpoint has reached the maximum depth */
53915 +        epFull = TRUE;
53916 +    }
53917 +
53918 +    UNLOCK_HTC_TX(target);
53919 +
53920 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,("-HTCTrySend:  \n"));
53921 +    return epFull;
53922 +}
53923 +
53924 +/* HTC API - HTCSendPkt */
53925 +A_STATUS HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket)
53926 +{
53927 +    HTC_TARGET      *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
53928 +    HTC_ENDPOINT    *pEndpoint;
53929 +    HTC_ENDPOINT_ID ep;
53930 +    A_STATUS        status = A_OK;
53931 +
53932 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND,
53933 +                    ("+HTCSendPkt: Enter endPointId: %d, buffer: 0x%X, length: %d \n",
53934 +                    pPacket->Endpoint, (A_UINT32)pPacket->pBuffer, pPacket->ActualLength));
53935 +
53936 +    ep = pPacket->Endpoint;
53937 +    AR_DEBUG_ASSERT(ep < ENDPOINT_MAX);
53938 +    pEndpoint = &target->EndPoint[ep];
53939 +
53940 +    do {
53941 +
53942 +        if (HTC_STOPPING(target)) {
53943 +            status = A_ECANCELED;
53944 +            pPacket->Status = status;
53945 +            DO_EP_TX_COMPLETION(pEndpoint,pPacket);
53946 +            break;
53947 +        }
53948 +            /* everything sent through this interface is asynchronous */
53949 +            /* fill in HTC completion routines */
53950 +        pPacket->Completion = HTCSendPktCompletionHandler;
53951 +        pPacket->pContext = target;
53952 +
53953 +        if (HTCTrySend(target, pEndpoint, pPacket)) {
53954 +            AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Endpoint %d, TX queue is full, Depth:%d, Max:%d \n",
53955 +                    ep, pEndpoint->CurrentTxQueueDepth, pEndpoint->MaxTxQueueDepth));
53956 +                /* queue is now full, let caller know */
53957 +            if (pEndpoint->EpCallBacks.EpSendFull != NULL) {
53958 +                AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Calling driver's send full callback.... \n"));
53959 +                pEndpoint->EpCallBacks.EpSendFull(pEndpoint->EpCallBacks.pContext,
53960 +                                                  ep);
53961 +            }
53962 +        }
53963 +
53964 +        AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCSendPkt \n"));
53965 +    } while (FALSE);
53966 +
53967 +    return status;
53968 +}
53969 +
53970 +
53971 +/* check TX queues to drain because of credit distribution update */
53972 +static INLINE void HTCCheckEndpointTxQueues(HTC_TARGET *target)
53973 +{
53974 +    HTC_ENDPOINT                *pEndpoint;
53975 +    HTC_ENDPOINT_CREDIT_DIST    *pDistItem;
53976 +
53977 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCCheckEndpointTxQueues \n"));
53978 +    pDistItem = target->EpCreditDistributionListHead;
53979 +
53980 +        /* run through the credit distribution list to see
53981 +         * if there are packets queued
53982 +         * NOTE: no locks need to be taken since the distribution list
53983 +         * is not dynamic (cannot be re-ordered) and we are not modifying any state */
53984 +    while (pDistItem != NULL) {
53985 +        pEndpoint = (HTC_ENDPOINT *)pDistItem->pHTCReserved;
53986 +
53987 +        if (pEndpoint->CurrentTxQueueDepth > 0) {
53988 +            AR_DEBUG_PRINTF(ATH_DEBUG_SEND, (" Ep %d has %d credits and %d Packets in TX Queue \n",
53989 +                    pDistItem->Endpoint, pEndpoint->CreditDist.TxCredits, pEndpoint->CurrentTxQueueDepth));
53990 +                /* try to start the stalled queue, this list is ordered by priority.
53991 +                 * Highest priority queue get's processed first, if there are credits available the
53992 +                 * highest priority queue will get a chance to reclaim credits from lower priority
53993 +                 * ones */
53994 +            HTCTrySend(target, pEndpoint, NULL);
53995 +        }
53996 +
53997 +        pDistItem = pDistItem->pNext;
53998 +    }
53999 +
54000 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCCheckEndpointTxQueues \n"));
54001 +}
54002 +
54003 +/* process credit reports and call distribution function */
54004 +void HTCProcessCreditRpt(HTC_TARGET *target, HTC_CREDIT_REPORT *pRpt, int NumEntries, HTC_ENDPOINT_ID FromEndpoint)
54005 +{
54006 +    int             i;
54007 +    HTC_ENDPOINT    *pEndpoint;
54008 +    int             totalCredits = 0;
54009 +    A_BOOL          doDist = FALSE;
54010 +
54011 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("+HTCProcessCreditRpt, Credit Report Entries:%d \n", NumEntries));
54012 +
54013 +        /* lock out TX while we update credits */
54014 +    LOCK_HTC_TX(target);
54015 +
54016 +    for (i = 0; i < NumEntries; i++, pRpt++) {
54017 +        if (pRpt->EndpointID >= ENDPOINT_MAX) {
54018 +            AR_DEBUG_ASSERT(FALSE);
54019 +            break;
54020 +        }
54021 +
54022 +        pEndpoint = &target->EndPoint[pRpt->EndpointID];
54023 +
54024 +        AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("  Endpoint %d got %d credits \n",
54025 +                pRpt->EndpointID, pRpt->Credits));
54026 +
54027 +
54028 +#ifdef HTC_EP_STAT_PROFILING
54029 +
54030 +        INC_HTC_EP_STAT(pEndpoint, TxCreditRpts, 1);
54031 +        INC_HTC_EP_STAT(pEndpoint, TxCreditsReturned, pRpt->Credits);
54032 +
54033 +        if (FromEndpoint == pRpt->EndpointID) {
54034 +                /* this credit report arrived on the same endpoint indicating it arrived in an RX
54035 +                 * packet */
54036 +            INC_HTC_EP_STAT(pEndpoint, TxCreditsFromRx, pRpt->Credits);
54037 +            INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromRx, 1);
54038 +        } else if (FromEndpoint == ENDPOINT_0) {
54039 +                /* this credit arrived on endpoint 0 as a NULL message */
54040 +            INC_HTC_EP_STAT(pEndpoint, TxCreditsFromEp0, pRpt->Credits);
54041 +            INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromEp0, 1);
54042 +        } else {
54043 +                /* arrived on another endpoint */
54044 +            INC_HTC_EP_STAT(pEndpoint, TxCreditsFromOther, pRpt->Credits);
54045 +            INC_HTC_EP_STAT(pEndpoint, TxCreditRptsFromOther, 1);
54046 +        }
54047 +
54048 +#endif
54049 +
54050 +        if (ENDPOINT_0 == pRpt->EndpointID) {
54051 +                /* always give endpoint 0 credits back */
54052 +            pEndpoint->CreditDist.TxCredits += pRpt->Credits;
54053 +        } else {
54054 +                /* for all other endpoints, update credits to distribute, the distribution function
54055 +                 * will handle giving out credits back to the endpoints */
54056 +            pEndpoint->CreditDist.TxCreditsToDist += pRpt->Credits;
54057 +                /* flag that we have to do the distribution */
54058 +            doDist = TRUE;
54059 +        }
54060 +
54061 +        totalCredits += pRpt->Credits;
54062 +    }
54063 +
54064 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("  Report indicated %d credits to distribute \n", totalCredits));
54065 +
54066 +    if (doDist) {
54067 +            /* this was a credit return based on a completed send operations
54068 +             * note, this is done with the lock held */
54069 +        DO_DISTRIBUTION(target,
54070 +                        HTC_CREDIT_DIST_SEND_COMPLETE,
54071 +                        "Send Complete",
54072 +                        target->EpCreditDistributionListHead->pNext);
54073 +    }
54074 +
54075 +    UNLOCK_HTC_TX(target);
54076 +
54077 +    if (totalCredits) {
54078 +        HTCCheckEndpointTxQueues(target);
54079 +    }
54080 +
54081 +    AR_DEBUG_PRINTF(ATH_DEBUG_SEND, ("-HTCProcessCreditRpt \n"));
54082 +}
54083 +
54084 +/* flush endpoint TX queue */
54085 +static void HTCFlushEndpointTX(HTC_TARGET *target, HTC_ENDPOINT *pEndpoint, HTC_TX_TAG Tag)
54086 +{
54087 +    HTC_PACKET          *pPacket;
54088 +    HTC_PACKET_QUEUE    discardQueue;
54089 +
54090 +        /* initialize the discard queue */
54091 +    INIT_HTC_PACKET_QUEUE(&discardQueue);
54092 +
54093 +    LOCK_HTC_TX(target);
54094 +
54095 +        /* interate from the front of the TX queue and flush out packets */
54096 +    ITERATE_OVER_LIST_ALLOW_REMOVE(&pEndpoint->TxQueue, pPacket, HTC_PACKET, ListLink) {
54097 +
54098 +            /* check for removal */
54099 +        if ((HTC_TX_PACKET_TAG_ALL == Tag) || (Tag == pPacket->PktInfo.AsTx.Tag)) {
54100 +                /* remove from queue */
54101 +            HTC_PACKET_REMOVE(pPacket);
54102 +                /* add it to the discard pile */
54103 +            HTC_PACKET_ENQUEUE(&discardQueue, pPacket);
54104 +            pEndpoint->CurrentTxQueueDepth--;
54105 +        }
54106 +
54107 +    } ITERATE_END;
54108 +
54109 +    UNLOCK_HTC_TX(target);
54110 +
54111 +        /* empty the discard queue */
54112 +    while (1) {
54113 +        pPacket = HTC_PACKET_DEQUEUE(&discardQueue);
54114 +        if (NULL == pPacket) {
54115 +            break;
54116 +        }
54117 +        pPacket->Status = A_ECANCELED;
54118 +        AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("  Flushing TX packet:0x%X, length:%d, ep:%d tag:0x%X \n",
54119 +                (A_UINT32)pPacket, pPacket->ActualLength, pPacket->Endpoint, pPacket->PktInfo.AsTx.Tag));
54120 +        DO_EP_TX_COMPLETION(pEndpoint,pPacket);
54121 +    }
54122 +
54123 +}
54124 +
54125 +void DumpCreditDist(HTC_ENDPOINT_CREDIT_DIST *pEPDist)
54126 +{
54127 +#ifdef DEBUG
54128 +    HTC_ENDPOINT *pEndpoint = (HTC_ENDPOINT *)pEPDist->pHTCReserved;
54129 +#endif
54130 +
54131 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("--- EP : %d  ServiceID: 0x%X    --------------\n",
54132 +                        pEPDist->Endpoint, pEPDist->ServiceID));
54133 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" this:0x%X next:0x%X prev:0x%X\n",
54134 +                (A_UINT32)pEPDist, (A_UINT32)pEPDist->pNext, (A_UINT32)pEPDist->pPrev));
54135 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" DistFlags          : 0x%X \n", pEPDist->DistFlags));
54136 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsNorm      : %d \n", pEPDist->TxCreditsNorm));
54137 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsMin       : %d \n", pEPDist->TxCreditsMin));
54138 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCredits          : %d \n", pEPDist->TxCredits));
54139 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsAssigned  : %d \n", pEPDist->TxCreditsAssigned));
54140 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsSeek      : %d \n", pEPDist->TxCreditsSeek));
54141 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditSize       : %d \n", pEPDist->TxCreditSize));
54142 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsPerMaxMsg : %d \n", pEPDist->TxCreditsPerMaxMsg));
54143 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxCreditsToDist    : %d \n", pEPDist->TxCreditsToDist));
54144 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, (" TxQueueDepth       : %d \n", pEndpoint->CurrentTxQueueDepth));
54145 +    AR_DEBUG_PRINTF(ATH_DEBUG_ANY, ("----------------------------------------------------\n"));
54146 +}
54147 +
54148 +void DumpCreditDistStates(HTC_TARGET *target)
54149 +{
54150 +    HTC_ENDPOINT_CREDIT_DIST *pEPList = target->EpCreditDistributionListHead;
54151 +
54152 +    while (pEPList != NULL) {
54153 +        DumpCreditDist(pEPList);
54154 +        pEPList = pEPList->pNext;
54155 +    }
54156 +
54157 +    if (target->DistributeCredits != NULL) {
54158 +        DO_DISTRIBUTION(target,
54159 +                        HTC_DUMP_CREDIT_STATE,
54160 +                        "Dump State",
54161 +                        NULL);
54162 +    }
54163 +}
54164 +
54165 +/* flush all send packets from all endpoint queues */
54166 +void HTCFlushSendPkts(HTC_TARGET *target)
54167 +{
54168 +    HTC_ENDPOINT    *pEndpoint;
54169 +    int             i;
54170 +
54171 +    DumpCreditDistStates(target);
54172 +
54173 +    for (i = ENDPOINT_0; i < ENDPOINT_MAX; i++) {
54174 +        pEndpoint = &target->EndPoint[i];
54175 +        if (pEndpoint->ServiceID == 0) {
54176 +                /* not in use.. */
54177 +            continue;
54178 +        }
54179 +        HTCFlushEndpointTX(target,pEndpoint,HTC_TX_PACKET_TAG_ALL);
54180 +    }
54181 +
54182 +
54183 +}
54184 +
54185 +/* HTC API to flush an endpoint's TX queue*/
54186 +void HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag)
54187 +{
54188 +    HTC_TARGET      *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
54189 +    HTC_ENDPOINT    *pEndpoint = &target->EndPoint[Endpoint];
54190 +
54191 +    if (pEndpoint->ServiceID == 0) {
54192 +        AR_DEBUG_ASSERT(FALSE);
54193 +        /* not in use.. */
54194 +        return;
54195 +    }
54196 +
54197 +    HTCFlushEndpointTX(target, pEndpoint, Tag);
54198 +}
54199 +
54200 +/* HTC API to indicate activity to the credit distribution function */
54201 +void HTCIndicateActivityChange(HTC_HANDLE      HTCHandle,
54202 +                               HTC_ENDPOINT_ID Endpoint,
54203 +                               A_BOOL          Active)
54204 +{
54205 +    HTC_TARGET      *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
54206 +    HTC_ENDPOINT    *pEndpoint = &target->EndPoint[Endpoint];
54207 +    A_BOOL          doDist = FALSE;
54208 +
54209 +    if (pEndpoint->ServiceID == 0) {
54210 +        AR_DEBUG_ASSERT(FALSE);
54211 +        /* not in use.. */
54212 +        return;
54213 +    }
54214 +
54215 +    LOCK_HTC_TX(target);
54216 +
54217 +    if (Active) {
54218 +        if (!(pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE)) {
54219 +                /* mark active now */
54220 +            pEndpoint->CreditDist.DistFlags |= HTC_EP_ACTIVE;
54221 +            doDist = TRUE;
54222 +        }
54223 +    } else {
54224 +        if (pEndpoint->CreditDist.DistFlags & HTC_EP_ACTIVE) {
54225 +                /* mark inactive now */
54226 +            pEndpoint->CreditDist.DistFlags &= ~HTC_EP_ACTIVE;
54227 +            doDist = TRUE;
54228 +        }
54229 +    }
54230 +
54231 +    if (doDist) {
54232 +        /* do distribution again based on activity change
54233 +         * note, this is done with the lock held */
54234 +        DO_DISTRIBUTION(target,
54235 +                        HTC_CREDIT_DIST_ACTIVITY_CHANGE,
54236 +                        "Activity Change",
54237 +                        target->EpCreditDistributionListHead->pNext);
54238 +    }
54239 +
54240 +    UNLOCK_HTC_TX(target);
54241 +
54242 +}
54243 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_services.c
54244 ===================================================================
54245 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54246 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/htc/htc_services.c 2008-12-11 22:46:49.000000000 +0100
54247 @@ -0,0 +1,403 @@
54248 +/*
54249 + *
54250 + * Copyright (c) 2007 Atheros Communications Inc.
54251 + * All rights reserved.
54252 + *
54253 + *
54254 + *  This program is free software; you can redistribute it and/or modify
54255 + *  it under the terms of the GNU General Public License version 2 as
54256 + *  published by the Free Software Foundation;
54257 + *
54258 + *  Software distributed under the License is distributed on an "AS
54259 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54260 + *  implied. See the License for the specific language governing
54261 + *  rights and limitations under the License.
54262 + *
54263 + *
54264 + *
54265 + */
54266 +
54267 +#include "htc_internal.h"
54268 +
54269 +void HTCControlTxComplete(void *Context, HTC_PACKET *pPacket)
54270 +{
54271 +        /* not implemented
54272 +         * we do not send control TX frames during normal runtime, only during setup  */
54273 +    AR_DEBUG_ASSERT(FALSE);
54274 +}
54275 +
54276 +    /* callback when a control message arrives on this endpoint */
54277 +void HTCControlRecv(void *Context, HTC_PACKET *pPacket)
54278 +{
54279 +    AR_DEBUG_ASSERT(pPacket->Endpoint == ENDPOINT_0);
54280 +
54281 +        /* the only control messages we are expecting are NULL messages (credit resports), which should
54282 +         * never get here */
54283 +    AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
54284 +                    ("HTCControlRecv, got message with length:%d \n",
54285 +                    pPacket->ActualLength + HTC_HDR_LENGTH));
54286 +
54287 +        /* dump header and message */
54288 +    DebugDumpBytes(pPacket->pBuffer - HTC_HDR_LENGTH,
54289 +                   pPacket->ActualLength + HTC_HDR_LENGTH,
54290 +                   "Unexpected ENDPOINT 0 Message");
54291 +
54292 +    HTC_RECYCLE_RX_PKT((HTC_TARGET*)Context,pPacket);
54293 +}
54294 +
54295 +A_STATUS HTCSendSetupComplete(HTC_TARGET *target)
54296 +{
54297 +    HTC_PACKET             *pSendPacket = NULL;
54298 +    A_STATUS                status;
54299 +    HTC_SETUP_COMPLETE_MSG *pSetupComplete;
54300 +
54301 +    do {
54302 +           /* allocate a packet to send to the target */
54303 +        pSendPacket = HTC_ALLOC_CONTROL_TX(target);
54304 +
54305 +        if (NULL == pSendPacket) {
54306 +            status = A_NO_MEMORY;
54307 +            break;
54308 +        }
54309 +
54310 +            /* assemble setup complete message */
54311 +        pSetupComplete = (HTC_SETUP_COMPLETE_MSG *)pSendPacket->pBuffer;
54312 +        A_MEMZERO(pSetupComplete,sizeof(HTC_SETUP_COMPLETE_MSG));
54313 +        pSetupComplete->MessageID = HTC_MSG_SETUP_COMPLETE_ID;
54314 +
54315 +        SET_HTC_PACKET_INFO_TX(pSendPacket,
54316 +                               NULL,
54317 +                               (A_UINT8 *)pSetupComplete,
54318 +                               sizeof(HTC_SETUP_COMPLETE_MSG),
54319 +                               ENDPOINT_0,
54320 +                               HTC_SERVICE_TX_PACKET_TAG);
54321 +
54322 +            /* we want synchronous operation */
54323 +        pSendPacket->Completion = NULL;
54324 +            /* send the message */
54325 +        status = HTCIssueSend(target,pSendPacket,0);
54326 +
54327 +    } while (FALSE);
54328 +
54329 +    if (pSendPacket != NULL) {
54330 +        HTC_FREE_CONTROL_TX(target,pSendPacket);
54331 +    }
54332 +
54333 +    return status;
54334 +}
54335 +
54336 +
54337 +A_STATUS HTCConnectService(HTC_HANDLE               HTCHandle,
54338 +                           HTC_SERVICE_CONNECT_REQ  *pConnectReq,
54339 +                           HTC_SERVICE_CONNECT_RESP *pConnectResp)
54340 +{
54341 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
54342 +    A_STATUS                            status = A_OK;
54343 +    HTC_PACKET                          *pRecvPacket = NULL;
54344 +    HTC_PACKET                          *pSendPacket = NULL;
54345 +    HTC_CONNECT_SERVICE_RESPONSE_MSG    *pResponseMsg;
54346 +    HTC_CONNECT_SERVICE_MSG             *pConnectMsg;
54347 +    HTC_ENDPOINT_ID                     assignedEndpoint = ENDPOINT_MAX;
54348 +    HTC_ENDPOINT                        *pEndpoint;
54349 +    int                                 maxMsgSize = 0;
54350 +
54351 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("+HTCConnectService, target:0x%X SvcID:0x%X \n",
54352 +               (A_UINT32)target, pConnectReq->ServiceID));
54353 +
54354 +    do {
54355 +
54356 +        AR_DEBUG_ASSERT(pConnectReq->ServiceID != 0);
54357 +
54358 +        if (HTC_CTRL_RSVD_SVC == pConnectReq->ServiceID) {
54359 +                /* special case for pseudo control service */
54360 +            assignedEndpoint = ENDPOINT_0;
54361 +            maxMsgSize = HTC_MAX_CONTROL_MESSAGE_LENGTH;
54362 +        } else {
54363 +                /* allocate a packet to send to the target */
54364 +            pSendPacket = HTC_ALLOC_CONTROL_TX(target);
54365 +
54366 +            if (NULL == pSendPacket) {
54367 +                AR_DEBUG_ASSERT(FALSE);
54368 +                status = A_NO_MEMORY;
54369 +                break;
54370 +            }
54371 +                /* assemble connect service message */
54372 +            pConnectMsg = (HTC_CONNECT_SERVICE_MSG *)pSendPacket->pBuffer;
54373 +            AR_DEBUG_ASSERT(pConnectMsg != NULL);
54374 +            A_MEMZERO(pConnectMsg,sizeof(HTC_CONNECT_SERVICE_MSG));
54375 +            pConnectMsg->MessageID = HTC_MSG_CONNECT_SERVICE_ID;
54376 +            pConnectMsg->ServiceID = pConnectReq->ServiceID;
54377 +            pConnectMsg->ConnectionFlags = pConnectReq->ConnectionFlags;
54378 +                /* check caller if it wants to transfer meta data */
54379 +            if ((pConnectReq->pMetaData != NULL) &&
54380 +                (pConnectReq->MetaDataLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) {
54381 +                    /* copy meta data into message buffer (after header ) */
54382 +                A_MEMCPY((A_UINT8 *)pConnectMsg + sizeof(HTC_CONNECT_SERVICE_MSG),
54383 +                         pConnectReq->pMetaData,
54384 +                         pConnectReq->MetaDataLength);
54385 +                pConnectMsg->ServiceMetaLength = pConnectReq->MetaDataLength;
54386 +            }
54387 +
54388 +            SET_HTC_PACKET_INFO_TX(pSendPacket,
54389 +                                   NULL,
54390 +                                   (A_UINT8 *)pConnectMsg,
54391 +                                   sizeof(HTC_CONNECT_SERVICE_MSG) + pConnectMsg->ServiceMetaLength,
54392 +                                   ENDPOINT_0,
54393 +                                   HTC_SERVICE_TX_PACKET_TAG);
54394 +
54395 +                /* we want synchronous operation */
54396 +            pSendPacket->Completion = NULL;
54397 +
54398 +            status = HTCIssueSend(target,pSendPacket,0);
54399 +
54400 +            if (A_FAILED(status)) {
54401 +                break;
54402 +            }
54403 +
54404 +                /* wait for response */
54405 +            status = HTCWaitforControlMessage(target, &pRecvPacket);
54406 +
54407 +            if (A_FAILED(status)) {
54408 +                break;
54409 +            }
54410 +                /* we controlled the buffer creation so it has to be properly aligned */
54411 +            pResponseMsg = (HTC_CONNECT_SERVICE_RESPONSE_MSG *)pRecvPacket->pBuffer;
54412 +
54413 +            if ((pResponseMsg->MessageID != HTC_MSG_CONNECT_SERVICE_RESPONSE_ID) ||
54414 +                (pRecvPacket->ActualLength < sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG))) {
54415 +                    /* this message is not valid */
54416 +                AR_DEBUG_ASSERT(FALSE);
54417 +                status = A_EPROTO;
54418 +                break;
54419 +            }
54420 +
54421 +            pConnectResp->ConnectRespCode = pResponseMsg->Status;
54422 +                /* check response status */
54423 +            if (pResponseMsg->Status != HTC_SERVICE_SUCCESS) {
54424 +                AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
54425 +                    (" Target failed service 0x%X connect request (status:%d)\n",
54426 +                                pResponseMsg->ServiceID, pResponseMsg->Status));
54427 +                status = A_EPROTO;
54428 +                break;
54429 +            }
54430 +
54431 +            assignedEndpoint = pResponseMsg->EndpointID;
54432 +            maxMsgSize = pResponseMsg->MaxMsgSize;
54433 +
54434 +            if ((pConnectResp->pMetaData != NULL) &&
54435 +                (pResponseMsg->ServiceMetaLength > 0) &&
54436 +                (pResponseMsg->ServiceMetaLength <= HTC_SERVICE_META_DATA_MAX_LENGTH)) {
54437 +                    /* caller supplied a buffer and the target responded with data */
54438 +                int copyLength = min((int)pConnectResp->BufferLength, (int)pResponseMsg->ServiceMetaLength);
54439 +                    /* copy the meta data */
54440 +                A_MEMCPY(pConnectResp->pMetaData,
54441 +                         ((A_UINT8 *)pResponseMsg) + sizeof(HTC_CONNECT_SERVICE_RESPONSE_MSG),
54442 +                         copyLength);
54443 +                pConnectResp->ActualLength = copyLength;
54444 +            }
54445 +
54446 +        }
54447 +
54448 +            /* the rest of these are parameter checks so set the error status */
54449 +        status = A_EPROTO;
54450 +
54451 +        if (assignedEndpoint >= ENDPOINT_MAX) {
54452 +            AR_DEBUG_ASSERT(FALSE);
54453 +            break;
54454 +        }
54455 +
54456 +        if (0 == maxMsgSize) {
54457 +            AR_DEBUG_ASSERT(FALSE);
54458 +            break;
54459 +        }
54460 +
54461 +        pEndpoint = &target->EndPoint[assignedEndpoint];
54462 +
54463 +        if (pEndpoint->ServiceID != 0) {
54464 +            /* endpoint already in use! */
54465 +            AR_DEBUG_ASSERT(FALSE);
54466 +            break;
54467 +        }
54468 +
54469 +            /* return assigned endpoint to caller */
54470 +        pConnectResp->Endpoint = assignedEndpoint;
54471 +        pConnectResp->MaxMsgLength = maxMsgSize;
54472 +
54473 +            /* setup the endpoint */
54474 +        pEndpoint->ServiceID = pConnectReq->ServiceID; /* this marks the endpoint in use */
54475 +        pEndpoint->MaxTxQueueDepth = pConnectReq->MaxSendQueueDepth;
54476 +        pEndpoint->MaxMsgLength = maxMsgSize;
54477 +            /* copy all the callbacks */
54478 +        pEndpoint->EpCallBacks = pConnectReq->EpCallbacks;
54479 +        INIT_HTC_PACKET_QUEUE(&pEndpoint->RxBuffers);
54480 +        INIT_HTC_PACKET_QUEUE(&pEndpoint->TxQueue);
54481 +            /* set the credit distribution info for this endpoint, this information is
54482 +             * passed back to the credit distribution callback function */
54483 +        pEndpoint->CreditDist.ServiceID = pConnectReq->ServiceID;
54484 +        pEndpoint->CreditDist.pHTCReserved = pEndpoint;
54485 +        pEndpoint->CreditDist.Endpoint = assignedEndpoint;
54486 +        pEndpoint->CreditDist.TxCreditSize = target->TargetCreditSize;
54487 +        pEndpoint->CreditDist.TxCreditsPerMaxMsg = maxMsgSize / target->TargetCreditSize;
54488 +
54489 +        if (0 == pEndpoint->CreditDist.TxCreditsPerMaxMsg) {
54490 +            pEndpoint->CreditDist.TxCreditsPerMaxMsg = 1;
54491 +        }
54492 +
54493 +        status = A_OK;
54494 +
54495 +    } while (FALSE);
54496 +
54497 +    if (pSendPacket != NULL) {
54498 +        HTC_FREE_CONTROL_TX(target,pSendPacket);
54499 +    }
54500 +
54501 +    if (pRecvPacket != NULL) {
54502 +        HTC_FREE_CONTROL_RX(target,pRecvPacket);
54503 +    }
54504 +
54505 +    AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("-HTCConnectService \n"));
54506 +
54507 +    return status;
54508 +}
54509 +
54510 +static void AddToEndpointDistList(HTC_TARGET *target, HTC_ENDPOINT_CREDIT_DIST *pEpDist)
54511 +{
54512 +    HTC_ENDPOINT_CREDIT_DIST *pCurEntry,*pLastEntry;
54513 +
54514 +    if (NULL == target->EpCreditDistributionListHead) {
54515 +        target->EpCreditDistributionListHead = pEpDist;
54516 +        pEpDist->pNext = NULL;
54517 +        pEpDist->pPrev = NULL;
54518 +        return;
54519 +    }
54520 +
54521 +        /* queue to the end of the list, this does not have to be very
54522 +         * fast since this list is built at startup time */
54523 +    pCurEntry = target->EpCreditDistributionListHead;
54524 +
54525 +    while (pCurEntry) {
54526 +        pLastEntry = pCurEntry;
54527 +        pCurEntry = pCurEntry->pNext;
54528 +    }
54529 +
54530 +    pLastEntry->pNext = pEpDist;
54531 +    pEpDist->pPrev = pLastEntry;
54532 +    pEpDist->pNext = NULL;
54533 +}
54534 +
54535 +
54536 +
54537 +/* default credit init callback */
54538 +static void HTCDefaultCreditInit(void                     *Context,
54539 +                                 HTC_ENDPOINT_CREDIT_DIST *pEPList,
54540 +                                 int                      TotalCredits)
54541 +{
54542 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
54543 +    int                      totalEps = 0;
54544 +    int                      creditsPerEndpoint;
54545 +
54546 +    pCurEpDist = pEPList;
54547 +        /* first run through the list and figure out how many endpoints we are dealing with */
54548 +    while (pCurEpDist != NULL) {
54549 +        pCurEpDist = pCurEpDist->pNext;
54550 +        totalEps++;
54551 +    }
54552 +
54553 +        /* even distribution */
54554 +    creditsPerEndpoint = TotalCredits/totalEps;
54555 +
54556 +    pCurEpDist = pEPList;
54557 +        /* run through the list and set minimum and normal credits and
54558 +         * provide the endpoint with some credits to start */
54559 +    while (pCurEpDist != NULL) {
54560 +
54561 +        if (creditsPerEndpoint < pCurEpDist->TxCreditsPerMaxMsg) {
54562 +                /* too many endpoints and not enough credits */
54563 +            AR_DEBUG_ASSERT(FALSE);
54564 +            break;
54565 +        }
54566 +            /* our minimum is set for at least 1 max message */
54567 +        pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg;
54568 +            /* this value is ignored by our credit alg, since we do
54569 +             * not dynamically adjust credits, this is the policy of
54570 +             * the "default" credit distribution, something simple and easy */
54571 +        pCurEpDist->TxCreditsNorm = 0xFFFF;
54572 +            /* give the endpoint minimum credits */
54573 +        pCurEpDist->TxCredits = creditsPerEndpoint;
54574 +        pCurEpDist->TxCreditsAssigned = creditsPerEndpoint;
54575 +        pCurEpDist = pCurEpDist->pNext;
54576 +    }
54577 +
54578 +}
54579 +
54580 +/* default credit distribution callback, NOTE, this callback holds the TX lock */
54581 +void HTCDefaultCreditDist(void                     *Context,
54582 +                          HTC_ENDPOINT_CREDIT_DIST *pEPDistList,
54583 +                          HTC_CREDIT_DIST_REASON   Reason)
54584 +{
54585 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
54586 +
54587 +    if (Reason == HTC_CREDIT_DIST_SEND_COMPLETE) {
54588 +        pCurEpDist = pEPDistList;
54589 +            /* simple distribution */
54590 +        while (pCurEpDist != NULL) {
54591 +            if (pCurEpDist->TxCreditsToDist > 0) {
54592 +                    /* just give the endpoint back the credits */
54593 +                pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist;
54594 +                pCurEpDist->TxCreditsToDist = 0;
54595 +            }
54596 +            pCurEpDist = pCurEpDist->pNext;
54597 +        }
54598 +    }
54599 +
54600 +    /* note we do not need to handle the other reason codes as this is a very
54601 +     * simple distribution scheme, no need to seek for more credits or handle inactivity */
54602 +}
54603 +
54604 +void HTCSetCreditDistribution(HTC_HANDLE               HTCHandle,
54605 +                              void                     *pCreditDistContext,
54606 +                              HTC_CREDIT_DIST_CALLBACK CreditDistFunc,
54607 +                              HTC_CREDIT_INIT_CALLBACK CreditInitFunc,
54608 +                              HTC_SERVICE_ID           ServicePriorityOrder[],
54609 +                              int                      ListLength)
54610 +{
54611 +    HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
54612 +    int i;
54613 +    int ep;
54614 +
54615 +    if (CreditInitFunc != NULL) {
54616 +            /* caller has supplied their own distribution functions */
54617 +        target->InitCredits = CreditInitFunc;
54618 +        AR_DEBUG_ASSERT(CreditDistFunc != NULL);
54619 +        target->DistributeCredits = CreditDistFunc;
54620 +        target->pCredDistContext = pCreditDistContext;
54621 +    } else {
54622 +        /* caller wants HTC to do distribution */
54623 +        /* if caller wants service to handle distributions then
54624 +         * it must set both of these to NULL! */
54625 +        AR_DEBUG_ASSERT(CreditDistFunc == NULL);
54626 +        target->InitCredits = HTCDefaultCreditInit;
54627 +        target->DistributeCredits = HTCDefaultCreditDist;
54628 +        target->pCredDistContext = target;
54629 +    }
54630 +
54631 +        /* always add HTC control endpoint first, we only expose the list after the
54632 +         * first one, this is added for TX queue checking */
54633 +    AddToEndpointDistList(target, &target->EndPoint[ENDPOINT_0].CreditDist);
54634 +
54635 +        /* build the list of credit distribution structures in priority order
54636 +         * supplied by the caller, these will follow endpoint 0 */
54637 +    for (i = 0; i < ListLength; i++) {
54638 +            /* match services with endpoints and add the endpoints to the distribution list
54639 +             * in FIFO order */
54640 +        for (ep = ENDPOINT_1; ep < ENDPOINT_MAX; ep++) {
54641 +            if (target->EndPoint[ep].ServiceID == ServicePriorityOrder[i]) {
54642 +                    /* queue this one to the list */
54643 +                AddToEndpointDistList(target, &target->EndPoint[ep].CreditDist);
54644 +                break;
54645 +            }
54646 +        }
54647 +        AR_DEBUG_ASSERT(ep < ENDPOINT_MAX);
54648 +    }
54649 +
54650 +}
54651 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_config.h
54652 ===================================================================
54653 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54654 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_config.h 2008-12-11 22:46:49.000000000 +0100
54655 @@ -0,0 +1,27 @@
54656 +#ifndef _A_CONFIG_H_
54657 +#define _A_CONFIG_H_
54658 +/*
54659 + * Copyright (c) 2004-2005 Atheros Communications Inc.
54660 + * All rights reserved.
54661 + *
54662 + *
54663 + *  This program is free software; you can redistribute it and/or modify
54664 + *  it under the terms of the GNU General Public License version 2 as
54665 + *  published by the Free Software Foundation;
54666 + *
54667 + *  Software distributed under the License is distributed on an "AS
54668 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54669 + *  implied. See the License for the specific language governing
54670 + *  rights and limitations under the License.
54671 + *
54672 + *
54673 + *
54674 + */
54675 +
54676 +/*
54677 + * This file contains software configuration options that enables
54678 + * specific software "features"
54679 + */
54680 +#include "../ar6000/config_linux.h"
54681 +
54682 +#endif
54683 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_debug.h
54684 ===================================================================
54685 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54686 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_debug.h  2008-12-11 22:46:49.000000000 +0100
54687 @@ -0,0 +1,41 @@
54688 +#ifndef _A_DEBUG_H_
54689 +#define _A_DEBUG_H_
54690 +/*
54691 + * Copyright (c) 2004-2006 Atheros Communications Inc.
54692 + * All rights reserved.
54693 + *
54694 + * Copyright (c) 2004-2007 Atheros Communications Inc.
54695 + * All rights reserved.
54696 + *
54697 + *
54698 + *  This program is free software; you can redistribute it and/or modify
54699 + *  it under the terms of the GNU General Public License version 2 as
54700 + *  published by the Free Software Foundation;
54701 + *
54702 + *  Software distributed under the License is distributed on an "AS
54703 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54704 + *  implied. See the License for the specific language governing
54705 + *  rights and limitations under the License.
54706 + *
54707 + *
54708 + *
54709 + */
54710 +
54711 +#include <a_types.h>
54712 +#include <a_osapi.h>
54713 +
54714 +#define DBG_INFO               0x00000001
54715 +#define DBG_ERROR              0x00000002
54716 +#define DBG_WARNING            0x00000004
54717 +#define DBG_SDIO               0x00000008
54718 +#define DBG_HIF                        0x00000010
54719 +#define DBG_HTC                        0x00000020
54720 +#define DBG_WMI                        0x00000040
54721 +#define DBG_WMI2               0x00000080
54722 +#define DBG_DRIVER             0x00000100
54723 +
54724 +#define DBG_DEFAULTS   (DBG_ERROR|DBG_WARNING)
54725 +
54726 +#include "../ar6000/debug_linux.h"
54727 +
54728 +#endif
54729 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h
54730 ===================================================================
54731 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54732 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv_api.h        2008-12-11 22:46:49.000000000 +0100
54733 @@ -0,0 +1,185 @@
54734 +#ifndef _A_DRV_API_H_
54735 +#define _A_DRV_API_H_
54736 +/*
54737 + * Copyright (c) 2004-2006 Atheros Communications Inc.
54738 + * All rights reserved.
54739 + *
54740 + *
54741 + *  This program is free software; you can redistribute it and/or modify
54742 + *  it under the terms of the GNU General Public License version 2 as
54743 + *  published by the Free Software Foundation;
54744 + *
54745 + *  Software distributed under the License is distributed on an "AS
54746 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54747 + *  implied. See the License for the specific language governing
54748 + *  rights and limitations under the License.
54749 + *
54750 + *
54751 + *
54752 + */
54753 +
54754 +#ifdef __cplusplus
54755 +extern "C" {
54756 +#endif
54757 +
54758 +/****************************************************************************/
54759 +/****************************************************************************/
54760 +/**                                                                        **/
54761 +/** WMI related hooks                                                      **/
54762 +/**                                                                        **/
54763 +/****************************************************************************/
54764 +/****************************************************************************/
54765 +
54766 +#include <ar6000_api.h>
54767 +
54768 +#define A_WMI_CHANNELLIST_RX(devt, numChan, chanList)  \
54769 +       ar6000_channelList_rx((devt), (numChan), (chanList))
54770 +
54771 +#define A_WMI_SET_NUMDATAENDPTS(devt, num)     \
54772 +       ar6000_set_numdataendpts((devt), (num))
54773 +
54774 +#define A_WMI_CONTROL_TX(devt, osbuf, streamID)        \
54775 +       ar6000_control_tx((devt), (osbuf), (streamID))
54776 +
54777 +#define A_WMI_TARGETSTATS_EVENT(devt, pStats)  \
54778 +       ar6000_targetStats_event((devt), (pStats))
54779 +
54780 +#define A_WMI_SCANCOMPLETE_EVENT(devt, status) \
54781 +       ar6000_scanComplete_event((devt), (status))
54782 +
54783 +#ifdef CONFIG_HOST_DSET_SUPPORT
54784 +
54785 +#define A_WMI_DSET_DATA_REQ(devt, access_cookie, offset, length, targ_buf, targ_reply_fn, targ_reply_arg)      \
54786 +       ar6000_dset_data_req((devt), (access_cookie), (offset), (length), (targ_buf), (targ_reply_fn), (targ_reply_arg))
54787 +
54788 +#define A_WMI_DSET_CLOSE(devt, access_cookie)  \
54789 +       ar6000_dset_close((devt), (access_cookie))
54790 +
54791 +#endif
54792 +
54793 +#define A_WMI_DSET_OPEN_REQ(devt, id, targ_handle, targ_reply_fn, targ_reply_arg) \
54794 +       ar6000_dset_open_req((devt), (id), (targ_handle), (targ_reply_fn), (targ_reply_arg))
54795 +
54796 +#define A_WMI_CONNECT_EVENT(devt, channel, bssid, listenInterval, beaconInterval, networkType, beaconIeLen, assocReqLen, assocRespLen, assocInfo) \
54797 +       ar6000_connect_event((devt), (channel), (bssid), (listenInterval), (beaconInterval), (networkType), (beaconIeLen), (assocReqLen), (assocRespLen), (assocInfo))
54798 +
54799 +#define A_WMI_REGDOMAIN_EVENT(devt, regCode)   \
54800 +       ar6000_regDomain_event((devt), (regCode))
54801 +
54802 +#define A_WMI_NEIGHBORREPORT_EVENT(devt, numAps, info) \
54803 +       ar6000_neighborReport_event((devt), (numAps), (info))
54804 +
54805 +#define A_WMI_DISCONNECT_EVENT(devt, reason, bssid, assocRespLen, assocInfo, protocolReasonStatus)     \
54806 +       ar6000_disconnect_event((devt), (reason), (bssid), (assocRespLen), (assocInfo), (protocolReasonStatus))
54807 +
54808 +#define A_WMI_TKIP_MICERR_EVENT(devt, keyid, ismcast)  \
54809 +       ar6000_tkip_micerr_event((devt), (keyid), (ismcast))
54810 +
54811 +#define A_WMI_BITRATE_RX(devt, rateKbps)       \
54812 +       ar6000_bitrate_rx((devt), (rateKbps))
54813 +
54814 +#define A_WMI_TXPWR_RX(devt, txPwr)    \
54815 +       ar6000_txPwr_rx((devt), (txPwr))
54816 +
54817 +#define A_WMI_READY_EVENT(devt, datap, phyCap) \
54818 +       ar6000_ready_event((devt), (datap), (phyCap))
54819 +
54820 +#define A_WMI_DBGLOG_INIT_DONE(ar) \
54821 +        ar6000_dbglog_init_done(ar);
54822 +
54823 +#define A_WMI_RSSI_THRESHOLD_EVENT(devt, newThreshold, rssi)   \
54824 +       ar6000_rssiThreshold_event((devt), (newThreshold), (rssi))
54825 +
54826 +#define A_WMI_REPORT_ERROR_EVENT(devt, errorVal)       \
54827 +       ar6000_reportError_event((devt), (errorVal))
54828 +
54829 +#define A_WMI_ROAM_TABLE_EVENT(devt, pTbl) \
54830 +       ar6000_roam_tbl_event((devt), (pTbl))
54831 +
54832 +#define A_WMI_ROAM_DATA_EVENT(devt, p) \
54833 +       ar6000_roam_data_event((devt), (p))
54834 +
54835 +#define A_WMI_WOW_LIST_EVENT(devt, num_filters, wow_filters)   \
54836 +       ar6000_wow_list_event((devt), (num_filters), (wow_filters))
54837 +
54838 +#define A_WMI_CAC_EVENT(devt, ac, cac_indication, statusCode, tspecSuggestion)  \
54839 +       ar6000_cac_event((devt), (ac), (cac_indication), (statusCode), (tspecSuggestion))
54840 +
54841 +#define A_WMI_IPTOS_TO_USERPRIORITY(pkt)    \
54842 +       ar6000_iptos_to_userPriority((pkt))
54843 +
54844 +#define A_WMI_PMKID_LIST_EVENT(devt, num_pmkid, pmkid_list)    \
54845 +       ar6000_pmkid_list_event((devt), (num_pmkid), (pmkid_list))
54846 +
54847 +#ifdef CONFIG_HOST_GPIO_SUPPORT
54848 +
54849 +#define A_WMI_GPIO_INTR_RX(intr_mask, input_values) \
54850 +       ar6000_gpio_intr_rx((intr_mask), (input_values))
54851 +
54852 +#define A_WMI_GPIO_DATA_RX(reg_id, value) \
54853 +       ar6000_gpio_data_rx((reg_id), (value))
54854 +
54855 +#define A_WMI_GPIO_ACK_RX() \
54856 +       ar6000_gpio_ack_rx()
54857 +
54858 +#endif
54859 +
54860 +#ifdef SEND_EVENT_TO_APP
54861 +
54862 +#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len) \
54863 +       ar6000_send_event_to_app((ar), (eventId), (datap), (len))
54864 +
54865 +#else
54866 +
54867 +#define A_WMI_SEND_EVENT_TO_APP(ar, eventId, datap, len)
54868 +
54869 +#endif
54870 +
54871 +#ifdef CONFIG_HOST_TCMD_SUPPORT
54872 +#define A_WMI_TCMD_RX_REPORT_EVENT(devt, results, len) \
54873 +       ar6000_tcmd_rx_report_event((devt), (results), (len))
54874 +#endif
54875 +
54876 +#define A_WMI_HBCHALLENGERESP_EVENT(devt, cookie, source)    \
54877 +    ar6000_hbChallengeResp_event((devt), (cookie), (source))
54878 +
54879 +#define A_WMI_TX_RETRY_ERR_EVENT(devt) \
54880 +       ar6000_tx_retry_err_event((devt))
54881 +
54882 +#define A_WMI_SNR_THRESHOLD_EVENT_RX(devt, newThreshold, snr) \
54883 +       ar6000_snrThresholdEvent_rx((devt), (newThreshold), (snr))
54884 +
54885 +#define A_WMI_LQ_THRESHOLD_EVENT_RX(devt, range, lqVal) \
54886 +       ar6000_lqThresholdEvent_rx((devt), (range), (lqVal))
54887 +
54888 +#define A_WMI_RATEMASK_RX(devt, ratemask) \
54889 +       ar6000_ratemask_rx((devt), (ratemask))
54890 +
54891 +#define A_WMI_KEEPALIVE_RX(devt, configured)    \
54892 +        ar6000_keepalive_rx((devt), (configured))
54893 +
54894 +#define A_WMI_BSSINFO_EVENT_RX(ar, datp, len)   \
54895 +        ar6000_bssInfo_event_rx((ar), (datap), (len))
54896 +
54897 +#define A_WMI_DBGLOG_EVENT(ar, dropped, buffer, length) \
54898 +        ar6000_dbglog_event((ar), (dropped), (buffer), (length));
54899 +
54900 +#define A_WMI_STREAM_TX_ACTIVE(devt,trafficClass) \
54901 +    ar6000_indicate_tx_activity((devt),(trafficClass), TRUE)
54902 +
54903 +#define A_WMI_STREAM_TX_INACTIVE(devt,trafficClass) \
54904 +    ar6000_indicate_tx_activity((devt),(trafficClass), FALSE)
54905 +
54906 +/****************************************************************************/
54907 +/****************************************************************************/
54908 +/**                                                                        **/
54909 +/** HTC related hooks                                                      **/
54910 +/**                                                                        **/
54911 +/****************************************************************************/
54912 +/****************************************************************************/
54913 +
54914 +#ifdef __cplusplus
54915 +}
54916 +#endif
54917 +
54918 +#endif
54919 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv.h
54920 ===================================================================
54921 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54922 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_drv.h    2008-12-11 22:46:49.000000000 +0100
54923 @@ -0,0 +1,28 @@
54924 +#ifndef _A_DRV_H_
54925 +#define _A_DRV_H_
54926 +/*
54927 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_drv.h#1 $
54928 + *
54929 + * This file contains the definitions of the basic atheros data types.
54930 + * It is used to map the data types in atheros files to a platform specific
54931 + * type.
54932 + *
54933 + * Copyright 2003-2005 Atheros Communications, Inc.,  All Rights Reserved.
54934 + *
54935 + *
54936 + *  This program is free software; you can redistribute it and/or modify
54937 + *  it under the terms of the GNU General Public License version 2 as
54938 + *  published by the Free Software Foundation;
54939 + *
54940 + *  Software distributed under the License is distributed on an "AS
54941 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54942 + *  implied. See the License for the specific language governing
54943 + *  rights and limitations under the License.
54944 + *
54945 + *
54946 + *
54947 + */
54948 +
54949 +#include "../ar6000/athdrv_linux.h"
54950 +
54951 +#endif /* _ADRV_H_ */
54952 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_osapi.h
54953 ===================================================================
54954 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54955 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_osapi.h  2008-12-11 22:46:49.000000000 +0100
54956 @@ -0,0 +1,28 @@
54957 +#ifndef _A_OSAPI_H_
54958 +#define _A_OSAPI_H_
54959 +/*
54960 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_osapi.h#1 $
54961 + *
54962 + * This file contains the definitions of the basic atheros data types.
54963 + * It is used to map the data types in atheros files to a platform specific
54964 + * type.
54965 + *
54966 + * Copyright 2003-2005 Atheros Communications, Inc.,  All Rights Reserved.
54967 + *
54968 + *
54969 + *  This program is free software; you can redistribute it and/or modify
54970 + *  it under the terms of the GNU General Public License version 2 as
54971 + *  published by the Free Software Foundation;
54972 + *
54973 + *  Software distributed under the License is distributed on an "AS
54974 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
54975 + *  implied. See the License for the specific language governing
54976 + *  rights and limitations under the License.
54977 + *
54978 + *
54979 + *
54980 + */
54981 +
54982 +#include "../ar6000/osapi_linux.h"
54983 +
54984 +#endif /* _OSAPI_H_ */
54985 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h
54986 ===================================================================
54987 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
54988 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_api.h       2008-12-11 22:46:49.000000000 +0100
54989 @@ -0,0 +1,29 @@
54990 +#ifndef _AR6000_API_H_
54991 +#define _AR6000_API_H_
54992 +/*
54993 + * Copyright (c) 2004-2005 Atheros Communications Inc.
54994 + * All rights reserved.
54995 + *
54996 + * This file contains the API to access the OS dependent atheros host driver
54997 + * by the WMI or WLAN generic modules.
54998 + *
54999 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/ar6000_api.h#1 $
55000 + *
55001 + *
55002 + *  This program is free software; you can redistribute it and/or modify
55003 + *  it under the terms of the GNU General Public License version 2 as
55004 + *  published by the Free Software Foundation;
55005 + *
55006 + *  Software distributed under the License is distributed on an "AS
55007 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55008 + *  implied. See the License for the specific language governing
55009 + *  rights and limitations under the License.
55010 + *
55011 + *
55012 + *
55013 + */
55014 +
55015 +#include "../ar6000/ar6xapi_linux.h"
55016 +
55017 +#endif /* _AR6000_API_H */
55018 +
55019 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h
55020 ===================================================================
55021 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55022 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ar6000_diag.h      2008-12-11 22:46:49.000000000 +0100
55023 @@ -0,0 +1,38 @@
55024 +/*
55025 + *
55026 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55027 + * All rights reserved.
55028 + *
55029 + *
55030 + *  This program is free software; you can redistribute it and/or modify
55031 + *  it under the terms of the GNU General Public License version 2 as
55032 + *  published by the Free Software Foundation;
55033 + *
55034 + *  Software distributed under the License is distributed on an "AS
55035 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55036 + *  implied. See the License for the specific language governing
55037 + *  rights and limitations under the License.
55038 + *
55039 + *
55040 + *
55041 + */
55042 +
55043 +#ifndef AR6000_DIAG_H_
55044 +#define AR6000_DIAG_H_
55045 +
55046 +
55047 +A_STATUS
55048 +ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
55049 +
55050 +A_STATUS
55051 +ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
55052 +
55053 +A_STATUS
55054 +ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
55055 +                    A_UCHAR *data, A_UINT32 length);
55056 +
55057 +A_STATUS
55058 +ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
55059 +                     A_UCHAR *data, A_UINT32 length);
55060 +
55061 +#endif /*AR6000_DIAG_H_*/
55062 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h
55063 ===================================================================
55064 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55065 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6001_regdump.h   2008-12-11 22:46:49.000000000 +0100
55066 @@ -0,0 +1,100 @@
55067 +/*
55068 + * Copyright (c) 2006 Atheros Communications Inc.
55069 + * All rights reserved.
55070 + *
55071 + * $ATH_LICENSE_HOSTSDK0_C$
55072 + *
55073 + */
55074 +
55075 +#ifndef __AR6000_REGDUMP_H__
55076 +#define __AR6000_REGDUMP_H__
55077 +
55078 +#if !defined(__ASSEMBLER__)
55079 +/*
55080 + * Target CPU state at the time of failure is reflected
55081 + * in a register dump, which the Host can fetch through
55082 + * the diagnostic window.
55083 + */
55084 +
55085 +struct MIPS_exception_frame_s {
55086 +    A_UINT32 pc;        /* Program Counter */
55087 +    A_UINT32 at;        /* MIPS General Purpose registers */
55088 +    A_UINT32 v0;
55089 +    A_UINT32 v1;
55090 +    A_UINT32 a0;
55091 +    A_UINT32 a1;
55092 +    A_UINT32 a2;
55093 +    A_UINT32 a3;
55094 +    A_UINT32 t0;
55095 +    A_UINT32 t1;
55096 +    A_UINT32 t2;
55097 +    A_UINT32 t3;
55098 +    A_UINT32 t4;
55099 +    A_UINT32 t5;
55100 +    A_UINT32 t6;
55101 +    A_UINT32 t7;
55102 +    A_UINT32 s0;
55103 +    A_UINT32 s1;
55104 +    A_UINT32 s2;
55105 +    A_UINT32 s3;
55106 +    A_UINT32 s4;
55107 +    A_UINT32 s5;
55108 +    A_UINT32 s6;
55109 +    A_UINT32 s7;
55110 +    A_UINT32 t8;
55111 +    A_UINT32 t9;
55112 +    A_UINT32 k0;
55113 +    A_UINT32 k1;
55114 +    A_UINT32 gp;
55115 +    A_UINT32 sp;
55116 +    A_UINT32 s8;
55117 +    A_UINT32 ra;
55118 +    A_UINT32 cause; /* Selected coprocessor regs */
55119 +    A_UINT32 status;
55120 +};
55121 +typedef struct MIPS_exception_frame_s CPU_exception_frame_t;
55122 +
55123 +#endif
55124 +
55125 +/*
55126 + * Offsets into MIPS_exception_frame structure, for use in assembler code
55127 + * MUST MATCH C STRUCTURE ABOVE
55128 + */
55129 +#define RD_pc           0
55130 +#define RD_at           1
55131 +#define RD_v0           2
55132 +#define RD_v1           3
55133 +#define RD_a0           4
55134 +#define RD_a1           5
55135 +#define RD_a2           6
55136 +#define RD_a3           7
55137 +#define RD_t0           8
55138 +#define RD_t1           9
55139 +#define RD_t2           10
55140 +#define RD_t3           11
55141 +#define RD_t4           12
55142 +#define RD_t5           13
55143 +#define RD_t6           14
55144 +#define RD_t7           15
55145 +#define RD_s0           16
55146 +#define RD_s1           17
55147 +#define RD_s2           18
55148 +#define RD_s3           19
55149 +#define RD_s4           20
55150 +#define RD_s5           21
55151 +#define RD_s6           22
55152 +#define RD_s7           23
55153 +#define RD_t8           24
55154 +#define RD_t9           25
55155 +#define RD_k0           26
55156 +#define RD_k1           27
55157 +#define RD_gp           28
55158 +#define RD_sp           29
55159 +#define RD_s8           30
55160 +#define RD_ra           31
55161 +#define RD_cause        32
55162 +#define RD_status       33
55163 +
55164 +#define RD_SIZE         (34*4) /* Space for this number of words */
55165 +
55166 +#endif /* __AR6000_REGDUMP_H__ */
55167 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h
55168 ===================================================================
55169 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55170 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6Khwreg.h        2008-12-11 22:46:49.000000000 +0100
55171 @@ -0,0 +1,147 @@
55172 +/*
55173 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55174 + * All rights reserved.
55175 + *
55176 + * $ATH_LICENSE_HOSTSDK0_C$
55177 + *
55178 + * This file contains the definitions for AR6001 registers
55179 + * that may be directly manipulated by Host software.
55180 + */
55181 +
55182 +#ifndef __AR6KHWREG_H__
55183 +#define __AR6KHWREG_H__
55184 +
55185 +#ifdef __cplusplus
55186 +extern "C" {
55187 +#endif
55188 +
55189 +/* Host registers */
55190 +#define HOST_INT_STATUS_ADDRESS                  0x00000400
55191 +#define CPU_INT_STATUS_ADDRESS                   0x00000401
55192 +#define ERROR_INT_STATUS_ADDRESS                 0x00000402
55193 +#define INT_STATUS_ENABLE_ADDRESS                0x00000418
55194 +#define CPU_INT_STATUS_ENABLE_ADDRESS            0x00000419
55195 +#define COUNT_ADDRESS                            0x00000420
55196 +#define COUNT_DEC_ADDRESS                        0x00000440
55197 +#define WINDOW_DATA_ADDRESS                      0x00000474
55198 +#define WINDOW_WRITE_ADDR_ADDRESS                0x00000478
55199 +#define WINDOW_READ_ADDR_ADDRESS                 0x0000047c
55200 +
55201 +/* Target addresses */
55202 +#define RESET_CONTROL_ADDRESS                    0x0c000000
55203 +#define MC_REMAP_VALID_ADDRESS                   0x0c004080
55204 +#define MC_REMAP_SIZE_ADDRESS                    0x0c004100
55205 +#define MC_REMAP_COMPARE_ADDRESS                 0x0c004180
55206 +#define MC_REMAP_TARGET_ADDRESS                  0x0c004200
55207 +#define LOCAL_COUNT_ADDRESS                      0x0c014080
55208 +#define LOCAL_SCRATCH_ADDRESS                    0x0c0140c0
55209 +
55210 +
55211 +#define INT_STATUS_ENABLE_ERROR_MSB              7
55212 +#define INT_STATUS_ENABLE_ERROR_LSB              7
55213 +#define INT_STATUS_ENABLE_ERROR_MASK             0x00000080
55214 +#define INT_STATUS_ENABLE_ERROR_GET(x)           (((x) & INT_STATUS_ENABLE_ERROR_MASK) >> INT_STATUS_ENABLE_ERROR_LSB)
55215 +#define INT_STATUS_ENABLE_ERROR_SET(x)           (((x) << INT_STATUS_ENABLE_ERROR_LSB) & INT_STATUS_ENABLE_ERROR_MASK)
55216 +
55217 +#define INT_STATUS_ENABLE_CPU_MSB                6
55218 +#define INT_STATUS_ENABLE_CPU_LSB                6
55219 +#define INT_STATUS_ENABLE_CPU_MASK               0x00000040
55220 +#define INT_STATUS_ENABLE_CPU_GET(x)             (((x) & INT_STATUS_ENABLE_CPU_MASK) >> INT_STATUS_ENABLE_CPU_LSB)
55221 +#define INT_STATUS_ENABLE_CPU_SET(x)             (((x) << INT_STATUS_ENABLE_CPU_LSB) & INT_STATUS_ENABLE_CPU_MASK)
55222 +
55223 +#define INT_STATUS_ENABLE_COUNTER_MSB            4
55224 +#define INT_STATUS_ENABLE_COUNTER_LSB            4
55225 +#define INT_STATUS_ENABLE_COUNTER_MASK           0x00000010
55226 +#define INT_STATUS_ENABLE_COUNTER_GET(x)         (((x) & INT_STATUS_ENABLE_COUNTER_MASK) >> INT_STATUS_ENABLE_COUNTER_LSB)
55227 +#define INT_STATUS_ENABLE_COUNTER_SET(x)         (((x) << INT_STATUS_ENABLE_COUNTER_LSB) & INT_STATUS_ENABLE_COUNTER_MASK)
55228 +
55229 +#define INT_STATUS_ENABLE_MBOX_DATA_MSB          3
55230 +#define INT_STATUS_ENABLE_MBOX_DATA_LSB          0
55231 +#define INT_STATUS_ENABLE_MBOX_DATA_MASK         0x0000000f
55232 +#define INT_STATUS_ENABLE_MBOX_DATA_GET(x)       (((x) & INT_STATUS_ENABLE_MBOX_DATA_MASK) >> INT_STATUS_ENABLE_MBOX_DATA_LSB)
55233 +#define INT_STATUS_ENABLE_MBOX_DATA_SET(x)       (((x) << INT_STATUS_ENABLE_MBOX_DATA_LSB) & INT_STATUS_ENABLE_MBOX_DATA_MASK)
55234 +
55235 +#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MSB     1
55236 +#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB     1
55237 +#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK    0x00000002
55238 +#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_GET(x)  (((x) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK) >> ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB)
55239 +#define ERROR_STATUS_ENABLE_RX_UNDERFLOW_SET(x)  (((x) << ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB) & ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK)
55240 +
55241 +#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MSB      0
55242 +#define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB      0
55243 +#define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK     0x00000001
55244 +#define ERROR_STATUS_ENABLE_TX_OVERFLOW_GET(x)   (((x) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK) >> ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB)
55245 +#define ERROR_STATUS_ENABLE_TX_OVERFLOW_SET(x)   (((x) << ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB) & ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK)
55246 +
55247 +
55248 +#define CPU_INT_STATUS_ENABLE_BIT_MSB            7
55249 +#define CPU_INT_STATUS_ENABLE_BIT_LSB            0
55250 +#define CPU_INT_STATUS_ENABLE_BIT_MASK           0x000000ff
55251 +#define CPU_INT_STATUS_ENABLE_BIT_GET(x)         (((x) & CPU_INT_STATUS_ENABLE_BIT_MASK) >> CPU_INT_STATUS_ENABLE_BIT_LSB)
55252 +#define CPU_INT_STATUS_ENABLE_BIT_SET(x)         (((x) << CPU_INT_STATUS_ENABLE_BIT_LSB) & CPU_INT_STATUS_ENABLE_BIT_MASK)
55253 +
55254 +#define COUNTER_INT_STATUS_ENABLE_BIT_MSB        7
55255 +#define COUNTER_INT_STATUS_ENABLE_BIT_LSB        0
55256 +#define COUNTER_INT_STATUS_ENABLE_BIT_MASK       0x000000ff
55257 +#define COUNTER_INT_STATUS_ENABLE_BIT_GET(x)     (((x) & COUNTER_INT_STATUS_ENABLE_BIT_MASK) >> COUNTER_INT_STATUS_ENABLE_BIT_LSB)
55258 +#define COUNTER_INT_STATUS_ENABLE_BIT_SET(x)     (((x) << COUNTER_INT_STATUS_ENABLE_BIT_LSB) & COUNTER_INT_STATUS_ENABLE_BIT_MASK)
55259 +
55260 +#define ERROR_INT_STATUS_WAKEUP_MSB              2
55261 +#define ERROR_INT_STATUS_WAKEUP_LSB              2
55262 +#define ERROR_INT_STATUS_WAKEUP_MASK             0x00000004
55263 +#define ERROR_INT_STATUS_WAKEUP_GET(x)           (((x) & ERROR_INT_STATUS_WAKEUP_MASK) >> ERROR_INT_STATUS_WAKEUP_LSB)
55264 +#define ERROR_INT_STATUS_WAKEUP_SET(x)           (((x) << ERROR_INT_STATUS_WAKEUP_LSB) & ERROR_INT_STATUS_WAKEUP_MASK)
55265 +
55266 +#define ERROR_INT_STATUS_RX_UNDERFLOW_MSB        1
55267 +#define ERROR_INT_STATUS_RX_UNDERFLOW_LSB        1
55268 +#define ERROR_INT_STATUS_RX_UNDERFLOW_MASK       0x00000002
55269 +#define ERROR_INT_STATUS_RX_UNDERFLOW_GET(x)     (((x) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK) >> ERROR_INT_STATUS_RX_UNDERFLOW_LSB)
55270 +#define ERROR_INT_STATUS_RX_UNDERFLOW_SET(x)     (((x) << ERROR_INT_STATUS_RX_UNDERFLOW_LSB) & ERROR_INT_STATUS_RX_UNDERFLOW_MASK)
55271 +
55272 +#define ERROR_INT_STATUS_TX_OVERFLOW_MSB         0
55273 +#define ERROR_INT_STATUS_TX_OVERFLOW_LSB         0
55274 +#define ERROR_INT_STATUS_TX_OVERFLOW_MASK        0x00000001
55275 +#define ERROR_INT_STATUS_TX_OVERFLOW_GET(x)      (((x) & ERROR_INT_STATUS_TX_OVERFLOW_MASK) >> ERROR_INT_STATUS_TX_OVERFLOW_LSB)
55276 +#define ERROR_INT_STATUS_TX_OVERFLOW_SET(x)      (((x) << ERROR_INT_STATUS_TX_OVERFLOW_LSB) & ERROR_INT_STATUS_TX_OVERFLOW_MASK)
55277 +
55278 +#define HOST_INT_STATUS_ERROR_MSB                7
55279 +#define HOST_INT_STATUS_ERROR_LSB                7
55280 +#define HOST_INT_STATUS_ERROR_MASK               0x00000080
55281 +#define HOST_INT_STATUS_ERROR_GET(x)             (((x) & HOST_INT_STATUS_ERROR_MASK) >> HOST_INT_STATUS_ERROR_LSB)
55282 +#define HOST_INT_STATUS_ERROR_SET(x)             (((x) << HOST_INT_STATUS_ERROR_LSB) & HOST_INT_STATUS_ERROR_MASK)
55283 +
55284 +#define HOST_INT_STATUS_CPU_MSB                  6
55285 +#define HOST_INT_STATUS_CPU_LSB                  6
55286 +#define HOST_INT_STATUS_CPU_MASK                 0x00000040
55287 +#define HOST_INT_STATUS_CPU_GET(x)               (((x) & HOST_INT_STATUS_CPU_MASK) >> HOST_INT_STATUS_CPU_LSB)
55288 +#define HOST_INT_STATUS_CPU_SET(x)               (((x) << HOST_INT_STATUS_CPU_LSB) & HOST_INT_STATUS_CPU_MASK)
55289 +
55290 +#define HOST_INT_STATUS_COUNTER_MSB              4
55291 +#define HOST_INT_STATUS_COUNTER_LSB              4
55292 +#define HOST_INT_STATUS_COUNTER_MASK             0x00000010
55293 +#define HOST_INT_STATUS_COUNTER_GET(x)           (((x) & HOST_INT_STATUS_COUNTER_MASK) >> HOST_INT_STATUS_COUNTER_LSB)
55294 +#define HOST_INT_STATUS_COUNTER_SET(x)           (((x) << HOST_INT_STATUS_COUNTER_LSB) & HOST_INT_STATUS_COUNTER_MASK)
55295 +
55296 +#define RESET_CONTROL_WARM_RST_MSB               7
55297 +#define RESET_CONTROL_WARM_RST_LSB               7
55298 +#define RESET_CONTROL_WARM_RST_MASK              0x00000080
55299 +#define RESET_CONTROL_WARM_RST_GET(x)            (((x) & RESET_CONTROL_WARM_RST_MASK) >> RESET_CONTROL_WARM_RST_LSB)
55300 +#define RESET_CONTROL_WARM_RST_SET(x)            (((x) << RESET_CONTROL_WARM_RST_LSB) & RESET_CONTROL_WARM_RST_MASK)
55301 +
55302 +#define RESET_CONTROL_COLD_RST_MSB               8
55303 +#define RESET_CONTROL_COLD_RST_LSB               8
55304 +#define RESET_CONTROL_COLD_RST_MASK              0x00000100
55305 +#define RESET_CONTROL_COLD_RST_GET(x)            (((x) & RESET_CONTROL_COLD_RST_MASK) >> RESET_CONTROL_COLD_RST_LSB)
55306 +#define RESET_CONTROL_COLD_RST_SET(x)            (((x) << RESET_CONTROL_COLD_RST_LSB) & RESET_CONTROL_COLD_RST_MASK)
55307 +
55308 +#define RESET_CAUSE_LAST_MSB                     2
55309 +#define RESET_CAUSE_LAST_LSB                     0
55310 +#define RESET_CAUSE_LAST_MASK                    0x00000007
55311 +#define RESET_CAUSE_LAST_GET(x)                  (((x) & RESET_CAUSE_LAST_MASK) >> RESET_CAUSE_LAST_LSB)
55312 +#define RESET_CAUSE_LAST_SET(x)                  (((x) << RESET_CAUSE_LAST_LSB) & RESET_CAUSE_LAST_MASK)
55313 +
55314 +#ifdef __cplusplus
55315 +}
55316 +#endif
55317 +
55318 +#endif /* __AR6KHWREG_H__ */
55319 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h
55320 ===================================================================
55321 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55322 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h     2008-12-11 22:46:49.000000000 +0100
55323 @@ -0,0 +1,36 @@
55324 +#define __VER_MAJOR_ 2
55325 +#define __VER_MINOR_ 0
55326 +#define __VER_PATCH_ 0
55327 +
55328 +
55329 +/*
55330 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55331 + * All rights reserved.
55332 + *
55333 + * $ATH_LICENSE_HOSTSDK0_C$
55334 + *
55335 + * The makear6ksdk script (used for release builds) modifies the following line.
55336 + */
55337 +#define __BUILD_NUMBER_ 18
55338 +
55339 +
55340 +/* Format of the version number. */
55341 +#define VER_MAJOR_BIT_OFFSET           28
55342 +#define VER_MINOR_BIT_OFFSET           24
55343 +#define VER_PATCH_BIT_OFFSET           16
55344 +#define VER_BUILD_NUM_BIT_OFFSET       0
55345 +
55346 +
55347 +/*
55348 + * The version has the following format:
55349 + * Bits 28-31: Major version
55350 + * Bits 24-27: Minor version
55351 + * Bits 16-23: Patch version
55352 + * Bits 0-15:  Build number (automatically generated during build process )
55353 + * E.g. Build 1.1.3.7 would be represented as 0x11030007.
55354 + *
55355 + * DO NOT split the following macro into multiple lines as this may confuse the build scripts.
55356 + */
55357 +#define AR6K_SW_VERSION        ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) )
55358 +
55359 +
55360 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW
55361 ===================================================================
55362 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55363 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/AR6K_version.h.NEW 2008-12-11 22:46:49.000000000 +0100
55364 @@ -0,0 +1,36 @@
55365 +#define __VER_MAJOR_ 2
55366 +#define __VER_MINOR_ 0
55367 +#define __VER_PATCH_ 0
55368 +
55369 +
55370 +/*
55371 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55372 + * All rights reserved.
55373 + *
55374 + * $ATH_LICENSE_HOSTSDK0_C$
55375 + *
55376 + * The makear6ksdk script (used for release builds) modifies the following line.
55377 + */
55378 +#define __BUILD_NUMBER_ 18
55379 +
55380 +
55381 +/* Format of the version number. */
55382 +#define VER_MAJOR_BIT_OFFSET           28
55383 +#define VER_MINOR_BIT_OFFSET           24
55384 +#define VER_PATCH_BIT_OFFSET           16
55385 +#define VER_BUILD_NUM_BIT_OFFSET       0
55386 +
55387 +
55388 +/*
55389 + * The version has the following format:
55390 + * Bits 28-31: Major version
55391 + * Bits 24-27: Minor version
55392 + * Bits 16-23: Patch version
55393 + * Bits 0-15:  Build number (automatically generated during build process )
55394 + * E.g. Build 1.1.3.7 would be represented as 0x11030007.
55395 + *
55396 + * DO NOT split the following macro into multiple lines as this may confuse the build scripts.
55397 + */
55398 +#define AR6K_SW_VERSION        ( ( __VER_MAJOR_ << VER_MAJOR_BIT_OFFSET ) + ( __VER_MINOR_ << VER_MINOR_BIT_OFFSET ) + ( __VER_PATCH_ << VER_PATCH_BIT_OFFSET ) + ( __BUILD_NUMBER_ << VER_BUILD_NUM_BIT_OFFSET ) )
55399 +
55400 +
55401 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdefs.h
55402 ===================================================================
55403 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55404 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdefs.h  2008-12-11 22:46:49.000000000 +0100
55405 @@ -0,0 +1,85 @@
55406 +#ifndef __ATHDEFS_H__
55407 +#define __ATHDEFS_H__
55408 +
55409 +/*
55410 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55411 + * All rights reserved.
55412 + *
55413 + * $ATH_LICENSE_HOSTSDK0_C$
55414 + *
55415 + * This file contains definitions that may be used across both
55416 + * Host and Target software.  Nothing here is module-dependent
55417 + * or platform-dependent.
55418 + */
55419 +
55420 +/*
55421 + * Generic error codes that can be used by hw, sta, ap, sim, dk
55422 + * and any other environments. Since these are enums, feel free to
55423 + * add any more codes that you need.
55424 + */
55425 +
55426 +typedef enum {
55427 +    A_ERROR = -1,               /* Generic error return */
55428 +    A_OK = 0,                   /* success */
55429 +                                /* Following values start at 1 */
55430 +    A_DEVICE_NOT_FOUND,         /* not able to find PCI device */
55431 +    A_NO_MEMORY,                /* not able to allocate memory, not available */
55432 +    A_MEMORY_NOT_AVAIL,         /* memory region is not free for mapping */
55433 +    A_NO_FREE_DESC,             /* no free descriptors available */
55434 +    A_BAD_ADDRESS,              /* address does not match descriptor */
55435 +    A_WIN_DRIVER_ERROR,         /* used in NT_HW version, if problem at init */
55436 +    A_REGS_NOT_MAPPED,          /* registers not correctly mapped */
55437 +    A_EPERM,                    /* Not superuser */
55438 +    A_EACCES,                   /* Access denied */
55439 +    A_ENOENT,                   /* No such entry, search failed, etc. */
55440 +    A_EEXIST,                   /* The object already exists (can't create) */
55441 +    A_EFAULT,                   /* Bad address fault */
55442 +    A_EBUSY,                    /* Object is busy */
55443 +    A_EINVAL,                   /* Invalid parameter */
55444 +    A_EMSGSIZE,                 /* Inappropriate message buffer length */
55445 +    A_ECANCELED,                /* Operation canceled */
55446 +    A_ENOTSUP,                  /* Operation not supported */
55447 +    A_ECOMM,                    /* Communication error on send */
55448 +    A_EPROTO,                   /* Protocol error */
55449 +    A_ENODEV,                   /* No such device */
55450 +    A_EDEVNOTUP,                /* device is not UP */
55451 +    A_NO_RESOURCE,              /* No resources for requested operation */
55452 +    A_HARDWARE,                 /* Hardware failure */
55453 +    A_PENDING,                  /* Asynchronous routine; will send up results la
55454 +ter (typically in callback) */
55455 +    A_EBADCHANNEL,              /* The channel cannot be used */
55456 +    A_DECRYPT_ERROR,            /* Decryption error */
55457 +    A_PHY_ERROR,                /* RX PHY error */
55458 +    A_CONSUMED                  /* Object was consumed */
55459 +} A_STATUS;
55460 +
55461 +#define A_SUCCESS(x)        (x == A_OK)
55462 +#define A_FAILED(x)         (!A_SUCCESS(x))
55463 +
55464 +#ifndef TRUE
55465 +#define TRUE 1
55466 +#endif
55467 +
55468 +#ifndef FALSE
55469 +#define FALSE 0
55470 +#endif
55471 +
55472 +/*
55473 + * The following definition is WLAN specific definition
55474 + */
55475 +typedef enum {
55476 +    MODE_11A = 0,   /* 11a Mode */
55477 +    MODE_11G = 1,   /* 11g + 11b Mode */
55478 +    MODE_11B = 2,   /* 11b Mode */
55479 +    MODE_11GONLY = 3, /* 11g only Mode */
55480 +    MODE_UNKNOWN = 4,
55481 +    MODE_MAX = 4
55482 +} WLAN_PHY_MODE;
55483 +
55484 +typedef enum {
55485 +    WLAN_11A_CAPABILITY   = 1,
55486 +    WLAN_11G_CAPABILITY   = 2,
55487 +    WLAN_11AG_CAPABILITY  = 3,
55488 +}WLAN_CAPABILITY;
55489 +
55490 +#endif /* __ATHDEFS_H__ */
55491 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdrv.h
55492 ===================================================================
55493 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55494 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athdrv.h   2008-12-11 22:46:49.000000000 +0100
55495 @@ -0,0 +1,32 @@
55496 +/*
55497 + * Copyright (c) 2004-2006 Atheros Communications Inc.
55498 + * All rights reserved.
55499 + *
55500 + *
55501 + *
55502 + *  This program is free software; you can redistribute it and/or modify
55503 + *  it under the terms of the GNU General Public License version 2 as
55504 + *  published by the Free Software Foundation;
55505 + *
55506 + *  Software distributed under the License is distributed on an "AS
55507 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55508 + *  implied. See the License for the specific language governing
55509 + *  rights and limitations under the License.
55510 + *
55511 + *
55512 + *
55513 + */
55514 +
55515 +#ifndef _ATHDRV_H_
55516 +#define _ATHDRV_H_
55517 +
55518 +#ifdef __cplusplus
55519 +extern "C" {
55520 +#endif
55521 +
55522 +
55523 +#ifdef __cplusplus
55524 +}
55525 +#endif
55526 +
55527 +#endif /* _ATHDRV_H_ */
55528 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athendpack.h
55529 ===================================================================
55530 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55531 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athendpack.h       2008-12-11 22:46:49.000000000 +0100
55532 @@ -0,0 +1,41 @@
55533 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
55534 + * @file: athendpack.h
55535 + *
55536 + * @abstract: end compiler-specific structure packing
55537 + *
55538 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55539 + * All rights reserved.
55540 + *
55541 + *
55542 + *  This program is free software; you can redistribute it and/or modify
55543 + *  it under the terms of the GNU General Public License version 2 as
55544 + *  published by the Free Software Foundation;
55545 + *
55546 + *  Software distributed under the License is distributed on an "AS
55547 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55548 + *  implied. See the License for the specific language governing
55549 + *  rights and limitations under the License.
55550 + *
55551 + *
55552 + *
55553 + */
55554 +#ifdef VXWORKS
55555 +#endif /* VXWORKS */
55556 +
55557 +#ifdef LINUX
55558 +#endif /* LINUX */
55559 +
55560 +#ifdef QNX
55561 +#endif /* QNX */
55562 +
55563 +#ifdef INTEGRITY
55564 +#include "integrity/athendpack_integrity.h"
55565 +#endif /* INTEGRITY */
55566 +
55567 +#ifdef NUCLEUS
55568 +#endif /* NUCLEUS */
55569 +
55570 +#ifdef UNDER_CE
55571 +#include "../os/wince/include/athendpack_wince.h"
55572 +#endif /* WINCE */
55573 +
55574 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athstartpack.h
55575 ===================================================================
55576 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55577 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/athstartpack.h     2008-12-11 22:46:49.000000000 +0100
55578 @@ -0,0 +1,42 @@
55579 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
55580 + * @file: athstartpack.h
55581 + *
55582 + * @abstract: start compiler-specific structure packing
55583 + *
55584 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55585 + * All rights reserved.
55586 + *
55587 + *
55588 + *  This program is free software; you can redistribute it and/or modify
55589 + *  it under the terms of the GNU General Public License version 2 as
55590 + *  published by the Free Software Foundation;
55591 + *
55592 + *  Software distributed under the License is distributed on an "AS
55593 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55594 + *  implied. See the License for the specific language governing
55595 + *  rights and limitations under the License.
55596 + *
55597 + *
55598 + *
55599 + */
55600 +
55601 +#ifdef VXWORKS
55602 +#endif /* VXWORKS */
55603 +
55604 +#ifdef LINUX
55605 +#endif /* LINUX */
55606 +
55607 +#ifdef QNX
55608 +#endif /* QNX */
55609 +
55610 +#ifdef INTEGRITY
55611 +#include "integrity/athstartpack_integrity.h"
55612 +#endif /* INTEGRITY */
55613 +
55614 +#ifdef NUCLEUS
55615 +#endif /* NUCLEUS */
55616 +
55617 +#ifdef UNDER_CE
55618 +#include "../os/wince/include/athstartpack_wince.h"
55619 +#endif /* WINCE */
55620 +
55621 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_types.h
55622 ===================================================================
55623 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55624 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/a_types.h  2008-12-11 22:46:49.000000000 +0100
55625 @@ -0,0 +1,28 @@
55626 +#ifndef _A_TYPES_H_
55627 +#define _A_TYPES_H_
55628 +/*
55629 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/a_types.h#1 $
55630 + *
55631 + * This file contains the definitions of the basic atheros data types.
55632 + * It is used to map the data types in atheros files to a platform specific
55633 + * type.
55634 + *
55635 + * Copyright 2003-2005 Atheros Communications, Inc.,  All Rights Reserved.
55636 + *
55637 + *
55638 + *  This program is free software; you can redistribute it and/or modify
55639 + *  it under the terms of the GNU General Public License version 2 as
55640 + *  published by the Free Software Foundation;
55641 + *
55642 + *  Software distributed under the License is distributed on an "AS
55643 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55644 + *  implied. See the License for the specific language governing
55645 + *  rights and limitations under the License.
55646 + *
55647 + *
55648 + *
55649 + */
55650 +
55651 +#include "../ar6000/athtypes_linux.h"
55652 +
55653 +#endif /* _ATHTYPES_H_ */
55654 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi.h
55655 ===================================================================
55656 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55657 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi.h      2008-12-11 22:46:49.000000000 +0100
55658 @@ -0,0 +1,100 @@
55659 +#ifndef _BMI_H_
55660 +#define _BMI_H_
55661 +/*
55662 + * Copyright (c) 2004-2005 Atheros Communications Inc.
55663 + * All rights reserved.
55664 + *
55665 + *
55666 + *  This program is free software; you can redistribute it and/or modify
55667 + *  it under the terms of the GNU General Public License version 2 as
55668 + *  published by the Free Software Foundation;
55669 + *
55670 + *  Software distributed under the License is distributed on an "AS
55671 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55672 + *  implied. See the License for the specific language governing
55673 + *  rights and limitations under the License.
55674 + *
55675 + *
55676 + *
55677 + * BMI declarations and prototypes
55678 + */
55679 +
55680 +#ifdef __cplusplus
55681 +extern "C" {
55682 +#endif /* __cplusplus */
55683 +
55684 +/* Header files */
55685 +#include "a_config.h"
55686 +#include "athdefs.h"
55687 +#include "a_types.h"
55688 +#include "hif.h"
55689 +#include "a_osapi.h"
55690 +#include "bmi_msg.h"
55691 +
55692 +void
55693 +BMIInit(void);
55694 +
55695 +A_STATUS
55696 +BMIDone(HIF_DEVICE *device);
55697 +
55698 +A_STATUS
55699 +BMIGetTargetInfo(HIF_DEVICE *device, struct bmi_target_info *targ_info);
55700 +
55701 +A_STATUS
55702 +BMIReadMemory(HIF_DEVICE *device,
55703 +              A_UINT32 address,
55704 +              A_UCHAR *buffer,
55705 +              A_UINT32 length);
55706 +
55707 +A_STATUS
55708 +BMIWriteMemory(HIF_DEVICE *device,
55709 +               A_UINT32 address,
55710 +               A_UCHAR *buffer,
55711 +               A_UINT32 length);
55712 +
55713 +A_STATUS
55714 +BMIExecute(HIF_DEVICE *device,
55715 +           A_UINT32 address,
55716 +           A_UINT32 *param);
55717 +
55718 +A_STATUS
55719 +BMISetAppStart(HIF_DEVICE *device,
55720 +               A_UINT32 address);
55721 +
55722 +A_STATUS
55723 +BMIReadSOCRegister(HIF_DEVICE *device,
55724 +                   A_UINT32 address,
55725 +                   A_UINT32 *param);
55726 +
55727 +A_STATUS
55728 +BMIWriteSOCRegister(HIF_DEVICE *device,
55729 +                    A_UINT32 address,
55730 +                    A_UINT32 param);
55731 +
55732 +A_STATUS
55733 +BMIrompatchInstall(HIF_DEVICE *device,
55734 +                   A_UINT32 ROM_addr,
55735 +                   A_UINT32 RAM_addr,
55736 +                   A_UINT32 nbytes,
55737 +                   A_UINT32 do_activate,
55738 +                   A_UINT32 *patch_id);
55739 +
55740 +A_STATUS
55741 +BMIrompatchUninstall(HIF_DEVICE *device,
55742 +                     A_UINT32 rompatch_id);
55743 +
55744 +A_STATUS
55745 +BMIrompatchActivate(HIF_DEVICE *device,
55746 +                    A_UINT32 rompatch_count,
55747 +                    A_UINT32 *rompatch_list);
55748 +
55749 +A_STATUS
55750 +BMIrompatchDeactivate(HIF_DEVICE *device,
55751 +                      A_UINT32 rompatch_count,
55752 +                      A_UINT32 *rompatch_list);
55753 +
55754 +#ifdef __cplusplus
55755 +}
55756 +#endif
55757 +
55758 +#endif /* _BMI_H_ */
55759 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h
55760 ===================================================================
55761 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55762 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/bmi_msg.h  2008-12-11 22:46:49.000000000 +0100
55763 @@ -0,0 +1,199 @@
55764 +#ifndef __BMI_MSG_H__
55765 +#define __BMI_MSG_H__
55766 +/*
55767 + *
55768 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55769 + * All rights reserved.
55770 + *
55771 + *
55772 + *  This program is free software; you can redistribute it and/or modify
55773 + *  it under the terms of the GNU General Public License version 2 as
55774 + *  published by the Free Software Foundation;
55775 + *
55776 + *  Software distributed under the License is distributed on an "AS
55777 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55778 + *  implied. See the License for the specific language governing
55779 + *  rights and limitations under the License.
55780 + *
55781 + *
55782 + *
55783 + */
55784 +
55785 +/*
55786 + * Bootloader Messaging Interface (BMI)
55787 + *
55788 + * BMI is a very simple messaging interface used during initialization
55789 + * to read memory, write memory, execute code, and to define an
55790 + * application entry PC.
55791 + *
55792 + * It is used to download an application to AR6K, to provide
55793 + * patches to code that is already resident on AR6K, and generally
55794 + * to examine and modify state.  The Host has an opportunity to use
55795 + * BMI only once during bootup.  Once the Host issues a BMI_DONE
55796 + * command, this opportunity ends.
55797 + *
55798 + * The Host writes BMI requests to mailbox0, and reads BMI responses
55799 + * from mailbox0.   BMI requests all begin with a command
55800 + * (see below for specific commands), and are followed by
55801 + * command-specific data.
55802 + *
55803 + * Flow control:
55804 + * The Host can only issue a command once the Target gives it a
55805 + * "BMI Command Credit", using AR6K Counter #4.  As soon as the
55806 + * Target has completed a command, it issues another BMI Command
55807 + * Credit (so the Host can issue the next command).
55808 + *
55809 + * BMI handles all required Target-side cache flushing.
55810 + */
55811 +
55812 +
55813 +/* Maximum data size used for BMI transfers */
55814 +#define BMI_DATASZ_MAX                     32
55815 +
55816 +/* BMI Commands */
55817 +
55818 +#define BMI_NO_COMMAND                      0
55819 +
55820 +#define BMI_DONE                            1
55821 +        /*
55822 +         * Semantics: Host is done using BMI
55823 +         * Request format:
55824 +         *    A_UINT32      command (BMI_DONE)
55825 +         * Response format: none
55826 +         */
55827 +
55828 +#define BMI_READ_MEMORY                     2
55829 +        /*
55830 +         * Semantics: Host reads AR6K memory
55831 +         * Request format:
55832 +         *    A_UINT32      command (BMI_READ_MEMORY)
55833 +         *    A_UINT32      address
55834 +         *    A_UINT32      length, at most BMI_DATASZ_MAX
55835 +         * Response format:
55836 +         *    A_UINT8       data[length]
55837 +         */
55838 +
55839 +#define BMI_WRITE_MEMORY                    3
55840 +        /*
55841 +         * Semantics: Host writes AR6K memory
55842 +         * Request format:
55843 +         *    A_UINT32       command (BMI_WRITE_MEMORY)
55844 +         *    A_UINT32      address
55845 +         *    A_UINT32      length, at most BMI_DATASZ_MAX
55846 +         *    A_UINT8       data[length]
55847 +         * Response format: none
55848 +         */
55849 +
55850 +#define BMI_EXECUTE                         4
55851 +        /*
55852 +         * Semantics: Causes AR6K to execute code
55853 +         * Request format:
55854 +         *    A_UINT32      command (BMI_EXECUTE)
55855 +         *    A_UINT32      address
55856 +         *    A_UINT32      parameter
55857 +         * Response format:
55858 +         *    A_UINT32      return value
55859 +         */
55860 +
55861 +#define BMI_SET_APP_START                   5
55862 +        /*
55863 +         * Semantics: Set Target application starting address
55864 +         * Request format:
55865 +         *    A_UINT32      command (BMI_SET_APP_START)
55866 +         *    A_UINT32      address
55867 +         * Response format: none
55868 +         */
55869 +
55870 +#define BMI_READ_SOC_REGISTER               6
55871 +        /*
55872 +         * Semantics: Read a 32-bit Target SOC register.
55873 +         * Request format:
55874 +         *    A_UINT32      command (BMI_READ_REGISTER)
55875 +         *    A_UINT32      address
55876 +         * Response format:
55877 +         *    A_UINT32      value
55878 +         */
55879 +
55880 +#define BMI_WRITE_SOC_REGISTER              7
55881 +        /*
55882 +         * Semantics: Write a 32-bit Target SOC register.
55883 +         * Request format:
55884 +         *    A_UINT32      command (BMI_WRITE_REGISTER)
55885 +         *    A_UINT32      address
55886 +         *    A_UINT32      value
55887 +         *
55888 +         * Response format: none
55889 +         */
55890 +
55891 +#define BMI_GET_TARGET_ID                  8
55892 +#define BMI_GET_TARGET_INFO                8
55893 +        /*
55894 +         * Semantics: Fetch the 4-byte Target information
55895 +         * Request format:
55896 +         *    A_UINT32      command (BMI_GET_TARGET_ID/INFO)
55897 +         * Response format1 (old firmware):
55898 +         *    A_UINT32      TargetVersionID
55899 +         * Response format2 (newer firmware):
55900 +         *    A_UINT32      TARGET_VERSION_SENTINAL
55901 +         *    struct bmi_target_info;
55902 +         */
55903 +
55904 +struct bmi_target_info {
55905 +    A_UINT32 target_info_byte_count; /* size of this structure */
55906 +    A_UINT32 target_ver;             /* Target Version ID */
55907 +    A_UINT32 target_type;            /* Target type */
55908 +};
55909 +#define TARGET_VERSION_SENTINAL 0xffffffff
55910 +#define TARGET_TYPE_AR6001 1
55911 +#define TARGET_TYPE_AR6002 2
55912 +
55913 +
55914 +#define BMI_ROMPATCH_INSTALL               9
55915 +        /*
55916 +         * Semantics: Install a ROM Patch.
55917 +         * Request format:
55918 +         *    A_UINT32      command (BMI_ROMPATCH_INSTALL)
55919 +         *    A_UINT32      Target ROM Address
55920 +         *    A_UINT32      Target RAM Address
55921 +         *    A_UINT32      Size, in bytes
55922 +         *    A_UINT32      Activate? 1-->activate;
55923 +         *                            0-->install but do not activate
55924 +         * Response format:
55925 +         *    A_UINT32      PatchID
55926 +         */
55927 +
55928 +#define BMI_ROMPATCH_UNINSTALL             10
55929 +        /*
55930 +         * Semantics: Uninstall a previously-installed ROM Patch,
55931 +         * automatically deactivating, if necessary.
55932 +         * Request format:
55933 +         *    A_UINT32      command (BMI_ROMPATCH_UNINSTALL)
55934 +         *    A_UINT32      PatchID
55935 +         *
55936 +         * Response format: none
55937 +         */
55938 +
55939 +#define BMI_ROMPATCH_ACTIVATE              11
55940 +        /*
55941 +         * Semantics: Activate a list of previously-installed ROM Patches.
55942 +         * Request format:
55943 +         *    A_UINT32      command (BMI_ROMPATCH_ACTIVATE)
55944 +         *    A_UINT32      rompatch_count
55945 +         *    A_UINT32      PatchID[rompatch_count]
55946 +         *
55947 +         * Response format: none
55948 +         */
55949 +
55950 +#define BMI_ROMPATCH_DEACTIVATE            12
55951 +        /*
55952 +         * Semantics: Deactivate a list of active ROM Patches.
55953 +         * Request format:
55954 +         *    A_UINT32      command (BMI_ROMPATCH_DEACTIVATE)
55955 +         *    A_UINT32      rompatch_count
55956 +         *    A_UINT32      PatchID[rompatch_count]
55957 +         *
55958 +         * Response format: none
55959 +         */
55960 +
55961 +
55962 +#endif /* __BMI_MSG_H__ */
55963 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/common_drv.h
55964 ===================================================================
55965 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
55966 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/common_drv.h       2008-12-11 22:46:49.000000000 +0100
55967 @@ -0,0 +1,61 @@
55968 +/*
55969 + *
55970 + * Copyright (c) 2004-2007 Atheros Communications Inc.
55971 + * All rights reserved.
55972 + *
55973 + *
55974 + *  This program is free software; you can redistribute it and/or modify
55975 + *  it under the terms of the GNU General Public License version 2 as
55976 + *  published by the Free Software Foundation;
55977 + *
55978 + *  Software distributed under the License is distributed on an "AS
55979 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
55980 + *  implied. See the License for the specific language governing
55981 + *  rights and limitations under the License.
55982 + *
55983 + *
55984 + *
55985 + */
55986 +
55987 +
55988 +#ifndef COMMON_DRV_H_
55989 +#define COMMON_DRV_H_
55990 +
55991 +#include "hif.h"
55992 +#include "htc_packet.h"
55993 +
55994 +
55995 +
55996 +/* structure that is the state information for the default credit distribution callback
55997 + * drivers should instantiate (zero-init as well) this structure in their driver instance
55998 + * and pass it as a context to the HTC credit distribution functions */
55999 +typedef struct _COMMON_CREDIT_STATE_INFO {
56000 +    int TotalAvailableCredits;      /* total credits in the system at startup */
56001 +    int CurrentFreeCredits;         /* credits available in the pool that have not been
56002 +                                       given out to endpoints */
56003 +    HTC_ENDPOINT_CREDIT_DIST *pLowestPriEpDist;  /* pointer to the lowest priority endpoint dist struct */
56004 +} COMMON_CREDIT_STATE_INFO;
56005 +
56006 +
56007 +/* HTC TX packet tagging definitions */
56008 +#define AR6K_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
56009 +#define AR6K_DATA_PKT_TAG       (AR6K_CONTROL_PKT_TAG + 1)
56010 +
56011 +#ifdef __cplusplus
56012 +extern "C" {
56013 +#endif
56014 +
56015 +/* OS-independent APIs */
56016 +A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo);
56017 +A_STATUS ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
56018 +A_STATUS ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data);
56019 +A_STATUS ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,  A_UCHAR *data, A_UINT32 length);
56020 +A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType);
56021 +void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType);
56022 +A_STATUS ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice);
56023 +
56024 +#ifdef __cplusplus
56025 +}
56026 +#endif
56027 +
56028 +#endif /*COMMON_DRV_H_*/
56029 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h
56030 ===================================================================
56031 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56032 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_api.h       2008-12-11 22:46:49.000000000 +0100
56033 @@ -0,0 +1,46 @@
56034 +#ifndef _DBGLOG_API_H_
56035 +#define _DBGLOG_API_H_
56036 +/*
56037 + * Copyright (c) 2004-2006 Atheros Communications Inc.
56038 + * All rights reserved.
56039 + *
56040 + *
56041 + *  This program is free software; you can redistribute it and/or modify
56042 + *  it under the terms of the GNU General Public License version 2 as
56043 + *  published by the Free Software Foundation;
56044 + *
56045 + *  Software distributed under the License is distributed on an "AS
56046 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
56047 + *  implied. See the License for the specific language governing
56048 + *  rights and limitations under the License.
56049 + *
56050 + *
56051 + *
56052 + * This file contains host side debug primitives.
56053 + */
56054 +
56055 +#ifdef __cplusplus
56056 +extern "C" {
56057 +#endif
56058 +
56059 +#include "dbglog.h"
56060 +
56061 +#define DBGLOG_HOST_LOG_BUFFER_SIZE            DBGLOG_LOG_BUFFER_SIZE
56062 +
56063 +#define DBGLOG_GET_DBGID(arg) \
56064 +    ((arg & DBGLOG_DBGID_MASK) >> DBGLOG_DBGID_OFFSET)
56065 +
56066 +#define DBGLOG_GET_MODULEID(arg) \
56067 +    ((arg & DBGLOG_MODULEID_MASK) >> DBGLOG_MODULEID_OFFSET)
56068 +
56069 +#define DBGLOG_GET_NUMARGS(arg) \
56070 +    ((arg & DBGLOG_NUM_ARGS_MASK) >> DBGLOG_NUM_ARGS_OFFSET)
56071 +
56072 +#define DBGLOG_GET_TIMESTAMP(arg) \
56073 +    ((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET)
56074 +
56075 +#ifdef __cplusplus
56076 +}
56077 +#endif
56078 +
56079 +#endif /* _DBGLOG_API_H_ */
56080 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog.h
56081 ===================================================================
56082 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56083 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog.h   2008-12-11 22:46:49.000000000 +0100
56084 @@ -0,0 +1,107 @@
56085 +/*
56086 + * Copyright (c) 2004-2007 Atheros Communications Inc.
56087 + * All rights reserved.
56088 + *
56089 + * $ATH_LICENSE_HOSTSDK0_C$
56090 + *
56091 + * This file contains the definitions and data structures associated with
56092 + * the log based debug mechanism.
56093 + *
56094 + */
56095 +
56096 +#ifndef _DBGLOG_H_
56097 +#define _DBGLOG_H_
56098 +
56099 +#ifdef __cplusplus
56100 +extern "C" {
56101 +#endif
56102 +
56103 +#define DBGLOG_TIMESTAMP_OFFSET          0
56104 +#define DBGLOG_TIMESTAMP_MASK            0x0000FFFF /* Bit 0-15. Contains bit
56105 +                                                       8-23 of the LF0 timer */
56106 +#define DBGLOG_DBGID_OFFSET              16
56107 +#define DBGLOG_DBGID_MASK                0x03FF0000 /* Bit 16-25 */
56108 +#define DBGLOG_DBGID_NUM_MAX             256 /* Upper limit is width of mask */
56109 +
56110 +#define DBGLOG_MODULEID_OFFSET           26
56111 +#define DBGLOG_MODULEID_MASK             0x3C000000 /* Bit 26-29 */
56112 +#define DBGLOG_MODULEID_NUM_MAX          16 /* Upper limit is width of mask */
56113 +
56114 +/*
56115 + * Please ensure that the definition of any new module intrduced is captured
56116 + * between the DBGLOG_MODULEID_START and DBGLOG_MODULEID_END defines. The
56117 + * structure is required for the parser to correctly pick up the values for
56118 + * different modules.
56119 + */
56120 +#define DBGLOG_MODULEID_START
56121 +#define DBGLOG_MODULEID_INF                   0
56122 +#define DBGLOG_MODULEID_WMI                   1
56123 +#define DBGLOG_MODULEID_CSERV                 2
56124 +#define DBGLOG_MODULEID_PM                    3
56125 +#define DBGLOG_MODULEID_TXRX_MGMTBUF          4
56126 +#define DBGLOG_MODULEID_TXRX_TXBUF            5
56127 +#define DBGLOG_MODULEID_TXRX_RXBUF            6
56128 +#define DBGLOG_MODULEID_WOW                   7
56129 +#define DBGLOG_MODULEID_WHAL                  8
56130 +#define DBGLOG_MODULEID_END
56131 +
56132 +#define DBGLOG_NUM_ARGS_OFFSET             30
56133 +#define DBGLOG_NUM_ARGS_MASK               0xC0000000 /* Bit 30-31 */
56134 +#define DBGLOG_NUM_ARGS_MAX                2 /* Upper limit is width of mask */
56135 +
56136 +#define DBGLOG_MODULE_LOG_ENABLE_OFFSET    0
56137 +#define DBGLOG_MODULE_LOG_ENABLE_MASK      0x0000FFFF
56138 +
56139 +#define DBGLOG_REPORTING_ENABLED_OFFSET    16
56140 +#define DBGLOG_REPORTING_ENABLED_MASK      0x00010000
56141 +
56142 +#define DBGLOG_TIMESTAMP_RESOLUTION_OFFSET 17
56143 +#define DBGLOG_TIMESTAMP_RESOLUTION_MASK   0x000E0000
56144 +
56145 +#define DBGLOG_REPORT_SIZE_OFFSET          20
56146 +#define DBGLOG_REPORT_SIZE_MASK            0x3FF00000
56147 +
56148 +#define DBGLOG_LOG_BUFFER_SIZE             1500
56149 +#define DBGLOG_DBGID_DEFINITION_LEN_MAX    64
56150 +
56151 +struct dbglog_buf_s {
56152 +    struct dbglog_buf_s *next;
56153 +    A_INT8              *buffer;
56154 +    A_UINT32             bufsize;
56155 +    A_UINT32             length;
56156 +    A_UINT32             count;
56157 +    A_UINT32             free;
56158 +};
56159 +
56160 +struct dbglog_hdr_s {
56161 +    struct dbglog_buf_s *dbuf;
56162 +    A_UINT32             dropped;
56163 +};
56164 +
56165 +struct dbglog_config_s {
56166 +    A_UINT32                    cfgvalid; /* Mask with valid config bits */
56167 +    union {
56168 +        /* TODO: Take care of endianness */
56169 +        struct {
56170 +            A_UINT32            mmask:16; /* Mask of modules with logging on */
56171 +            A_UINT32            rep:1; /* Reporting enabled or not */
56172 +            A_UINT32            tsr:3; /* Time stamp resolution. Def: 1 ms */
56173 +            A_UINT32            size:10; /* Report size in number of messages */
56174 +            A_UINT32            reserved:2;
56175 +        } dbglog_config;
56176 +
56177 +        A_UINT32                value;
56178 +    } u;
56179 +};
56180 +
56181 +#define cfgmmask                   u.dbglog_config.mmask
56182 +#define cfgrep                     u.dbglog_config.rep
56183 +#define cfgtsr                     u.dbglog_config.tsr
56184 +#define cfgsize                    u.dbglog_config.size
56185 +#define cfgvalue                   u.value
56186 +
56187 +#ifdef __cplusplus
56188 +}
56189 +#endif
56190 +
56191 +#endif /* _DBGLOG_H_ */
56192 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h
56193 ===================================================================
56194 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56195 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dbglog_id.h        2008-12-11 22:46:49.000000000 +0100
56196 @@ -0,0 +1,307 @@
56197 +/*
56198 + *
56199 + * Copyright (c) 2004-2007 Atheros Communications Inc.
56200 + * All rights reserved.
56201 + *
56202 + * $ATH_LICENSE_HOSTSDK0_C$
56203 + *
56204 + * This file contains the definitions of the debug identifiers for different
56205 + * modules.
56206 + *
56207 + */
56208 +
56209 +#ifndef _DBGLOG_ID_H_
56210 +#define _DBGLOG_ID_H_
56211 +
56212 +#ifdef __cplusplus
56213 +extern "C" {
56214 +#endif
56215 +
56216 +/*
56217 + * The nomenclature for the debug identifiers is MODULE_DESCRIPTION.
56218 + * Please ensure that the definition of any new debugid introduced is captured
56219 + * between the <MODULE>_DBGID_DEFINITION_START and
56220 + * <MODULE>_DBGID_DEFINITION_END defines. The structure is required for the
56221 + * parser to correctly pick up the values for different debug identifiers.
56222 + */
56223 +
56224 +/* INF debug identifier definitions */
56225 +#define INF_DBGID_DEFINITION_START
56226 +#define INF_ASSERTION_FAILED                          1
56227 +#define INF_TARGET_ID                                 2
56228 +#define INF_DBGID_DEFINITION_END
56229 +
56230 +/* WMI debug identifier definitions */
56231 +#define WMI_DBGID_DEFINITION_START
56232 +#define WMI_CMD_RX_XTND_PKT_TOO_SHORT                 1
56233 +#define WMI_EXTENDED_CMD_NOT_HANDLED                  2
56234 +#define WMI_CMD_RX_PKT_TOO_SHORT                      3
56235 +#define WMI_CALLING_WMI_EXTENSION_FN                  4
56236 +#define WMI_CMD_NOT_HANDLED                           5
56237 +#define WMI_IN_SYNC                                   6
56238 +#define WMI_TARGET_WMI_SYNC_CMD                       7
56239 +#define WMI_SET_SNR_THRESHOLD_PARAMS                  8
56240 +#define WMI_SET_RSSI_THRESHOLD_PARAMS                 9
56241 +#define WMI_SET_LQ_TRESHOLD_PARAMS                   10
56242 +#define WMI_TARGET_CREATE_PSTREAM_CMD                11
56243 +#define WMI_WI_DTM_INUSE                             12
56244 +#define WMI_TARGET_DELETE_PSTREAM_CMD                13
56245 +#define WMI_TARGET_IMPLICIT_DELETE_PSTREAM_CMD       14
56246 +#define WMI_TARGET_GET_BIT_RATE_CMD                  15
56247 +#define WMI_GET_RATE_MASK_CMD_FIX_RATE_MASK_IS       16
56248 +#define WMI_TARGET_GET_AVAILABLE_CHANNELS_CMD        17
56249 +#define WMI_TARGET_GET_TX_PWR_CMD                    18
56250 +#define WMI_FREE_EVBUF_WMIBUF                        19
56251 +#define WMI_FREE_EVBUF_DATABUF                       20
56252 +#define WMI_FREE_EVBUF_BADFLAG                       21
56253 +#define WMI_HTC_RX_ERROR_DATA_PACKET                 22
56254 +#define WMI_HTC_RX_SYNC_PAUSING_FOR_MBOX             23
56255 +#define WMI_INCORRECT_WMI_DATA_HDR_DROPPING_PKT      24
56256 +#define WMI_SENDING_READY_EVENT                      25
56257 +#define WMI_SETPOWER_MDOE_TO_MAXPERF                 26
56258 +#define WMI_SETPOWER_MDOE_TO_REC                     27
56259 +#define WMI_BSSINFO_EVENT_FROM                       28
56260 +#define WMI_TARGET_GET_STATS_CMD                     29
56261 +#define WMI_SENDING_SCAN_COMPLETE_EVENT              30
56262 +#define WMI_SENDING_RSSI_INDB_THRESHOLD_EVENT        31
56263 +#define WMI_SENDING_RSSI_INDBM_THRESHOLD_EVENT       32
56264 +#define WMI_SENDING_LINK_QUALITY_THRESHOLD_EVENT     33
56265 +#define WMI_SENDING_ERROR_REPORT_EVENT               34
56266 +#define WMI_SENDING_CAC_EVENT                        35
56267 +#define WMI_TARGET_GET_ROAM_TABLE_CMD                36
56268 +#define WMI_TARGET_GET_ROAM_DATA_CMD                 37
56269 +#define WMI_SENDING_GPIO_INTR_EVENT                  38
56270 +#define WMI_SENDING_GPIO_ACK_EVENT                   39
56271 +#define WMI_SENDING_GPIO_DATA_EVENT                  40
56272 +#define WMI_CMD_RX                                   41
56273 +#define WMI_CMD_RX_XTND                              42
56274 +#define WMI_EVENT_SEND                               43
56275 +#define WMI_EVENT_SEND_XTND                          44
56276 +#define WMI_DBGID_DEFINITION_END
56277 +
56278 +/* CSERV debug identifier definitions */
56279 +#define CSERV_DBGID_DEFINITION_START
56280 +#define CSERV_BEGIN_SCAN1                             1
56281 +#define CSERV_BEGIN_SCAN2                             2
56282 +#define CSERV_END_SCAN1                               3
56283 +#define CSERV_END_SCAN2                               4
56284 +#define CSERV_CHAN_SCAN_START                         5
56285 +#define CSERV_CHAN_SCAN_STOP                          6
56286 +#define CSERV_CHANNEL_OPPPORTUNITY                    7
56287 +#define CSERV_NC_TIMEOUT                              8
56288 +#define CSERV_BACK_HOME                              10
56289 +#define CSERV_CHMGR_CH_CALLBACK1                     11
56290 +#define CSERV_CHMGR_CH_CALLBACK2                     12
56291 +#define CSERV_CHMGR_CH_CALLBACK3                     13
56292 +#define CSERV_SET_SCAN_PARAMS1                       14
56293 +#define CSERV_SET_SCAN_PARAMS2                       15
56294 +#define CSERV_SET_SCAN_PARAMS3                       16
56295 +#define CSERV_SET_SCAN_PARAMS4                       17
56296 +#define CSERV_ABORT_SCAN                             18
56297 +#define CSERV_NEWSTATE                               19
56298 +#define CSERV_MINCHMGR_OP_END                        20
56299 +#define CSERV_CHMGR_OP_END                           21
56300 +#define CSERV_DISCONNECT_TIMEOUT                     22
56301 +#define CSERV_ROAM_TIMEOUT                           23
56302 +#define CSERV_FORCE_SCAN1                            24
56303 +#define CSERV_FORCE_SCAN2                            25
56304 +#define CSERV_FORCE_SCAN3                            26
56305 +#define CSERV_UTIL_TIMEOUT                           27
56306 +#define CSERV_RSSIPOLLER                             28
56307 +#define CSERV_RETRY_CONNECT_TIMEOUT                  29
56308 +#define CSERV_RSSIINDBMPOLLER                        30
56309 +#define CSERV_BGSCAN_ENABLE                          31
56310 +#define CSERV_BGSCAN_DISABLE                         32
56311 +#define CSERV_WLAN_START_SCAN_CMD1                   33
56312 +#define CSERV_WLAN_START_SCAN_CMD2                   34
56313 +#define CSERV_WLAN_START_SCAN_CMD3                   35
56314 +#define CSERV_START_SCAN_CMD                         36
56315 +#define CSERV_START_FORCE_SCAN                       37
56316 +#define CSERV_NEXT_CHAN                              38
56317 +#define CSERV_SET_REGCODE                            39
56318 +#define CSERV_START_ADHOC                            40
56319 +#define CSERV_ADHOC_AT_HOME                          41
56320 +#define CSERV_OPT_AT_HOME                            42
56321 +#define CSERV_WLAN_CONNECT_CMD                       43
56322 +#define CSERV_WLAN_RECONNECT_CMD                     44
56323 +#define CSERV_WLAN_DISCONNECT_CMD                    45
56324 +#define CSERV_BSS_CHANGE_CHANNEL                     46
56325 +#define CSERV_BEACON_RX                              47
56326 +#define CSERV_KEEPALIVE_CHECK                        48
56327 +#define CSERV_RC_BEGIN_SCAN                          49
56328 +#define CSERV_RC_SCAN_START                          50
56329 +#define CSERV_RC_SCAN_STOP                           51
56330 +#define CSERV_RC_NEXT                                52
56331 +#define CSERV_RC_SCAN_END                            53
56332 +#define CSERV_PROBE_CALLBACK                         54
56333 +#define CSERV_ROAM1                                  55
56334 +#define CSERV_ROAM2                                  56
56335 +#define CSERV_ROAM3                                  57
56336 +#define CSERV_CONNECT_EVENT                          58
56337 +#define CSERV_DISCONNECT_EVENT                       59
56338 +#define CSERV_BMISS_HANDLER1                         60
56339 +#define CSERV_BMISS_HANDLER2                         61
56340 +#define CSERV_BMISS_HANDLER3                         62
56341 +#define CSERV_LOWRSSI_HANDLER                        63
56342 +#define CSERV_WLAN_SET_PMKID_CMD                     64
56343 +#define CSERV_RECONNECT_REQUEST                      65
56344 +#define CSERV_KEYSPLUMBED_EVENT                      66
56345 +#define CSERV_NEW_REG                                67
56346 +#define CSERV_SET_RSSI_THOLD                         68
56347 +#define CSERV_RSSITHRESHOLDCHECK                     69
56348 +#define CSERV_RSSIINDBMTHRESHOLDCHECK                70
56349 +#define CSERV_WLAN_SET_OPT_CMD1                      71
56350 +#define CSERV_WLAN_SET_OPT_CMD2                      72
56351 +#define CSERV_WLAN_SET_OPT_CMD3                      73
56352 +#define CSERV_WLAN_SET_OPT_CMD4                      74
56353 +#define CSERV_SCAN_CONNECT_STOP                      75
56354 +#define CSERV_BMISS_HANDLER4                         76
56355 +#define CSERV_INITIALIZE_TIMER                       77
56356 +#define CSERV_ARM_TIMER                              78
56357 +#define CSERV_DISARM_TIMER                           79
56358 +#define CSERV_UNINITIALIZE_TIMER                     80
56359 +#define CSERV_DISCONNECT_EVENT2                      81
56360 +#define CSERV_SCAN_CONNECT_START                     82
56361 +#define CSERV_BSSINFO_MEMORY_ALLOC_FAILED            83
56362 +#define CSERV_SET_SCAN_PARAMS5                       84
56363 +#define CSERV_DBGID_DEFINITION_END
56364 +
56365 +/* TXRX debug identifier definitions */
56366 +#define TXRX_TXBUF_DBGID_DEFINITION_START
56367 +#define TXRX_TXBUF_ALLOCATE_BUF                      1
56368 +#define TXRX_TXBUF_QUEUE_BUF_TO_MBOX                 2
56369 +#define TXRX_TXBUF_QUEUE_BUF_TO_TXQ                  3
56370 +#define TXRX_TXBUF_TXQ_DEPTH                         4
56371 +#define TXRX_TXBUF_IBSS_QUEUE_TO_SFQ                 5
56372 +#define TXRX_TXBUF_IBSS_QUEUE_TO_TXQ_FRM_SFQ         6
56373 +#define TXRX_TXBUF_INITIALIZE_TIMER                  7
56374 +#define TXRX_TXBUF_ARM_TIMER                         8
56375 +#define TXRX_TXBUF_DISARM_TIMER                      9
56376 +#define TXRX_TXBUF_UNINITIALIZE_TIMER                10
56377 +#define TXRX_TXBUF_DBGID_DEFINITION_END
56378 +
56379 +#define TXRX_RXBUF_DBGID_DEFINITION_START
56380 +#define TXRX_RXBUF_ALLOCATE_BUF                      1
56381 +#define TXRX_RXBUF_QUEUE_TO_HOST                     2
56382 +#define TXRX_RXBUF_QUEUE_TO_WLAN                     3
56383 +#define TXRX_RXBUF_ZERO_LEN_BUF                      4
56384 +#define TXRX_RXBUF_QUEUE_TO_HOST_LASTBUF_IN_RXCHAIN  5
56385 +#define TXRX_RXBUF_LASTBUF_IN_RXCHAIN_ZEROBUF        6
56386 +#define TXRX_RXBUF_QUEUE_EMPTY_QUEUE_TO_WLAN         7
56387 +#define TXRX_RXBUF_SEND_TO_RECV_MGMT                 8
56388 +#define TXRX_RXBUF_SEND_TO_IEEE_LAYER                9
56389 +#define TXRX_RXBUF_DBGID_DEFINITION_END
56390 +
56391 +#define TXRX_MGMTBUF_DBGID_DEFINITION_START
56392 +#define TXRX_MGMTBUF_ALLOCATE_BUF                    1
56393 +#define TXRX_MGMTBUF_ALLOCATE_SM_BUF                 2
56394 +#define TXRX_MGMTBUF_ALLOCATE_RMBUF                  3
56395 +#define TXRX_MGMTBUF_GET_BUF                         4
56396 +#define TXRX_MGMTBUF_GET_SM_BUF                      5
56397 +#define TXRX_MGMTBUF_QUEUE_BUF_TO_TXQ                6
56398 +#define TXRX_MGMTBUF_REAPED_BUF                      7
56399 +#define TXRX_MGMTBUF_REAPED_SM_BUF                   8
56400 +#define TXRX_MGMTBUF_WAIT_FOR_TXQ_DRAIN              9
56401 +#define TXRX_MGMTBUF_WAIT_FOR_TXQ_SFQ_DRAIN          10
56402 +#define TXRX_MGMTBUF_ENQUEUE_INTO_SFQ                11
56403 +#define TXRX_MGMTBUF_DEQUEUE_FROM_SFQ                12
56404 +#define TXRX_MGMTBUF_PAUSE_TXQ                       13
56405 +#define TXRX_MGMTBUF_RESUME_TXQ                      14
56406 +#define TXRX_MGMTBUF_WAIT_FORTXQ_DRAIN_TIMEOUT       15
56407 +#define TXRX_MGMTBUF_DRAINQ                          16
56408 +#define TXRX_MGMTBUF_INDICATE_Q_DRAINED              17
56409 +#define TXRX_MGMTBUF_DBGID_DEFINITION_END
56410 +
56411 +/* PM (Power Module) debug identifier definitions */
56412 +#define PM_DBGID_DEFINITION_START
56413 +#define PM_INIT                                      1
56414 +#define PM_ENABLE                                    2
56415 +#define PM_SET_STATE                                 3
56416 +#define PM_SET_POWERMODE                             4
56417 +#define PM_CONN_NOTIFY                               5
56418 +#define PM_REF_COUNT_NEGATIVE                        6
56419 +#define PM_APSD_ENABLE                               7
56420 +#define PM_UPDATE_APSD_STATE                         8
56421 +#define PM_CHAN_OP_REQ                               9
56422 +#define PM_SET_MY_BEACON_POLICY                      10
56423 +#define PM_SET_ALL_BEACON_POLICY                     11
56424 +#define PM_SET_PM_PARAMS1                            12
56425 +#define PM_SET_PM_PARAMS2                            13
56426 +#define PM_ADHOC_SET_PM_CAPS_FAIL                    14
56427 +#define PM_ADHOC_UNKNOWN_IBSS_ATTRIB_ID              15
56428 +#define PM_DBGID_DEFINITION_END
56429 +
56430 +/* Wake on Wireless debug identifier definitions */
56431 +#define WOW_DBGID_DEFINITION_START
56432 +#define WOW_INIT                                        1
56433 +#define WOW_GET_CONFIG_DSET                             2
56434 +#define WOW_NO_CONFIG_DSET                              3
56435 +#define WOW_INVALID_CONFIG_DSET                         4
56436 +#define WOW_USE_DEFAULT_CONFIG                          5
56437 +#define WOW_SETUP_GPIO                                  6
56438 +#define WOW_INIT_DONE                                   7
56439 +#define WOW_SET_GPIO_PIN                                8
56440 +#define WOW_CLEAR_GPIO_PIN                              9
56441 +#define WOW_SET_WOW_MODE_CMD                            10
56442 +#define WOW_SET_HOST_MODE_CMD                           11
56443 +#define WOW_ADD_WOW_PATTERN_CMD                         12
56444 +#define WOW_NEW_WOW_PATTERN_AT_INDEX                    13
56445 +#define WOW_DEL_WOW_PATTERN_CMD                         14
56446 +#define WOW_LIST_CONTAINS_PATTERNS                      15
56447 +#define WOW_GET_WOW_LIST_CMD                            16
56448 +#define WOW_INVALID_FILTER_ID                           17
56449 +#define WOW_INVALID_FILTER_LISTID                       18
56450 +#define WOW_NO_VALID_FILTER_AT_ID                       19
56451 +#define WOW_NO_VALID_LIST_AT_ID                         20
56452 +#define WOW_NUM_PATTERNS_EXCEEDED                       21
56453 +#define WOW_NUM_LISTS_EXCEEDED                          22
56454 +#define WOW_GET_WOW_STATS                               23
56455 +#define WOW_CLEAR_WOW_STATS                             24
56456 +#define WOW_WAKEUP_HOST                                 25
56457 +#define WOW_EVENT_WAKEUP_HOST                           26
56458 +#define WOW_EVENT_DISCARD                               27
56459 +#define WOW_PATTERN_MATCH                               28
56460 +#define WOW_PATTERN_NOT_MATCH                           29
56461 +#define WOW_PATTERN_NOT_MATCH_OFFSET                    30
56462 +#define WOW_DISABLED_HOST_ASLEEP                        31
56463 +#define WOW_ENABLED_HOST_ASLEEP_NO_PATTERNS             32
56464 +#define WOW_ENABLED_HOST_ASLEEP_NO_MATCH_FOUND          33
56465 +#define WOW_DBGID_DEFINITION_END
56466 +
56467 +/* WHAL debug identifier definitions */
56468 +#define WHAL_DBGID_DEFINITION_START
56469 +#define WHAL_ERROR_ANI_CONTROL                      1
56470 +#define WHAL_ERROR_CHIP_TEST1                       2
56471 +#define WHAL_ERROR_CHIP_TEST2                       3
56472 +#define WHAL_ERROR_EEPROM_CHECKSUM                  4
56473 +#define WHAL_ERROR_EEPROM_MACADDR                   5
56474 +#define WHAL_ERROR_INTERRUPT_HIU                    6
56475 +#define WHAL_ERROR_KEYCACHE_RESET                   7
56476 +#define WHAL_ERROR_KEYCACHE_SET                     8
56477 +#define WHAL_ERROR_KEYCACHE_TYPE                    9
56478 +#define WHAL_ERROR_KEYCACHE_TKIPENTRY              10
56479 +#define WHAL_ERROR_KEYCACHE_WEPLENGTH              11
56480 +#define WHAL_ERROR_PHY_INVALID_CHANNEL             12
56481 +#define WHAL_ERROR_POWER_AWAKE                     13
56482 +#define WHAL_ERROR_POWER_SET                       14
56483 +#define WHAL_ERROR_RECV_STOPDMA                    15
56484 +#define WHAL_ERROR_RECV_STOPPCU                    16
56485 +#define WHAL_ERROR_RESET_CHANNF1                   17
56486 +#define WHAL_ERROR_RESET_CHANNF2                   18
56487 +#define WHAL_ERROR_RESET_PM                        19
56488 +#define WHAL_ERROR_RESET_OFFSETCAL                 20
56489 +#define WHAL_ERROR_RESET_RFGRANT                   21
56490 +#define WHAL_ERROR_RESET_RXFRAME                   22
56491 +#define WHAL_ERROR_RESET_STOPDMA                   23
56492 +#define WHAL_ERROR_RESET_RECOVER                   24
56493 +#define WHAL_ERROR_XMIT_COMPUTE                    25
56494 +#define WHAL_ERROR_XMIT_NOQUEUE                    26
56495 +#define WHAL_ERROR_XMIT_ACTIVEQUEUE                27
56496 +#define WHAL_ERROR_XMIT_BADTYPE                    28
56497 +#define WHAL_DBGID_DEFINITION_END
56498 +
56499 +#ifdef __cplusplus
56500 +}
56501 +#endif
56502 +
56503 +#endif /* _DBGLOG_ID_H_ */
56504 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dl_list.h
56505 ===================================================================
56506 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56507 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dl_list.h  2008-12-11 22:46:49.000000000 +0100
56508 @@ -0,0 +1,114 @@
56509 +/*
56510 + *
56511 + * Double-link list definitions (adapted from Atheros SDIO stack)
56512 + *
56513 + * Copyright (c) 2007 Atheros Communications Inc.
56514 + * All rights reserved.
56515 + *
56516 + *
56517 + *  This program is free software; you can redistribute it and/or modify
56518 + *  it under the terms of the GNU General Public License version 2 as
56519 + *  published by the Free Software Foundation;
56520 + *
56521 + *  Software distributed under the License is distributed on an "AS
56522 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
56523 + *  implied. See the License for the specific language governing
56524 + *  rights and limitations under the License.
56525 + *
56526 + *
56527 + *
56528 + */
56529 +#ifndef __DL_LIST_H___
56530 +#define __DL_LIST_H___
56531 +
56532 +#define A_CONTAINING_STRUCT(address, struct_type, field_name)\
56533 +            ((struct_type *)((A_UINT32)(address) - (A_UINT32)(&((struct_type *)0)->field_name)))
56534 +
56535 +/* list functions */
56536 +/* pointers for the list */
56537 +typedef struct _DL_LIST {
56538 +    struct _DL_LIST *pPrev;
56539 +    struct _DL_LIST *pNext;
56540 +}DL_LIST, *PDL_LIST;
56541 +/*
56542 + * DL_LIST_INIT , initialize doubly linked list
56543 +*/
56544 +#define DL_LIST_INIT(pList)\
56545 +    {(pList)->pPrev = pList; (pList)->pNext = pList;}
56546 +
56547 +#define DL_LIST_IS_EMPTY(pList) (((pList)->pPrev == (pList)) && ((pList)->pNext == (pList)))
56548 +#define DL_LIST_GET_ITEM_AT_HEAD(pList) (pList)->pNext
56549 +#define DL_LIST_GET_ITEM_AT_TAIL(pList) (pList)->pPrev
56550 +/*
56551 + * ITERATE_OVER_LIST pStart is the list, pTemp is a temp list member
56552 + * NOT: do not use this function if the items in the list are deleted inside the
56553 + * iteration loop
56554 +*/
56555 +#define ITERATE_OVER_LIST(pStart, pTemp) \
56556 +    for((pTemp) =(pStart)->pNext; pTemp != (pStart); (pTemp) = (pTemp)->pNext)
56557 +
56558 +
56559 +/* safe iterate macro that allows the item to be removed from the list
56560 + * the iteration continues to the next item in the list
56561 + */
56562 +#define ITERATE_OVER_LIST_ALLOW_REMOVE(pStart,pItem,st,offset)  \
56563 +{                                                       \
56564 +    PDL_LIST  pTemp;                                     \
56565 +    pTemp = (pStart)->pNext;                            \
56566 +    while (pTemp != (pStart)) {                         \
56567 +        (pItem) = A_CONTAINING_STRUCT(pTemp,st,offset);   \
56568 +         pTemp = pTemp->pNext;                          \
56569 +
56570 +#define ITERATE_END }}
56571 +
56572 +/*
56573 + * DL_ListInsertTail - insert pAdd to the end of the list
56574 +*/
56575 +static INLINE PDL_LIST DL_ListInsertTail(PDL_LIST pList, PDL_LIST pAdd) {
56576 +        /* insert at tail */
56577 +    pAdd->pPrev = pList->pPrev;
56578 +    pAdd->pNext = pList;
56579 +    pList->pPrev->pNext = pAdd;
56580 +    pList->pPrev = pAdd;
56581 +    return pAdd;
56582 +}
56583 +
56584 +/*
56585 + * DL_ListInsertHead - insert pAdd into the head of the list
56586 +*/
56587 +static INLINE PDL_LIST DL_ListInsertHead(PDL_LIST pList, PDL_LIST pAdd) {
56588 +        /* insert at head */
56589 +    pAdd->pPrev = pList;
56590 +    pAdd->pNext = pList->pNext;
56591 +    pList->pNext->pPrev = pAdd;
56592 +    pList->pNext = pAdd;
56593 +    return pAdd;
56594 +}
56595 +
56596 +#define DL_ListAdd(pList,pItem) DL_ListInsertHead((pList),(pItem))
56597 +/*
56598 + * DL_ListRemove - remove pDel from list
56599 +*/
56600 +static INLINE PDL_LIST DL_ListRemove(PDL_LIST pDel) {
56601 +    pDel->pNext->pPrev = pDel->pPrev;
56602 +    pDel->pPrev->pNext = pDel->pNext;
56603 +        /* point back to itself just to be safe, incase remove is called again */
56604 +    pDel->pNext = pDel;
56605 +    pDel->pPrev = pDel;
56606 +    return pDel;
56607 +}
56608 +
56609 +/*
56610 + * DL_ListRemoveItemFromHead - get a list item from the head
56611 +*/
56612 +static INLINE PDL_LIST DL_ListRemoveItemFromHead(PDL_LIST pList) {
56613 +    PDL_LIST pItem = NULL;
56614 +    if (pList->pNext != pList) {
56615 +        pItem = pList->pNext;
56616 +            /* remove the first item from head */
56617 +        DL_ListRemove(pItem);
56618 +    }
56619 +    return pItem;
56620 +}
56621 +
56622 +#endif /* __DL_LIST_H___ */
56623 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_api.h
56624 ===================================================================
56625 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56626 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_api.h 2008-12-11 22:46:49.000000000 +0100
56627 @@ -0,0 +1,63 @@
56628 +/*
56629 + * Copyright (c) 2004-2006 Atheros Communications Inc.
56630 + * All rights reserved.
56631 + *
56632 + *
56633 + *  This program is free software; you can redistribute it and/or modify
56634 + *  it under the terms of the GNU General Public License version 2 as
56635 + *  published by the Free Software Foundation;
56636 + *
56637 + *  Software distributed under the License is distributed on an "AS
56638 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
56639 + *  implied. See the License for the specific language governing
56640 + *  rights and limitations under the License.
56641 + *
56642 + *
56643 + *
56644 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/dset_api.h#1 $
56645 + *
56646 + * Host-side DataSet API.
56647 + *
56648 + */
56649 +
56650 +#ifndef _DSET_API_H_
56651 +#define _DSET_API_H_
56652 +
56653 +#ifdef __cplusplus
56654 +extern "C" {
56655 +#endif /* __cplusplus */
56656 +
56657 +/*
56658 + * Host-side DataSet support is optional, and is not
56659 + * currently required for correct operation.  To disable
56660 + * Host-side DataSet support, set this to 0.
56661 + */
56662 +#ifndef CONFIG_HOST_DSET_SUPPORT
56663 +#define CONFIG_HOST_DSET_SUPPORT 1
56664 +#endif
56665 +
56666 +/* Called to send a DataSet Open Reply back to the Target. */
56667 +A_STATUS wmi_dset_open_reply(struct wmi_t *wmip,
56668 +                             A_UINT32 status,
56669 +                             A_UINT32 access_cookie,
56670 +                             A_UINT32 size,
56671 +                             A_UINT32 version,
56672 +                             A_UINT32 targ_handle,
56673 +                             A_UINT32 targ_reply_fn,
56674 +                             A_UINT32 targ_reply_arg);
56675 +
56676 +/* Called to send a DataSet Data Reply back to the Target. */
56677 +A_STATUS wmi_dset_data_reply(struct wmi_t *wmip,
56678 +                             A_UINT32 status,
56679 +                             A_UINT8 *host_buf,
56680 +                             A_UINT32 length,
56681 +                             A_UINT32 targ_buf,
56682 +                             A_UINT32 targ_reply_fn,
56683 +                             A_UINT32 targ_reply_arg);
56684 +
56685 +#ifdef __cplusplus
56686 +}
56687 +#endif /* __cplusplus */
56688 +
56689 +
56690 +#endif /* _DSET_API_H_ */
56691 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dsetid.h
56692 ===================================================================
56693 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56694 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dsetid.h   2008-12-11 22:46:49.000000000 +0100
56695 @@ -0,0 +1,110 @@
56696 +/*
56697 + * Copyright (c) 2004-2007 Atheros Communications Inc.
56698 + * All rights reserved.
56699 + *
56700 + * $ATH_LICENSE_HOSTSDK0_C$
56701 + *
56702 + */
56703 +
56704 +#ifndef __DSETID_H__
56705 +#define __DSETID_H__
56706 +
56707 +/* Well-known DataSet IDs */
56708 +#define DSETID_UNUSED                     0x00000000
56709 +#define DSETID_BOARD_DATA                 0x00000001 /* Cal and board data */
56710 +#define DSETID_REGDB                      0x00000002 /* Regulatory Database */
56711 +#define DSETID_POWER_CONTROL              0x00000003 /* TX Pwr Lim & Ant Gain */
56712 +#define DSETID_USER_CONFIG                0x00000004 /* User Configuration */
56713 +
56714 +#define DSETID_ANALOG_CONTROL_DATA_START  0x00000005
56715 +#define DSETID_ANALOG_CONTROL_DATA_END    0x00000025
56716 +/*
56717 + * Get DSETID for various reference clock speeds.
56718 + * For each speed there are three DataSets that correspond
56719 + * to the three columns of bank6 data (addr, 11a, 11b/g).
56720 + * This macro returns the dsetid of the first of those
56721 + * three DataSets.
56722 + */
56723 +#define ANALOG_CONTROL_DATA_DSETID(refclk) \
56724 +        (DSETID_ANALOG_CONTROL_DATA_START + 3*refclk)
56725 +
56726 +/*
56727 + * There are TWO STARTUP_PATCH DataSets.
56728 + * DSETID_STARTUP_PATCH is historical, and was applied before BMI on
56729 + * earlier systems.  On AR6002, it is applied after BMI, just like
56730 + * DSETID_STARTUP_PATCH2.
56731 + */
56732 +#define DSETID_STARTUP_PATCH              0x00000026
56733 +#define DSETID_GPIO_CONFIG_PATCH          0x00000027
56734 +#define DSETID_WLANREGS                   0x00000028 /* override wlan regs */
56735 +#define DSETID_STARTUP_PATCH2             0x00000029
56736 +
56737 +#define DSETID_WOW_CONFIG                 0x00000090 /* WoW Configuration */
56738 +
56739 +/* Add WHAL_INI_DATA_ID to DSETID_INI_DATA for a specific WHAL INI table. */
56740 +#define DSETID_INI_DATA                   0x00000100
56741 +/* Reserved for WHAL INI Tables: 0x100..0x11f */
56742 +#define DSETID_INI_DATA_END               0x0000011f
56743 +
56744 +#define DSETID_VENDOR_START               0x00010000 /* Vendor-defined DataSets */
56745 +
56746 +#define DSETID_INDEX_END                  0xfffffffe /* Reserved to indicate the
56747 +                                                        end of a memory-based
56748 +                                                        DataSet Index */
56749 +#define DSETID_INDEX_FREE                 0xffffffff /* An unused index entry */
56750 +
56751 +/*
56752 + * PATCH DataSet format:
56753 + * A list of patches, terminated by a patch with
56754 + * address=PATCH_END.
56755 + *
56756 + * This allows for patches to be stored in flash.
56757 + */
56758 +struct patch_s {
56759 +    A_UINT32 *address;
56760 +    A_UINT32  data;
56761 +};
56762 +
56763 +/*
56764 + * Skip some patches.  Can be used to erase a single patch in a
56765 + * patch DataSet without having to re-write the DataSet.  May
56766 + * also be used to embed information for use by subsequent
56767 + * patch code.  The "data" in a PATCH_SKIP tells how many
56768 + * bytes of length "patch_s" to skip.
56769 + */
56770 +#define PATCH_SKIP      ((A_UINT32 *)0x00000000)
56771 +
56772 +/*
56773 + * Execute code at the address specified by "data".
56774 + * The address of the patch structure is passed as
56775 + * the one parameter.
56776 + */
56777 +#define PATCH_CODE_ABS  ((A_UINT32 *)0x00000001)
56778 +
56779 +/*
56780 + * Same as PATCH_CODE_ABS, but treat "data" as an
56781 + * offset from the start of the patch word.
56782 + */
56783 +#define PATCH_CODE_REL  ((A_UINT32 *)0x00000002)
56784 +
56785 +/* Mark the end of this patch DataSet. */
56786 +#define PATCH_END       ((A_UINT32 *)0xffffffff)
56787 +
56788 +/*
56789 + * A DataSet which contains a Binary Patch to some other DataSet
56790 + * uses the original dsetid with the DSETID_BPATCH_FLAG bit set.
56791 + * Such a BPatch DataSet consists of BPatch metadata followed by
56792 + * the bdiff bytes.  BPatch metadata consists of a single 32-bit
56793 + * word that contains the size of the BPatched final image.
56794 + *
56795 + * To create a suitable bdiff DataSet, use bdiff in host/tools/bdiff
56796 + * to create "diffs":
56797 + *  bdiff -q -O -nooldmd5 -nonewmd5 -d ORIGfile NEWfile diffs
56798 + * Then add BPatch metadata to the start of "diffs".
56799 + *
56800 + * NB: There are some implementation-induced restrictions
56801 + * on which DataSets can be BPatched.
56802 + */
56803 +#define DSETID_BPATCH_FLAG                0x80000000
56804 +
56805 +#endif /* __DSETID_H__ */
56806 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_internal.h
56807 ===================================================================
56808 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56809 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/dset_internal.h    2008-12-11 22:46:49.000000000 +0100
56810 @@ -0,0 +1,39 @@
56811 +/*
56812 + * Copyright (c) 2007 Atheros Communications Inc.
56813 + * All rights reserved.
56814 + *
56815 + * $ATH_LICENSE_HOSTSDK0_C$
56816 + *
56817 + */
56818 +
56819 +#ifndef __DSET_INTERNAL_H__
56820 +#define __DSET_INTERNAL_H__
56821 +
56822 +/*
56823 + * Internal dset definitions, common for DataSet layer.
56824 + */
56825 +
56826 +#define DSET_TYPE_STANDARD      0
56827 +#define DSET_TYPE_BPATCHED      1
56828 +#define DSET_TYPE_COMPRESSED    2
56829 +
56830 +/* Dataset descriptor */
56831 +
56832 +typedef struct dset_descriptor_s {
56833 +  struct dset_descriptor_s  *next;         /* List link. NULL only at the last
56834 +                                              descriptor */
56835 +  A_UINT16                   id;           /* Dset ID */
56836 +  A_UINT16                   size;         /* Dset size. */
56837 +  void                      *DataPtr;      /* Pointer to raw data for standard
56838 +                                              DataSet or pointer to original
56839 +                                              dset_descriptor for patched
56840 +                                              DataSet */
56841 +  A_UINT32                   data_type;    /* DSET_TYPE_*, above */
56842 +
56843 +  void                      *AuxPtr;       /* Additional data that might
56844 +                                              needed for data_type. For
56845 +                                              example, pointer to patch
56846 +                                              Dataset descriptor for BPatch. */
56847 +} dset_descriptor_t;
56848 +
56849 +#endif /* __DSET_INTERNAL_H__ */
56850 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio_api.h
56851 ===================================================================
56852 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56853 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio_api.h 2008-12-11 22:46:49.000000000 +0100
56854 @@ -0,0 +1,57 @@
56855 +#ifndef _GPIO_API_H_
56856 +#define _GPIO_API_H_
56857 +/*
56858 + * Copyright 2005 Atheros Communications, Inc.,  All Rights Reserved.
56859 + *
56860 + *
56861 + *  This program is free software; you can redistribute it and/or modify
56862 + *  it under the terms of the GNU General Public License version 2 as
56863 + *  published by the Free Software Foundation;
56864 + *
56865 + *  Software distributed under the License is distributed on an "AS
56866 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
56867 + *  implied. See the License for the specific language governing
56868 + *  rights and limitations under the License.
56869 + *
56870 + *
56871 + *
56872 + */
56873 +
56874 +/*
56875 + * Host-side General Purpose I/O API.
56876 + *
56877 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/gpio_api.h#1 $
56878 + */
56879 +
56880 +/*
56881 + * Send a command to the Target in order to change output on GPIO pins.
56882 + */
56883 +A_STATUS wmi_gpio_output_set(struct wmi_t *wmip,
56884 +                             A_UINT32 set_mask,
56885 +                             A_UINT32 clear_mask,
56886 +                             A_UINT32 enable_mask,
56887 +                             A_UINT32 disable_mask);
56888 +
56889 +/*
56890 + * Send a command to the Target requesting input state of GPIO pins.
56891 + */
56892 +A_STATUS wmi_gpio_input_get(struct wmi_t *wmip);
56893 +
56894 +/*
56895 + * Send a command to the Target to change the value of a GPIO register.
56896 + */
56897 +A_STATUS wmi_gpio_register_set(struct wmi_t *wmip,
56898 +                               A_UINT32 gpioreg_id,
56899 +                               A_UINT32 value);
56900 +
56901 +/*
56902 + * Send a command to the Target to fetch the value of a GPIO register.
56903 + */
56904 +A_STATUS wmi_gpio_register_get(struct wmi_t *wmip, A_UINT32 gpioreg_id);
56905 +
56906 +/*
56907 + * Send a command to the Target, acknowledging some GPIO interrupts.
56908 + */
56909 +A_STATUS wmi_gpio_intr_ack(struct wmi_t *wmip, A_UINT32 ack_mask);
56910 +
56911 +#endif /* _GPIO_API_H_ */
56912 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio.h
56913 ===================================================================
56914 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56915 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/gpio.h     2008-12-11 22:46:49.000000000 +0100
56916 @@ -0,0 +1,34 @@
56917 +/*
56918 + * Copyright (c) 2005 Atheros Communications Inc.
56919 + * All rights reserved.
56920 + *
56921 + * $ATH_LICENSE_HOSTSDK0_C$
56922 + *
56923 + */
56924 +
56925 +#if defined(AR6001)
56926 +#define GPIO_PIN_COUNT 18
56927 +#else
56928 +#define GPIO_PIN_COUNT 18
56929 +#endif
56930 +
56931 +/*
56932 + * Possible values for WMIX_GPIO_SET_REGISTER_CMDID.
56933 + * NB: These match hardware order, so that addresses can
56934 + * easily be computed.
56935 + */
56936 +#define GPIO_ID_OUT             0x00000000
56937 +#define GPIO_ID_OUT_W1TS        0x00000001
56938 +#define GPIO_ID_OUT_W1TC        0x00000002
56939 +#define GPIO_ID_ENABLE          0x00000003
56940 +#define GPIO_ID_ENABLE_W1TS     0x00000004
56941 +#define GPIO_ID_ENABLE_W1TC     0x00000005
56942 +#define GPIO_ID_IN              0x00000006
56943 +#define GPIO_ID_STATUS          0x00000007
56944 +#define GPIO_ID_STATUS_W1TS     0x00000008
56945 +#define GPIO_ID_STATUS_W1TC     0x00000009
56946 +#define GPIO_ID_PIN0            0x0000000a
56947 +#define GPIO_ID_PIN(n)          (GPIO_ID_PIN0+(n))
56948 +
56949 +#define GPIO_LAST_REGISTER_ID   GPIO_ID_PIN(17)
56950 +#define GPIO_ID_NONE            0xffffffff
56951 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/hif.h
56952 ===================================================================
56953 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
56954 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/hif.h      2008-12-11 22:46:49.000000000 +0100
56955 @@ -0,0 +1,296 @@
56956 +/*
56957 + * Copyright (c) 2004-2007 Atheros Communications Inc.
56958 + * All rights reserved.
56959 + *
56960 + *
56961 + *  This program is free software; you can redistribute it and/or modify
56962 + *  it under the terms of the GNU General Public License version 2 as
56963 + *  published by the Free Software Foundation;
56964 + *
56965 + *  Software distributed under the License is distributed on an "AS
56966 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
56967 + *  implied. See the License for the specific language governing
56968 + *  rights and limitations under the License.
56969 + *
56970 + *
56971 + *
56972 + * HIF specific declarations and prototypes
56973 + */
56974 +
56975 +#ifndef _HIF_H_
56976 +#define _HIF_H_
56977 +
56978 +#ifdef __cplusplus
56979 +extern "C" {
56980 +#endif /* __cplusplus */
56981 +
56982 +/* Header files */
56983 +#include "a_config.h"
56984 +#include "athdefs.h"
56985 +#include "a_types.h"
56986 +#include "a_osapi.h"
56987 +
56988 +typedef struct htc_callbacks HTC_CALLBACKS;
56989 +typedef struct hif_device HIF_DEVICE;
56990 +
56991 +/*
56992 + * direction - Direction of transfer (HIF_READ/HIF_WRITE).
56993 + */
56994 +#define HIF_READ                    0x00000001
56995 +#define HIF_WRITE                   0x00000002
56996 +#define HIF_DIR_MASK                (HIF_READ | HIF_WRITE)
56997 +
56998 +/*
56999 + *     type - An interface may support different kind of read/write commands.
57000 + *            The command type is divided into a basic and an extended command
57001 + *            and can be specified using HIF_BASIC_IO/HIF_EXTENDED_IO.
57002 + */
57003 +#define HIF_BASIC_IO                0x00000004
57004 +#define HIF_EXTENDED_IO             0x00000008
57005 +#define HIF_TYPE_MASK               (HIF_BASIC_IO | HIF_EXTENDED_IO)
57006 +
57007 +/*
57008 + *     emode - This indicates the whether the command is to be executed in a
57009 + *             blocking or non-blocking fashion (HIF_SYNCHRONOUS/
57010 + *             HIF_ASYNCHRONOUS). The read/write data paths in HTC have been
57011 + *             implemented using the asynchronous mode allowing the the bus
57012 + *             driver to indicate the completion of operation through the
57013 + *             registered callback routine. The requirement primarily comes
57014 + *             from the contexts these operations get called from (a driver's
57015 + *             transmit context or the ISR context in case of receive).
57016 + *             Support for both of these modes is essential.
57017 + */
57018 +#define HIF_SYNCHRONOUS             0x00000010
57019 +#define HIF_ASYNCHRONOUS            0x00000020
57020 +#define HIF_EMODE_MASK              (HIF_SYNCHRONOUS | HIF_ASYNCHRONOUS)
57021 +
57022 +/*
57023 + *     dmode - An interface may support different kinds of commands based on
57024 + *             the tradeoff between the amount of data it can carry and the
57025 + *             setup time. Byte and Block modes are supported (HIF_BYTE_BASIS/
57026 + *             HIF_BLOCK_BASIS). In case of latter, the data is rounded off
57027 + *             to the nearest block size by padding. The size of the block is
57028 + *             configurable at compile time using the HIF_BLOCK_SIZE and is
57029 + *             negotiated with the target during initialization after the
57030 + *             dragon interrupts are enabled.
57031 + */
57032 +#define HIF_BYTE_BASIS              0x00000040
57033 +#define HIF_BLOCK_BASIS             0x00000080
57034 +#define HIF_DMODE_MASK              (HIF_BYTE_BASIS | HIF_BLOCK_BASIS)
57035 +
57036 +/*
57037 + *     amode - This indicates if the address has to be incremented on dragon
57038 + *             after every read/write operation (HIF?FIXED_ADDRESS/
57039 + *             HIF_INCREMENTAL_ADDRESS).
57040 + */
57041 +#define HIF_FIXED_ADDRESS           0x00000100
57042 +#define HIF_INCREMENTAL_ADDRESS     0x00000200
57043 +#define HIF_AMODE_MASK              (HIF_FIXED_ADDRESS | HIF_INCREMENTAL_ADDRESS)
57044 +
57045 +#define HIF_WR_ASYNC_BYTE_FIX   \
57046 +    (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
57047 +#define HIF_WR_ASYNC_BYTE_INC   \
57048 +    (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
57049 +#define HIF_WR_ASYNC_BLOCK_INC  \
57050 +    (HIF_WRITE | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
57051 +#define HIF_WR_SYNC_BYTE_FIX    \
57052 +    (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
57053 +#define HIF_WR_SYNC_BYTE_INC    \
57054 +    (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
57055 +#define HIF_WR_SYNC_BLOCK_INC  \
57056 +    (HIF_WRITE | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
57057 +#define HIF_RD_SYNC_BYTE_INC    \
57058 +    (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
57059 +#define HIF_RD_SYNC_BYTE_FIX    \
57060 +    (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
57061 +#define HIF_RD_ASYNC_BYTE_FIX   \
57062 +    (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_FIXED_ADDRESS)
57063 +#define HIF_RD_ASYNC_BLOCK_FIX  \
57064 +    (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_FIXED_ADDRESS)
57065 +#define HIF_RD_ASYNC_BYTE_INC   \
57066 +    (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BYTE_BASIS | HIF_INCREMENTAL_ADDRESS)
57067 +#define HIF_RD_ASYNC_BLOCK_INC  \
57068 +    (HIF_READ | HIF_ASYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
57069 +#define HIF_RD_SYNC_BLOCK_INC  \
57070 +    (HIF_READ | HIF_SYNCHRONOUS | HIF_EXTENDED_IO | HIF_BLOCK_BASIS | HIF_INCREMENTAL_ADDRESS)
57071 +
57072 +
57073 +typedef enum {
57074 +    HIF_DEVICE_POWER_STATE = 0,
57075 +    HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
57076 +    HIF_DEVICE_GET_MBOX_ADDR,
57077 +    HIF_DEVICE_GET_PENDING_EVENTS_FUNC,
57078 +    HIF_DEVICE_GET_IRQ_PROC_MODE,
57079 +    HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC,
57080 +} HIF_DEVICE_CONFIG_OPCODE;
57081 +
57082 +/*
57083 + * HIF CONFIGURE definitions:
57084 + *
57085 + *   HIF_DEVICE_GET_MBOX_BLOCK_SIZE
57086 + *   input : none
57087 + *   output : array of 4 A_UINT32s
57088 + *   notes: block size is returned for each mailbox (4)
57089 + *
57090 + *   HIF_DEVICE_GET_MBOX_ADDR
57091 + *   input : none
57092 + *   output : array of 4 A_UINT32
57093 + *   notes: address is returned for each mailbox (4) in the array
57094 + *
57095 + *   HIF_DEVICE_GET_PENDING_EVENTS_FUNC
57096 + *   input : none
57097 + *   output: HIF_PENDING_EVENTS_FUNC function pointer
57098 + *   notes: this is optional for the HIF layer, if the request is
57099 + *          not handled then it indicates that the upper layer can use
57100 + *          the standard device methods to get pending events (IRQs, mailbox messages etc..)
57101 + *          otherwise it can call the function pointer to check pending events.
57102 + *
57103 + *   HIF_DEVICE_GET_IRQ_PROC_MODE
57104 + *   input : none
57105 + *   output : HIF_DEVICE_IRQ_PROCESSING_MODE (interrupt processing mode)
57106 + *   note: the hif layer interfaces with the underlying OS-specific bus driver. The HIF
57107 + *         layer can report whether IRQ processing is requires synchronous behavior or
57108 + *         can be processed using asynchronous bus requests (typically faster).
57109 + *
57110 + *   HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC
57111 + *   input :
57112 + *   output : HIF_MASK_UNMASK_RECV_EVENT function pointer
57113 + *   notes: this is optional for the HIF layer.  The HIF layer may require a special mechanism
57114 + *          to mask receive message events.  The upper layer can call this pointer when it needs
57115 + *          to mask/unmask receive events (in case it runs out of buffers).
57116 + *
57117 + *
57118 + */
57119 +
57120 +typedef enum {
57121 +    HIF_DEVICE_IRQ_SYNC_ONLY,   /* for HIF implementations that require the DSR to process all
57122 +                                   interrupts before returning */
57123 +    HIF_DEVICE_IRQ_ASYNC_SYNC,  /* for HIF implementations that allow DSR to process interrupts
57124 +                                   using ASYNC I/O (that is HIFAckInterrupt can be called at a
57125 +                                   later time */
57126 +} HIF_DEVICE_IRQ_PROCESSING_MODE;
57127 +
57128 +#define HIF_MAX_DEVICES                 1
57129 +
57130 +struct htc_callbacks {
57131 +    A_UCHAR *name;
57132 +    A_UINT32 id;
57133 +    A_STATUS (* deviceInsertedHandler)(void *hif_handle);
57134 +    A_STATUS (* deviceRemovedHandler)(void *htc_handle, A_STATUS status);
57135 +    A_STATUS (* deviceSuspendHandler)(void *htc_handle);
57136 +    A_STATUS (* deviceResumeHandler)(void *htc_handle);
57137 +    A_STATUS (* deviceWakeupHandler)(void *htc_handle);
57138 +    A_STATUS (* rwCompletionHandler)(void *context, A_STATUS status);
57139 +    A_STATUS (* dsrHandler)(void *htc_handle);
57140 +};
57141 +
57142 +
57143 +#define HIF_OTHER_EVENTS     (1 << 0)   /* other interrupts (non-Recv) are pending, host
57144 +                                           needs to read the register table to figure out what */
57145 +#define HIF_RECV_MSG_AVAIL   (1 << 1)   /* pending recv packet */
57146 +
57147 +typedef struct _HIF_PENDING_EVENTS_INFO {
57148 +    A_UINT32 Events;
57149 +    A_UINT32 LookAhead;
57150 +} HIF_PENDING_EVENTS_INFO;
57151 +
57152 +    /* function to get pending events , some HIF modules use special mechanisms
57153 +     * to detect packet available and other interrupts */
57154 +typedef A_STATUS ( *HIF_PENDING_EVENTS_FUNC)(HIF_DEVICE              *device,
57155 +                                             HIF_PENDING_EVENTS_INFO *pEvents,
57156 +                                             void                    *AsyncContext);
57157 +
57158 +#define HIF_MASK_RECV    TRUE
57159 +#define HIF_UNMASK_RECV  FALSE
57160 +    /* function to mask recv events */
57161 +typedef A_STATUS ( *HIF_MASK_UNMASK_RECV_EVENT)(HIF_DEVICE  *device,
57162 +                                                A_BOOL      Mask,
57163 +                                                void        *AsyncContext);
57164 +
57165 +
57166 +/*
57167 + * This API is used by the HTC layer to initialize the HIF layer and to
57168 + * register different callback routines. Support for following events has
57169 + * been captured - DSR, Read/Write completion, Device insertion/removal,
57170 + * Device suspension/resumption/wakeup. In addition to this, the API is
57171 + * also used to register the name and the revision of the chip. The latter
57172 + * can be used to verify the revision of the chip read from the device
57173 + * before reporting it to HTC.
57174 + */
57175 +int HIFInit(HTC_CALLBACKS *callbacks);
57176 +
57177 +/*
57178 + * This API is used to provide the read/write interface over the specific bus
57179 + * interface.
57180 + * address - Starting address in the dragon's address space. For mailbox
57181 + *           writes, it refers to the start of the mbox boundary. It should
57182 + *           be ensured that the last byte falls on the mailbox's EOM. For
57183 + *           mailbox reads, it refers to the end of the mbox boundary.
57184 + * buffer - Pointer to the buffer containg the data to be transmitted or
57185 + *          received.
57186 + * length - Amount of data to be transmitted or received.
57187 + * request - Characterizes the attributes of the command.
57188 + */
57189 +A_STATUS
57190 +HIFReadWrite(HIF_DEVICE    *device,
57191 +             A_UINT32       address,
57192 +             A_UCHAR       *buffer,
57193 +             A_UINT32       length,
57194 +             A_UINT32       request,
57195 +             void          *context);
57196 +
57197 +/*
57198 + * This can be initiated from the unload driver context ie when the HTCShutdown
57199 + * routine is called.
57200 + */
57201 +void HIFShutDownDevice(HIF_DEVICE *device);
57202 +
57203 +/*
57204 + * This should translate to an acknowledgment to the bus driver indicating that
57205 + * the previous interrupt request has been serviced and the all the relevant
57206 + * sources have been cleared. HTC is ready to process more interrupts.
57207 + * This should prevent the bus driver from raising an interrupt unless the
57208 + * previous one has been serviced and acknowledged using the previous API.
57209 + */
57210 +void HIFAckInterrupt(HIF_DEVICE *device);
57211 +
57212 +void HIFMaskInterrupt(HIF_DEVICE *device);
57213 +
57214 +void HIFUnMaskInterrupt(HIF_DEVICE *device);
57215 +
57216 +/*
57217 + * This set of functions are to be used by the bus driver to notify
57218 + * the HIF module about various events.
57219 + * These are not implemented if the bus driver provides an alternative
57220 + * way for this notification though callbacks for instance.
57221 + */
57222 +int HIFInsertEventNotify(void);
57223 +
57224 +int HIFRemoveEventNotify(void);
57225 +
57226 +int HIFIRQEventNotify(void);
57227 +
57228 +int HIFRWCompleteEventNotify(void);
57229 +
57230 +/*
57231 + * This function associates a opaque handle with the HIF layer
57232 + * to be used in communication with upper layer i.e. HTC.
57233 + * This would normaly be a pointer to htc_target data structure.
57234 + */
57235 +void HIFSetHandle(void *hif_handle, void *handle);
57236 +
57237 +A_STATUS
57238 +HIFConfigureDevice(HIF_DEVICE *device, HIF_DEVICE_CONFIG_OPCODE opcode,
57239 +                   void *config, A_UINT32 configLen);
57240 +
57241 +
57242 +struct device;
57243 +struct device*
57244 +HIFGetOSDevice(HIF_DEVICE *device);
57245 +
57246 +
57247 +#ifdef __cplusplus
57248 +}
57249 +#endif
57250 +
57251 +#endif /* _HIF_H_ */
57252 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/host_version.h
57253 ===================================================================
57254 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
57255 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/host_version.h     2008-12-11 22:46:49.000000000 +0100
57256 @@ -0,0 +1,49 @@
57257 +#ifndef _HOST_VERSION_H_
57258 +#define _HOST_VERSION_H_
57259 +/*
57260 + * Copyright (c) 2004-2005 Atheros Communications Inc.
57261 + * All rights reserved.
57262 + *
57263 + * This file contains version information for the sample host driver for the
57264 + * AR6000 chip
57265 + *
57266 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/host_version.h#2 $
57267 + *
57268 + *
57269 + *  This program is free software; you can redistribute it and/or modify
57270 + *  it under the terms of the GNU General Public License version 2 as
57271 + *  published by the Free Software Foundation;
57272 + *
57273 + *  Software distributed under the License is distributed on an "AS
57274 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
57275 + *  implied. See the License for the specific language governing
57276 + *  rights and limitations under the License.
57277 + *
57278 + *
57279 + *
57280 + */
57281 +
57282 +#ifdef __cplusplus
57283 +extern "C" {
57284 +#endif
57285 +
57286 +#include <AR6K_version.h>
57287 +
57288 +/*
57289 + * The version number is made up of major, minor, patch and build
57290 + * numbers. These are 16 bit numbers.  The build and release script will
57291 + * set the build number using a Perforce counter.  Here the build number is
57292 + * set to 9999 so that builds done without the build-release script are easily
57293 + * identifiable.
57294 + */
57295 +
57296 +#define ATH_SW_VER_MAJOR      __VER_MAJOR_
57297 +#define ATH_SW_VER_MINOR      __VER_MINOR_
57298 +#define ATH_SW_VER_PATCH      __VER_PATCH_
57299 +#define ATH_SW_VER_BUILD 9999
57300 +
57301 +#ifdef __cplusplus
57302 +}
57303 +#endif
57304 +
57305 +#endif /* _HOST_VERSION_H_ */
57306 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_api.h
57307 ===================================================================
57308 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
57309 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_api.h  2008-12-11 22:46:49.000000000 +0100
57310 @@ -0,0 +1,436 @@
57311 +/*
57312 + *
57313 + * Copyright (c) 2007 Atheros Communications Inc.
57314 + * All rights reserved.
57315 + *
57316 + *
57317 + *  This program is free software; you can redistribute it and/or modify
57318 + *  it under the terms of the GNU General Public License version 2 as
57319 + *  published by the Free Software Foundation;
57320 + *
57321 + *  Software distributed under the License is distributed on an "AS
57322 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
57323 + *  implied. See the License for the specific language governing
57324 + *  rights and limitations under the License.
57325 + *
57326 + *
57327 + *
57328 + */
57329 +
57330 +#ifndef _HTC_API_H_
57331 +#define _HTC_API_H_
57332 +
57333 +#include <htc.h>
57334 +#include <htc_services.h>
57335 +#include "htc_packet.h"
57336 +
57337 +#ifdef __cplusplus
57338 +extern "C" {
57339 +#endif /* __cplusplus */
57340 +
57341 +/* TODO.. for BMI */
57342 +#define ENDPOINT1 0
57343 +// TODO -remove me, but we have to fix BMI first
57344 +#define HTC_MAILBOX_NUM_MAX    4
57345 +
57346 +
57347 +/* ------ Endpoint IDS ------ */
57348 +typedef enum
57349 +{
57350 +    ENDPOINT_UNUSED = -1,
57351 +    ENDPOINT_0 = 0,
57352 +    ENDPOINT_1 = 1,
57353 +    ENDPOINT_2 = 2,
57354 +    ENDPOINT_3,
57355 +    ENDPOINT_4,
57356 +    ENDPOINT_5,
57357 +    ENDPOINT_6,
57358 +    ENDPOINT_7,
57359 +    ENDPOINT_8,
57360 +    ENDPOINT_MAX,
57361 +} HTC_ENDPOINT_ID;
57362 +
57363 +/* this is the amount of header room required by users of HTC */
57364 +#define HTC_HEADER_LEN         HTC_HDR_LENGTH
57365 +
57366 +typedef void *HTC_HANDLE;
57367 +
57368 +typedef A_UINT16 HTC_SERVICE_ID;
57369 +
57370 +typedef struct _HTC_INIT_INFO {
57371 +    void   (*AddInstance)(HTC_HANDLE);
57372 +    void   (*DeleteInstance)(void *Instance);
57373 +    void   (*TargetFailure)(void *Instance, A_STATUS Status);
57374 +} HTC_INIT_INFO;
57375 +
57376 +/* per service connection send completion */
57377 +typedef void   (*HTC_EP_SEND_PKT_COMPLETE)(void *,HTC_PACKET *);
57378 +/* per service connection pkt received */
57379 +typedef void   (*HTC_EP_RECV_PKT)(void *,HTC_PACKET *);
57380 +
57381 +/* Optional per service connection receive buffer re-fill callback,
57382 + * On some OSes (like Linux) packets are allocated from a global pool and indicated up
57383 + * to the network stack.  The driver never gets the packets back from the OS.  For these OSes
57384 + * a refill callback can be used to allocate and re-queue buffers into HTC.
57385 + *
57386 + * On other OSes, the network stack can call into the driver's OS-specifc "return_packet" handler and
57387 + * the driver can re-queue these buffers into HTC. In this regard a refill callback is
57388 + * unnecessary */
57389 +typedef void   (*HTC_EP_RECV_REFILL)(void *, HTC_ENDPOINT_ID Endpoint);
57390 +
57391 +/* Optional per service connection callback when a send queue is full. This can occur if the
57392 + * host continues queueing up TX packets faster than credits can arrive
57393 + * To prevent the host (on some Oses like Linux) from continuously queueing packets
57394 + * and consuming resources, this callback is provided so that that the host
57395 + * can disable TX in the subsystem (i.e. network stack)
57396 + * Other OSes require a "per-packet" indication_RAW_STREAM_NUM_MAX for each completed TX packet, this
57397 + * closed loop mechanism will prevent the network stack from overunning the NIC */
57398 +typedef void (*HTC_EP_SEND_QUEUE_FULL)(void *, HTC_ENDPOINT_ID Endpoint);
57399 +
57400 +typedef struct _HTC_EP_CALLBACKS {
57401 +    void                     *pContext;     /* context for each callback */
57402 +    HTC_EP_SEND_PKT_COMPLETE EpTxComplete;  /* tx completion callback for connected endpoint */
57403 +    HTC_EP_RECV_PKT          EpRecv;        /* receive callback for connected endpoint */
57404 +    HTC_EP_RECV_REFILL       EpRecvRefill;  /* OPTIONAL receive re-fill callback for connected endpoint */
57405 +    HTC_EP_SEND_QUEUE_FULL   EpSendFull;    /* OPTIONAL send full callback */
57406 +} HTC_EP_CALLBACKS;
57407 +
57408 +/* service connection information */
57409 +typedef struct _HTC_SERVICE_CONNECT_REQ {
57410 +    HTC_SERVICE_ID   ServiceID;                 /* service ID to connect to */
57411 +    A_UINT16         ConnectionFlags;           /* connection flags, see htc protocol definition */
57412 +    A_UINT8         *pMetaData;                 /* ptr to optional service-specific meta-data */
57413 +    A_UINT8          MetaDataLength;            /* optional meta data length */
57414 +    HTC_EP_CALLBACKS EpCallbacks;               /* endpoint callbacks */
57415 +    int              MaxSendQueueDepth;         /* maximum depth of any send queue */
57416 +} HTC_SERVICE_CONNECT_REQ;
57417 +
57418 +/* service connection response information */
57419 +typedef struct _HTC_SERVICE_CONNECT_RESP {
57420 +    A_UINT8     *pMetaData;             /* caller supplied buffer to optional meta-data */
57421 +    A_UINT8     BufferLength;           /* length of caller supplied buffer */
57422 +    A_UINT8     ActualLength;           /* actual length of meta data */
57423 +    HTC_ENDPOINT_ID Endpoint;           /* endpoint to communicate over */
57424 +    int         MaxMsgLength;           /* max length of all messages over this endpoint */
57425 +    A_UINT8     ConnectRespCode;        /* connect response code from target */
57426 +} HTC_SERVICE_CONNECT_RESP;
57427 +
57428 +/* endpoint distribution structure */
57429 +typedef struct _HTC_ENDPOINT_CREDIT_DIST {
57430 +    struct _HTC_ENDPOINT_CREDIT_DIST *pNext;
57431 +    struct _HTC_ENDPOINT_CREDIT_DIST *pPrev;
57432 +    HTC_SERVICE_ID      ServiceID;          /* Service ID (set by HTC) */
57433 +    HTC_ENDPOINT_ID     Endpoint;           /* endpoint for this distribution struct (set by HTC) */
57434 +    A_UINT32            DistFlags;          /* distribution flags, distribution function can
57435 +                                               set default activity using SET_EP_ACTIVE() macro */
57436 +    int                 TxCreditsNorm;      /* credits for normal operation, anything above this
57437 +                                               indicates the endpoint is over-subscribed, this field
57438 +                                               is only relevant to the credit distribution function */
57439 +    int                 TxCreditsMin;       /* floor for credit distribution, this field is
57440 +                                               only relevant to the credit distribution function */
57441 +    int                 TxCreditsAssigned;  /* number of credits assigned to this EP, this field
57442 +                                               is only relevant to the credit dist function */
57443 +    int                 TxCredits;          /* current credits available, this field is used by
57444 +                                               HTC to determine whether a message can be sent or
57445 +                                               must be queued */
57446 +    int                 TxCreditsToDist;    /* pending credits to distribute on this endpoint, this
57447 +                                               is set by HTC when credit reports arrive.
57448 +                                               The credit distribution functions sets this to zero
57449 +                                               when it distributes the credits */
57450 +    int                 TxCreditsSeek;      /* this is the number of credits that the current pending TX
57451 +                                               packet needs to transmit.  This is set by HTC when
57452 +                                               and endpoint needs credits in order to transmit */
57453 +    int                 TxCreditSize;       /* size in bytes of each credit (set by HTC) */
57454 +    int                 TxCreditsPerMaxMsg; /* credits required for a maximum sized messages (set by HTC) */
57455 +    void                *pHTCReserved;      /* reserved for HTC use */
57456 +} HTC_ENDPOINT_CREDIT_DIST;
57457 +
57458 +#define HTC_EP_ACTIVE                            (1 << 31)
57459 +
57460 +/* macro to check if an endpoint has gone active, useful for credit
57461 + * distributions */
57462 +#define IS_EP_ACTIVE(epDist)  ((epDist)->DistFlags & HTC_EP_ACTIVE)
57463 +#define SET_EP_ACTIVE(epDist) (epDist)->DistFlags |= HTC_EP_ACTIVE
57464 +
57465 +    /* credit distibution code that is passed into the distrbution function,
57466 +     * there are mandatory and optional codes that must be handled */
57467 +typedef enum _HTC_CREDIT_DIST_REASON {
57468 +    HTC_CREDIT_DIST_SEND_COMPLETE = 0,     /* credits available as a result of completed
57469 +                                              send operations (MANDATORY) resulting in credit reports */
57470 +    HTC_CREDIT_DIST_ACTIVITY_CHANGE = 1,   /* a change in endpoint activity occured (OPTIONAL) */
57471 +    HTC_CREDIT_DIST_SEEK_CREDITS,          /* an endpoint needs to "seek" credits (OPTIONAL) */
57472 +    HTC_DUMP_CREDIT_STATE                  /* for debugging, dump any state information that is kept by
57473 +                                              the distribution function */
57474 +} HTC_CREDIT_DIST_REASON;
57475 +
57476 +typedef void (*HTC_CREDIT_DIST_CALLBACK)(void                     *Context,
57477 +                                         HTC_ENDPOINT_CREDIT_DIST *pEPList,
57478 +                                         HTC_CREDIT_DIST_REASON   Reason);
57479 +
57480 +typedef void (*HTC_CREDIT_INIT_CALLBACK)(void *Context,
57481 +                                         HTC_ENDPOINT_CREDIT_DIST *pEPList,
57482 +                                         int                      TotalCredits);
57483 +
57484 +    /* endpoint statistics action */
57485 +typedef enum _HTC_ENDPOINT_STAT_ACTION {
57486 +    HTC_EP_STAT_SAMPLE = 0,                /* only read statistics */
57487 +    HTC_EP_STAT_SAMPLE_AND_CLEAR = 1,      /* sample and immediately clear statistics */
57488 +    HTC_EP_STAT_CLEAR                      /* clear only */
57489 +} HTC_ENDPOINT_STAT_ACTION;
57490 +
57491 +    /* endpoint statistics */
57492 +typedef struct _HTC_ENDPOINT_STATS {
57493 +    A_UINT32  TxCreditLowIndications;  /* number of times the host set the credit-low flag in a send message on
57494 +                                        this endpoint */
57495 +    A_UINT32  TxIssued;               /* running count of TX packets issued */
57496 +    A_UINT32  TxCreditRpts;           /* running count of total credit reports received for this endpoint */
57497 +    A_UINT32  TxCreditRptsFromRx;
57498 +    A_UINT32  TxCreditRptsFromOther;
57499 +    A_UINT32  TxCreditRptsFromEp0;
57500 +    A_UINT32  TxCreditsFromRx;        /* count of credits received via Rx packets on this endpoint */
57501 +    A_UINT32  TxCreditsFromOther;     /* count of credits received via another endpoint */
57502 +    A_UINT32  TxCreditsFromEp0;       /* count of credits received via another endpoint */
57503 +    A_UINT32  TxCreditsConsummed;     /* count of consummed credits */
57504 +    A_UINT32  TxCreditsReturned;      /* count of credits returned */
57505 +    A_UINT32  RxReceived;             /* count of RX packets received */
57506 +    A_UINT32  RxLookAheads;           /* count of lookahead records
57507 +                                         found in messages received on this endpoint */
57508 +} HTC_ENDPOINT_STATS;
57509 +
57510 +/* ------ Function Prototypes ------ */
57511 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57512 +  @desc: Initialize HTC
57513 +  @function name: HTCInit
57514 +  @input:  pInfo - initialization information
57515 +  @output:
57516 +  @return: A_OK on success
57517 +  @notes: The caller initializes global HTC state and registers various instance
57518 +          notification callbacks (see HTC_INIT_INFO).
57519 +
57520 +  @example:
57521 +  @see also: HTCShutdown
57522 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57523 +A_STATUS    HTCInit(HTC_INIT_INFO *pInfo);
57524 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57525 +  @desc: Get the underlying HIF device handle
57526 +  @function name: HTCGetHifDevice
57527 +  @input:  HTCHandle - handle passed into the AddInstance callback
57528 +  @output:
57529 +  @return: opaque HIF device handle usable in HIF API calls.
57530 +  @notes:
57531 +  @example:
57532 +  @see also:
57533 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57534 +void       *HTCGetHifDevice(HTC_HANDLE HTCHandle);
57535 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57536 +  @desc: Set the associated instance for the HTC handle
57537 +  @function name: HTCSetInstance
57538 +  @input:  HTCHandle - handle passed into the AddInstance callback
57539 +           Instance - caller supplied instance object
57540 +  @output:
57541 +  @return:
57542 +  @notes:  Caller must set the instance information for the HTC handle in order to receive
57543 +           notifications for instance deletion (DeleteInstance callback is called) and for target
57544 +           failure notification.
57545 +  @example:
57546 +  @see also:
57547 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57548 +void        HTCSetInstance(HTC_HANDLE HTCHandle, void *Instance);
57549 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57550 +  @desc: Set credit distribution parameters
57551 +  @function name: HTCSetCreditDistribution
57552 +  @input:  HTCHandle - HTC handle
57553 +           pCreditDistCont - caller supplied context to pass into distribution functions
57554 +           CreditDistFunc - Distribution function callback
57555 +           CreditDistInit - Credit Distribution initialization callback
57556 +           ServicePriorityOrder - Array containing list of service IDs, lowest index is highest
57557 +                                  priority
57558 +           ListLength - number of elements in ServicePriorityOrder
57559 +  @output:
57560 +  @return:
57561 +  @notes:  The user can set a custom credit distribution function to handle special requirements
57562 +           for each endpoint.  A default credit distribution routine can be used by setting
57563 +           CreditInitFunc to NULL.  The default credit distribution is only provided for simple
57564 +           "fair" credit distribution without regard to any prioritization.
57565 +
57566 +  @example:
57567 +  @see also:
57568 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57569 +void        HTCSetCreditDistribution(HTC_HANDLE               HTCHandle,
57570 +                                     void                     *pCreditDistContext,
57571 +                                     HTC_CREDIT_DIST_CALLBACK CreditDistFunc,
57572 +                                     HTC_CREDIT_INIT_CALLBACK CreditInitFunc,
57573 +                                     HTC_SERVICE_ID           ServicePriorityOrder[],
57574 +                                     int                      ListLength);
57575 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57576 +  @desc: Wait for the target to indicate the HTC layer is ready
57577 +  @function name: HTCWaitTarget
57578 +  @input:  HTCHandle - HTC handle
57579 +  @output:
57580 +  @return:
57581 +  @notes:  This API blocks until the target responds with an HTC ready message.
57582 +           The caller should not connect services until the target has indicated it is
57583 +           ready.
57584 +  @example:
57585 +  @see also: HTCConnectService
57586 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57587 +A_STATUS    HTCWaitTarget(HTC_HANDLE HTCHandle);
57588 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57589 +  @desc: Start target service communications
57590 +  @function name: HTCStart
57591 +  @input:  HTCHandle - HTC handle
57592 +  @output:
57593 +  @return:
57594 +  @notes: This API indicates to the target that the service connection phase is complete
57595 +          and the target can freely start all connected services.  This API should only be
57596 +          called AFTER all service connections have been made.  TCStart will issue a
57597 +          SETUP_COMPLETE message to the target to indicate that all service connections
57598 +          have been made and the target can start communicating over the endpoints.
57599 +  @example:
57600 +  @see also: HTCConnectService
57601 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57602 +A_STATUS    HTCStart(HTC_HANDLE HTCHandle);
57603 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57604 +  @desc: Add receive packet to HTC
57605 +  @function name: HTCAddReceivePkt
57606 +  @input:  HTCHandle - HTC handle
57607 +           pPacket - HTC receive packet to add
57608 +  @output:
57609 +  @return: A_OK on success
57610 +  @notes:  user must supply HTC packets for capturing incomming HTC frames.  The caller
57611 +           must initialize each HTC packet using the SET_HTC_PACKET_INFO_RX_REFILL()
57612 +           macro.
57613 +  @example:
57614 +  @see also:
57615 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57616 +A_STATUS    HTCAddReceivePkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket);
57617 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57618 +  @desc: Connect to an HTC service
57619 +  @function name: HTCConnectService
57620 +  @input:  HTCHandle - HTC handle
57621 +           pReq - connection details
57622 +  @output: pResp - connection response
57623 +  @return:
57624 +  @notes:  Service connections must be performed before HTCStart.  User provides callback handlers
57625 +           for various endpoint events.
57626 +  @example:
57627 +  @see also: HTCStart
57628 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57629 +A_STATUS    HTCConnectService(HTC_HANDLE HTCHandle,
57630 +                              HTC_SERVICE_CONNECT_REQ  *pReq,
57631 +                              HTC_SERVICE_CONNECT_RESP *pResp);
57632 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57633 +  @desc: Send an HTC packet
57634 +  @function name: HTCSendPkt
57635 +  @input:  HTCHandle - HTC handle
57636 +           pPacket - packet to send
57637 +  @output:
57638 +  @return: A_OK
57639 +  @notes:  Caller must initialize packet using SET_HTC_PACKET_INFO_TX() macro.
57640 +           This interface is fully asynchronous.  On error, HTC SendPkt will
57641 +           call the registered Endpoint callback to cleanup the packet.
57642 +  @example:
57643 +  @see also: HTCFlushEndpoint
57644 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57645 +A_STATUS    HTCSendPkt(HTC_HANDLE HTCHandle, HTC_PACKET *pPacket);
57646 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57647 +  @desc: Stop HTC service communications
57648 +  @function name: HTCStop
57649 +  @input:  HTCHandle - HTC handle
57650 +  @output:
57651 +  @return:
57652 +  @notes: HTC communications is halted.  All receive and pending TX packets will
57653 +          be flushed.
57654 +  @example:
57655 +  @see also:
57656 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57657 +void        HTCStop(HTC_HANDLE HTCHandle);
57658 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57659 +  @desc: Shutdown HTC
57660 +  @function name: HTCShutdown
57661 +  @input:
57662 +  @output:
57663 +  @return:
57664 +  @notes:  This cleans up all resources allocated by HTCInit().
57665 +  @example:
57666 +  @see also: HTCInit
57667 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57668 +void        HTCShutDown(void);
57669 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57670 +  @desc: Flush pending TX packets
57671 +  @function name: HTCFlushEndpoint
57672 +  @input:  HTCHandle - HTC handle
57673 +           Endpoint - Endpoint to flush
57674 +           Tag - flush tag
57675 +  @output:
57676 +  @return:
57677 +  @notes:  The Tag parameter is used to selectively flush packets with matching tags.
57678 +           The value of 0 forces all packets to be flush regardless of tag.
57679 +  @example:
57680 +  @see also: HTCSendPkt
57681 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57682 +void        HTCFlushEndpoint(HTC_HANDLE HTCHandle, HTC_ENDPOINT_ID Endpoint, HTC_TX_TAG Tag);
57683 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57684 +  @desc: Dump credit distribution state
57685 +  @function name: HTCDumpCreditStates
57686 +  @input:  HTCHandle - HTC handle
57687 +  @output:
57688 +  @return:
57689 +  @notes:  This dumps all credit distribution information to the debugger
57690 +  @example:
57691 +  @see also:
57692 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57693 +void        HTCDumpCreditStates(HTC_HANDLE HTCHandle);
57694 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57695 +  @desc: Indicate a traffic activity change on an endpoint
57696 +  @function name: HTCIndicateActivityChange
57697 +  @input:  HTCHandle - HTC handle
57698 +           Endpoint - endpoint in which activity has changed
57699 +           Active - TRUE if active, FALSE if it has become inactive
57700 +  @output:
57701 +  @return:
57702 +  @notes:  This triggers the registered credit distribution function to
57703 +           re-adjust credits for active/inactive endpoints.
57704 +  @example:
57705 +  @see also:
57706 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57707 +void        HTCIndicateActivityChange(HTC_HANDLE      HTCHandle,
57708 +                                      HTC_ENDPOINT_ID Endpoint,
57709 +                                      A_BOOL          Active);
57710 +
57711 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
57712 +  @desc: Get endpoint statistics
57713 +  @function name: HTCGetEndpointStatistics
57714 +  @input:  HTCHandle - HTC handle
57715 +           Endpoint - Endpoint identifier
57716 +           Action - action to take with statistics
57717 +  @output:
57718 +           pStats - statistics that were sampled (can be NULL if Action is HTC_EP_STAT_CLEAR)
57719 +
57720 +  @return: TRUE if statistics profiling is enabled, otherwise FALSE.
57721 +
57722 +  @notes:  Statistics is a compile-time option and this function may return FALSE
57723 +           if HTC is not compiled with profiling.
57724 +
57725 +           The caller can specify the statistic "action" to take when sampling
57726 +           the statistics.  This includes:
57727 +
57728 +           HTC_EP_STAT_SAMPLE: The pStats structure is filled with the current values.
57729 +           HTC_EP_STAT_SAMPLE_AND_CLEAR: The structure is filled and the current statistics
57730 +                             are cleared.
57731 +           HTC_EP_STAT_CLEA : the statistics are cleared, the called can pass a NULL value for
57732 +                   pStats
57733 +
57734 +  @example:
57735 +  @see also:
57736 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
57737 +A_BOOL       HTCGetEndpointStatistics(HTC_HANDLE               HTCHandle,
57738 +                                      HTC_ENDPOINT_ID          Endpoint,
57739 +                                      HTC_ENDPOINT_STAT_ACTION Action,
57740 +                                      HTC_ENDPOINT_STATS       *pStats);
57741 +
57742 +#ifdef __cplusplus
57743 +}
57744 +#endif
57745 +
57746 +#endif /* _HTC_API_H_ */
57747 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc.h
57748 ===================================================================
57749 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
57750 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc.h      2008-12-11 22:46:49.000000000 +0100
57751 @@ -0,0 +1,190 @@
57752 +/*
57753 + * Copyright (c) 2007 Atheros Communications Inc.
57754 + * All rights reserved.
57755 + *
57756 + * $ATH_LICENSE_HOSTSDK0_C$
57757 + *
57758 + */
57759 +
57760 +
57761 +#ifndef __HTC_H__
57762 +#define __HTC_H__
57763 +
57764 +#ifndef ATH_TARGET
57765 +#include "athstartpack.h"
57766 +#endif
57767 +
57768 +#define A_OFFSETOF(type,field) (int)(&(((type *)NULL)->field))
57769 +
57770 +#define ASSEMBLE_UNALIGNED_UINT16(p,highbyte,lowbyte) \
57771 +        (((A_UINT16)(((A_UINT8 *)(p))[(highbyte)])) << 8 | (A_UINT16)(((A_UINT8 *)(p))[(lowbyte)]))
57772 +
57773 +/* alignment independent macros (little-endian) to fetch UINT16s or UINT8s from a
57774 + * structure using only the type and field name.
57775 + * Use these macros if there is the potential for unaligned buffer accesses. */
57776 +#define A_GET_UINT16_FIELD(p,type,field) \
57777 +    ASSEMBLE_UNALIGNED_UINT16(p,\
57778 +                              A_OFFSETOF(type,field) + 1, \
57779 +                              A_OFFSETOF(type,field))
57780 +
57781 +#define A_SET_UINT16_FIELD(p,type,field,value) \
57782 +{                                              \
57783 +    ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (A_UINT8)(value);        \
57784 +    ((A_UINT8 *)(p))[A_OFFSETOF(type,field) + 1] = (A_UINT8)((value) >> 8); \
57785 +}
57786 +
57787 +#define A_GET_UINT8_FIELD(p,type,field) \
57788 +            ((A_UINT8 *)(p))[A_OFFSETOF(type,field)]
57789 +
57790 +#define A_SET_UINT8_FIELD(p,type,field,value) \
57791 +    ((A_UINT8 *)(p))[A_OFFSETOF(type,field)] = (value)
57792 +
57793 +/****** DANGER DANGER ***************
57794 + *
57795 + *   The frame header length and message formats defined herein were
57796 + *   selected to accommodate optimal alignment for target processing.  This reduces code
57797 + *   size and improves performance.
57798 + *
57799 + *   Any changes to the header length may alter the alignment and cause exceptions
57800 + *   on the target. When adding to the message structures insure that fields are
57801 + *   properly aligned.
57802 + *
57803 + */
57804 +
57805 +/* HTC frame header */
57806 +typedef PREPACK struct _HTC_FRAME_HDR{
57807 +        /* do not remove or re-arrange these fields, these are minimally required
57808 +         * to take advantage of 4-byte lookaheads in some hardware implementations */
57809 +    A_UINT8   EndpointID;
57810 +    A_UINT8   Flags;
57811 +    A_UINT16  PayloadLen;       /* length of data (including trailer) that follows the header */
57812 +
57813 +    /***** end of 4-byte lookahead ****/
57814 +
57815 +    A_UINT8   ControlBytes[2];
57816 +
57817 +    /* message payload starts after the header */
57818 +
57819 +} POSTPACK HTC_FRAME_HDR;
57820 +
57821 +/* frame header flags */
57822 +#define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0)
57823 +#define HTC_FLAGS_RECV_TRAILER       (1 << 1)
57824 +
57825 +
57826 +#define HTC_HDR_LENGTH  (sizeof(HTC_FRAME_HDR))
57827 +#define HTC_MAX_TRAILER_LENGTH   255
57828 +#define HTC_MAX_PAYLOAD_LENGTH   (2048 - sizeof(HTC_FRAME_HDR))
57829 +
57830 +/* HTC control message IDs */
57831 +typedef enum {
57832 +    HTC_MSG_READY_ID = 1,
57833 +    HTC_MSG_CONNECT_SERVICE_ID = 2,
57834 +    HTC_MSG_CONNECT_SERVICE_RESPONSE_ID = 3,
57835 +    HTC_MSG_SETUP_COMPLETE_ID = 4,
57836 +} HTC_MSG_IDS;
57837 +
57838 +#define HTC_MAX_CONTROL_MESSAGE_LENGTH  256
57839 +
57840 +/* base message ID header */
57841 +typedef PREPACK struct {
57842 +    A_UINT16 MessageID;
57843 +} POSTPACK HTC_UNKNOWN_MSG;
57844 +
57845 +/* HTC ready message
57846 + * direction : target-to-host  */
57847 +typedef PREPACK struct {
57848 +    A_UINT16  MessageID;    /* ID */
57849 +    A_UINT16  CreditCount;  /* number of credits the target can offer */
57850 +    A_UINT16  CreditSize;   /* size of each credit */
57851 +    A_UINT8   MaxEndpoints; /* maximum number of endpoints the target has resources for */
57852 +    A_UINT8   _Pad1;
57853 +} POSTPACK HTC_READY_MSG;
57854 +
57855 +#define HTC_SERVICE_META_DATA_MAX_LENGTH 128
57856 +
57857 +/* connect service
57858 + * direction : host-to-target */
57859 +typedef PREPACK struct {
57860 +    A_UINT16  MessageID;
57861 +    A_UINT16  ServiceID;           /* service ID of the service to connect to */
57862 +    A_UINT16  ConnectionFlags;     /* connection flags */
57863 +
57864 +#define HTC_CONNECT_FLAGS_REDUCE_CREDIT_DRIBBLE (1 << 2)  /* reduce credit dribbling when
57865 +                                                             the host needs credits */
57866 +#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_MASK             (0x3)
57867 +#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_FOURTH        0x0
57868 +#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_ONE_HALF          0x1
57869 +#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_THREE_FOURTHS     0x2
57870 +#define HTC_CONNECT_FLAGS_THRESHOLD_LEVEL_UNITY             0x3
57871 +
57872 +    A_UINT8   ServiceMetaLength;   /* length of meta data that follows */
57873 +    A_UINT8   _Pad1;
57874 +
57875 +    /* service-specific meta data starts after the header */
57876 +
57877 +} POSTPACK HTC_CONNECT_SERVICE_MSG;
57878 +
57879 +/* connect response
57880 + * direction : target-to-host */
57881 +typedef PREPACK struct {
57882 +    A_UINT16  MessageID;
57883 +    A_UINT16  ServiceID;            /* service ID that the connection request was made */
57884 +    A_UINT8   Status;               /* service connection status */
57885 +    A_UINT8   EndpointID;           /* assigned endpoint ID */
57886 +    A_UINT16  MaxMsgSize;           /* maximum expected message size on this endpoint */
57887 +    A_UINT8   ServiceMetaLength;    /* length of meta data that follows */
57888 +    A_UINT8   _Pad1;
57889 +
57890 +    /* service-specific meta data starts after the header */
57891 +
57892 +} POSTPACK HTC_CONNECT_SERVICE_RESPONSE_MSG;
57893 +
57894 +typedef PREPACK struct {
57895 +    A_UINT16  MessageID;
57896 +    /* currently, no other fields */
57897 +} POSTPACK HTC_SETUP_COMPLETE_MSG;
57898 +
57899 +
57900 +/* connect response status codes */
57901 +#define HTC_SERVICE_SUCCESS      0  /* success */
57902 +#define HTC_SERVICE_NOT_FOUND    1  /* service could not be found */
57903 +#define HTC_SERVICE_FAILED       2  /* specific service failed the connect */
57904 +#define HTC_SERVICE_NO_RESOURCES 3  /* no resources (i.e. no more endpoints) */
57905 +#define HTC_SERVICE_NO_MORE_EP   4  /* specific service is not allowing any more
57906 +                                       endpoints */
57907 +
57908 +/* report record IDs */
57909 +typedef enum {
57910 +    HTC_RECORD_NULL  = 0,
57911 +    HTC_RECORD_CREDITS   = 1,
57912 +    HTC_RECORD_LOOKAHEAD = 2,
57913 +} HTC_RPT_IDS;
57914 +
57915 +typedef PREPACK struct {
57916 +    A_UINT8 RecordID;     /* Record ID */
57917 +    A_UINT8 Length;       /* Length of record */
57918 +} POSTPACK HTC_RECORD_HDR;
57919 +
57920 +typedef PREPACK struct {
57921 +    A_UINT8 EndpointID;     /* Endpoint that owns these credits */
57922 +    A_UINT8 Credits;        /* credits to report since last report */
57923 +} POSTPACK HTC_CREDIT_REPORT;
57924 +
57925 +typedef PREPACK struct {
57926 +    A_UINT8 PreValid;         /* pre valid guard */
57927 +    A_UINT8 LookAhead[4];     /* 4 byte lookahead */
57928 +    A_UINT8 PostValid;        /* post valid guard */
57929 +
57930 +   /* NOTE: the LookAhead array is guarded by a PreValid and Post Valid guard bytes.
57931 +    * The PreValid bytes must equal the inverse of the PostValid byte */
57932 +
57933 +} POSTPACK HTC_LOOKAHEAD_REPORT;
57934 +
57935 +#ifndef ATH_TARGET
57936 +#include "athendpack.h"
57937 +#endif
57938 +
57939 +
57940 +#endif /* __HTC_H__ */
57941 +
57942 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_packet.h
57943 ===================================================================
57944 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
57945 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_packet.h       2008-12-11 22:46:49.000000000 +0100
57946 @@ -0,0 +1,138 @@
57947 +/*
57948 + *
57949 + * Copyright (c) 2007 Atheros Communications Inc.
57950 + * All rights reserved.
57951 + *
57952 + *
57953 + *  This program is free software; you can redistribute it and/or modify
57954 + *  it under the terms of the GNU General Public License version 2 as
57955 + *  published by the Free Software Foundation;
57956 + *
57957 + *  Software distributed under the License is distributed on an "AS
57958 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
57959 + *  implied. See the License for the specific language governing
57960 + *  rights and limitations under the License.
57961 + *
57962 + *
57963 + *
57964 + */
57965 +
57966 +#ifndef HTC_PACKET_H_
57967 +#define HTC_PACKET_H_
57968 +
57969 +
57970 +#include "dl_list.h"
57971 +
57972 +struct _HTC_PACKET;
57973 +
57974 +typedef void (* HTC_PACKET_COMPLETION)(void *,struct _HTC_PACKET *);
57975 +
57976 +typedef A_UINT16 HTC_TX_TAG;
57977 +
57978 +typedef struct _HTC_TX_PACKET_INFO {
57979 +    HTC_TX_TAG    Tag;            /* tag used to selective flush packets */
57980 +} HTC_TX_PACKET_INFO;
57981 +
57982 +#define HTC_TX_PACKET_TAG_ALL          0    /* a tag of zero is reserved and used to flush ALL packets */
57983 +#define HTC_TX_PACKET_TAG_INTERNAL     1                                /* internal tags start here */
57984 +#define HTC_TX_PACKET_TAG_USER_DEFINED (HTC_TX_PACKET_TAG_INTERNAL + 9) /* user-defined tags start here */
57985 +
57986 +typedef struct _HTC_RX_PACKET_INFO {
57987 +    A_UINT32    Unused;          /* for future use and to make compilers happy */
57988 +} HTC_RX_PACKET_INFO;
57989 +
57990 +/* wrapper around endpoint-specific packets */
57991 +typedef struct _HTC_PACKET {
57992 +    DL_LIST         ListLink;       /* double link */
57993 +    void            *pPktContext;   /* caller's per packet specific context */
57994 +
57995 +    A_UINT8         *pBufferStart;  /* the true buffer start , the caller can
57996 +                                       store the real buffer start here.  In
57997 +                                       receive callbacks, the HTC layer sets pBuffer
57998 +                                       to the start of the payload past the header. This
57999 +                                       field allows the caller to reset pBuffer when it
58000 +                                       recycles receive packets back to HTC */
58001 +    /*
58002 +     * Pointer to the start of the buffer. In the transmit
58003 +     * direction this points to the start of the payload. In the
58004 +     * receive direction, however, the buffer when queued up
58005 +     * points to the start of the HTC header but when returned
58006 +     * to the caller points to the start of the payload
58007 +     */
58008 +    A_UINT8         *pBuffer;       /* payload start (RX/TX) */
58009 +    A_UINT32        BufferLength;   /* length of buffer */
58010 +    A_UINT32        ActualLength;   /* actual length of payload */
58011 +    int             Endpoint;       /* endpoint that this packet was sent/recv'd from */
58012 +    A_STATUS        Status;         /* completion status */
58013 +    union {
58014 +        HTC_TX_PACKET_INFO  AsTx;   /* Tx Packet specific info */
58015 +        HTC_RX_PACKET_INFO  AsRx;   /* Rx Packet specific info */
58016 +    } PktInfo;
58017 +
58018 +    /* the following fields are for internal HTC use */
58019 +    HTC_PACKET_COMPLETION Completion;   /* completion */
58020 +    void                  *pContext;    /* HTC private completion context */
58021 +    A_UINT32              HTCReserved;  /* reserved */
58022 +} HTC_PACKET;
58023 +
58024 +
58025 +
58026 +#define COMPLETE_HTC_PACKET(p,status)        \
58027 +{                                            \
58028 +    (p)->Status = (status);                  \
58029 +    (p)->Completion((p)->pContext,(p));      \
58030 +}
58031 +
58032 +#define INIT_HTC_PACKET_INFO(p,b,len)             \
58033 +{                                                 \
58034 +    (p)->pBufferStart = (b);                      \
58035 +    (p)->BufferLength = (len);                    \
58036 +}
58037 +
58038 +/* macro to set an initial RX packet for refilling HTC */
58039 +#define SET_HTC_PACKET_INFO_RX_REFILL(p,c,b,len,ep) \
58040 +{                                                 \
58041 +    (p)->pPktContext = (c);                       \
58042 +    (p)->pBuffer = (b);                           \
58043 +    (p)->pBufferStart = (b);                      \
58044 +    (p)->BufferLength = (len);                    \
58045 +    (p)->Endpoint = (ep);                         \
58046 +}
58047 +
58048 +/* fast macro to recycle an RX packet that will be re-queued to HTC */
58049 +#define HTC_PACKET_RESET_RX(p)              \
58050 +    (p)->pBuffer = (p)->pBufferStart
58051 +
58052 +/* macro to set packet parameters for TX */
58053 +#define SET_HTC_PACKET_INFO_TX(p,c,b,len,ep,tag)  \
58054 +{                                                 \
58055 +    (p)->pPktContext = (c);                       \
58056 +    (p)->pBuffer = (b);                           \
58057 +    (p)->ActualLength = (len);                    \
58058 +    (p)->Endpoint = (ep);                         \
58059 +    (p)->PktInfo.AsTx.Tag = (tag);                \
58060 +}
58061 +
58062 +/* HTC Packet Queueing Macros */
58063 +typedef DL_LIST HTC_PACKET_QUEUE;
58064 +/* initialize queue */
58065 +#define INIT_HTC_PACKET_QUEUE(pQ) DL_LIST_INIT((pQ))
58066 +/* enqueue HTC packet to the tail of the queue */
58067 +#define HTC_PACKET_ENQUEUE(pQ,p)  DL_ListInsertTail((pQ),&(p)->ListLink)
58068 +/* test if a queue is empty */
58069 +#define HTC_QUEUE_EMPTY(pQ)       DL_LIST_IS_EMPTY((pQ))
58070 +/* get packet at head without removing it */
58071 +#define HTC_GET_PKT_AT_HEAD(pQ)   A_CONTAINING_STRUCT((DL_LIST_GET_ITEM_AT_HEAD(pQ)),HTC_PACKET,ListLink);
58072 +/* remove a packet from the current list it is linked to */
58073 +#define HTC_PACKET_REMOVE(p)      DL_ListRemove(&(p)->ListLink)
58074 +
58075 +/* dequeue an HTC packet from the head of the queue */
58076 +static INLINE HTC_PACKET *HTC_PACKET_DEQUEUE(HTC_PACKET_QUEUE *queue) {
58077 +    DL_LIST    *pItem = DL_ListRemoveItemFromHead(queue);
58078 +    if (pItem != NULL) {
58079 +        return A_CONTAINING_STRUCT(pItem, HTC_PACKET, ListLink);
58080 +    }
58081 +    return NULL;
58082 +}
58083 +
58084 +#endif /*HTC_PACKET_H_*/
58085 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_services.h
58086 ===================================================================
58087 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58088 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/htc_services.h     2008-12-11 22:46:49.000000000 +0100
58089 @@ -0,0 +1,37 @@
58090 +/*
58091 + * Copyright (c) 2007 Atheros Communications Inc.
58092 + * All rights reserved.
58093 + *
58094 + * $ATH_LICENSE_HOSTSDK0_C$
58095 + *
58096 + */
58097 +
58098 +#ifndef __HTC_SERVICES_H__
58099 +#define __HTC_SERVICES_H__
58100 +
58101 +/* Current service IDs */
58102 +
58103 +typedef enum {
58104 +    RSVD_SERVICE_GROUP  = 0,
58105 +    WMI_SERVICE_GROUP   = 1,
58106 +
58107 +    HTC_TEST_GROUP = 254,
58108 +    HTC_SERVICE_GROUP_LAST = 255
58109 +}HTC_SERVICE_GROUP_IDS;
58110 +
58111 +#define MAKE_SERVICE_ID(group,index) \
58112 +            (int)(((int)group << 8) | (int)(index))
58113 +
58114 +/* NOTE: service ID of 0x0000 is reserved and should never be used */
58115 +#define HTC_CTRL_RSVD_SVC MAKE_SERVICE_ID(RSVD_SERVICE_GROUP,1)
58116 +#define WMI_CONTROL_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,0)
58117 +#define WMI_DATA_BE_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,1)
58118 +#define WMI_DATA_BK_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,2)
58119 +#define WMI_DATA_VI_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,3)
58120 +#define WMI_DATA_VO_SVC   MAKE_SERVICE_ID(WMI_SERVICE_GROUP,4)
58121 +#define WMI_MAX_SERVICES  5
58122 +
58123 +/* raw stream service (i.e. flash, tcmd, calibration apps) */
58124 +#define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0)
58125 +
58126 +#endif /*HTC_SERVICES_H_*/
58127 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211.h
58128 ===================================================================
58129 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58130 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211.h        2008-12-11 22:46:49.000000000 +0100
58131 @@ -0,0 +1,342 @@
58132 +/*-
58133 + * Copyright (c) 2001 Atsushi Onoe
58134 + * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
58135 + * Copyright (c) 2006 Atheros Communications, Inc.
58136 + *
58137 + * Wireless Network driver for Atheros AR6001
58138 + * All rights reserved.
58139 + *
58140 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58141 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
58142 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
58143 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58144 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58145 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58146 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58147 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58148 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
58149 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58150 + *
58151 + */
58152 +#ifndef _NET80211_IEEE80211_H_
58153 +#define _NET80211_IEEE80211_H_
58154 +
58155 +#include "athstartpack.h"
58156 +
58157 +/*
58158 + * 802.11 protocol definitions.
58159 + */
58160 +
58161 +#define IEEE80211_ADDR_LEN  6       /* size of 802.11 address */
58162 +/* is 802.11 address multicast/broadcast? */
58163 +#define IEEE80211_IS_MULTICAST(_a)  (*(_a) & 0x01)
58164 +#define IEEE80211_ADDR_EQ(addr1, addr2)     \
58165 +    (A_MEMCMP(addr1, addr2, IEEE80211_ADDR_LEN) == 0)
58166 +
58167 +#define IEEE80211_KEYBUF_SIZE 16
58168 +#define IEEE80211_MICBUF_SIZE (8+8)  /* space for both tx and rx */
58169 +
58170 +/*
58171 + * NB: these values are ordered carefully; there are lots of
58172 + * of implications in any reordering.  In particular beware
58173 + * that 4 is not used to avoid conflicting with IEEE80211_F_PRIVACY.
58174 + */
58175 +#define IEEE80211_CIPHER_WEP            0
58176 +#define IEEE80211_CIPHER_TKIP           1
58177 +#define IEEE80211_CIPHER_AES_OCB        2
58178 +#define IEEE80211_CIPHER_AES_CCM        3
58179 +#define IEEE80211_CIPHER_CKIP           5
58180 +#define IEEE80211_CIPHER_CCKM_KRK       6
58181 +#define IEEE80211_CIPHER_NONE           7       /* pseudo value */
58182 +
58183 +#define IEEE80211_CIPHER_MAX            (IEEE80211_CIPHER_NONE+1)
58184 +
58185 +#define IEEE80211_IS_VALID_WEP_CIPHER_LEN(len) \
58186 +        (((len) == 5) || ((len) == 13) || ((len) == 16))
58187 +
58188 +
58189 +
58190 +/*
58191 + * generic definitions for IEEE 802.11 frames
58192 + */
58193 +PREPACK struct ieee80211_frame {
58194 +    A_UINT8    i_fc[2];
58195 +    A_UINT8    i_dur[2];
58196 +    A_UINT8    i_addr1[IEEE80211_ADDR_LEN];
58197 +    A_UINT8    i_addr2[IEEE80211_ADDR_LEN];
58198 +    A_UINT8    i_addr3[IEEE80211_ADDR_LEN];
58199 +    A_UINT8    i_seq[2];
58200 +    /* possibly followed by addr4[IEEE80211_ADDR_LEN]; */
58201 +    /* see below */
58202 +} POSTPACK;
58203 +
58204 +#define IEEE80211_FC0_VERSION_MASK          0x03
58205 +#define IEEE80211_FC0_VERSION_SHIFT         0
58206 +#define IEEE80211_FC0_VERSION_0             0x00
58207 +#define IEEE80211_FC0_TYPE_MASK             0x0c
58208 +#define IEEE80211_FC0_TYPE_SHIFT            2
58209 +#define IEEE80211_FC0_TYPE_MGT              0x00
58210 +#define IEEE80211_FC0_TYPE_CTL              0x04
58211 +#define IEEE80211_FC0_TYPE_DATA             0x08
58212 +
58213 +#define IEEE80211_FC0_SUBTYPE_MASK          0xf0
58214 +#define IEEE80211_FC0_SUBTYPE_SHIFT         4
58215 +/* for TYPE_MGT */
58216 +#define IEEE80211_FC0_SUBTYPE_ASSOC_REQ     0x00
58217 +#define IEEE80211_FC0_SUBTYPE_ASSOC_RESP    0x10
58218 +#define IEEE80211_FC0_SUBTYPE_REASSOC_REQ   0x20
58219 +#define IEEE80211_FC0_SUBTYPE_REASSOC_RESP  0x30
58220 +#define IEEE80211_FC0_SUBTYPE_PROBE_REQ     0x40
58221 +#define IEEE80211_FC0_SUBTYPE_PROBE_RESP    0x50
58222 +#define IEEE80211_FC0_SUBTYPE_BEACON        0x80
58223 +#define IEEE80211_FC0_SUBTYPE_ATIM          0x90
58224 +#define IEEE80211_FC0_SUBTYPE_DISASSOC      0xa0
58225 +#define IEEE80211_FC0_SUBTYPE_AUTH          0xb0
58226 +#define IEEE80211_FC0_SUBTYPE_DEAUTH        0xc0
58227 +/* for TYPE_CTL */
58228 +#define IEEE80211_FC0_SUBTYPE_PS_POLL       0xa0
58229 +#define IEEE80211_FC0_SUBTYPE_RTS           0xb0
58230 +#define IEEE80211_FC0_SUBTYPE_CTS           0xc0
58231 +#define IEEE80211_FC0_SUBTYPE_ACK           0xd0
58232 +#define IEEE80211_FC0_SUBTYPE_CF_END        0xe0
58233 +#define IEEE80211_FC0_SUBTYPE_CF_END_ACK    0xf0
58234 +/* for TYPE_DATA (bit combination) */
58235 +#define IEEE80211_FC0_SUBTYPE_DATA          0x00
58236 +#define IEEE80211_FC0_SUBTYPE_CF_ACK        0x10
58237 +#define IEEE80211_FC0_SUBTYPE_CF_POLL       0x20
58238 +#define IEEE80211_FC0_SUBTYPE_CF_ACPL       0x30
58239 +#define IEEE80211_FC0_SUBTYPE_NODATA        0x40
58240 +#define IEEE80211_FC0_SUBTYPE_CFACK         0x50
58241 +#define IEEE80211_FC0_SUBTYPE_CFPOLL        0x60
58242 +#define IEEE80211_FC0_SUBTYPE_CF_ACK_CF_ACK 0x70
58243 +#define IEEE80211_FC0_SUBTYPE_QOS           0x80
58244 +#define IEEE80211_FC0_SUBTYPE_QOS_NULL      0xc0
58245 +
58246 +#define IEEE80211_FC1_DIR_MASK              0x03
58247 +#define IEEE80211_FC1_DIR_NODS              0x00    /* STA->STA */
58248 +#define IEEE80211_FC1_DIR_TODS              0x01    /* STA->AP  */
58249 +#define IEEE80211_FC1_DIR_FROMDS            0x02    /* AP ->STA */
58250 +#define IEEE80211_FC1_DIR_DSTODS            0x03    /* AP ->AP  */
58251 +
58252 +#define IEEE80211_FC1_MORE_FRAG             0x04
58253 +#define IEEE80211_FC1_RETRY                 0x08
58254 +#define IEEE80211_FC1_PWR_MGT               0x10
58255 +#define IEEE80211_FC1_MORE_DATA             0x20
58256 +#define IEEE80211_FC1_WEP                   0x40
58257 +#define IEEE80211_FC1_ORDER                 0x80
58258 +
58259 +#define IEEE80211_SEQ_FRAG_MASK             0x000f
58260 +#define IEEE80211_SEQ_FRAG_SHIFT            0
58261 +#define IEEE80211_SEQ_SEQ_MASK              0xfff0
58262 +#define IEEE80211_SEQ_SEQ_SHIFT             4
58263 +
58264 +#define IEEE80211_NWID_LEN                  32
58265 +
58266 +/*
58267 + * 802.11 rate set.
58268 + */
58269 +#define IEEE80211_RATE_SIZE     8       /* 802.11 standard */
58270 +#define IEEE80211_RATE_MAXSIZE  15      /* max rates we'll handle */
58271 +
58272 +#define WMM_NUM_AC                  4   /* 4 AC categories */
58273 +
58274 +#define WMM_PARAM_ACI_M         0x60    /* Mask for ACI field */
58275 +#define WMM_PARAM_ACI_S         5   /* Shift for ACI field */
58276 +#define WMM_PARAM_ACM_M         0x10    /* Mask for ACM bit */
58277 +#define WMM_PARAM_ACM_S         4       /* Shift for ACM bit */
58278 +#define WMM_PARAM_AIFSN_M       0x0f    /* Mask for aifsn field */
58279 +#define WMM_PARAM_LOGCWMIN_M    0x0f    /* Mask for CwMin field (in log) */
58280 +#define WMM_PARAM_LOGCWMAX_M    0xf0    /* Mask for CwMax field (in log) */
58281 +#define WMM_PARAM_LOGCWMAX_S    4   /* Shift for CwMax field */
58282 +
58283 +#define WMM_AC_TO_TID(_ac) (       \
58284 +    ((_ac) == WMM_AC_VO) ? 6 : \
58285 +    ((_ac) == WMM_AC_VI) ? 5 : \
58286 +    ((_ac) == WMM_AC_BK) ? 1 : \
58287 +    0)
58288 +
58289 +#define TID_TO_WMM_AC(_tid) (      \
58290 +    ((_tid) < 1) ? WMM_AC_BE : \
58291 +    ((_tid) < 3) ? WMM_AC_BK : \
58292 +    ((_tid) < 6) ? WMM_AC_VI : \
58293 +    WMM_AC_VO)
58294 +/*
58295 + * Management information element payloads.
58296 + */
58297 +
58298 +enum {
58299 +    IEEE80211_ELEMID_SSID       = 0,
58300 +    IEEE80211_ELEMID_RATES      = 1,
58301 +    IEEE80211_ELEMID_FHPARMS    = 2,
58302 +    IEEE80211_ELEMID_DSPARMS    = 3,
58303 +    IEEE80211_ELEMID_CFPARMS    = 4,
58304 +    IEEE80211_ELEMID_TIM        = 5,
58305 +    IEEE80211_ELEMID_IBSSPARMS  = 6,
58306 +    IEEE80211_ELEMID_COUNTRY    = 7,
58307 +    IEEE80211_ELEMID_CHALLENGE  = 16,
58308 +    /* 17-31 reserved for challenge text extension */
58309 +    IEEE80211_ELEMID_PWRCNSTR   = 32,
58310 +    IEEE80211_ELEMID_PWRCAP     = 33,
58311 +    IEEE80211_ELEMID_TPCREQ     = 34,
58312 +    IEEE80211_ELEMID_TPCREP     = 35,
58313 +    IEEE80211_ELEMID_SUPPCHAN   = 36,
58314 +    IEEE80211_ELEMID_CHANSWITCH = 37,
58315 +    IEEE80211_ELEMID_MEASREQ    = 38,
58316 +    IEEE80211_ELEMID_MEASREP    = 39,
58317 +    IEEE80211_ELEMID_QUIET      = 40,
58318 +    IEEE80211_ELEMID_IBSSDFS    = 41,
58319 +    IEEE80211_ELEMID_ERP        = 42,
58320 +    IEEE80211_ELEMID_RSN        = 48,
58321 +    IEEE80211_ELEMID_XRATES     = 50,
58322 +    IEEE80211_ELEMID_TPC        = 150,
58323 +    IEEE80211_ELEMID_CCKM       = 156,
58324 +    IEEE80211_ELEMID_VENDOR     = 221,  /* vendor private */
58325 +};
58326 +
58327 +#define ATH_OUI             0x7f0300        /* Atheros OUI */
58328 +#define ATH_OUI_TYPE        0x01
58329 +#define ATH_OUI_SUBTYPE     0x01
58330 +#define ATH_OUI_VERSION     0x00
58331 +
58332 +#define WPA_OUI             0xf25000
58333 +#define WPA_OUI_TYPE        0x01
58334 +#define WPA_VERSION         1          /* current supported version */
58335 +
58336 +#define WPA_CSE_NULL        0x00
58337 +#define WPA_CSE_WEP40       0x01
58338 +#define WPA_CSE_TKIP        0x02
58339 +#define WPA_CSE_CCMP        0x04
58340 +#define WPA_CSE_WEP104      0x05
58341 +
58342 +#define WPA_ASE_NONE        0x00
58343 +#define WPA_ASE_8021X_UNSPEC    0x01
58344 +#define WPA_ASE_8021X_PSK   0x02
58345 +
58346 +#define RSN_OUI         0xac0f00
58347 +#define RSN_VERSION     1       /* current supported version */
58348 +
58349 +#define RSN_CSE_NULL        0x00
58350 +#define RSN_CSE_WEP40       0x01
58351 +#define RSN_CSE_TKIP        0x02
58352 +#define RSN_CSE_WRAP        0x03
58353 +#define RSN_CSE_CCMP        0x04
58354 +#define RSN_CSE_WEP104      0x05
58355 +
58356 +#define RSN_ASE_NONE        0x00
58357 +#define RSN_ASE_8021X_UNSPEC    0x01
58358 +#define RSN_ASE_8021X_PSK   0x02
58359 +
58360 +#define RSN_CAP_PREAUTH     0x01
58361 +
58362 +#define WMM_OUI         0xf25000
58363 +#define WMM_OUI_TYPE        0x02
58364 +#define WMM_INFO_OUI_SUBTYPE    0x00
58365 +#define WMM_PARAM_OUI_SUBTYPE   0x01
58366 +#define WMM_VERSION     1
58367 +
58368 +/* WMM stream classes */
58369 +#define WMM_NUM_AC  4
58370 +#define WMM_AC_BE   0       /* best effort */
58371 +#define WMM_AC_BK   1       /* background */
58372 +#define WMM_AC_VI   2       /* video */
58373 +#define WMM_AC_VO   3       /* voice */
58374 +
58375 +/* TSPEC related */
58376 +#define ACTION_CATEGORY_CODE_TSPEC                 17
58377 +#define ACTION_CODE_TSPEC_ADDTS                    0
58378 +#define ACTION_CODE_TSPEC_ADDTS_RESP               1
58379 +#define ACTION_CODE_TSPEC_DELTS                    2
58380 +
58381 +typedef enum {
58382 +    TSPEC_STATUS_CODE_ADMISSION_ACCEPTED = 0,
58383 +    TSPEC_STATUS_CODE_ADDTS_INVALID_PARAMS = 0x1,
58384 +    TSPEC_STATUS_CODE_ADDTS_REQUEST_REFUSED = 0x3,
58385 +    TSPEC_STATUS_CODE_UNSPECIFIED_QOS_RELATED_FAILURE = 0xC8,
58386 +    TSPEC_STATUS_CODE_REQUESTED_REFUSED_POLICY_CONFIGURATION = 0xC9,
58387 +    TSPEC_STATUS_CODE_INSUFFCIENT_BANDWIDTH = 0xCA,
58388 +    TSPEC_STATUS_CODE_INVALID_PARAMS = 0xCB,
58389 +    TSPEC_STATUS_CODE_DELTS_SENT    = 0x30,
58390 +    TSPEC_STATUS_CODE_DELTS_RECV    = 0x31,
58391 +} TSPEC_STATUS_CODE;
58392 +
58393 +/*
58394 + * WMM/802.11e Tspec Element
58395 + */
58396 +typedef PREPACK struct wmm_tspec_ie_t {
58397 +    A_UINT8     elementId;
58398 +    A_UINT8     len;
58399 +    A_UINT8     oui[3];
58400 +    A_UINT8     ouiType;
58401 +    A_UINT8     ouiSubType;
58402 +    A_UINT8     version;
58403 +    A_UINT16    tsInfo_info;
58404 +    A_UINT8     tsInfo_reserved;
58405 +    A_UINT16    nominalMSDU;
58406 +    A_UINT16    maxMSDU;
58407 +    A_UINT32    minServiceInt;
58408 +    A_UINT32    maxServiceInt;
58409 +    A_UINT32    inactivityInt;
58410 +    A_UINT32    suspensionInt;
58411 +    A_UINT32    serviceStartTime;
58412 +    A_UINT32    minDataRate;
58413 +    A_UINT32    meanDataRate;
58414 +    A_UINT32    peakDataRate;
58415 +    A_UINT32    maxBurstSize;
58416 +    A_UINT32    delayBound;
58417 +    A_UINT32    minPhyRate;
58418 +    A_UINT16    sba;
58419 +    A_UINT16    mediumTime;
58420 +} POSTPACK WMM_TSPEC_IE;
58421 +
58422 +
58423 +/*
58424 + * BEACON management packets
58425 + *
58426 + *  octet timestamp[8]
58427 + *  octet beacon interval[2]
58428 + *  octet capability information[2]
58429 + *  information element
58430 + *      octet elemid
58431 + *      octet length
58432 + *      octet information[length]
58433 + */
58434 +
58435 +#define IEEE80211_BEACON_INTERVAL(beacon) \
58436 +    ((beacon)[8] | ((beacon)[9] << 8))
58437 +#define IEEE80211_BEACON_CAPABILITY(beacon) \
58438 +    ((beacon)[10] | ((beacon)[11] << 8))
58439 +
58440 +#define IEEE80211_CAPINFO_ESS               0x0001
58441 +#define IEEE80211_CAPINFO_IBSS              0x0002
58442 +#define IEEE80211_CAPINFO_CF_POLLABLE       0x0004
58443 +#define IEEE80211_CAPINFO_CF_POLLREQ        0x0008
58444 +#define IEEE80211_CAPINFO_PRIVACY           0x0010
58445 +#define IEEE80211_CAPINFO_SHORT_PREAMBLE    0x0020
58446 +#define IEEE80211_CAPINFO_PBCC              0x0040
58447 +#define IEEE80211_CAPINFO_CHNL_AGILITY      0x0080
58448 +/* bits 8-9 are reserved */
58449 +#define IEEE80211_CAPINFO_SHORT_SLOTTIME    0x0400
58450 +#define IEEE80211_CAPINFO_APSD              0x0800
58451 +/* bit 12 is reserved */
58452 +#define IEEE80211_CAPINFO_DSSSOFDM          0x2000
58453 +/* bits 14-15 are reserved */
58454 +
58455 +/*
58456 + * Authentication Modes
58457 + */
58458 +
58459 +enum ieee80211_authmode {
58460 +    IEEE80211_AUTH_NONE     = 0,
58461 +    IEEE80211_AUTH_OPEN     = 1,
58462 +    IEEE80211_AUTH_SHARED   = 2,
58463 +    IEEE80211_AUTH_8021X    = 3,
58464 +    IEEE80211_AUTH_AUTO     = 4,   /* auto-select/accept */
58465 +    /* NB: these are used only for ioctls */
58466 +    IEEE80211_AUTH_WPA      = 5,  /* WPA/RSN  w/ 802.1x */
58467 +    IEEE80211_AUTH_WPA_PSK  = 6,  /* WPA/RSN  w/ PSK */
58468 +    IEEE80211_AUTH_WPA_CCKM = 7,  /* WPA/RSN IE  w/ CCKM */
58469 +};
58470 +
58471 +#include "athendpack.h"
58472 +
58473 +#endif /* _NET80211_IEEE80211_H_ */
58474 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h
58475 ===================================================================
58476 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58477 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_ioctl.h  2008-12-11 22:46:49.000000000 +0100
58478 @@ -0,0 +1,163 @@
58479 +/*
58480 + * Copyright (c) 2004-2005 Atheros Communications Inc.
58481 + * All rights reserved.
58482 + *
58483 + *
58484 + *  This program is free software; you can redistribute it and/or modify
58485 + *  it under the terms of the GNU General Public License version 2 as
58486 + *  published by the Free Software Foundation;
58487 + *
58488 + *  Software distributed under the License is distributed on an "AS
58489 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
58490 + *  implied. See the License for the specific language governing
58491 + *  rights and limitations under the License.
58492 + *
58493 + *
58494 + *
58495 + *
58496 + * $Id: //depot/sw/releases/olca2.0-GPL/host/os/linux/include/ieee80211_ioctl.h#1 $
58497 + */
58498 +
58499 +#ifndef _IEEE80211_IOCTL_H_
58500 +#define _IEEE80211_IOCTL_H_
58501 +
58502 +#ifdef __cplusplus
58503 +extern "C" {
58504 +#endif
58505 +
58506 +/*
58507 + * Extracted from the MADWIFI net80211/ieee80211_ioctl.h
58508 + */
58509 +
58510 +/*
58511 + * WPA/RSN get/set key request.  Specify the key/cipher
58512 + * type and whether the key is to be used for sending and/or
58513 + * receiving.  The key index should be set only when working
58514 + * with global keys (use IEEE80211_KEYIX_NONE for ``no index'').
58515 + * Otherwise a unicast/pairwise key is specified by the bssid
58516 + * (on a station) or mac address (on an ap).  They key length
58517 + * must include any MIC key data; otherwise it should be no
58518 + more than IEEE80211_KEYBUF_SIZE.
58519 + */
58520 +struct ieee80211req_key {
58521 +       u_int8_t        ik_type;        /* key/cipher type */
58522 +       u_int8_t        ik_pad;
58523 +       u_int16_t       ik_keyix;       /* key index */
58524 +       u_int8_t        ik_keylen;      /* key length in bytes */
58525 +       u_int8_t        ik_flags;
58526 +#define IEEE80211_KEY_XMIT  0x01
58527 +#define IEEE80211_KEY_RECV  0x02
58528 +#define        IEEE80211_KEY_DEFAULT   0x80    /* default xmit key */
58529 +       u_int8_t        ik_macaddr[IEEE80211_ADDR_LEN];
58530 +       u_int64_t       ik_keyrsc;      /* key receive sequence counter */
58531 +       u_int64_t       ik_keytsc;      /* key transmit sequence counter */
58532 +       u_int8_t        ik_keydata[IEEE80211_KEYBUF_SIZE+IEEE80211_MICBUF_SIZE];
58533 +};
58534 +/*
58535 + * Delete a key either by index or address.  Set the index
58536 + * to IEEE80211_KEYIX_NONE when deleting a unicast key.
58537 + */
58538 +struct ieee80211req_del_key {
58539 +       u_int8_t        idk_keyix;      /* key index */
58540 +       u_int8_t        idk_macaddr[IEEE80211_ADDR_LEN];
58541 +};
58542 +/*
58543 + * MLME state manipulation request.  IEEE80211_MLME_ASSOC
58544 + * only makes sense when operating as a station.  The other
58545 + * requests can be used when operating as a station or an
58546 + * ap (to effect a station).
58547 + */
58548 +struct ieee80211req_mlme {
58549 +       u_int8_t        im_op;          /* operation to perform */
58550 +#define        IEEE80211_MLME_ASSOC            1       /* associate station */
58551 +#define        IEEE80211_MLME_DISASSOC         2       /* disassociate station */
58552 +#define        IEEE80211_MLME_DEAUTH           3       /* deauthenticate station */
58553 +#define        IEEE80211_MLME_AUTHORIZE        4       /* authorize station */
58554 +#define        IEEE80211_MLME_UNAUTHORIZE      5       /* unauthorize station */
58555 +       u_int16_t       im_reason;      /* 802.11 reason code */
58556 +       u_int8_t        im_macaddr[IEEE80211_ADDR_LEN];
58557 +};
58558 +
58559 +struct ieee80211req_addpmkid {
58560 +    u_int8_t    pi_bssid[IEEE80211_ADDR_LEN];
58561 +    u_int8_t    pi_enable;
58562 +    u_int8_t    pi_pmkid[16];
58563 +};
58564 +
58565 +#define AUTH_ALG_OPEN_SYSTEM   0x01
58566 +#define AUTH_ALG_SHARED_KEY    0x02
58567 +#define AUTH_ALG_LEAP          0x04
58568 +
58569 +struct ieee80211req_authalg {
58570 +   u_int8_t auth_alg;
58571 +};
58572 +
58573 +/*
58574 + * Request to add an IE to a Management Frame
58575 + */
58576 +enum{
58577 +    IEEE80211_APPIE_FRAME_BEACON     = 0,
58578 +    IEEE80211_APPIE_FRAME_PROBE_REQ  = 1,
58579 +    IEEE80211_APPIE_FRAME_PROBE_RESP = 2,
58580 +    IEEE80211_APPIE_FRAME_ASSOC_REQ  = 3,
58581 +    IEEE80211_APPIE_FRAME_ASSOC_RESP = 4,
58582 +    IEEE80211_APPIE_NUM_OF_FRAME     = 5
58583 +};
58584 +
58585 +/*
58586 + * The Maximum length of the IE that can be added to a Management frame
58587 + */
58588 +#define IEEE80211_APPIE_FRAME_MAX_LEN  78
58589 +
58590 +struct ieee80211req_getset_appiebuf {
58591 +    u_int32_t app_frmtype; /* management frame type for which buffer is added */
58592 +    u_int32_t app_buflen;  /*application supplied buffer length */
58593 +    u_int8_t  app_buf[];
58594 +};
58595 +
58596 +/*
58597 + * The following definitions are used by an application to set filter
58598 + * for receiving management frames
58599 + */
58600 +enum {
58601 +     IEEE80211_FILTER_TYPE_BEACON      =   0x1,
58602 +     IEEE80211_FILTER_TYPE_PROBE_REQ   =   0x2,
58603 +     IEEE80211_FILTER_TYPE_PROBE_RESP  =   0x4,
58604 +     IEEE80211_FILTER_TYPE_ASSOC_REQ   =   0x8,
58605 +     IEEE80211_FILTER_TYPE_ASSOC_RESP  =   0x10,
58606 +     IEEE80211_FILTER_TYPE_AUTH        =   0x20,
58607 +     IEEE80211_FILTER_TYPE_DEAUTH      =   0x40,
58608 +     IEEE80211_FILTER_TYPE_DISASSOC    =   0x80,
58609 +     IEEE80211_FILTER_TYPE_ALL         =   0xFF  /* used to check the valid filter bits */
58610 +};
58611 +
58612 +struct ieee80211req_set_filter {
58613 +      u_int32_t app_filterype; /* management frame filter type */
58614 +};
58615 +
58616 +enum {
58617 +    IEEE80211_PARAM_AUTHMODE = 3,   /* Authentication Mode */
58618 +    IEEE80211_PARAM_MCASTCIPHER = 5,
58619 +    IEEE80211_PARAM_MCASTKEYLEN = 6,    /* multicast key length */
58620 +    IEEE80211_PARAM_UCASTCIPHER = 8,
58621 +    IEEE80211_PARAM_UCASTKEYLEN = 9,    /* unicast key length */
58622 +       IEEE80211_PARAM_WPA             = 10,   /* WPA mode (0,1,2) */
58623 +       IEEE80211_PARAM_ROAMING         = 12,   /* roaming mode */
58624 +       IEEE80211_PARAM_PRIVACY         = 13,   /* privacy invoked */
58625 +       IEEE80211_PARAM_COUNTERMEASURES = 14,   /* WPA/TKIP countermeasures */
58626 +       IEEE80211_PARAM_DROPUNENCRYPTED = 15,   /* discard unencrypted frames */
58627 +};
58628 +
58629 +/*
58630 + * Values for IEEE80211_PARAM_WPA
58631 + */
58632 +#define WPA_MODE_WPA1   1
58633 +#define WPA_MODE_WPA2   2
58634 +#define WPA_MODE_AUTO   3
58635 +#define WPA_MODE_NONE   4
58636 +
58637 +#ifdef __cplusplus
58638 +}
58639 +#endif
58640 +
58641 +#endif /* _IEEE80211_IOCTL_H_ */
58642 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h
58643 ===================================================================
58644 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58645 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ieee80211_node.h   2008-12-11 22:46:49.000000000 +0100
58646 @@ -0,0 +1,77 @@
58647 +/*-
58648 + * Copyright (c) 2001 Atsushi Onoe
58649 + * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
58650 + * Copyright (c) 2006 Atheros Communications, Inc.
58651 + *
58652 + * Wireless Network driver for Atheros AR6001
58653 + * All rights reserved.
58654 + *
58655 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58656 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
58657 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
58658 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58659 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58660 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58661 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58662 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58663 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
58664 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58665 + *
58666 + */
58667 +#ifndef _IEEE80211_NODE_H_
58668 +#define _IEEE80211_NODE_H_
58669 +
58670 +/*
58671 + * Node locking definitions.
58672 + */
58673 +#define IEEE80211_NODE_LOCK_INIT(_nt)   A_MUTEX_INIT(&(_nt)->nt_nodelock)
58674 +#define IEEE80211_NODE_LOCK_DESTROY(_nt)
58675 +#define IEEE80211_NODE_LOCK(_nt)        A_MUTEX_LOCK(&(_nt)->nt_nodelock)
58676 +#define IEEE80211_NODE_UNLOCK(_nt)      A_MUTEX_UNLOCK(&(_nt)->nt_nodelock)
58677 +#define IEEE80211_NODE_LOCK_BH(_nt)     A_MUTEX_LOCK(&(_nt)->nt_nodelock)
58678 +#define IEEE80211_NODE_UNLOCK_BH(_nt)   A_MUTEX_UNLOCK(&(_nt)->nt_nodelock)
58679 +#define IEEE80211_NODE_LOCK_ASSERT(_nt)
58680 +
58681 +/*
58682 + * Node reference counting definitions.
58683 + *
58684 + * ieee80211_node_initref   initialize the reference count to 1
58685 + * ieee80211_node_incref    add a reference
58686 + * ieee80211_node_decref    remove a reference
58687 + * ieee80211_node_dectestref    remove a reference and return 1 if this
58688 + *              is the last reference, otherwise 0
58689 + * ieee80211_node_refcnt    reference count for printing (only)
58690 + */
58691 +#define ieee80211_node_initref(_ni)     ((_ni)->ni_refcnt = 1)
58692 +#define ieee80211_node_incref(_ni)      ((_ni)->ni_refcnt++)
58693 +#define ieee80211_node_decref(_ni)      ((_ni)->ni_refcnt--)
58694 +#define ieee80211_node_dectestref(_ni)  (((_ni)->ni_refcnt--) == 0)
58695 +#define ieee80211_node_refcnt(_ni)      ((_ni)->ni_refcnt)
58696 +
58697 +#define IEEE80211_NODE_HASHSIZE 32
58698 +/* simple hash is enough for variation of macaddr */
58699 +#define IEEE80211_NODE_HASH(addr)   \
58700 +    (((const A_UINT8 *)(addr))[IEEE80211_ADDR_LEN - 1] % \
58701 +        IEEE80211_NODE_HASHSIZE)
58702 +
58703 +/*
58704 + * Table of ieee80211_node instances.  Each ieee80211com
58705 + * has at least one for holding the scan candidates.
58706 + * When operating as an access point or in ibss mode there
58707 + * is a second table for associated stations or neighbors.
58708 + */
58709 +struct ieee80211_node_table {
58710 +    void                   *nt_wmip;       /* back reference */
58711 +    A_MUTEX_T               nt_nodelock;    /* on node table */
58712 +    struct bss              *nt_node_first; /* information of all nodes */
58713 +    struct bss              *nt_node_last;  /* information of all nodes */
58714 +    struct bss              *nt_hash[IEEE80211_NODE_HASHSIZE];
58715 +    const char              *nt_name;   /* for debugging */
58716 +    A_UINT32                nt_scangen; /* gen# for timeout scan */
58717 +    A_TIMER                 nt_inact_timer;
58718 +    A_UINT8                 isTimerArmed;   /* is the node timer armed */
58719 +};
58720 +
58721 +#define WLAN_NODE_INACT_TIMEOUT_MSEC            10000
58722 +
58723 +#endif /* _IEEE80211_NODE_H_ */
58724 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ini_dset.h
58725 ===================================================================
58726 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58727 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/ini_dset.h 2008-12-11 22:46:49.000000000 +0100
58728 @@ -0,0 +1,40 @@
58729 +/*
58730 + * Copyright (c) 2004-2007 Atheros Communications Inc.
58731 + * All rights reserved.
58732 + *
58733 + * $ATH_LICENSE_HOSTSDK0_C$
58734 + *
58735 + */
58736 +#ifndef _INI_DSET_H_
58737 +#define _INI_DSET_H_
58738 +
58739 +/*
58740 + * Each of these represents a WHAL INI table, which consists
58741 + * of an "address column" followed by 1 or more "value columns".
58742 + *
58743 + * Software uses the base WHAL_INI_DATA_ID+column to access a
58744 + * DataSet that holds a particular column of data.
58745 + */
58746 +typedef enum {
58747 +    WHAL_INI_DATA_ID_NULL               =0,
58748 +    WHAL_INI_DATA_ID_MODE_SPECIFIC      =1,  /* 2,3 */
58749 +    WHAL_INI_DATA_ID_COMMON             =4,  /* 5 */
58750 +    WHAL_INI_DATA_ID_BB_RFGAIN          =6,  /* 7,8 */
58751 +    WHAL_INI_DATA_ID_ANALOG_BANK1       =9,  /* 10 */
58752 +    WHAL_INI_DATA_ID_ANALOG_BANK2       =11, /* 12 */
58753 +    WHAL_INI_DATA_ID_ANALOG_BANK3       =13, /* 14, 15 */
58754 +    WHAL_INI_DATA_ID_ANALOG_BANK6       =16, /* 17, 18 */
58755 +    WHAL_INI_DATA_ID_ANALOG_BANK7       =19, /* 20 */
58756 +    WHAL_INI_DATA_ID_MODE_OVERRIDES     =21, /* 22,23 */
58757 +    WHAL_INI_DATA_ID_COMMON_OVERRIDES   =24, /* 25 */
58758 +
58759 +    WHAL_INI_DATA_ID_MAX                =25
58760 +} WHAL_INI_DATA_ID;
58761 +
58762 +typedef PREPACK struct {
58763 +    A_UINT16 freqIndex; // 1 - A mode 2 - B or G mode 0 - common
58764 +    A_UINT16 offset;
58765 +    A_UINT32 newValue;
58766 +} POSTPACK INI_DSET_REG_OVERRIDE;
58767 +
58768 +#endif
58769 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regDb.h
58770 ===================================================================
58771 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58772 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regDb.h    2008-12-11 22:46:49.000000000 +0100
58773 @@ -0,0 +1,19 @@
58774 +/*
58775 + * Copyright (c) 2005 Atheros Communications, Inc.
58776 + * All rights reserved.
58777 + *
58778 + *
58779 + * $ATH_LICENSE_HOSTSDK0_C$
58780 + *
58781 + * This module contains the header files for regulatory module,
58782 + * which include the DB schema and DB values.
58783 + * $Id:
58784 + */
58785 +
58786 +#ifndef __REG_DB_H__
58787 +#define __REG_DB_H__
58788 +
58789 +#include "./regulatory/reg_dbschema.h"
58790 +#include "./regulatory/reg_dbvalues.h"
58791 +
58792 +#endif  /* __REG_DB_H__ */
58793 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regdump.h
58794 ===================================================================
58795 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58796 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/regdump.h  2008-12-11 22:46:49.000000000 +0100
58797 @@ -0,0 +1,33 @@
58798 +#ifndef __REGDUMP_H__
58799 +#define __REGDUMP_H__
58800 +/*
58801 + * Copyright (c) 2004-2007 Atheros Communications Inc.
58802 + * All rights reserved.
58803 + *
58804 + * $ATH_LICENSE_HOSTSDK0_C$
58805 + *
58806 + */
58807 +#if defined(AR6001)
58808 +#include "AR6001/AR6001_regdump.h"
58809 +#endif
58810 +#if defined(AR6002)
58811 +#include "AR6002/AR6002_regdump.h"
58812 +#endif
58813 +
58814 +#if !defined(__ASSEMBLER__)
58815 +/*
58816 + * Target CPU state at the time of failure is reflected
58817 + * in a register dump, which the Host can fetch through
58818 + * the diagnostic window.
58819 + */
58820 +struct register_dump_s {
58821 +    A_UINT32 target_id;               /* Target ID */
58822 +    A_UINT32 assline;                 /* Line number (if assertion failure) */
58823 +    A_UINT32 pc;                      /* Program Counter at time of exception */
58824 +    A_UINT32 badvaddr;                /* Virtual address causing exception */
58825 +    CPU_exception_frame_t exc_frame;  /* CPU-specific exception info */
58826 +
58827 +    /* Could copy top of stack here, too.... */
58828 +};
58829 +#endif /* __ASSEMBLER__ */
58830 +#endif /* __REGDUMP_H__ */
58831 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/targaddrs.h
58832 ===================================================================
58833 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58834 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/targaddrs.h        2008-12-11 22:46:49.000000000 +0100
58835 @@ -0,0 +1,158 @@
58836 +/*
58837 + * Copyright (c) 2004-2007 Atheros Communications Inc.
58838 + * All rights reserved.
58839 + *
58840 + * $ATH_LICENSE_HOSTSDK0_C$
58841 + *
58842 + */
58843 +
58844 +#ifndef __TARGADDRS_H__
58845 +#define __TARGADDRS_H__
58846 +#if defined(AR6001)
58847 +#include "AR6001/addrs.h"
58848 +#endif
58849 +#if defined(AR6002)
58850 +#include "AR6002/addrs.h"
58851 +#endif
58852 +
58853 +/*
58854 + * AR6K option bits, to enable/disable various features.
58855 + * By default, all option bits are 0.
58856 + * These bits can be set in LOCAL_SCRATCH register 0.
58857 + */
58858 +#define AR6K_OPTION_BMI_DISABLE      0x01 /* Disable BMI comm with Host */
58859 +#define AR6K_OPTION_SERIAL_ENABLE    0x02 /* Enable serial port msgs */
58860 +#define AR6K_OPTION_WDT_DISABLE      0x04 /* WatchDog Timer override */
58861 +#define AR6K_OPTION_SLEEP_DISABLE    0x08 /* Disable system sleep */
58862 +#define AR6K_OPTION_STOP_BOOT        0x10 /* Stop boot processes (for ATE) */
58863 +#define AR6K_OPTION_ENABLE_NOANI     0x20 /* Operate without ANI */
58864 +#define AR6K_OPTION_DSET_DISABLE     0x40 /* Ignore DataSets */
58865 +#define AR6K_OPTION_IGNORE_FLASH     0x80 /* Ignore flash during bootup */
58866 +
58867 +/*
58868 + * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the
58869 + * host_interest structure.  It must match the address of the _host_interest
58870 + * symbol (see linker script).
58871 + *
58872 + * Host Interest is shared between Host and Target in order to coordinate
58873 + * between the two, and is intended to remain constant (with additions only
58874 + * at the end) across software releases.
58875 + */
58876 +#define AR6001_HOST_INTEREST_ADDRESS     0x80000600
58877 +#define AR6002_HOST_INTEREST_ADDRESS     0x00500400
58878 +
58879 +#define HOST_INTEREST_MAX_SIZE          0x100
58880 +
58881 +#if !defined(__ASSEMBLER__)
58882 +struct register_dump_s;
58883 +struct dbglog_hdr_s;
58884 +
58885 +/*
58886 + * These are items that the Host may need to access
58887 + * via BMI or via the Diagnostic Window. The position
58888 + * of items in this structure must remain constant
58889 + * across firmware revisions!
58890 + *
58891 + * Types for each item must be fixed size across
58892 + * target and host platforms.
58893 + *
58894 + * More items may be added at the end.
58895 + */
58896 +struct host_interest_s {
58897 +    /*
58898 +     * Pointer to application-defined area, if any.
58899 +     * Set by Target application during startup.
58900 +     */
58901 +    A_UINT32               hi_app_host_interest;                      /* 0x00 */
58902 +
58903 +    /* Pointer to register dump area, valid after Target crash. */
58904 +    A_UINT32               hi_failure_state;                          /* 0x04 */
58905 +
58906 +    /* Pointer to debug logging header */
58907 +    A_UINT32               hi_dbglog_hdr;                             /* 0x08 */
58908 +
58909 +    /* Indicates whether or not flash is present on Target.
58910 +     * NB: flash_is_present indicator is here not just
58911 +     * because it might be of interest to the Host; but
58912 +     * also because it's set early on by Target's startup
58913 +     * asm code and we need it to have a special RAM address
58914 +     * so that it doesn't get reinitialized with the rest
58915 +     * of data.
58916 +     */
58917 +    A_UINT32               hi_flash_is_present;                       /* 0x0c */
58918 +
58919 +    /*
58920 +     * General-purpose flag bits, similar to AR6000_OPTION_* flags.
58921 +     * Can be used by application rather than by OS.
58922 +     */
58923 +    A_UINT32               hi_option_flag;                            /* 0x10 */
58924 +
58925 +    /*
58926 +     * Boolean that determines whether or not to
58927 +     * display messages on the serial port.
58928 +     */
58929 +    A_UINT32               hi_serial_enable;                          /* 0x14 */
58930 +
58931 +    /* Start address of Flash DataSet index, if any */
58932 +    A_UINT32               hi_dset_list_head;                         /* 0x18 */
58933 +
58934 +    /* Override Target application start address */
58935 +    A_UINT32               hi_app_start;                              /* 0x1c */
58936 +
58937 +    /* Clock and voltage tuning */
58938 +    A_UINT32               hi_skip_clock_init;                        /* 0x20 */
58939 +    A_UINT32               hi_core_clock_setting;                     /* 0x24 */
58940 +    A_UINT32               hi_cpu_clock_setting;                      /* 0x28 */
58941 +    A_UINT32               hi_system_sleep_setting;                   /* 0x2c */
58942 +    A_UINT32               hi_xtal_control_setting;                   /* 0x30 */
58943 +    A_UINT32               hi_pll_ctrl_setting_24ghz;                 /* 0x34 */
58944 +    A_UINT32               hi_pll_ctrl_setting_5ghz;                  /* 0x38 */
58945 +    A_UINT32               hi_ref_voltage_trim_setting;               /* 0x3c */
58946 +    A_UINT32               hi_clock_info;                             /* 0x40 */
58947 +
58948 +    /*
58949 +     * Flash configuration overrides, used only
58950 +     * when firmware is not executing from flash.
58951 +     * (When using flash, modify the global variables
58952 +     * with equivalent names.)
58953 +     */
58954 +    A_UINT32               hi_bank0_addr_value;                       /* 0x44 */
58955 +    A_UINT32               hi_bank0_read_value;                       /* 0x48 */
58956 +    A_UINT32               hi_bank0_write_value;                      /* 0x4c */
58957 +    A_UINT32               hi_bank0_config_value;                     /* 0x50 */
58958 +
58959 +    /* Pointer to Board Data  */
58960 +    A_UINT32               hi_board_data;                             /* 0x54 */
58961 +    A_UINT32               hi_board_data_initialized;                 /* 0x58 */
58962 +
58963 +    A_UINT32               hi_dset_RAM_index_table;                   /* 0x5c */
58964 +
58965 +    A_UINT32               hi_desired_baud_rate;                      /* 0x60 */
58966 +    A_UINT32               hi_dbglog_config;                          /* 0x64 */
58967 +    A_UINT32               hi_end_RAM_reserve_sz;                     /* 0x68 */
58968 +    A_UINT32               hi_mbox_io_block_sz;                       /* 0x6c */
58969 +
58970 +    A_UINT32               hi_num_bpatch_streams;                     /* 0x70 */
58971 +    A_UINT32               hi_mbox_isr_yield_limit;                   /* 0x74 */
58972 +
58973 +    A_UINT32               hi_refclk_hz;                              /* 0x78 */
58974 +};
58975 +
58976 +/* Bits defined in hi_option_flag */
58977 +#define HI_OPTION_TIMER_WAR     1 /* not really used */
58978 +
58979 +/*
58980 + * Intended for use by Host software, this macro returns the Target RAM
58981 + * address of any item in the host_interest structure.
58982 + * Example: target_addr = AR6001_HOST_INTEREST_ITEM_ADDRESS(hi_board_data);
58983 + */
58984 +#define AR6001_HOST_INTEREST_ITEM_ADDRESS(item) \
58985 +    ((A_UINT32)&((((struct host_interest_s *)(AR6001_HOST_INTEREST_ADDRESS))->item)))
58986 +
58987 +#define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \
58988 +    ((A_UINT32)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item)))
58989 +
58990 +
58991 +#endif /* !__ASSEMBLER__ */
58992 +
58993 +#endif /* __TARGADDRS_H__ */
58994 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/testcmd.h
58995 ===================================================================
58996 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
58997 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/testcmd.h  2008-12-11 22:46:49.000000000 +0100
58998 @@ -0,0 +1,144 @@
58999 +/*
59000 + * Copyright (c) 2004-2005 Atheros Communications Inc.
59001 + * All rights reserved.
59002 + *
59003 + *
59004 + * $ATH_LICENSE_HOSTSDK0_C$
59005 + *
59006 + */
59007 +
59008 +#ifndef  TESTCMD_H_
59009 +#define  TESTCMD_H_
59010 +
59011 +#ifdef __cplusplus
59012 +extern "C" {
59013 +#endif
59014 +
59015 +typedef enum {
59016 +    ZEROES_PATTERN = 0,
59017 +    ONES_PATTERN,
59018 +    REPEATING_10,
59019 +    PN7_PATTERN,
59020 +    PN9_PATTERN,
59021 +    PN15_PATTERN
59022 +}TX_DATA_PATTERN;
59023 +
59024 +/* Continous tx
59025 +   mode : TCMD_CONT_TX_OFF - Disabling continous tx
59026 +          TCMD_CONT_TX_SINE - Enable continuous unmodulated tx
59027 +          TCMD_CONT_TX_FRAME- Enable continuous modulated tx
59028 +   freq : Channel freq in Mhz. (e.g 2412 for channel 1 in 11 g)
59029 +dataRate: 0 - 1 Mbps
59030 +          1 - 2 Mbps
59031 +          2 - 5.5 Mbps
59032 +          3 - 11 Mbps
59033 +          4 - 6 Mbps
59034 +          5 - 9 Mbps
59035 +          6 - 12 Mbps
59036 +          7 - 18 Mbps
59037 +          8 - 24 Mbps
59038 +          9 - 36 Mbps
59039 +         10 - 28 Mbps
59040 +         11 - 54 Mbps
59041 +  txPwr: Tx power in dBm[5 -11] for unmod Tx, [5-14] for mod Tx
59042 +antenna:  1 - one antenna
59043 +          2 - two antenna
59044 +Note : Enable/disable continuous tx test cmd works only when target is awake.
59045 +*/
59046 +
59047 +typedef enum {
59048 +    TCMD_CONT_TX_OFF = 0,
59049 +    TCMD_CONT_TX_SINE,
59050 +    TCMD_CONT_TX_FRAME,
59051 +    TCMD_CONT_TX_TX99,
59052 +    TCMD_CONT_TX_TX100
59053 +} TCMD_CONT_TX_MODE;
59054 +
59055 +typedef PREPACK struct {
59056 +    A_UINT32                 testCmdId;
59057 +    A_UINT32                mode;
59058 +    A_UINT32                freq;
59059 +    A_UINT32                dataRate;
59060 +    A_INT32                 txPwr;
59061 +    A_UINT32                antenna;
59062 +    A_UINT32                enANI;
59063 +    A_UINT32                scramblerOff;
59064 +    A_UINT32                aifsn;
59065 +    A_UINT16                pktSz;
59066 +    A_UINT16                txPattern;
59067 +} POSTPACK TCMD_CONT_TX;
59068 +
59069 +#define TCMD_TXPATTERN_ZERONE                 0x1
59070 +#define TCMD_TXPATTERN_ZERONE_DIS_SCRAMBLE    0x2
59071 +
59072 +/* Continuous Rx
59073 + act: TCMD_CONT_RX_PROMIS - promiscuous mode (accept all incoming frames)
59074 +      TCMD_CONT_RX_FILTER - filter mode (accept only frames with dest
59075 +                                             address equal specified
59076 +                                             mac address (set via act =3)
59077 +      TCMD_CONT_RX_REPORT  off mode  (disable cont rx mode and get the
59078 +                                          report from the last cont
59079 +                                          Rx test)
59080 +
59081 +     TCMD_CONT_RX_SETMAC - set MacAddr mode (sets the MAC address for the
59082 +                                                 target. This Overrides
59083 +                                                 the default MAC address.)
59084 +
59085 +*/
59086 +typedef enum {
59087 +    TCMD_CONT_RX_PROMIS =0,
59088 +    TCMD_CONT_RX_FILTER,
59089 +    TCMD_CONT_RX_REPORT,
59090 +    TCMD_CONT_RX_SETMAC
59091 +} TCMD_CONT_RX_ACT;
59092 +
59093 +typedef PREPACK struct {
59094 +    A_UINT32         testCmdId;
59095 +    A_UINT32        act;
59096 +    A_UINT32        enANI;
59097 +    PREPACK union {
59098 +        struct PREPACK TCMD_CONT_RX_PARA {
59099 +            A_UINT32    freq;
59100 +            A_UINT32    antenna;
59101 +        } POSTPACK para;
59102 +        struct PREPACK TCMD_CONT_RX_REPORT {
59103 +            A_UINT32    totalPkt;
59104 +            A_INT32    rssiInDBm;
59105 +        } POSTPACK report;
59106 +        struct PREPACK TCMD_CONT_RX_MAC {
59107 +            A_UCHAR    addr[ATH_MAC_LEN];
59108 +        } POSTPACK mac;
59109 +    } POSTPACK u;
59110 +} POSTPACK TCMD_CONT_RX;
59111 +
59112 +/* Force sleep/wake  test cmd
59113 + mode: TCMD_PM_WAKEUP - Wakeup the target
59114 +       TCMD_PM_SLEEP - Force the target to sleep.
59115 + */
59116 +typedef enum {
59117 +    TCMD_PM_WAKEUP = 1, /* be consistent with target */
59118 +    TCMD_PM_SLEEP
59119 +} TCMD_PM_MODE;
59120 +
59121 +typedef PREPACK struct {
59122 +       A_UINT32  testCmdId;
59123 +    A_UINT32  mode;
59124 +} POSTPACK TCMD_PM;
59125 +
59126 +typedef enum{
59127 +    TCMD_CONT_TX_ID,
59128 +    TCMD_CONT_RX_ID,
59129 +    TCMD_PM_ID
59130 +   } TCMD_ID;
59131 +
59132 +typedef PREPACK union {
59133 +          TCMD_CONT_TX contTx;
59134 +          TCMD_CONT_RX contRx;
59135 +          TCMD_PM pm ;
59136 +} POSTPACK TEST_CMD;
59137 +
59138 +#ifdef __cplusplus
59139 +}
59140 +#endif
59141 +
59142 +#endif /* TESTCMD_H_ */
59143 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_api.h
59144 ===================================================================
59145 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
59146 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_api.h 2008-12-11 22:46:49.000000000 +0100
59147 @@ -0,0 +1,101 @@
59148 +#ifndef _HOST_WLAN_API_H_
59149 +#define _HOST_WLAN_API_H_
59150 +/*
59151 + * Copyright (c) 2004-2005 Atheros Communications Inc.
59152 + * All rights reserved.
59153 + *
59154 + * This file contains the API for the host wlan module
59155 + *
59156 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wlan_api.h#1 $
59157 + *
59158 + *
59159 + *  This program is free software; you can redistribute it and/or modify
59160 + *  it under the terms of the GNU General Public License version 2 as
59161 + *  published by the Free Software Foundation;
59162 + *
59163 + *  Software distributed under the License is distributed on an "AS
59164 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
59165 + *  implied. See the License for the specific language governing
59166 + *  rights and limitations under the License.
59167 + *
59168 + *
59169 + *
59170 + */
59171 +
59172 +#ifdef __cplusplus
59173 +extern "C" {
59174 +#endif
59175 +
59176 +struct ieee80211_node_table;
59177 +struct ieee80211_frame;
59178 +
59179 +struct ieee80211_common_ie {
59180 +    A_UINT16    ie_chan;
59181 +    A_UINT8     *ie_tstamp;
59182 +    A_UINT8     *ie_ssid;
59183 +    A_UINT8     *ie_rates;
59184 +    A_UINT8     *ie_xrates;
59185 +    A_UINT8     *ie_country;
59186 +    A_UINT8     *ie_wpa;
59187 +    A_UINT8     *ie_rsn;
59188 +    A_UINT8     *ie_wmm;
59189 +    A_UINT8     *ie_ath;
59190 +    A_UINT16    ie_capInfo;
59191 +    A_UINT16    ie_beaconInt;
59192 +    A_UINT8     *ie_tim;
59193 +    A_UINT8     *ie_chswitch;
59194 +    A_UINT8     ie_erp;
59195 +    A_UINT8     *ie_wsc;
59196 +};
59197 +
59198 +typedef struct bss {
59199 +    A_UINT8                      ni_macaddr[6];
59200 +    A_UINT8                      ni_snr;
59201 +    A_INT16                      ni_rssi;
59202 +    struct bss                   *ni_list_next;
59203 +    struct bss                   *ni_list_prev;
59204 +    struct bss                   *ni_hash_next;
59205 +    struct bss                   *ni_hash_prev;
59206 +    struct ieee80211_common_ie   ni_cie;
59207 +    A_UINT8                     *ni_buf;
59208 +    struct ieee80211_node_table *ni_table;
59209 +    A_UINT32                     ni_refcnt;
59210 +    int                          ni_scangen;
59211 +    A_UINT32                     ni_tstamp;
59212 +} bss_t;
59213 +
59214 +typedef void wlan_node_iter_func(void *arg, bss_t *);
59215 +
59216 +bss_t *wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size);
59217 +void wlan_node_free(bss_t *ni);
59218 +void wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni,
59219 +                const A_UINT8 *macaddr);
59220 +bss_t *wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr);
59221 +void wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni);
59222 +void wlan_free_allnodes(struct ieee80211_node_table *nt);
59223 +void wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f,
59224 +                        void *arg);
59225 +
59226 +void wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt);
59227 +void wlan_node_table_reset(struct ieee80211_node_table *nt);
59228 +void wlan_node_table_cleanup(struct ieee80211_node_table *nt);
59229 +
59230 +A_STATUS wlan_parse_beacon(A_UINT8 *buf, int framelen,
59231 +                           struct ieee80211_common_ie *cie);
59232 +
59233 +A_UINT16 wlan_ieee2freq(int chan);
59234 +A_UINT32 wlan_freq2ieee(A_UINT16 freq);
59235 +
59236 +
59237 +bss_t *
59238 +wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid,
59239 +                                       A_UINT32 ssidLength, A_BOOL bIsWPA2);
59240 +
59241 +void
59242 +wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni);
59243 +
59244 +#ifdef __cplusplus
59245 +}
59246 +#endif
59247 +
59248 +#endif /* _HOST_WLAN_API_H_ */
59249 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h
59250 ===================================================================
59251 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
59252 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wlan_dset.h        2008-12-11 22:46:49.000000000 +0100
59253 @@ -0,0 +1,20 @@
59254 +/*
59255 + * Copyright (c) 2007 Atheros Communications, Inc.
59256 + * All rights reserved.
59257 + *
59258 + *
59259 + * $ATH_LICENSE_HOSTSDK0_C$
59260 + *
59261 + */
59262 +
59263 +#ifndef __WLAN_DSET_H__
59264 +#define __WKAN_DSET_H__
59265 +
59266 +typedef PREPACK struct wow_config_dset {
59267 +
59268 +    A_UINT8 valid_dset;
59269 +    A_UINT8 gpio_enable;
59270 +    A_UINT16 gpio_pin;
59271 +} POSTPACK WOW_CONFIG_DSET;
59272 +
59273 +#endif
59274 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi_api.h
59275 ===================================================================
59276 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
59277 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi_api.h  2008-12-11 22:46:49.000000000 +0100
59278 @@ -0,0 +1,260 @@
59279 +#ifndef _WMI_API_H_
59280 +#define _WMI_API_H_
59281 +/*
59282 + * Copyright (c) 2004-2006 Atheros Communications Inc.
59283 + * All rights reserved.
59284 + *
59285 + * This file contains the definitions for the Wireless Module Interface (WMI).
59286 + *
59287 + * $Id: //depot/sw/releases/olca2.0-GPL/host/include/wmi_api.h#2 $
59288 + *
59289 + *
59290 + *  This program is free software; you can redistribute it and/or modify
59291 + *  it under the terms of the GNU General Public License version 2 as
59292 + *  published by the Free Software Foundation;
59293 + *
59294 + *  Software distributed under the License is distributed on an "AS
59295 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
59296 + *  implied. See the License for the specific language governing
59297 + *  rights and limitations under the License.
59298 + *
59299 + *
59300 + *
59301 + */
59302 +
59303 +#ifdef __cplusplus
59304 +extern "C" {
59305 +#endif
59306 +
59307 +/*
59308 + * IP QoS Field definitions according to 802.1p
59309 + */
59310 +#define BEST_EFFORT_PRI         0
59311 +#define BACKGROUND_PRI          1
59312 +#define EXCELLENT_EFFORT_PRI    3
59313 +#define CONTROLLED_LOAD_PRI     4
59314 +#define VIDEO_PRI               5
59315 +#define VOICE_PRI               6
59316 +#define NETWORK_CONTROL_PRI     7
59317 +#define MAX_NUM_PRI             8
59318 +
59319 +#define UNDEFINED_PRI           (0xff)
59320 +
59321 +/* simple mapping of IP TOS field to a WMI priority stream
59322 + * this mapping was taken from the original linux driver implementation
59323 + * The operation maps the following
59324 + *
59325 + *  */
59326 +#define IP_TOS_TO_WMI_PRI(tos)  \
59327 +    ((WMI_PRI_STREAM_ID)(((tos) >> 1) & 0x03))
59328 +
59329 +#define WMI_IMPLICIT_PSTREAM_INACTIVITY_INT 5000 /* 5 seconds */
59330 +
59331 +
59332 +struct wmi_t;
59333 +
59334 +void *wmi_init(void *devt);
59335 +
59336 +void wmi_qos_state_init(struct wmi_t *wmip);
59337 +void wmi_shutdown(struct wmi_t *wmip);
59338 +A_UINT16  wmi_get_mapped_qos_queue(struct wmi_t *, A_UINT8);
59339 +A_STATUS wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf);
59340 +A_STATUS wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType);
59341 +A_STATUS wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf);
59342 +A_STATUS wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf);
59343 +A_STATUS wmi_syncpoint(struct wmi_t *wmip);
59344 +A_STATUS wmi_syncpoint_reset(struct wmi_t *wmip);
59345 +WMI_PRI_STREAM_ID wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass);
59346 +A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up);
59347 +
59348 +A_STATUS wmi_control_rx(struct wmi_t *wmip, void *osbuf);
59349 +void wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg);
59350 +void wmi_free_allnodes(struct wmi_t *wmip);
59351 +bss_t *wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr);
59352 +
59353 +
59354 +typedef enum {
59355 +    NO_SYNC_WMIFLAG = 0,
59356 +    SYNC_BEFORE_WMIFLAG,            /* transmit all queued data before cmd */
59357 +    SYNC_AFTER_WMIFLAG,             /* any new data waits until cmd execs */
59358 +    SYNC_BOTH_WMIFLAG,
59359 +    END_WMIFLAG                     /* end marker */
59360 +} WMI_SYNC_FLAG;
59361 +
59362 +A_STATUS wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
59363 +                      WMI_SYNC_FLAG flag);
59364 +A_STATUS wmi_connect_cmd(struct wmi_t *wmip,
59365 +                         NETWORK_TYPE netType,
59366 +                         DOT11_AUTH_MODE dot11AuthMode,
59367 +                         AUTH_MODE authMode,
59368 +                         CRYPTO_TYPE pairwiseCrypto,
59369 +                         A_UINT8 pairwiseCryptoLen,
59370 +                         CRYPTO_TYPE groupCrypto,
59371 +                         A_UINT8 groupCryptoLen,
59372 +                         int ssidLength,
59373 +                         A_UCHAR *ssid,
59374 +                         A_UINT8 *bssid,
59375 +                         A_UINT16 channel,
59376 +                         A_UINT32 ctrl_flags);
59377 +A_STATUS wmi_reconnect_cmd(struct wmi_t *wmip,
59378 +                           A_UINT8 *bssid,
59379 +                           A_UINT16 channel);
59380 +A_STATUS wmi_disconnect_cmd(struct wmi_t *wmip);
59381 +A_STATUS wmi_getrev_cmd(struct wmi_t *wmip);
59382 +A_STATUS wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType,
59383 +                           A_BOOL forceFgScan, A_BOOL isLegacy,
59384 +                           A_UINT32 homeDwellTime, A_UINT32 forceScanInterval);
59385 +A_STATUS wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec,
59386 +                            A_UINT16 fg_end_sec, A_UINT16 bg_sec,
59387 +                            A_UINT16 minact_chdw_msec,
59388 +                            A_UINT16 maxact_chdw_msec, A_UINT16 pas_chdw_msec,
59389 +                            A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags,
59390 +                            A_UINT32 max_dfsch_act_time);
59391 +A_STATUS wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask);
59392 +A_STATUS wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag,
59393 +                            A_UINT8 ssidLength, A_UCHAR *ssid);
59394 +A_STATUS wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons);
59395 +A_STATUS wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmisstime, A_UINT16 bmissbeacons);
59396 +A_STATUS wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType,
59397 +                           A_UINT8 ieLen, A_UINT8 *ieInfo);
59398 +A_STATUS wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode);
59399 +A_STATUS wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl,
59400 +                            A_UINT16 atim_windows, A_UINT16 timeout_value);
59401 +A_STATUS wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod,
59402 +                           A_UINT16 psPollNum, A_UINT16 dtimPolicy);
59403 +A_STATUS wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout);
59404 +A_STATUS wmi_sync_cmd(struct wmi_t *wmip, A_UINT8 syncNumber);
59405 +A_STATUS wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *pstream);
59406 +A_STATUS wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 streamID);
59407 +A_STATUS wmi_set_bitrate_cmd(struct wmi_t *wmip, A_INT32 rate);
59408 +A_STATUS wmi_get_bitrate_cmd(struct wmi_t *wmip);
59409 +A_INT8   wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate);
59410 +A_STATUS wmi_get_regDomain_cmd(struct wmi_t *wmip);
59411 +A_STATUS wmi_get_channelList_cmd(struct wmi_t *wmip);
59412 +A_STATUS wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam,
59413 +                                   WMI_PHY_MODE mode, A_INT8 numChan,
59414 +                                   A_UINT16 *channelList);
59415 +
59416 +A_STATUS wmi_set_snr_threshold_params(struct wmi_t *wmip,
59417 +                                       WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd);
59418 +A_STATUS wmi_set_rssi_threshold_params(struct wmi_t *wmip,
59419 +                                        WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd);
59420 +A_STATUS wmi_clr_rssi_snr(struct wmi_t *wmip);
59421 +A_STATUS wmi_set_lq_threshold_params(struct wmi_t *wmip,
59422 +                                      WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd);
59423 +A_STATUS wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold);
59424 +A_STATUS wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status);
59425 +
59426 +A_STATUS wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 bitmask);
59427 +
59428 +A_STATUS wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie,
59429 +                                    A_UINT32 source);
59430 +A_STATUS wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask,
59431 +                                     A_UINT16 tsr, A_BOOL rep, A_UINT16 size,
59432 +                                     A_UINT32 valid);
59433 +A_STATUS wmi_get_stats_cmd(struct wmi_t *wmip);
59434 +A_STATUS wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex,
59435 +                        CRYPTO_TYPE keyType, A_UINT8 keyUsage,
59436 +                        A_UINT8 keyLength,A_UINT8 *keyRSC,
59437 +                        A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl,
59438 +                        WMI_SYNC_FLAG sync_flag);
59439 +A_STATUS wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk);
59440 +A_STATUS wmi_delete_krk_cmd(struct wmi_t *wmip);
59441 +A_STATUS wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex);
59442 +A_STATUS wmi_set_akmp_params_cmd(struct wmi_t *wmip,
59443 +                                 WMI_SET_AKMP_PARAMS_CMD *akmpParams);
59444 +A_STATUS wmi_get_pmkid_list_cmd(struct wmi_t *wmip);
59445 +A_STATUS wmi_set_pmkid_list_cmd(struct wmi_t *wmip,
59446 +                                WMI_SET_PMKID_LIST_CMD *pmkInfo);
59447 +A_STATUS wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM);
59448 +A_STATUS wmi_get_txPwr_cmd(struct wmi_t *wmip);
59449 +A_STATUS wmi_switch_radio(struct wmi_t *wmip, A_UINT8 on);
59450 +A_STATUS wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid);
59451 +A_STATUS wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex);
59452 +A_STATUS wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en);
59453 +A_STATUS wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId,
59454 +                          A_BOOL set);
59455 +A_STATUS wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop,
59456 +                                   A_UINT8 eCWmin, A_UINT8 eCWmax,
59457 +                                   A_UINT8 aifsn);
59458 +A_STATUS wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType,
59459 +                                  A_UINT8 trafficClass, A_UINT8 maxRetries,
59460 +                                  A_UINT8 enableNotify);
59461 +
59462 +void wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid);
59463 +
59464 +A_STATUS wmi_get_roam_tbl_cmd(struct wmi_t *wmip);
59465 +A_STATUS wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType);
59466 +A_STATUS wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p,
59467 +                               A_UINT8 size);
59468 +A_STATUS wmi_set_powersave_timers_cmd(struct wmi_t *wmip,
59469 +                            WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd,
59470 +                            A_UINT8 size);
59471 +
59472 +A_STATUS wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode);
59473 +A_STATUS wmi_opt_tx_frame_cmd(struct wmi_t *wmip,
59474 +                              A_UINT8 frmType,
59475 +                              A_UINT8 *dstMacAddr,
59476 +                              A_UINT8 *bssid,
59477 +                              A_UINT16 optIEDataLen,
59478 +                              A_UINT8 *optIEData);
59479 +
59480 +A_STATUS wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl);
59481 +A_STATUS wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize);
59482 +A_STATUS wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSpLen);
59483 +A_UINT8  convert_userPriority_to_trafficClass(A_UINT8 userPriority);
59484 +A_UINT8 wmi_get_power_mode_cmd(struct wmi_t *wmip);
59485 +A_STATUS wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance);
59486 +
59487 +#ifdef CONFIG_HOST_TCMD_SUPPORT
59488 +A_STATUS wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32  len);
59489 +#endif
59490 +
59491 +A_STATUS wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status);
59492 +A_STATUS wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd);
59493 +
59494 +
59495 +/*
59496 + *  This function is used to configure the fix rates mask to the target.
59497 + */
59498 +A_STATUS wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask);
59499 +A_STATUS wmi_get_ratemask_cmd(struct wmi_t *wmip);
59500 +
59501 +A_STATUS wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode);
59502 +
59503 +A_STATUS wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode);
59504 +
59505 +A_STATUS wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status);
59506 +A_STATUS wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG txEnable);
59507 +
59508 +A_STATUS wmi_get_keepalive_configured(struct wmi_t *wmip);
59509 +A_UINT8 wmi_get_keepalive_cmd(struct wmi_t *wmip);
59510 +A_STATUS wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval);
59511 +
59512 +A_STATUS wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType,
59513 +                           A_UINT8 ieLen,A_UINT8 *ieInfo);
59514 +
59515 +A_STATUS wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen);
59516 +A_INT32 wmi_get_rate(A_INT8 rateindex);
59517 +
59518 +/*Wake on Wireless WMI commands*/
59519 +A_STATUS wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip, WMI_SET_HOST_SLEEP_MODE_CMD *cmd);
59520 +A_STATUS wmi_set_wow_mode_cmd(struct wmi_t *wmip, WMI_SET_WOW_MODE_CMD *cmd);
59521 +A_STATUS wmi_get_wow_list_cmd(struct wmi_t *wmip, WMI_GET_WOW_LIST_CMD *cmd);
59522 +A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip,
59523 +                                 WMI_ADD_WOW_PATTERN_CMD *cmd, A_UINT8* pattern, A_UINT8* mask, A_UINT8 pattern_size);
59524 +A_STATUS wmi_del_wow_pattern_cmd(struct wmi_t *wmip,
59525 +                                 WMI_DEL_WOW_PATTERN_CMD *cmd);
59526 +A_STATUS wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status);
59527 +
59528 +bss_t *
59529 +wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid,
59530 +                                  A_UINT32 ssidLength, A_BOOL bIsWPA2);
59531 +
59532 +void
59533 +wmi_node_return (struct wmi_t *wmip, bss_t *bss);
59534 +#ifdef __cplusplus
59535 +}
59536 +#endif
59537 +
59538 +#endif /* _WMI_API_H_ */
59539 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi.h
59540 ===================================================================
59541 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
59542 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmi.h      2008-12-11 22:46:49.000000000 +0100
59543 @@ -0,0 +1,1743 @@
59544 +/*
59545 + * Copyright (c) 2004-2006 Atheros Communications Inc.
59546 + * All rights reserved.
59547 + *
59548 + *
59549 + * $ATH_LICENSE_HOSTSDK0_C$
59550 + *
59551 + * This file contains the definitions of the WMI protocol specified in the
59552 + * Wireless Module Interface (WMI).  It includes definitions of all the
59553 + * commands and events. Commands are messages from the host to the WM.
59554 + * Events and Replies are messages from the WM to the host.
59555 + *
59556 + * Ownership of correctness in regards to WMI commands
59557 + * belongs to the host driver and the WM is not required to validate
59558 + * parameters for value, proper range, or any other checking.
59559 + *
59560 + */
59561 +
59562 +#ifndef _WMI_H_
59563 +#define _WMI_H_
59564 +
59565 +#ifndef ATH_TARGET
59566 +#include "athstartpack.h"
59567 +#endif
59568 +
59569 +#include "wmix.h"
59570 +
59571 +#ifdef __cplusplus
59572 +extern "C" {
59573 +#endif
59574 +
59575 +#define WMI_PROTOCOL_VERSION    0x0002
59576 +#define WMI_PROTOCOL_REVISION   0x0000
59577 +
59578 +#define ATH_MAC_LEN             6               /* length of mac in bytes */
59579 +#define WMI_CMD_MAX_LEN         100
59580 +#define WMI_CONTROL_MSG_MAX_LEN     256
59581 +#define WMI_OPT_CONTROL_MSG_MAX_LEN 1536
59582 +#define IS_ETHERTYPE(_typeOrLen)        ((_typeOrLen) >= 0x0600)
59583 +#define RFC1042OUI      {0x00, 0x00, 0x00}
59584 +
59585 +#define IP_ETHERTYPE 0x0800
59586 +
59587 +#define WMI_IMPLICIT_PSTREAM 0xFF
59588 +#define WMI_MAX_THINSTREAM 15
59589 +
59590 +struct host_app_area_s {
59591 +    A_UINT32 wmi_protocol_ver;
59592 +};
59593 +
59594 +/*
59595 + * Data Path
59596 + */
59597 +typedef PREPACK struct {
59598 +    A_UINT8     dstMac[ATH_MAC_LEN];
59599 +    A_UINT8     srcMac[ATH_MAC_LEN];
59600 +    A_UINT16    typeOrLen;
59601 +} POSTPACK ATH_MAC_HDR;
59602 +
59603 +typedef PREPACK struct {
59604 +    A_UINT8     dsap;
59605 +    A_UINT8     ssap;
59606 +    A_UINT8     cntl;
59607 +    A_UINT8     orgCode[3];
59608 +    A_UINT16    etherType;
59609 +} POSTPACK ATH_LLC_SNAP_HDR;
59610 +
59611 +typedef enum {
59612 +    DATA_MSGTYPE = 0x0,
59613 +    CNTL_MSGTYPE,
59614 +    SYNC_MSGTYPE
59615 +} WMI_MSG_TYPE;
59616 +
59617 +
59618 +typedef PREPACK struct {
59619 +    A_INT8      rssi;
59620 +    A_UINT8     info;            /* WMI_MSG_TYPE in lower 2 bits - b1b0 */
59621 +                                 /* UP in next 3 bits - b4b3b2 */
59622 +#define WMI_DATA_HDR_MSG_TYPE_MASK  0x03
59623 +#define WMI_DATA_HDR_MSG_TYPE_SHIFT 0
59624 +#define WMI_DATA_HDR_UP_MASK        0x07
59625 +#define WMI_DATA_HDR_UP_SHIFT       2
59626 +#define WMI_DATA_HDR_IS_MSG_TYPE(h, t)  (((h)->info & (WMI_DATA_HDR_MSG_TYPE_MASK)) == (t))
59627 +} POSTPACK WMI_DATA_HDR;
59628 +
59629 +
59630 +#define WMI_DATA_HDR_SET_MSG_TYPE(h, t) (h)->info = (((h)->info & ~(WMI_DATA_HDR_MSG_TYPE_MASK << WMI_DATA_HDR_MSG_TYPE_SHIFT)) | (t << WMI_DATA_HDR_MSG_TYPE_SHIFT))
59631 +#define WMI_DATA_HDR_SET_UP(h, p) (h)->info = (((h)->info & ~(WMI_DATA_HDR_UP_MASK << WMI_DATA_HDR_UP_SHIFT)) | (p << WMI_DATA_HDR_UP_SHIFT))
59632 +
59633 +/*
59634 + * Control Path
59635 + */
59636 +typedef PREPACK struct {
59637 +    A_UINT16    commandId;
59638 +} POSTPACK WMI_CMD_HDR;        /* used for commands and events */
59639 +
59640 +/*
59641 + * List of Commnands
59642 + */
59643 +typedef enum {
59644 +    WMI_CONNECT_CMDID           = 0x0001,
59645 +    WMI_RECONNECT_CMDID,
59646 +    WMI_DISCONNECT_CMDID,
59647 +    WMI_SYNCHRONIZE_CMDID,
59648 +    WMI_CREATE_PSTREAM_CMDID,
59649 +    WMI_DELETE_PSTREAM_CMDID,
59650 +    WMI_START_SCAN_CMDID,
59651 +    WMI_SET_SCAN_PARAMS_CMDID,
59652 +    WMI_SET_BSS_FILTER_CMDID,
59653 +    WMI_SET_PROBED_SSID_CMDID,
59654 +    WMI_SET_LISTEN_INT_CMDID,
59655 +    WMI_SET_BMISS_TIME_CMDID,
59656 +    WMI_SET_DISC_TIMEOUT_CMDID,
59657 +    WMI_GET_CHANNEL_LIST_CMDID,
59658 +    WMI_SET_BEACON_INT_CMDID,
59659 +    WMI_GET_STATISTICS_CMDID,
59660 +    WMI_SET_CHANNEL_PARAMS_CMDID,
59661 +    WMI_SET_POWER_MODE_CMDID,
59662 +    WMI_SET_IBSS_PM_CAPS_CMDID,
59663 +    WMI_SET_POWER_PARAMS_CMDID,
59664 +    WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID,
59665 +    WMI_ADD_CIPHER_KEY_CMDID,
59666 +    WMI_DELETE_CIPHER_KEY_CMDID,
59667 +    WMI_ADD_KRK_CMDID,
59668 +    WMI_DELETE_KRK_CMDID,
59669 +    WMI_SET_PMKID_CMDID,
59670 +    WMI_SET_TX_PWR_CMDID,
59671 +    WMI_GET_TX_PWR_CMDID,
59672 +    WMI_SET_ASSOC_INFO_CMDID,
59673 +    WMI_ADD_BAD_AP_CMDID,
59674 +    WMI_DELETE_BAD_AP_CMDID,
59675 +    WMI_SET_TKIP_COUNTERMEASURES_CMDID,
59676 +    WMI_RSSI_THRESHOLD_PARAMS_CMDID,
59677 +    WMI_TARGET_ERROR_REPORT_BITMASK_CMDID,
59678 +    WMI_SET_ACCESS_PARAMS_CMDID,
59679 +    WMI_SET_RETRY_LIMITS_CMDID,
59680 +    WMI_SET_OPT_MODE_CMDID,
59681 +    WMI_OPT_TX_FRAME_CMDID,
59682 +    WMI_SET_VOICE_PKT_SIZE_CMDID,
59683 +    WMI_SET_MAX_SP_LEN_CMDID,
59684 +    WMI_SET_ROAM_CTRL_CMDID,
59685 +    WMI_GET_ROAM_TBL_CMDID,
59686 +    WMI_GET_ROAM_DATA_CMDID,
59687 +    WMI_ENABLE_RM_CMDID,
59688 +    WMI_SET_MAX_OFFHOME_DURATION_CMDID,
59689 +    WMI_EXTENSION_CMDID,                        /* Non-wireless extensions */
59690 +    WMI_SNR_THRESHOLD_PARAMS_CMDID,
59691 +    WMI_LQ_THRESHOLD_PARAMS_CMDID,
59692 +    WMI_SET_LPREAMBLE_CMDID,
59693 +    WMI_SET_RTS_CMDID,
59694 +    WMI_CLR_RSSI_SNR_CMDID,
59695 +    WMI_SET_FIXRATES_CMDID,
59696 +    WMI_GET_FIXRATES_CMDID,
59697 +    WMI_SET_AUTH_MODE_CMDID,
59698 +    WMI_SET_REASSOC_MODE_CMDID,
59699 +    WMI_SET_WMM_CMDID,
59700 +    WMI_SET_WMM_TXOP_CMDID,
59701 +    WMI_TEST_CMDID,
59702 +    WMI_SET_BT_STATUS_CMDID,
59703 +    WMI_SET_BT_PARAMS_CMDID,
59704 +
59705 +    WMI_SET_KEEPALIVE_CMDID,
59706 +    WMI_GET_KEEPALIVE_CMDID,
59707 +    WMI_SET_APPIE_CMDID,
59708 +    WMI_GET_APPIE_CMDID,
59709 +    WMI_SET_WSC_STATUS_CMDID,
59710 +
59711 +    /* Wake on Wireless */
59712 +    WMI_SET_HOST_SLEEP_MODE_CMDID,
59713 +    WMI_SET_WOW_MODE_CMDID,
59714 +    WMI_GET_WOW_LIST_CMDID,
59715 +    WMI_ADD_WOW_PATTERN_CMDID,
59716 +    WMI_DEL_WOW_PATTERN_CMDID,
59717 +    WMI_SET_MAC_ADDRESS_CMDID,
59718 +    WMI_SET_AKMP_PARAMS_CMDID,
59719 +    WMI_SET_PMKID_LIST_CMDID,
59720 +    WMI_GET_PMKID_LIST_CMDID,
59721 +
59722 +    /*
59723 +     * Developer commands starts at 0xF000
59724 +     */
59725 +    WMI_SET_BITRATE_CMDID = 0xF000,
59726 +    WMI_GET_BITRATE_CMDID,
59727 +    WMI_SET_WHALPARAM_CMDID,
59728 +
59729 +} WMI_COMMAND_ID;
59730 +
59731 +/*
59732 + * Frame Types
59733 + */
59734 +typedef enum {
59735 +    WMI_FRAME_BEACON        =   0,
59736 +    WMI_FRAME_PROBE_REQ,
59737 +    WMI_FRAME_PROBE_RESP,
59738 +    WMI_FRAME_ASSOC_REQ,
59739 +    WMI_FRAME_ASSOC_RESP,
59740 +    WMI_NUM_MGMT_FRAME
59741 +} WMI_MGMT_FRAME_TYPE;
59742 +
59743 +/*
59744 + * Connect Command
59745 + */
59746 +typedef enum {
59747 +    INFRA_NETWORK       = 0x01,
59748 +    ADHOC_NETWORK       = 0x02,
59749 +    ADHOC_CREATOR       = 0x04,
59750 +} NETWORK_TYPE;
59751 +
59752 +typedef enum {
59753 +    OPEN_AUTH           = 0x01,
59754 +    SHARED_AUTH         = 0x02,
59755 +    LEAP_AUTH           = 0x04,  /* different from IEEE_AUTH_MODE definitions */
59756 +} DOT11_AUTH_MODE;
59757 +
59758 +typedef enum {
59759 +    NONE_AUTH           = 0x01,
59760 +    WPA_AUTH            = 0x02,
59761 +    WPA_PSK_AUTH        = 0x03,
59762 +    WPA2_AUTH           = 0x04,
59763 +    WPA2_PSK_AUTH       = 0x05,
59764 +    WPA_AUTH_CCKM       = 0x06,
59765 +    WPA2_AUTH_CCKM      = 0x07,
59766 +} AUTH_MODE;
59767 +
59768 +typedef enum {
59769 +    NONE_CRYPT          = 0x01,
59770 +    WEP_CRYPT           = 0x02,
59771 +    TKIP_CRYPT          = 0x03,
59772 +    AES_CRYPT           = 0x04,
59773 +} CRYPTO_TYPE;
59774 +
59775 +#define WMI_MIN_CRYPTO_TYPE NONE_CRYPT
59776 +#define WMI_MAX_CRYPTO_TYPE (AES_CRYPT + 1)
59777 +
59778 +#define WMI_MIN_KEY_INDEX   0
59779 +#define WMI_MAX_KEY_INDEX   3
59780 +
59781 +#define WMI_MAX_KEY_LEN     32
59782 +
59783 +#define WMI_MAX_SSID_LEN    32
59784 +
59785 +typedef enum {
59786 +    CONNECT_ASSOC_POLICY_USER = 0x0001,
59787 +    CONNECT_SEND_REASSOC = 0x0002,
59788 +    CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004,
59789 +    CONNECT_PROFILE_MATCH_DONE = 0x0008,
59790 +    CONNECT_IGNORE_AAC_BEACON = 0x0010,
59791 +    CONNECT_CSA_FOLLOW_BSS = 0x0020,
59792 +} WMI_CONNECT_CTRL_FLAGS_BITS;
59793 +
59794 +#define DEFAULT_CONNECT_CTRL_FLAGS         (CONNECT_CSA_FOLLOW_BSS)
59795 +
59796 +typedef PREPACK struct {
59797 +    A_UINT8     networkType;
59798 +    A_UINT8     dot11AuthMode;
59799 +    A_UINT8     authMode;
59800 +    A_UINT8     pairwiseCryptoType;
59801 +    A_UINT8     pairwiseCryptoLen;
59802 +    A_UINT8     groupCryptoType;
59803 +    A_UINT8     groupCryptoLen;
59804 +    A_UINT8     ssidLength;
59805 +    A_UCHAR     ssid[WMI_MAX_SSID_LEN];
59806 +    A_UINT16    channel;
59807 +    A_UINT8     bssid[ATH_MAC_LEN];
59808 +    A_UINT32    ctrl_flags;
59809 +} POSTPACK WMI_CONNECT_CMD;
59810 +
59811 +/*
59812 + * WMI_RECONNECT_CMDID
59813 + */
59814 +typedef PREPACK struct {
59815 +    A_UINT16    channel;                    /* hint */
59816 +    A_UINT8     bssid[ATH_MAC_LEN];         /* mandatory if set */
59817 +} POSTPACK WMI_RECONNECT_CMD;
59818 +
59819 +/*
59820 + * WMI_ADD_CIPHER_KEY_CMDID
59821 + */
59822 +typedef enum {
59823 +    PAIRWISE_USAGE      = 0x00,
59824 +    GROUP_USAGE         = 0x01,
59825 +    TX_USAGE            = 0x02,     /* default Tx Key - Static WEP only */
59826 +} KEY_USAGE;
59827 +
59828 +/*
59829 + * Bit Flag
59830 + * Bit 0 - Initialise TSC - default is Initialize
59831 + */
59832 +#define KEY_OP_INIT_TSC       0x01
59833 +#define KEY_OP_INIT_RSC       0x02
59834 +
59835 +#define KEY_OP_INIT_VAL     0x03     /* Default Initialise the TSC & RSC */
59836 +#define KEY_OP_VALID_MASK   0x03
59837 +
59838 +typedef PREPACK struct {
59839 +    A_UINT8     keyIndex;
59840 +    A_UINT8     keyType;
59841 +    A_UINT8     keyUsage;           /* KEY_USAGE */
59842 +    A_UINT8     keyLength;
59843 +    A_UINT8     keyRSC[8];          /* key replay sequence counter */
59844 +    A_UINT8     key[WMI_MAX_KEY_LEN];
59845 +    A_UINT8     key_op_ctrl;       /* Additional Key Control information */
59846 +} POSTPACK WMI_ADD_CIPHER_KEY_CMD;
59847 +
59848 +/*
59849 + * WMI_DELETE_CIPHER_KEY_CMDID
59850 + */
59851 +typedef PREPACK struct {
59852 +    A_UINT8     keyIndex;
59853 +} POSTPACK WMI_DELETE_CIPHER_KEY_CMD;
59854 +
59855 +#define WMI_KRK_LEN     16
59856 +/*
59857 + * WMI_ADD_KRK_CMDID
59858 + */
59859 +typedef PREPACK struct {
59860 +    A_UINT8     krk[WMI_KRK_LEN];
59861 +} POSTPACK WMI_ADD_KRK_CMD;
59862 +
59863 +/*
59864 + * WMI_SET_TKIP_COUNTERMEASURES_CMDID
59865 + */
59866 +typedef enum {
59867 +    WMI_TKIP_CM_DISABLE = 0x0,
59868 +    WMI_TKIP_CM_ENABLE  = 0x1,
59869 +} WMI_TKIP_CM_CONTROL;
59870 +
59871 +typedef PREPACK struct {
59872 +    A_UINT8  cm_en;                     /* WMI_TKIP_CM_CONTROL */
59873 +} POSTPACK WMI_SET_TKIP_COUNTERMEASURES_CMD;
59874 +
59875 +/*
59876 + * WMI_SET_PMKID_CMDID
59877 + */
59878 +
59879 +#define WMI_PMKID_LEN 16
59880 +
59881 +typedef enum {
59882 +   PMKID_DISABLE = 0,
59883 +   PMKID_ENABLE  = 1,
59884 +} PMKID_ENABLE_FLG;
59885 +
59886 +typedef PREPACK struct {
59887 +    A_UINT8     bssid[ATH_MAC_LEN];
59888 +    A_UINT8     enable;                 /* PMKID_ENABLE_FLG */
59889 +    A_UINT8     pmkid[WMI_PMKID_LEN];
59890 +} POSTPACK WMI_SET_PMKID_CMD;
59891 +
59892 +/*
59893 + * WMI_START_SCAN_CMD
59894 + */
59895 +typedef enum {
59896 +    WMI_LONG_SCAN  = 0,
59897 +    WMI_SHORT_SCAN = 1,
59898 +} WMI_SCAN_TYPE;
59899 +
59900 +typedef PREPACK struct {
59901 +    A_BOOL   forceFgScan;
59902 +    A_BOOL   isLegacy;        /* For Legacy Cisco AP compatibility */
59903 +    A_UINT32 homeDwellTime;   /* Maximum duration in the home channel(milliseconds) */
59904 +    A_UINT32 forceScanInterval;    /* Time interval between scans (milliseconds)*/
59905 +    A_UINT8  scanType;           /* WMI_SCAN_TYPE */
59906 +} POSTPACK WMI_START_SCAN_CMD;
59907 +
59908 +/*
59909 + * WMI_SET_SCAN_PARAMS_CMDID
59910 + */
59911 +#define WMI_SHORTSCANRATIO_DEFAULT      3
59912 +typedef enum {
59913 +    CONNECT_SCAN_CTRL_FLAGS = 0x01,    /* set if can scan in the Connect cmd */
59914 +    SCAN_CONNECTED_CTRL_FLAGS = 0x02,  /* set if scan for the SSID it is */
59915 +                                       /* already connected to */
59916 +    ACTIVE_SCAN_CTRL_FLAGS = 0x04,     /* set if enable active scan */
59917 +    ROAM_SCAN_CTRL_FLAGS = 0x08,       /* set if enable roam scan when bmiss and lowrssi */
59918 +    REPORT_BSSINFO_CTRL_FLAGS = 0x10,   /* set if follows customer BSSINFO reporting rule */
59919 +    ENABLE_AUTO_CTRL_FLAGS = 0x20,      /* if disabled, target doesn't
59920 +                                          scan after a disconnect event  */
59921 +    ENABLE_SCAN_ABORT_EVENT = 0x40      /* Scan complete event with canceled status will be generated when a scan is prempted before it gets completed */
59922 +
59923 +} WMI_SCAN_CTRL_FLAGS_BITS;
59924 +
59925 +#define CAN_SCAN_IN_CONNECT(flags)      (flags & CONNECT_SCAN_CTRL_FLAGS)
59926 +#define CAN_SCAN_CONNECTED(flags)       (flags & SCAN_CONNECTED_CTRL_FLAGS)
59927 +#define ENABLE_ACTIVE_SCAN(flags)       (flags & ACTIVE_SCAN_CTRL_FLAGS)
59928 +#define ENABLE_ROAM_SCAN(flags)         (flags & ROAM_SCAN_CTRL_FLAGS)
59929 +#define CONFIG_REPORT_BSSINFO(flags)     (flags & REPORT_BSSINFO_CTRL_FLAGS)
59930 +#define IS_AUTO_SCAN_ENABLED(flags)      (flags & ENABLE_AUTO_CTRL_FLAGS)
59931 +#define SCAN_ABORT_EVENT_ENABLED(flags) (flags & ENABLE_SCAN_ABORT_EVENT)
59932 +
59933 +#define DEFAULT_SCAN_CTRL_FLAGS         (CONNECT_SCAN_CTRL_FLAGS| SCAN_CONNECTED_CTRL_FLAGS| ACTIVE_SCAN_CTRL_FLAGS| ROAM_SCAN_CTRL_FLAGS | ENABLE_AUTO_CTRL_FLAGS)
59934 +
59935 +
59936 +typedef PREPACK struct {
59937 +    A_UINT16    fg_start_period;        /* seconds */
59938 +    A_UINT16    fg_end_period;          /* seconds */
59939 +    A_UINT16    bg_period;              /* seconds */
59940 +    A_UINT16    maxact_chdwell_time;    /* msec */
59941 +    A_UINT16    pas_chdwell_time;       /* msec */
59942 +    A_UINT8     shortScanRatio;         /* how many shorts scan for one long */
59943 +    A_UINT8     scanCtrlFlags;
59944 +    A_UINT16    minact_chdwell_time;    /* msec */
59945 +    A_UINT32    max_dfsch_act_time;  /* msecs */
59946 +} POSTPACK WMI_SCAN_PARAMS_CMD;
59947 +
59948 +/*
59949 + * WMI_SET_BSS_FILTER_CMDID
59950 + */
59951 +typedef enum {
59952 +    NONE_BSS_FILTER = 0x0,              /* no beacons forwarded */
59953 +    ALL_BSS_FILTER,                     /* all beacons forwarded */
59954 +    PROFILE_FILTER,                     /* only beacons matching profile */
59955 +    ALL_BUT_PROFILE_FILTER,             /* all but beacons matching profile */
59956 +    CURRENT_BSS_FILTER,                 /* only beacons matching current BSS */
59957 +    ALL_BUT_BSS_FILTER,                 /* all but beacons matching BSS */
59958 +    PROBED_SSID_FILTER,                 /* beacons matching probed ssid */
59959 +    LAST_BSS_FILTER,                    /* marker only */
59960 +} WMI_BSS_FILTER;
59961 +
59962 +typedef PREPACK struct {
59963 +    A_UINT8    bssFilter;                      /* see WMI_BSS_FILTER */
59964 +    A_UINT32   ieMask;
59965 +} POSTPACK WMI_BSS_FILTER_CMD;
59966 +
59967 +/*
59968 + * WMI_SET_PROBED_SSID_CMDID
59969 + */
59970 +#define MAX_PROBED_SSID_INDEX   5
59971 +
59972 +typedef enum {
59973 +    DISABLE_SSID_FLAG  = 0,                  /* disables entry */
59974 +    SPECIFIC_SSID_FLAG = 0x01,               /* probes specified ssid */
59975 +    ANY_SSID_FLAG      = 0x02,               /* probes for any ssid */
59976 +} WMI_SSID_FLAG;
59977 +
59978 +typedef PREPACK struct {
59979 +    A_UINT8     entryIndex;                     /* 0 to MAX_PROBED_SSID_INDEX */
59980 +    A_UINT8     flag;                           /* WMI_SSID_FLG */
59981 +    A_UINT8     ssidLength;
59982 +    A_UINT8     ssid[32];
59983 +} POSTPACK WMI_PROBED_SSID_CMD;
59984 +
59985 +/*
59986 + * WMI_SET_LISTEN_INT_CMDID
59987 + * The Listen interval is between 15 and 3000 TUs
59988 + */
59989 +#define MIN_LISTEN_INTERVAL 15
59990 +#define MAX_LISTEN_INTERVAL 5000
59991 +#define MIN_LISTEN_BEACONS 1
59992 +#define MAX_LISTEN_BEACONS 50
59993 +
59994 +typedef PREPACK struct {
59995 +    A_UINT16     listenInterval;
59996 +    A_UINT16     numBeacons;
59997 +} POSTPACK WMI_LISTEN_INT_CMD;
59998 +
59999 +/*
60000 + * WMI_SET_BEACON_INT_CMDID
60001 + */
60002 +typedef PREPACK struct {
60003 +    A_UINT16     beaconInterval;
60004 +} POSTPACK WMI_BEACON_INT_CMD;
60005 +
60006 +/*
60007 + * WMI_SET_BMISS_TIME_CMDID
60008 + * valid values are between 1000 and 5000 TUs
60009 + */
60010 +
60011 +#define MIN_BMISS_TIME     1000
60012 +#define MAX_BMISS_TIME     5000
60013 +#define MIN_BMISS_BEACONS  1
60014 +#define MAX_BMISS_BEACONS  50
60015 +
60016 +typedef PREPACK struct {
60017 +    A_UINT16     bmissTime;
60018 +    A_UINT16     numBeacons;
60019 +} POSTPACK WMI_BMISS_TIME_CMD;
60020 +
60021 +/*
60022 + * WMI_SET_POWER_MODE_CMDID
60023 + */
60024 +typedef enum {
60025 +    REC_POWER = 0x01,
60026 +    MAX_PERF_POWER,
60027 +} WMI_POWER_MODE;
60028 +
60029 +typedef PREPACK struct {
60030 +    A_UINT8     powerMode;      /* WMI_POWER_MODE */
60031 +} POSTPACK WMI_POWER_MODE_CMD;
60032 +
60033 +/*
60034 + * WMI_SET_POWER_PARAMS_CMDID
60035 + */
60036 +typedef enum {
60037 +    IGNORE_DTIM = 0x01,
60038 +    NORMAL_DTIM = 0x02,
60039 +    STICK_DTIM  = 0x03,
60040 +} WMI_DTIM_POLICY;
60041 +
60042 +typedef PREPACK struct {
60043 +    A_UINT16    idle_period;             /* msec */
60044 +    A_UINT16    pspoll_number;
60045 +    A_UINT16    dtim_policy;
60046 +} POSTPACK WMI_POWER_PARAMS_CMD;
60047 +
60048 +typedef PREPACK struct {
60049 +    A_UINT8    power_saving;
60050 +    A_UINT8    ttl; /* number of beacon periods */
60051 +    A_UINT16   atim_windows;          /* msec */
60052 +    A_UINT16   timeout_value;         /* msec */
60053 +} POSTPACK WMI_IBSS_PM_CAPS_CMD;
60054 +
60055 +/*
60056 + * WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID
60057 + */
60058 +typedef enum {
60059 +    IGNORE_TIM_ALL_QUEUES_APSD = 0,
60060 +    PROCESS_TIM_ALL_QUEUES_APSD = 1,
60061 +    IGNORE_TIM_SIMULATED_APSD = 2,
60062 +    PROCESS_TIM_SIMULATED_APSD = 3,
60063 +} APSD_TIM_POLICY;
60064 +
60065 +typedef PREPACK struct {
60066 +    A_UINT16    psPollTimeout;          /* msec */
60067 +    A_UINT16    triggerTimeout;         /* msec */
60068 +    A_UINT32    apsdTimPolicy;      /* TIM behavior with  ques APSD enabled. Default is IGNORE_TIM_ALL_QUEUES_APSD */
60069 +    A_UINT32    simulatedAPSDTimPolicy;      /* TIM behavior with  simulated APSD enabled. Default is PROCESS_TIM_SIMULATED_APSD */
60070 +} POSTPACK WMI_POWERSAVE_TIMERS_POLICY_CMD;
60071 +
60072 +/*
60073 + * WMI_SET_VOICE_PKT_SIZE_CMDID
60074 + */
60075 +typedef PREPACK struct {
60076 +    A_UINT16    voicePktSize;
60077 +} POSTPACK WMI_SET_VOICE_PKT_SIZE_CMD;
60078 +
60079 +/*
60080 + * WMI_SET_MAX_SP_LEN_CMDID
60081 + */
60082 +typedef enum {
60083 +    DELIVER_ALL_PKT = 0x0,
60084 +    DELIVER_2_PKT = 0x1,
60085 +    DELIVER_4_PKT = 0x2,
60086 +    DELIVER_6_PKT = 0x3,
60087 +} APSD_SP_LEN_TYPE;
60088 +
60089 +typedef PREPACK struct {
60090 +    A_UINT8    maxSPLen;
60091 +} POSTPACK WMI_SET_MAX_SP_LEN_CMD;
60092 +
60093 +/*
60094 + * WMI_SET_DISC_TIMEOUT_CMDID
60095 + */
60096 +typedef PREPACK struct {
60097 +    A_UINT8     disconnectTimeout;          /* seconds */
60098 +} POSTPACK WMI_DISC_TIMEOUT_CMD;
60099 +
60100 +typedef enum {
60101 +    UPLINK_TRAFFIC = 0,
60102 +    DNLINK_TRAFFIC = 1,
60103 +    BIDIR_TRAFFIC = 2,
60104 +} DIR_TYPE;
60105 +
60106 +typedef enum {
60107 +    DISABLE_FOR_THIS_AC = 0,
60108 +    ENABLE_FOR_THIS_AC  = 1,
60109 +    ENABLE_FOR_ALL_AC   = 2,
60110 +} VOICEPS_CAP_TYPE;
60111 +
60112 +typedef enum {
60113 +    TRAFFIC_TYPE_APERIODIC = 0,
60114 +    TRAFFIC_TYPE_PERIODIC = 1,
60115 +}TRAFFIC_TYPE;
60116 +
60117 +/*
60118 + * WMI_CREATE_PSTREAM_CMDID
60119 + */
60120 +typedef PREPACK struct {
60121 +    A_UINT32        minServiceInt;           /* in milli-sec */
60122 +    A_UINT32        maxServiceInt;           /* in milli-sec */
60123 +    A_UINT32        inactivityInt;           /* in milli-sec */
60124 +    A_UINT32        suspensionInt;           /* in milli-sec */
60125 +    A_UINT32        serviceStartTime;
60126 +    A_UINT32        minDataRate;             /* in bps */
60127 +    A_UINT32        meanDataRate;            /* in bps */
60128 +    A_UINT32        peakDataRate;            /* in bps */
60129 +    A_UINT32        maxBurstSize;
60130 +    A_UINT32        delayBound;
60131 +    A_UINT32        minPhyRate;              /* in bps */
60132 +    A_UINT32        sba;
60133 +    A_UINT32        mediumTime;
60134 +    A_UINT16        nominalMSDU;             /* in octects */
60135 +    A_UINT16        maxMSDU;                 /* in octects */
60136 +    A_UINT8         trafficClass;
60137 +    A_UINT8         trafficType;             /* TRAFFIC_TYPE */
60138 +    A_UINT8         trafficDirection;        /* TRAFFIC_DIR */
60139 +    A_UINT8         voicePSCapability;       /* VOICEPS_CAP_TYPE */
60140 +    A_UINT8         tsid;
60141 +    A_UINT8         userPriority;            /* 802.1D user priority */
60142 +} POSTPACK WMI_CREATE_PSTREAM_CMD;
60143 +
60144 +/*
60145 + * WMI_DELETE_PSTREAM_CMDID
60146 + */
60147 +typedef PREPACK struct {
60148 +    A_UINT8     trafficClass;
60149 +    A_UINT8     tsid;
60150 +} POSTPACK WMI_DELETE_PSTREAM_CMD;
60151 +
60152 +/*
60153 + * WMI_SET_CHANNEL_PARAMS_CMDID
60154 + */
60155 +typedef enum {
60156 +    WMI_11A_MODE  = 0x1,
60157 +    WMI_11G_MODE  = 0x2,
60158 +    WMI_11AG_MODE = 0x3,
60159 +    WMI_11B_MODE  = 0x4,
60160 +    WMI_11GONLY_MODE = 0x5,
60161 +} WMI_PHY_MODE;
60162 +
60163 +#define WMI_MAX_CHANNELS        32
60164 +
60165 +typedef PREPACK struct {
60166 +    A_UINT8     reserved1;
60167 +    A_UINT8     scanParam;              /* set if enable scan */
60168 +    A_UINT8     phyMode;                /* see WMI_PHY_MODE */
60169 +    A_UINT8     numChannels;            /* how many channels follow */
60170 +    A_UINT16    channelList[1];         /* channels in Mhz */
60171 +} POSTPACK WMI_CHANNEL_PARAMS_CMD;
60172 +
60173 +
60174 +/*
60175 + *  WMI_RSSI_THRESHOLD_PARAMS_CMDID
60176 + *  Setting the polltime to 0 would disable polling.
60177 + *  Threshold values are in the ascending order, and should agree to:
60178 + *  (lowThreshold_lowerVal < lowThreshold_upperVal < highThreshold_lowerVal
60179 + *      < highThreshold_upperVal)
60180 + */
60181 +
60182 +typedef PREPACK struct WMI_RSSI_THRESHOLD_PARAMS{
60183 +    A_UINT32    pollTime;               /* Polling time as a factor of LI */
60184 +    A_INT16     thresholdAbove1_Val;          /* lowest of upper */
60185 +    A_INT16     thresholdAbove2_Val;
60186 +    A_INT16     thresholdAbove3_Val;
60187 +    A_INT16     thresholdAbove4_Val;
60188 +    A_INT16     thresholdAbove5_Val;
60189 +    A_INT16     thresholdAbove6_Val;          /* highest of upper */
60190 +    A_INT16     thresholdBelow1_Val;         /* lowest of bellow */
60191 +    A_INT16     thresholdBelow2_Val;
60192 +    A_INT16     thresholdBelow3_Val;
60193 +    A_INT16     thresholdBelow4_Val;
60194 +    A_INT16     thresholdBelow5_Val;
60195 +    A_INT16     thresholdBelow6_Val;         /* highest of bellow */
60196 +    A_UINT8     weight;                  /* "alpha" */
60197 +    A_UINT8     reserved[3];
60198 +} POSTPACK  WMI_RSSI_THRESHOLD_PARAMS_CMD;
60199 +
60200 +/*
60201 + *  WMI_SNR_THRESHOLD_PARAMS_CMDID
60202 + *  Setting the polltime to 0 would disable polling.
60203 + */
60204 +
60205 +typedef PREPACK struct WMI_SNR_THRESHOLD_PARAMS{
60206 +    A_UINT32    pollTime;               /* Polling time as a factor of LI */
60207 +    A_UINT8     weight;                  /* "alpha" */
60208 +    A_UINT8     thresholdAbove1_Val;      /* lowest of uppper*/
60209 +    A_UINT8     thresholdAbove2_Val;
60210 +    A_UINT8     thresholdAbove3_Val;
60211 +    A_UINT8     thresholdAbove4_Val;      /* highest of upper */
60212 +    A_UINT8     thresholdBelow1_Val;     /* lowest of bellow */
60213 +    A_UINT8     thresholdBelow2_Val;
60214 +    A_UINT8     thresholdBelow3_Val;
60215 +    A_UINT8     thresholdBelow4_Val;     /* highest of bellow */
60216 +    A_UINT8     reserved[3];
60217 +} POSTPACK WMI_SNR_THRESHOLD_PARAMS_CMD;
60218 +
60219 +/*
60220 + *  WMI_LQ_THRESHOLD_PARAMS_CMDID
60221 + */
60222 +typedef PREPACK struct WMI_LQ_THRESHOLD_PARAMS {
60223 +    A_UINT8     enable;
60224 +    A_UINT8     thresholdAbove1_Val;
60225 +    A_UINT8     thresholdAbove2_Val;
60226 +    A_UINT8     thresholdAbove3_Val;
60227 +    A_UINT8     thresholdAbove4_Val;
60228 +    A_UINT8     thresholdBelow1_Val;
60229 +    A_UINT8     thresholdBelow2_Val;
60230 +    A_UINT8     thresholdBelow3_Val;
60231 +    A_UINT8     thresholdBelow4_Val;
60232 +    A_UINT8     reserved[3];
60233 +} POSTPACK  WMI_LQ_THRESHOLD_PARAMS_CMD;
60234 +
60235 +typedef enum {
60236 +    WMI_LPREAMBLE_DISABLED = 0,
60237 +    WMI_LPREAMBLE_ENABLED
60238 +} WMI_LPREAMBLE_STATUS;
60239 +
60240 +typedef PREPACK struct {
60241 +    A_UINT8     status;
60242 +}POSTPACK WMI_SET_LPREAMBLE_CMD;
60243 +
60244 +typedef PREPACK struct {
60245 +    A_UINT16    threshold;
60246 +}POSTPACK WMI_SET_RTS_CMD;
60247 +
60248 +/*
60249 + *  WMI_TARGET_ERROR_REPORT_BITMASK_CMDID
60250 + *  Sets the error reporting event bitmask in target. Target clears it
60251 + *  upon an error. Subsequent errors are counted, but not reported
60252 + *  via event, unless the bitmask is set again.
60253 + */
60254 +typedef PREPACK struct {
60255 +    A_UINT32    bitmask;
60256 +} POSTPACK  WMI_TARGET_ERROR_REPORT_BITMASK;
60257 +
60258 +/*
60259 + * WMI_SET_TX_PWR_CMDID
60260 + */
60261 +typedef PREPACK struct {
60262 +    A_UINT8     dbM;                  /* in dbM units */
60263 +} POSTPACK WMI_SET_TX_PWR_CMD, WMI_TX_PWR_REPLY;
60264 +
60265 +/*
60266 + * WMI_SET_ASSOC_INFO_CMDID
60267 + *
60268 + * A maximum of 2 private IEs can be sent in the [Re]Assoc request.
60269 + * A 3rd one, the CCX version IE can also be set from the host.
60270 + */
60271 +#define WMI_MAX_ASSOC_INFO_TYPE    2
60272 +#define WMI_CCX_VER_IE             2 /* ieType to set CCX Version IE */
60273 +
60274 +#define WMI_MAX_ASSOC_INFO_LEN     240
60275 +
60276 +typedef PREPACK struct {
60277 +    A_UINT8     ieType;
60278 +    A_UINT8     bufferSize;
60279 +    A_UINT8     assocInfo[1];       /* up to WMI_MAX_ASSOC_INFO_LEN */
60280 +} POSTPACK WMI_SET_ASSOC_INFO_CMD;
60281 +
60282 +
60283 +/*
60284 + * WMI_GET_TX_PWR_CMDID does not take any parameters
60285 + */
60286 +
60287 +/*
60288 + * WMI_ADD_BAD_AP_CMDID
60289 + */
60290 +#define WMI_MAX_BAD_AP_INDEX      1
60291 +
60292 +typedef PREPACK struct {
60293 +    A_UINT8     badApIndex;         /* 0 to WMI_MAX_BAD_AP_INDEX */
60294 +    A_UINT8     bssid[ATH_MAC_LEN];
60295 +} POSTPACK WMI_ADD_BAD_AP_CMD;
60296 +
60297 +/*
60298 + * WMI_DELETE_BAD_AP_CMDID
60299 + */
60300 +typedef PREPACK struct {
60301 +    A_UINT8     badApIndex;         /* 0 to WMI_MAX_BAD_AP_INDEX */
60302 +} POSTPACK WMI_DELETE_BAD_AP_CMD;
60303 +
60304 +/*
60305 + * WMI_SET_ACCESS_PARAMS_CMDID
60306 + */
60307 +#define WMI_DEFAULT_TXOP_ACPARAM    0       /* implies one MSDU */
60308 +#define WMI_DEFAULT_ECWMIN_ACPARAM  4       /* corresponds to CWmin of 15 */
60309 +#define WMI_DEFAULT_ECWMAX_ACPARAM  10      /* corresponds to CWmax of 1023 */
60310 +#define WMI_MAX_CW_ACPARAM          15      /* maximum eCWmin or eCWmax */
60311 +#define WMI_DEFAULT_AIFSN_ACPARAM   2
60312 +#define WMI_MAX_AIFSN_ACPARAM       15
60313 +typedef PREPACK struct {
60314 +    A_UINT16 txop;                      /* in units of 32 usec */
60315 +    A_UINT8  eCWmin;
60316 +    A_UINT8  eCWmax;
60317 +    A_UINT8  aifsn;
60318 +} POSTPACK WMI_SET_ACCESS_PARAMS_CMD;
60319 +
60320 +
60321 +/*
60322 + * WMI_SET_RETRY_LIMITS_CMDID
60323 + *
60324 + * This command is used to customize the number of retries the
60325 + * wlan device will perform on a given frame.
60326 + */
60327 +#define WMI_MIN_RETRIES 2
60328 +#define WMI_MAX_RETRIES 13
60329 +typedef enum {
60330 +    MGMT_FRAMETYPE    = 0,
60331 +    CONTROL_FRAMETYPE = 1,
60332 +    DATA_FRAMETYPE    = 2
60333 +} WMI_FRAMETYPE;
60334 +
60335 +typedef PREPACK struct {
60336 +    A_UINT8 frameType;                      /* WMI_FRAMETYPE */
60337 +    A_UINT8 trafficClass;                   /* applies only to DATA_FRAMETYPE */
60338 +    A_UINT8 maxRetries;
60339 +    A_UINT8 enableNotify;
60340 +} POSTPACK WMI_SET_RETRY_LIMITS_CMD;
60341 +
60342 +/*
60343 + * WMI_SET_ROAM_CTRL_CMDID
60344 + *
60345 + * This command is used to influence the Roaming behaviour
60346 + * Set the host biases of the BSSs before setting the roam mode as bias
60347 + * based.
60348 + */
60349 +
60350 +/*
60351 + * Different types of Roam Control
60352 + */
60353 +
60354 +typedef enum {
60355 +        WMI_FORCE_ROAM          = 1,      /* Roam to the specified BSSID */
60356 +        WMI_SET_ROAM_MODE       = 2,      /* default ,progd bias, no roam */
60357 +        WMI_SET_HOST_BIAS       = 3,     /* Set the Host Bias */
60358 +        WMI_SET_LOWRSSI_SCAN_PARAMS = 4, /* Set lowrssi Scan parameters */
60359 +} WMI_ROAM_CTRL_TYPE;
60360 +
60361 +#define WMI_MIN_ROAM_CTRL_TYPE WMI_FORCE_ROAM
60362 +#define WMI_MAX_ROAM_CTRL_TYPE WMI_SET_LOWRSSI_SCAN_PARAMS
60363 +
60364 +/*
60365 + * ROAM MODES
60366 + */
60367 +
60368 +typedef enum {
60369 +        WMI_DEFAULT_ROAM_MODE   = 1,  /* RSSI based ROAM */
60370 +        WMI_HOST_BIAS_ROAM_MODE = 2, /* HOST BIAS based ROAM */
60371 +        WMI_LOCK_BSS_MODE  = 3  /* Lock to the Current BSS - no Roam */
60372 +} WMI_ROAM_MODE;
60373 +
60374 +/*
60375 + * BSS HOST BIAS INFO
60376 + */
60377 +
60378 +typedef PREPACK struct {
60379 +        A_UINT8 bssid[ATH_MAC_LEN];
60380 +        A_INT8  bias;
60381 +} POSTPACK WMI_BSS_BIAS;
60382 +
60383 +typedef PREPACK struct {
60384 +        A_UINT8 numBss;
60385 +        WMI_BSS_BIAS bssBias[1];
60386 +} POSTPACK WMI_BSS_BIAS_INFO;
60387 +
60388 +typedef PREPACK struct WMI_LOWRSSI_SCAN_PARAMS {
60389 +        A_UINT16 lowrssi_scan_period;
60390 +        A_INT16  lowrssi_scan_threshold;
60391 +        A_INT16  lowrssi_roam_threshold;
60392 +        A_UINT8  roam_rssi_floor;
60393 +        A_UINT8  reserved[1];              /* For alignment */
60394 +} POSTPACK WMI_LOWRSSI_SCAN_PARAMS;
60395 +
60396 +typedef PREPACK struct {
60397 +    PREPACK union {
60398 +        A_UINT8 bssid[ATH_MAC_LEN]; /* WMI_FORCE_ROAM */
60399 +        A_UINT8 roamMode;           /* WMI_SET_ROAM_MODE  */
60400 +        WMI_BSS_BIAS_INFO bssBiasInfo; /* WMI_SET_HOST_BIAS */
60401 +        WMI_LOWRSSI_SCAN_PARAMS lrScanParams;
60402 +    } POSTPACK info;
60403 +    A_UINT8   roamCtrlType ;
60404 +} POSTPACK WMI_SET_ROAM_CTRL_CMD;
60405 +
60406 +/*
60407 + * WMI_ENABLE_RM_CMDID
60408 + */
60409 +typedef PREPACK struct {
60410 +        A_BOOL enable_radio_measurements;
60411 +} POSTPACK WMI_ENABLE_RM_CMD;
60412 +
60413 +/*
60414 + * WMI_SET_MAX_OFFHOME_DURATION_CMDID
60415 + */
60416 +typedef PREPACK struct {
60417 +        A_UINT8 max_offhome_duration;
60418 +} POSTPACK WMI_SET_MAX_OFFHOME_DURATION_CMD;
60419 +
60420 +typedef PREPACK struct {
60421 +    A_UINT32 frequency;
60422 +    A_UINT8  threshold;
60423 +} POSTPACK WMI_SET_HB_CHALLENGE_RESP_PARAMS_CMD;
60424 +
60425 +typedef enum {
60426 +    BT_STREAM_UNDEF = 0,
60427 +    BT_STREAM_SCO,             /* SCO stream */
60428 +    BT_STREAM_A2DP,            /* A2DP stream */
60429 +    BT_STREAM_MAX
60430 +} BT_STREAM_TYPE;
60431 +
60432 +typedef enum {
60433 +    BT_PARAM_SCO = 1,         /* SCO stream parameters */
60434 +    BT_PARAM_A2DP,            /* A2DP stream parameters */
60435 +    BT_PARAM_MISC,            /* miscellaneous parameters */
60436 +    BT_PARAM_REGS,            /* co-existence register parameters */
60437 +    BT_PARAM_MAX
60438 +} BT_PARAM_TYPE;
60439 +
60440 +typedef enum {
60441 +    BT_STATUS_UNDEF = 0,
60442 +    BT_STATUS_START,
60443 +    BT_STATUS_STOP,
60444 +    BT_STATUS_RESUME,
60445 +    BT_STATUS_SUSPEND,
60446 +    BT_STATUS_MAX
60447 +} BT_STREAM_STATUS;
60448 +
60449 +typedef PREPACK struct {
60450 +    A_UINT8 streamType;
60451 +    A_UINT8 status;
60452 +} POSTPACK WMI_SET_BT_STATUS_CMD;
60453 +
60454 +typedef PREPACK struct {
60455 +    A_UINT8 noSCOPkts;
60456 +    A_UINT8 pspollTimeout;
60457 +    A_UINT8 stompbt;
60458 +} POSTPACK BT_PARAMS_SCO;
60459 +
60460 +typedef PREPACK struct {
60461 +    A_UINT32 period;
60462 +    A_UINT32 dutycycle;
60463 +    A_UINT8  stompbt;
60464 +} POSTPACK BT_PARAMS_A2DP;
60465 +
60466 +typedef PREPACK struct {
60467 +    A_UINT32 mode;
60468 +    A_UINT32 scoWghts;
60469 +    A_UINT32 a2dpWghts;
60470 +    A_UINT32 genWghts;
60471 +    A_UINT32 mode2;
60472 +    A_UINT8  setVal;
60473 +} POSTPACK BT_COEX_REGS;
60474 +
60475 +typedef enum {
60476 +    WLAN_PROTECT_POLICY = 1,
60477 +    WLAN_COEX_CTRL_FLAGS
60478 +} BT_PARAMS_MISC_TYPE;
60479 +
60480 +typedef enum {
60481 +    WLAN_PROTECT_PER_STREAM = 0x01,   /* default */
60482 +    WLAN_PROTECT_ANY_TX = 0x02
60483 +} WLAN_PROTECT_FLAGS;
60484 +
60485 +
60486 +#define WLAN_DISABLE_COEX_IN_DISCONNECT   0x01 /* default */
60487 +#define WLAN_KEEP_COEX_IN_DISCONNECT      0x02
60488 +#define WLAN_STOMPBT_IN_DISCONNECT        0x04
60489 +
60490 +#define WLAN_DISABLE_COEX_IN_ROAM         0x10 /* default */
60491 +#define WLAN_KEEP_COEX_IN_ROAM            0x20
60492 +#define WLAN_STOMPBT_IN_ROAM              0x40
60493 +
60494 +#define WLAN_DISABLE_COEX_IN_SCAN        0x100 /* default */
60495 +#define WLAN_KEEP_COEX_IN_SCAN           0x200
60496 +#define WLAN_STOMPBT_IN_SCAN             0x400
60497 +
60498 +#define WLAN_DISABLE_COEX_BT_OFF        0x1000 /* default */
60499 +#define WLAN_KEEP_COEX_BT_OFF           0x2000
60500 +#define WLAN_STOMPBT_BT_OFF             0x4000
60501 +
60502 +typedef PREPACK struct {
60503 +    A_UINT32 period;
60504 +    A_UINT32 dutycycle;
60505 +    A_UINT8  stompbt;
60506 +    A_UINT8  policy;
60507 +} POSTPACK WLAN_PROTECT_POLICY_TYPE;
60508 +
60509 +typedef PREPACK struct {
60510 +    PREPACK union {
60511 +        WLAN_PROTECT_POLICY_TYPE protectParams;
60512 +        A_UINT16 wlanCtrlFlags;
60513 +    } POSTPACK info;
60514 +    A_UINT8 paramType;
60515 +} POSTPACK BT_PARAMS_MISC;
60516 +
60517 +typedef PREPACK struct {
60518 +    PREPACK union {
60519 +        BT_PARAMS_SCO scoParams;
60520 +        BT_PARAMS_A2DP a2dpParams;
60521 +        BT_PARAMS_MISC miscParams;
60522 +        BT_COEX_REGS regs;
60523 +    } POSTPACK info;
60524 +    A_UINT8 paramType;
60525 +} POSTPACK WMI_SET_BT_PARAMS_CMD;
60526 +
60527 +/*
60528 + * Command Replies
60529 + */
60530 +
60531 +/*
60532 + * WMI_GET_CHANNEL_LIST_CMDID reply
60533 + */
60534 +typedef PREPACK struct {
60535 +    A_UINT8     reserved1;
60536 +    A_UINT8     numChannels;            /* number of channels in reply */
60537 +    A_UINT16    channelList[1];         /* channel in Mhz */
60538 +} POSTPACK WMI_CHANNEL_LIST_REPLY;
60539 +
60540 +typedef enum {
60541 +    A_SUCCEEDED = A_OK,
60542 +    A_FAILED_DELETE_STREAM_DOESNOT_EXIST=250,
60543 +    A_SUCCEEDED_MODIFY_STREAM=251,
60544 +    A_FAILED_INVALID_STREAM = 252,
60545 +    A_FAILED_MAX_THINSTREAMS = 253,
60546 +    A_FAILED_CREATE_REMOVE_PSTREAM_FIRST = 254,
60547 +} PSTREAM_REPLY_STATUS;
60548 +
60549 +/*
60550 + * List of Events (target to host)
60551 + */
60552 +typedef enum {
60553 +    WMI_READY_EVENTID           = 0x1001,
60554 +    WMI_CONNECT_EVENTID,
60555 +    WMI_DISCONNECT_EVENTID,
60556 +    WMI_BSSINFO_EVENTID,
60557 +    WMI_CMDERROR_EVENTID,
60558 +    WMI_REGDOMAIN_EVENTID,
60559 +    WMI_PSTREAM_TIMEOUT_EVENTID,
60560 +    WMI_NEIGHBOR_REPORT_EVENTID,
60561 +    WMI_TKIP_MICERR_EVENTID,
60562 +    WMI_SCAN_COMPLETE_EVENTID,
60563 +    WMI_REPORT_STATISTICS_EVENTID,
60564 +    WMI_RSSI_THRESHOLD_EVENTID,
60565 +    WMI_ERROR_REPORT_EVENTID,
60566 +    WMI_OPT_RX_FRAME_EVENTID,
60567 +    WMI_REPORT_ROAM_TBL_EVENTID,
60568 +    WMI_EXTENSION_EVENTID,
60569 +    WMI_CAC_EVENTID,
60570 +    WMI_SNR_THRESHOLD_EVENTID,
60571 +    WMI_LQ_THRESHOLD_EVENTID,
60572 +    WMI_TX_RETRY_ERR_EVENTID,
60573 +    WMI_REPORT_ROAM_DATA_EVENTID,
60574 +    WMI_TEST_EVENTID,
60575 +    WMI_APLIST_EVENTID,
60576 +    WMI_GET_WOW_LIST_EVENTID,
60577 +    WMI_GET_PMKID_LIST_EVENTID
60578 +} WMI_EVENT_ID;
60579 +
60580 +typedef enum {
60581 +    WMI_11A_CAPABILITY   = 1,
60582 +    WMI_11G_CAPABILITY   = 2,
60583 +    WMI_11AG_CAPABILITY  = 3,
60584 +} WMI_PHY_CAPABILITY;
60585 +
60586 +typedef PREPACK struct {
60587 +    A_UINT8     macaddr[ATH_MAC_LEN];
60588 +    A_UINT8     phyCapability;              /* WMI_PHY_CAPABILITY */
60589 +} POSTPACK WMI_READY_EVENT;
60590 +
60591 +/*
60592 + * Connect Event
60593 + */
60594 +typedef PREPACK struct {
60595 +    A_UINT16    channel;
60596 +    A_UINT8     bssid[ATH_MAC_LEN];
60597 +    A_UINT16    listenInterval;
60598 +    A_UINT16    beaconInterval;
60599 +    A_UINT32    networkType;
60600 +    A_UINT8     beaconIeLen;
60601 +    A_UINT8     assocReqLen;
60602 +    A_UINT8     assocRespLen;
60603 +    A_UINT8     assocInfo[1];
60604 +} POSTPACK WMI_CONNECT_EVENT;
60605 +
60606 +/*
60607 + * Disconnect Event
60608 + */
60609 +typedef enum {
60610 +    NO_NETWORK_AVAIL   = 0x01,
60611 +    LOST_LINK          = 0x02,     /* bmiss */
60612 +    DISCONNECT_CMD     = 0x03,
60613 +    BSS_DISCONNECTED   = 0x04,
60614 +    AUTH_FAILED        = 0x05,
60615 +    ASSOC_FAILED       = 0x06,
60616 +    NO_RESOURCES_AVAIL = 0x07,
60617 +    CSERV_DISCONNECT   = 0x08,
60618 +    INVALID_PROFILE    = 0x0a,
60619 +    DOT11H_CHANNEL_SWITCH = 0x0b,
60620 +} WMI_DISCONNECT_REASON;
60621 +
60622 +typedef PREPACK struct {
60623 +    A_UINT16    protocolReasonStatus;  /* reason code, see 802.11 spec. */
60624 +    A_UINT8     bssid[ATH_MAC_LEN];    /* set if known */
60625 +    A_UINT8     disconnectReason ;      /* see WMI_DISCONNECT_REASON */
60626 +    A_UINT8     assocRespLen;
60627 +    A_UINT8     assocInfo[1];
60628 +} POSTPACK WMI_DISCONNECT_EVENT;
60629 +
60630 +/*
60631 + * BSS Info Event.
60632 + * Mechanism used to inform host of the presence and characteristic of
60633 + * wireless networks present.  Consists of bss info header followed by
60634 + * the beacon or probe-response frame body.  The 802.11 header is not included.
60635 + */
60636 +typedef enum {
60637 +    BEACON_FTYPE = 0x1,
60638 +    PROBERESP_FTYPE,
60639 +    ACTION_MGMT_FTYPE,
60640 +} WMI_BI_FTYPE;
60641 +
60642 +enum {
60643 +    BSS_ELEMID_CHANSWITCH = 0x01,
60644 +    BSS_ELEMID_ATHEROS = 0x02,
60645 +};
60646 +
60647 +typedef PREPACK struct {
60648 +    A_UINT16    channel;
60649 +    A_UINT8     frameType;          /* see WMI_BI_FTYPE */
60650 +    A_UINT8     snr;
60651 +    A_INT16     rssi;
60652 +    A_UINT8     bssid[ATH_MAC_LEN];
60653 +    A_UINT32    ieMask;
60654 +} POSTPACK WMI_BSS_INFO_HDR;
60655 +
60656 +/*
60657 + * Command Error Event
60658 + */
60659 +typedef enum {
60660 +    INVALID_PARAM  = 0x01,
60661 +    ILLEGAL_STATE  = 0x02,
60662 +    INTERNAL_ERROR = 0x03,
60663 +} WMI_ERROR_CODE;
60664 +
60665 +typedef PREPACK struct {
60666 +    A_UINT16    commandId;
60667 +    A_UINT8     errorCode;
60668 +} POSTPACK WMI_CMD_ERROR_EVENT;
60669 +
60670 +/*
60671 + * New Regulatory Domain Event
60672 + */
60673 +typedef PREPACK struct {
60674 +    A_UINT32    regDomain;
60675 +} POSTPACK WMI_REG_DOMAIN_EVENT;
60676 +
60677 +typedef PREPACK struct {
60678 +    A_UINT8     trafficClass;
60679 +} POSTPACK WMI_PSTREAM_TIMEOUT_EVENT;
60680 +
60681 +/*
60682 + * The WMI_NEIGHBOR_REPORT Event is generated by the target to inform
60683 + * the host of BSS's it has found that matches the current profile.
60684 + * It can be used by the host to cache PMKs and/to initiate pre-authentication
60685 + * if the BSS supports it.  The first bssid is always the current associated
60686 + * BSS.
60687 + * The bssid and bssFlags information repeats according to the number
60688 + * or APs reported.
60689 + */
60690 +typedef enum {
60691 +    WMI_DEFAULT_BSS_FLAGS   = 0x00,
60692 +    WMI_PREAUTH_CAPABLE_BSS = 0x01,
60693 +    WMI_PMKID_VALID_BSS     = 0x02,
60694 +} WMI_BSS_FLAGS;
60695 +
60696 +typedef PREPACK struct {
60697 +    A_UINT8     bssid[ATH_MAC_LEN];
60698 +    A_UINT8     bssFlags;            /* see WMI_BSS_FLAGS */
60699 +} POSTPACK WMI_NEIGHBOR_INFO;
60700 +
60701 +typedef PREPACK struct {
60702 +    A_INT8      numberOfAps;
60703 +    WMI_NEIGHBOR_INFO neighbor[1];
60704 +} POSTPACK WMI_NEIGHBOR_REPORT_EVENT;
60705 +
60706 +/*
60707 + * TKIP MIC Error Event
60708 + */
60709 +typedef PREPACK struct {
60710 +    A_UINT8 keyid;
60711 +    A_UINT8 ismcast;
60712 +} POSTPACK WMI_TKIP_MICERR_EVENT;
60713 +
60714 +/*
60715 + * WMI_SCAN_COMPLETE_EVENTID - no parameters (old), staus parameter (new)
60716 + */
60717 +typedef PREPACK struct {
60718 +    A_STATUS status;
60719 +} POSTPACK WMI_SCAN_COMPLETE_EVENT;
60720 +
60721 +#define MAX_OPT_DATA_LEN 1400
60722 +
60723 +/*
60724 + * WMI_SET_ADHOC_BSSID_CMDID
60725 + */
60726 +typedef PREPACK struct {
60727 +    A_UINT8     bssid[ATH_MAC_LEN];
60728 +} POSTPACK WMI_SET_ADHOC_BSSID_CMD;
60729 +
60730 +/*
60731 + * WMI_SET_OPT_MODE_CMDID
60732 + */
60733 +typedef enum {
60734 +    SPECIAL_OFF,
60735 +    SPECIAL_ON,
60736 +} OPT_MODE_TYPE;
60737 +
60738 +typedef PREPACK struct {
60739 +    A_UINT8     optMode;
60740 +} POSTPACK WMI_SET_OPT_MODE_CMD;
60741 +
60742 +/*
60743 + * WMI_TX_OPT_FRAME_CMDID
60744 + */
60745 +typedef enum {
60746 +    OPT_PROBE_REQ   = 0x01,
60747 +    OPT_PROBE_RESP  = 0x02,
60748 +    OPT_CPPP_START  = 0x03,
60749 +    OPT_CPPP_STOP   = 0x04,
60750 +} WMI_OPT_FTYPE;
60751 +
60752 +typedef PREPACK struct {
60753 +    A_UINT16    optIEDataLen;
60754 +    A_UINT8     frmType;
60755 +    A_UINT8     dstAddr[ATH_MAC_LEN];
60756 +    A_UINT8     bssid[ATH_MAC_LEN];
60757 +    A_UINT8     reserved;               /* For alignment */
60758 +    A_UINT8     optIEData[1];
60759 +} POSTPACK WMI_OPT_TX_FRAME_CMD;
60760 +
60761 +/*
60762 + * Special frame receive Event.
60763 + * Mechanism used to inform host of the receiption of the special frames.
60764 + * Consists of special frame info header followed by special frame body.
60765 + * The 802.11 header is not included.
60766 + */
60767 +typedef PREPACK struct {
60768 +    A_UINT16    channel;
60769 +    A_UINT8     frameType;          /* see WMI_OPT_FTYPE */
60770 +    A_INT8      snr;
60771 +    A_UINT8     srcAddr[ATH_MAC_LEN];
60772 +    A_UINT8     bssid[ATH_MAC_LEN];
60773 +} POSTPACK WMI_OPT_RX_INFO_HDR;
60774 +
60775 +/*
60776 + * Reporting statistics.
60777 + */
60778 +typedef PREPACK struct {
60779 +    A_UINT32   tx_packets;
60780 +    A_UINT32   tx_bytes;
60781 +    A_UINT32   tx_unicast_pkts;
60782 +    A_UINT32   tx_unicast_bytes;
60783 +    A_UINT32   tx_multicast_pkts;
60784 +    A_UINT32   tx_multicast_bytes;
60785 +    A_UINT32   tx_broadcast_pkts;
60786 +    A_UINT32   tx_broadcast_bytes;
60787 +    A_UINT32   tx_rts_success_cnt;
60788 +    A_UINT32   tx_packet_per_ac[4];
60789 +    A_UINT32   tx_errors_per_ac[4];
60790 +
60791 +    A_UINT32   tx_errors;
60792 +    A_UINT32   tx_failed_cnt;
60793 +    A_UINT32   tx_retry_cnt;
60794 +    A_UINT32   tx_rts_fail_cnt;
60795 +    A_INT32    tx_unicast_rate;
60796 +}POSTPACK tx_stats_t;
60797 +
60798 +typedef PREPACK struct {
60799 +    A_UINT32   rx_packets;
60800 +    A_UINT32   rx_bytes;
60801 +    A_UINT32   rx_unicast_pkts;
60802 +    A_UINT32   rx_unicast_bytes;
60803 +    A_UINT32   rx_multicast_pkts;
60804 +    A_UINT32   rx_multicast_bytes;
60805 +    A_UINT32   rx_broadcast_pkts;
60806 +    A_UINT32   rx_broadcast_bytes;
60807 +    A_UINT32   rx_fragment_pkt;
60808 +
60809 +    A_UINT32   rx_errors;
60810 +    A_UINT32   rx_crcerr;
60811 +    A_UINT32   rx_key_cache_miss;
60812 +    A_UINT32   rx_decrypt_err;
60813 +    A_UINT32   rx_duplicate_frames;
60814 +    A_INT32    rx_unicast_rate;
60815 +}POSTPACK rx_stats_t;
60816 +
60817 +typedef PREPACK struct {
60818 +    A_UINT32   tkip_local_mic_failure;
60819 +    A_UINT32   tkip_counter_measures_invoked;
60820 +    A_UINT32   tkip_replays;
60821 +    A_UINT32   tkip_format_errors;
60822 +    A_UINT32   ccmp_format_errors;
60823 +    A_UINT32   ccmp_replays;
60824 +}POSTPACK tkip_ccmp_stats_t;
60825 +
60826 +typedef PREPACK struct {
60827 +    A_UINT32   power_save_failure_cnt;
60828 +}POSTPACK pm_stats_t;
60829 +
60830 +typedef PREPACK struct {
60831 +    A_UINT32    cs_bmiss_cnt;
60832 +    A_UINT32    cs_lowRssi_cnt;
60833 +    A_UINT16    cs_connect_cnt;
60834 +    A_UINT16    cs_disconnect_cnt;
60835 +    A_INT16     cs_aveBeacon_rssi;
60836 +    A_UINT16    cs_roam_count;
60837 +    A_UINT16    cs_rssi;
60838 +    A_UINT8     cs_snr;
60839 +    A_UINT8     cs_aveBeacon_snr;
60840 +    A_UINT8     cs_lastRoam_msec;
60841 +} POSTPACK cserv_stats_t;
60842 +
60843 +typedef PREPACK struct {
60844 +    tx_stats_t          tx_stats;
60845 +    rx_stats_t          rx_stats;
60846 +    tkip_ccmp_stats_t   tkipCcmpStats;
60847 +}POSTPACK wlan_net_stats_t;
60848 +
60849 +typedef PREPACK struct {
60850 +    A_UINT32    wow_num_pkts_dropped;
60851 +    A_UINT16    wow_num_events_discarded;
60852 +    A_UINT8     wow_num_host_pkt_wakeups;
60853 +    A_UINT8     wow_num_host_event_wakeups;
60854 +} POSTPACK wlan_wow_stats_t;
60855 +
60856 +typedef PREPACK struct {
60857 +    A_UINT32            lqVal;
60858 +    A_INT32             noise_floor_calibation;
60859 +    pm_stats_t          pmStats;
60860 +    wlan_net_stats_t    txrxStats;
60861 +    wlan_wow_stats_t    wowStats;
60862 +    cserv_stats_t       cservStats;
60863 +} POSTPACK WMI_TARGET_STATS;
60864 +
60865 +/*
60866 + * WMI_RSSI_THRESHOLD_EVENTID.
60867 + * Indicate the RSSI events to host. Events are indicated when we breach a
60868 + * thresold value.
60869 + */
60870 +typedef enum{
60871 +    WMI_RSSI_THRESHOLD1_ABOVE = 0,
60872 +    WMI_RSSI_THRESHOLD2_ABOVE,
60873 +    WMI_RSSI_THRESHOLD3_ABOVE,
60874 +    WMI_RSSI_THRESHOLD4_ABOVE,
60875 +    WMI_RSSI_THRESHOLD5_ABOVE,
60876 +    WMI_RSSI_THRESHOLD6_ABOVE,
60877 +    WMI_RSSI_THRESHOLD1_BELOW,
60878 +    WMI_RSSI_THRESHOLD2_BELOW,
60879 +    WMI_RSSI_THRESHOLD3_BELOW,
60880 +    WMI_RSSI_THRESHOLD4_BELOW,
60881 +    WMI_RSSI_THRESHOLD5_BELOW,
60882 +    WMI_RSSI_THRESHOLD6_BELOW
60883 +}WMI_RSSI_THRESHOLD_VAL;
60884 +
60885 +typedef PREPACK struct {
60886 +    A_INT16 rssi;
60887 +    A_UINT8 range;
60888 +}POSTPACK WMI_RSSI_THRESHOLD_EVENT;
60889 +
60890 +/*
60891 + *  WMI_ERROR_REPORT_EVENTID
60892 + */
60893 +typedef enum{
60894 +    WMI_TARGET_PM_ERR_FAIL      = 0x00000001,
60895 +    WMI_TARGET_KEY_NOT_FOUND    = 0x00000002,
60896 +    WMI_TARGET_DECRYPTION_ERR   = 0x00000004,
60897 +    WMI_TARGET_BMISS            = 0x00000008,
60898 +    WMI_PSDISABLE_NODE_JOIN     = 0x00000010,
60899 +    WMI_TARGET_COM_ERR          = 0x00000020,
60900 +    WMI_TARGET_FATAL_ERR        = 0x00000040
60901 +} WMI_TARGET_ERROR_VAL;
60902 +
60903 +typedef PREPACK struct {
60904 +    A_UINT32 errorVal;
60905 +}POSTPACK  WMI_TARGET_ERROR_REPORT_EVENT;
60906 +
60907 +typedef PREPACK struct {
60908 +    A_UINT8 retrys;
60909 +}POSTPACK  WMI_TX_RETRY_ERR_EVENT;
60910 +
60911 +typedef enum{
60912 +    WMI_SNR_THRESHOLD1_ABOVE = 1,
60913 +    WMI_SNR_THRESHOLD1_BELOW,
60914 +    WMI_SNR_THRESHOLD2_ABOVE,
60915 +    WMI_SNR_THRESHOLD2_BELOW,
60916 +    WMI_SNR_THRESHOLD3_ABOVE,
60917 +    WMI_SNR_THRESHOLD3_BELOW,
60918 +    WMI_SNR_THRESHOLD4_ABOVE,
60919 +    WMI_SNR_THRESHOLD4_BELOW
60920 +} WMI_SNR_THRESHOLD_VAL;
60921 +
60922 +typedef PREPACK struct {
60923 +    A_UINT8 range;  /* WMI_SNR_THRESHOLD_VAL */
60924 +    A_UINT8 snr;
60925 +}POSTPACK  WMI_SNR_THRESHOLD_EVENT;
60926 +
60927 +typedef enum{
60928 +    WMI_LQ_THRESHOLD1_ABOVE = 1,
60929 +    WMI_LQ_THRESHOLD1_BELOW,
60930 +    WMI_LQ_THRESHOLD2_ABOVE,
60931 +    WMI_LQ_THRESHOLD2_BELOW,
60932 +    WMI_LQ_THRESHOLD3_ABOVE,
60933 +    WMI_LQ_THRESHOLD3_BELOW,
60934 +    WMI_LQ_THRESHOLD4_ABOVE,
60935 +    WMI_LQ_THRESHOLD4_BELOW
60936 +} WMI_LQ_THRESHOLD_VAL;
60937 +
60938 +typedef PREPACK struct {
60939 +    A_INT32 lq;
60940 +    A_UINT8 range;  /* WMI_LQ_THRESHOLD_VAL */
60941 +}POSTPACK  WMI_LQ_THRESHOLD_EVENT;
60942 +/*
60943 + * WMI_REPORT_ROAM_TBL_EVENTID
60944 + */
60945 +#define MAX_ROAM_TBL_CAND   5
60946 +
60947 +typedef PREPACK struct {
60948 +    A_INT32 roam_util;
60949 +    A_UINT8 bssid[ATH_MAC_LEN];
60950 +    A_INT8  rssi;
60951 +    A_INT8  rssidt;
60952 +    A_INT8  last_rssi;
60953 +    A_INT8  util;
60954 +    A_INT8  bias;
60955 +    A_UINT8 reserved; /* For alignment */
60956 +} POSTPACK WMI_BSS_ROAM_INFO;
60957 +
60958 +
60959 +typedef PREPACK struct {
60960 +    A_UINT16  roamMode;
60961 +    A_UINT16  numEntries;
60962 +    WMI_BSS_ROAM_INFO bssRoamInfo[1];
60963 +} POSTPACK WMI_TARGET_ROAM_TBL;
60964 +
60965 +/*
60966 + *  WMI_CAC_EVENTID
60967 + */
60968 +typedef enum {
60969 +    CAC_INDICATION_ADMISSION = 0x00,
60970 +    CAC_INDICATION_ADMISSION_RESP = 0x01,
60971 +    CAC_INDICATION_DELETE = 0x02,
60972 +    CAC_INDICATION_NO_RESP = 0x03,
60973 +}CAC_INDICATION;
60974 +
60975 +#define WMM_TSPEC_IE_LEN   63
60976 +
60977 +typedef PREPACK struct {
60978 +    A_UINT8 ac;
60979 +    A_UINT8 cac_indication;
60980 +    A_UINT8 statusCode;
60981 +    A_UINT8 tspecSuggestion[WMM_TSPEC_IE_LEN];
60982 +}POSTPACK  WMI_CAC_EVENT;
60983 +
60984 +/*
60985 + * WMI_APLIST_EVENTID
60986 + */
60987 +
60988 +typedef enum {
60989 +    APLIST_VER1 = 1,
60990 +} APLIST_VER;
60991 +
60992 +typedef PREPACK struct {
60993 +    A_UINT8     bssid[ATH_MAC_LEN];
60994 +    A_UINT16    channel;
60995 +} POSTPACK  WMI_AP_INFO_V1;
60996 +
60997 +typedef PREPACK union {
60998 +    WMI_AP_INFO_V1  apInfoV1;
60999 +} POSTPACK WMI_AP_INFO;
61000 +
61001 +typedef PREPACK struct {
61002 +    A_UINT8     apListVer;
61003 +    A_UINT8     numAP;
61004 +    WMI_AP_INFO apList[1];
61005 +} POSTPACK WMI_APLIST_EVENT;
61006 +
61007 +/*
61008 + * developer commands
61009 + */
61010 +
61011 +/*
61012 + * WMI_SET_BITRATE_CMDID
61013 + *
61014 + * Get bit rate cmd uses same definition as set bit rate cmd
61015 + */
61016 +typedef enum {
61017 +    RATE_AUTO   = -1,
61018 +    RATE_1Mb    = 0,
61019 +    RATE_2Mb    = 1,
61020 +    RATE_5_5Mb  = 2,
61021 +    RATE_11Mb   = 3,
61022 +    RATE_6Mb    = 4,
61023 +    RATE_9Mb    = 5,
61024 +    RATE_12Mb   = 6,
61025 +    RATE_18Mb   = 7,
61026 +    RATE_24Mb   = 8,
61027 +    RATE_36Mb   = 9,
61028 +    RATE_48Mb   = 10,
61029 +    RATE_54Mb   = 11,
61030 +} WMI_BIT_RATE;
61031 +
61032 +typedef PREPACK struct {
61033 +    A_INT8      rateIndex;          /* see WMI_BIT_RATE */
61034 +} POSTPACK WMI_BIT_RATE_CMD, WMI_BIT_RATE_REPLY;
61035 +
61036 +/*
61037 + * WMI_SET_FIXRATES_CMDID
61038 + *
61039 + * Get fix rates cmd uses same definition as set fix rates cmd
61040 + */
61041 +typedef enum {
61042 +    FIX_RATE_1Mb    = 0x1,
61043 +    FIX_RATE_2Mb    = 0x2,
61044 +    FIX_RATE_5_5Mb  = 0x4,
61045 +    FIX_RATE_11Mb   = 0x8,
61046 +    FIX_RATE_6Mb    = 0x10,
61047 +    FIX_RATE_9Mb    = 0x20,
61048 +    FIX_RATE_12Mb   = 0x40,
61049 +    FIX_RATE_18Mb   = 0x80,
61050 +    FIX_RATE_24Mb   = 0x100,
61051 +    FIX_RATE_36Mb   = 0x200,
61052 +    FIX_RATE_48Mb   = 0x400,
61053 +    FIX_RATE_54Mb   = 0x800,
61054 +} WMI_FIX_RATES_MASK;
61055 +
61056 +typedef PREPACK struct {
61057 +    A_UINT16      fixRateMask;          /* see WMI_BIT_RATE */
61058 +} POSTPACK WMI_FIX_RATES_CMD, WMI_FIX_RATES_REPLY;
61059 +
61060 +/*
61061 + * WMI_SET_RECONNECT_AUTH_MODE_CMDID
61062 + *
61063 + * Set authentication mode
61064 + */
61065 +typedef enum {
61066 +    RECONN_DO_AUTH = 0x00,
61067 +    RECONN_NOT_AUTH = 0x01
61068 +} WMI_AUTH_MODE;
61069 +
61070 +typedef PREPACK struct {
61071 +    A_UINT8 mode;
61072 +} POSTPACK WMI_SET_AUTH_MODE_CMD;
61073 +
61074 +/*
61075 + * WMI_SET_REASSOC_MODE_CMDID
61076 + *
61077 + * Set authentication mode
61078 + */
61079 +typedef enum {
61080 +    REASSOC_DO_DISASSOC = 0x00,
61081 +    REASSOC_DONOT_DISASSOC = 0x01
61082 +} WMI_REASSOC_MODE;
61083 +
61084 +typedef PREPACK struct {
61085 +    A_UINT8 mode;
61086 +}POSTPACK WMI_SET_REASSOC_MODE_CMD;
61087 +
61088 +typedef enum {
61089 +    ROAM_DATA_TIME = 1,            /* Get The Roam Time Data */
61090 +} ROAM_DATA_TYPE;
61091 +
61092 +typedef PREPACK struct {
61093 +    A_UINT32        disassoc_time;
61094 +    A_UINT32        no_txrx_time;
61095 +    A_UINT32        assoc_time;
61096 +    A_UINT32        allow_txrx_time;
61097 +    A_UINT32        last_data_txrx_time;
61098 +    A_UINT32        first_data_txrx_time;
61099 +    A_UINT8         disassoc_bssid[ATH_MAC_LEN];
61100 +    A_INT8          disassoc_bss_rssi;
61101 +    A_UINT8         assoc_bssid[ATH_MAC_LEN];
61102 +    A_INT8          assoc_bss_rssi;
61103 +} POSTPACK WMI_TARGET_ROAM_TIME;
61104 +
61105 +typedef PREPACK struct {
61106 +    PREPACK union {
61107 +        WMI_TARGET_ROAM_TIME roamTime;
61108 +    } POSTPACK u;
61109 +    A_UINT8 roamDataType ;
61110 +} POSTPACK WMI_TARGET_ROAM_DATA;
61111 +
61112 +typedef enum {
61113 +    WMI_WMM_DISABLED = 0,
61114 +    WMI_WMM_ENABLED
61115 +} WMI_WMM_STATUS;
61116 +
61117 +typedef PREPACK struct {
61118 +    A_UINT8    status;
61119 +}POSTPACK WMI_SET_WMM_CMD;
61120 +
61121 +typedef enum {
61122 +    WMI_TXOP_DISABLED = 0,
61123 +    WMI_TXOP_ENABLED
61124 +} WMI_TXOP_CFG;
61125 +
61126 +typedef PREPACK struct {
61127 +    A_UINT8    txopEnable;
61128 +}POSTPACK WMI_SET_WMM_TXOP_CMD;
61129 +
61130 +typedef PREPACK struct {
61131 +    A_UINT8 keepaliveInterval;
61132 +} POSTPACK WMI_SET_KEEPALIVE_CMD;
61133 +
61134 +typedef PREPACK struct {
61135 +    A_BOOL configured;
61136 +    A_UINT8 keepaliveInterval;
61137 +} POSTPACK WMI_GET_KEEPALIVE_CMD;
61138 +
61139 +/*
61140 + * Add Application specified IE to a management frame
61141 + */
61142 +#define WMI_MAX_IE_LEN  78
61143 +
61144 +typedef PREPACK struct {
61145 +    A_UINT8 mgmtFrmType;  /* one of WMI_MGMT_FRAME_TYPE */
61146 +    A_UINT8 ieLen;    /* Length  of the IE that should be added to the MGMT frame */
61147 +    A_UINT8 ieInfo[1];
61148 +} POSTPACK WMI_SET_APPIE_CMD;
61149 +
61150 +/*
61151 + * Notify the WSC registration status to the target
61152 + */
61153 +#define WSC_REG_ACTIVE     1
61154 +#define WSC_REG_INACTIVE   0
61155 +/* Generic Hal Interface for setting hal paramters. */
61156 +/* Add new Set HAL Param cmdIds here for newer params */
61157 +typedef enum {
61158 +   WHAL_SETCABTO_CMDID = 1,
61159 +}WHAL_CMDID;
61160 +
61161 +typedef PREPACK struct {
61162 +    A_UINT8 cabTimeOut;
61163 +} POSTPACK WHAL_SETCABTO_PARAM;
61164 +
61165 +typedef PREPACK struct {
61166 +    A_UINT8  whalCmdId;
61167 +    A_UINT8 data[1];
61168 +} POSTPACK WHAL_PARAMCMD;
61169 +
61170 +
61171 +#define WOW_MAX_FILTER_LISTS 1 /*4*/
61172 +#define WOW_MAX_FILTERS_PER_LIST 4
61173 +#define WOW_PATTERN_SIZE 64
61174 +#define WOW_MASK_SIZE 64
61175 +
61176 +typedef PREPACK struct {
61177 +    A_UINT8 wow_valid_filter;
61178 +    A_UINT8 wow_filter_id;
61179 +    A_UINT8 wow_filter_size;
61180 +    A_UINT8 wow_filter_offset;
61181 +    A_UINT8 wow_filter_mask[WOW_MASK_SIZE];
61182 +    A_UINT8 wow_filter_pattern[WOW_PATTERN_SIZE];
61183 +} POSTPACK WOW_FILTER;
61184 +
61185 +
61186 +typedef PREPACK struct {
61187 +    A_UINT8 wow_valid_list;
61188 +    A_UINT8 wow_list_id;
61189 +    A_UINT8 wow_num_filters;
61190 +    A_UINT8 wow_total_list_size;
61191 +    WOW_FILTER list[WOW_MAX_FILTERS_PER_LIST];
61192 +} POSTPACK WOW_FILTER_LIST;
61193 +
61194 +typedef PREPACK struct {
61195 +    A_BOOL awake;
61196 +    A_BOOL asleep;
61197 +} POSTPACK WMI_SET_HOST_SLEEP_MODE_CMD;
61198 +
61199 +typedef PREPACK struct {
61200 +    A_BOOL enable_wow;
61201 +} POSTPACK WMI_SET_WOW_MODE_CMD;
61202 +
61203 +typedef PREPACK struct {
61204 +    A_UINT8 filter_list_id;
61205 +} POSTPACK WMI_GET_WOW_LIST_CMD;
61206 +
61207 +/*
61208 + * WMI_GET_WOW_LIST_CMD reply
61209 + */
61210 +typedef PREPACK struct {
61211 +    A_UINT8     num_filters;     /* number of patterns in reply */
61212 +    A_UINT8     this_filter_num; /*  this is filter # x of total num_filters */
61213 +    A_UINT8     wow_mode;
61214 +    A_UINT8     host_mode;
61215 +    WOW_FILTER  wow_filters[1];
61216 +} POSTPACK WMI_GET_WOW_LIST_REPLY;
61217 +
61218 +typedef PREPACK struct {
61219 +    A_UINT8 filter_list_id;
61220 +    A_UINT8 filter_size;
61221 +    A_UINT8 filter_offset;
61222 +    A_UINT8 filter[1];
61223 +} POSTPACK WMI_ADD_WOW_PATTERN_CMD;
61224 +
61225 +typedef PREPACK struct {
61226 +    A_UINT16 filter_list_id;
61227 +    A_UINT16 filter_id;
61228 +} POSTPACK WMI_DEL_WOW_PATTERN_CMD;
61229 +
61230 +typedef PREPACK struct {
61231 +    A_UINT8 macaddr[ATH_MAC_LEN];
61232 +} POSTPACK WMI_SET_MAC_ADDRESS_CMD;
61233 +
61234 +/*
61235 + * WMI_SET_AKMP_PARAMS_CMD
61236 + */
61237 +
61238 +#define WMI_AKMP_MULTI_PMKID_EN   0x000001
61239 +
61240 +typedef PREPACK struct {
61241 +    A_UINT32    akmpInfo;
61242 +} POSTPACK WMI_SET_AKMP_PARAMS_CMD;
61243 +
61244 +typedef PREPACK struct {
61245 +    A_UINT8 pmkid[WMI_PMKID_LEN];
61246 +} POSTPACK WMI_PMKID;
61247 +
61248 +/*
61249 + * WMI_SET_PMKID_LIST_CMD
61250 + */
61251 +#define WMI_MAX_PMKID_CACHE   8
61252 +
61253 +typedef PREPACK struct {
61254 +    A_UINT32    numPMKID;
61255 +    WMI_PMKID   pmkidList[WMI_MAX_PMKID_CACHE];
61256 +} POSTPACK WMI_SET_PMKID_LIST_CMD;
61257 +
61258 +/*
61259 + * WMI_GET_PMKID_LIST_CMD  Reply
61260 + * Following the Number of PMKIDs is the list of PMKIDs
61261 + */
61262 +typedef PREPACK struct {
61263 +    A_UINT32    numPMKID;
61264 +    WMI_PMKID   pmkidList[1];
61265 +} POSTPACK WMI_PMKID_LIST_REPLY;
61266 +
61267 +/* index used for priority streams */
61268 +typedef enum {
61269 +    WMI_NOT_MAPPED  = -1,
61270 +    WMI_CONTROL_PRI = 0,
61271 +    WMI_BEST_EFFORT_PRI = 1,
61272 +    WMI_LOW_PRI = 2,
61273 +    WMI_HIGH_PRI = 3,
61274 +    WMI_HIGHEST_PRI,
61275 +    WMI_PRI_MAX_COUNT
61276 +} WMI_PRI_STREAM_ID;
61277 +
61278 +#ifndef ATH_TARGET
61279 +#include "athendpack.h"
61280 +#endif
61281 +
61282 +#ifdef __cplusplus
61283 +}
61284 +#endif
61285 +
61286 +#endif /* _WMI_H_ */
61287 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmix.h
61288 ===================================================================
61289 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
61290 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/include/wmix.h     2008-12-11 22:46:49.000000000 +0100
61291 @@ -0,0 +1,233 @@
61292 +/*
61293 + * Copyright (c) 2004-2005 Atheros Communications Inc.
61294 + * All rights reserved.
61295 + *
61296 + *
61297 + * $ATH_LICENSE_HOSTSDK0_C$
61298 + *
61299 + * This file contains extensions of the WMI protocol specified in the
61300 + * Wireless Module Interface (WMI).  It includes definitions of all
61301 + * extended commands and events.  Extensions include useful commands
61302 + * that are not directly related to wireless activities.  They may
61303 + * be hardware-specific, and they might not be supported on all
61304 + * implementations.
61305 + *
61306 + * Extended WMIX commands are encapsulated in a WMI message with
61307 + * cmd=WMI_EXTENSION_CMD.
61308 + *
61309 + */
61310 +
61311 +#ifndef _WMIX_H_
61312 +#define _WMIX_H_
61313 +
61314 +#ifdef __cplusplus
61315 +extern "C" {
61316 +#endif
61317 +
61318 +#ifndef ATH_TARGET
61319 +#include "athstartpack.h"
61320 +#endif
61321 +
61322 +#include "dbglog.h"
61323 +
61324 +/*
61325 + * Extended WMI commands are those that are needed during wireless
61326 + * operation, but which are not really wireless commands.  This allows,
61327 + * for instance, platform-specific commands.  Extended WMI commands are
61328 + * embedded in a WMI command message with WMI_COMMAND_ID=WMI_EXTENSION_CMDID.
61329 + * Extended WMI events are similarly embedded in a WMI event message with
61330 + * WMI_EVENT_ID=WMI_EXTENSION_EVENTID.
61331 + */
61332 +typedef PREPACK struct {
61333 +    A_UINT32    commandId;
61334 +} POSTPACK WMIX_CMD_HDR;
61335 +
61336 +typedef enum {
61337 +    WMIX_DSETOPEN_REPLY_CMDID           = 0x2001,
61338 +    WMIX_DSETDATA_REPLY_CMDID,
61339 +    WMIX_GPIO_OUTPUT_SET_CMDID,
61340 +    WMIX_GPIO_INPUT_GET_CMDID,
61341 +    WMIX_GPIO_REGISTER_SET_CMDID,
61342 +    WMIX_GPIO_REGISTER_GET_CMDID,
61343 +    WMIX_GPIO_INTR_ACK_CMDID,
61344 +    WMIX_HB_CHALLENGE_RESP_CMDID,
61345 +    WMIX_DBGLOG_CFG_MODULE_CMDID,
61346 +} WMIX_COMMAND_ID;
61347 +
61348 +typedef enum {
61349 +    WMIX_DSETOPENREQ_EVENTID            = 0x3001,
61350 +    WMIX_DSETCLOSE_EVENTID,
61351 +    WMIX_DSETDATAREQ_EVENTID,
61352 +    WMIX_GPIO_INTR_EVENTID,
61353 +    WMIX_GPIO_DATA_EVENTID,
61354 +    WMIX_GPIO_ACK_EVENTID,
61355 +    WMIX_HB_CHALLENGE_RESP_EVENTID,
61356 +    WMIX_DBGLOG_EVENTID,
61357 +} WMIX_EVENT_ID;
61358 +
61359 +/*
61360 + * =============DataSet support=================
61361 + */
61362 +
61363 +/*
61364 + * WMIX_DSETOPENREQ_EVENTID
61365 + * DataSet Open Request Event
61366 + */
61367 +typedef PREPACK struct {
61368 +    A_UINT32 dset_id;
61369 +    A_UINT32 targ_dset_handle;  /* echo'ed, not used by Host, */
61370 +    A_UINT32 targ_reply_fn;     /* echo'ed, not used by Host, */
61371 +    A_UINT32 targ_reply_arg;    /* echo'ed, not used by Host, */
61372 +} POSTPACK WMIX_DSETOPENREQ_EVENT;
61373 +
61374 +/*
61375 + * WMIX_DSETCLOSE_EVENTID
61376 + * DataSet Close Event
61377 + */
61378 +typedef PREPACK struct {
61379 +    A_UINT32 access_cookie;
61380 +} POSTPACK WMIX_DSETCLOSE_EVENT;
61381 +
61382 +/*
61383 + * WMIX_DSETDATAREQ_EVENTID
61384 + * DataSet Data Request Event
61385 + */
61386 +typedef PREPACK struct {
61387 +    A_UINT32 access_cookie;
61388 +    A_UINT32 offset;
61389 +    A_UINT32 length;
61390 +    A_UINT32 targ_buf;         /* echo'ed, not used by Host, */
61391 +    A_UINT32 targ_reply_fn;    /* echo'ed, not used by Host, */
61392 +    A_UINT32 targ_reply_arg;   /* echo'ed, not used by Host, */
61393 +} POSTPACK WMIX_DSETDATAREQ_EVENT;
61394 +
61395 +typedef PREPACK struct {
61396 +    A_UINT32              status;
61397 +    A_UINT32              targ_dset_handle;
61398 +    A_UINT32              targ_reply_fn;
61399 +    A_UINT32              targ_reply_arg;
61400 +    A_UINT32              access_cookie;
61401 +    A_UINT32              size;
61402 +    A_UINT32              version;
61403 +} POSTPACK WMIX_DSETOPEN_REPLY_CMD;
61404 +
61405 +typedef PREPACK struct {
61406 +    A_UINT32              status;
61407 +    A_UINT32              targ_buf;
61408 +    A_UINT32              targ_reply_fn;
61409 +    A_UINT32              targ_reply_arg;
61410 +    A_UINT32              length;
61411 +    A_UINT8               buf[1];
61412 +} POSTPACK WMIX_DSETDATA_REPLY_CMD;
61413 +
61414 +
61415 +/*
61416 + * =============GPIO support=================
61417 + * All masks are 18-bit masks with bit N operating on GPIO pin N.
61418 + */
61419 +
61420 +#include "gpio.h"
61421 +
61422 +/*
61423 + * Set GPIO pin output state.
61424 + * In order for output to be driven, a pin must be enabled for output.
61425 + * This can be done during initialization through the GPIO Configuration
61426 + * DataSet, or during operation with the enable_mask.
61427 + *
61428 + * If a request is made to simultaneously set/clear or set/disable or
61429 + * clear/disable or disable/enable, results are undefined.
61430 + */
61431 +typedef PREPACK struct {
61432 +    A_UINT32              set_mask;             /* pins to set */
61433 +    A_UINT32              clear_mask;           /* pins to clear */
61434 +    A_UINT32              enable_mask;          /* pins to enable for output */
61435 +    A_UINT32              disable_mask;         /* pins to disable/tristate */
61436 +} POSTPACK WMIX_GPIO_OUTPUT_SET_CMD;
61437 +
61438 +/*
61439 + * Set a GPIO register.  For debug/exceptional cases.
61440 + * Values for gpioreg_id are GPIO_REGISTER_IDs, defined in a
61441 + * platform-dependent header.
61442 + */
61443 +typedef PREPACK struct {
61444 +    A_UINT32              gpioreg_id;           /* GPIO register ID */
61445 +    A_UINT32              value;                /* value to write */
61446 +} POSTPACK WMIX_GPIO_REGISTER_SET_CMD;
61447 +
61448 +/* Get a GPIO register.  For debug/exceptional cases. */
61449 +typedef PREPACK struct {
61450 +    A_UINT32              gpioreg_id;           /* GPIO register to read */
61451 +} POSTPACK WMIX_GPIO_REGISTER_GET_CMD;
61452 +
61453 +/*
61454 + * Host acknowledges and re-arms GPIO interrupts.  A single
61455 + * message should be used to acknowledge all interrupts that
61456 + * were delivered in an earlier WMIX_GPIO_INTR_EVENT message.
61457 + */
61458 +typedef PREPACK struct {
61459 +    A_UINT32              ack_mask;             /* interrupts to acknowledge */
61460 +} POSTPACK WMIX_GPIO_INTR_ACK_CMD;
61461 +
61462 +/*
61463 + * Target informs Host of GPIO interrupts that have ocurred since the
61464 + * last WMIX_GIPO_INTR_ACK_CMD was received.  Additional information --
61465 + * the current GPIO input values is provided -- in order to support
61466 + * use of a GPIO interrupt as a Data Valid signal for other GPIO pins.
61467 + */
61468 +typedef PREPACK struct {
61469 +    A_UINT32              intr_mask;            /* pending GPIO interrupts */
61470 +    A_UINT32              input_values;         /* recent GPIO input values */
61471 +} POSTPACK WMIX_GPIO_INTR_EVENT;
61472 +
61473 +/*
61474 + * Target responds to Host's earlier WMIX_GPIO_INPUT_GET_CMDID request
61475 + * using a GPIO_DATA_EVENT with
61476 + *   value set to the mask of GPIO pin inputs and
61477 + *   reg_id set to GPIO_ID_NONE
61478 + *
61479 + *
61480 + * Target responds to Hosts's earlier WMIX_GPIO_REGISTER_GET_CMDID request
61481 + * using a GPIO_DATA_EVENT with
61482 + *   value set to the value of the requested register and
61483 + *   reg_id identifying the register (reflects the original request)
61484 + * NB: reg_id supports the future possibility of unsolicited
61485 + * WMIX_GPIO_DATA_EVENTs (for polling GPIO input), and it may
61486 + * simplify Host GPIO support.
61487 + */
61488 +typedef PREPACK struct {
61489 +    A_UINT32              value;
61490 +    A_UINT32              reg_id;
61491 +} POSTPACK WMIX_GPIO_DATA_EVENT;
61492 +
61493 +/*
61494 + * =============Error Detection support=================
61495 + */
61496 +
61497 +/*
61498 + * WMIX_HB_CHALLENGE_RESP_CMDID
61499 + * Heartbeat Challenge Response command
61500 + */
61501 +typedef PREPACK struct {
61502 +    A_UINT32              cookie;
61503 +    A_UINT32              source;
61504 +} POSTPACK WMIX_HB_CHALLENGE_RESP_CMD;
61505 +
61506 +/*
61507 + * WMIX_HB_CHALLENGE_RESP_EVENTID
61508 + * Heartbeat Challenge Response Event
61509 + */
61510 +#define WMIX_HB_CHALLENGE_RESP_EVENT WMIX_HB_CHALLENGE_RESP_CMD
61511 +
61512 +typedef PREPACK struct {
61513 +    struct dbglog_config_s config;
61514 +} POSTPACK WMIX_DBGLOG_CFG_MODULE_CMD;
61515 +
61516 +#ifndef ATH_TARGET
61517 +#include "athendpack.h"
61518 +#endif
61519 +
61520 +#ifdef __cplusplus
61521 +}
61522 +#endif
61523 +
61524 +#endif /* _WMIX_H_ */
61525 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/Makefile
61526 ===================================================================
61527 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
61528 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/Makefile   2008-12-11 22:46:49.000000000 +0100
61529 @@ -0,0 +1,38 @@
61530 +REV ?= 2
61531 +
61532 +PWD := $(shell pwd)
61533 +
61534 +EXTRA_CFLAGS += -I$(src)/include
61535 +
61536 +EXTRA_CFLAGS += -DLINUX -D__KERNEL__ -DHTC_RAW_INTERFACE\
61537 +                -DTCMD -DUSER_KEYS \
61538 +                -DNO_SYNC_FLUSH #\
61539 +                -DMULTIPLE_FRAMES_PER_INTERRUPT -DAR6000REV$(REV) \
61540 +                -DBLOCK_TX_PATH_FLAG \
61541 +               -DSDIO \
61542 +
61543 +EXTRA_CFLAGS += -DKERNEL_2_6
61544 +
61545 +obj-$(CONFIG_SDIO_AR6000_WLAN) += ar6000.o
61546 +
61547 +ar6000-objs += htc/ar6k.o                         \
61548 +              htc/ar6k_events.o           \
61549 +               htc/htc_send.o             \
61550 +               htc/htc_recv.o             \
61551 +               htc/htc_services.o          \
61552 +               htc/htc.o                  \
61553 +               hif/hif.o                  \
61554 +               bmi/bmi.o                   \
61555 +               ar6000/ar6000_drv.o         \
61556 +               ar6000/ar6000_raw_if.o     \
61557 +               ar6000/netbuf.o            \
61558 +               ar6000/wireless_ext.o      \
61559 +               ar6000/ioctl.o             \
61560 +               miscdrv/common_drv.o       \
61561 +               miscdrv/credit_dist.o      \
61562 +               wmi/wmi.o                   \
61563 +               wlan/wlan_node.o            \
61564 +               wlan/wlan_recv_beacon.o     \
61565 +               wlan/wlan_utils.o
61566 +
61567 +
61568 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c
61569 ===================================================================
61570 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
61571 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/common_drv.c       2008-12-11 22:46:49.000000000 +0100
61572 @@ -0,0 +1,467 @@
61573 +
61574 +/*
61575 + *
61576 + * Copyright (c) 2004-2007 Atheros Communications Inc.
61577 + * All rights reserved.
61578 + *
61579 + *
61580 + *  This program is free software; you can redistribute it and/or modify
61581 + *  it under the terms of the GNU General Public License version 2 as
61582 + *  published by the Free Software Foundation;
61583 + *
61584 + *  Software distributed under the License is distributed on an "AS
61585 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
61586 + *  implied. See the License for the specific language governing
61587 + *  rights and limitations under the License.
61588 + *
61589 + *
61590 + *
61591 + */
61592 +
61593 +#include "a_config.h"
61594 +#include "athdefs.h"
61595 +#include "a_types.h"
61596 +#include "AR6Khwreg.h"
61597 +#include "targaddrs.h"
61598 +#include "a_osapi.h"
61599 +#include "hif.h"
61600 +#include "htc_api.h"
61601 +#include "bmi.h"
61602 +#include "bmi_msg.h"
61603 +#include "common_drv.h"
61604 +#include "a_debug.h"
61605 +#include "targaddrs.h"
61606 +
61607 +#define HOST_INTEREST_ITEM_ADDRESS(target, item)    \
61608 +(((TargetType) == TARGET_TYPE_AR6001) ?     \
61609 +   AR6001_HOST_INTEREST_ITEM_ADDRESS(item) :    \
61610 +   AR6002_HOST_INTEREST_ITEM_ADDRESS(item))
61611 +
61612 +
61613 +/* Compile the 4BYTE version of the window register setup routine,
61614 + * This mitigates host interconnect issues with non-4byte aligned bus requests, some
61615 + * interconnects use bus adapters that impose strict limitations.
61616 + * Since diag window access is not intended for performance critical operations, the 4byte mode should
61617 + * be satisfactory even though it generates 4X the bus activity. */
61618 +
61619 +#ifdef USE_4BYTE_REGISTER_ACCESS
61620 +
61621 +    /* set the window address register (using 4-byte register access ). */
61622 +A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address)
61623 +{
61624 +    A_STATUS status;
61625 +    A_UINT8 addrValue[4];
61626 +    int i;
61627 +
61628 +        /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written
61629 +         * last to initiate the access cycle */
61630 +
61631 +    for (i = 1; i <= 3; i++) {
61632 +            /* fill the buffer with the address byte value we want to hit 4 times*/
61633 +        addrValue[0] = ((A_UINT8 *)&Address)[i];
61634 +        addrValue[1] = addrValue[0];
61635 +        addrValue[2] = addrValue[0];
61636 +        addrValue[3] = addrValue[0];
61637 +
61638 +            /* hit each byte of the register address with a 4-byte write operation to the same address,
61639 +             * this is a harmless operation */
61640 +        status = HIFReadWrite(hifDevice,
61641 +                              RegisterAddr+i,
61642 +                              addrValue,
61643 +                              4,
61644 +                              HIF_WR_SYNC_BYTE_FIX,
61645 +                              NULL);
61646 +        if (status != A_OK) {
61647 +            break;
61648 +        }
61649 +    }
61650 +
61651 +    if (status != A_OK) {
61652 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n",
61653 +             RegisterAddr, Address));
61654 +        return status;
61655 +    }
61656 +
61657 +        /* write the address register again, this time write the whole 4-byte value.
61658 +         * The effect here is that the LSB write causes the cycle to start, the extra
61659 +         * 3 byte write to bytes 1,2,3 has no effect since we are writing the same values again */
61660 +    status = HIFReadWrite(hifDevice,
61661 +                          RegisterAddr,
61662 +                          (A_UCHAR *)(&Address),
61663 +                          4,
61664 +                          HIF_WR_SYNC_BYTE_INC,
61665 +                          NULL);
61666 +
61667 +    if (status != A_OK) {
61668 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n",
61669 +            RegisterAddr, Address));
61670 +        return status;
61671 +    }
61672 +
61673 +    return A_OK;
61674 +
61675 +
61676 +
61677 +}
61678 +
61679 +
61680 +#else
61681 +
61682 +    /* set the window address register */
61683 +A_STATUS ar6000_SetAddressWindowRegister(HIF_DEVICE *hifDevice, A_UINT32 RegisterAddr, A_UINT32 Address)
61684 +{
61685 +    A_STATUS status;
61686 +
61687 +        /* write bytes 1,2,3 of the register to set the upper address bytes, the LSB is written
61688 +         * last to initiate the access cycle */
61689 +    status = HIFReadWrite(hifDevice,
61690 +                          RegisterAddr+1,  /* write upper 3 bytes */
61691 +                          ((A_UCHAR *)(&Address))+1,
61692 +                          sizeof(A_UINT32)-1,
61693 +                          HIF_WR_SYNC_BYTE_INC,
61694 +                          NULL);
61695 +
61696 +    if (status != A_OK) {
61697 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write initial bytes of 0x%x to window reg: 0x%X \n",
61698 +             RegisterAddr, Address));
61699 +        return status;
61700 +    }
61701 +
61702 +        /* write the LSB of the register, this initiates the operation */
61703 +    status = HIFReadWrite(hifDevice,
61704 +                          RegisterAddr,
61705 +                          (A_UCHAR *)(&Address),
61706 +                          sizeof(A_UINT8),
61707 +                          HIF_WR_SYNC_BYTE_INC,
61708 +                          NULL);
61709 +
61710 +    if (status != A_OK) {
61711 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to window reg: 0x%X \n",
61712 +            RegisterAddr, Address));
61713 +        return status;
61714 +    }
61715 +
61716 +    return A_OK;
61717 +}
61718 +
61719 +#endif
61720 +
61721 +/*
61722 + * Read from the AR6000 through its diagnostic window.
61723 + * No cooperation from the Target is required for this.
61724 + */
61725 +A_STATUS
61726 +ar6000_ReadRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data)
61727 +{
61728 +    A_STATUS status;
61729 +
61730 +        /* set window register to start read cycle */
61731 +    status = ar6000_SetAddressWindowRegister(hifDevice,
61732 +                                             WINDOW_READ_ADDR_ADDRESS,
61733 +                                             *address);
61734 +
61735 +    if (status != A_OK) {
61736 +        return status;
61737 +    }
61738 +
61739 +        /* read the data */
61740 +    status = HIFReadWrite(hifDevice,
61741 +                          WINDOW_DATA_ADDRESS,
61742 +                          (A_UCHAR *)data,
61743 +                          sizeof(A_UINT32),
61744 +                          HIF_RD_SYNC_BYTE_INC,
61745 +                          NULL);
61746 +    if (status != A_OK) {
61747 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot read from WINDOW_DATA_ADDRESS\n"));
61748 +        return status;
61749 +    }
61750 +
61751 +    return status;
61752 +}
61753 +
61754 +
61755 +/*
61756 + * Write to the AR6000 through its diagnostic window.
61757 + * No cooperation from the Target is required for this.
61758 + */
61759 +A_STATUS
61760 +ar6000_WriteRegDiag(HIF_DEVICE *hifDevice, A_UINT32 *address, A_UINT32 *data)
61761 +{
61762 +    A_STATUS status;
61763 +
61764 +        /* set write data */
61765 +    status = HIFReadWrite(hifDevice,
61766 +                          WINDOW_DATA_ADDRESS,
61767 +                          (A_UCHAR *)data,
61768 +                          sizeof(A_UINT32),
61769 +                          HIF_WR_SYNC_BYTE_INC,
61770 +                          NULL);
61771 +    if (status != A_OK) {
61772 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot write 0x%x to WINDOW_DATA_ADDRESS\n", *data));
61773 +        return status;
61774 +    }
61775 +
61776 +        /* set window register, which starts the write cycle */
61777 +    return ar6000_SetAddressWindowRegister(hifDevice,
61778 +                                           WINDOW_WRITE_ADDR_ADDRESS,
61779 +                                           *address);
61780 +}
61781 +
61782 +A_STATUS
61783 +ar6000_ReadDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
61784 +                    A_UCHAR *data, A_UINT32 length)
61785 +{
61786 +    A_UINT32 count;
61787 +    A_STATUS status = A_OK;
61788 +
61789 +    for (count = 0; count < length; count += 4, address += 4) {
61790 +        if ((status = ar6000_ReadRegDiag(hifDevice, &address,
61791 +                                         (A_UINT32 *)&data[count])) != A_OK)
61792 +        {
61793 +            break;
61794 +        }
61795 +    }
61796 +
61797 +    return status;
61798 +}
61799 +
61800 +A_STATUS
61801 +ar6000_WriteDataDiag(HIF_DEVICE *hifDevice, A_UINT32 address,
61802 +                     A_UCHAR *data, A_UINT32 length)
61803 +{
61804 +    A_UINT32 count;
61805 +    A_STATUS status = A_OK;
61806 +
61807 +    for (count = 0; count < length; count += 4, address += 4) {
61808 +        if ((status = ar6000_WriteRegDiag(hifDevice, &address,
61809 +                                          (A_UINT32 *)&data[count])) != A_OK)
61810 +        {
61811 +            break;
61812 +        }
61813 +    }
61814 +
61815 +    return status;
61816 +}
61817 +
61818 +A_STATUS
61819 +ar6000_reset_device_skipflash(HIF_DEVICE *hifDevice)
61820 +{
61821 +    int i;
61822 +    struct forceROM_s {
61823 +        A_UINT32 addr;
61824 +        A_UINT32 data;
61825 +    };
61826 +    struct forceROM_s *ForceROM;
61827 +    int szForceROM;
61828 +    A_UINT32 instruction;
61829 +
61830 +    static struct forceROM_s ForceROM_REV2[] = {
61831 +        /* NB: This works for old REV2 ROM (old). */
61832 +        {0x00001ff0, 0x175b0027}, /* jump instruction at 0xa0001ff0 */
61833 +        {0x00001ff4, 0x00000000}, /* nop instruction at 0xa0001ff4 */
61834 +
61835 +        {MC_REMAP_TARGET_ADDRESS, 0x00001ff0}, /* remap to 0xa0001ff0 */
61836 +        {MC_REMAP_COMPARE_ADDRESS, 0x01000040},/* ...from 0xbfc00040 */
61837 +        {MC_REMAP_SIZE_ADDRESS, 0x00000000},   /* ...1 cache line */
61838 +        {MC_REMAP_VALID_ADDRESS, 0x00000001},  /* ...remap is valid */
61839 +
61840 +        {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
61841 +
61842 +        {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
61843 +    };
61844 +
61845 +    static struct forceROM_s ForceROM_NEW[] = {
61846 +        /* NB: This works for AR6000 ROM REV3 and beyond.  */
61847 +        {LOCAL_SCRATCH_ADDRESS, AR6K_OPTION_IGNORE_FLASH},
61848 +        {LOCAL_COUNT_ADDRESS+0x10, 0}, /* clear BMI credit counter */
61849 +        {RESET_CONTROL_ADDRESS, RESET_CONTROL_WARM_RST_MASK},
61850 +    };
61851 +
61852 +    /*
61853 +     * Examine a semi-arbitrary instruction that's different
61854 +     * in REV2 and other revisions.
61855 +     * NB: If a Host port does not require simultaneous support
61856 +     * for multiple revisions of Target ROM, this code can be elided.
61857 +     */
61858 +    (void)ar6000_ReadDataDiag(hifDevice, 0x01000040,
61859 +                              (A_UCHAR *)&instruction, 4);
61860 +
61861 +    AR_DEBUG_PRINTF(ATH_LOG_ERR, ("instruction=0x%x\n", instruction));
61862 +
61863 +    if (instruction == 0x3c1aa200) {
61864 +        /* It's an old ROM */
61865 +        ForceROM = ForceROM_REV2;
61866 +        szForceROM = sizeof(ForceROM_REV2)/sizeof(*ForceROM);
61867 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using OLD method\n"));
61868 +    } else {
61869 +        ForceROM = ForceROM_NEW;
61870 +        szForceROM = sizeof(ForceROM_NEW)/sizeof(*ForceROM);
61871 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Using NEW method\n"));
61872 +    }
61873 +
61874 +    AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Force Target to execute from ROM....\n"));
61875 +    for (i = 0; i < szForceROM; i++)
61876 +    {
61877 +        if (ar6000_WriteRegDiag(hifDevice,
61878 +                                &ForceROM[i].addr,
61879 +                                &ForceROM[i].data) != A_OK)
61880 +        {
61881 +            AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Cannot force Target to execute ROM!\n"));
61882 +            return A_ERROR;
61883 +        }
61884 +    }
61885 +
61886 +    A_MDELAY(50); /* delay to allow dragon to come to BMI phase  */
61887 +    return A_OK;
61888 +}
61889 +
61890 +/* reset device */
61891 +A_STATUS ar6000_reset_device(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
61892 +{
61893 +
61894 +#if !defined(DWSIM)
61895 +    A_STATUS status = A_OK;
61896 +    A_UINT32 address;
61897 +    A_UINT32 data;
61898 +
61899 +    do {
61900 +
61901 +        // address = RESET_CONTROL_ADDRESS;
61902 +        data = RESET_CONTROL_COLD_RST_MASK;
61903 +
61904 +          /* Hardcode the address of RESET_CONTROL_ADDRESS based on the target type */
61905 +        if (TargetType == TARGET_TYPE_AR6001) {
61906 +            address = 0x0C000000;
61907 +        } else {
61908 +            if (TargetType == TARGET_TYPE_AR6002) {
61909 +                address = 0x00004000;
61910 +            } else {
61911 +                A_ASSERT(0);
61912 +            }
61913 +        }
61914 +
61915 +        status = ar6000_WriteRegDiag(hifDevice, &address, &data);
61916 +
61917 +        if (A_FAILED(status)) {
61918 +            break;
61919 +        }
61920 +
61921 +        /*
61922 +         * Read back the RESET CAUSE register to ensure that the cold reset
61923 +         * went through.
61924 +         */
61925 +        A_MDELAY(2000); /* 2 second delay to allow things to settle down */
61926 +
61927 +
61928 +        // address = RESET_CAUSE_ADDRESS;
61929 +        /* Hardcode the address of RESET_CAUSE_ADDRESS based on the target type */
61930 +        if (TargetType == TARGET_TYPE_AR6001) {
61931 +            address = 0x0C0000CC;
61932 +        } else {
61933 +            if (TargetType == TARGET_TYPE_AR6002) {
61934 +                address = 0x000040C0;
61935 +            } else {
61936 +                A_ASSERT(0);
61937 +            }
61938 +        }
61939 +
61940 +        data = 0;
61941 +        status = ar6000_ReadRegDiag(hifDevice, &address, &data);
61942 +
61943 +        if (A_FAILED(status)) {
61944 +            break;
61945 +        }
61946 +
61947 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Reset Cause readback: 0x%X \n",data));
61948 +        data &= RESET_CAUSE_LAST_MASK;
61949 +        if (data != 2) {
61950 +            AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Unable to cold reset the target \n"));
61951 +        }
61952 +
61953 +    } while (FALSE);
61954 +
61955 +    if (A_FAILED(status)) {
61956 +        AR_DEBUG_PRINTF(ATH_LOG_ERR, ("Failed to reset target \n"));
61957 +    }
61958 +#endif
61959 +    return A_OK;
61960 +}
61961 +
61962 +#define REG_DUMP_COUNT_AR6001   38  /* WORDs, derived from AR6001_regdump.h */
61963 +#define REG_DUMP_COUNT_AR6002   32  /* WORDs, derived from AR6002_regdump.h */
61964 +
61965 +
61966 +#if REG_DUMP_COUNT_AR6001 <= REG_DUMP_COUNT_AR6002
61967 +#define REGISTER_DUMP_LEN_MAX  REG_DUMP_COUNT_AR6002
61968 +#else
61969 +#define REGISTER_DUMP_LEN_MAX  REG_DUMP_COUNT_AR6001
61970 +#endif
61971 +
61972 +void ar6000_dump_target_assert_info(HIF_DEVICE *hifDevice, A_UINT32 TargetType)
61973 +{
61974 +    A_UINT32 address;
61975 +    A_UINT32 regDumpArea = 0;
61976 +    A_STATUS status;
61977 +    A_UINT32 regDumpValues[REGISTER_DUMP_LEN_MAX];
61978 +    A_UINT32 regDumpCount = 0;
61979 +    A_UINT32 i;
61980 +
61981 +    do {
61982 +
61983 +            /* the reg dump pointer is copied to the host interest area */
61984 +        address = HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_failure_state);
61985 +
61986 +        if (TargetType == TARGET_TYPE_AR6001) {
61987 +                /* for AR6001, this is a fixed location because the ptr is actually stuck in cache,
61988 +                 * this may be fixed in later firmware versions */
61989 +            address = 0x18a0;
61990 +            regDumpCount = REG_DUMP_COUNT_AR6001;
61991 +
61992 +        } else  if (TargetType == TARGET_TYPE_AR6002) {
61993 +
61994 +            regDumpCount = REG_DUMP_COUNT_AR6002;
61995 +
61996 +        } else {
61997 +            A_ASSERT(0);
61998 +        }
61999 +
62000 +            /* read RAM location through diagnostic window */
62001 +        status = ar6000_ReadRegDiag(hifDevice, &address, &regDumpArea);
62002 +
62003 +        if (A_FAILED(status)) {
62004 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get ptr to register dump area \n"));
62005 +            break;
62006 +        }
62007 +
62008 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Location of register dump data: 0x%X \n",regDumpArea));
62009 +
62010 +        if (regDumpArea == 0) {
62011 +                /* no reg dump */
62012 +            break;
62013 +        }
62014 +
62015 +        if (TargetType == TARGET_TYPE_AR6001) {
62016 +            regDumpArea &= 0x0FFFFFFF;  /* convert to physical address in target memory */
62017 +        }
62018 +
62019 +            /* fetch register dump data */
62020 +        status = ar6000_ReadDataDiag(hifDevice,
62021 +                                     regDumpArea,
62022 +                                     (A_UCHAR *)&regDumpValues[0],
62023 +                                     regDumpCount * (sizeof(A_UINT32)));
62024 +
62025 +        if (A_FAILED(status)) {
62026 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Failed to get register dump \n"));
62027 +            break;
62028 +        }
62029 +
62030 +        AR_DEBUG_PRINTF(ATH_DEBUG_ERR,("AR6K: Register Dump: \n"));
62031 +
62032 +        for (i = 0; i < regDumpCount; i++) {
62033 +            AR_DEBUG_PRINTF(ATH_DEBUG_ERR,(" %d :  0x%8.8X \n",i, regDumpValues[i]));
62034 +        }
62035 +
62036 +    } while (FALSE);
62037 +
62038 +}
62039 +
62040 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c
62041 ===================================================================
62042 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
62043 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/miscdrv/credit_dist.c      2008-12-11 22:46:49.000000000 +0100
62044 @@ -0,0 +1,346 @@
62045 +
62046 +/*
62047 + *
62048 + * Copyright (c) 2004-2007 Atheros Communications Inc.
62049 + * All rights reserved.
62050 + *
62051 + *
62052 + *  This program is free software; you can redistribute it and/or modify
62053 + *  it under the terms of the GNU General Public License version 2 as
62054 + *  published by the Free Software Foundation;
62055 + *
62056 + *  Software distributed under the License is distributed on an "AS
62057 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
62058 + *  implied. See the License for the specific language governing
62059 + *  rights and limitations under the License.
62060 + *
62061 + *
62062 + *
62063 + */
62064 +
62065 +#include "a_config.h"
62066 +#include "athdefs.h"
62067 +#include "a_types.h"
62068 +#include "a_osapi.h"
62069 +#include "a_debug.h"
62070 +#include "htc_api.h"
62071 +#include "common_drv.h"
62072 +
62073 +/********* CREDIT DISTRIBUTION FUNCTIONS ******************************************/
62074 +
62075 +#define NO_VO_SERVICE 1 /* currently WMI only uses 3 data streams, so we leave VO service inactive */
62076 +
62077 +#ifdef NO_VO_SERVICE
62078 +#define DATA_SVCS_USED 3
62079 +#else
62080 +#define DATA_SVCS_USED 4
62081 +#endif
62082 +
62083 +static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
62084 +                                HTC_ENDPOINT_CREDIT_DIST *pEPDistList);
62085 +
62086 +static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
62087 +                        HTC_ENDPOINT_CREDIT_DIST *pEPDistList);
62088 +
62089 +/* reduce an ep's credits back to a set limit */
62090 +static INLINE void ReduceCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
62091 +                                HTC_ENDPOINT_CREDIT_DIST  *pEpDist,
62092 +                                int                       Limit)
62093 +{
62094 +    int credits;
62095 +
62096 +        /* set the new limit */
62097 +    pEpDist->TxCreditsAssigned = Limit;
62098 +
62099 +    if (pEpDist->TxCredits <= Limit) {
62100 +        return;
62101 +    }
62102 +
62103 +        /* figure out how much to take away */
62104 +    credits = pEpDist->TxCredits - Limit;
62105 +        /* take them away */
62106 +    pEpDist->TxCredits -= credits;
62107 +    pCredInfo->CurrentFreeCredits += credits;
62108 +}
62109 +
62110 +/* give an endpoint some credits from the free credit pool */
62111 +#define GiveCredits(pCredInfo,pEpDist,credits)      \
62112 +{                                                   \
62113 +    (pEpDist)->TxCredits += (credits);              \
62114 +    (pEpDist)->TxCreditsAssigned += (credits);      \
62115 +    (pCredInfo)->CurrentFreeCredits -= (credits);   \
62116 +}
62117 +
62118 +
62119 +/* default credit init callback.
62120 + * This function is called in the context of HTCStart() to setup initial (application-specific)
62121 + * credit distributions */
62122 +static void ar6000_credit_init(void                     *Context,
62123 +                               HTC_ENDPOINT_CREDIT_DIST *pEPList,
62124 +                               int                      TotalCredits)
62125 +{
62126 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
62127 +    int                      count;
62128 +    COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context;
62129 +
62130 +    pCredInfo->CurrentFreeCredits = TotalCredits;
62131 +    pCredInfo->TotalAvailableCredits = TotalCredits;
62132 +
62133 +    pCurEpDist = pEPList;
62134 +
62135 +        /* run through the list and initialize */
62136 +    while (pCurEpDist != NULL) {
62137 +
62138 +            /* set minimums for each endpoint */
62139 +        pCurEpDist->TxCreditsMin = pCurEpDist->TxCreditsPerMaxMsg;
62140 +
62141 +        if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) {
62142 +                /* give control service some credits */
62143 +            GiveCredits(pCredInfo,pCurEpDist,pCurEpDist->TxCreditsMin);
62144 +                /* control service is always marked active, it never goes inactive EVER */
62145 +            SET_EP_ACTIVE(pCurEpDist);
62146 +        } else if (pCurEpDist->ServiceID == WMI_DATA_BK_SVC) {
62147 +                /* this is the lowest priority data endpoint, save this off for easy access */
62148 +            pCredInfo->pLowestPriEpDist = pCurEpDist;
62149 +        }
62150 +
62151 +        /* Streams have to be created (explicit | implicit)for all kinds
62152 +         * of traffic. BE endpoints are also inactive in the beginning.
62153 +         * When BE traffic starts it creates implicit streams that
62154 +         * redistributes credits.
62155 +         */
62156 +
62157 +        /* note, all other endpoints have minimums set but are initially given NO credits.
62158 +         * Credits will be distributed as traffic activity demands */
62159 +        pCurEpDist = pCurEpDist->pNext;
62160 +    }
62161 +
62162 +    if (pCredInfo->CurrentFreeCredits <= 0) {
62163 +        AR_DEBUG_PRINTF(ATH_LOG_INF, ("Not enough credits (%d) to do credit distributions \n", TotalCredits));
62164 +        A_ASSERT(FALSE);
62165 +        return;
62166 +    }
62167 +
62168 +        /* reset list */
62169 +    pCurEpDist = pEPList;
62170 +        /* now run through the list and set max operating credit limits for everyone */
62171 +    while (pCurEpDist != NULL) {
62172 +        if (pCurEpDist->ServiceID == WMI_CONTROL_SVC) {
62173 +                /* control service max is just 1 max message */
62174 +            pCurEpDist->TxCreditsNorm = pCurEpDist->TxCreditsPerMaxMsg;
62175 +        } else {
62176 +                /* for the remaining data endpoints, we assume that each TxCreditsPerMaxMsg are
62177 +                 * the same.
62178 +                 * We use a simple calculation here, we take the remaining credits and
62179 +                 * determine how many max messages this can cover and then set each endpoint's
62180 +                 * normal value equal to half this amount.
62181 +                 * */
62182 +            count = (pCredInfo->CurrentFreeCredits/pCurEpDist->TxCreditsPerMaxMsg) * pCurEpDist->TxCreditsPerMaxMsg;
62183 +            count = count >> 1;
62184 +            count = max(count,pCurEpDist->TxCreditsPerMaxMsg);
62185 +                /* set normal */
62186 +            pCurEpDist->TxCreditsNorm = count;
62187 +
62188 +        }
62189 +        pCurEpDist = pCurEpDist->pNext;
62190 +    }
62191 +
62192 +}
62193 +
62194 +
62195 +/* default credit distribution callback
62196 + * This callback is invoked whenever endpoints require credit distributions.
62197 + * A lock is held while this function is invoked, this function shall NOT block.
62198 + * The pEPDistList is a list of distribution structures in prioritized order as
62199 + * defined by the call to the HTCSetCreditDistribution() api.
62200 + *
62201 + */
62202 +static void ar6000_credit_distribute(void                     *Context,
62203 +                                     HTC_ENDPOINT_CREDIT_DIST *pEPDistList,
62204 +                                     HTC_CREDIT_DIST_REASON   Reason)
62205 +{
62206 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
62207 +    COMMON_CREDIT_STATE_INFO *pCredInfo = (COMMON_CREDIT_STATE_INFO *)Context;
62208 +
62209 +    switch (Reason) {
62210 +        case HTC_CREDIT_DIST_SEND_COMPLETE :
62211 +            pCurEpDist = pEPDistList;
62212 +                /* we are given the start of the endpoint distribution list.
62213 +                 * There may be one or more endpoints to service.
62214 +                 * Run through the list and distribute credits */
62215 +            while (pCurEpDist != NULL) {
62216 +
62217 +                if (pCurEpDist->TxCreditsToDist > 0) {
62218 +                        /* return the credits back to the endpoint */
62219 +                    pCurEpDist->TxCredits += pCurEpDist->TxCreditsToDist;
62220 +                        /* always zero out when we are done */
62221 +                    pCurEpDist->TxCreditsToDist = 0;
62222 +
62223 +                    if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsAssigned) {
62224 +                            /* reduce to the assigned limit, previous credit reductions
62225 +                             * could have caused the limit to change */
62226 +                        ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsAssigned);
62227 +                    }
62228 +
62229 +                    if (pCurEpDist->TxCredits > pCurEpDist->TxCreditsNorm) {
62230 +                            /* oversubscribed endpoints need to reduce back to normal */
62231 +                        ReduceCredits(pCredInfo, pCurEpDist, pCurEpDist->TxCreditsNorm);
62232 +                    }
62233 +                }
62234 +
62235 +                pCurEpDist = pCurEpDist->pNext;
62236 +            }
62237 +
62238 +            A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits);
62239 +
62240 +            break;
62241 +
62242 +        case HTC_CREDIT_DIST_ACTIVITY_CHANGE :
62243 +            RedistributeCredits(pCredInfo,pEPDistList);
62244 +            break;
62245 +        case HTC_CREDIT_DIST_SEEK_CREDITS :
62246 +            SeekCredits(pCredInfo,pEPDistList);
62247 +            break;
62248 +        case HTC_DUMP_CREDIT_STATE :
62249 +            AR_DEBUG_PRINTF(ATH_LOG_INF, ("Credit Distribution, total : %d, free : %d\n",
62250 +                                                                       pCredInfo->TotalAvailableCredits, pCredInfo->CurrentFreeCredits));
62251 +            break;
62252 +        default:
62253 +            break;
62254 +
62255 +    }
62256 +
62257 +}
62258 +
62259 +/* redistribute credits based on activity change */
62260 +static void RedistributeCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
62261 +                                HTC_ENDPOINT_CREDIT_DIST *pEPDistList)
62262 +{
62263 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist = pEPDistList;
62264 +
62265 +        /* walk through the list and remove credits from inactive endpoints */
62266 +    while (pCurEpDist != NULL) {
62267 +
62268 +        if (pCurEpDist->ServiceID != WMI_CONTROL_SVC) {
62269 +            if (!IS_EP_ACTIVE(pCurEpDist)) {
62270 +                    /* EP is inactive, reduce credits back to zero */
62271 +                ReduceCredits(pCredInfo, pCurEpDist, 0);
62272 +            }
62273 +        }
62274 +
62275 +        /* NOTE in the active case, we do not need to do anything further,
62276 +         * when an EP goes active and needs credits, HTC will call into
62277 +         * our distribution function using a reason code of HTC_CREDIT_DIST_SEEK_CREDITS  */
62278 +
62279 +        pCurEpDist = pCurEpDist->pNext;
62280 +    }
62281 +
62282 +    A_ASSERT(pCredInfo->CurrentFreeCredits <= pCredInfo->TotalAvailableCredits);
62283 +
62284 +}
62285 +
62286 +/* HTC has an endpoint that needs credits, pEPDist is the endpoint in question */
62287 +static void SeekCredits(COMMON_CREDIT_STATE_INFO *pCredInfo,
62288 +                        HTC_ENDPOINT_CREDIT_DIST *pEPDist)
62289 +{
62290 +    HTC_ENDPOINT_CREDIT_DIST *pCurEpDist;
62291 +    int                      credits = 0;
62292 +    int                      need;
62293 +
62294 +    do {
62295 +
62296 +        if (pEPDist->ServiceID == WMI_CONTROL_SVC) {
62297 +                /* we never oversubscribe on the control service, this is not
62298 +                 * a high performance path and the target never holds onto control
62299 +                 * credits for too long */
62300 +            break;
62301 +        }
62302 +
62303 +        /* for all other services, we follow a simple algorithm of
62304 +         * 1. checking the free pool for credits
62305 +         * 2. checking lower priority endpoints for credits to take */
62306 +
62307 +        if (pCredInfo->CurrentFreeCredits >= 2 * pEPDist->TxCreditsSeek) {
62308 +                /* try to give more credits than it needs */
62309 +            credits = 2 * pEPDist->TxCreditsSeek;
62310 +        } else {
62311 +                /* give what we can */
62312 +            credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek);
62313 +        }
62314 +
62315 +        if (credits >= pEPDist->TxCreditsSeek) {
62316 +                /* we found some to fullfill the seek request */
62317 +            break;
62318 +        }
62319 +
62320 +        /* we don't have enough in the free pool, try taking away from lower priority services
62321 +         *
62322 +         * The rule for taking away credits:
62323 +         *   1. Only take from lower priority endpoints
62324 +         *   2. Only take what is allocated above the minimum (never starve an endpoint completely)
62325 +         *   3. Only take what you need.
62326 +         *
62327 +         * */
62328 +
62329 +            /* starting at the lowest priority */
62330 +        pCurEpDist = pCredInfo->pLowestPriEpDist;
62331 +
62332 +            /* work backwards until we hit the endpoint again */
62333 +        while (pCurEpDist != pEPDist) {
62334 +                /* calculate how many we need so far */
62335 +            need = pEPDist->TxCreditsSeek - pCredInfo->CurrentFreeCredits;
62336 +
62337 +            if ((pCurEpDist->TxCreditsAssigned - need) > pCurEpDist->TxCreditsMin) {
62338 +                    /* the current one has been allocated more than it's minimum and it
62339 +                     * has enough credits assigned above it's minimum to fullfill our need
62340 +                     * try to take away just enough to fullfill our need */
62341 +                ReduceCredits(pCredInfo,
62342 +                              pCurEpDist,
62343 +                              pCurEpDist->TxCreditsAssigned - need);
62344 +
62345 +                if (pCredInfo->CurrentFreeCredits >= pEPDist->TxCreditsSeek) {
62346 +                        /* we have enough */
62347 +                    break;
62348 +                }
62349 +            }
62350 +
62351 +            pCurEpDist = pCurEpDist->pPrev;
62352 +        }
62353 +
62354 +            /* return what we can get */
62355 +        credits = min(pCredInfo->CurrentFreeCredits,pEPDist->TxCreditsSeek);
62356 +
62357 +    } while (FALSE);
62358 +
62359 +        /* did we find some credits? */
62360 +    if (credits) {
62361 +            /* give what we can */
62362 +        GiveCredits(pCredInfo, pEPDist, credits);
62363 +    }
62364 +
62365 +}
62366 +
62367 +/* initialize and setup credit distribution */
62368 +A_STATUS ar6000_setup_credit_dist(HTC_HANDLE HTCHandle, COMMON_CREDIT_STATE_INFO *pCredInfo)
62369 +{
62370 +    HTC_SERVICE_ID servicepriority[5];
62371 +
62372 +    A_MEMZERO(pCredInfo,sizeof(COMMON_CREDIT_STATE_INFO));
62373 +
62374 +    servicepriority[0] = WMI_CONTROL_SVC;  /* highest */
62375 +    servicepriority[1] = WMI_DATA_VO_SVC;
62376 +    servicepriority[2] = WMI_DATA_VI_SVC;
62377 +    servicepriority[3] = WMI_DATA_BE_SVC;
62378 +    servicepriority[4] = WMI_DATA_BK_SVC; /* lowest */
62379 +
62380 +        /* set callbacks and priority list */
62381 +    HTCSetCreditDistribution(HTCHandle,
62382 +                             pCredInfo,
62383 +                             ar6000_credit_distribute,
62384 +                             ar6000_credit_init,
62385 +                             servicepriority,
62386 +                             5);
62387 +
62388 +    return A_OK;
62389 +}
62390 +
62391 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c
62392 ===================================================================
62393 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
62394 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_node.c   2008-12-11 22:46:49.000000000 +0100
62395 @@ -0,0 +1,371 @@
62396 +/*-
62397 + * Copyright (c) 2001 Atsushi Onoe
62398 + * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
62399 + * Copyright (c) 2004-2005 Atheros Communications
62400 + * All rights reserved.
62401 + *
62402 + * Redistribution and use in source and binary forms, with or without
62403 + * modification, are permitted provided that the following conditions
62404 + * are met:
62405 + * 1. Redistributions of source code must retain the above copyright
62406 + *    notice, this list of conditions and the following disclaimer.
62407 + * 2. Redistributions in binary form must reproduce the above copyright
62408 + *    notice, this list of conditions and the following disclaimer in the
62409 + *    documentation and/or other materials provided with the distribution.
62410 + * 3. The name of the author may not be used to endorse or promote products
62411 + *    derived from this software without specific prior written permission.
62412 + *
62413 + * Alternatively, this software may be distributed under the terms of the
62414 + * GNU General Public License ("GPL") version 2 as published by the Free
62415 + * Software Foundation.
62416 + *
62417 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
62418 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
62419 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62420 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62421 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62422 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62423 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62424 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62425 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62426 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62427 + *
62428 + * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_node.c#1 $
62429 + */
62430 +/*
62431 + * IEEE 802.11 node handling support.
62432 + */
62433 +#include <a_config.h>
62434 +#include <athdefs.h>
62435 +#include <a_types.h>
62436 +#include <a_osapi.h>
62437 +#include <a_debug.h>
62438 +#include <ieee80211.h>
62439 +#include <wlan_api.h>
62440 +#include <ieee80211_node.h>
62441 +#include <htc_api.h>
62442 +#include <wmi.h>
62443 +#include <wmi_api.h>
62444 +
62445 +static void wlan_node_timeout(A_ATH_TIMER arg);
62446 +static bss_t * _ieee80211_find_node(struct ieee80211_node_table *nt,
62447 +                                    const A_UINT8 *macaddr);
62448 +
62449 +bss_t *
62450 +wlan_node_alloc(struct ieee80211_node_table *nt, int wh_size)
62451 +{
62452 +    bss_t *ni;
62453 +
62454 +    ni = A_MALLOC_NOWAIT(sizeof(bss_t));
62455 +
62456 +    if (ni != NULL) {
62457 +        ni->ni_buf = A_MALLOC_NOWAIT(wh_size);
62458 +        if (ni->ni_buf == NULL) {
62459 +            A_FREE(ni);
62460 +            ni = NULL;
62461 +            return ni;
62462 +        }
62463 +    } else {
62464 +        return ni;
62465 +    }
62466 +
62467 +    /* Make sure our lists are clean */
62468 +    ni->ni_list_next = NULL;
62469 +    ni->ni_list_prev = NULL;
62470 +    ni->ni_hash_next = NULL;
62471 +    ni->ni_hash_prev = NULL;
62472 +
62473 +    //
62474 +    // ni_scangen never initialized before and during suspend/resume of winmobile, customer (LG/SEMCO) identified
62475 +    // that some junk has been stored in this, due to this scan list didn't properly updated
62476 +    //
62477 +    ni->ni_scangen      = 0;
62478 +
62479 +    return ni;
62480 +}
62481 +
62482 +void
62483 +wlan_node_free(bss_t *ni)
62484 +{
62485 +    if (ni->ni_buf != NULL) {
62486 +        A_FREE(ni->ni_buf);
62487 +    }
62488 +    A_FREE(ni);
62489 +}
62490 +
62491 +void
62492 +wlan_setup_node(struct ieee80211_node_table *nt, bss_t *ni,
62493 +                const A_UINT8 *macaddr)
62494 +{
62495 +    int hash;
62496 +
62497 +    A_MEMCPY(ni->ni_macaddr, macaddr, IEEE80211_ADDR_LEN);
62498 +    hash = IEEE80211_NODE_HASH(macaddr);
62499 +    ieee80211_node_initref(ni);     /* mark referenced */
62500 +
62501 +    ni->ni_tstamp = A_GET_MS(WLAN_NODE_INACT_TIMEOUT_MSEC);
62502 +    IEEE80211_NODE_LOCK_BH(nt);
62503 +
62504 +    /* Insert at the end of the node list */
62505 +    ni->ni_list_next = NULL;
62506 +    ni->ni_list_prev = nt->nt_node_last;
62507 +    if(nt->nt_node_last != NULL)
62508 +    {
62509 +        nt->nt_node_last->ni_list_next = ni;
62510 +    }
62511 +    nt->nt_node_last = ni;
62512 +    if(nt->nt_node_first == NULL)
62513 +    {
62514 +        nt->nt_node_first = ni;
62515 +    }
62516 +
62517 +    /* Insert into the hash list i.e. the bucket */
62518 +    if((ni->ni_hash_next = nt->nt_hash[hash]) != NULL)
62519 +    {
62520 +        nt->nt_hash[hash]->ni_hash_prev = ni;
62521 +    }
62522 +    ni->ni_hash_prev = NULL;
62523 +    nt->nt_hash[hash] = ni;
62524 +
62525 +    if (!nt->isTimerArmed) {
62526 +        A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0);
62527 +        nt->isTimerArmed = TRUE;
62528 +    }
62529 +
62530 +    IEEE80211_NODE_UNLOCK_BH(nt);
62531 +}
62532 +
62533 +static bss_t *
62534 +_ieee80211_find_node(struct ieee80211_node_table *nt,
62535 +    const A_UINT8 *macaddr)
62536 +{
62537 +    bss_t *ni;
62538 +    int hash;
62539 +
62540 +    IEEE80211_NODE_LOCK_ASSERT(nt);
62541 +
62542 +    hash = IEEE80211_NODE_HASH(macaddr);
62543 +    for(ni = nt->nt_hash[hash]; ni; ni = ni->ni_hash_next) {
62544 +        if (IEEE80211_ADDR_EQ(ni->ni_macaddr, macaddr)) {
62545 +            ieee80211_node_incref(ni);  /* mark referenced */
62546 +            return ni;
62547 +        }
62548 +    }
62549 +    return NULL;
62550 +}
62551 +
62552 +bss_t *
62553 +wlan_find_node(struct ieee80211_node_table *nt, const A_UINT8 *macaddr)
62554 +{
62555 +    bss_t *ni;
62556 +
62557 +    IEEE80211_NODE_LOCK(nt);
62558 +    ni = _ieee80211_find_node(nt, macaddr);
62559 +    IEEE80211_NODE_UNLOCK(nt);
62560 +    return ni;
62561 +}
62562 +
62563 +/*
62564 + * Reclaim a node.  If this is the last reference count then
62565 + * do the normal free work.  Otherwise remove it from the node
62566 + * table and mark it gone by clearing the back-reference.
62567 + */
62568 +void
62569 +wlan_node_reclaim(struct ieee80211_node_table *nt, bss_t *ni)
62570 +{
62571 +    IEEE80211_NODE_LOCK(nt);
62572 +
62573 +    if(ni->ni_list_prev == NULL)
62574 +    {
62575 +        /* First in list so fix the list head */
62576 +        nt->nt_node_first = ni->ni_list_next;
62577 +    }
62578 +    else
62579 +    {
62580 +        ni->ni_list_prev->ni_list_next = ni->ni_list_next;
62581 +    }
62582 +
62583 +    if(ni->ni_list_next == NULL)
62584 +    {
62585 +        /* Last in list so fix list tail */
62586 +        nt->nt_node_last = ni->ni_list_prev;
62587 +    }
62588 +    else
62589 +    {
62590 +        ni->ni_list_next->ni_list_prev = ni->ni_list_prev;
62591 +    }
62592 +
62593 +    if(ni->ni_hash_prev == NULL)
62594 +    {
62595 +        /* First in list so fix the list head */
62596 +        int hash;
62597 +        hash = IEEE80211_NODE_HASH(ni->ni_macaddr);
62598 +        nt->nt_hash[hash] = ni->ni_hash_next;
62599 +    }
62600 +    else
62601 +    {
62602 +        ni->ni_hash_prev->ni_hash_next = ni->ni_hash_next;
62603 +    }
62604 +
62605 +    if(ni->ni_hash_next != NULL)
62606 +    {
62607 +        ni->ni_hash_next->ni_hash_prev = ni->ni_hash_prev;
62608 +    }
62609 +    wlan_node_free(ni);
62610 +
62611 +    IEEE80211_NODE_UNLOCK(nt);
62612 +}
62613 +
62614 +static void
62615 +wlan_node_dec_free(bss_t *ni)
62616 +{
62617 +    if (ieee80211_node_dectestref(ni)) {
62618 +        wlan_node_free(ni);
62619 +    }
62620 +}
62621 +
62622 +void
62623 +wlan_free_allnodes(struct ieee80211_node_table *nt)
62624 +{
62625 +    bss_t *ni;
62626 +
62627 +    while ((ni = nt->nt_node_first) != NULL) {
62628 +        wlan_node_reclaim(nt, ni);
62629 +    }
62630 +}
62631 +
62632 +void
62633 +wlan_iterate_nodes(struct ieee80211_node_table *nt, wlan_node_iter_func *f,
62634 +                   void *arg)
62635 +{
62636 +    bss_t *ni;
62637 +    A_UINT32 gen;
62638 +
62639 +    gen = ++nt->nt_scangen;
62640 +
62641 +    IEEE80211_NODE_LOCK(nt);
62642 +    for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) {
62643 +        if (ni->ni_scangen != gen) {
62644 +            ni->ni_scangen = gen;
62645 +            (void) ieee80211_node_incref(ni);
62646 +            (*f)(arg, ni);
62647 +            wlan_node_dec_free(ni);
62648 +        }
62649 +    }
62650 +    IEEE80211_NODE_UNLOCK(nt);
62651 +}
62652 +
62653 +/*
62654 + * Node table support.
62655 + */
62656 +void
62657 +wlan_node_table_init(void *wmip, struct ieee80211_node_table *nt)
62658 +{
62659 +    int i;
62660 +
62661 +    AR_DEBUG_PRINTF(ATH_DEBUG_WLAN, ("node table = 0x%x\n", (A_UINT32)nt));
62662 +    IEEE80211_NODE_LOCK_INIT(nt);
62663 +
62664 +    nt->nt_node_first = nt->nt_node_last = NULL;
62665 +    for(i = 0; i < IEEE80211_NODE_HASHSIZE; i++)
62666 +    {
62667 +        nt->nt_hash[i] = NULL;
62668 +    }
62669 +    A_INIT_TIMER(&nt->nt_inact_timer, wlan_node_timeout, nt);
62670 +    nt->isTimerArmed = FALSE;
62671 +    nt->nt_wmip = wmip;
62672 +}
62673 +
62674 +static void
62675 +wlan_node_timeout(A_ATH_TIMER arg)
62676 +{
62677 +    struct ieee80211_node_table *nt = (struct ieee80211_node_table *)arg;
62678 +    bss_t *bss, *nextBss;
62679 +    A_UINT8 myBssid[IEEE80211_ADDR_LEN], reArmTimer = FALSE;
62680 +
62681 +    wmi_get_current_bssid(nt->nt_wmip, myBssid);
62682 +
62683 +    bss = nt->nt_node_first;
62684 +    while (bss != NULL)
62685 +    {
62686 +        nextBss = bss->ni_list_next;
62687 +        if (A_MEMCMP(myBssid, bss->ni_macaddr, sizeof(myBssid)) != 0)
62688 +        {
62689 +
62690 +            if (bss->ni_tstamp <= A_GET_MS(0))
62691 +            {
62692 +               /*
62693 +                * free up all but the current bss - if set
62694 +                */
62695 +                wlan_node_reclaim(nt, bss);
62696 +            }
62697 +            else
62698 +            {
62699 +                /*
62700 +                 * Re-arm timer, only when we have a bss other than
62701 +                 * current bss AND it is not aged-out.
62702 +                 */
62703 +                reArmTimer = TRUE;
62704 +            }
62705 +        }
62706 +        bss = nextBss;
62707 +    }
62708 +
62709 +    if(reArmTimer)
62710 +        A_TIMEOUT_MS(&nt->nt_inact_timer, WLAN_NODE_INACT_TIMEOUT_MSEC, 0);
62711 +
62712 +    nt->isTimerArmed = reArmTimer;
62713 +}
62714 +
62715 +void
62716 +wlan_node_table_cleanup(struct ieee80211_node_table *nt)
62717 +{
62718 +    A_UNTIMEOUT(&nt->nt_inact_timer);
62719 +    A_DELETE_TIMER(&nt->nt_inact_timer);
62720 +    wlan_free_allnodes(nt);
62721 +    IEEE80211_NODE_LOCK_DESTROY(nt);
62722 +}
62723 +
62724 +bss_t *
62725 +wlan_find_Ssidnode (struct ieee80211_node_table *nt, A_UCHAR *pSsid,
62726 +                                       A_UINT32 ssidLength, A_BOOL bIsWPA2)
62727 +{
62728 +    bss_t   *ni = NULL;
62729 +       A_UCHAR *pIESsid = NULL;
62730 +
62731 +    IEEE80211_NODE_LOCK (nt);
62732 +
62733 +    for (ni = nt->nt_node_first; ni; ni = ni->ni_list_next) {
62734 +               pIESsid = ni->ni_cie.ie_ssid;
62735 +               if (pIESsid[1] <= 32) {
62736 +
62737 +                       // Step 1 : Check SSID
62738 +                       if (0x00 == memcmp (pSsid, &pIESsid[2], ssidLength)) {
62739 +
62740 +                               // Step 2 : if SSID matches, check WPA or WPA2
62741 +                               if (TRUE == bIsWPA2 && NULL != ni->ni_cie.ie_rsn) {
62742 +                                       ieee80211_node_incref (ni);  /* mark referenced */
62743 +                                       IEEE80211_NODE_UNLOCK (nt);
62744 +                                       return ni;
62745 +                               }
62746 +                               if (FALSE == bIsWPA2 && NULL != ni->ni_cie.ie_wpa) {
62747 +                                       ieee80211_node_incref(ni);  /* mark referenced */
62748 +                                       IEEE80211_NODE_UNLOCK (nt);
62749 +                                       return ni;
62750 +                               }
62751 +                       }
62752 +               }
62753 +    }
62754 +
62755 +    IEEE80211_NODE_UNLOCK (nt);
62756 +
62757 +    return NULL;
62758 +}
62759 +
62760 +void
62761 +wlan_node_return (struct ieee80211_node_table *nt, bss_t *ni)
62762 +{
62763 +       IEEE80211_NODE_LOCK (nt);
62764 +       wlan_node_dec_free (ni);
62765 +       IEEE80211_NODE_UNLOCK (nt);
62766 +}
62767 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c
62768 ===================================================================
62769 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
62770 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_recv_beacon.c    2008-12-11 22:46:49.000000000 +0100
62771 @@ -0,0 +1,192 @@
62772 +/*-
62773 + * Copyright (c) 2001 Atsushi Onoe
62774 + * Copyright (c) 2002-2004 Sam Leffler, Errno Consulting
62775 + * All rights reserved.
62776 + *
62777 + * Redistribution and use in source and binary forms, with or without
62778 + * modification, are permitted provided that the following conditions
62779 + * are met:
62780 + * 1. Redistributions of source code must retain the above copyright
62781 + *    notice, this list of conditions and the following disclaimer.
62782 + * 2. Redistributions in binary form must reproduce the above copyright
62783 + *    notice, this list of conditions and the following disclaimer in the
62784 + *    documentation and/or other materials provided with the distribution.
62785 + * 3. The name of the author may not be used to endorse or promote products
62786 + *    derived from this software without specific prior written permission.
62787 + *
62788 + * Alternatively, this software may be distributed under the terms of the
62789 + * GNU General Public License ("GPL") version 2 as published by the Free
62790 + * Software Foundation.
62791 + *
62792 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
62793 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
62794 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62795 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62796 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62797 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62798 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62799 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62800 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62801 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62802 + */
62803 +/*
62804 + * IEEE 802.11 input handling.
62805 + */
62806 +
62807 +#include "a_config.h"
62808 +#include "athdefs.h"
62809 +#include "a_types.h"
62810 +#include "a_osapi.h"
62811 +#include <wmi.h>
62812 +#include <ieee80211.h>
62813 +#include <wlan_api.h>
62814 +
62815 +#define IEEE80211_VERIFY_LENGTH(_len, _minlen) do {         \
62816 +    if ((_len) < (_minlen)) {                   \
62817 +        return A_EINVAL;                         \
62818 +    }                               \
62819 +} while (0)
62820 +
62821 +#define IEEE80211_VERIFY_ELEMENT(__elem, __maxlen) do {         \
62822 +    if ((__elem) == NULL) {                     \
62823 +        return A_EINVAL;                         \
62824 +    }                               \
62825 +    if ((__elem)[1] > (__maxlen)) {                 \
62826 +        return A_EINVAL;                         \
62827 +    }                               \
62828 +} while (0)
62829 +
62830 +
62831 +/* unaligned little endian access */
62832 +#define LE_READ_2(p)                            \
62833 +    ((A_UINT16)                            \
62834 +     ((((A_UINT8 *)(p))[0]      ) | (((A_UINT8 *)(p))[1] <<  8)))
62835 +
62836 +#define LE_READ_4(p)                            \
62837 +    ((A_UINT32)                            \
62838 +     ((((A_UINT8 *)(p))[0]      ) | (((A_UINT8 *)(p))[1] <<  8) | \
62839 +      (((A_UINT8 *)(p))[2] << 16) | (((A_UINT8 *)(p))[3] << 24)))
62840 +
62841 +
62842 +static int __inline
62843 +iswpaoui(const A_UINT8 *frm)
62844 +{
62845 +    return frm[1] > 3 && LE_READ_4(frm+2) == ((WPA_OUI_TYPE<<24)|WPA_OUI);
62846 +}
62847 +
62848 +static int __inline
62849 +iswmmoui(const A_UINT8 *frm)
62850 +{
62851 +    return frm[1] > 3 && LE_READ_4(frm+2) == ((WMM_OUI_TYPE<<24)|WMM_OUI);
62852 +}
62853 +
62854 +static int __inline
62855 +iswmmparam(const A_UINT8 *frm)
62856 +{
62857 +    return frm[1] > 5 && frm[6] == WMM_PARAM_OUI_SUBTYPE;
62858 +}
62859 +
62860 +static int __inline
62861 +iswmminfo(const A_UINT8 *frm)
62862 +{
62863 +    return frm[1] > 5 && frm[6] == WMM_INFO_OUI_SUBTYPE;
62864 +}
62865 +
62866 +static int __inline
62867 +isatherosoui(const A_UINT8 *frm)
62868 +{
62869 +    return frm[1] > 3 && LE_READ_4(frm+2) == ((ATH_OUI_TYPE<<24)|ATH_OUI);
62870 +}
62871 +
62872 +static int __inline
62873 +iswscoui(const A_UINT8 *frm)
62874 +{
62875 +    return frm[1] > 3 && LE_READ_4(frm+2) == ((0x04<<24)|WPA_OUI);
62876 +}
62877 +
62878 +A_STATUS
62879 +wlan_parse_beacon(A_UINT8 *buf, int framelen, struct ieee80211_common_ie *cie)
62880 +{
62881 +    A_UINT8 *frm, *efrm;
62882 +
62883 +    frm = buf;
62884 +    efrm = (A_UINT8 *) (frm + framelen);
62885 +
62886 +    /*
62887 +     * beacon/probe response frame format
62888 +     *  [8] time stamp
62889 +     *  [2] beacon interval
62890 +     *  [2] capability information
62891 +     *  [tlv] ssid
62892 +     *  [tlv] supported rates
62893 +     *  [tlv] country information
62894 +     *  [tlv] parameter set (FH/DS)
62895 +     *  [tlv] erp information
62896 +     *  [tlv] extended supported rates
62897 +     *  [tlv] WMM
62898 +     *  [tlv] WPA or RSN
62899 +     *  [tlv] Atheros Advanced Capabilities
62900 +     */
62901 +    IEEE80211_VERIFY_LENGTH(efrm - frm, 12);
62902 +    A_MEMZERO(cie, sizeof(*cie));
62903 +
62904 +    cie->ie_tstamp = frm; frm += 8;
62905 +    cie->ie_beaconInt = A_LE2CPU16(*(A_UINT16 *)frm);  frm += 2;
62906 +    cie->ie_capInfo = A_LE2CPU16(*(A_UINT16 *)frm);  frm += 2;
62907 +    cie->ie_chan = 0;
62908 +
62909 +    while (frm < efrm) {
62910 +        switch (*frm) {
62911 +        case IEEE80211_ELEMID_SSID:
62912 +            cie->ie_ssid = frm;
62913 +            break;
62914 +        case IEEE80211_ELEMID_RATES:
62915 +            cie->ie_rates = frm;
62916 +            break;
62917 +        case IEEE80211_ELEMID_COUNTRY:
62918 +            cie->ie_country = frm;
62919 +            break;
62920 +        case IEEE80211_ELEMID_FHPARMS:
62921 +            break;
62922 +        case IEEE80211_ELEMID_DSPARMS:
62923 +            cie->ie_chan = frm[2];
62924 +            break;
62925 +        case IEEE80211_ELEMID_TIM:
62926 +            cie->ie_tim = frm;
62927 +            break;
62928 +        case IEEE80211_ELEMID_IBSSPARMS:
62929 +            break;
62930 +        case IEEE80211_ELEMID_XRATES:
62931 +            cie->ie_xrates = frm;
62932 +            break;
62933 +        case IEEE80211_ELEMID_ERP:
62934 +            if (frm[1] != 1) {
62935 +                //A_PRINTF("Discarding ERP Element - Bad Len\n");
62936 +                return A_EINVAL;
62937 +            }
62938 +            cie->ie_erp = frm[2];
62939 +            break;
62940 +        case IEEE80211_ELEMID_RSN:
62941 +            cie->ie_rsn = frm;
62942 +            break;
62943 +        case IEEE80211_ELEMID_VENDOR:
62944 +            if (iswpaoui(frm)) {
62945 +                cie->ie_wpa = frm;
62946 +            } else if (iswmmoui(frm)) {
62947 +                cie->ie_wmm = frm;
62948 +            } else if (isatherosoui(frm)) {
62949 +                cie->ie_ath = frm;
62950 +            } else if(iswscoui(frm)) {
62951 +                cie->ie_wsc = frm;
62952 +            }
62953 +            break;
62954 +        default:
62955 +            break;
62956 +        }
62957 +        frm += frm[1] + 2;
62958 +    }
62959 +    IEEE80211_VERIFY_ELEMENT(cie->ie_rates, IEEE80211_RATE_MAXSIZE);
62960 +    IEEE80211_VERIFY_ELEMENT(cie->ie_ssid, IEEE80211_NWID_LEN);
62961 +
62962 +    return A_OK;
62963 +}
62964 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c
62965 ===================================================================
62966 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
62967 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wlan/wlan_utils.c  2008-12-11 22:46:49.000000000 +0100
62968 @@ -0,0 +1,59 @@
62969 +/*
62970 + * Copyright (c) 2004-2005 Atheros Communications Inc.
62971 + * All rights reserved.
62972 + *
62973 + * This module implements frequently used wlan utilies
62974 + *
62975 + * $Id: //depot/sw/releases/olca2.0-GPL/host/wlan/src/wlan_utils.c#1 $
62976 + *
62977 + *
62978 + *  This program is free software; you can redistribute it and/or modify
62979 + *  it under the terms of the GNU General Public License version 2 as
62980 + *  published by the Free Software Foundation;
62981 + *
62982 + *  Software distributed under the License is distributed on an "AS
62983 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
62984 + *  implied. See the License for the specific language governing
62985 + *  rights and limitations under the License.
62986 + *
62987 + *
62988 + *
62989 + */
62990 +
62991 +#include <a_config.h>
62992 +#include <athdefs.h>
62993 +#include <a_types.h>
62994 +#include <a_osapi.h>
62995 +
62996 +/*
62997 + * converts ieee channel number to frequency
62998 + */
62999 +A_UINT16
63000 +wlan_ieee2freq(int chan)
63001 +{
63002 +    if (chan == 14) {
63003 +        return 2484;
63004 +    }
63005 +    if (chan < 14) {    /* 0-13 */
63006 +        return (2407 + (chan*5));
63007 +    }
63008 +    if (chan < 27) {    /* 15-26 */
63009 +        return (2512 + ((chan-15)*20));
63010 +    }
63011 +    return (5000 + (chan*5));
63012 +}
63013 +
63014 +/*
63015 + * Converts MHz frequency to IEEE channel number.
63016 + */
63017 +A_UINT32
63018 +wlan_freq2ieee(A_UINT16 freq)
63019 +{
63020 +    if (freq == 2484)
63021 +        return 14;
63022 +    if (freq < 2484)
63023 +        return (freq - 2407) / 5;
63024 +    if (freq < 5000)
63025 +        return 15 + ((freq - 2512) / 20);
63026 +    return (freq - 5000) / 5;
63027 +}
63028 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi.c
63029 ===================================================================
63030 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
63031 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi.c  2008-12-11 22:46:49.000000000 +0100
63032 @@ -0,0 +1,3954 @@
63033 +/*
63034 + * Copyright (c) 2004-2007 Atheros Communications Inc.
63035 + * All rights reserved.
63036 + *
63037 + * This module implements the hardware independent layer of the
63038 + * Wireless Module Interface (WMI) protocol.
63039 + *
63040 + * $Id: //depot/sw/releases/olca2.0-GPL/host/wmi/wmi.c#3 $
63041 + *
63042 + *
63043 + *  This program is free software; you can redistribute it and/or modify
63044 + *  it under the terms of the GNU General Public License version 2 as
63045 + *  published by the Free Software Foundation;
63046 + *
63047 + *  Software distributed under the License is distributed on an "AS
63048 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
63049 + *  implied. See the License for the specific language governing
63050 + *  rights and limitations under the License.
63051 + *
63052 + *
63053 + *
63054 + */
63055 +
63056 +#include <a_config.h>
63057 +#include <athdefs.h>
63058 +#include <a_types.h>
63059 +#include <a_osapi.h>
63060 +#include "htc.h"
63061 +#include "htc_api.h"
63062 +#include "wmi.h"
63063 +#include <ieee80211.h>
63064 +#include <ieee80211_node.h>
63065 +#include <wlan_api.h>
63066 +#include <wmi_api.h>
63067 +#include "dset_api.h"
63068 +#include "gpio_api.h"
63069 +#include "wmi_host.h"
63070 +#include "a_drv.h"
63071 +#include "a_drv_api.h"
63072 +#include "a_debug.h"
63073 +#include "dbglog_api.h"
63074 +
63075 +static A_STATUS wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63076 +
63077 +static A_STATUS wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63078 +                                     int len);
63079 +static A_STATUS wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63080 +                                        int len);
63081 +static A_STATUS wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63082 +                                        int len);
63083 +static A_STATUS wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63084 +                                     int len);
63085 +static A_STATUS wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63086 +                                       int len);
63087 +static A_STATUS wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63088 +                                     int len);
63089 +static A_STATUS wmi_sync_point(struct wmi_t *wmip);
63090 +
63091 +static A_STATUS wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
63092 +                                     int len);
63093 +static A_STATUS wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
63094 +                                     int len);
63095 +static A_STATUS wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap,
63096 +                                         int len);
63097 +static A_STATUS wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63098 +                                       int len);
63099 +static A_STATUS wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63100 +static A_STATUS wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63101 +                                             int len);
63102 +
63103 +static A_STATUS wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap,
63104 +                                     int len);
63105 +#ifdef CONFIG_HOST_DSET_SUPPORT
63106 +static A_STATUS wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63107 +static A_STATUS wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap,
63108 +                                     int len);
63109 +#endif /* CONFIG_HOST_DSET_SUPPORT */
63110 +
63111 +
63112 +static A_STATUS wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap,
63113 +                                     int len);
63114 +static A_STATUS wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63115 +static A_STATUS wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63116 +static A_STATUS wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63117 +static A_STATUS wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63118 +static A_STATUS wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63119 +static A_STATUS wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63120 +static A_STATUS wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63121 +                                      int len);
63122 +static A_STATUS wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63123 +                                      int len);
63124 +static A_STATUS wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap,
63125 +                                      int len);
63126 +static A_STATUS
63127 +wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len);
63128 +
63129 +#ifdef CONFIG_HOST_GPIO_SUPPORT
63130 +static A_STATUS wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63131 +static A_STATUS wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63132 +static A_STATUS wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63133 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
63134 +
63135 +#ifdef CONFIG_HOST_TCMD_SUPPORT
63136 +static A_STATUS
63137 +wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63138 +#endif
63139 +
63140 +static A_STATUS
63141 +wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63142 +
63143 +static A_STATUS
63144 +wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63145 +
63146 +static A_STATUS
63147 +wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63148 +
63149 +static A_BOOL
63150 +wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex);
63151 +
63152 +static A_STATUS
63153 +wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63154 +
63155 +static A_STATUS
63156 +wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63157 +
63158 +static A_STATUS wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len);
63159 +
63160 +int wps_enable;
63161 +static const A_INT32 wmi_rateTable[] = {
63162 +    1000,
63163 +    2000,
63164 +    5500,
63165 +    11000,
63166 +    6000,
63167 +    9000,
63168 +    12000,
63169 +    18000,
63170 +    24000,
63171 +    36000,
63172 +    48000,
63173 +    54000,
63174 +    0};
63175 +
63176 +#define MODE_A_SUPPORT_RATE_START       4
63177 +#define MODE_A_SUPPORT_RATE_STOP        11
63178 +
63179 +#define MODE_GONLY_SUPPORT_RATE_START   MODE_A_SUPPORT_RATE_START
63180 +#define MODE_GONLY_SUPPORT_RATE_STOP    MODE_A_SUPPORT_RATE_STOP
63181 +
63182 +#define MODE_B_SUPPORT_RATE_START       0
63183 +#define MODE_B_SUPPORT_RATE_STOP        3
63184 +
63185 +#define MODE_G_SUPPORT_RATE_START       0
63186 +#define MODE_G_SUPPORT_RATE_STOP        11
63187 +
63188 +#define MAX_NUMBER_OF_SUPPORT_RATES     (MODE_G_SUPPORT_RATE_STOP + 1)
63189 +
63190 +/* 802.1d to AC mapping. Refer pg 57 of WMM-test-plan-v1.2 */
63191 +const A_UINT8 up_to_ac[]= {
63192 +                WMM_AC_BE,
63193 +                WMM_AC_BK,
63194 +                WMM_AC_BK,
63195 +                WMM_AC_BE,
63196 +                WMM_AC_VI,
63197 +                WMM_AC_VI,
63198 +                WMM_AC_VO,
63199 +                WMM_AC_VO,
63200 +            };
63201 +
63202 +void *
63203 +wmi_init(void *devt)
63204 +{
63205 +    struct wmi_t *wmip;
63206 +
63207 +    wmip = A_MALLOC(sizeof(struct wmi_t));
63208 +    if (wmip == NULL) {
63209 +        return (NULL);
63210 +    }
63211 +    A_MEMZERO(wmip, sizeof(*wmip));
63212 +    A_MUTEX_INIT(&wmip->wmi_lock);
63213 +    wmip->wmi_devt = devt;
63214 +    wlan_node_table_init(wmip, &wmip->wmi_scan_table);
63215 +    wmi_qos_state_init(wmip);
63216 +    wmip->wmi_powerMode = REC_POWER;
63217 +    wmip->wmi_phyMode = WMI_11G_MODE;
63218 +
63219 +    return (wmip);
63220 +}
63221 +
63222 +void
63223 +wmi_qos_state_init(struct wmi_t *wmip)
63224 +{
63225 +    A_UINT8 i;
63226 +
63227 +    if (wmip == NULL) {
63228 +        return;
63229 +    }
63230 +    LOCK_WMI(wmip);
63231 +
63232 +    /* Initialize QoS States */
63233 +    wmip->wmi_numQoSStream = 0;
63234 +
63235 +    wmip->wmi_fatPipeExists = 0;
63236 +
63237 +    for (i=0; i < WMM_NUM_AC; i++) {
63238 +        wmip->wmi_streamExistsForAC[i]=0;
63239 +    }
63240 +
63241 +        /* Initialize the static Wmi stream Pri to WMM AC mappings Arrays */
63242 +    WMI_INIT_WMISTREAM_AC_MAP(wmip);
63243 +
63244 +    UNLOCK_WMI(wmip);
63245 +
63246 +    A_WMI_SET_NUMDATAENDPTS(wmip->wmi_devt, 1);
63247 +}
63248 +
63249 +void
63250 +wmi_shutdown(struct wmi_t *wmip)
63251 +{
63252 +    if (wmip != NULL) {
63253 +        wlan_node_table_cleanup(&wmip->wmi_scan_table);
63254 +        if (A_IS_MUTEX_VALID(&wmip->wmi_lock)) {
63255 +            A_MUTEX_DELETE(&wmip->wmi_lock);
63256 +        }
63257 +        A_FREE(wmip);
63258 +    }
63259 +}
63260 +
63261 +/*
63262 + *  performs DIX to 802.3 encapsulation for transmit packets.
63263 + *  uses passed in buffer.  Returns buffer or NULL if failed.
63264 + *  Assumes the entire DIX header is contigous and that there is
63265 + *  enough room in the buffer for a 802.3 mac header and LLC+SNAP headers.
63266 + */
63267 +A_STATUS
63268 +wmi_dix_2_dot3(struct wmi_t *wmip, void *osbuf)
63269 +{
63270 +    A_UINT8          *datap;
63271 +    A_UINT16         typeorlen;
63272 +    ATH_MAC_HDR      macHdr;
63273 +    ATH_LLC_SNAP_HDR *llcHdr;
63274 +
63275 +    A_ASSERT(osbuf != NULL);
63276 +
63277 +    if (A_NETBUF_HEADROOM(osbuf) <
63278 +        (sizeof(ATH_LLC_SNAP_HDR) + sizeof(WMI_DATA_HDR)))
63279 +    {
63280 +        return A_NO_MEMORY;
63281 +    }
63282 +
63283 +    datap = A_NETBUF_DATA(osbuf);
63284 +
63285 +    typeorlen = *(A_UINT16 *)(datap + ATH_MAC_LEN + ATH_MAC_LEN);
63286 +
63287 +    if (!IS_ETHERTYPE(A_BE2CPU16(typeorlen))) {
63288 +        /*
63289 +         * packet is already in 802.3 format - return success
63290 +         */
63291 +        A_DPRINTF(DBG_WMI, (DBGFMT "packet already 802.3\n", DBGARG));
63292 +        return (A_OK);
63293 +    }
63294 +
63295 +    /*
63296 +     * Save mac fields and length to be inserted later
63297 +     */
63298 +    A_MEMCPY(macHdr.dstMac, datap, ATH_MAC_LEN);
63299 +    A_MEMCPY(macHdr.srcMac, datap + ATH_MAC_LEN, ATH_MAC_LEN);
63300 +    macHdr.typeOrLen = A_CPU2BE16(A_NETBUF_LEN(osbuf) - sizeof(ATH_MAC_HDR) +
63301 +                                  sizeof(ATH_LLC_SNAP_HDR));
63302 +
63303 +    /*
63304 +     * Make room for LLC+SNAP headers
63305 +     */
63306 +    if (A_NETBUF_PUSH(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) {
63307 +        return A_NO_MEMORY;
63308 +    }
63309 +
63310 +    datap = A_NETBUF_DATA(osbuf);
63311 +
63312 +    A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR));
63313 +
63314 +    llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR));
63315 +    llcHdr->dsap      = 0xAA;
63316 +    llcHdr->ssap      = 0xAA;
63317 +    llcHdr->cntl      = 0x03;
63318 +    llcHdr->orgCode[0] = 0x0;
63319 +    llcHdr->orgCode[1] = 0x0;
63320 +    llcHdr->orgCode[2] = 0x0;
63321 +    llcHdr->etherType = typeorlen;
63322 +
63323 +    return (A_OK);
63324 +}
63325 +
63326 +/*
63327 + * Adds a WMI data header
63328 + * Assumes there is enough room in the buffer to add header.
63329 + */
63330 +A_STATUS
63331 +wmi_data_hdr_add(struct wmi_t *wmip, void *osbuf, A_UINT8 msgType)
63332 +{
63333 +    WMI_DATA_HDR     *dtHdr;
63334 +
63335 +    A_ASSERT(osbuf != NULL);
63336 +
63337 +    if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) {
63338 +        return A_NO_MEMORY;
63339 +    }
63340 +
63341 +    dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf);
63342 +    dtHdr->info = msgType;
63343 +    dtHdr->rssi = 0;
63344 +
63345 +    return (A_OK);
63346 +}
63347 +
63348 +A_UINT8 wmi_implicit_create_pstream(struct wmi_t *wmip, void *osbuf, A_UINT8 dir, A_UINT8 up)
63349 +{
63350 +    A_UINT8         *datap;
63351 +    A_UINT8         trafficClass = WMM_AC_BE, userPriority = up;
63352 +    ATH_LLC_SNAP_HDR *llcHdr;
63353 +    A_UINT16        ipType = IP_ETHERTYPE;
63354 +    WMI_DATA_HDR     *dtHdr;
63355 +    WMI_CREATE_PSTREAM_CMD  cmd;
63356 +    A_BOOL           streamExists = FALSE;
63357 +
63358 +    A_ASSERT(osbuf != NULL);
63359 +
63360 +    datap = A_NETBUF_DATA(osbuf);
63361 +
63362 +    if (up == UNDEFINED_PRI) {
63363 +    llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(WMI_DATA_HDR) +
63364 +                                  sizeof(ATH_MAC_HDR));
63365 +
63366 +        if (llcHdr->etherType == A_CPU2BE16(ipType)) {
63367 +        /* Extract the endpoint info from the TOS field in the IP header */
63368 +        userPriority = A_WMI_IPTOS_TO_USERPRIORITY(((A_UINT8 *)llcHdr) + sizeof(ATH_LLC_SNAP_HDR));
63369 +        }
63370 +    }
63371 +
63372 +    if (userPriority < MAX_NUM_PRI) {
63373 +        trafficClass = convert_userPriority_to_trafficClass(userPriority);
63374 +    }
63375 +
63376 +    dtHdr = (WMI_DATA_HDR *)datap;
63377 +    if(dir==UPLINK_TRAFFIC)
63378 +        dtHdr->info |= (userPriority & WMI_DATA_HDR_UP_MASK) << WMI_DATA_HDR_UP_SHIFT;  /* lower 3-bits are 802.1d priority */
63379 +
63380 +    LOCK_WMI(wmip);
63381 +    streamExists = wmip->wmi_fatPipeExists;
63382 +    UNLOCK_WMI(wmip);
63383 +
63384 +    if (!(streamExists & (1 << trafficClass))) {
63385 +
63386 +        A_MEMZERO(&cmd, sizeof(cmd));
63387 +           cmd.trafficClass = trafficClass;
63388 +           cmd.userPriority = userPriority;
63389 +               cmd.inactivityInt = WMI_IMPLICIT_PSTREAM_INACTIVITY_INT;
63390 +            /* Implicit streams are created with TSID 0xFF */
63391 +        cmd.tsid = WMI_IMPLICIT_PSTREAM;
63392 +        wmi_create_pstream_cmd(wmip, &cmd);
63393 +    }
63394 +
63395 +    return trafficClass;
63396 +}
63397 +
63398 +WMI_PRI_STREAM_ID
63399 +wmi_get_stream_id(struct wmi_t *wmip, A_UINT8 trafficClass)
63400 +{
63401 +    return WMI_ACCESSCATEGORY_WMISTREAM(wmip, trafficClass);
63402 +}
63403 +
63404 +/*
63405 + *  performs 802.3 to DIX encapsulation for received packets.
63406 + *  Assumes the entire 802.3 header is contigous.
63407 + */
63408 +A_STATUS
63409 +wmi_dot3_2_dix(struct wmi_t *wmip, void *osbuf)
63410 +{
63411 +    A_UINT8          *datap;
63412 +    ATH_MAC_HDR      macHdr;
63413 +    ATH_LLC_SNAP_HDR *llcHdr;
63414 +
63415 +    A_ASSERT(osbuf != NULL);
63416 +    datap = A_NETBUF_DATA(osbuf);
63417 +
63418 +    A_MEMCPY(&macHdr, datap, sizeof(ATH_MAC_HDR));
63419 +    llcHdr = (ATH_LLC_SNAP_HDR *)(datap + sizeof(ATH_MAC_HDR));
63420 +    macHdr.typeOrLen = llcHdr->etherType;
63421 +
63422 +    if (A_NETBUF_PULL(osbuf, sizeof(ATH_LLC_SNAP_HDR)) != A_OK) {
63423 +        return A_NO_MEMORY;
63424 +    }
63425 +
63426 +    datap = A_NETBUF_DATA(osbuf);
63427 +
63428 +    A_MEMCPY(datap, &macHdr, sizeof (ATH_MAC_HDR));
63429 +
63430 +    return (A_OK);
63431 +}
63432 +
63433 +/*
63434 + * Removes a WMI data header
63435 + */
63436 +A_STATUS
63437 +wmi_data_hdr_remove(struct wmi_t *wmip, void *osbuf)
63438 +{
63439 +    A_ASSERT(osbuf != NULL);
63440 +
63441 +    return (A_NETBUF_PULL(osbuf, sizeof(WMI_DATA_HDR)));
63442 +}
63443 +
63444 +void
63445 +wmi_iterate_nodes(struct wmi_t *wmip, wlan_node_iter_func *f, void *arg)
63446 +{
63447 +    wlan_iterate_nodes(&wmip->wmi_scan_table, f, arg);
63448 +}
63449 +
63450 +/*
63451 + * WMI Extended Event received from Target.
63452 + */
63453 +A_STATUS
63454 +wmi_control_rx_xtnd(struct wmi_t *wmip, void *osbuf)
63455 +{
63456 +    WMIX_CMD_HDR *cmd;
63457 +    A_UINT16 id;
63458 +    A_UINT8 *datap;
63459 +    A_UINT32 len;
63460 +    A_STATUS status = A_OK;
63461 +
63462 +    if (A_NETBUF_LEN(osbuf) < sizeof(WMIX_CMD_HDR)) {
63463 +        A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG));
63464 +        wmip->wmi_stats.cmd_len_err++;
63465 +        A_NETBUF_FREE(osbuf);
63466 +        return A_ERROR;
63467 +    }
63468 +
63469 +    cmd = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf);
63470 +    id = cmd->commandId;
63471 +
63472 +    if (A_NETBUF_PULL(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) {
63473 +        A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG));
63474 +        wmip->wmi_stats.cmd_len_err++;
63475 +        A_NETBUF_FREE(osbuf);
63476 +        return A_ERROR;
63477 +    }
63478 +
63479 +    datap = A_NETBUF_DATA(osbuf);
63480 +    len = A_NETBUF_LEN(osbuf);
63481 +
63482 +    switch (id) {
63483 +    case (WMIX_DSETOPENREQ_EVENTID):
63484 +        status = wmi_dset_open_req_rx(wmip, datap, len);
63485 +        break;
63486 +#ifdef CONFIG_HOST_DSET_SUPPORT
63487 +    case (WMIX_DSETCLOSE_EVENTID):
63488 +        status = wmi_dset_close_rx(wmip, datap, len);
63489 +        break;
63490 +    case (WMIX_DSETDATAREQ_EVENTID):
63491 +        status = wmi_dset_data_req_rx(wmip, datap, len);
63492 +        break;
63493 +#endif /* CONFIG_HOST_DSET_SUPPORT */
63494 +#ifdef CONFIG_HOST_GPIO_SUPPORT
63495 +    case (WMIX_GPIO_INTR_EVENTID):
63496 +        wmi_gpio_intr_rx(wmip, datap, len);
63497 +        break;
63498 +    case (WMIX_GPIO_DATA_EVENTID):
63499 +        wmi_gpio_data_rx(wmip, datap, len);
63500 +        break;
63501 +    case (WMIX_GPIO_ACK_EVENTID):
63502 +        wmi_gpio_ack_rx(wmip, datap, len);
63503 +        break;
63504 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
63505 +    case (WMIX_HB_CHALLENGE_RESP_EVENTID):
63506 +        wmi_hbChallengeResp_rx(wmip, datap, len);
63507 +        break;
63508 +    case (WMIX_DBGLOG_EVENTID):
63509 +        wmi_dbglog_event_rx(wmip, datap, len);
63510 +        break;
63511 +    default:
63512 +        A_DPRINTF(DBG_WMI|DBG_ERROR,
63513 +            (DBGFMT "Unknown id 0x%x\n", DBGARG, id));
63514 +        wmip->wmi_stats.cmd_id_err++;
63515 +        status = A_ERROR;
63516 +        break;
63517 +    }
63518 +
63519 +    return status;
63520 +}
63521 +
63522 +/*
63523 + * Control Path
63524 + */
63525 +A_UINT32 cmdRecvNum;
63526 +
63527 +A_STATUS
63528 +wmi_control_rx(struct wmi_t *wmip, void *osbuf)
63529 +{
63530 +    WMI_CMD_HDR *cmd;
63531 +    A_UINT16 id;
63532 +    A_UINT8 *datap;
63533 +    A_UINT32 len, i, loggingReq;
63534 +    A_STATUS status = A_OK;
63535 +
63536 +    A_ASSERT(osbuf != NULL);
63537 +    if (A_NETBUF_LEN(osbuf) < sizeof(WMI_CMD_HDR)) {
63538 +        A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 1\n", DBGARG));
63539 +        wmip->wmi_stats.cmd_len_err++;
63540 +        A_NETBUF_FREE(osbuf);
63541 +        return A_ERROR;
63542 +    }
63543 +
63544 +    cmd = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf);
63545 +    id = cmd->commandId;
63546 +
63547 +    if (A_NETBUF_PULL(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) {
63548 +        A_DPRINTF(DBG_WMI, (DBGFMT "bad packet 2\n", DBGARG));
63549 +        wmip->wmi_stats.cmd_len_err++;
63550 +        A_NETBUF_FREE(osbuf);
63551 +        return A_ERROR;
63552 +    }
63553 +
63554 +    datap = A_NETBUF_DATA(osbuf);
63555 +    len = A_NETBUF_LEN(osbuf);
63556 +
63557 +    ar6000_get_driver_cfg(wmip->wmi_devt,
63558 +                    AR6000_DRIVER_CFG_LOG_RAW_WMI_MSGS,
63559 +                    &loggingReq);
63560 +
63561 +    if(loggingReq) {
63562 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI %d \n",id));
63563 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("WMI recv, MsgNo %d : ", cmdRecvNum));
63564 +        for(i = 0; i < len; i++)
63565 +            AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("%x ", datap[i]));
63566 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("\n"));
63567 +    }
63568 +
63569 +    LOCK_WMI(wmip);
63570 +    cmdRecvNum++;
63571 +    UNLOCK_WMI(wmip);
63572 +
63573 +    switch (id) {
63574 +    case (WMI_GET_BITRATE_CMDID):
63575 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_BITRATE_CMDID\n", DBGARG));
63576 +        status = wmi_bitrate_reply_rx(wmip, datap, len);
63577 +        break;
63578 +    case (WMI_GET_CHANNEL_LIST_CMDID):
63579 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_CHANNEL_LIST_CMDID\n", DBGARG));
63580 +        status = wmi_channelList_reply_rx(wmip, datap, len);
63581 +        break;
63582 +    case (WMI_GET_TX_PWR_CMDID):
63583 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_TX_PWR_CMDID\n", DBGARG));
63584 +        status = wmi_txPwr_reply_rx(wmip, datap, len);
63585 +        break;
63586 +    case (WMI_READY_EVENTID):
63587 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_READY_EVENTID\n", DBGARG));
63588 +        status = wmi_ready_event_rx(wmip, datap, len);
63589 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63590 +        A_WMI_DBGLOG_INIT_DONE(wmip->wmi_devt);
63591 +        break;
63592 +    case (WMI_CONNECT_EVENTID):
63593 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CONNECT_EVENTID\n", DBGARG));
63594 +        status = wmi_connect_event_rx(wmip, datap, len);
63595 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63596 +        break;
63597 +    case (WMI_DISCONNECT_EVENTID):
63598 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_DISCONNECT_EVENTID\n", DBGARG));
63599 +        status = wmi_disconnect_event_rx(wmip, datap, len);
63600 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63601 +        break;
63602 +    case (WMI_TKIP_MICERR_EVENTID):
63603 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TKIP_MICERR_EVENTID\n", DBGARG));
63604 +        status = wmi_tkip_micerr_event_rx(wmip, datap, len);
63605 +        break;
63606 +    case (WMI_BSSINFO_EVENTID):
63607 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_BSSINFO_EVENTID\n", DBGARG));
63608 +        status = wmi_bssInfo_event_rx(wmip, datap, len);
63609 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63610 +        break;
63611 +    case (WMI_REGDOMAIN_EVENTID):
63612 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REGDOMAIN_EVENTID\n", DBGARG));
63613 +        status = wmi_regDomain_event_rx(wmip, datap, len);
63614 +        break;
63615 +    case (WMI_PSTREAM_TIMEOUT_EVENTID):
63616 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_PSTREAM_TIMEOUT_EVENTID\n", DBGARG));
63617 +        status = wmi_pstream_timeout_event_rx(wmip, datap, len);
63618 +            /* pstreams are fatpipe abstractions that get implicitly created.
63619 +             * User apps only deal with thinstreams. creation of a thinstream
63620 +             * by the user or data traffic flow in an AC triggers implicit
63621 +             * pstream creation. Do we need to send this event to App..?
63622 +             * no harm in sending it.
63623 +             */
63624 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63625 +        break;
63626 +    case (WMI_NEIGHBOR_REPORT_EVENTID):
63627 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_NEIGHBOR_REPORT_EVENTID\n", DBGARG));
63628 +        status = wmi_neighborReport_event_rx(wmip, datap, len);
63629 +        break;
63630 +    case (WMI_SCAN_COMPLETE_EVENTID):
63631 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SCAN_COMPLETE_EVENTID\n", DBGARG));
63632 +        status = wmi_scanComplete_rx(wmip, datap, len);
63633 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63634 +        break;
63635 +    case (WMI_CMDERROR_EVENTID):
63636 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CMDERROR_EVENTID\n", DBGARG));
63637 +        status = wmi_errorEvent_rx(wmip, datap, len);
63638 +        break;
63639 +    case (WMI_REPORT_STATISTICS_EVENTID):
63640 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_STATISTICS_EVENTID\n", DBGARG));
63641 +        status = wmi_statsEvent_rx(wmip, datap, len);
63642 +        break;
63643 +    case (WMI_RSSI_THRESHOLD_EVENTID):
63644 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_RSSI_THRESHOLD_EVENTID\n", DBGARG));
63645 +        status = wmi_rssiThresholdEvent_rx(wmip, datap, len);
63646 +        break;
63647 +    case (WMI_ERROR_REPORT_EVENTID):
63648 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_ERROR_REPORT_EVENTID\n", DBGARG));
63649 +        status = wmi_reportErrorEvent_rx(wmip, datap, len);
63650 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63651 +        break;
63652 +    case (WMI_OPT_RX_FRAME_EVENTID):
63653 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_OPT_RX_FRAME_EVENTID\n", DBGARG));
63654 +        status = wmi_opt_frame_event_rx(wmip, datap, len);
63655 +        break;
63656 +    case (WMI_REPORT_ROAM_TBL_EVENTID):
63657 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_TBL_EVENTID\n", DBGARG));
63658 +        status = wmi_roam_tbl_event_rx(wmip, datap, len);
63659 +        break;
63660 +    case (WMI_EXTENSION_EVENTID):
63661 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_EXTENSION_EVENTID\n", DBGARG));
63662 +        status = wmi_control_rx_xtnd(wmip, osbuf);
63663 +        break;
63664 +    case (WMI_CAC_EVENTID):
63665 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_CAC_EVENTID\n", DBGARG));
63666 +        status = wmi_cac_event_rx(wmip, datap, len);
63667 +        break;
63668 +    case (WMI_REPORT_ROAM_DATA_EVENTID):
63669 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_REPORT_ROAM_DATA_EVENTID\n", DBGARG));
63670 +        status = wmi_roam_data_event_rx(wmip, datap, len);
63671 +        break;
63672 +#ifdef CONFIG_HOST_TCMD_SUPPORT
63673 +    case (WMI_TEST_EVENTID):
63674 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TEST_EVENTID\n", DBGARG));
63675 +        status = wmi_tcmd_test_report_rx(wmip, datap, len);
63676 +        break;
63677 +#endif
63678 +    case (WMI_GET_FIXRATES_CMDID):
63679 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_FIXRATES_CMDID\n", DBGARG));
63680 +        status = wmi_ratemask_reply_rx(wmip, datap, len);
63681 +        break;
63682 +    case (WMI_TX_RETRY_ERR_EVENTID):
63683 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_TX_RETRY_ERR_EVENTID\n", DBGARG));
63684 +        status = wmi_txRetryErrEvent_rx(wmip, datap, len);
63685 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63686 +        break;
63687 +    case (WMI_SNR_THRESHOLD_EVENTID):
63688 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_SNR_THRESHOLD_EVENTID\n", DBGARG));
63689 +        status = wmi_snrThresholdEvent_rx(wmip, datap, len);
63690 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63691 +        break;
63692 +    case (WMI_LQ_THRESHOLD_EVENTID):
63693 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_LQ_THRESHOLD_EVENTID\n", DBGARG));
63694 +        status = wmi_lqThresholdEvent_rx(wmip, datap, len);
63695 +        A_WMI_SEND_EVENT_TO_APP(wmip->wmi_devt, id, datap, len);
63696 +        break;
63697 +    case (WMI_APLIST_EVENTID):
63698 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Received APLIST Event\n"));
63699 +        status = wmi_aplistEvent_rx(wmip, datap, len);
63700 +        break;
63701 +    case (WMI_GET_KEEPALIVE_CMDID):
63702 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_KEEPALIVE_CMDID\n", DBGARG));
63703 +        status = wmi_keepalive_reply_rx(wmip, datap, len);
63704 +        break;
63705 +    case (WMI_GET_WOW_LIST_EVENTID):
63706 +        status = wmi_get_wow_list_event_rx(wmip, datap, len);
63707 +        break;
63708 +    case (WMI_GET_PMKID_LIST_EVENTID):
63709 +        A_DPRINTF(DBG_WMI, (DBGFMT "WMI_GET_PMKID_LIST Event\n", DBGARG));
63710 +        status = wmi_get_pmkid_list_event_rx(wmip, datap, len);
63711 +        break;
63712 +    default:
63713 +        A_DPRINTF(DBG_WMI|DBG_ERROR,
63714 +            (DBGFMT "Unknown id 0x%x\n", DBGARG, id));
63715 +        wmip->wmi_stats.cmd_id_err++;
63716 +        status = A_ERROR;
63717 +        break;
63718 +    }
63719 +
63720 +    A_NETBUF_FREE(osbuf);
63721 +
63722 +    return status;
63723 +}
63724 +
63725 +static A_STATUS
63726 +wmi_ready_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63727 +{
63728 +    WMI_READY_EVENT *ev = (WMI_READY_EVENT *)datap;
63729 +
63730 +    if (len < sizeof(WMI_READY_EVENT)) {
63731 +        return A_EINVAL;
63732 +    }
63733 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
63734 +    wmip->wmi_ready = TRUE;
63735 +    A_WMI_READY_EVENT(wmip->wmi_devt, ev->macaddr, ev->phyCapability);
63736 +
63737 +    return A_OK;
63738 +}
63739 +
63740 +static A_STATUS
63741 +wmi_connect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63742 +{
63743 +    WMI_CONNECT_EVENT *ev;
63744 +
63745 +    if (len < sizeof(WMI_CONNECT_EVENT)) {
63746 +        return A_EINVAL;
63747 +    }
63748 +    ev = (WMI_CONNECT_EVENT *)datap;
63749 +    A_DPRINTF(DBG_WMI,
63750 +        (DBGFMT "freq %d bssid %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
63751 +        DBGARG, ev->channel,
63752 +        ev->bssid[0], ev->bssid[1], ev->bssid[2],
63753 +        ev->bssid[3], ev->bssid[4], ev->bssid[5]));
63754 +
63755 +    A_MEMCPY(wmip->wmi_bssid, ev->bssid, ATH_MAC_LEN);
63756 +
63757 +    A_WMI_CONNECT_EVENT(wmip->wmi_devt, ev->channel, ev->bssid,
63758 +                         ev->listenInterval, ev->beaconInterval,
63759 +                         ev->networkType, ev->beaconIeLen,
63760 +                         ev->assocReqLen, ev->assocRespLen,
63761 +                         ev->assocInfo);
63762 +
63763 +    return A_OK;
63764 +}
63765 +
63766 +static A_STATUS
63767 +wmi_regDomain_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63768 +{
63769 +    WMI_REG_DOMAIN_EVENT *ev;
63770 +
63771 +    if (len < sizeof(*ev)) {
63772 +        return A_EINVAL;
63773 +    }
63774 +    ev = (WMI_REG_DOMAIN_EVENT *)datap;
63775 +
63776 +    A_WMI_REGDOMAIN_EVENT(wmip->wmi_devt, ev->regDomain);
63777 +
63778 +    return A_OK;
63779 +}
63780 +
63781 +static A_STATUS
63782 +wmi_neighborReport_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63783 +{
63784 +    WMI_NEIGHBOR_REPORT_EVENT *ev;
63785 +    int numAps;
63786 +
63787 +    if (len < sizeof(*ev)) {
63788 +        return A_EINVAL;
63789 +    }
63790 +    ev = (WMI_NEIGHBOR_REPORT_EVENT *)datap;
63791 +    numAps = ev->numberOfAps;
63792 +
63793 +    if (len < (int)(sizeof(*ev) + ((numAps - 1) * sizeof(WMI_NEIGHBOR_INFO)))) {
63794 +        return A_EINVAL;
63795 +    }
63796 +
63797 +    A_WMI_NEIGHBORREPORT_EVENT(wmip->wmi_devt, numAps, ev->neighbor);
63798 +
63799 +    return A_OK;
63800 +}
63801 +
63802 +static A_STATUS
63803 +wmi_disconnect_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63804 +{
63805 +    WMI_DISCONNECT_EVENT *ev;
63806 +
63807 +    if (len < sizeof(WMI_DISCONNECT_EVENT)) {
63808 +        return A_EINVAL;
63809 +    }
63810 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
63811 +
63812 +    ev = (WMI_DISCONNECT_EVENT *)datap;
63813 +
63814 +    A_MEMZERO(wmip->wmi_bssid, sizeof(wmip->wmi_bssid));
63815 +
63816 +    A_WMI_DISCONNECT_EVENT(wmip->wmi_devt, ev->disconnectReason, ev->bssid,
63817 +                            ev->assocRespLen, ev->assocInfo, ev->protocolReasonStatus);
63818 +
63819 +    return A_OK;
63820 +}
63821 +
63822 +static A_STATUS
63823 +wmi_tkip_micerr_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63824 +{
63825 +    WMI_TKIP_MICERR_EVENT *ev;
63826 +
63827 +    if (len < sizeof(*ev)) {
63828 +        return A_EINVAL;
63829 +    }
63830 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
63831 +
63832 +    ev = (WMI_TKIP_MICERR_EVENT *)datap;
63833 +    A_WMI_TKIP_MICERR_EVENT(wmip->wmi_devt, ev->keyid, ev->ismcast);
63834 +
63835 +    return A_OK;
63836 +}
63837 +
63838 +static A_STATUS
63839 +wmi_bssInfo_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63840 +{
63841 +    bss_t *bss;
63842 +    WMI_BSS_INFO_HDR *bih;
63843 +    A_UINT8 *buf;
63844 +    A_UINT32 nodeCachingAllowed;
63845 +
63846 +    if (len <= sizeof(WMI_BSS_INFO_HDR)) {
63847 +        return A_EINVAL;
63848 +    }
63849 +
63850 +    A_WMI_BSSINFO_EVENT_RX(wmip->wmi_devt, datap, len);
63851 +    /* What is driver config for wlan node caching? */
63852 +    if(ar6000_get_driver_cfg(wmip->wmi_devt,
63853 +                    AR6000_DRIVER_CFG_GET_WLANNODECACHING,
63854 +                    &nodeCachingAllowed) != A_OK) {
63855 +        return A_EINVAL;
63856 +    }
63857 +
63858 +    if(!nodeCachingAllowed) {
63859 +        return A_OK;
63860 +    }
63861 +
63862 +
63863 +    bih = (WMI_BSS_INFO_HDR *)datap;
63864 +    buf = datap + sizeof(WMI_BSS_INFO_HDR);
63865 +    len -= sizeof(WMI_BSS_INFO_HDR);
63866 +
63867 +    A_DPRINTF(DBG_WMI2, (DBGFMT "bssInfo event - ch %u, rssi %02x, "
63868 +              "bssid \"%02x:%02x:%02x:%02x:%02x:%02x\"\n", DBGARG,
63869 +              bih->channel, (unsigned char) bih->rssi, bih->bssid[0],
63870 +              bih->bssid[1], bih->bssid[2], bih->bssid[3], bih->bssid[4],
63871 +              bih->bssid[5]));
63872 +
63873 +    if(wps_enable && (bih->frameType == PROBERESP_FTYPE) ) {
63874 +           printk("%s() A_OK 2\n", __FUNCTION__);
63875 +               return A_OK;
63876 +    }
63877 +
63878 +    bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid);
63879 +    if (bss != NULL) {
63880 +        /*
63881 +         * Free up the node.  Not the most efficient process given
63882 +         * we are about to allocate a new node but it is simple and should be
63883 +         * adequate.
63884 +         */
63885 +        wlan_node_reclaim(&wmip->wmi_scan_table, bss);
63886 +    }
63887 +
63888 +    bss = wlan_node_alloc(&wmip->wmi_scan_table, len);
63889 +    if (bss == NULL) {
63890 +        return A_NO_MEMORY;
63891 +    }
63892 +
63893 +    bss->ni_snr        = bih->snr;
63894 +    bss->ni_rssi       = bih->rssi;
63895 +    A_ASSERT(bss->ni_buf != NULL);
63896 +    A_MEMCPY(bss->ni_buf, buf, len);
63897 +
63898 +    if (wlan_parse_beacon(bss->ni_buf, len, &bss->ni_cie) != A_OK) {
63899 +        wlan_node_free(bss);
63900 +        return A_EINVAL;
63901 +    }
63902 +
63903 +    /*
63904 +     * Update the frequency in ie_chan, overwriting of channel number
63905 +     * which is done in wlan_parse_beacon
63906 +     */
63907 +    bss->ni_cie.ie_chan = bih->channel;
63908 +    wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid);
63909 +
63910 +    return A_OK;
63911 +}
63912 +
63913 +static A_STATUS
63914 +wmi_opt_frame_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63915 +{
63916 +    bss_t *bss;
63917 +    WMI_OPT_RX_INFO_HDR *bih;
63918 +    A_UINT8 *buf;
63919 +
63920 +    if (len <= sizeof(WMI_OPT_RX_INFO_HDR)) {
63921 +        return A_EINVAL;
63922 +    }
63923 +
63924 +    bih = (WMI_OPT_RX_INFO_HDR *)datap;
63925 +    buf = datap + sizeof(WMI_OPT_RX_INFO_HDR);
63926 +    len -= sizeof(WMI_OPT_RX_INFO_HDR);
63927 +
63928 +    A_DPRINTF(DBG_WMI2, (DBGFMT "opt frame event %2.2x:%2.2x\n", DBGARG,
63929 +        bih->bssid[4], bih->bssid[5]));
63930 +
63931 +    bss = wlan_find_node(&wmip->wmi_scan_table, bih->bssid);
63932 +    if (bss != NULL) {
63933 +        /*
63934 +         * Free up the node.  Not the most efficient process given
63935 +         * we are about to allocate a new node but it is simple and should be
63936 +         * adequate.
63937 +         */
63938 +        wlan_node_reclaim(&wmip->wmi_scan_table, bss);
63939 +    }
63940 +
63941 +    bss = wlan_node_alloc(&wmip->wmi_scan_table, len);
63942 +    if (bss == NULL) {
63943 +        return A_NO_MEMORY;
63944 +    }
63945 +
63946 +    bss->ni_snr        = bih->snr;
63947 +    bss->ni_cie.ie_chan = bih->channel;
63948 +    A_ASSERT(bss->ni_buf != NULL);
63949 +    A_MEMCPY(bss->ni_buf, buf, len);
63950 +    wlan_setup_node(&wmip->wmi_scan_table, bss, bih->bssid);
63951 +
63952 +    return A_OK;
63953 +}
63954 +
63955 +    /* This event indicates inactivity timeout of a fatpipe(pstream)
63956 +     * at the target
63957 +     */
63958 +static A_STATUS
63959 +wmi_pstream_timeout_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63960 +{
63961 +    WMI_PSTREAM_TIMEOUT_EVENT *ev;
63962 +
63963 +    if (len < sizeof(WMI_PSTREAM_TIMEOUT_EVENT)) {
63964 +        return A_EINVAL;
63965 +    }
63966 +
63967 +    A_DPRINTF(DBG_WMI, (DBGFMT "wmi_pstream_timeout_event_rx\n", DBGARG));
63968 +
63969 +    ev = (WMI_PSTREAM_TIMEOUT_EVENT *)datap;
63970 +
63971 +        /* When the pstream (fat pipe == AC) timesout, it means there were no
63972 +         * thinStreams within this pstream & it got implicitly created due to
63973 +         * data flow on this AC. We start the inactivity timer only for
63974 +         * implicitly created pstream. Just reset the host state.
63975 +         */
63976 +        /* Set the activeTsids for this AC to 0 */
63977 +    LOCK_WMI(wmip);
63978 +    wmip->wmi_streamExistsForAC[ev->trafficClass]=0;
63979 +    wmip->wmi_fatPipeExists &= ~(1 << ev->trafficClass);
63980 +    UNLOCK_WMI(wmip);
63981 +
63982 +        /*Indicate inactivity to driver layer for this fatpipe (pstream)*/
63983 +    A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, ev->trafficClass);
63984 +
63985 +    return A_OK;
63986 +}
63987 +
63988 +static A_STATUS
63989 +wmi_bitrate_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
63990 +{
63991 +    WMI_BIT_RATE_CMD *reply;
63992 +    A_INT32 rate;
63993 +
63994 +    if (len < sizeof(WMI_BIT_RATE_CMD)) {
63995 +        return A_EINVAL;
63996 +    }
63997 +    reply = (WMI_BIT_RATE_CMD *)datap;
63998 +    A_DPRINTF(DBG_WMI,
63999 +        (DBGFMT "Enter - rateindex %d\n", DBGARG, reply->rateIndex));
64000 +
64001 +    if (reply->rateIndex == RATE_AUTO) {
64002 +        rate = RATE_AUTO;
64003 +    } else {
64004 +        rate = wmi_rateTable[(A_UINT32) reply->rateIndex];
64005 +    }
64006 +
64007 +    A_WMI_BITRATE_RX(wmip->wmi_devt, rate);
64008 +
64009 +    return A_OK;
64010 +}
64011 +
64012 +static A_STATUS
64013 +wmi_ratemask_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64014 +{
64015 +    WMI_FIX_RATES_CMD *reply;
64016 +
64017 +    if (len < sizeof(WMI_BIT_RATE_CMD)) {
64018 +        return A_EINVAL;
64019 +    }
64020 +    reply = (WMI_FIX_RATES_CMD *)datap;
64021 +    A_DPRINTF(DBG_WMI,
64022 +        (DBGFMT "Enter - fixed rate mask %x\n", DBGARG, reply->fixRateMask));
64023 +
64024 +    A_WMI_RATEMASK_RX(wmip->wmi_devt, reply->fixRateMask);
64025 +
64026 +    return A_OK;
64027 +}
64028 +
64029 +static A_STATUS
64030 +wmi_channelList_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64031 +{
64032 +    WMI_CHANNEL_LIST_REPLY *reply;
64033 +
64034 +    if (len < sizeof(WMI_CHANNEL_LIST_REPLY)) {
64035 +        return A_EINVAL;
64036 +    }
64037 +    reply = (WMI_CHANNEL_LIST_REPLY *)datap;
64038 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64039 +
64040 +    A_WMI_CHANNELLIST_RX(wmip->wmi_devt, reply->numChannels,
64041 +                          reply->channelList);
64042 +
64043 +    return A_OK;
64044 +}
64045 +
64046 +static A_STATUS
64047 +wmi_txPwr_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64048 +{
64049 +    WMI_TX_PWR_REPLY *reply;
64050 +
64051 +    if (len < sizeof(*reply)) {
64052 +        return A_EINVAL;
64053 +    }
64054 +    reply = (WMI_TX_PWR_REPLY *)datap;
64055 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64056 +
64057 +    A_WMI_TXPWR_RX(wmip->wmi_devt, reply->dbM);
64058 +
64059 +    return A_OK;
64060 +}
64061 +static A_STATUS
64062 +wmi_keepalive_reply_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64063 +{
64064 +    WMI_GET_KEEPALIVE_CMD *reply;
64065 +
64066 +    if (len < sizeof(*reply)) {
64067 +        return A_EINVAL;
64068 +    }
64069 +    reply = (WMI_GET_KEEPALIVE_CMD *)datap;
64070 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64071 +
64072 +    A_WMI_KEEPALIVE_RX(wmip->wmi_devt, reply->configured);
64073 +
64074 +    return A_OK;
64075 +}
64076 +
64077 +
64078 +static A_STATUS
64079 +wmi_dset_open_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64080 +{
64081 +    WMIX_DSETOPENREQ_EVENT *dsetopenreq;
64082 +
64083 +    if (len < sizeof(WMIX_DSETOPENREQ_EVENT)) {
64084 +        return A_EINVAL;
64085 +    }
64086 +    dsetopenreq = (WMIX_DSETOPENREQ_EVENT *)datap;
64087 +    A_DPRINTF(DBG_WMI,
64088 +        (DBGFMT "Enter - dset_id=0x%x\n", DBGARG, dsetopenreq->dset_id));
64089 +    A_WMI_DSET_OPEN_REQ(wmip->wmi_devt,
64090 +                        dsetopenreq->dset_id,
64091 +                        dsetopenreq->targ_dset_handle,
64092 +                        dsetopenreq->targ_reply_fn,
64093 +                        dsetopenreq->targ_reply_arg);
64094 +
64095 +    return A_OK;
64096 +}
64097 +
64098 +#ifdef CONFIG_HOST_DSET_SUPPORT
64099 +static A_STATUS
64100 +wmi_dset_close_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64101 +{
64102 +    WMIX_DSETCLOSE_EVENT *dsetclose;
64103 +
64104 +    if (len < sizeof(WMIX_DSETCLOSE_EVENT)) {
64105 +        return A_EINVAL;
64106 +    }
64107 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64108 +
64109 +    dsetclose = (WMIX_DSETCLOSE_EVENT *)datap;
64110 +    A_WMI_DSET_CLOSE(wmip->wmi_devt, dsetclose->access_cookie);
64111 +
64112 +    return A_OK;
64113 +}
64114 +
64115 +static A_STATUS
64116 +wmi_dset_data_req_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64117 +{
64118 +    WMIX_DSETDATAREQ_EVENT *dsetdatareq;
64119 +
64120 +    if (len < sizeof(WMIX_DSETDATAREQ_EVENT)) {
64121 +        return A_EINVAL;
64122 +    }
64123 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64124 +
64125 +    dsetdatareq = (WMIX_DSETDATAREQ_EVENT *)datap;
64126 +    A_WMI_DSET_DATA_REQ(wmip->wmi_devt,
64127 +                         dsetdatareq->access_cookie,
64128 +                         dsetdatareq->offset,
64129 +                         dsetdatareq->length,
64130 +                         dsetdatareq->targ_buf,
64131 +                         dsetdatareq->targ_reply_fn,
64132 +                         dsetdatareq->targ_reply_arg);
64133 +
64134 +    return A_OK;
64135 +}
64136 +#endif /* CONFIG_HOST_DSET_SUPPORT */
64137 +
64138 +static A_STATUS
64139 +wmi_scanComplete_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64140 +{
64141 +    WMI_SCAN_COMPLETE_EVENT *ev;
64142 +
64143 +    ev = (WMI_SCAN_COMPLETE_EVENT *)datap;
64144 +    A_WMI_SCANCOMPLETE_EVENT(wmip->wmi_devt, ev->status);
64145 +
64146 +    return A_OK;
64147 +}
64148 +
64149 +/*
64150 + * Target is reporting a programming error.  This is for
64151 + * developer aid only.  Target only checks a few common violations
64152 + * and it is responsibility of host to do all error checking.
64153 + * Behavior of target after wmi error event is undefined.
64154 + * A reset is recommended.
64155 + */
64156 +static A_STATUS
64157 +wmi_errorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64158 +{
64159 +    WMI_CMD_ERROR_EVENT *ev;
64160 +
64161 +    ev = (WMI_CMD_ERROR_EVENT *)datap;
64162 +    AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Programming Error: cmd=%d ", ev->commandId));
64163 +    switch (ev->errorCode) {
64164 +    case (INVALID_PARAM):
64165 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal Parameter\n"));
64166 +        break;
64167 +    case (ILLEGAL_STATE):
64168 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Illegal State\n"));
64169 +        break;
64170 +    case (INTERNAL_ERROR):
64171 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Internal Error\n"));
64172 +        break;
64173 +    }
64174 +
64175 +    return A_OK;
64176 +}
64177 +
64178 +
64179 +static A_STATUS
64180 +wmi_statsEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64181 +{
64182 +    WMI_TARGET_STATS *reply;
64183 +
64184 +    if (len < sizeof(*reply)) {
64185 +        return A_EINVAL;
64186 +    }
64187 +    reply = (WMI_TARGET_STATS *)datap;
64188 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64189 +
64190 +    A_WMI_TARGETSTATS_EVENT(wmip->wmi_devt, reply);
64191 +
64192 +    return A_OK;
64193 +}
64194 +
64195 +static A_STATUS
64196 +wmi_rssiThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64197 +{
64198 +    WMI_RSSI_THRESHOLD_EVENT *reply;
64199 +
64200 +    if (len < sizeof(*reply)) {
64201 +        return A_EINVAL;
64202 +    }
64203 +    reply = (WMI_RSSI_THRESHOLD_EVENT *)datap;
64204 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64205 +
64206 +    A_WMI_RSSI_THRESHOLD_EVENT(wmip->wmi_devt, reply->range, reply->rssi);
64207 +
64208 +    return A_OK;
64209 +}
64210 +
64211 +
64212 +static A_STATUS
64213 +wmi_reportErrorEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64214 +{
64215 +    WMI_TARGET_ERROR_REPORT_EVENT *reply;
64216 +
64217 +    if (len < sizeof(*reply)) {
64218 +        return A_EINVAL;
64219 +    }
64220 +    reply = (WMI_TARGET_ERROR_REPORT_EVENT *)datap;
64221 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64222 +
64223 +    A_WMI_REPORT_ERROR_EVENT(wmip->wmi_devt, reply->errorVal);
64224 +
64225 +    return A_OK;
64226 +}
64227 +
64228 +static A_STATUS
64229 +wmi_cac_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64230 +{
64231 +    WMI_CAC_EVENT *reply;
64232 +
64233 +    if (len < sizeof(*reply)) {
64234 +        return A_EINVAL;
64235 +    }
64236 +    reply = (WMI_CAC_EVENT *)datap;
64237 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64238 +
64239 +    A_WMI_CAC_EVENT(wmip->wmi_devt, reply->ac,
64240 +                reply->cac_indication, reply->statusCode,
64241 +                reply->tspecSuggestion);
64242 +
64243 +    return A_OK;
64244 +}
64245 +
64246 +static A_STATUS
64247 +wmi_hbChallengeResp_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64248 +{
64249 +    WMIX_HB_CHALLENGE_RESP_EVENT *reply;
64250 +
64251 +    if (len < sizeof(*reply)) {
64252 +        return A_EINVAL;
64253 +    }
64254 +    reply = (WMIX_HB_CHALLENGE_RESP_EVENT *)datap;
64255 +    A_DPRINTF(DBG_WMI, (DBGFMT "wmi: challenge response event\n", DBGARG));
64256 +
64257 +    A_WMI_HBCHALLENGERESP_EVENT(wmip->wmi_devt, reply->cookie, reply->source);
64258 +
64259 +    return A_OK;
64260 +}
64261 +
64262 +static A_STATUS
64263 +wmi_roam_tbl_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64264 +{
64265 +    WMI_TARGET_ROAM_TBL *reply;
64266 +
64267 +    if (len < sizeof(*reply)) {
64268 +        return A_EINVAL;
64269 +    }
64270 +    reply = (WMI_TARGET_ROAM_TBL *)datap;
64271 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64272 +
64273 +    A_WMI_ROAM_TABLE_EVENT(wmip->wmi_devt, reply);
64274 +
64275 +    return A_OK;
64276 +}
64277 +
64278 +static A_STATUS
64279 +wmi_roam_data_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64280 +{
64281 +    WMI_TARGET_ROAM_DATA *reply;
64282 +
64283 +    if (len < sizeof(*reply)) {
64284 +        return A_EINVAL;
64285 +    }
64286 +    reply = (WMI_TARGET_ROAM_DATA *)datap;
64287 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64288 +
64289 +    A_WMI_ROAM_DATA_EVENT(wmip->wmi_devt, reply);
64290 +
64291 +    return A_OK;
64292 +}
64293 +
64294 +static A_STATUS
64295 +wmi_txRetryErrEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64296 +{
64297 +    WMI_TX_RETRY_ERR_EVENT *reply;
64298 +
64299 +    if (len < sizeof(*reply)) {
64300 +        return A_EINVAL;
64301 +    }
64302 +    reply = (WMI_TX_RETRY_ERR_EVENT *)datap;
64303 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64304 +
64305 +    A_WMI_TX_RETRY_ERR_EVENT(wmip->wmi_devt);
64306 +
64307 +    return A_OK;
64308 +}
64309 +
64310 +static A_STATUS
64311 +wmi_snrThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64312 +{
64313 +    WMI_SNR_THRESHOLD_EVENT *reply;
64314 +
64315 +    if (len < sizeof(*reply)) {
64316 +        return A_EINVAL;
64317 +    }
64318 +    reply = (WMI_SNR_THRESHOLD_EVENT *)datap;
64319 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64320 +
64321 +    A_WMI_SNR_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->snr);
64322 +
64323 +    return A_OK;
64324 +}
64325 +
64326 +static A_STATUS
64327 +wmi_lqThresholdEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64328 +{
64329 +    WMI_LQ_THRESHOLD_EVENT *reply;
64330 +
64331 +    if (len < sizeof(*reply)) {
64332 +        return A_EINVAL;
64333 +    }
64334 +    reply = (WMI_LQ_THRESHOLD_EVENT *)datap;
64335 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64336 +
64337 +    A_WMI_LQ_THRESHOLD_EVENT_RX(wmip->wmi_devt, reply->range, reply->lq);
64338 +
64339 +    return A_OK;
64340 +}
64341 +
64342 +static A_STATUS
64343 +wmi_aplistEvent_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64344 +{
64345 +    A_UINT16 ap_info_entry_size;
64346 +    WMI_APLIST_EVENT *ev = (WMI_APLIST_EVENT *)datap;
64347 +    WMI_AP_INFO_V1 *ap_info_v1;
64348 +    A_UINT8 i;
64349 +
64350 +    if (len < sizeof(WMI_APLIST_EVENT)) {
64351 +        return A_EINVAL;
64352 +    }
64353 +
64354 +    if (ev->apListVer == APLIST_VER1) {
64355 +        ap_info_entry_size = sizeof(WMI_AP_INFO_V1);
64356 +        ap_info_v1 = (WMI_AP_INFO_V1 *)ev->apList;
64357 +    } else {
64358 +        return A_EINVAL;
64359 +    }
64360 +
64361 +    AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("Number of APs in APLIST Event is %d\n", ev->numAP));
64362 +    if (len < (int)(sizeof(WMI_APLIST_EVENT) +
64363 +              (ev->numAP - 1) * ap_info_entry_size))
64364 +    {
64365 +        return A_EINVAL;
64366 +    }
64367 +
64368 +    /*
64369 +     * AP List Ver1 Contents
64370 +     */
64371 +    for (i = 0; i < ev->numAP; i++) {
64372 +        AR_DEBUG_PRINTF(ATH_DEBUG_WMI, ("AP#%d BSSID %2.2x %2.2x %2.2x %2.2x %2.2x %2.2x "\
64373 +                    "Channel %d\n", i,
64374 +                   ap_info_v1->bssid[0], ap_info_v1->bssid[1],
64375 +                   ap_info_v1->bssid[2], ap_info_v1->bssid[3],
64376 +                   ap_info_v1->bssid[4], ap_info_v1->bssid[5],
64377 +                   ap_info_v1->channel));
64378 +        ap_info_v1++;
64379 +    }
64380 +    return A_OK;
64381 +}
64382 +
64383 +static A_STATUS
64384 +wmi_dbglog_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64385 +{
64386 +    A_UINT32 dropped;
64387 +
64388 +    dropped = *((A_UINT32 *)datap);
64389 +    datap += sizeof(dropped);
64390 +    len -= sizeof(dropped);
64391 +    A_WMI_DBGLOG_EVENT(wmip->wmi_devt, dropped, datap, len);
64392 +    return A_OK;
64393 +}
64394 +
64395 +#ifdef CONFIG_HOST_GPIO_SUPPORT
64396 +static A_STATUS
64397 +wmi_gpio_intr_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64398 +{
64399 +    WMIX_GPIO_INTR_EVENT *gpio_intr = (WMIX_GPIO_INTR_EVENT *)datap;
64400 +
64401 +    A_DPRINTF(DBG_WMI,
64402 +        (DBGFMT "Enter - intrmask=0x%x input=0x%x.\n", DBGARG,
64403 +        gpio_intr->intr_mask, gpio_intr->input_values));
64404 +
64405 +    A_WMI_GPIO_INTR_RX(gpio_intr->intr_mask, gpio_intr->input_values);
64406 +
64407 +    return A_OK;
64408 +}
64409 +
64410 +static A_STATUS
64411 +wmi_gpio_data_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64412 +{
64413 +    WMIX_GPIO_DATA_EVENT *gpio_data = (WMIX_GPIO_DATA_EVENT *)datap;
64414 +
64415 +    A_DPRINTF(DBG_WMI,
64416 +        (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG,
64417 +        gpio_data->reg_id, gpio_data->value));
64418 +
64419 +    A_WMI_GPIO_DATA_RX(gpio_data->reg_id, gpio_data->value);
64420 +
64421 +    return A_OK;
64422 +}
64423 +
64424 +static A_STATUS
64425 +wmi_gpio_ack_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
64426 +{
64427 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
64428 +
64429 +    A_WMI_GPIO_ACK_RX();
64430 +
64431 +    return A_OK;
64432 +}
64433 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
64434 +
64435 +/*
64436 + * Called to send a wmi command. Command specific data is already built
64437 + * on osbuf and current osbuf->data points to it.
64438 + */
64439 +A_STATUS
64440 +wmi_cmd_send(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
64441 +               WMI_SYNC_FLAG syncflag)
64442 +{
64443 +#define IS_LONG_CMD(cmdId) ((cmdId == WMI_OPT_TX_FRAME_CMDID) || (cmdId == WMI_ADD_WOW_PATTERN_CMDID))
64444 +    WMI_CMD_HDR         *cHdr;
64445 +    WMI_PRI_STREAM_ID   streamID = WMI_CONTROL_PRI;
64446 +
64447 +    A_ASSERT(osbuf != NULL);
64448 +
64449 +    if (syncflag >= END_WMIFLAG) {
64450 +        return A_EINVAL;
64451 +    }
64452 +
64453 +    if ((syncflag == SYNC_BEFORE_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) {
64454 +        /*
64455 +         * We want to make sure all data currently queued is transmitted before
64456 +         * the cmd execution.  Establish a new sync point.
64457 +         */
64458 +        wmi_sync_point(wmip);
64459 +    }
64460 +
64461 +    if (A_NETBUF_PUSH(osbuf, sizeof(WMI_CMD_HDR)) != A_OK) {
64462 +        return A_NO_MEMORY;
64463 +    }
64464 +
64465 +    cHdr = (WMI_CMD_HDR *)A_NETBUF_DATA(osbuf);
64466 +    cHdr->commandId = cmdId;
64467 +
64468 +    /*
64469 +     * Send cmd, some via control pipe, others via data pipe
64470 +     */
64471 +    if (IS_LONG_CMD(cmdId)) {
64472 +        wmi_data_hdr_add(wmip, osbuf, CNTL_MSGTYPE);
64473 +        // TODO ... these can now go through the control endpoint via HTC 2.0
64474 +        streamID = WMI_BEST_EFFORT_PRI;
64475 +    }
64476 +    A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID);
64477 +
64478 +    if ((syncflag == SYNC_AFTER_WMIFLAG) || (syncflag == SYNC_BOTH_WMIFLAG)) {
64479 +        /*
64480 +         * We want to make sure all new data queued waits for the command to
64481 +         * execute. Establish a new sync point.
64482 +         */
64483 +        wmi_sync_point(wmip);
64484 +    }
64485 +    return (A_OK);
64486 +#undef IS_LONG_CMD
64487 +}
64488 +
64489 +A_STATUS
64490 +wmi_cmd_send_xtnd(struct wmi_t *wmip, void *osbuf, WMI_COMMAND_ID cmdId,
64491 +                  WMI_SYNC_FLAG syncflag)
64492 +{
64493 +    WMIX_CMD_HDR     *cHdr;
64494 +
64495 +    if (A_NETBUF_PUSH(osbuf, sizeof(WMIX_CMD_HDR)) != A_OK) {
64496 +        return A_NO_MEMORY;
64497 +    }
64498 +
64499 +    cHdr = (WMIX_CMD_HDR *)A_NETBUF_DATA(osbuf);
64500 +    cHdr->commandId = cmdId;
64501 +
64502 +    return wmi_cmd_send(wmip, osbuf, WMI_EXTENSION_CMDID, syncflag);
64503 +}
64504 +
64505 +A_STATUS
64506 +wmi_connect_cmd(struct wmi_t *wmip, NETWORK_TYPE netType,
64507 +                DOT11_AUTH_MODE dot11AuthMode, AUTH_MODE authMode,
64508 +                CRYPTO_TYPE pairwiseCrypto, A_UINT8 pairwiseCryptoLen,
64509 +                CRYPTO_TYPE groupCrypto,A_UINT8 groupCryptoLen,
64510 +                int ssidLength, A_UCHAR *ssid,
64511 +                A_UINT8 *bssid, A_UINT16 channel, A_UINT32 ctrl_flags)
64512 +{
64513 +    void *osbuf;
64514 +    WMI_CONNECT_CMD *cc;
64515 +
64516 +    if ((pairwiseCrypto == NONE_CRYPT) && (groupCrypto != NONE_CRYPT)) {
64517 +        return A_EINVAL;
64518 +    }
64519 +    if ((pairwiseCrypto != NONE_CRYPT) && (groupCrypto == NONE_CRYPT)) {
64520 +        return A_EINVAL;
64521 +    }
64522 +
64523 +    osbuf = A_NETBUF_ALLOC(sizeof(WMI_CONNECT_CMD));
64524 +    if (osbuf == NULL) {
64525 +        return A_NO_MEMORY;
64526 +    }
64527 +
64528 +    A_NETBUF_PUT(osbuf, sizeof(WMI_CONNECT_CMD));
64529 +
64530 +    cc = (WMI_CONNECT_CMD *)(A_NETBUF_DATA(osbuf));
64531 +    A_MEMZERO(cc, sizeof(*cc));
64532 +
64533 +    A_MEMCPY(cc->ssid, ssid, ssidLength);
64534 +    cc->ssidLength          = ssidLength;
64535 +    cc->networkType         = netType;
64536 +    cc->dot11AuthMode       = dot11AuthMode;
64537 +    cc->authMode            = authMode;
64538 +    cc->pairwiseCryptoType  = pairwiseCrypto;
64539 +    cc->pairwiseCryptoLen   = pairwiseCryptoLen;
64540 +    cc->groupCryptoType     = groupCrypto;
64541 +    cc->groupCryptoLen      = groupCryptoLen;
64542 +    cc->channel             = channel;
64543 +    cc->ctrl_flags          = ctrl_flags;
64544 +
64545 +    if (bssid != NULL) {
64546 +        A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN);
64547 +    }
64548 +    if (wmi_set_keepalive_cmd(wmip, wmip->wmi_keepaliveInterval) != A_OK) {
64549 +        return(A_ERROR);
64550 +    }
64551 +
64552 +    return (wmi_cmd_send(wmip, osbuf, WMI_CONNECT_CMDID, NO_SYNC_WMIFLAG));
64553 +}
64554 +
64555 +A_STATUS
64556 +wmi_reconnect_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT16 channel)
64557 +{
64558 +    void *osbuf;
64559 +    WMI_RECONNECT_CMD *cc;
64560 +
64561 +    osbuf = A_NETBUF_ALLOC(sizeof(WMI_RECONNECT_CMD));
64562 +    if (osbuf == NULL) {
64563 +        return A_NO_MEMORY;
64564 +    }
64565 +
64566 +    A_NETBUF_PUT(osbuf, sizeof(WMI_RECONNECT_CMD));
64567 +
64568 +    cc = (WMI_RECONNECT_CMD *)(A_NETBUF_DATA(osbuf));
64569 +    A_MEMZERO(cc, sizeof(*cc));
64570 +
64571 +    cc->channel = channel;
64572 +
64573 +    if (bssid != NULL) {
64574 +        A_MEMCPY(cc->bssid, bssid, ATH_MAC_LEN);
64575 +    }
64576 +
64577 +    return (wmi_cmd_send(wmip, osbuf, WMI_RECONNECT_CMDID, NO_SYNC_WMIFLAG));
64578 +}
64579 +
64580 +A_STATUS
64581 +wmi_disconnect_cmd(struct wmi_t *wmip)
64582 +{
64583 +    void *osbuf;
64584 +    A_STATUS status;
64585 +
64586 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
64587 +    if (osbuf == NULL) {
64588 +        return A_NO_MEMORY;
64589 +    }
64590 +
64591 +    /* Bug fix for 24817(elevator bug) - the disconnect command does not
64592 +       need to do a SYNC before.*/
64593 +    status = (wmi_cmd_send(wmip, osbuf, WMI_DISCONNECT_CMDID,
64594 +                         NO_SYNC_WMIFLAG));
64595 +
64596 +    return status;
64597 +}
64598 +
64599 +A_STATUS
64600 +wmi_startscan_cmd(struct wmi_t *wmip, WMI_SCAN_TYPE scanType,
64601 +                  A_BOOL forceFgScan, A_BOOL isLegacy,
64602 +                  A_UINT32 homeDwellTime, A_UINT32 forceScanInterval)
64603 +{
64604 +    void *osbuf;
64605 +    WMI_START_SCAN_CMD *sc;
64606 +
64607 +    if ((scanType != WMI_LONG_SCAN) && (scanType != WMI_SHORT_SCAN)) {
64608 +        return A_EINVAL;
64609 +    }
64610 +
64611 +    osbuf = A_NETBUF_ALLOC(sizeof(*sc));
64612 +    if (osbuf == NULL) {
64613 +        return A_NO_MEMORY;
64614 +    }
64615 +
64616 +    A_NETBUF_PUT(osbuf, sizeof(*sc));
64617 +
64618 +    sc = (WMI_START_SCAN_CMD *)(A_NETBUF_DATA(osbuf));
64619 +    sc->scanType = scanType;
64620 +    sc->forceFgScan = forceFgScan;
64621 +    sc->isLegacy = isLegacy;
64622 +    sc->homeDwellTime = homeDwellTime;
64623 +    sc->forceScanInterval = forceScanInterval;
64624 +
64625 +    return (wmi_cmd_send(wmip, osbuf, WMI_START_SCAN_CMDID, NO_SYNC_WMIFLAG));
64626 +}
64627 +
64628 +A_STATUS
64629 +wmi_scanparams_cmd(struct wmi_t *wmip, A_UINT16 fg_start_sec,
64630 +                   A_UINT16 fg_end_sec, A_UINT16 bg_sec,
64631 +                   A_UINT16 minact_chdw_msec, A_UINT16 maxact_chdw_msec,
64632 +                   A_UINT16 pas_chdw_msec,
64633 +                   A_UINT8 shScanRatio, A_UINT8 scanCtrlFlags,
64634 +                   A_UINT32 max_dfsch_act_time)
64635 +{
64636 +    void *osbuf;
64637 +    WMI_SCAN_PARAMS_CMD *sc;
64638 +
64639 +    osbuf = A_NETBUF_ALLOC(sizeof(*sc));
64640 +    if (osbuf == NULL) {
64641 +        return A_NO_MEMORY;
64642 +    }
64643 +
64644 +    A_NETBUF_PUT(osbuf, sizeof(*sc));
64645 +
64646 +    sc = (WMI_SCAN_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
64647 +    A_MEMZERO(sc, sizeof(*sc));
64648 +    sc->fg_start_period  = fg_start_sec;
64649 +    sc->fg_end_period    = fg_end_sec;
64650 +    sc->bg_period        = bg_sec;
64651 +    sc->minact_chdwell_time = minact_chdw_msec;
64652 +    sc->maxact_chdwell_time = maxact_chdw_msec;
64653 +    sc->pas_chdwell_time = pas_chdw_msec;
64654 +    sc->shortScanRatio   = shScanRatio;
64655 +    sc->scanCtrlFlags    = scanCtrlFlags;
64656 +    sc->max_dfsch_act_time = max_dfsch_act_time;
64657 +
64658 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_SCAN_PARAMS_CMDID,
64659 +                         NO_SYNC_WMIFLAG));
64660 +}
64661 +
64662 +A_STATUS
64663 +wmi_bssfilter_cmd(struct wmi_t *wmip, A_UINT8 filter, A_UINT32 ieMask)
64664 +{
64665 +    void *osbuf;
64666 +    WMI_BSS_FILTER_CMD *cmd;
64667 +
64668 +    if (filter >= LAST_BSS_FILTER) {
64669 +        return A_EINVAL;
64670 +    }
64671 +
64672 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64673 +    if (osbuf == NULL) {
64674 +        return A_NO_MEMORY;
64675 +    }
64676 +
64677 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64678 +
64679 +    cmd = (WMI_BSS_FILTER_CMD *)(A_NETBUF_DATA(osbuf));
64680 +    A_MEMZERO(cmd, sizeof(*cmd));
64681 +    cmd->bssFilter = filter;
64682 +    cmd->ieMask = ieMask;
64683 +
64684 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BSS_FILTER_CMDID,
64685 +                         NO_SYNC_WMIFLAG));
64686 +}
64687 +
64688 +A_STATUS
64689 +wmi_probedSsid_cmd(struct wmi_t *wmip, A_UINT8 index, A_UINT8 flag,
64690 +                   A_UINT8 ssidLength, A_UCHAR *ssid)
64691 +{
64692 +    void *osbuf;
64693 +    WMI_PROBED_SSID_CMD *cmd;
64694 +
64695 +    if (index > MAX_PROBED_SSID_INDEX) {
64696 +        return A_EINVAL;
64697 +    }
64698 +    if (ssidLength > sizeof(cmd->ssid)) {
64699 +        return A_EINVAL;
64700 +    }
64701 +    if ((flag & (DISABLE_SSID_FLAG | ANY_SSID_FLAG)) && (ssidLength > 0)) {
64702 +        return A_EINVAL;
64703 +    }
64704 +    if ((flag & SPECIFIC_SSID_FLAG) && !ssidLength) {
64705 +        return A_EINVAL;
64706 +    }
64707 +
64708 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64709 +    if (osbuf == NULL) {
64710 +        return A_NO_MEMORY;
64711 +    }
64712 +
64713 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64714 +
64715 +    cmd = (WMI_PROBED_SSID_CMD *)(A_NETBUF_DATA(osbuf));
64716 +    A_MEMZERO(cmd, sizeof(*cmd));
64717 +    cmd->entryIndex = index;
64718 +    cmd->flag       = flag;
64719 +    cmd->ssidLength = ssidLength;
64720 +    A_MEMCPY(cmd->ssid, ssid, ssidLength);
64721 +
64722 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_PROBED_SSID_CMDID,
64723 +                         NO_SYNC_WMIFLAG));
64724 +}
64725 +
64726 +A_STATUS
64727 +wmi_listeninterval_cmd(struct wmi_t *wmip, A_UINT16 listenInterval, A_UINT16 listenBeacons)
64728 +{
64729 +    void *osbuf;
64730 +    WMI_LISTEN_INT_CMD *cmd;
64731 +
64732 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64733 +    if (osbuf == NULL) {
64734 +        return A_NO_MEMORY;
64735 +    }
64736 +
64737 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64738 +
64739 +    cmd = (WMI_LISTEN_INT_CMD *)(A_NETBUF_DATA(osbuf));
64740 +    A_MEMZERO(cmd, sizeof(*cmd));
64741 +    cmd->listenInterval = listenInterval;
64742 +    cmd->numBeacons = listenBeacons;
64743 +
64744 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_LISTEN_INT_CMDID,
64745 +                         NO_SYNC_WMIFLAG));
64746 +}
64747 +
64748 +A_STATUS
64749 +wmi_bmisstime_cmd(struct wmi_t *wmip, A_UINT16 bmissTime, A_UINT16 bmissBeacons)
64750 +{
64751 +    void *osbuf;
64752 +    WMI_BMISS_TIME_CMD *cmd;
64753 +
64754 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64755 +    if (osbuf == NULL) {
64756 +        return A_NO_MEMORY;
64757 +    }
64758 +
64759 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64760 +
64761 +    cmd = (WMI_BMISS_TIME_CMD *)(A_NETBUF_DATA(osbuf));
64762 +    A_MEMZERO(cmd, sizeof(*cmd));
64763 +    cmd->bmissTime = bmissTime;
64764 +    cmd->numBeacons =  bmissBeacons;
64765 +
64766 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BMISS_TIME_CMDID,
64767 +                         NO_SYNC_WMIFLAG));
64768 +}
64769 +
64770 +A_STATUS
64771 +wmi_associnfo_cmd(struct wmi_t *wmip, A_UINT8 ieType,
64772 +                     A_UINT8 ieLen, A_UINT8 *ieInfo)
64773 +{
64774 +    void *osbuf;
64775 +    WMI_SET_ASSOC_INFO_CMD *cmd;
64776 +    A_UINT16 cmdLen;
64777 +
64778 +    cmdLen = sizeof(*cmd) + ieLen - 1;
64779 +    osbuf = A_NETBUF_ALLOC(cmdLen);
64780 +    if (osbuf == NULL) {
64781 +        return A_NO_MEMORY;
64782 +    }
64783 +
64784 +    A_NETBUF_PUT(osbuf, cmdLen);
64785 +
64786 +    cmd = (WMI_SET_ASSOC_INFO_CMD *)(A_NETBUF_DATA(osbuf));
64787 +    A_MEMZERO(cmd, cmdLen);
64788 +    cmd->ieType = ieType;
64789 +    cmd->bufferSize = ieLen;
64790 +    A_MEMCPY(cmd->assocInfo, ieInfo, ieLen);
64791 +
64792 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_ASSOC_INFO_CMDID,
64793 +                         NO_SYNC_WMIFLAG));
64794 +}
64795 +
64796 +A_STATUS
64797 +wmi_powermode_cmd(struct wmi_t *wmip, A_UINT8 powerMode)
64798 +{
64799 +    void *osbuf;
64800 +    WMI_POWER_MODE_CMD *cmd;
64801 +
64802 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64803 +    if (osbuf == NULL) {
64804 +        return A_NO_MEMORY;
64805 +    }
64806 +
64807 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64808 +
64809 +    cmd = (WMI_POWER_MODE_CMD *)(A_NETBUF_DATA(osbuf));
64810 +    A_MEMZERO(cmd, sizeof(*cmd));
64811 +    cmd->powerMode = powerMode;
64812 +    wmip->wmi_powerMode = powerMode;
64813 +
64814 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_MODE_CMDID,
64815 +                         NO_SYNC_WMIFLAG));
64816 +}
64817 +
64818 +A_STATUS
64819 +wmi_ibsspmcaps_cmd(struct wmi_t *wmip, A_UINT8 pmEnable, A_UINT8 ttl,
64820 +                   A_UINT16 atim_windows, A_UINT16 timeout_value)
64821 +{
64822 +    void *osbuf;
64823 +    WMI_IBSS_PM_CAPS_CMD *cmd;
64824 +
64825 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64826 +    if (osbuf == NULL) {
64827 +        return A_NO_MEMORY;
64828 +    }
64829 +
64830 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64831 +
64832 +    cmd = (WMI_IBSS_PM_CAPS_CMD *)(A_NETBUF_DATA(osbuf));
64833 +    A_MEMZERO(cmd, sizeof(*cmd));
64834 +    cmd->power_saving = pmEnable;
64835 +    cmd->ttl = ttl;
64836 +    cmd->atim_windows = atim_windows;
64837 +    cmd->timeout_value = timeout_value;
64838 +
64839 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_IBSS_PM_CAPS_CMDID,
64840 +                         NO_SYNC_WMIFLAG));
64841 +}
64842 +
64843 +A_STATUS
64844 +wmi_pmparams_cmd(struct wmi_t *wmip, A_UINT16 idlePeriod,
64845 +                 A_UINT16 psPollNum, A_UINT16 dtimPolicy)
64846 +{
64847 +    void *osbuf;
64848 +    WMI_POWER_PARAMS_CMD *pm;
64849 +
64850 +    osbuf = A_NETBUF_ALLOC(sizeof(*pm));
64851 +    if (osbuf == NULL) {
64852 +        return A_NO_MEMORY;
64853 +    }
64854 +
64855 +    A_NETBUF_PUT(osbuf, sizeof(*pm));
64856 +
64857 +    pm = (WMI_POWER_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
64858 +    A_MEMZERO(pm, sizeof(*pm));
64859 +    pm->idle_period   = idlePeriod;
64860 +    pm->pspoll_number = psPollNum;
64861 +    pm->dtim_policy   = dtimPolicy;
64862 +
64863 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWER_PARAMS_CMDID,
64864 +                         NO_SYNC_WMIFLAG));
64865 +}
64866 +
64867 +A_STATUS
64868 +wmi_disctimeout_cmd(struct wmi_t *wmip, A_UINT8 timeout)
64869 +{
64870 +    void *osbuf;
64871 +    WMI_DISC_TIMEOUT_CMD *cmd;
64872 +
64873 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64874 +    if (osbuf == NULL) {
64875 +        return A_NO_MEMORY;
64876 +    }
64877 +
64878 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64879 +
64880 +    cmd = (WMI_DISC_TIMEOUT_CMD *)(A_NETBUF_DATA(osbuf));
64881 +    A_MEMZERO(cmd, sizeof(*cmd));
64882 +    cmd->disconnectTimeout = timeout;
64883 +
64884 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_DISC_TIMEOUT_CMDID,
64885 +                         NO_SYNC_WMIFLAG));
64886 +}
64887 +
64888 +A_STATUS
64889 +wmi_addKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex, CRYPTO_TYPE keyType,
64890 +               A_UINT8 keyUsage, A_UINT8 keyLength, A_UINT8 *keyRSC,
64891 +               A_UINT8 *keyMaterial, A_UINT8 key_op_ctrl,
64892 +               WMI_SYNC_FLAG sync_flag)
64893 +{
64894 +    void *osbuf;
64895 +    WMI_ADD_CIPHER_KEY_CMD *cmd;
64896 +
64897 +    if ((keyIndex > WMI_MAX_KEY_INDEX) || (keyLength > WMI_MAX_KEY_LEN) ||
64898 +        (keyMaterial == NULL))
64899 +    {
64900 +        return A_EINVAL;
64901 +    }
64902 +
64903 +    if ((WEP_CRYPT != keyType) && (NULL == keyRSC)) {
64904 +        return A_EINVAL;
64905 +    }
64906 +
64907 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64908 +    if (osbuf == NULL) {
64909 +        return A_NO_MEMORY;
64910 +    }
64911 +
64912 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64913 +
64914 +    cmd = (WMI_ADD_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf));
64915 +    A_MEMZERO(cmd, sizeof(*cmd));
64916 +    cmd->keyIndex = keyIndex;
64917 +    cmd->keyType  = keyType;
64918 +    cmd->keyUsage = keyUsage;
64919 +    cmd->keyLength = keyLength;
64920 +    A_MEMCPY(cmd->key, keyMaterial, keyLength);
64921 +    if (NULL != keyRSC) {
64922 +        A_MEMCPY(cmd->keyRSC, keyRSC, sizeof(cmd->keyRSC));
64923 +    }
64924 +    cmd->key_op_ctrl = key_op_ctrl;
64925 +
64926 +    return (wmi_cmd_send(wmip, osbuf, WMI_ADD_CIPHER_KEY_CMDID, sync_flag));
64927 +}
64928 +
64929 +A_STATUS
64930 +wmi_add_krk_cmd(struct wmi_t *wmip, A_UINT8 *krk)
64931 +{
64932 +    void *osbuf;
64933 +    WMI_ADD_KRK_CMD *cmd;
64934 +
64935 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64936 +
64937 +    if (osbuf == NULL) {
64938 +        return A_NO_MEMORY;
64939 +    }
64940 +
64941 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64942 +
64943 +    cmd = (WMI_ADD_KRK_CMD *)(A_NETBUF_DATA(osbuf));
64944 +    A_MEMZERO(cmd, sizeof(*cmd));
64945 +    A_MEMCPY(cmd->krk, krk, WMI_KRK_LEN);
64946 +
64947 +    return (wmi_cmd_send(wmip, osbuf, WMI_ADD_KRK_CMDID, NO_SYNC_WMIFLAG));
64948 +}
64949 +
64950 +A_STATUS
64951 +wmi_delete_krk_cmd(struct wmi_t *wmip)
64952 +{
64953 +    void *osbuf;
64954 +
64955 +    osbuf = A_NETBUF_ALLOC(0);
64956 +
64957 +    if (osbuf == NULL) {
64958 +        return A_NO_MEMORY;
64959 +    }
64960 +
64961 +    return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_KRK_CMDID, NO_SYNC_WMIFLAG));
64962 +}
64963 +
64964 +A_STATUS
64965 +wmi_deleteKey_cmd(struct wmi_t *wmip, A_UINT8 keyIndex)
64966 +{
64967 +    void *osbuf;
64968 +    WMI_DELETE_CIPHER_KEY_CMD *cmd;
64969 +
64970 +    if (keyIndex > WMI_MAX_KEY_INDEX) {
64971 +        return A_EINVAL;
64972 +    }
64973 +
64974 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
64975 +    if (osbuf == NULL) {
64976 +        return A_NO_MEMORY;
64977 +    }
64978 +
64979 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
64980 +
64981 +    cmd = (WMI_DELETE_CIPHER_KEY_CMD *)(A_NETBUF_DATA(osbuf));
64982 +    A_MEMZERO(cmd, sizeof(*cmd));
64983 +    cmd->keyIndex = keyIndex;
64984 +
64985 +    return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_CIPHER_KEY_CMDID,
64986 +                         NO_SYNC_WMIFLAG));
64987 +}
64988 +
64989 +A_STATUS
64990 +wmi_setPmkid_cmd(struct wmi_t *wmip, A_UINT8 *bssid, A_UINT8 *pmkId,
64991 +                 A_BOOL set)
64992 +{
64993 +    void *osbuf;
64994 +    WMI_SET_PMKID_CMD *cmd;
64995 +
64996 +    if (bssid == NULL) {
64997 +        return A_EINVAL;
64998 +    }
64999 +
65000 +    if ((set == TRUE) && (pmkId == NULL)) {
65001 +        return A_EINVAL;
65002 +    }
65003 +
65004 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65005 +    if (osbuf == NULL) {
65006 +        return A_NO_MEMORY;
65007 +    }
65008 +
65009 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65010 +
65011 +    cmd = (WMI_SET_PMKID_CMD *)(A_NETBUF_DATA(osbuf));
65012 +    A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
65013 +    if (set == TRUE) {
65014 +        A_MEMCPY(cmd->pmkid, pmkId, sizeof(cmd->pmkid));
65015 +        cmd->enable = PMKID_ENABLE;
65016 +    } else {
65017 +        A_MEMZERO(cmd->pmkid, sizeof(cmd->pmkid));
65018 +        cmd->enable = PMKID_DISABLE;
65019 +    }
65020 +
65021 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_CMDID, NO_SYNC_WMIFLAG));
65022 +}
65023 +
65024 +A_STATUS
65025 +wmi_set_tkip_countermeasures_cmd(struct wmi_t *wmip, A_BOOL en)
65026 +{
65027 +    void *osbuf;
65028 +    WMI_SET_TKIP_COUNTERMEASURES_CMD *cmd;
65029 +
65030 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65031 +    if (osbuf == NULL) {
65032 +        return A_NO_MEMORY;
65033 +    }
65034 +
65035 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65036 +
65037 +    cmd = (WMI_SET_TKIP_COUNTERMEASURES_CMD *)(A_NETBUF_DATA(osbuf));
65038 +    cmd->cm_en = (en == TRUE)? WMI_TKIP_CM_ENABLE : WMI_TKIP_CM_DISABLE;
65039 +
65040 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_TKIP_COUNTERMEASURES_CMDID,
65041 +            NO_SYNC_WMIFLAG));
65042 +}
65043 +
65044 +A_STATUS
65045 +wmi_set_akmp_params_cmd(struct wmi_t *wmip,
65046 +                        WMI_SET_AKMP_PARAMS_CMD *akmpParams)
65047 +{
65048 +    void *osbuf;
65049 +    WMI_SET_AKMP_PARAMS_CMD *cmd;
65050 +
65051 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65052 +    if (osbuf == NULL) {
65053 +        return A_NO_MEMORY;
65054 +    }
65055 +
65056 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65057 +    cmd = (WMI_SET_AKMP_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
65058 +    cmd->akmpInfo = akmpParams->akmpInfo;
65059 +
65060 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_AKMP_PARAMS_CMDID,
65061 +            NO_SYNC_WMIFLAG));
65062 +}
65063 +
65064 +A_STATUS
65065 +wmi_set_pmkid_list_cmd(struct wmi_t *wmip,
65066 +                       WMI_SET_PMKID_LIST_CMD *pmkInfo)
65067 +{
65068 +    void *osbuf;
65069 +    WMI_SET_PMKID_LIST_CMD *cmd;
65070 +    A_UINT16 cmdLen;
65071 +    A_UINT8 i;
65072 +
65073 +    cmdLen = sizeof(pmkInfo->numPMKID) +
65074 +             pmkInfo->numPMKID * sizeof(WMI_PMKID);
65075 +
65076 +    osbuf = A_NETBUF_ALLOC(cmdLen);
65077 +
65078 +    if (osbuf == NULL) {
65079 +        return A_NO_MEMORY;
65080 +    }
65081 +
65082 +    A_NETBUF_PUT(osbuf, cmdLen);
65083 +    cmd = (WMI_SET_PMKID_LIST_CMD *)(A_NETBUF_DATA(osbuf));
65084 +    cmd->numPMKID = pmkInfo->numPMKID;
65085 +
65086 +    for (i = 0; i < cmd->numPMKID; i++) {
65087 +        A_MEMCPY(&cmd->pmkidList[i], &pmkInfo->pmkidList[i],
65088 +                 WMI_PMKID_LEN);
65089 +    }
65090 +
65091 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_PMKID_LIST_CMDID,
65092 +            NO_SYNC_WMIFLAG));
65093 +}
65094 +
65095 +A_STATUS
65096 +wmi_get_pmkid_list_cmd(struct wmi_t *wmip)
65097 +{
65098 +    void *osbuf;
65099 +
65100 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65101 +    if (osbuf == NULL) {
65102 +        return A_NO_MEMORY;
65103 +    }
65104 +
65105 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_PMKID_LIST_CMDID,
65106 +                         NO_SYNC_WMIFLAG));
65107 +}
65108 +
65109 +A_STATUS
65110 +wmi_dataSync_send(struct wmi_t *wmip, void *osbuf, WMI_PRI_STREAM_ID streamID)
65111 +{
65112 +    WMI_DATA_HDR     *dtHdr;
65113 +
65114 +    A_ASSERT(streamID != WMI_CONTROL_PRI);
65115 +    A_ASSERT(osbuf != NULL);
65116 +
65117 +    if (A_NETBUF_PUSH(osbuf, sizeof(WMI_DATA_HDR)) != A_OK) {
65118 +        return A_NO_MEMORY;
65119 +    }
65120 +
65121 +    dtHdr = (WMI_DATA_HDR *)A_NETBUF_DATA(osbuf);
65122 +    dtHdr->info =
65123 +      (SYNC_MSGTYPE & WMI_DATA_HDR_MSG_TYPE_MASK) << WMI_DATA_HDR_MSG_TYPE_SHIFT;
65124 +
65125 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter - streamID %d\n", DBGARG, streamID));
65126 +
65127 +    return (A_WMI_CONTROL_TX(wmip->wmi_devt, osbuf, streamID));
65128 +}
65129 +
65130 +typedef struct _WMI_DATA_SYNC_BUFS {
65131 +    A_UINT8            trafficClass;
65132 +    void               *osbuf;
65133 +}WMI_DATA_SYNC_BUFS;
65134 +
65135 +static A_STATUS
65136 +wmi_sync_point(struct wmi_t *wmip)
65137 +{
65138 +       void *cmd_osbuf;
65139 +    WMI_DATA_SYNC_BUFS dataSyncBufs[WMM_NUM_AC];
65140 +       A_UINT8 i,numPriStreams=0;
65141 +       A_STATUS status;
65142 +
65143 +       A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
65144 +
65145 +    memset(dataSyncBufs,0,sizeof(dataSyncBufs));
65146 +
65147 +    /* lock out while we walk through the priority list and assemble our local array */
65148 +    LOCK_WMI(wmip);
65149 +
65150 +    for (i=0; i < WMM_NUM_AC ; i++) {
65151 +               if (wmip->wmi_fatPipeExists & (1 << i)) {
65152 +            numPriStreams++;
65153 +            dataSyncBufs[numPriStreams-1].trafficClass = i;
65154 +        }
65155 +    }
65156 +
65157 +    UNLOCK_WMI(wmip);
65158 +
65159 +    /* dataSyncBufs is now filled with entries (starting at index 0) containing valid streamIDs */
65160 +
65161 +    do {
65162 +           /*
65163 +            * We allocate all network buffers needed so we will be able to
65164 +            * send all required frames.
65165 +            */
65166 +           cmd_osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65167 +           if (cmd_osbuf == NULL) {
65168 +                   status = A_NO_MEMORY;
65169 +            break;
65170 +           }
65171 +
65172 +           for (i=0; i < numPriStreams ; i++) {
65173 +               dataSyncBufs[i].osbuf = A_NETBUF_ALLOC(0);
65174 +            if (dataSyncBufs[i].osbuf == NULL) {
65175 +                status = A_NO_MEMORY;
65176 +                break;
65177 +            }
65178 +           } //end for
65179 +
65180 +           /*
65181 +            * Send sync cmd followed by sync data messages on all endpoints being
65182 +            * used
65183 +            */
65184 +           status = wmi_cmd_send(wmip, cmd_osbuf, WMI_SYNCHRONIZE_CMDID,
65185 +                                                 NO_SYNC_WMIFLAG);
65186 +
65187 +        if (A_FAILED(status)) {
65188 +            break;
65189 +        }
65190 +            /* cmd buffer sent, we no longer own it */
65191 +        cmd_osbuf = NULL;
65192 +
65193 +               for(i=0; i < numPriStreams; i++) {
65194 +            A_ASSERT(dataSyncBufs[i].osbuf != NULL);
65195 +
65196 +            status = wmi_dataSync_send(wmip, dataSyncBufs[i].osbuf,
65197 +                        WMI_ACCESSCATEGORY_WMISTREAM(wmip,dataSyncBufs[i].trafficClass));
65198 +
65199 +            if (A_FAILED(status)) {
65200 +                break;
65201 +            }
65202 +            /* we don't own this buffer anymore, NULL it out of the array so it
65203 +             * won't get cleaned up */
65204 +            dataSyncBufs[i].osbuf = NULL;
65205 +               } //end for
65206 +
65207 +    } while(FALSE);
65208 +
65209 +    /* free up any resources left over (possibly due to an error) */
65210 +
65211 +    if (cmd_osbuf != NULL) {
65212 +        A_NETBUF_FREE(cmd_osbuf);
65213 +    }
65214 +
65215 +    for (i = 0; i < numPriStreams; i++) {
65216 +        if (dataSyncBufs[i].osbuf != NULL) {
65217 +            A_NETBUF_FREE(dataSyncBufs[i].osbuf);
65218 +        }
65219 +    }
65220 +
65221 +       return (status);
65222 +}
65223 +
65224 +A_STATUS
65225 +wmi_create_pstream_cmd(struct wmi_t *wmip, WMI_CREATE_PSTREAM_CMD *params)
65226 +{
65227 +    void *osbuf;
65228 +    WMI_CREATE_PSTREAM_CMD *cmd;
65229 +       A_UINT16 activeTsids=0;
65230 +    A_UINT8 fatPipeExistsForAC=0;
65231 +
65232 +    /* Validate all the parameters. */
65233 +    if( !((params->userPriority < 8) &&
65234 +         (params->userPriority <= 0x7) &&
65235 +         (convert_userPriority_to_trafficClass(params->userPriority) == params->trafficClass)  &&
65236 +         (params->trafficDirection == UPLINK_TRAFFIC ||
65237 +            params->trafficDirection == DNLINK_TRAFFIC ||
65238 +            params->trafficDirection == BIDIR_TRAFFIC) &&
65239 +         (params->trafficType == TRAFFIC_TYPE_APERIODIC ||
65240 +            params->trafficType == TRAFFIC_TYPE_PERIODIC ) &&
65241 +         (params->voicePSCapability == DISABLE_FOR_THIS_AC  ||
65242 +            params->voicePSCapability == ENABLE_FOR_THIS_AC ||
65243 +            params->voicePSCapability == ENABLE_FOR_ALL_AC) &&
65244 +         (params->tsid == WMI_IMPLICIT_PSTREAM || params->tsid <= WMI_MAX_THINSTREAM)) )
65245 +    {
65246 +        return  A_EINVAL;
65247 +    }
65248 +
65249 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65250 +    if (osbuf == NULL) {
65251 +        return A_NO_MEMORY;
65252 +    }
65253 +
65254 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65255 +
65256 +    A_DPRINTF(DBG_WMI,
65257 +        (DBGFMT "Sending create_pstream_cmd: ac=%d    tsid:%d\n", DBGARG,
65258 +        params->trafficClass, params->tsid));
65259 +
65260 +    cmd = (WMI_CREATE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf));
65261 +    A_MEMZERO(cmd, sizeof(*cmd));
65262 +    A_MEMCPY(cmd, params, sizeof(*cmd));
65263 +
65264 +        /* this is an implicitly created Fat pipe */
65265 +    if (params->tsid == WMI_IMPLICIT_PSTREAM) {
65266 +        LOCK_WMI(wmip);
65267 +        fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass));
65268 +        wmip->wmi_fatPipeExists |= (1<<params->trafficClass);
65269 +        UNLOCK_WMI(wmip);
65270 +    } else {
65271 +            /* this is an explicitly created thin stream within a fat pipe */
65272 +        LOCK_WMI(wmip);
65273 +        fatPipeExistsForAC = (wmip->wmi_fatPipeExists & (1 << params->trafficClass));
65274 +        activeTsids = wmip->wmi_streamExistsForAC[params->trafficClass];
65275 +        wmip->wmi_streamExistsForAC[params->trafficClass] |= (1<<params->tsid);
65276 +            /* if a thinstream becomes active, the fat pipe automatically
65277 +            * becomes active
65278 +            */
65279 +        wmip->wmi_fatPipeExists |= (1<<params->trafficClass);
65280 +        UNLOCK_WMI(wmip);
65281 +    }
65282 +
65283 +        /* Indicate activty change to driver layer only if this is the
65284 +         * first TSID to get created in this AC explicitly or an implicit
65285 +         * fat pipe is getting created.
65286 +         */
65287 +    if (!fatPipeExistsForAC) {
65288 +        A_WMI_STREAM_TX_ACTIVE(wmip->wmi_devt, params->trafficClass);
65289 +    }
65290 +
65291 +    /* mike: should be SYNC_BEFORE_WMIFLAG */
65292 +    return (wmi_cmd_send(wmip, osbuf, WMI_CREATE_PSTREAM_CMDID,
65293 +                         NO_SYNC_WMIFLAG));
65294 +}
65295 +
65296 +A_STATUS
65297 +wmi_delete_pstream_cmd(struct wmi_t *wmip, A_UINT8 trafficClass, A_UINT8 tsid)
65298 +{
65299 +    void *osbuf;
65300 +    WMI_DELETE_PSTREAM_CMD *cmd;
65301 +    A_STATUS status;
65302 +       A_UINT16 activeTsids=0;
65303 +
65304 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65305 +    if (osbuf == NULL) {
65306 +        return A_NO_MEMORY;
65307 +    }
65308 +
65309 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65310 +
65311 +    cmd = (WMI_DELETE_PSTREAM_CMD *)(A_NETBUF_DATA(osbuf));
65312 +    A_MEMZERO(cmd, sizeof(*cmd));
65313 +
65314 +    cmd->trafficClass = trafficClass;
65315 +    cmd->tsid = tsid;
65316 +
65317 +    LOCK_WMI(wmip);
65318 +    activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
65319 +    UNLOCK_WMI(wmip);
65320 +
65321 +        /* Check if the tsid was created & exists */
65322 +    if (!(activeTsids & (1<<tsid))) {
65323 +
65324 +        A_DPRINTF(DBG_WMI,
65325 +        (DBGFMT "TSID %d does'nt exist for trafficClass: %d\n", DBGARG, tsid, trafficClass));
65326 +            /* TODO: return a more appropriate err code */
65327 +        return A_ERROR;
65328 +    }
65329 +
65330 +    A_DPRINTF(DBG_WMI,
65331 +        (DBGFMT "Sending delete_pstream_cmd: trafficClass: %d tsid=%d\n", DBGARG, trafficClass, tsid));
65332 +
65333 +    status = (wmi_cmd_send(wmip, osbuf, WMI_DELETE_PSTREAM_CMDID,
65334 +                         SYNC_BEFORE_WMIFLAG));
65335 +
65336 +    LOCK_WMI(wmip);
65337 +    wmip->wmi_streamExistsForAC[trafficClass] &= ~(1<<tsid);
65338 +    activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
65339 +    UNLOCK_WMI(wmip);
65340 +
65341 +
65342 +        /* Indicate stream inactivity to driver layer only if all tsids
65343 +         * within this AC are deleted.
65344 +         */
65345 +    if(!activeTsids) {
65346 +        A_WMI_STREAM_TX_INACTIVE(wmip->wmi_devt, trafficClass);
65347 +        wmip->wmi_fatPipeExists &= ~(1<<trafficClass);
65348 +    }
65349 +
65350 +    return status;
65351 +}
65352 +
65353 +/*
65354 + * used to set the bit rate.  rate is in Kbps.  If rate == -1
65355 + * then auto selection is used.
65356 + */
65357 +A_STATUS
65358 +wmi_set_bitrate_cmd(struct wmi_t *wmip, A_INT32 rate)
65359 +{
65360 +    void *osbuf;
65361 +    WMI_BIT_RATE_CMD *cmd;
65362 +    A_INT8 index;
65363 +
65364 +    if (rate != -1) {
65365 +        index = wmi_validate_bitrate(wmip, rate);
65366 +        if(index == A_EINVAL){
65367 +            return A_EINVAL;
65368 +        }
65369 +    } else {
65370 +        index = -1;
65371 +    }
65372 +
65373 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65374 +    if (osbuf == NULL) {
65375 +        return A_NO_MEMORY;
65376 +    }
65377 +
65378 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65379 +
65380 +    cmd = (WMI_BIT_RATE_CMD *)(A_NETBUF_DATA(osbuf));
65381 +    A_MEMZERO(cmd, sizeof(*cmd));
65382 +
65383 +    cmd->rateIndex = index;
65384 +
65385 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BITRATE_CMDID, NO_SYNC_WMIFLAG));
65386 +}
65387 +
65388 +A_STATUS
65389 +wmi_get_bitrate_cmd(struct wmi_t *wmip)
65390 +{
65391 +    void *osbuf;
65392 +
65393 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65394 +    if (osbuf == NULL) {
65395 +        return A_NO_MEMORY;
65396 +    }
65397 +
65398 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_BITRATE_CMDID, NO_SYNC_WMIFLAG));
65399 +}
65400 +
65401 +/*
65402 + * Returns TRUE iff the given rate index is legal in the current PHY mode.
65403 + */
65404 +A_BOOL
65405 +wmi_is_bitrate_index_valid(struct wmi_t *wmip, A_UINT32 rateIndex)
65406 +{
65407 +    WMI_PHY_MODE phyMode = wmip->wmi_phyMode;
65408 +    A_BOOL isValid = TRUE;
65409 +    switch(phyMode) {
65410 +        case WMI_11A_MODE:
65411 +            if ((rateIndex < MODE_A_SUPPORT_RATE_START) || (rateIndex > MODE_A_SUPPORT_RATE_STOP)) {
65412 +                isValid = FALSE;
65413 +            }
65414 +            break;
65415 +
65416 +        case WMI_11B_MODE:
65417 +            if ((rateIndex < MODE_B_SUPPORT_RATE_START) || (rateIndex > MODE_B_SUPPORT_RATE_STOP)) {
65418 +                isValid = FALSE;
65419 +            }
65420 +            break;
65421 +
65422 +        case WMI_11GONLY_MODE:
65423 +            if ((rateIndex < MODE_GONLY_SUPPORT_RATE_START) || (rateIndex > MODE_GONLY_SUPPORT_RATE_STOP)) {
65424 +                isValid = FALSE;
65425 +            }
65426 +            break;
65427 +
65428 +        case WMI_11G_MODE:
65429 +        case WMI_11AG_MODE:
65430 +            if ((rateIndex < MODE_G_SUPPORT_RATE_START) || (rateIndex > MODE_G_SUPPORT_RATE_STOP)) {
65431 +                isValid = FALSE;
65432 +            }
65433 +            break;
65434 +
65435 +        default:
65436 +            A_ASSERT(FALSE);
65437 +            break;
65438 +    }
65439 +
65440 +    return isValid;
65441 +}
65442 +
65443 +A_INT8
65444 +wmi_validate_bitrate(struct wmi_t *wmip, A_INT32 rate)
65445 +{
65446 +    A_INT8 i;
65447 +    if (rate != -1)
65448 +    {
65449 +        for (i=0;;i++)
65450 +        {
65451 +            if (wmi_rateTable[(A_UINT32) i] == 0) {
65452 +                return A_EINVAL;
65453 +            }
65454 +            if (wmi_rateTable[(A_UINT32) i] == rate) {
65455 +                break;
65456 +            }
65457 +        }
65458 +    }
65459 +    else{
65460 +     i = -1;
65461 +    }
65462 +
65463 +    if(wmi_is_bitrate_index_valid(wmip, i) != TRUE) {
65464 +        return A_EINVAL;
65465 +    }
65466 +
65467 +    return i;
65468 +}
65469 +
65470 +A_STATUS
65471 +wmi_set_fixrates_cmd(struct wmi_t *wmip, A_INT16 fixRatesMask)
65472 +{
65473 +    void *osbuf;
65474 +    WMI_FIX_RATES_CMD *cmd;
65475 +    A_UINT32 rateIndex;
65476 +
65477 +    /* Make sure all rates in the mask are valid in the current PHY mode */
65478 +    for(rateIndex = 0; rateIndex < MAX_NUMBER_OF_SUPPORT_RATES; rateIndex++) {
65479 +       if((1 << rateIndex) & (A_UINT32)fixRatesMask) {
65480 +            if(wmi_is_bitrate_index_valid(wmip, rateIndex) != TRUE) {
65481 +                A_DPRINTF(DBG_WMI, (DBGFMT "Set Fix Rates command failed: Given rate is illegal in current PHY mode\n", DBGARG));
65482 +                return A_EINVAL;
65483 +            }
65484 +       }
65485 +    }
65486 +
65487 +
65488 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65489 +    if (osbuf == NULL) {
65490 +        return A_NO_MEMORY;
65491 +    }
65492 +
65493 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65494 +
65495 +    cmd = (WMI_FIX_RATES_CMD *)(A_NETBUF_DATA(osbuf));
65496 +    A_MEMZERO(cmd, sizeof(*cmd));
65497 +
65498 +    cmd->fixRateMask = fixRatesMask;
65499 +
65500 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_FIXRATES_CMDID, NO_SYNC_WMIFLAG));
65501 +}
65502 +
65503 +A_STATUS
65504 +wmi_get_ratemask_cmd(struct wmi_t *wmip)
65505 +{
65506 +    void *osbuf;
65507 +
65508 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65509 +    if (osbuf == NULL) {
65510 +        return A_NO_MEMORY;
65511 +    }
65512 +
65513 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_FIXRATES_CMDID, NO_SYNC_WMIFLAG));
65514 +}
65515 +
65516 +A_STATUS
65517 +wmi_get_channelList_cmd(struct wmi_t *wmip)
65518 +{
65519 +    void *osbuf;
65520 +
65521 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65522 +    if (osbuf == NULL) {
65523 +        return A_NO_MEMORY;
65524 +    }
65525 +
65526 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_CHANNEL_LIST_CMDID,
65527 +                         NO_SYNC_WMIFLAG));
65528 +}
65529 +
65530 +/*
65531 + * used to generate a wmi sey channel Parameters cmd.
65532 + * mode should always be specified and corresponds to the phy mode of the
65533 + * wlan.
65534 + * numChan should alway sbe specified. If zero indicates that all available
65535 + * channels should be used.
65536 + * channelList is an array of channel frequencies (in Mhz) which the radio
65537 + * should limit its operation to.  It should be NULL if numChan == 0.  Size of
65538 + * array should correspond to numChan entries.
65539 + */
65540 +A_STATUS
65541 +wmi_set_channelParams_cmd(struct wmi_t *wmip, A_UINT8 scanParam,
65542 +                          WMI_PHY_MODE mode, A_INT8 numChan,
65543 +                          A_UINT16 *channelList)
65544 +{
65545 +    void *osbuf;
65546 +    WMI_CHANNEL_PARAMS_CMD *cmd;
65547 +    A_INT8 size;
65548 +
65549 +    size = sizeof (*cmd);
65550 +
65551 +    if (numChan) {
65552 +        if (numChan > WMI_MAX_CHANNELS) {
65553 +            return A_EINVAL;
65554 +        }
65555 +        size += sizeof(A_UINT16) * (numChan - 1);
65556 +    }
65557 +
65558 +    osbuf = A_NETBUF_ALLOC(size);
65559 +    if (osbuf == NULL) {
65560 +        return A_NO_MEMORY;
65561 +    }
65562 +
65563 +    A_NETBUF_PUT(osbuf, size);
65564 +
65565 +    cmd = (WMI_CHANNEL_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
65566 +    A_MEMZERO(cmd, size);
65567 +
65568 +    wmip->wmi_phyMode = mode;
65569 +    cmd->scanParam   = scanParam;
65570 +    cmd->phyMode     = mode;
65571 +    cmd->numChannels = numChan;
65572 +    A_MEMCPY(cmd->channelList, channelList, numChan * sizeof(A_UINT16));
65573 +
65574 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_CHANNEL_PARAMS_CMDID,
65575 +                         NO_SYNC_WMIFLAG));
65576 +}
65577 +
65578 +A_STATUS
65579 +wmi_set_rssi_threshold_params(struct wmi_t *wmip,
65580 +                              WMI_RSSI_THRESHOLD_PARAMS_CMD *rssiCmd)
65581 +{
65582 +    void    *osbuf;
65583 +    A_INT8  size;
65584 +    WMI_RSSI_THRESHOLD_PARAMS_CMD *cmd;
65585 +    /* These values are in ascending order */
65586 +    if( rssiCmd->thresholdAbove6_Val <= rssiCmd->thresholdAbove5_Val ||
65587 +        rssiCmd->thresholdAbove5_Val <= rssiCmd->thresholdAbove4_Val ||
65588 +        rssiCmd->thresholdAbove4_Val <= rssiCmd->thresholdAbove3_Val ||
65589 +        rssiCmd->thresholdAbove3_Val <= rssiCmd->thresholdAbove2_Val ||
65590 +        rssiCmd->thresholdAbove2_Val <= rssiCmd->thresholdAbove1_Val ||
65591 +        rssiCmd->thresholdBelow6_Val <= rssiCmd->thresholdBelow5_Val ||
65592 +        rssiCmd->thresholdBelow5_Val <= rssiCmd->thresholdBelow4_Val ||
65593 +        rssiCmd->thresholdBelow4_Val <= rssiCmd->thresholdBelow3_Val ||
65594 +        rssiCmd->thresholdBelow3_Val <= rssiCmd->thresholdBelow2_Val ||
65595 +        rssiCmd->thresholdBelow2_Val <= rssiCmd->thresholdBelow1_Val) {
65596 +
65597 +        return A_EINVAL;
65598 +    }
65599 +
65600 +    size = sizeof (*cmd);
65601 +
65602 +    osbuf = A_NETBUF_ALLOC(size);
65603 +    if (osbuf == NULL) {
65604 +        return A_NO_MEMORY;
65605 +    }
65606 +
65607 +    A_NETBUF_PUT(osbuf, size);
65608 +
65609 +    cmd = (WMI_RSSI_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
65610 +    A_MEMZERO(cmd, size);
65611 +    A_MEMCPY(cmd, rssiCmd, sizeof(WMI_RSSI_THRESHOLD_PARAMS_CMD));
65612 +
65613 +    return (wmi_cmd_send(wmip, osbuf, WMI_RSSI_THRESHOLD_PARAMS_CMDID,
65614 +                            NO_SYNC_WMIFLAG));
65615 +}
65616 +
65617 +A_STATUS
65618 +wmi_set_host_sleep_mode_cmd(struct wmi_t *wmip,
65619 +                              WMI_SET_HOST_SLEEP_MODE_CMD *hostModeCmd)
65620 +{
65621 +    void    *osbuf;
65622 +    A_INT8  size;
65623 +    WMI_SET_HOST_SLEEP_MODE_CMD *cmd;
65624 +
65625 +    if( hostModeCmd->awake == hostModeCmd->asleep) {
65626 +        return A_EINVAL;
65627 +    }
65628 +
65629 +    size = sizeof (*cmd);
65630 +
65631 +    osbuf = A_NETBUF_ALLOC(size);
65632 +    if (osbuf == NULL) {
65633 +        return A_NO_MEMORY;
65634 +    }
65635 +
65636 +    A_NETBUF_PUT(osbuf, size);
65637 +
65638 +    cmd = (WMI_SET_HOST_SLEEP_MODE_CMD *)(A_NETBUF_DATA(osbuf));
65639 +    A_MEMZERO(cmd, size);
65640 +    A_MEMCPY(cmd, hostModeCmd, sizeof(WMI_SET_HOST_SLEEP_MODE_CMD));
65641 +
65642 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_HOST_SLEEP_MODE_CMDID,
65643 +                            NO_SYNC_WMIFLAG));
65644 +}
65645 +
65646 +A_STATUS
65647 +wmi_set_wow_mode_cmd(struct wmi_t *wmip,
65648 +                              WMI_SET_WOW_MODE_CMD *wowModeCmd)
65649 +{
65650 +    void    *osbuf;
65651 +    A_INT8  size;
65652 +    WMI_SET_WOW_MODE_CMD *cmd;
65653 +
65654 +    size = sizeof (*cmd);
65655 +
65656 +    osbuf = A_NETBUF_ALLOC(size);
65657 +    if (osbuf == NULL) {
65658 +        return A_NO_MEMORY;
65659 +    }
65660 +
65661 +    A_NETBUF_PUT(osbuf, size);
65662 +
65663 +    cmd = (WMI_SET_WOW_MODE_CMD *)(A_NETBUF_DATA(osbuf));
65664 +    A_MEMZERO(cmd, size);
65665 +    A_MEMCPY(cmd, wowModeCmd, sizeof(WMI_SET_WOW_MODE_CMD));
65666 +
65667 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_WOW_MODE_CMDID,
65668 +                            NO_SYNC_WMIFLAG));
65669 +
65670 +}
65671 +
65672 +A_STATUS
65673 +wmi_get_wow_list_cmd(struct wmi_t *wmip,
65674 +                              WMI_GET_WOW_LIST_CMD *wowListCmd)
65675 +{
65676 +    void    *osbuf;
65677 +    A_INT8  size;
65678 +    WMI_GET_WOW_LIST_CMD *cmd;
65679 +
65680 +    size = sizeof (*cmd);
65681 +
65682 +    osbuf = A_NETBUF_ALLOC(size);
65683 +    if (osbuf == NULL) {
65684 +        return A_NO_MEMORY;
65685 +    }
65686 +
65687 +    A_NETBUF_PUT(osbuf, size);
65688 +
65689 +    cmd = (WMI_GET_WOW_LIST_CMD *)(A_NETBUF_DATA(osbuf));
65690 +    A_MEMZERO(cmd, size);
65691 +    A_MEMCPY(cmd, wowListCmd, sizeof(WMI_GET_WOW_LIST_CMD));
65692 +
65693 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_WOW_LIST_CMDID,
65694 +                            NO_SYNC_WMIFLAG));
65695 +
65696 +}
65697 +
65698 +static A_STATUS
65699 +wmi_get_wow_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
65700 +{
65701 +    WMI_GET_WOW_LIST_REPLY *reply;
65702 +
65703 +    if (len < sizeof(WMI_GET_WOW_LIST_REPLY)) {
65704 +        return A_EINVAL;
65705 +    }
65706 +    reply = (WMI_GET_WOW_LIST_REPLY *)datap;
65707 +
65708 +    A_WMI_WOW_LIST_EVENT(wmip->wmi_devt, reply->num_filters,
65709 +                          reply);
65710 +
65711 +    return A_OK;
65712 +}
65713 +
65714 +A_STATUS wmi_add_wow_pattern_cmd(struct wmi_t *wmip,
65715 +                                 WMI_ADD_WOW_PATTERN_CMD *addWowCmd,
65716 +                                 A_UINT8* pattern, A_UINT8* mask,
65717 +                                 A_UINT8 pattern_size)
65718 +{
65719 +    void    *osbuf;
65720 +    A_INT8  size;
65721 +    WMI_ADD_WOW_PATTERN_CMD *cmd;
65722 +    A_UINT8 *filter_mask = NULL;
65723 +
65724 +    size = sizeof (*cmd);
65725 +
65726 +    size += ((2 * addWowCmd->filter_size)* sizeof(A_UINT8));
65727 +    osbuf = A_NETBUF_ALLOC(size);
65728 +    if (osbuf == NULL) {
65729 +        return A_NO_MEMORY;
65730 +    }
65731 +
65732 +    A_NETBUF_PUT(osbuf, size);
65733 +
65734 +    cmd = (WMI_ADD_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf));
65735 +    cmd->filter_list_id = addWowCmd->filter_list_id;
65736 +    cmd->filter_offset = addWowCmd->filter_offset;
65737 +    cmd->filter_size = addWowCmd->filter_size;
65738 +
65739 +    A_MEMCPY(cmd->filter, pattern, addWowCmd->filter_size);
65740 +
65741 +    filter_mask = (A_UINT8*)(cmd->filter + cmd->filter_size);
65742 +    A_MEMCPY(filter_mask, mask, addWowCmd->filter_size);
65743 +
65744 +
65745 +    return (wmi_cmd_send(wmip, osbuf, WMI_ADD_WOW_PATTERN_CMDID,
65746 +                            NO_SYNC_WMIFLAG));
65747 +}
65748 +
65749 +A_STATUS
65750 +wmi_del_wow_pattern_cmd(struct wmi_t *wmip,
65751 +                              WMI_DEL_WOW_PATTERN_CMD *delWowCmd)
65752 +{
65753 +    void    *osbuf;
65754 +    A_INT8  size;
65755 +    WMI_DEL_WOW_PATTERN_CMD *cmd;
65756 +
65757 +    size = sizeof (*cmd);
65758 +
65759 +    osbuf = A_NETBUF_ALLOC(size);
65760 +    if (osbuf == NULL) {
65761 +        return A_NO_MEMORY;
65762 +    }
65763 +
65764 +    A_NETBUF_PUT(osbuf, size);
65765 +
65766 +    cmd = (WMI_DEL_WOW_PATTERN_CMD *)(A_NETBUF_DATA(osbuf));
65767 +    A_MEMZERO(cmd, size);
65768 +    A_MEMCPY(cmd, delWowCmd, sizeof(WMI_DEL_WOW_PATTERN_CMD));
65769 +
65770 +    return (wmi_cmd_send(wmip, osbuf, WMI_DEL_WOW_PATTERN_CMDID,
65771 +                            NO_SYNC_WMIFLAG));
65772 +
65773 +}
65774 +
65775 +A_STATUS
65776 +wmi_set_snr_threshold_params(struct wmi_t *wmip,
65777 +                             WMI_SNR_THRESHOLD_PARAMS_CMD *snrCmd)
65778 +{
65779 +    void    *osbuf;
65780 +    A_INT8  size;
65781 +    WMI_SNR_THRESHOLD_PARAMS_CMD *cmd;
65782 +    /* These values are in ascending order */
65783 +    if( snrCmd->thresholdAbove4_Val <= snrCmd->thresholdAbove3_Val ||
65784 +        snrCmd->thresholdAbove3_Val <= snrCmd->thresholdAbove2_Val ||
65785 +        snrCmd->thresholdAbove2_Val <= snrCmd->thresholdAbove1_Val ||
65786 +        snrCmd->thresholdBelow4_Val <= snrCmd->thresholdBelow3_Val ||
65787 +        snrCmd->thresholdBelow3_Val <= snrCmd->thresholdBelow2_Val ||
65788 +        snrCmd->thresholdBelow2_Val <= snrCmd->thresholdBelow1_Val) {
65789 +
65790 +        return A_EINVAL;
65791 +    }
65792 +
65793 +    size = sizeof (*cmd);
65794 +
65795 +    osbuf = A_NETBUF_ALLOC(size);
65796 +    if (osbuf == NULL) {
65797 +        return A_NO_MEMORY;
65798 +    }
65799 +
65800 +    A_NETBUF_PUT(osbuf, size);
65801 +
65802 +    cmd = (WMI_SNR_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
65803 +    A_MEMZERO(cmd, size);
65804 +    A_MEMCPY(cmd, snrCmd, sizeof(WMI_SNR_THRESHOLD_PARAMS_CMD));
65805 +
65806 +    return (wmi_cmd_send(wmip, osbuf, WMI_SNR_THRESHOLD_PARAMS_CMDID,
65807 +                            NO_SYNC_WMIFLAG));
65808 +}
65809 +
65810 +A_STATUS
65811 +wmi_clr_rssi_snr(struct wmi_t *wmip)
65812 +{
65813 +    void    *osbuf;
65814 +
65815 +    osbuf = A_NETBUF_ALLOC(sizeof(int));
65816 +    if (osbuf == NULL) {
65817 +        return A_NO_MEMORY;
65818 +    }
65819 +
65820 +    return (wmi_cmd_send(wmip, osbuf, WMI_CLR_RSSI_SNR_CMDID,
65821 +                            NO_SYNC_WMIFLAG));
65822 +}
65823 +
65824 +A_STATUS
65825 +wmi_set_lq_threshold_params(struct wmi_t *wmip,
65826 +                             WMI_LQ_THRESHOLD_PARAMS_CMD *lqCmd)
65827 +{
65828 +    void    *osbuf;
65829 +    A_INT8  size;
65830 +    WMI_LQ_THRESHOLD_PARAMS_CMD *cmd;
65831 +    /* These values are in ascending order */
65832 +    if( lqCmd->thresholdAbove4_Val <= lqCmd->thresholdAbove3_Val ||
65833 +        lqCmd->thresholdAbove3_Val <= lqCmd->thresholdAbove2_Val ||
65834 +        lqCmd->thresholdAbove2_Val <= lqCmd->thresholdAbove1_Val ||
65835 +        lqCmd->thresholdBelow4_Val <= lqCmd->thresholdBelow3_Val ||
65836 +        lqCmd->thresholdBelow3_Val <= lqCmd->thresholdBelow2_Val ||
65837 +        lqCmd->thresholdBelow2_Val <= lqCmd->thresholdBelow1_Val ) {
65838 +
65839 +        return A_EINVAL;
65840 +    }
65841 +
65842 +    size = sizeof (*cmd);
65843 +
65844 +    osbuf = A_NETBUF_ALLOC(size);
65845 +    if (osbuf == NULL) {
65846 +        return A_NO_MEMORY;
65847 +    }
65848 +
65849 +    A_NETBUF_PUT(osbuf, size);
65850 +
65851 +    cmd = (WMI_LQ_THRESHOLD_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
65852 +    A_MEMZERO(cmd, size);
65853 +    A_MEMCPY(cmd, lqCmd, sizeof(WMI_LQ_THRESHOLD_PARAMS_CMD));
65854 +
65855 +    return (wmi_cmd_send(wmip, osbuf, WMI_LQ_THRESHOLD_PARAMS_CMDID,
65856 +                            NO_SYNC_WMIFLAG));
65857 +}
65858 +
65859 +A_STATUS
65860 +wmi_set_error_report_bitmask(struct wmi_t *wmip, A_UINT32 mask)
65861 +{
65862 +    void    *osbuf;
65863 +    A_INT8  size;
65864 +    WMI_TARGET_ERROR_REPORT_BITMASK *cmd;
65865 +
65866 +    size = sizeof (*cmd);
65867 +
65868 +    osbuf = A_NETBUF_ALLOC(size);
65869 +    if (osbuf == NULL) {
65870 +        return A_NO_MEMORY;
65871 +    }
65872 +
65873 +    A_NETBUF_PUT(osbuf, size);
65874 +
65875 +    cmd = (WMI_TARGET_ERROR_REPORT_BITMASK *)(A_NETBUF_DATA(osbuf));
65876 +    A_MEMZERO(cmd, size);
65877 +
65878 +    cmd->bitmask = mask;
65879 +
65880 +    return (wmi_cmd_send(wmip, osbuf, WMI_TARGET_ERROR_REPORT_BITMASK_CMDID,
65881 +                            NO_SYNC_WMIFLAG));
65882 +}
65883 +
65884 +A_STATUS
65885 +wmi_get_challenge_resp_cmd(struct wmi_t *wmip, A_UINT32 cookie, A_UINT32 source)
65886 +{
65887 +    void *osbuf;
65888 +    WMIX_HB_CHALLENGE_RESP_CMD *cmd;
65889 +
65890 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65891 +    if (osbuf == NULL) {
65892 +        return A_NO_MEMORY;
65893 +    }
65894 +
65895 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65896 +
65897 +    cmd = (WMIX_HB_CHALLENGE_RESP_CMD *)(A_NETBUF_DATA(osbuf));
65898 +    cmd->cookie = cookie;
65899 +    cmd->source = source;
65900 +
65901 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_HB_CHALLENGE_RESP_CMDID,
65902 +                              NO_SYNC_WMIFLAG));
65903 +}
65904 +
65905 +A_STATUS
65906 +wmi_config_debug_module_cmd(struct wmi_t *wmip, A_UINT16 mmask,
65907 +                            A_UINT16 tsr, A_BOOL rep, A_UINT16 size,
65908 +                            A_UINT32 valid)
65909 +{
65910 +    void *osbuf;
65911 +    WMIX_DBGLOG_CFG_MODULE_CMD *cmd;
65912 +
65913 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65914 +    if (osbuf == NULL) {
65915 +        return A_NO_MEMORY;
65916 +    }
65917 +
65918 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65919 +
65920 +    cmd = (WMIX_DBGLOG_CFG_MODULE_CMD *)(A_NETBUF_DATA(osbuf));
65921 +    cmd->config.cfgmmask = mmask;
65922 +    cmd->config.cfgtsr = tsr;
65923 +    cmd->config.cfgrep = rep;
65924 +    cmd->config.cfgsize = size;
65925 +    cmd->config.cfgvalid = valid;
65926 +
65927 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DBGLOG_CFG_MODULE_CMDID,
65928 +                              NO_SYNC_WMIFLAG));
65929 +}
65930 +
65931 +A_STATUS
65932 +wmi_get_stats_cmd(struct wmi_t *wmip)
65933 +{
65934 +    void *osbuf;
65935 +
65936 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
65937 +    if (osbuf == NULL) {
65938 +        return A_NO_MEMORY;
65939 +    }
65940 +
65941 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_STATISTICS_CMDID,
65942 +                         NO_SYNC_WMIFLAG));
65943 +}
65944 +
65945 +A_STATUS
65946 +wmi_addBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex, A_UINT8 *bssid)
65947 +{
65948 +    void *osbuf;
65949 +    WMI_ADD_BAD_AP_CMD *cmd;
65950 +
65951 +    if ((bssid == NULL) || (apIndex > WMI_MAX_BAD_AP_INDEX)) {
65952 +        return A_EINVAL;
65953 +    }
65954 +
65955 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65956 +    if (osbuf == NULL) {
65957 +        return A_NO_MEMORY;
65958 +    }
65959 +
65960 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65961 +
65962 +    cmd = (WMI_ADD_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf));
65963 +    cmd->badApIndex = apIndex;
65964 +    A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
65965 +
65966 +    return (wmi_cmd_send(wmip, osbuf, WMI_ADD_BAD_AP_CMDID, NO_SYNC_WMIFLAG));
65967 +}
65968 +
65969 +A_STATUS
65970 +wmi_deleteBadAp_cmd(struct wmi_t *wmip, A_UINT8 apIndex)
65971 +{
65972 +    void *osbuf;
65973 +    WMI_DELETE_BAD_AP_CMD *cmd;
65974 +
65975 +    if (apIndex > WMI_MAX_BAD_AP_INDEX) {
65976 +        return A_EINVAL;
65977 +    }
65978 +
65979 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
65980 +    if (osbuf == NULL) {
65981 +        return A_NO_MEMORY;
65982 +    }
65983 +
65984 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
65985 +
65986 +    cmd = (WMI_DELETE_BAD_AP_CMD *)(A_NETBUF_DATA(osbuf));
65987 +    cmd->badApIndex = apIndex;
65988 +
65989 +    return (wmi_cmd_send(wmip, osbuf, WMI_DELETE_BAD_AP_CMDID,
65990 +                         NO_SYNC_WMIFLAG));
65991 +}
65992 +
65993 +A_STATUS
65994 +wmi_set_txPwr_cmd(struct wmi_t *wmip, A_UINT8 dbM)
65995 +{
65996 +    void *osbuf;
65997 +    WMI_SET_TX_PWR_CMD *cmd;
65998 +
65999 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66000 +    if (osbuf == NULL) {
66001 +        return A_NO_MEMORY;
66002 +    }
66003 +
66004 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66005 +
66006 +    cmd = (WMI_SET_TX_PWR_CMD *)(A_NETBUF_DATA(osbuf));
66007 +    cmd->dbM = dbM;
66008 +
66009 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_TX_PWR_CMDID, NO_SYNC_WMIFLAG));
66010 +}
66011 +
66012 +A_STATUS
66013 +wmi_get_txPwr_cmd(struct wmi_t *wmip)
66014 +{
66015 +    void *osbuf;
66016 +
66017 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
66018 +    if (osbuf == NULL) {
66019 +        return A_NO_MEMORY;
66020 +    }
66021 +
66022 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_TX_PWR_CMDID, NO_SYNC_WMIFLAG));
66023 +}
66024 +
66025 +A_STATUS
66026 +wmi_switch_radio(struct wmi_t *wmip, A_UINT8 on)
66027 +{
66028 +       WMI_SCAN_PARAMS_CMD scParams = {0, 0, 0, 0, 0,
66029 +                                       WMI_SHORTSCANRATIO_DEFAULT,
66030 +                                       DEFAULT_SCAN_CTRL_FLAGS,
66031 +                                       0};
66032 +
66033 +       if (on) {
66034 +               /* Enable foreground scanning */
66035 +                if (wmi_scanparams_cmd(wmip, scParams.fg_start_period,
66036 +                                       scParams.fg_end_period,
66037 +                                       scParams.bg_period,
66038 +                                       scParams.minact_chdwell_time,
66039 +                                       scParams.maxact_chdwell_time,
66040 +                                       scParams.pas_chdwell_time,
66041 +                                       scParams.shortScanRatio,
66042 +                                       scParams.scanCtrlFlags,
66043 +                                       scParams.max_dfsch_act_time) != A_OK) {
66044 +                       return -EIO;
66045 +               }
66046 +       } else {
66047 +               wmi_disconnect_cmd(wmip);
66048 +               if (wmi_scanparams_cmd(wmip, 0xFFFF, 0, 0, 0,
66049 +                                      0, 0, 0, 0xFF, 0) != A_OK) {
66050 +                       return -EIO;
66051 +               }
66052 +       }
66053 +
66054 +       return A_OK;
66055 +}
66056 +
66057 +
66058 +A_UINT16
66059 +wmi_get_mapped_qos_queue(struct wmi_t *wmip, A_UINT8 trafficClass)
66060 +{
66061 +       A_UINT16 activeTsids=0;
66062 +
66063 +    LOCK_WMI(wmip);
66064 +    activeTsids = wmip->wmi_streamExistsForAC[trafficClass];
66065 +    UNLOCK_WMI(wmip);
66066 +
66067 +    return activeTsids;
66068 +}
66069 +
66070 +A_STATUS
66071 +wmi_get_roam_tbl_cmd(struct wmi_t *wmip)
66072 +{
66073 +    void *osbuf;
66074 +
66075 +    osbuf = A_NETBUF_ALLOC(0);      /* no payload */
66076 +    if (osbuf == NULL) {
66077 +        return A_NO_MEMORY;
66078 +    }
66079 +
66080 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_TBL_CMDID,
66081 +                         NO_SYNC_WMIFLAG));
66082 +}
66083 +
66084 +A_STATUS
66085 +wmi_get_roam_data_cmd(struct wmi_t *wmip, A_UINT8 roamDataType)
66086 +{
66087 +    void *osbuf;
66088 +    A_UINT32 size = sizeof(A_UINT8);
66089 +    WMI_TARGET_ROAM_DATA *cmd;
66090 +
66091 +    osbuf = A_NETBUF_ALLOC(size);      /* no payload */
66092 +    if (osbuf == NULL) {
66093 +        return A_NO_MEMORY;
66094 +    }
66095 +
66096 +    A_NETBUF_PUT(osbuf, size);
66097 +
66098 +    cmd = (WMI_TARGET_ROAM_DATA *)(A_NETBUF_DATA(osbuf));
66099 +    cmd->roamDataType = roamDataType;
66100 +
66101 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_ROAM_DATA_CMDID,
66102 +                         NO_SYNC_WMIFLAG));
66103 +}
66104 +
66105 +A_STATUS
66106 +wmi_set_roam_ctrl_cmd(struct wmi_t *wmip, WMI_SET_ROAM_CTRL_CMD *p,
66107 +                      A_UINT8 size)
66108 +{
66109 +    void *osbuf;
66110 +    WMI_SET_ROAM_CTRL_CMD *cmd;
66111 +
66112 +    osbuf = A_NETBUF_ALLOC(size);
66113 +    if (osbuf == NULL) {
66114 +        return A_NO_MEMORY;
66115 +    }
66116 +
66117 +    A_NETBUF_PUT(osbuf, size);
66118 +
66119 +    cmd = (WMI_SET_ROAM_CTRL_CMD *)(A_NETBUF_DATA(osbuf));
66120 +    A_MEMZERO(cmd, size);
66121 +
66122 +    A_MEMCPY(cmd, p, size);
66123 +
66124 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_ROAM_CTRL_CMDID,
66125 +                         NO_SYNC_WMIFLAG));
66126 +}
66127 +
66128 +A_STATUS
66129 +wmi_set_powersave_timers_cmd(struct wmi_t *wmip,
66130 +                            WMI_POWERSAVE_TIMERS_POLICY_CMD *pCmd,
66131 +                            A_UINT8 size)
66132 +{
66133 +    void *osbuf;
66134 +    WMI_POWERSAVE_TIMERS_POLICY_CMD *cmd;
66135 +
66136 +    /* These timers can't be zero */
66137 +    if(!pCmd->psPollTimeout || !pCmd->triggerTimeout ||
66138 +       !(pCmd->apsdTimPolicy == IGNORE_TIM_ALL_QUEUES_APSD ||
66139 +         pCmd->apsdTimPolicy == PROCESS_TIM_ALL_QUEUES_APSD) ||
66140 +       !(pCmd->simulatedAPSDTimPolicy == IGNORE_TIM_SIMULATED_APSD ||
66141 +         pCmd->simulatedAPSDTimPolicy == PROCESS_TIM_SIMULATED_APSD))
66142 +        return A_EINVAL;
66143 +
66144 +    osbuf = A_NETBUF_ALLOC(size);
66145 +    if (osbuf == NULL) {
66146 +        return A_NO_MEMORY;
66147 +    }
66148 +
66149 +    A_NETBUF_PUT(osbuf, size);
66150 +
66151 +    cmd = (WMI_POWERSAVE_TIMERS_POLICY_CMD *)(A_NETBUF_DATA(osbuf));
66152 +    A_MEMZERO(cmd, size);
66153 +
66154 +    A_MEMCPY(cmd, pCmd, size);
66155 +
66156 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_POWERSAVE_TIMERS_POLICY_CMDID,
66157 +                         NO_SYNC_WMIFLAG));
66158 +}
66159 +
66160 +#ifdef CONFIG_HOST_GPIO_SUPPORT
66161 +/* Send a command to Target to change GPIO output pins. */
66162 +A_STATUS
66163 +wmi_gpio_output_set(struct wmi_t *wmip,
66164 +                    A_UINT32 set_mask,
66165 +                    A_UINT32 clear_mask,
66166 +                    A_UINT32 enable_mask,
66167 +                    A_UINT32 disable_mask)
66168 +{
66169 +    void *osbuf;
66170 +    WMIX_GPIO_OUTPUT_SET_CMD *output_set;
66171 +    int size;
66172 +
66173 +    size = sizeof(*output_set);
66174 +
66175 +    A_DPRINTF(DBG_WMI,
66176 +        (DBGFMT "Enter - set=0x%x clear=0x%x enb=0x%x dis=0x%x\n", DBGARG,
66177 +        set_mask, clear_mask, enable_mask, disable_mask));
66178 +
66179 +    osbuf = A_NETBUF_ALLOC(size);
66180 +    if (osbuf == NULL) {
66181 +        return A_NO_MEMORY;
66182 +    }
66183 +    A_NETBUF_PUT(osbuf, size);
66184 +    output_set = (WMIX_GPIO_OUTPUT_SET_CMD *)(A_NETBUF_DATA(osbuf));
66185 +
66186 +    output_set->set_mask                   = set_mask;
66187 +    output_set->clear_mask                 = clear_mask;
66188 +    output_set->enable_mask                = enable_mask;
66189 +    output_set->disable_mask               = disable_mask;
66190 +
66191 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_OUTPUT_SET_CMDID,
66192 +                             NO_SYNC_WMIFLAG));
66193 +}
66194 +
66195 +/* Send a command to the Target requesting state of the GPIO input pins */
66196 +A_STATUS
66197 +wmi_gpio_input_get(struct wmi_t *wmip)
66198 +{
66199 +    void *osbuf;
66200 +
66201 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
66202 +
66203 +    osbuf = A_NETBUF_ALLOC(0);
66204 +    if (osbuf == NULL) {
66205 +        return A_NO_MEMORY;
66206 +    }
66207 +
66208 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INPUT_GET_CMDID,
66209 +                             NO_SYNC_WMIFLAG));
66210 +}
66211 +
66212 +/* Send a command to the Target that changes the value of a GPIO register. */
66213 +A_STATUS
66214 +wmi_gpio_register_set(struct wmi_t *wmip,
66215 +                      A_UINT32 gpioreg_id,
66216 +                      A_UINT32 value)
66217 +{
66218 +    void *osbuf;
66219 +    WMIX_GPIO_REGISTER_SET_CMD *register_set;
66220 +    int size;
66221 +
66222 +    size = sizeof(*register_set);
66223 +
66224 +    A_DPRINTF(DBG_WMI,
66225 +        (DBGFMT "Enter - reg=%d value=0x%x\n", DBGARG, gpioreg_id, value));
66226 +
66227 +    osbuf = A_NETBUF_ALLOC(size);
66228 +    if (osbuf == NULL) {
66229 +        return A_NO_MEMORY;
66230 +    }
66231 +    A_NETBUF_PUT(osbuf, size);
66232 +    register_set = (WMIX_GPIO_REGISTER_SET_CMD *)(A_NETBUF_DATA(osbuf));
66233 +
66234 +    register_set->gpioreg_id               = gpioreg_id;
66235 +    register_set->value                    = value;
66236 +
66237 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_SET_CMDID,
66238 +                             NO_SYNC_WMIFLAG));
66239 +}
66240 +
66241 +/* Send a command to the Target to fetch the value of a GPIO register. */
66242 +A_STATUS
66243 +wmi_gpio_register_get(struct wmi_t *wmip,
66244 +                      A_UINT32 gpioreg_id)
66245 +{
66246 +    void *osbuf;
66247 +    WMIX_GPIO_REGISTER_GET_CMD *register_get;
66248 +    int size;
66249 +
66250 +    size = sizeof(*register_get);
66251 +
66252 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter - reg=%d\n", DBGARG, gpioreg_id));
66253 +
66254 +    osbuf = A_NETBUF_ALLOC(size);
66255 +    if (osbuf == NULL) {
66256 +        return A_NO_MEMORY;
66257 +    }
66258 +    A_NETBUF_PUT(osbuf, size);
66259 +    register_get = (WMIX_GPIO_REGISTER_GET_CMD *)(A_NETBUF_DATA(osbuf));
66260 +
66261 +    register_get->gpioreg_id               = gpioreg_id;
66262 +
66263 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_REGISTER_GET_CMDID,
66264 +                             NO_SYNC_WMIFLAG));
66265 +}
66266 +
66267 +/* Send a command to the Target acknowledging some GPIO interrupts. */
66268 +A_STATUS
66269 +wmi_gpio_intr_ack(struct wmi_t *wmip,
66270 +                  A_UINT32 ack_mask)
66271 +{
66272 +    void *osbuf;
66273 +    WMIX_GPIO_INTR_ACK_CMD *intr_ack;
66274 +    int size;
66275 +
66276 +    size = sizeof(*intr_ack);
66277 +
66278 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter ack_mask=0x%x\n", DBGARG, ack_mask));
66279 +
66280 +    osbuf = A_NETBUF_ALLOC(size);
66281 +    if (osbuf == NULL) {
66282 +        return A_NO_MEMORY;
66283 +    }
66284 +    A_NETBUF_PUT(osbuf, size);
66285 +    intr_ack = (WMIX_GPIO_INTR_ACK_CMD *)(A_NETBUF_DATA(osbuf));
66286 +
66287 +    intr_ack->ack_mask               = ack_mask;
66288 +
66289 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_GPIO_INTR_ACK_CMDID,
66290 +                             NO_SYNC_WMIFLAG));
66291 +}
66292 +#endif /* CONFIG_HOST_GPIO_SUPPORT */
66293 +
66294 +A_STATUS
66295 +wmi_set_access_params_cmd(struct wmi_t *wmip, A_UINT16 txop, A_UINT8 eCWmin,
66296 +                          A_UINT8 eCWmax, A_UINT8 aifsn)
66297 +{
66298 +    void *osbuf;
66299 +    WMI_SET_ACCESS_PARAMS_CMD *cmd;
66300 +
66301 +    if ((eCWmin > WMI_MAX_CW_ACPARAM) || (eCWmax > WMI_MAX_CW_ACPARAM) ||
66302 +        (aifsn > WMI_MAX_AIFSN_ACPARAM))
66303 +    {
66304 +        return A_EINVAL;
66305 +    }
66306 +
66307 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66308 +    if (osbuf == NULL) {
66309 +        return A_NO_MEMORY;
66310 +    }
66311 +
66312 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66313 +
66314 +    cmd = (WMI_SET_ACCESS_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
66315 +    cmd->txop   = txop;
66316 +    cmd->eCWmin = eCWmin;
66317 +    cmd->eCWmax = eCWmax;
66318 +    cmd->aifsn  = aifsn;
66319 +
66320 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_ACCESS_PARAMS_CMDID,
66321 +                         NO_SYNC_WMIFLAG));
66322 +}
66323 +
66324 +A_STATUS
66325 +wmi_set_retry_limits_cmd(struct wmi_t *wmip, A_UINT8 frameType,
66326 +                         A_UINT8 trafficClass, A_UINT8 maxRetries,
66327 +                         A_UINT8 enableNotify)
66328 +{
66329 +    void *osbuf;
66330 +    WMI_SET_RETRY_LIMITS_CMD *cmd;
66331 +
66332 +    if ((frameType != MGMT_FRAMETYPE) && (frameType != CONTROL_FRAMETYPE) &&
66333 +        (frameType != DATA_FRAMETYPE))
66334 +    {
66335 +        return A_EINVAL;
66336 +    }
66337 +
66338 +    if (maxRetries > WMI_MAX_RETRIES) {
66339 +        return A_EINVAL;
66340 +    }
66341 +
66342 +    if (frameType != DATA_FRAMETYPE) {
66343 +        trafficClass = 0;
66344 +    }
66345 +
66346 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66347 +    if (osbuf == NULL) {
66348 +        return A_NO_MEMORY;
66349 +    }
66350 +
66351 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66352 +
66353 +    cmd = (WMI_SET_RETRY_LIMITS_CMD *)(A_NETBUF_DATA(osbuf));
66354 +    cmd->frameType    = frameType;
66355 +    cmd->trafficClass = trafficClass;
66356 +    cmd->maxRetries   = maxRetries;
66357 +    cmd->enableNotify = enableNotify;
66358 +
66359 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_RETRY_LIMITS_CMDID,
66360 +                         NO_SYNC_WMIFLAG));
66361 +}
66362 +
66363 +void
66364 +wmi_get_current_bssid(struct wmi_t *wmip, A_UINT8 *bssid)
66365 +{
66366 +    if (bssid != NULL) {
66367 +        A_MEMCPY(bssid, wmip->wmi_bssid, ATH_MAC_LEN);
66368 +    }
66369 +}
66370 +
66371 +A_STATUS
66372 +wmi_set_opt_mode_cmd(struct wmi_t *wmip, A_UINT8 optMode)
66373 +{
66374 +    void *osbuf;
66375 +    WMI_SET_OPT_MODE_CMD *cmd;
66376 +
66377 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66378 +    if (osbuf == NULL) {
66379 +        return A_NO_MEMORY;
66380 +    }
66381 +
66382 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66383 +
66384 +    cmd = (WMI_SET_OPT_MODE_CMD *)(A_NETBUF_DATA(osbuf));
66385 +    A_MEMZERO(cmd, sizeof(*cmd));
66386 +    cmd->optMode = optMode;
66387 +
66388 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_OPT_MODE_CMDID,
66389 +                         SYNC_BOTH_WMIFLAG));
66390 +}
66391 +
66392 +A_STATUS
66393 +wmi_opt_tx_frame_cmd(struct wmi_t *wmip,
66394 +                      A_UINT8 frmType,
66395 +                      A_UINT8 *dstMacAddr,
66396 +                      A_UINT8 *bssid,
66397 +                      A_UINT16 optIEDataLen,
66398 +                      A_UINT8 *optIEData)
66399 +{
66400 +    void *osbuf;
66401 +    WMI_OPT_TX_FRAME_CMD *cmd;
66402 +    osbuf = A_NETBUF_ALLOC(optIEDataLen + sizeof(*cmd));
66403 +    if (osbuf == NULL) {
66404 +        return A_NO_MEMORY;
66405 +    }
66406 +
66407 +    A_NETBUF_PUT(osbuf, (optIEDataLen + sizeof(*cmd)));
66408 +
66409 +    cmd = (WMI_OPT_TX_FRAME_CMD *)(A_NETBUF_DATA(osbuf));
66410 +    A_MEMZERO(cmd, (optIEDataLen + sizeof(*cmd)-1));
66411 +
66412 +    cmd->frmType    = frmType;
66413 +    cmd->optIEDataLen   = optIEDataLen;
66414 +    //cmd->optIEData     = (A_UINT8 *)((int)cmd + sizeof(*cmd));
66415 +    A_MEMCPY(cmd->bssid, bssid, sizeof(cmd->bssid));
66416 +    A_MEMCPY(cmd->dstAddr, dstMacAddr, sizeof(cmd->dstAddr));
66417 +    A_MEMCPY(&cmd->optIEData[0], optIEData, optIEDataLen);
66418 +
66419 +    return (wmi_cmd_send(wmip, osbuf, WMI_OPT_TX_FRAME_CMDID,
66420 +                         NO_SYNC_WMIFLAG));
66421 +}
66422 +
66423 +A_STATUS
66424 +wmi_set_adhoc_bconIntvl_cmd(struct wmi_t *wmip, A_UINT16 intvl)
66425 +{
66426 +    void *osbuf;
66427 +    WMI_BEACON_INT_CMD *cmd;
66428 +
66429 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66430 +    if (osbuf == NULL) {
66431 +        return A_NO_MEMORY;
66432 +    }
66433 +
66434 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66435 +
66436 +    cmd = (WMI_BEACON_INT_CMD *)(A_NETBUF_DATA(osbuf));
66437 +    A_MEMZERO(cmd, sizeof(*cmd));
66438 +    cmd->beaconInterval = intvl;
66439 +
66440 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BEACON_INT_CMDID,
66441 +            NO_SYNC_WMIFLAG));
66442 +}
66443 +
66444 +
66445 +A_STATUS
66446 +wmi_set_voice_pkt_size_cmd(struct wmi_t *wmip, A_UINT16 voicePktSize)
66447 +{
66448 +    void *osbuf;
66449 +    WMI_SET_VOICE_PKT_SIZE_CMD *cmd;
66450 +
66451 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66452 +    if (osbuf == NULL) {
66453 +        return A_NO_MEMORY;
66454 +    }
66455 +
66456 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66457 +
66458 +    cmd = (WMI_SET_VOICE_PKT_SIZE_CMD *)(A_NETBUF_DATA(osbuf));
66459 +    A_MEMZERO(cmd, sizeof(*cmd));
66460 +    cmd->voicePktSize = voicePktSize;
66461 +
66462 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_VOICE_PKT_SIZE_CMDID,
66463 +            NO_SYNC_WMIFLAG));
66464 +}
66465 +
66466 +
66467 +A_STATUS
66468 +wmi_set_max_sp_len_cmd(struct wmi_t *wmip, A_UINT8 maxSPLen)
66469 +{
66470 +    void *osbuf;
66471 +    WMI_SET_MAX_SP_LEN_CMD *cmd;
66472 +
66473 +    /* maxSPLen is a two-bit value. If user trys to set anything
66474 +     * other than this, then its invalid
66475 +     */
66476 +    if(maxSPLen & ~0x03)
66477 +        return  A_EINVAL;
66478 +
66479 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66480 +    if (osbuf == NULL) {
66481 +        return A_NO_MEMORY;
66482 +    }
66483 +
66484 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66485 +
66486 +    cmd = (WMI_SET_MAX_SP_LEN_CMD *)(A_NETBUF_DATA(osbuf));
66487 +    A_MEMZERO(cmd, sizeof(*cmd));
66488 +    cmd->maxSPLen = maxSPLen;
66489 +
66490 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_MAX_SP_LEN_CMDID,
66491 +            NO_SYNC_WMIFLAG));
66492 +}
66493 +
66494 +A_UINT8
66495 +convert_userPriority_to_trafficClass(A_UINT8 userPriority)
66496 +{
66497 +        return  (up_to_ac[userPriority & 0x7]);
66498 +}
66499 +
66500 +A_UINT8
66501 +wmi_get_power_mode_cmd(struct wmi_t *wmip)
66502 +{
66503 +    return wmip->wmi_powerMode;
66504 +}
66505 +
66506 +A_STATUS
66507 +wmi_verify_tspec_params(WMI_CREATE_PSTREAM_CMD *pCmd, A_BOOL tspecCompliance)
66508 +{
66509 +    return A_OK;
66510 +}
66511 +
66512 +#ifdef CONFIG_HOST_TCMD_SUPPORT
66513 +static A_STATUS
66514 +wmi_tcmd_test_report_rx(struct wmi_t *wmip, A_UINT8 *datap, int len)
66515 +{
66516 +
66517 +   A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
66518 +
66519 +   A_WMI_TCMD_RX_REPORT_EVENT(wmip->wmi_devt, datap, len);
66520 +
66521 +   return A_OK;
66522 +}
66523 +
66524 +#endif /* CONFIG_HOST_TCMD_SUPPORT*/
66525 +
66526 +A_STATUS
66527 +wmi_set_authmode_cmd(struct wmi_t *wmip, A_UINT8 mode)
66528 +{
66529 +    void *osbuf;
66530 +    WMI_SET_AUTH_MODE_CMD *cmd;
66531 +
66532 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66533 +    if (osbuf == NULL) {
66534 +        return A_NO_MEMORY;
66535 +    }
66536 +
66537 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66538 +
66539 +    cmd = (WMI_SET_AUTH_MODE_CMD *)(A_NETBUF_DATA(osbuf));
66540 +    A_MEMZERO(cmd, sizeof(*cmd));
66541 +    cmd->mode = mode;
66542 +
66543 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_AUTH_MODE_CMDID,
66544 +            NO_SYNC_WMIFLAG));
66545 +}
66546 +
66547 +A_STATUS
66548 +wmi_set_reassocmode_cmd(struct wmi_t *wmip, A_UINT8 mode)
66549 +{
66550 +    void *osbuf;
66551 +    WMI_SET_REASSOC_MODE_CMD *cmd;
66552 +
66553 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66554 +    if (osbuf == NULL) {
66555 +        return A_NO_MEMORY;
66556 +    }
66557 +
66558 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66559 +
66560 +    cmd = (WMI_SET_REASSOC_MODE_CMD *)(A_NETBUF_DATA(osbuf));
66561 +    A_MEMZERO(cmd, sizeof(*cmd));
66562 +    cmd->mode = mode;
66563 +
66564 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_REASSOC_MODE_CMDID,
66565 +            NO_SYNC_WMIFLAG));
66566 +}
66567 +
66568 +A_STATUS
66569 +wmi_set_lpreamble_cmd(struct wmi_t *wmip, A_UINT8 status)
66570 +{
66571 +    void *osbuf;
66572 +    WMI_SET_LPREAMBLE_CMD *cmd;
66573 +
66574 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66575 +    if (osbuf == NULL) {
66576 +        return A_NO_MEMORY;
66577 +    }
66578 +
66579 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66580 +
66581 +    cmd = (WMI_SET_LPREAMBLE_CMD *)(A_NETBUF_DATA(osbuf));
66582 +    A_MEMZERO(cmd, sizeof(*cmd));
66583 +    cmd->status = status;
66584 +
66585 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_LPREAMBLE_CMDID,
66586 +            NO_SYNC_WMIFLAG));
66587 +}
66588 +
66589 +A_STATUS
66590 +wmi_set_rts_cmd(struct wmi_t *wmip, A_UINT16 threshold)
66591 +{
66592 +    void *osbuf;
66593 +    WMI_SET_RTS_CMD *cmd;
66594 +
66595 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66596 +    if (osbuf == NULL) {
66597 +        return A_NO_MEMORY;
66598 +    }
66599 +
66600 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66601 +
66602 +    cmd = (WMI_SET_RTS_CMD*)(A_NETBUF_DATA(osbuf));
66603 +    A_MEMZERO(cmd, sizeof(*cmd));
66604 +    cmd->threshold = threshold;
66605 +
66606 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_RTS_CMDID,
66607 +            NO_SYNC_WMIFLAG));
66608 +}
66609 +
66610 +A_STATUS
66611 +wmi_set_wmm_cmd(struct wmi_t *wmip, WMI_WMM_STATUS status)
66612 +{
66613 +    void *osbuf;
66614 +    WMI_SET_WMM_CMD *cmd;
66615 +
66616 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66617 +    if (osbuf == NULL) {
66618 +        return A_NO_MEMORY;
66619 +    }
66620 +
66621 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66622 +
66623 +    cmd = (WMI_SET_WMM_CMD*)(A_NETBUF_DATA(osbuf));
66624 +    A_MEMZERO(cmd, sizeof(*cmd));
66625 +    cmd->status = status;
66626 +
66627 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_CMDID,
66628 +            NO_SYNC_WMIFLAG));
66629 +
66630 +}
66631 +
66632 +A_STATUS
66633 +wmi_set_wmm_txop(struct wmi_t *wmip, WMI_TXOP_CFG cfg)
66634 +{
66635 +    void *osbuf;
66636 +    WMI_SET_WMM_TXOP_CMD *cmd;
66637 +
66638 +    if( !((cfg == WMI_TXOP_DISABLED) || (cfg == WMI_TXOP_ENABLED)) )
66639 +        return A_EINVAL;
66640 +
66641 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66642 +    if (osbuf == NULL) {
66643 +        return A_NO_MEMORY;
66644 +    }
66645 +
66646 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66647 +
66648 +    cmd = (WMI_SET_WMM_TXOP_CMD *)(A_NETBUF_DATA(osbuf));
66649 +    A_MEMZERO(cmd, sizeof(*cmd));
66650 +    cmd->txopEnable = cfg;
66651 +
66652 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_WMM_TXOP_CMDID,
66653 +            NO_SYNC_WMIFLAG));
66654 +
66655 +}
66656 +
66657 +#ifdef CONFIG_HOST_TCMD_SUPPORT
66658 +/* WMI  layer doesn't need to know the data type of the test cmd.
66659 +   This would be beneficial for customers like Qualcomm, who might
66660 +   have different test command requirements from differnt manufacturers
66661 + */
66662 +A_STATUS
66663 +wmi_test_cmd(struct wmi_t *wmip, A_UINT8 *buf, A_UINT32  len)
66664 +{
66665 +    void *osbuf;
66666 +    char *data;
66667 +
66668 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter\n", DBGARG));
66669 +
66670 +    osbuf= A_NETBUF_ALLOC(len);
66671 +    if(osbuf == NULL)
66672 +    {
66673 +        return A_NO_MEMORY;
66674 +    }
66675 +    A_NETBUF_PUT(osbuf, len);
66676 +    data = A_NETBUF_DATA(osbuf);
66677 +    A_MEMCPY(data, buf, len);
66678 +
66679 +    return(wmi_cmd_send(wmip, osbuf, WMI_TEST_CMDID,
66680 +         NO_SYNC_WMIFLAG));
66681 +}
66682 +
66683 +#endif
66684 +
66685 +A_STATUS
66686 +wmi_set_bt_status_cmd(struct wmi_t *wmip, A_UINT8 streamType, A_UINT8 status)
66687 +{
66688 +    void *osbuf;
66689 +    WMI_SET_BT_STATUS_CMD *cmd;
66690 +
66691 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66692 +    if (osbuf == NULL) {
66693 +        return A_NO_MEMORY;
66694 +    }
66695 +
66696 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66697 +
66698 +    cmd = (WMI_SET_BT_STATUS_CMD *)(A_NETBUF_DATA(osbuf));
66699 +    A_MEMZERO(cmd, sizeof(*cmd));
66700 +    cmd->streamType = streamType;
66701 +    cmd->status = status;
66702 +
66703 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_STATUS_CMDID,
66704 +            NO_SYNC_WMIFLAG));
66705 +}
66706 +
66707 +A_STATUS
66708 +wmi_set_bt_params_cmd(struct wmi_t *wmip, WMI_SET_BT_PARAMS_CMD* cmd)
66709 +{
66710 +    void *osbuf;
66711 +    WMI_SET_BT_PARAMS_CMD* alloc_cmd;
66712 +
66713 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66714 +    if (osbuf == NULL) {
66715 +        return A_NO_MEMORY;
66716 +    }
66717 +
66718 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66719 +
66720 +    alloc_cmd = (WMI_SET_BT_PARAMS_CMD *)(A_NETBUF_DATA(osbuf));
66721 +    A_MEMZERO(alloc_cmd, sizeof(*cmd));
66722 +    A_MEMCPY(alloc_cmd, cmd, sizeof(*cmd));
66723 +
66724 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_BT_PARAMS_CMDID,
66725 +            NO_SYNC_WMIFLAG));
66726 +}
66727 +
66728 +A_STATUS
66729 +wmi_get_keepalive_configured(struct wmi_t *wmip)
66730 +{
66731 +    void *osbuf;
66732 +    WMI_GET_KEEPALIVE_CMD *cmd;
66733 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66734 +    if (osbuf == NULL) {
66735 +        return A_NO_MEMORY;
66736 +    }
66737 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66738 +    cmd = (WMI_GET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf));
66739 +    A_MEMZERO(cmd, sizeof(*cmd));
66740 +    return (wmi_cmd_send(wmip, osbuf, WMI_GET_KEEPALIVE_CMDID,
66741 +                         NO_SYNC_WMIFLAG));
66742 +}
66743 +
66744 +A_UINT8
66745 +wmi_get_keepalive_cmd(struct wmi_t *wmip)
66746 +{
66747 +    return wmip->wmi_keepaliveInterval;
66748 +}
66749 +
66750 +A_STATUS
66751 +wmi_set_keepalive_cmd(struct wmi_t *wmip, A_UINT8 keepaliveInterval)
66752 +{
66753 +    void *osbuf;
66754 +    WMI_SET_KEEPALIVE_CMD *cmd;
66755 +
66756 +    osbuf = A_NETBUF_ALLOC(sizeof(*cmd));
66757 +    if (osbuf == NULL) {
66758 +        return A_NO_MEMORY;
66759 +    }
66760 +
66761 +    A_NETBUF_PUT(osbuf, sizeof(*cmd));
66762 +
66763 +    cmd = (WMI_SET_KEEPALIVE_CMD *)(A_NETBUF_DATA(osbuf));
66764 +    A_MEMZERO(cmd, sizeof(*cmd));
66765 +    cmd->keepaliveInterval = keepaliveInterval;
66766 +    wmip->wmi_keepaliveInterval = keepaliveInterval;
66767 +
66768 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_KEEPALIVE_CMDID,
66769 +                         NO_SYNC_WMIFLAG));
66770 +}
66771 +
66772 +A_STATUS
66773 +wmi_set_appie_cmd(struct wmi_t *wmip, A_UINT8 mgmtFrmType, A_UINT8 ieLen,
66774 +                  A_UINT8 *ieInfo)
66775 +{
66776 +    void *osbuf;
66777 +    WMI_SET_APPIE_CMD *cmd;
66778 +    A_UINT16 cmdLen;
66779 +
66780 +    if (ieLen > WMI_MAX_IE_LEN) {
66781 +        return A_ERROR;
66782 +    }
66783 +    cmdLen = sizeof(*cmd) + ieLen - 1;
66784 +    osbuf = A_NETBUF_ALLOC(cmdLen);
66785 +    if (osbuf == NULL) {
66786 +        return A_NO_MEMORY;
66787 +    }
66788 +
66789 +    A_NETBUF_PUT(osbuf, cmdLen);
66790 +
66791 +    cmd = (WMI_SET_APPIE_CMD *)(A_NETBUF_DATA(osbuf));
66792 +    A_MEMZERO(cmd, cmdLen);
66793 +
66794 +    cmd->mgmtFrmType = mgmtFrmType;
66795 +    cmd->ieLen = ieLen;
66796 +    A_MEMCPY(cmd->ieInfo, ieInfo, ieLen);
66797 +
66798 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_APPIE_CMDID, NO_SYNC_WMIFLAG));
66799 +}
66800 +
66801 +A_STATUS
66802 +wmi_set_halparam_cmd(struct wmi_t *wmip, A_UINT8 *cmd, A_UINT16 dataLen)
66803 +{
66804 +    void *osbuf;
66805 +    A_UINT8 *data;
66806 +
66807 +    osbuf = A_NETBUF_ALLOC(dataLen);
66808 +    if (osbuf == NULL) {
66809 +        return A_NO_MEMORY;
66810 +    }
66811 +
66812 +    A_NETBUF_PUT(osbuf, dataLen);
66813 +
66814 +    data = A_NETBUF_DATA(osbuf);
66815 +
66816 +    A_MEMCPY(data, cmd, dataLen);
66817 +
66818 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_WHALPARAM_CMDID, NO_SYNC_WMIFLAG));
66819 +}
66820 +
66821 +A_INT32
66822 +wmi_get_rate(A_INT8 rateindex)
66823 +{
66824 +    if (rateindex == RATE_AUTO) {
66825 +        return 0;
66826 +    } else {
66827 +        return(wmi_rateTable[(A_UINT32) rateindex]);
66828 +    }
66829 +}
66830 +
66831 +void
66832 +wmi_node_return (struct wmi_t *wmip, bss_t *bss)
66833 +{
66834 +       if (NULL != bss)
66835 +       {
66836 +               wlan_node_return (&wmip->wmi_scan_table, bss);
66837 +       }
66838 +}
66839 +
66840 +bss_t *
66841 +wmi_find_Ssidnode (struct wmi_t *wmip, A_UCHAR *pSsid,
66842 +                                  A_UINT32 ssidLength, A_BOOL bIsWPA2)
66843 +{
66844 +       bss_t *node = NULL;
66845 +    node = wlan_find_Ssidnode (&wmip->wmi_scan_table, pSsid,
66846 +                                                          ssidLength, bIsWPA2);
66847 +       return node;
66848 +}
66849 +
66850 +void
66851 +wmi_free_allnodes(struct wmi_t *wmip)
66852 +{
66853 +       wlan_free_allnodes(&wmip->wmi_scan_table);
66854 +}
66855 +
66856 +bss_t *
66857 +wmi_find_node(struct wmi_t *wmip, const A_UINT8 *macaddr)
66858 +{
66859 +       bss_t *ni=NULL;
66860 +       ni=wlan_find_node(&wmip->wmi_scan_table,macaddr);
66861 +       return ni;
66862 +}
66863 +
66864 +A_STATUS
66865 +wmi_dset_open_reply(struct wmi_t *wmip,
66866 +                    A_UINT32 status,
66867 +                    A_UINT32 access_cookie,
66868 +                    A_UINT32 dset_size,
66869 +                    A_UINT32 dset_version,
66870 +                    A_UINT32 targ_handle,
66871 +                    A_UINT32 targ_reply_fn,
66872 +                    A_UINT32 targ_reply_arg)
66873 +{
66874 +    void *osbuf;
66875 +    WMIX_DSETOPEN_REPLY_CMD *open_reply;
66876 +
66877 +    A_DPRINTF(DBG_WMI, (DBGFMT "Enter - wmip=0x%x\n", DBGARG, (int)wmip));
66878 +
66879 +    osbuf = A_NETBUF_ALLOC(sizeof(*open_reply));
66880 +    if (osbuf == NULL) {
66881 +        return A_NO_MEMORY;
66882 +    }
66883 +
66884 +    A_NETBUF_PUT(osbuf, sizeof(*open_reply));
66885 +    open_reply = (WMIX_DSETOPEN_REPLY_CMD *)(A_NETBUF_DATA(osbuf));
66886 +
66887 +    open_reply->status                   = status;
66888 +    open_reply->targ_dset_handle         = targ_handle;
66889 +    open_reply->targ_reply_fn            = targ_reply_fn;
66890 +    open_reply->targ_reply_arg           = targ_reply_arg;
66891 +    open_reply->access_cookie            = access_cookie;
66892 +    open_reply->size                     = dset_size;
66893 +    open_reply->version                  = dset_version;
66894 +
66895 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETOPEN_REPLY_CMDID,
66896 +                             NO_SYNC_WMIFLAG));
66897 +}
66898 +
66899 +static A_STATUS
66900 +wmi_get_pmkid_list_event_rx(struct wmi_t *wmip, A_UINT8 *datap, A_UINT32 len)
66901 +{
66902 +    WMI_PMKID_LIST_REPLY *reply;
66903 +    A_UINT32 expected_len;
66904 +
66905 +    if (len < sizeof(WMI_PMKID_LIST_REPLY)) {
66906 +        return A_EINVAL;
66907 +    }
66908 +    reply = (WMI_PMKID_LIST_REPLY *)datap;
66909 +    expected_len = sizeof(reply->numPMKID) + reply->numPMKID * WMI_PMKID_LEN;
66910 +
66911 +    if (len < expected_len) {
66912 +        return A_EINVAL;
66913 +    }
66914 +
66915 +    A_WMI_PMKID_LIST_EVENT(wmip->wmi_devt, reply->numPMKID,
66916 +                           reply->pmkidList);
66917 +
66918 +    return A_OK;
66919 +}
66920 +
66921 +#ifdef CONFIG_HOST_DSET_SUPPORT
66922 +A_STATUS
66923 +wmi_dset_data_reply(struct wmi_t *wmip,
66924 +                    A_UINT32 status,
66925 +                    A_UINT8 *user_buf,
66926 +                    A_UINT32 length,
66927 +                    A_UINT32 targ_buf,
66928 +                    A_UINT32 targ_reply_fn,
66929 +                    A_UINT32 targ_reply_arg)
66930 +{
66931 +    void *osbuf;
66932 +    WMIX_DSETDATA_REPLY_CMD *data_reply;
66933 +    int size;
66934 +
66935 +    size = sizeof(*data_reply) + length;
66936 +
66937 +    A_DPRINTF(DBG_WMI,
66938 +        (DBGFMT "Enter - length=%d status=%d\n", DBGARG, length, status));
66939 +
66940 +    osbuf = A_NETBUF_ALLOC(size);
66941 +    if (osbuf == NULL) {
66942 +        return A_NO_MEMORY;
66943 +    }
66944 +    A_NETBUF_PUT(osbuf, size);
66945 +    data_reply = (WMIX_DSETDATA_REPLY_CMD *)(A_NETBUF_DATA(osbuf));
66946 +
66947 +    data_reply->status                     = status;
66948 +    data_reply->targ_buf                   = targ_buf;
66949 +    data_reply->targ_reply_fn              = targ_reply_fn;
66950 +    data_reply->targ_reply_arg             = targ_reply_arg;
66951 +    data_reply->length                     = length;
66952 +
66953 +    if (status == A_OK) {
66954 +        if (a_copy_from_user(data_reply->buf, user_buf, length)) {
66955 +            return A_ERROR;
66956 +        }
66957 +    }
66958 +
66959 +    return (wmi_cmd_send_xtnd(wmip, osbuf, WMIX_DSETDATA_REPLY_CMDID,
66960 +                             NO_SYNC_WMIFLAG));
66961 +}
66962 +#endif /* CONFIG_HOST_DSET_SUPPORT */
66963 +
66964 +A_STATUS
66965 +wmi_set_wsc_status_cmd(struct wmi_t *wmip, A_UINT32 status)
66966 +{
66967 +    void *osbuf;
66968 +    char *cmd;
66969 +
66970 +       wps_enable = status;
66971 +
66972 +    osbuf = a_netbuf_alloc(sizeof(1));
66973 +    if (osbuf == NULL) {
66974 +        return A_NO_MEMORY;
66975 +    }
66976 +
66977 +    a_netbuf_put(osbuf, sizeof(1));
66978 +
66979 +    cmd = (char *)(a_netbuf_to_data(osbuf));
66980 +
66981 +    A_MEMZERO(cmd, sizeof(*cmd));
66982 +    cmd[0] = (status?1:0);
66983 +    return (wmi_cmd_send(wmip, osbuf, WMI_SET_WSC_STATUS_CMDID,
66984 +                         NO_SYNC_WMIFLAG));
66985 +}
66986 +
66987 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h
66988 ===================================================================
66989 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
66990 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_doc.h      2008-12-11 22:46:49.000000000 +0100
66991 @@ -0,0 +1,4421 @@
66992 +/*
66993 + *
66994 + * Copyright (c) 2004-2007 Atheros Communications Inc.
66995 + * All rights reserved.
66996 + *
66997 + *
66998 + *  This program is free software; you can redistribute it and/or modify
66999 + *  it under the terms of the GNU General Public License version 2 as
67000 + *  published by the Free Software Foundation;
67001 + *
67002 + *  Software distributed under the License is distributed on an "AS
67003 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
67004 + *  implied. See the License for the specific language governing
67005 + *  rights and limitations under the License.
67006 + *
67007 + *
67008 + *
67009 + */
67010 +
67011 +
67012 +#if 0
67013 +Wireless Module Interface (WMI) Documentaion
67014 +
67015 +   This section describes the format and the usage model for WMI control and
67016 +   data messages between the host and the AR6000-based targets. The header
67017 +   file include/wmi.h contains all command and event manifest constants as
67018 +   well as structure typedefs for each set of command and reply parameters.
67019 +
67020 +Data Frames
67021 +
67022 +   The data payload transmitted and received by the target follows RFC-1042
67023 +   encapsulation and thus starts with an 802.2-style LLC-SNAP header. The
67024 +   WLAN module completes 802.11 encapsulation of the payload, including the
67025 +   MAC header, FCS, and WLAN security related fields. At the interface to the
67026 +   message transport (HTC), a data frame is encapsulated in a WMI message.
67027 +
67028 +WMI Message Structure
67029 +
67030 +   The WMI protocol leverages an 802.3-style Ethernet header in communicating
67031 +   the source and destination information between the host and the AR6000
67032 +   modules using a 14-byte 802.3 header ahead of the 802.2-style payload. In
67033 +   addition, the WMI protocol adds a header to all data messages:
67034 +
67035 +    {
67036 +    INT8    rssi
67037 +                  The RSSI of the received packet and its units are shown in db above the
67038 +                      noise floor, and the noise floor is shown in dbm.
67039 +    UINT8   info
67040 +                      Contains information on message type and user priority. Message type
67041 +                      differentiates between a data packet and a synchronization message.
67042 +    } WMI_DATA_HDR
67043 +
67044 +   User priority contains the 802.1d user priority info from host to target. Host
67045 +   software translates the host Ethernet format to 802.3 format prior to Tx and
67046 +   802.3 format to host format in the Rx direction. The host does not transmit the
67047 +   FCS that follows the data. MsgType differentiates between a regular data
67048 +   packet (msgType=0) and a synchronization message (msgType=1).
67049 +
67050 +Data Endpoints
67051 +
67052 +   The AR6000 chipset provides several data endpoints to support quality of
67053 +   service (QoS) and maintains separate queues and separate DMA engines for
67054 +   each data endpoint. A data endpoint can be bi-directional.
67055 +
67056 +   Best effort (BE) class traffic uses the default data endpoint (2). The host can
67057 +   establish up to two additional data endpoints for other traffic classes. Once
67058 +   such a data endpoint is established, it sends and receives corresponding QoS
67059 +   traffic in a manner similar to the default data endpoint.
67060 +
67061 +   If QoS is desired over the interconnect, host software must classify each data
67062 +   packet and place it on the appropriate data endpoint. The information
67063 +   required to classify data is generally available in-band as an 802.1p/q style
67064 +   tag or as the ToS field in the IP header. The information may also be available
67065 +   out-of-band depending on the host DDI.
67066 +
67067 +Connection States
67068 +
67069 +   Table B-1 describes the AR6000 WLAN connection states:
67070 +
67071 +   Table B-1.  AR6000 Connection States
67072 +
67073 +Connection State
67074 +    Description
67075 +
67076 +   DISCONNECTED
67077 +    In this state, the AR6000 device is not connected to a wireless
67078 +   network. The device is in this state after reset when it sends the
67079 +   WIRELESS MODULE \93READY\94 EVENT, after it processes a
67080 +   DISCONNECT command, and when it loses its link with the
67081 +   access point (AP) that it was connected to. The device signals a
67082 +   transition to the DISCONNECTED state with a \93DISCONNECT\94
67083 +   event.
67084 +
67085 +CONNECTED
67086 +    In this state, the AR6000 device is connected to wireless networks.
67087 +   The device enters this state after successfully processing a
67088 +   CONNECT, which establishes a connection with a wireless
67089 +   network. The device signals a transition to the CONNECTED state
67090 +   with a \93CONNECT\94 event.
67091 +
67092 +
67093 +Message Types
67094 +
67095 +   WMI uses commands, replies, and events for the control and configuration of
67096 +   the AR6000 device. The control protocol is asynchronous. Table B-2 describes
67097 +   AR6000 message types:
67098 +
67099 +Table B-2.  AR6000 Message Types
67100 +
67101 +Message Type
67102 +    Description
67103 +
67104 +Commands
67105 +    Control messages that flow from the host to the device
67106 +
67107 +Replies/Events
67108 +    Control messages that flow from the device to the host.
67109 +
67110 +   The device issues a reply to some WMI commands, but not to others.
67111 +   The payload in a reply is command-specific, and some commands do
67112 +   not trigger a reply message at all. Events are control messages issued
67113 +   by the device to signal the occurrence of an asynchronous event.
67114 +
67115 +
67116 +WMI Message Format
67117 +
67118 +   All WMI control commands, replies and events use the header format:
67119 +
67120 +   WMI_CMD_HDR Header Format
67121 +   {
67122 +        UINT16 id
67123 +                 This 16-bit constant identifies which WMI command the host is issuing,
67124 +                 which command the target is replying to, or which event has occurred.
67125 +        WMI_CMD_HDR
67126 +   }
67127 +
67128 +
67129 +   A variable-size command-, reply-, or event-specific payload follows the
67130 +   header. Over the interconnect, all fields in control messages (including
67131 +   WMI_CMD_HDR and the command specific payload) use 32-bit little Endian
67132 +   byte ordering and fields are packed. The AR6000 device always executes
67133 +   commands in order, and the host may send multiple commands without
67134 +   waiting for previous commands to complete. A majority of commands are
67135 +   processed to completion once received. Other commands trigger a longer
67136 +   duration activity whose completion is signaled to the host through an event.
67137 +
67138 +Command Restrictions
67139 +
67140 +   Some commands may only be issued when the AR6000 device is in a certain
67141 +   state. The host is required to wait for an event signaling a state transition
67142 +   before such a command can be issued. For example, if a command requires
67143 +   the device to be in the CONNECTED state, then the host is required to wait
67144 +   for a \93CONNECT\94 event before it issues that command.
67145 +
67146 +   The device ignores any commands inappropriate for its current state. If the
67147 +   command triggers a reply, the device generates an error reply. Otherwise, the
67148 +   device silently ignores the inappropriate command.
67149 +
67150 +Command and Data Synchronization
67151 +
67152 +   WMI provides a mechanism for a host to advise the device of necessary
67153 +   synchronization between commands and data. The device implements
67154 +   synchronization; no implicit synchronization exists between endpoints.
67155 +
67156 +   The host controls synchronization using the \93SYNCHRONIZE\94 command
67157 +   over the control channel and synchronization messages over data channels.
67158 +   The device stops each data channel upon receiving a synchronization message
67159 +   on that channel, processing all data packets received prior to that message.
67160 +   After the device receives synchronization messages for each data endpoint
67161 +   and the \93SYNCHRONIZE\94 command, it resumes all channels.
67162 +
67163 +   When the host must guarantee a command executes before processing new
67164 +   data packets, it first issues the command, then issues the \93SYNCHRONIZE\94
67165 +   command and sends synchronization messages on data channels. When the
67166 +   host must guarantee the device has processed all old data packets before a
67167 +   processing a new command, it issues a \93SYNCHRONIZE\94 command and
67168 +   synchronization messages on all data channels, then issues the desired
67169 +   command.
67170 +
67171 +
67172 +
67173 +WMI Commands
67174 +
67175 +   ADD_BAD_AP
67176 +    Cause the AR6000 device to avoid a particular AP
67177 +   ADD_CIPHER_KEY
67178 +    Add or replace any of the four AR6000 encryption keys
67179 +   ADD_WOW_PATTERN
67180 +    Used to add a pattern to the WoW pattern list
67181 +   CLR_RSSI_SNR
67182 +    Clear the current calculated RSSI and SNR value
67183 +   CONNECT_CMD
67184 +    Request that the AR6000 device establish a wireless connection
67185 +        with the specified SSID
67186 +   CREATE_PSTREAM
67187 +    Create prioritized data endpoint between the host and device
67188 +   DELETE_BAD_AP
67189 +    Clear an entry in the bad AP table
67190 +   DELETE_CIPHER_KEY
67191 +    Delete a previously added cipher key
67192 +   DELETE_PSTREAM
67193 +    Delete a prioritized data endpoint
67194 +   DELETE_WOW_PATTERN
67195 +    Remove a pre-specified pattern from the WoW pattern list
67196 +   EXTENSION
67197 +    WMI message interface command
67198 +   GET_BIT_RATE
67199 +    Retrieve rate most recently used by the AR6000
67200 +   GET_CHANNEL_LIST
67201 +    Retrieve list of channels used by the AR6000
67202 +   GET_FIXRATES
67203 +    Retrieves the rate-mask set via the SET_FIXRATES command.
67204 +   GET_PMKID_LIST_CMD
67205 +    Retrieve the firmware list of PMKIDs
67206 +   GET_ROAM_DATA
67207 +    Internal use for data collection; available in special build only
67208 +   GET_ROAM_TBL
67209 +    Retrieve the roaming table maintained on the target
67210 +   GET_TARGET_STATS
67211 +    Request that the target send the statistics it maintains
67212 +   GET_TX_PWR
67213 +    Retrieve the current AR6000 device Tx power levels
67214 +   GET_WOW_LIST
67215 +    Retrieve the current list of WoW patterns
67216 +   LQ_THRESHOLD_PARAMS
67217 +    Set the link quality thresholds
67218 +   OPT_TX_FRAME
67219 +    Send a special frame (special feature)
67220 +   RECONNECT
67221 +    Request a reconnection to a BSS
67222 +   RSSI_THRESHOLD_PARAMS
67223 +    Configure how the AR6000 device monitors and reports signal
67224 +       strength (RSSI) of the connected BSS
67225 +   SCAN_PARAMS
67226 +    Determine dwell time and changes scanned channels
67227 +   SET_ACCESS_PARAMS
67228 +    Set access parameters for the wireless network
67229 +   SET_ADHOC_BSSID
67230 +    Set the BSSID for an ad hoc network
67231 +   SET_AKMP_PARAMS
67232 +    Set multiPMKID mode
67233 +   SET_APPIE
67234 +    Add application-specified IE to a management frame
67235 +   SET_ASSOC_INFO
67236 +    Specify the IEs the device should add to association or
67237 +        reassociation requests
67238 +   SET_AUTH_MODE
67239 +    Set 802.11 authentication mode of reconnection
67240 +   SET_BEACON_INT
67241 +    Set the beacon interval for an ad hoc network
67242 +   SET_BIT_RATE
67243 +    Set the AR6000 to a specific fixed bit rate
67244 +   SET_BMISS_TIME
67245 +    Set the beacon miss time
67246 +   SET_BSS_FILTER
67247 +    Inform the AR6000 of network types about which it wants to
67248 +        receive information using a \93BSSINFO\94 event
67249 +   SET_BT_PARAMS
67250 +    Set the status of a Bluetooth stream (SCO or A2DP) or set
67251 +        Bluetooth coexistence register parameters
67252 +   SET_BT_STATUS
67253 +    Set the status of a Bluetooth stream (SCO or A2DP)
67254 +   SET_CHANNEL_PARAMETERS
67255 +    Configure WLAN channel parameters
67256 +   SET_DISC_TIMEOUT
67257 +    Set the amount of time the AR6000 spends attempting to
67258 +        reestablish a connection
67259 +   SET_FIXRATES
67260 +    Set the device to a specific fixed PHY rate (supported subset)
67261 +   SET_HALPARAM
67262 +    Internal AR6000 command to set certain hardware parameters
67263 +   SET_HOST_SLEEP_MODE
67264 +    Set the host mode to asleep or awake
67265 +   SET_IBSS_PM_CAPS
67266 +    Support a non-standard power management scheme for an
67267 +        ad hoc network
67268 +   SET_LISTEN_INT
67269 +    Request a listen interval
67270 +   SET_LPREAMBLE
67271 +    Override the short preamble capability of the AR6000 device
67272 +   SET_MAX_SP_LEN
67273 +    Set the maximum service period
67274 +   SET_OPT_MODE
67275 +    Set the special mode on/off (special feature)
67276 +   SET_PMKID
67277 +    Set the pairwise master key ID (PMKID)
67278 +   SET_PMKID_LIST_CMD
67279 +    Configure the firmware list of PMKIDs
67280 +   SET_POWER_MODE
67281 +    Set guidelines on trade-off between power utilization
67282 +   SET_POWER_PARAMS
67283 +    Configure power parameters
67284 +   SET_POWERSAVE_PARAMS
67285 +    Set the two AR6000 power save timers
67286 +   SET_PROBED_SSID
67287 +    Provide list of SSIDs the device should seek
67288 +   SET_REASSOC_MODE
67289 +    Specify whether the disassociated frame should be sent upon
67290 +        reassociation
67291 +   SET_RETRY_LIMITS
67292 +    Limit how many times the device tries to send a frame
67293 +   SET_ROAM_CTRL
67294 +    Control roaming behavior
67295 +   SET_RTS
67296 +    Determine when RTS should be sent
67297 +   SET_SCAN_PARAMS
67298 +    Set the AR6000 scan parameters
67299 +   SET_TKIP_COUNTERMEASURES
67300 +    Enable/disable reports of TKIP MIC errors
67301 +   SET_TX_PWR
67302 +    Specify the AR6000 device Tx power levels
67303 +   SET_VOICE_PKT_SIZE
67304 +    Set voice packet size
67305 +   SET_WMM
67306 +    Override the AR6000 WMM capability
67307 +   SET_WMM_TXOP
67308 +    Configure TxOP bursting when sending traffic to a WMM-
67309 +    capable AP
67310 +   SET_WOW_MODE
67311 +    Enable/disable WoW mode
67312 +   SET_WSC_STATUS
67313 +    Enable/disable profile check in cserv when the WPS protocol
67314 +    is in progress
67315 +   SNR_THRESHOLD_PARAMS
67316 +    Configure how the device monitors and reports SNR of BSS
67317 +   START_SCAN
67318 +    Start a long or short channel scan
67319 +   SYNCHRONIZE
67320 +    Force a synchronization point between command and data
67321 +    paths
67322 +   TARGET_REPORT_ERROR_BITMASK
67323 +    Control \93ERROR_REPORT\94 events from the AR6000
67324 +
67325 +
67326 +
67327 +
67328 +Name
67329 +    ADD_BAD_AP
67330 +
67331 +Synopsis
67332 +    The host uses this command to cause the AR6000 to avoid a particular AP. The
67333 +    AR6000 maintain a table with up to two APs to avoid. An ADD_BAD_AP command
67334 +    adds or replaces the specified entry in this bad AP table.
67335 +
67336 +    If the AR6000 are currently connected to the AP specified in this command, they
67337 +    disassociate.
67338 +
67339 +Command
67340 +    wmiconfig eth1 --badap <bssid> <badApIndex>
67341 +
67342 +Command Parameters
67343 +    UINT8 badApIndex    Index [0...1] that identifies which entry in the
67344 +                        bad AP table to use
67345 +
67346 +
67347 +    UINT8 bssid[6]  MAC address of the AP to avoid
67348 +
67349 +Command Values
67350 +    badApIndex = 0, 1    Entry in the bad AP table to use
67351 +
67352 +Reset Value
67353 +    The bad AP table is cleared
67354 +
67355 +Restrictions
67356 +    None
67357 +
67358 +See Also
67359 +    \93DELETE_BAD_AP\94 on page B-13
67360 +
67361 +=====================================================================
67362 +Name
67363 +    ADD_CIPHER_KEY
67364 +
67365 +Synopsis
67366 +    The host uses this command to add/replace any of four encryption keys on the
67367 +    AR6000. The ADD_CIPHER_KEY command is issued after the CONNECT event
67368 +    has been received by the host for all dot11Auth modes except for SHARED_AUTH.
67369 +    When the dot11AuthMode is SHARED_AUTH, then the ADD_CIPHER_KEY
67370 +    command should be issued before the \93CONNECT\94 command.
67371 +
67372 +Command
67373 +    wmiconfig eth1 --cipherkey <keyIndex> <keyType> <keyUsage>
67374 +                            <keyLength> <keyopctrl> <keyRSC> <key>
67375 +
67376 +Command Parameters
67377 +    UINT8 keyIndex      Index (0...3) of the key to add/replace;
67378 +                        uniquely identifies the key
67379 +    UINT8 keyType    CRYPTO_TYPE
67380 +    UINT8 keyUsage   Specifies usage parameters of the key when
67381 +                     keyType = WEP_CRYPT
67382 +    UINT8 keyLength  Length of the key in bytes
67383 +    UINT8 keyOpCtrl  bit[0] = Initialize TSC (default),
67384 +                     bit[1] = Initialize RSC
67385 +    UINT8 keyRSC[8]  Key replay sequence counter (RSC) initial
67386 +                     value the device should use
67387 +    UINT8 key[32]    Key material used for this connection
67388 +    Command Values
67389 +    {
67390 +        NONE_CRYPT = 1
67391 +        WEP_CRYPT  = 2
67392 +        TKIP_CRYPT = 3
67393 +        AES_CRYPT  = 4
67394 +        KEY_OP_INIT_TSC   0x01
67395 +        KEY_OP_INIT_RSC   0x02
67396 +        KEY_OP_INIT_VAL   0x03
67397 +                Default is to Initialize the TSC
67398 +        KEY_OP_VALID_MASK 0x04
67399 +                Two operations defined
67400 +    } CRYPTO_TYPE
67401 +
67402 +    {
67403 +        PAIRWISE_USAGE  = 0  Set if the key is used for unicast traffic only
67404 +        GROUP_USAGE     = 1  Set if the key is used to receive multicast
67405 +                              traffic (also set for static WEP keys)
67406 +        TX_USAGE        = 2  Set for the GROUP key used to transmit frames
67407 +                All others are reserved
67408 +    } KEY_USAGE
67409 +
67410 +Reset Value
67411 +    The four available keys are disabled.
67412 +
67413 +Restrictions
67414 +    The cipher should correspond to the encryption mode specified in the \93CONNECT\94
67415 +    command.
67416 +
67417 +See Also
67418 +    \93DELETE_CIPHER_KEY\94
67419 +
67420 +=====================================================================
67421 +
67422 +
67423 +Name
67424 +    ADD_WOW_PATTERN
67425 +
67426 +Synopsis
67427 +    The host uses this command to add a pattern to the WoW pattern list; used for
67428 +    pattern-matching for host wakeups by the WoW module. If the host mode is asleep
67429 +    and WoW is enabled, all packets are matched against the existing WoW patterns. If a
67430 +    packet matches any of the patterns specified, the target will wake up the host. All
67431 +    non-matching packets are discarded by the target without being sent up to the host.
67432 +
67433 +Command
67434 +    wmiconfig \96addwowpattern <list-id> <filter-size> <filter-offset>
67435 +    <pattern> <mask>
67436 +
67437 +Command Parameters
67438 +    A_UINT8  filter_list_id    ID of the list that is to include the new pattern
67439 +    A_UINT8  filter_size       Size of the new pattern
67440 +    A_UINT8  filter_offset     Offset at which the pattern matching for this
67441 +                                new pattern should begin at
67442 +    A_UINT8  filter[1]         Byte stream that contains both the pattern and
67443 +                                the mask of the new WoW wake-up pattern
67444 +
67445 +Reply Parameters
67446 +    None
67447 +
67448 +Reset Value
67449 +    None defined (default host mode is awake)
67450 +
67451 +Restrictions
67452 +    None
67453 +
67454 +See Also
67455 +    \93DELETE_WOW_PATTERN\94
67456 +
67457 +=====================================================================
67458 +
67459 +
67460 +Name
67461 +    CLR_RSSI_SNR
67462 +
67463 +Synopsis
67464 +    Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by
67465 +    running-average value. This command will clear the history and have a fresh start
67466 +    for the running-average mechanism.
67467 +
67468 +Command
67469 +    wmiconfig eth1 --cleanRssiSnr
67470 +
67471 +Command Parameters
67472 +    None
67473 +
67474 +Reply Parameters
67475 +    None
67476 +
67477 +Reset Value
67478 +    None defined
67479 +
67480 +Restrictions
67481 +    None
67482 +
67483 +=====================================================================
67484 +
67485 +Name
67486 +    CONNECT_CMD
67487 +
67488 +Synopsis
67489 +    New connect control information (connectCtrl) is added, with 32 possible modifiers.
67490 +
67491 +    CONNECT_SEND_REASSOC
67492 +        Valid only for a host-controlled connection to a
67493 +        particular AP. If this bit is set, a reassociation frame is
67494 +        sent. If this bit is clear, an association request frame is
67495 +        sent to the AP.
67496 +
67497 +    CONNECT_IGNORE_WPAx_GROUP_CIPHER
67498 +        No group key is issued in the CONNECT command,
67499 +        so use the group key advertised by the AP. In a target-
67500 +        initiated roaming situation this allows a STA to roam
67501 +        between APs that support different multicast ciphers.
67502 +
67503 +    CONNECT_PROFILE_MATCH_DONE
67504 +        In a host-controlled connection case, it is possible that
67505 +        during connect, firmware may not have the
67506 +        information for a profile match (e.g, when the AP
67507 +        supports hidden SSIDs and the device may not
67508 +        transmit probe requests during connect). By setting
67509 +        this bit in the connection control information, the
67510 +        firmware waits for a beacon from the AP with the
67511 +        BSSID supplied in the CONNECT command. No
67512 +        additional profile checks are done.
67513 +
67514 +    CONNECT_IGNORE_AAC_BEACON
67515 +        Ignore the Admission Capacity information in the
67516 +        beacon of the AP
67517 +
67518 +    CONNECT_ASSOC_POLICY_USER
67519 +        When set, the CONNECT_SEND_REASSOC setting
67520 +        determines if an Assoc or Reassoc is sent to an AP
67521 +
67522 +Command
67523 +    wmiconfig --setconnectctrl <ctrl flags bitmask>
67524 +
67525 +Command Parameters
67526 +    typedef struct{
67527 +    A_UINT8 networktype;
67528 +    A_UINT8 dot11authmode;
67529 +    A_UINT8 authmode;
67530 +    A_UINT8 pairwiseCryptoType; /*CRYPTO_TYPE*/
67531 +    A_UINT8 pairwiseCryptoLen;
67532 +    A_UINT8 groupCryptoType; /*CRYPTO_TYPE*/
67533 +    A_UINT8 groupCryptoLen;
67534 +    A_UINT8 ssidLength;
67535 +    A_UCHAR ssid[WMI_MAX_SSID_LEN];
67536 +    A_UINT16 channel;
67537 +    A_UINT8 bssid[AUTH_MAC_LEN];
67538 +    A_UINT8 ctrl_flags; /*WMI_CONNECT_CTRL_FLAGS_BITS*/
67539 +    } WMI_CONNECT_CMD;
67540 +
67541 +    ctrl flags bitmask
67542 +        = 0x0001 CONNECT_ASSOC_POLICY_USER
67543 +            Assoc frames are sent using the policy specified by
67544 +            the flag
67545 +        = 0x0002 CONNECT_SEND_REASSOC
67546 +            Send Reassoc frame while connecting, otherwise send
67547 +            assoc frames
67548 +        = 0x0004 CONNECT_IGNORE_WPAx_GROUP_CIPHER
67549 +            Ignore WPAx group cipher for WPA/WPA2
67550 +        = 0x0008 CONNECT_PROFILE_MATCH_DONE
67551 +            Ignore any profile check
67552 +        = 0x0010 CONNECT_IGNORE_AAC_BEACON
67553 +            Ignore the admission control information in the
67554 +            beacon
67555 +        ... CONNECT_CMD, continued
67556 +        Command Values
67557 +        typedef enum {
67558 +            INFRA_NETWORK       = 0x01,
67559 +            ADHOC_NETWORK       = 0x02,
67560 +            ADHOC_CREATOR       = 0x04,
67561 +        } NETWORK_TYPE;
67562 +
67563 +        typedef enum {
67564 +            OPEN_AUTH           = 0x01,
67565 +            SHARED_AUTH         = 0x02,
67566 +            LEAP_AUTH           = 0x04,
67567 +        } DOT11_AUTH_MODE;
67568 +        typedef enum {
67569 +            NONE_AUTH           = 0x01,
67570 +            WPA_AUTH            = 0x02,
67571 +            WPA_PSK_AUTH        = 0x03,
67572 +            WPA2_AUTH           = 0x04,
67573 +            WPA2_PSK_AUTH       = 0x05,
67574 +            WPA_AUTH_CCKM       = 0x06,
67575 +            WPA2_AUTH_CCKM      = 0x07,
67576 +        } AUTH_MODE;
67577 +        typedef enum {
67578 +            NONE_CRYPT          = 0x01,
67579 +            WEP_CRYPT           = 0x02,
67580 +            TKIP_CRYPT          = 0x03,
67581 +            AES_CRYPT           = 0x04,
67582 +        } CRYPTO_TYPE;
67583 +        typedef enum {
67584 +            CONNECT_ASSOC_POLICY_USER = 0x0001,
67585 +            CONNECT_SEND_REASSOC = 0x0002,
67586 +            CONNECT_IGNORE_WPAx_GROUP_CIPHER = 0x0004,
67587 +            CONNECT_PROFILE_MATCH_DONE = 0x0008,
67588 +            CONNECT_IGNORE_AAC_BEACON = 0x0010,
67589 +        } WMI_CONNECT_CTRL_FLAGS_BITS;
67590 +
67591 +    pairwiseCryptoLen and groupCryptoLen are valid when the respective
67592 +    CryptoTypesis WEP_CRYPT, otherwise this value should be 0. This is the length in
67593 +    bytes.
67594 +
67595 +Reset Value
67596 +    None defined
67597 +
67598 +Restrictions
67599 +    None
67600 +
67601 +=====================================================================
67602 +
67603 +
67604 +Name
67605 +    CREATE_PSTREAM
67606 +
67607 +Synopsis
67608 +    The host uses this command to create a new prioritized data endpoint between the
67609 +    host and the AR6000 device that carries a prioritized stream of data. If the AP that the
67610 +    device connects to requires TSPEC stream establishment, the device requests the
67611 +    corresponding TSPEC with the AP. The maximum and minimum service interval
67612 +    ranges from 0 \96 0x7FFFFFFF (ms), where 0 = disabled. The device does not send a
67613 +    reply event for this command, as it is always assumed the command has succeeded.
67614 +    An AP admission control response comes to the host via a WMI_CAC_INDICATION
67615 +    event, once the response for the ADDTS frame comes.
67616 +
67617 +    Examples of cases where reassociation is generated (when WMM) and cases where
67618 +    ADDTS is generated (when WMM and enabling ACM) are when:
67619 +        Changing UAPSD flags in WMM mode, reassociation is generated
67620 +        Changing the interval of sending auto QoS Null frame in WMM mode;
67621 +            reassociation is not generated
67622 +        Issuing a command with same previous parameters in WMM mode and enabling
67623 +            ACM, an ADDTS request is generated
67624 +        Changing the interval of a QoS null frame sending in WMM mode and enabling
67625 +            ACM, an ADDTS request is generated
67626 +        Issuing the command in disconnected state, reassociation or ADDTS is not
67627 +            generated but the parameters are available after (re)association
67628 +
67629 +Command
67630 +    --createqos <user priority> <direction> <traffic class>
67631 +<trafficType> <voice PS capability> <min service interval> <max
67632 +service interval> <inactivity interval> <suspension interval>
67633 +<service start time> <tsid> <nominal MSDU> <max MSDU> <min data
67634 +rate> <mean data rate> <peak data rate> <max burst size> <delay
67635 +bound> <min phy rate> <sba> <medium time> where:
67636 +
67637 +    <user priority>
67638 +    802.1D user priority range (0\967)
67639 +    <direction>
67640 +        = 0    Tx (uplink) traffic
67641 +        = 1    Rx (downlink) traffic
67642 +        = 2    Bi-directional traffic
67643 +    <traffic class>
67644 +        = 1    BK
67645 +        = 2    VI
67646 +        = 3    VO
67647 +    <trafficType>
67648 +        = 0    Aperiodic
67649 +        = 1    Periodic
67650 +    <voice PS capability>
67651 +        Specifies whether the voice power save mechanism
67652 +    (APSD if AP supports it or legacy/simulated APSD
67653 +    [using PS-Poll]) should be used
67654 +        = 0    Disable voice power save for traffic class
67655 +        = 1    Enable APSD voice power save for traffic class
67656 +        = 2    Enable voice power save for all traffic classes
67657 +    <min service interval>
67658 +        (In ms)
67659 +    <max service interval>
67660 +        Inactivity interval (in ms) (0 = Infinite)
67661 +    <suspension interval>
67662 +        (In ms)
67663 +    <service start time>
67664 +        Service start time
67665 +    <tsid>
67666 +        TSID range (0\9615)
67667 +    <nominal MSDU>
67668 +        Nominal MAC SDU size
67669 +    <max MSDU>
67670 +        Maximum MAC SDU size
67671 +    <min data rate>
67672 +        Minimum data rate (in bps)
67673 +    <mean data rate>
67674 +        Mean data rate (in bps)
67675 +    <peak data rate>
67676 +        Peak data rate (in bps)
67677 +    <max burst size>
67678 +        Maximum burst size (in bps)
67679 +    <delay bound>
67680 +        Delay bound
67681 +    <min phy rate>
67682 +        Minimum PHY rate (in bps)
67683 +    <sba>
67684 +        Surplus bandwidth allowance
67685 +    <medium time>
67686 +        Medium time in TU of 32-ms periods per sec
67687 +    ... CREATE_PSTREAM (continued)
67688 +
67689 +Command Parameters
67690 +    UINT8 trafficClass    TRAFFIC_CLASS value
67691 +    UINT8 traffic
67692 +    Direction
67693 +    DIR_TYPE value
67694 +    UINT8    rxQueueNum
67695 +        AR6000 device mailbox index (2 or 3)
67696 +        corresponding to the endpoint the host
67697 +        wishes to use to receive packets for the
67698 +        prioritized stream
67699 +    UINT8 trafficType  TRAFFIC_TYPE value
67700 +    UINT8 voicePS
67701 +Capability
67702 +    VOICEPS_CAP_TYPE value
67703 +    UINT8 tsid          Traffic stream ID
67704 +    UINT8 userPriority  802.1D user priority
67705 +    UINT16 nominalMSDU  Nominal MSDU in octets
67706 +    UINT16 maxMSDU      Maximum MSDU in octets
67707 +    UINT32 minServiceInt Minimum service interval: the min.
67708 +                            period of traffic specified (in ms)
67709 +    UINT32 maxServiceInt  Maximum service interval: the max.
67710 +                        period of traffic specified (in ms)
67711 +    UINT32 inactivityInt Indicates how many ms an established
67712 +                        stream is inactive before the prioritized
67713 +                        data endpoint is taken down and the
67714 +                        corresponding T-SPEC deleted
67715 +    UINT32 suspensionInt  Suspension interval (in ms)
67716 +    UINT32 service       StartTime Service start time
67717 +    UINT32 minDataRate  Minimum data rate (in bps)
67718 +    UINT32 meanDataRate Mean data rate (in bps)
67719 +    UINT32 peakDataRate Peak data rate (in bps)
67720 +    UINT32 maxBurstSize
67721 +    UINT32 delayBound
67722 +    UINT32 minPhyRate   Minimum PHY rate for TSPEC (in bps)
67723 +    UINT32 sba          Surplus bandwidth allowance
67724 +    UINT32 mediumTime   Medium TSPEC time (in units of 32 ms)
67725 +Command Values
67726 +    {
67727 +        WMM_AC_BE = 0   Best Effort
67728 +        WMM_AC_BK = 1   Background
67729 +        WMM_AC_VI = 2   Video
67730 +        WMM_AC_VO = 3   Voice
67731 +        All other values reserved
67732 +    } TRAFFIC_CLASS
67733 +    {
67734 +        UPLINK_TRAFFIC   = 0  From the AR6000 device to the AP
67735 +        DOWNLINK_TRAFFIC = 1  From the AP to the AR6000 device
67736 +        BIDIR_TRAFFIC    = 2  Bi-directional traffic
67737 +        All other values reserved
67738 +    } DIR_TYPE
67739 +    {
67740 +        DISABLE_FOR_THIS_AC = 0
67741 +        ENABLE_FOR_THIS_AC  = 1
67742 +        ENABLE_FOR_ALL_AC   = 2
67743 +        All other values reserved
67744 +    } VOICEPS_CAP_TYPE
67745 +
67746 +    ... CREATE_PSTREAM (continued)
67747 +
67748 +
67749 +        VI  BE   BK    Supported, Y/N?
67750 +   0    0    0    0    Y
67751 +   0    0    0    1    Y
67752 +   0    0    1    0    N
67753 +   0    0    1    1    N
67754 +   0    1    0    0    Y
67755 +   0    1    0    1    Y
67756 +   0    1    1    0    N
67757 +   0    1    1    1    N
67758 +   1    0    0    0    Y
67759 +   1    0    0    1    Y
67760 +   1    0    1    0    N
67761 +   1    1    0    0    N
67762 +   1    1    0    1    Y
67763 +   1    1    0    0    N
67764 +   1    1    1    0    N
67765 +   1    1    1    1    Y
67766 +
67767 +Reset Value
67768 +    No pstream is present after reset; each of the BE, BK, VI,VO pstreams must be created
67769 +    (either implicitly by data flow or explicitly by user)
67770 +
67771 +Restrictions
67772 +    This command can only be issued when the device is in the CONNECTED state. If
67773 +    the device receives the command while in DISCONNECTED state, it replies with a
67774 +    failure indication. At most four prioritized data endpoints can be created, one for
67775 +    each AC.
67776 +
67777 +See Also
67778 +    \93DELETE_PSTREAM\94
67779 +=====================================================================
67780 +
67781 +Name
67782 +    DELETE_BAD_AP
67783 +
67784 +Synopsis
67785 +    The host uses this command to clear a particular entry in the bad AP table
67786 +
67787 +Command
67788 +    wmiconfig eth1 --rmAP [--num=<index>] // used to clear a badAP
67789 +    entry. num is index from 0-3
67790 +
67791 +Command Parameters
67792 +    UINT8  badApIndex   Index [0...n] that identifies the entry in the bad
67793 +                        AP table to delete
67794 +
67795 +Command Values
67796 +    badApIndex   = 0, 1, 2, 3
67797 +            Entry in the bad AP table
67798 +
67799 +Reset Value
67800 +    None defined
67801 +
67802 +Restrictions
67803 +    None
67804 +
67805 +See Also
67806 +    \93ADD_BAD_AP\94
67807 +
67808 +=====================================================================
67809 +
67810 +
67811 +Name
67812 +    DELETE_CIPHER_KEY
67813 +
67814 +Synopsis
67815 +    The host uses this command to delete a key that was previously added with the
67816 +    \93ADD_CIPHER_KEY\94 command.
67817 +
67818 +Command
67819 +    TBD
67820 +
67821 +Command Parameters
67822 +    UINT8   keyIndex    Index (0...3) of the key to be deleted
67823 +
67824 +Command Values
67825 +    keyIndex    = 0, 1,2, 3    Key to delete
67826 +
67827 +Reset Value
67828 +    None
67829 +
67830 +Restrictions
67831 +    The host should not delete a key that is currently in use by the AR6000.
67832 +
67833 +See Also
67834 +    \93ADD_CIPHER_KEY\94
67835 +
67836 +=====================================================================
67837 +
67838 +Name
67839 +    DELETE_PSTREAM
67840 +
67841 +Synopsis
67842 +    The host uses this command to delete a prioritized data endpoint created by a
67843 +    previous \93CREATE_PSTREAM\94 command
67844 +
67845 +Command
67846 +    --deleteqos <trafficClass> <tsid>, where:
67847 +
67848 +    <traffic class>
67849 +        = 0    BE
67850 +        = 1    BK
67851 +        = 2    VI
67852 +        = 3    VO
67853 +    <tsid>
67854 +        The TSpec ID; use the -qosqueue option
67855 +        to get the active TSpec IDs for each traffic class
67856 +
67857 +Command Parameters
67858 +    A_UINT8    trafficClass    Indicate the traffic class of the stream
67859 +                            being deleted
67860 +
67861 +Command Values
67862 +    {
67863 +        WMM_AC_BE = 0    Best effort
67864 +        WMM_AC_BK = 1    Background
67865 +        WMM_AC_VI = 2    Video
67866 +        WMM_AC_VO = 3    Voice
67867 +    } TRAFFIC CLASS
67868 +
67869 +    0-15 for TSID
67870 +
67871 +Reply Values
67872 +    N/A
67873 +
67874 +Restrictions
67875 +    This command should only be issued after a \93CREATE_PSTREAM\94 command has
67876 +    successfully created a prioritized stream
67877 +
67878 +See Also
67879 +    \93CREATE_PSTREAM\94
67880 +
67881 +=====================================================================
67882 +
67883 +
67884 +Name
67885 +    DELETE_WOW_PATTERN
67886 +
67887 +Synopsis
67888 +    The host uses this command to remove a pre-specified pattern from the
67889 +    WoW pattern list.
67890 +
67891 +Command
67892 +    wmiconfig \96delwowpattern <list-id> <pattern-id>
67893 +
67894 +Command Parameters
67895 +    A_UINT8    filter_list_id    ID of the list that contains the WoW filter
67896 +                                 pattern to delete
67897 +    A_UINT8    filter_id    ID of the WoW filter pattern to delete
67898 +
67899 +Reply Parameters
67900 +    None
67901 +
67902 +
67903 +
67904 +Reset Value
67905 +    None defined
67906 +
67907 +Restrictions
67908 +    None
67909 +
67910 +See Also
67911 +    \93ADD_WOW_PATTERN\94
67912 +
67913 +=====================================================================
67914 +
67915 +
67916 +Name
67917 +    EXTENSION
67918 +
67919 +Synopsis
67920 +    The WMI message interface is used mostly for wireless control messages to a wireless
67921 +    module applicable to wireless module management regardless of the target platform
67922 +    implementation. However, some commands only peripherally related to wireless
67923 +    management are desired during operation. These wireless extension commands may
67924 +    be platform-specific or implementation-dependent.
67925 +
67926 +Command
67927 +    N/A
67928 +
67929 +Command Parameters
67930 +    Command-specific
67931 +
67932 +Command Values
67933 +    Command-specific
67934 +
67935 +Reply Parameters
67936 +    Command-specific
67937 +
67938 +Reset Values
67939 +    None defined
67940 +
67941 +Restrictions
67942 +    None defined
67943 +
67944 +=====================================================================
67945 +
67946 +
67947 +Name
67948 +    GET_BIT_RATE
67949 +
67950 +Synopsis
67951 +    Used by the host to obtain the rate most recently used by the AR6000 device
67952 +
67953 +Command
67954 +    wmiconfig eth1 --getfixrates
67955 +
67956 +Command Parameters
67957 +    None
67958 +
67959 +
67960 +
67961 +Reply Parameters
67962 +    INT8
67963 +    rateIndex
67964 +    See the \93SET_BIT_RATE\94 command
67965 +
67966 +Reset Values
67967 +    None
67968 +
67969 +Restrictions
67970 +    This command should only be used during development/debug; it is not intended
67971 +for use in production. It is only valid when the device is in the CONNECTED state
67972 +
67973 +See Also
67974 +    \93SET_BIT_RATE\94
67975 +
67976 +=====================================================================
67977 +
67978 +
67979 +Name
67980 +    GET_CHANNEL_LIST
67981 +
67982 +Synopsis
67983 +    Used by the host uses to retrieve the list of channels that can be used by the device
67984 +    while in the current wireless mode and in the current regulatory domain.
67985 +
67986 +Command
67987 +    TBD
67988 +
67989 +Command Parameters
67990 +    None
67991 +
67992 +Reply Parameters
67993 +    UINT8    reserved    Reserved
67994 +    UINT8    numberOfChannels    Number of channels the reply contains
67995 +    UINT16    channelList[numberOfChannels]  Array of channel frequencies (in MHz)
67996 +
67997 +Reset Values
67998 +    None defined
67999 +
68000 +Restrictions
68001 +    The maximum number of channels that can be reported are 32
68002 +
68003 +=====================================================================
68004 +
68005 +
68006 +Name
68007 +    GET_FIXRATES
68008 +
68009 +Synopsis
68010 +    Clears the current calculated RSSI and SNR value. RSSI and SNR are reported by
68011 +    running-average value. This command will clear the history and have a fresh start for
68012 +    the running-average mechanism.
68013 +
68014 +Synopsis
68015 +    This returns rate-mask set via WMI_SET_FIXRATES to retrieve the current fixed rate
68016 +    that the AR6001 or AR6001 is using. See \93SET_FIXRATES\94.
68017 +
68018 +Command
68019 +    wmiconfig eth1 --getfixrates
68020 +
68021 +Command Parameters
68022 +    A_UINT16    fixRateMask;    Note: if this command is used prior to
68023 +                using WMI_SET_FIXRATES, AR6000
68024 +                returns 0xffff as fixRateMask, indicating
68025 +                all the rates are enabled
68026 +
68027 +Reply Parameters
68028 +    None
68029 +
68030 +Reset Value
68031 +    None defined
68032 +
68033 +Restrictions
68034 +    None
68035 +
68036 +See Also
68037 +    \93SET_FIXRATES\94
68038 +
68039 +=====================================================================
68040 +
68041 +
68042 +
68043 +Name
68044 +    GET_PMKID_LIST_CMD
68045 +
68046 +Synopsis
68047 +    Retrieves the list of PMKIDs on the firmware. The
68048 +    WMI_GET_PMKID_LIST_EVENT is generated by the firmware.
68049 +
68050 +Command
68051 +    TBD
68052 +
68053 +Command Parameters
68054 +
68055 +Reset Values
68056 +    None
68057 +
68058 +Restrictions
68059 +    None
68060 +
68061 +See Also
68062 +    SET_PMKID_LIST_CMD GET_PMKID_LIST_EVENT
68063 +
68064 +=====================================================================
68065 +
68066 +
68067 +Name
68068 +    GET_ROAM_TBL
68069 +
68070 +Synopsis
68071 +    Retrieve the roaming table maintained on the target. The response is reported
68072 +    asynchronously through the ROAM_TBL_EVENT.
68073 +
68074 +Command
68075 +    wmiconfig --getroamtable <roamctrl> <info>
68076 +
68077 +Command Parameters
68078 +    A_UINT8    roamCtrlType;
68079 +    A_UINT16   roamMode
68080 +    A_UINT16   numEntries
68081 +    WMI_BSS_ROAM_INFO bssRoamInfo[1]
68082 +
68083 +Reply Value
68084 +    Reported asynchronously through the ROAM_TBL_EVENT
68085 +
68086 +Reset Value
68087 +    None defined
68088 +
68089 +Restrictions
68090 +    None
68091 +
68092 +See Also
68093 +    SET_KEEPALIVE
68094 +
68095 +=====================================================================
68096 +
68097 +
68098 +Name
68099 +    GET_TARGET_STATS
68100 +
68101 +Synopsis
68102 +    The host uses this command to request that the target send the statistics that it
68103 +    maintains. The statistics obtained from the target are accrued in the host every time
68104 +    the GET_TARGET_STATS command is issued. The --clearStats option is added to
68105 +    clear the target statistics maintained in the host.
68106 +
68107 +Command
68108 +    wmiconfig --getTargetStats --clearStats
68109 +
68110 +Command Parameters
68111 +    TARGET_STATS    targetStats
68112 +    WMI_TARGET_STATS
68113 +    UINT8   clearStats
68114 +
68115 +
68116 +Reply Value
68117 +    RSSI return value (0\96100)
68118 +
68119 +Reset Values
68120 +    All statistics are cleared (zeroed)
68121 +
68122 +Restrictions
68123 +    The --getTargetStats option must be used; the --clearStats option is also available also
68124 +
68125 +
68126 +=====================================================================
68127 +
68128 +Name
68129 +    GET_TX_PWR
68130 +
68131 +Synopsis
68132 +    The host uses this command to retrieve the current Tx power level
68133 +
68134 +Command
68135 +    wmiconfig -i eth1 --getpower
68136 +
68137 +Command Parameters
68138 +    None
68139 +
68140 +Reply Parameters
68141 +    UINT16 dbM    The current Tx power level specified in dbM
68142 +
68143 +Reset Values
68144 +    The maximum permitted by the regulatory domain
68145 +
68146 +Restrictions
68147 +    None
68148 +
68149 +See Also
68150 +    \93SET_TX_PWR\94
68151 +
68152 +=====================================================================
68153 +
68154 +
68155 +Name
68156 +    GET_WOW_LIST
68157 +
68158 +Synopsis
68159 +    The host uses this command to retrieve the current list of WoW patterns.
68160 +
68161 +Command
68162 +    wmiconfig \96getwowlist <list-id>
68163 +
68164 +Command Parameters
68165 +    A_UINT8 filter_list_id    ID of the list of WoW patterns to retrieve
68166 +
68167 +Reply Value(s)
68168 +    A_UINT16  num_filters    Number of WoW patterns contained in the list
68169 +    A_UINT8   wow_mode    Current mode of WoW (enabled or disabled)
68170 +    A_UINT8    host_mode    Current host mode (asleep or awake)
68171 +    WOW_FILTER    wow_filters[1]
68172 +        Contents of the WoW filter pattern list
68173 +        (contains mask, pattern, offset and size
68174 +    information for each of the patterns)
68175 +
68176 +Reset Value
68177 +    None defined
68178 +
68179 +Restrictions
68180 +    None
68181 +
68182 +See Also
68183 +    \93SET_WSC_STATUS\94
68184 +
68185 +=====================================================================
68186 +
68187 +
68188 +Name
68189 +    LQ_THRESHOLD_PARAMS
68190 +
68191 +Synopsis
68192 +    Sets Link Quality thresholds, the sampling will happen at every unicast data frame
68193 +    Tx if a certain threshold is met, and the corresponding event will be sent to the host.
68194 +
68195 +Command
68196 +    --lqThreshold <enable> <upper_threshold_1> ...
68197 +    <upper_threshold_4> <lower_threshold_1> ... <lower_threshold_4>
68198 +
68199 +Command Parameters
68200 +    <enable>    = 0    Disable link quality sampling
68201 +                = 1    Enable link quality sampling
68202 +    <upper_threshold_x>  Above thresholds (value in [0,100]), in
68203 +                    ascending order
68204 +    <lower_threshold_x> Below thresholds (value in [0,100]), in
68205 +                    ascending order
68206 +
68207 +Command Values
68208 +    See command parameters
68209 +
68210 +Reset Value
68211 +    None defined
68212 +
68213 +Restrictions
68214 +    None
68215 +
68216 +=====================================================================
68217 +
68218 +
68219 +Name
68220 +    OPT_TX_FRAME
68221 +
68222 +Synopsis
68223 +    Special feature, sends a special frame.
68224 +
68225 +Command
68226 +    wmiconfig --sendframe <frmType> <dstaddr> <bssid> <optIEDatalen>
68227 +    <optIEData>
68228 +
68229 +Command Parameters
68230 +    {
68231 +        A_UINT16    optIEDataLen;
68232 +        A_UINT8    frmType;
68233 +        A_UINT8    dstAddr[ATH_MAC_LEN];
68234 +        A_UINT8    bssid[ATH_MAC_LEN];
68235 +        A_UINT8    optIEData[1];
68236 +    } WMI_OPT_TX_FRAME_CMD;
68237 +
68238 +Command Values
68239 +    <frmtype>   = 1    Probe request frame
68240 +                = 2    Probe response frame
68241 +                = 3    CPPP start
68242 +                = 4    CPPP stop
68243 +
68244 +Reset Value
68245 +    None defined
68246 +
68247 +Restrictions
68248 +    Send a special frame only when special mode is on.
68249 +
68250 +=====================================================================
68251 +
68252 +
68253 +Name
68254 +    RECONNECT
68255 +
68256 +Synopsis
68257 +    This command requests a reconnection to a BSS to which the AR6000 device was
68258 +    formerly connected
68259 +
68260 +Command
68261 +    TBD
68262 +
68263 +Command Parameters
68264 +    UINT16    channel    Provides a hint as to which channel was
68265 +                        used for a previous connection
68266 +    UINT8    bssid[6]    If set, indicates which BSSID to connect to
68267 +
68268 +Command Values
68269 +    None
68270 +
68271 +Reset Values
68272 +    None
68273 +
68274 +Restrictions
68275 +    None
68276 +
68277 +See Also
68278 +    \93CONNECT_CMD\94
68279 +
68280 +=====================================================================
68281 +
68282 +
68283 +Name
68284 +    RSSI_THRESHOLD_PARAMS
68285 +
68286 +Synopsis
68287 +    Configures how the AR6000 device monitors and reports signal strength (RSSI) of the
68288 +    connected BSS, which is used as a link quality metric. The four RSSI threshold sets (in
68289 +    dbM) of the host specification divide the signal strength range into six segments.
68290 +    When signal strength increases or decreases across one of the boundaries, an
68291 +    RSSI_THRESHOLD event is signaled to the host. The host may then choose to take
68292 +    action (such as influencing roaming).
68293 +
68294 +Command
68295 +    wmiconfig eth1 --rssiThreshold <weight> <pollTime>
68296 +        <above_threshold_val_1> ... <above_threshold_tag_6>
68297 +        <above_threshold_val_6>
68298 +        <below_threshold_tag_1> <below_threshold_val_1> ...
68299 +        <below_threshold_tag_6> <below_threshold_val_6>
68300 +
68301 +Command Parameters
68302 +    UINT8    weight    Range in [1, 16] used to calculate average RSSI
68303 +    UINT32   pollTime   RSSI (signal strength) sampling frequency in
68304 +                seconds (if pollTime = 0, single strength
68305 +        sampling is disabled)
68306 +    USER_RSS__THOLD tholds[12]  Thresholds (6 x 2)
68307 +
68308 +Command Values
68309 +    None defined
68310 +
68311 +Reset Values
68312 +    pollTime is 0, and sampling is disabled
68313 +
68314 +Restrictions
68315 +    Can only be issued if the AR6000 device is connected
68316 +
68317 +
68318 +=====================================================================
68319 +
68320 +Name
68321 +    SCAN_PARAMS
68322 +
68323 +Synopsis
68324 +    The minact parameter determines the minimum active channel dwell time, within
68325 +    which if the STA receives any beacon, it remains on that channel until the maxact
68326 +    channel dwell time. If the STA does not receive a beacon within the minact dwell
68327 +    time, it switches to scan the next channel.
68328 +
68329 +Command
68330 +    wmiconfig -scan -minact=<ms> --maxact=<ms>
68331 +
68332 +Command Parameters
68333 +    UINT16    maxact    Channel dwell time (in ms), default = 0
68334 +    UINT16    minact    Channel dwell time (in ms), default = 105
68335 +
68336 +Command Values
68337 +    See channel parameters
68338 +
68339 +Reset Values
68340 +    None defined
68341 +
68342 +Restrictions
68343 +    The minact value should be greater than 0; maxact should be between 5\9665535 ms
68344 +    and greater than minact
68345 +
68346 +=====================================================================
68347 +
68348 +
68349 +Name
68350 +    SET_ACCESS_PARAMS
68351 +
68352 +Synopsis
68353 +    Allows the host to set access parameters for the wireless network. A thorough
68354 +    understanding of IEEE 802.11 is required to properly manipulate these parameters.
68355 +
68356 +Command
68357 +    wmiconfig eth1 --acparams --txop <limit> --cwmin <0-15>
68358 +    --cwmax <0-15> --aifsn<0-15>
68359 +
68360 +Command Parameters
68361 +    UINT16    txop    The maximum time (expressed in units of
68362 +                        32 ms) the device can spend transmitting
68363 +                        after acquiring the right to transmit
68364 +    UINT8    eCWmin    Minimum contention window
68365 +    UINT8    eCWmax    Maximum contention window
68366 +    UINT8    aifsn    The arbitration inter-frame space number
68367 +
68368 +Command Values
68369 +    None
68370 +
68371 +Reset Values
68372 +    Reasonable defaults that vary, between endpoints (prioritized streams)
68373 +
68374 +Restrictions
68375 +    None
68376 +
68377 +=====================================================================
68378 +
68379 +
68380 +Name
68381 +    SET_ADHOC_BSSID
68382 +
68383 +Synopsis
68384 +    Allows the host to set the BSSID for an ad hoc network. If a network with this BSSID
68385 +    is not found, the target creates an ad hoc network with this BSSID after the connect
68386 +    WMI command is triggered (e.g., by the SIOCSIWESSID IOCTL).
68387 +
68388 +Command
68389 +    wmiconfig eth1 --adhocbssid <bssid>
68390 +
68391 +Command Parameters
68392 +    A_UINT8     bssid[ATH_MAC_LEN]    BSSID is specified in xx:xx:xx:xx:xx:xx format
68393 +
68394 +Command Values
68395 +    None
68396 +
68397 +Reset Values
68398 +    None
68399 +
68400 +Restrictions
68401 +    None
68402 +
68403 +=====================================================================
68404 +
68405 +
68406 +Name
68407 +    SET_AKMP_PARAMS
68408 +
68409 +Synopsis
68410 +    Enables or disables multi PMKID mode.
68411 +
68412 +Command
68413 +    wmiconfig eth1 --setakmp --multipmkid=<on/off>
68414 +
68415 +Command Parameters
68416 +    typedef struct {
68417 +      A_UINT32    akmpInfo;
68418 +    } WMI_SET_AKMP_PARAMS_CMD;
68419 +
68420 +Command Values
68421 +    akmpInfo;
68422 +    bit[0] = 0
68423 +        MultiPMKID mode is disabled and PMKIDs that
68424 +        were set using the WMI_SET_PMKID_CMD are
68425 +        used in the [Re]AssocRequest frame.
68426 +     bit[0] = 1
68427 +        MultiPMKID mode is enabled and PMKIDs issued
68428 +        by the WMI_SET_PMKID_LIST_CMD are used in
68429 +        the next [Re]AssocRequest sent to the AP.
68430 +
68431 +Reset Values
68432 +    MultiPMKID mode is disabled
68433 +
68434 +Restrictions
68435 +    None
68436 +
68437 +=====================================================================
68438 +
68439 +
68440 +Name
68441 +    SET_APPIE
68442 +
68443 +Synopsis
68444 +    Add an application-specified IE to a management frame. The maximum length is
68445 +    76 bytes. Including the length and the element ID, this translates to 78 bytes.
68446 +
68447 +Command
68448 +    wmiconfig --setappie <frame> <IE>, where:
68449 +
68450 +    frame
68451 +        One of beacon, probe, respon, assoc
68452 +
68453 +    IE
68454 +        A hex string beginning with DD (if = 0, no
68455 +        IE is sent in the management frame)
68456 +
68457 +Command Parameters
68458 +    mgmtFrmType;
68459 +        A WMI_MGMT_FRAME_TYPE
68460 +
68461 +    ieLen;
68462 +        Length of the IE to add to the GMT frame
68463 +
68464 +Command Values
68465 +    None
68466 +
68467 +Reset Value
68468 +    None defined
68469 +
68470 +Restrictions
68471 +    Supported only for the probe request and association request management frame
68472 +types. Also, only one IE can be added per management frame type.
68473 +
68474 +=====================================================================
68475 +
68476 +
68477 +Name
68478 +    SET_ASSOC_INFO
68479 +
68480 +Synopsis
68481 +    The host uses this command to specify any information elements (IEs) it wishes the
68482 +    AR6000 device to add to all future association and reassociation requests. IEs must be
68483 +    correct and are used as is by the device. IEs specified through this command are
68484 +    cleared with a DISCONNECT.
68485 +
68486 +Command
68487 +    wmiconfig eth1 --setAssocIe <IE>
68488 +
68489 +Command Parameters
68490 +    UINT8    ieType    Used directly in 802.11 frames
68491 +    UINT8    bufferSize    Size of assocInfo (in bytes) ranging from
68492 +                        0\96240. If = 0, previously set IEs are cleared.
68493 +    UINT8    assocInfo[bufferSize]    Used directly in 802.11 frames
68494 +
68495 +Command Values
68496 +    None
68497 +
68498 +Reset Values
68499 +    IEs are cleared
68500 +
68501 +Restrictions
68502 +    This command can only be issued in the DISCONNECTED state
68503 +
68504 +=====================================================================
68505 +
68506 +
68507 +Name
68508 +    SET_AUTHMODE
68509 +
68510 +Synopsis
68511 +    Sets the 802.11 authentication mode of reconnection
68512 +
68513 +Command
68514 +    wmiconfig eth1 --setauthmode <mode>
68515 +
68516 +Command Parameters
68517 +    UINT8    mode
68518 +
68519 +Command Values
68520 +    mode    = 0x00    Proceed with authentication during reconnect
68521 +            = 0x01    Do not proceed with authentication during reconnect
68522 +
68523 +Reset Values
68524 +    Authentication
68525 +
68526 +Restrictions
68527 +    None
68528 +
68529 +=====================================================================
68530 +
68531 +
68532 +Name
68533 +    SET_BEACON_INT
68534 +
68535 +Synopsis
68536 +    Sets the beacon interval for an ad hoc network. Beacon interval selection may have an
68537 +    impact on power savings. To some degree, a longer interval reduces power
68538 +    consumption but also decreases throughput. A thorough understanding of IEEE
68539 +    802.11 ad hoc networks is required to use this command effectively.
68540 +
68541 +Command
68542 +    wmiconfig eth1 --ibssconintv
68543 +
68544 +Command Parameters
68545 +    UINT16    beaconInterval    Specifies the beacon interval in TU units (1024 ms)
68546 +
68547 +Command Values
68548 +    None
68549 +
68550 +Reset Values
68551 +    The default beacon interval is 100 TUs (102.4 ms)
68552 +
68553 +Restrictions
68554 +    This command can only be issued before the AR6000 device starts an ad hoc network
68555 +
68556 +See Also
68557 +    \93SET_IBSS_PM_CAPS\94
68558 +
68559 +=====================================================================
68560 +
68561 +
68562 +Name
68563 +    SET_BIT_RATE
68564 +
68565 +Synopsis
68566 +    The host uses this command to set the AR6000 device to a specific fixed rate.
68567 +
68568 +Command
68569 +    wmiconfig eth1 --setfixrates <rate_0> ... <rate_n>
68570 +
68571 +Command Parameters
68572 +    INT8    rateIndex
68573 +    A WMI_BIT_RATE value
68574 +    {
68575 +        RATE_AUTO    = -1
68576 +        RATE_1Mb     = 0
68577 +        RATE_2Mb     = 1
68578 +        RATE_5_5M    = 2
68579 +        RATE_11Mb    = 3
68580 +        RATE_6Mb     = 4
68581 +        RATE_9Mb     = 5
68582 +        RATE_12Mb    = 6
68583 +        RATE_18Mb    = 7
68584 +        RATE_24Mb    = 8
68585 +        RATE_36Mb    = 9
68586 +        RATE_48Mb    = 10
68587 +        RATE_54Mb    = 11
68588 +      } WMI_BIT_RATE
68589 +
68590 +
68591 +Command Values
68592 +    See command parameters
68593 +
68594 +Reset Values
68595 +    The dynamic rate is determined by the AR6000 device
68596 +
68597 +Restrictions
68598 +    This command is intended for use only during development/debug; it is not
68599 +intended for use in production
68600 +
68601 +See Also
68602 +    \93GET_BIT_RATE\94
68603 +
68604 +=====================================================================
68605 +
68606 +
68607 +Name
68608 +    SET_BMISS_TIME
68609 +
68610 +Synopsis
68611 +    This command sets the beacon miss (BMISS) time, which the AR6000 hardware use
68612 +    to recognize missed beacons. When an excessive number (15) of consecutive beacons
68613 +    are missed, the AR6000 consider switching to a different BSS. The time can be
68614 +    specified in number of beacons or in TUs.
68615 +
68616 +Command(s)
68617 +    wmiconfig eth1 --setbmissbeacons=<val>
68618 +    wmiconfig eth1 --setbmisstime=<val>
68619 +
68620 +Command Parameters
68621 +    UINT16    bmissTime    Specifies the beacon miss time
68622 +                            [1000...5000] in TUs (1024 ms)
68623 +    UINT16    bmissbeacons  Specifies the number of beacons [5...50]
68624 +
68625 +Command Values
68626 +    None
68627 +
68628 +Reset Values
68629 +    bmissTime is 1500 TUs (1536 ms)
68630 +
68631 +Restrictions
68632 +    None
68633 +
68634 +=====================================================================
68635 +
68636 +
68637 +Name
68638 +    SET_BSS_FILTER
68639 +
68640 +Synopsis
68641 +    The host uses this to inform the AR6000 device of the types of networks about which
68642 +    it wants to receive information from the \93BSSINFO\94 event. As the device performs
68643 +    either foreground or background scans, it applies the filter and sends \93BSSINFO\94
68644 +    events only for the networks that pass the filter. If any of the  bssFilter or the ieMask
68645 +    filter matches, a BSS Info is sent to the host. The ieMask currently is used as a match
68646 +    for the IEs in the beacons, probe reponses and channel switch action management
68647 +    frame. See also \93Scan and Roam\94 on page C-1.
68648 +
68649 +    The BSS filter command has been enhanced to support IE based filtering. The IEs can
68650 +    be specified as a bitmask through this command using this enum.
68651 +
68652 +Command
68653 +    wmiconfig eth1 \96filter = <filter> --ieMask 0x<mask>
68654 +
68655 +Command Parameters
68656 +    UINT8    BssFilter
68657 +
68658 + Command Values
68659 +    typedef struct {
68660 +        A_UINT8    bssFilter;    See WMI_BSS_FILTER
68661 +        A_UINT32    ieMask;
68662 +    } __ATTRIB_PACK WMI_BSS_FILTER_CMD;
68663 +
68664 +    The ieMask can take this combination of values:
68665 +
68666 +    enum {
68667 +        BSS_ELEMID_CHANSWITCH   = 0x01
68668 +        BSS_ELEMID_ATHEROS      = 0x02,
68669 +    }
68670 +
68671 +Reply Value
68672 +    None
68673 +
68674 +Reset Value
68675 +    BssFilter = NONE_BSS_FILTER (0)
68676 +
68677 +Restrictions
68678 +    None
68679 +
68680 +See Also
68681 +    \93CONNECT_CMD\94
68682 +
68683 +=====================================================================
68684 +
68685 +
68686 +Name
68687 +    SET_BT_PARAMS
68688 +
68689 +Synopsis
68690 +    This command is used to set the status of a Bluetooth stream or set Bluetooth
68691 +    coexistence register parameters. The stream may be an SCO or an A2DP stream and
68692 +    its status can be started/stopped/suspended/resumed.
68693 +
68694 +Command
68695 +    wmiconfig \96setBTparams <paramType> <params>
68696 +
68697 +Command Parameters
68698 +    struct {
68699 +       union {
68700 +            BT_PARAMS_SCO    scoParams;
68701 +            BT_PARAMS_A2DP   a2dpParams;
68702 +            BT_PARAMS_MISC   miscParams;
68703 +            BT_COEX_REGS     regs;
68704 +        } info;
68705 +         A_UINT8 paramType;
68706 +        struct {
68707 +            A_UINT8 noSCOPkts;    Number of SCO packets between consecutive PS-POLLs
68708 +            A_UINT8 pspollTimeout;
68709 +            A_UINT8 stompbt;
68710 +        } BT_PARAMS_SCO;
68711 +        struct {
68712 +            A2DP BT stream parameters
68713 +            A_UINT32   period;
68714 +            A_UINT32   dutycycle;
68715 +            A_UINT8    stompbt;
68716 +        } BT_PARAMS_A2DP;
68717 +        struct {
68718 +            union {
68719 +               WLAN_PROTECT_POLICY_TYPE   protectParams;
68720 +               A_UINT16    wlanCtrlFlags;
68721 +            }info;
68722 +        A_UINT8 paramType;
68723 +        } BT_PARAMS_MISC;
68724 +        struct {
68725 +            BT coexistence registers values
68726 +            A_UINT32    mode;     Coexistence mode
68727 +            A_UINT32    scoWghts; WLAN and BT weights
68728 +            A_UINT32    a2dpWghts;
68729 +            A_UINT32    genWghts;
68730 +            A_UINT32    mode2;    Coexistence mode2
68731 +            A_UINT8    setVal;
68732 +        } BT_COEX_REGS;
68733 +
68734 +Command Values
68735 +    None defined
68736 +
68737 +Reset Value
68738 +    None
68739 +
68740 +Restrictions
68741 +    None
68742 +
68743 +=====================================================================
68744 +
68745 +
68746 +Name
68747 +    SET_BT_STATUS
68748 +
68749 +Synopsis
68750 +    Sets the status of a Bluetooth stream. The stream may be a SCO or an A2DP stream
68751 +    and its status can be started/stopped/suspended/resumed.
68752 +
68753 +Command
68754 +    wmiconfig \96setBTstatus <streamType> <status>
68755 +
68756 +Command Parameters
68757 +    {
68758 +        A_UINT8        streamType;    Stream type
68759 +        A_UINT8        status;    Stream status
68760 +    }WMI_SET_BT_STATUS_CMD;
68761 +
68762 +Command Values
68763 +    {
68764 +        BT_STREAM_UNDEF    = 0
68765 +        BT_STREAM_SCO
68766 +        SCO stream
68767 +        BT_STREAM_A2DP
68768 +        A2DP stream
68769 +        BT_STREAM_MAX
68770 +    } BT_STREAM_TYPE;
68771 +
68772 +    {
68773 +        BT_STATUS_UNDEF    = 0
68774 +        BT_STATUS_START
68775 +        BT_STATUS_STOP
68776 +        BT_STATUS_RESUME
68777 +        BT_STATUS_SUSPEND
68778 +        BT_STATUS_MAX
68779 +    } BT_STREAM_STATUS;
68780 +
68781 +Reset Value
68782 +    None defined
68783 +
68784 +Restrictions
68785 +    None
68786 +
68787 +=====================================================================
68788 +
68789 +
68790 +Name
68791 +    SET_CHANNEL_PARAMETERS
68792 +
68793 +Synopsis
68794 +    Configures various WLAN parameters related to channels, sets the wireless mode,
68795 +    and can restrict the AR6000 device to a subset of available channels. The list of
68796 +    available channels varies depending on the wireless mode and the regulatory
68797 +    domain. The device never operates on a channel outside of its regulatory domain. The
68798 +    device starts to scan the list of channels right after this command.
68799 +
68800 +Command
68801 +    wmiconfig eth1 --wmode <mode> <list>
68802 +
68803 +Command Parameters
68804 +    UINT8    phyMode    See Values below.
68805 +    UINT8    numberOfChannels
68806 +        Number of channels in the channel array that
68807 +        follows. If = 0, then the device uses all of the
68808 +        channels permitted by the regulatory domain
68809 +        and by the specified phyMode.
68810 +    UINT16    channel[numberOfChannels]
68811 +        Array listing the subset of channels (expressed
68812 +        as frequencies in MHz) the host wants the
68813 +        device to use. Any channel not permitted by
68814 +        the specified phyMode or by the specified
68815 +        regulatory domain is ignored by the device.
68816 +
68817 +Command Values
68818 +    phyMode = {
68819 +        Wireless mode
68820 +        11a    = 0x01
68821 +        11g    = 0x02
68822 +        11ag   = 0x03
68823 +        11b    = 0x04
68824 +        11g only    = 0x05
68825 +        }
68826 +
68827 +Reset Values
68828 +    phyMode
68829 +    11ag
68830 +    802.11a/g modules
68831 +        11g
68832 +    802.11g module
68833 +    channels
68834 +        Defaults to all channels permitted by the
68835 +        current regulatory domain.
68836 +
68837 +Restrictions
68838 +    This command, if issued, should be issued soon after reset and prior to the first
68839 +    connection. This command should only be issued in the DISCONNECTED state.
68840 +
68841 +=====================================================================
68842 +
68843 +
68844 +Name
68845 +    SET_DISC_TIMEOUT
68846 +
68847 +Synopsis
68848 +    The host uses this command to configure the amount of time that the AR6000 should
68849 +    spend when it attempts to reestablish a connection after losing link with its current
68850 +    BSS. If this time limit is exceeded, the AR6000 send a \93DISCONNECT\94 event. After
68851 +    sending the \93DISCONNECT\94 event the AR6000 continues to attempt to reestablish a
68852 +    connection, but they do so at the interval corresponding to a foreground scan as
68853 +    established by the \93SET_SCAN_PARAMS\94 command.
68854 +
68855 +    A timeout value of 0 indicates that the AR6000 will disable all autonomous roaming,
68856 +    so that the AR6000 will not perform any scans after sending a \93DISCONNECT\94
68857 +    event to the host. The state is maintained until a shutdown or host sets different
68858 +    timeout value from 0.
68859 +
68860 +Command
68861 +    wmiconfig eth1 --disc=<timeout in seconds>
68862 +
68863 +Command Parameters
68864 +    UINT8    disconnectTimeout
68865 +        Specifies the time limit (in seconds) after
68866 +        which a failure to reestablish a connection
68867 +        results in a \93DISCONNECT\94 event
68868 +
68869 +Command Values
68870 +    None
68871 +
68872 +Reset Values
68873 +    disconnectTimeout is 10 seconds
68874 +
68875 +Restrictions
68876 +    This command can only be issued while in a DISCONNECTED state
68877 +
68878 +=====================================================================
68879 +
68880 +
68881 +Name
68882 +    SET_FIXRATES
68883 +
68884 +Synopsis
68885 +    By default, the AR6000 device uses all PHY rates based on mode of operation. If the
68886 +    host application requires the device to use subset of supported rates, it can set those
68887 +    rates with this command. In 802.11g mode, the AR6000 device takes the entire
68888 +    802.11g basic rate set and the rates specified with this command and uses it as the
68889 +    supported rate set.
68890 +
68891 +    This rate set is advertised in the probe request and the assoc/re-assoc request as
68892 +    supported rates. Upon successful association, the device modifies the rate set pool
68893 +    using the: intersection of AP-supported rates with the union of the 802.11g basic rate
68894 +    set and rates set using this command. The device picks transmission rates from this
68895 +    pool based on a rate control algorithm.
68896 +
68897 +Command
68898 +    TBD
68899 +
68900 +Command Parameters
68901 +    A_UINT16    fixRateMask;
68902 +        The individual bit is an index for rate table,
68903 +        and setting the that index to 1 would set that
68904 +        corresponding rate. E.g., fixRateMask = 9
68905 +        (1001) sets 1 Mbps and 11 Mbps.
68906 +
68907 +Command Values
68908 +    None
68909 +
68910 +Reset Value
68911 +    None defined
68912 +
68913 +Restrictions
68914 +    None
68915 +
68916 +See Also
68917 +    \93GET_FIXRATES\94
68918 +
68919 +=====================================================================
68920 +
68921 +
68922 +Name
68923 +    SET_WHAL_PARAM
68924 +
68925 +Synopsis
68926 +    An internal AR6000 command that is used to set certain hardware parameters. The
68927 +    description of this command is in $WORKAREA/include/halapi.h.
68928 +
68929 +Command
68930 +    TBD
68931 +
68932 +Command Parameters
68933 +    ATH_HAL_SETCABTO_CMDID
68934 +        Sets the timeout waiting for the multicast
68935 +        traffic after a DTIM beacon (in TUs).
68936 +
68937 +Command Values
68938 +    None
68939 +
68940 +Reset Value
68941 +    Default = 10 TUs
68942 +
68943 +Restrictions
68944 +    This command should be executed before issuing a connect command.
68945 +
68946 +=====================================================================
68947 +
68948 +
68949 +Name
68950 +    SET_HOST_SLEEP_MODE
68951 +
68952 +Synopsis
68953 +    The host uses this command to set the host mode to asleep or awake. All packets are
68954 +    delivered to the host when the host mode is awake. When host mode is asleep, only if
68955 +    WoW is enabled and the incoming packet matches one of the specified WoW
68956 +    patterns, will the packet be delivered to the host. The host will also be woken up by
68957 +    the target for pattern-matching packets and important events.
68958 +
68959 +Command
68960 +    wmiconfig \96sethostmode=<asleep/awake>
68961 +
68962 +Command Parameters
68963 +    A_BOOL    awake    Set the host mode to awake
68964 +    A_BOOL    asleep   Set the host mode to asleep
68965 +
68966 +Command Values
68967 +    1 = awake, 0 = asleep
68968 +
68969 +Reset Value
68970 +    None defined (default host mode is awake)
68971 +
68972 +Restrictions
68973 +    None
68974 +
68975 +
68976 +=====================================================================
68977 +
68978 +Name
68979 +    SET_IBSS_PM_CAPS
68980 +
68981 +Synopsis
68982 +    Used to support a non-standard power management scheme for an ad hoc wireless
68983 +    network consisting of up to eight stations (STAs) that support this form of power
68984 +    saving (e.g., Atheros-based STAs). A thorough understanding of IEEE 802.11 ad hoc
68985 +    networks is required to use this command effectively.
68986 +
68987 +Command
68988 +    wmiconfig eth1 --ibsspmcaps --ps=<enable/disable>
68989 +        --aw=<ATIM Windows in ms>
68990 +        --ttl=<Time to live in number of beacon periods>
68991 +        --to=<timeout in ms>
68992 +
68993 +Command Parameters
68994 +    UINT8    power_saving
68995 +        = 0
68996 +        The non-standard power saving scheme is
68997 +        disabled and maximum throughput (with no
68998 +        power saving) is obtained.
68999 +
69000 +        = 1
69001 +        Ad hoc power saving scheme is enabled (but
69002 +        throughput may be decreased)
69003 +
69004 +    UINT16    atim_windows
69005 +        Specifies the length (in ms) of the ad hoc traffic
69006 +        indication message (ATIM) windows used in an ad
69007 +        hoc network. All Atheros-based STAs that join the
69008 +        network use this duration ATIM window.
69009 +
69010 +    The duration is communicated between wireless
69011 +    STAs through an IE in beacons and probe responses.
69012 +
69013 +    The host sets atim_windows to control trade-offs
69014 +    between power use and throughput. The value
69015 +    chosen should be based on the beacon interval (see
69016 +    the \93SET_BEACON_INT\94 command) on the
69017 +    expected number of STAs in the IBSS, and on the
69018 +    amount of traffic and traffic patterns between STAs.
69019 +
69020 +    UINT16    timeout_value
69021 +        Specifies the timeout (in ms). The value is the same
69022 +        for all ad hoc connections, but tracks separately for
69023 +        each.
69024 +
69025 +        Applicable only for a beacon period and used to
69026 +        derive actual timeout values on the Tx and Rx sides.
69027 +        On the Tx side, the value defines a window during
69028 +        which the STA accepts the frame(s) from the host for a
69029 +        particular connection. Until closed, the window
69030 +        restarts with every frame received from the host. On
69031 +        the Rx side, indicates the time until which the STA
69032 +        continues accepting frames from a particular
69033 +        connection. The value resets with every frame
69034 +        received. The value can be used to determine the
69035 +        trade off between throughput and power.
69036 +        Default = 10 ms
69037 +
69038 +    UINT8    ttl
69039 +        Specifies the value in number of beacon periods. The
69040 +        value is used to set a limit on the time until which a
69041 +        frame is kept alive in the AR6001 before being
69042 +        discarded. Default = 5
69043 +
69044 +Command Values
69045 +    None
69046 +
69047 +Reset Values
69048 +    By default, power_saving is enabled with atim_window = 20 ms
69049 +
69050 +Restrictions
69051 +    Can only be issued before the AR6000 starts an ad hoc network
69052 +
69053 +See Also
69054 +    \93SET_BEACON_INT\94
69055 +
69056 +=====================================================================
69057 +
69058 +
69059 +
69060 +Name
69061 +    SET_LISTEN_INT
69062 +
69063 +Synopsis
69064 +    The host uses this command to request a listen interval, which determines how often
69065 +    the AR6000 device should wake up and listen for traffic. The listen interval can be set
69066 +    by the TUs or by the number of beacons. The device may not be able to comply with
69067 +    the request (e.g., if the beacon interval is greater than the requested listen interval, the
69068 +    device sets the listen interval to the beacon interval). The actual listen interval used
69069 +    by the device is available in the \93CONNECT\94 event.
69070 +
69071 +Command
69072 +    wmiconfig eth1 --listen=<#of TUs, can range from 15 to 3000>
69073 +
69074 +    --listenbeacons=<#of beacons, can range from 1 to 50>
69075 +
69076 +Command Parameters
69077 +    UINT16    listenInterval
69078 +        Specifies the listen interval in Kms
69079 +        (1024 ms), ranging from 100 to 1000
69080 +
69081 +    UINT16    listenbeacons
69082 +        Specifies the listen interval in beacons,
69083 +        ranging from 1 to 50
69084 +
69085 +Command Values
69086 +    None
69087 +
69088 +Reset Values
69089 +    The device sets the listen interval equal to the beacon interval of the AP it associates
69090 +    to.
69091 +
69092 +Restrictions
69093 +    None
69094 +
69095 +=====================================================================
69096 +
69097 +
69098 +Name
69099 +    SET_LPREAMBLE
69100 +
69101 +Synopsis
69102 +    Overrides the short preamble capability of the AR6000 device
69103 +
69104 +Command
69105 +    TBD
69106 +
69107 +Command Parameters
69108 +    WMI_LPREAMBLE_DISABLED
69109 +        The device is short-preamble capable
69110 +
69111 +    WMI_LPREAMBLE_ENABLED
69112 +        The device supports only the long-
69113 +    preamble mode
69114 +
69115 +Command Values
69116 +    None
69117 +
69118 +Reset Value
69119 +    None defined
69120 +
69121 +Restrictions
69122 +    None
69123 +
69124 +
69125 +=====================================================================
69126 +
69127 +Name
69128 +    SET_MAX_SP_LEN
69129 +
69130 +Synopsis
69131 +    Set the maximum service period; indicates the number of packets the AR6001 can
69132 +    receive from the AP when triggered
69133 +
69134 +Command
69135 +    wmiconfig eth1 --setMaxSPLength <maxSPLen>
69136 +
69137 +Command Parameters
69138 +    UINT8    maxSPLen
69139 +        An APSD_SP_LEN_TYPE value
69140 +
69141 +Command Values
69142 +    {
69143 +        DELIVER_ALL_PKT  = 0x0
69144 +        DELIVER_2_PKT    = 0x1
69145 +        DELIVER_4_PKT    = 0x2
69146 +        DELIVER_6_PKT    = 0x3
69147 +    }APSD_SP_LEN_TYPE
69148 +
69149 +
69150 +Reset Values
69151 +    maxSPLen is DELIVER_ALL_PKT
69152 +
69153 +Restrictions
69154 +    None
69155 +
69156 +=====================================================================
69157 +
69158 +
69159 +Name
69160 +    SET_OPT_MODE
69161 +
69162 +Synopsis
69163 +    Special feature, sets the special mode on/off
69164 +
69165 +Command
69166 +    wmiconfig eth1 --mode <mode>
69167 +    Set the optional mode, where mode is special or off
69168 +
69169 +Command Parameters
69170 +    enum {
69171 +        SPECIAL_OFF
69172 +        SPECIAL_ON
69173 +    } OPT_MODE_TYPE;
69174 +
69175 +Command Values
69176 +
69177 +Reset Value
69178 +    Mode = Off
69179 +
69180 +Restrictions
69181 +    None
69182 +
69183 +=====================================================================
69184 +
69185 +
69186 +Name
69187 +    SET_PMKID
69188 +
69189 +Synopsis
69190 +    The host uses this command to enable or disable a pairwise master key ID (PMKID)
69191 +    in the AR6000 PMKID cache. The AR6000 clears its PMKID cache on receipt of a
69192 +    DISCONNECT command from the host. Individual entries in the cache might be
69193 +    deleted as the AR6000 detect new APs and decides to remove old ones.
69194 +
69195 +Command
69196 +    wmiconfig eth1 --setbsspmkid --bssid=<aabbccddeeff>
69197 +    --bsspmkid=<pmkid>
69198 +
69199 +Command Parameters
69200 +    UINT8    bssid[6]
69201 +        The MAC address of the AP that the
69202 +        PMKID corresponds to (6 bytes in hex
69203 +        format)
69204 +
69205 +    UINT8    enable
69206 +        Either PMKID_DISABLE (0) to disable
69207 +        the PMKID or PMKID_ENABLE (1) to
69208 +        enable it (16 bytes in hex format)
69209 +
69210 +    UINT8    pmkid[16]
69211 +        Meaningful only if enable is
69212 +        PMKID_ENABLE, when it is the PMKID
69213 +        that the AR6000 should use on the next
69214 +        reassociation with the specified AP
69215 +
69216 +Command Values
69217 +    enable
69218 +    = 0 (disable), 1 (enable)
69219 +    PKMID enabled/disabled
69220 +
69221 +Reset Values
69222 +    None defined
69223 +
69224 +Restrictions
69225 +    Only supported in infrastructure networks
69226 +
69227 +=====================================================================
69228 +
69229 +
69230 +Name
69231 +    SET_PMKID_LIST_CMD
69232 +
69233 +Synopsis
69234 +    Configures the list of PMKIDs on the firmware.
69235 +
69236 +Command
69237 +    wmiconfig --setpmkidlist --numpmkid=<n> --pmkid=<pmkid_1>
69238 +    ... --pmkid=<pmkid_n>
69239 +
69240 +    Where n is the number of pmkids (maximum = 8) and pmkid_i is the ith pmkid (16
69241 +    bytes in hex format)
69242 +
69243 +Command Parameters
69244 +    {
69245 +        A_UINT8 pmkid[WMI_PMKID_LEN];
69246 +    } __ATTRIB_PACK WMI_PMKID;
69247 +
69248 +    {
69249 +        A_UINT32 numPMKID;
69250 +        WMI_PMKID pmkidList[WMI_MAX_PMKID_CACHE];
69251 +    } __ATTRIB_PACK WMI_SET_PMKID_LIST_CMD;
69252 +
69253 +Command Values
69254 +    None
69255 +
69256 +Reset Values
69257 +    None
69258 +
69259 +Restrictions
69260 +    Supported only in infrastructure modes
69261 +
69262 +=====================================================================
69263 +
69264 +
69265 +Name
69266 +    SET_POWER_MODE
69267 +
69268 +Synopsis
69269 +    The host uses this command to provide the AR6000 device with guidelines on the
69270 +    desired trade-off between power utilization and performance.
69271 +
69272 +        In normal power mode, the device enters a sleep state if they have nothing to do,
69273 +        which conserves power but may cost performance as it can take up to 2 ms to
69274 +        resume operation after leaving sleep state.
69275 +
69276 +        In maximum performance mode, the device never enters sleep state, thus no time
69277 +        is spent waking up, resulting in higher power consumption and better
69278 +        performance.
69279 +
69280 +Command
69281 +    TBD
69282 +
69283 +Command Parameters
69284 +    UINT8    powerMode
69285 +        WMI_POWER_MODE value
69286 +    {
69287 +        REC_POWER   = 1
69288 +            (Recommended setting) Tries to conserve
69289 +            power without sacrificing performance
69290 +        MAX_PERF_POWER    = 2
69291 +            Setting that maximizes performance at
69292 +            the expense of power
69293 +
69294 +            All other values are reserved
69295 +    } WMI_POWER_MODE
69296 +
69297 +Command Values
69298 +    See command parameters
69299 +
69300 +Reset Values
69301 +    powerMode is REC_POWER
69302 +
69303 +Restrictions
69304 +    This command should only be issued in the DISCONNECTED state for the
69305 +    infrastructure network.
69306 +
69307 +            For a PM-disabled ad hoc network, the power mode should remain in
69308 +            MAX_PERF_POWER.
69309 +
69310 +            For a PM-enabled ad hoc network, the device can have REC_POWER or
69311 +            MAX_PERF_POWER set, but either way it must follow the power save ad hoc
69312 +            protocol. The host can change power modes in the CONNECTED state.
69313 +
69314 +    Host changes to the PS setting when the STA is off the home channel take no effect
69315 +    and cause a TARGET_PM_FAIL event.
69316 +
69317 +=====================================================================
69318 +
69319 +
69320 +Name
69321 +    SET_POWER_PARAMS
69322 +
69323 +Synopsis
69324 +    The host uses this command to configure power parameters
69325 +
69326 +Command
69327 +    wmiconfig eth1 --pmparams --it=<ms> --np=<number of PS POLL>
69328 +    --dp=<DTIM policy: ignore/normal/stick>
69329 +
69330 +Command Parameters
69331 +    UINT16    idle_period
69332 +        Length of time (in ms) the AR6000 device
69333 +        remains awake after frame Rx/Tx before going
69334 +        to SLEEP state
69335 +
69336 +    UINT16    pspoll_number
69337 +            The number of PowerSavePoll (PS-poll)
69338 +            messages the device should send before
69339 +            notifying the AP it is awake
69340 +
69341 +    UINT16    dtim_policy
69342 +            A WMI_POWER_PARAMS_CMD value
69343 +
69344 +    {
69345 +        IGNORE_DTIM    =1
69346 +            The device does not listen to any content after
69347 +            beacon (CAB) traffic
69348 +        NORMAL_DTIM    = 2
69349 +            DTIM period follows the listen interval (e.g., if
69350 +            the listen interval is 4 and the DTIM period is 2,
69351 +            the device wakes up every fourth beacon)
69352 +        STICK_DTIM    = 3
69353 +            Device attempt to receive all CAB traffic (e.g., if
69354 +            the DTIM period is 2 and the listen interval is 4,
69355 +            the device wakes up every second beacon)
69356 +    } WMI_POWER_PARAMS_CMD
69357 +
69358 +Command Parameters
69359 +    See command parameters
69360 +
69361 +Reset Values
69362 +    idle_period
69363 +        200 ms
69364 +
69365 +    pspoll_number
69366 +    = 1
69367 +
69368 +    dtim_policy
69369 +    = NORMAL_DTIM
69370 +
69371 +Restrictions
69372 +    None
69373 +
69374 +=====================================================================
69375 +
69376 +
69377 +Name
69378 +    SET_POWERSAVE_PARAMS
69379 +
69380 +Synopsis
69381 +    Set the two AR6000 power save timers (PS-POLL timer and APSD trigger timer) and
69382 +    the two ASPD TIM policies
69383 +
69384 +Command
69385 +    wmiconfig eth1--psparams --psPollTimer=<psPollTimeout in ms>
69386 +    --triggerTimer=<triggerTimeout in ms> --apsdTimPolicy=<ignore/
69387 +    adhere> --simulatedAPSDTimPolicy=<ignore/adhere>
69388 +
69389 +Command Parameters
69390 +    typedef struct {
69391 +        A_UINT16    psPollTimeout;
69392 +            Timeout (in ms) after sending PS-POLL; the
69393 +            AR6000 device sleeps if it does not receive a
69394 +            data packet from the AP
69395 +
69396 +        A_UINT16    triggerTimeout;
69397 +            Timeout (in ms) after sending a trigger; the
69398 +            device sleeps if it does not receive any data
69399 +            or null frame from the AP
69400 +
69401 +        APSD_TIM_POLICY    apsdTimPolicy;
69402 +            TIM behavior with queue APSD enabled
69403 +
69404 +        APSD_TIM_POLICY    simulatedAPSD
69405 +
69406 +        TimPolicy;
69407 +            TIM behavior with simulated APSD
69408 +            enabled
69409 +
69410 +    typedef enum {
69411 +        IGNORE_TIM_ALL_QUEUES_APSD = 0,
69412 +        PROCESS_TIM_ALL_QUEUES_APSD = 1,
69413 +        IGNORE_TIM_SIMULATED_APSD = 2,
69414 +        POWERSAVE_TIMERS_POLICY = 3,
69415 +    } APSD_TIM_POLICY;
69416 +
69417 +Command Values
69418 +    None
69419 +
69420 +Reset Values
69421 +    psPollTimeout is 50 ms; triggerTimeout is 10 ms;
69422 +    apsdTimPolicy = IGNORE_TIM_ALL_QUEUES_APSD;
69423 +    simulatedAPSDTimPolicy = POWERSAVE_TIMERS_POLICY
69424 +
69425 +Restrictions
69426 +    When this command is used, all parameters must be set; this command does not
69427 +    allow setting only one parameter.
69428 +
69429 +=====================================================================
69430 +
69431 +
69432 +Name
69433 +    SET_PROBED_SSID
69434 +
69435 +Synopsis
69436 +    The host uses this command to provide a list of up to MAX_PROBED_SSID_INDEX
69437 +    (six) SSIDs that the AR6000 device should actively look for. It lists the active SSID
69438 +    table. By default, the device actively looks for only the SSID specified in the
69439 +    \93CONNECT_CMD\94 command, and only when the regulatory domain allows active
69440 +    probing. With this command, specified SSIDs are probed for, even if they are hidden.
69441 +
69442 +Command
69443 +    wmiconfig eth1 --ssid=<ssid> [--num=<index>]
69444 +
69445 +Command Parameters
69446 +    {
69447 +        A_UINT8    numSsids
69448 +            A number from 0 to
69449 +            MAX_PROBED_SSID_INDEX indicating
69450 +            the active SSID table entry index for this
69451 +            command (if the specified entry index
69452 +            already has an SSID, the SSID specified in
69453 +            this command replaces it)
69454 +
69455 +        WMI_PROBED_SSID_INFO    probedSSID[1]
69456 +    } WMI_PROBED_SSID_CMD
69457 +
69458 +    {
69459 +        A_UINT8    flag
69460 +            WMI_SSID_FLAG indicates the current
69461 +            entry in the active SSID table
69462 +        A_UINT8    ssidLength
69463 +            Length of the specified SSID in bytes.
69464 +            If = 0, the entry corresponding to the
69465 +            index is erased
69466 +        A_UINT8    ssid[32]
69467 +            SSID string actively probed for when
69468 +            permitted by the regulatory domain
69469 +    } WMI_PROBED_SSID_INFO
69470 +
69471 +Command Values
69472 +    WMI_SSID_FLAG
69473 +    {
69474 +         DISABLE_SSID_FLAG    = 0
69475 +            Disables entry
69476 +        SPECIFIC_SSID_FLAG    = 1
69477 +            Probes specified SSID
69478 +        ANY_SSID_FLAG    = 2
69479 +            Probes for any SSID
69480 +    } WMI_SSID_FLAG
69481 +
69482 +Reset Value
69483 +    The entries are unused.
69484 +
69485 +Restrictions
69486 +    None
69487 +
69488 +=====================================================================
69489 +
69490 +
69491 +Name
69492 +    SET_REASSOC_MODE
69493 +
69494 +Synopsis
69495 +    Specify whether the disassociated frame should be sent or not upon reassociation.
69496 +
69497 +Command
69498 +    wmiconfig eth1 --setreassocmode <mode>
69499 +
69500 +Command Parameters
69501 +    UINT8    mode
69502 +
69503 +Command Values
69504 +    mode
69505 +        = 0x00
69506 +        Send disassoc to a previously connected AP
69507 +        upon reassociation
69508 +        = 0x01
69509 +        Do not send disassoc to previously connected
69510 +        AP upon reassociation
69511 +
69512 +Reset Values
69513 +    None defined
69514 +
69515 +Restrictions
69516 +    None
69517 +
69518 +
69519 +=====================================================================
69520 +
69521 +Name
69522 +    SET_RETRY_LIMITS
69523 +
69524 +Synopsis
69525 +    Allows the host to influence the number of times that the AR6000 device should
69526 +    attempt to send a frame before they give up.
69527 +
69528 +Command
69529 +    wmiconfig --setretrylimits <frameType> <trafficClass> <maxRetries>
69530 +    <enableNotify>
69531 +
69532 +Command Parameters
69533 +    {
69534 +        UINT8    frameType
69535 +            A WMI_FRAMETYPE specifying
69536 +            which type of frame is of interest.
69537 +        UINT8    trafficClass
69538 +            Specifies a traffic class (see
69539 +            \93CREATE_PSTREAM\94). This
69540 +            parameter is only significant when
69541 +            frameType = DATA_FRAMETYPE.
69542 +        UINT8    maxRetries
69543 +            Maximum number of times the
69544 +            device attempts to retry a frame Tx,
69545 +            ranging from WMI_MIN_RETRIES
69546 +            (2) to WMI_MAX_RETRIES (15). If
69547 +            the special value 0 is used,
69548 +            maxRetries is set to 15.
69549 +        A_UINT8    enableNotify
69550 +            Notify when enabled
69551 +    } WMI_RETRY_LIMIT_INFO
69552 +
69553 +    {
69554 +        A_UINT8    numEntries
69555 +        WMI_RETRY_LIMIT_INFO  retryLimitInfo[1]
69556 +    } WMI_SET_RETRY_LIMITS_CMD
69557 +
69558 +Command Values
69559 +    {
69560 +        MGMT_FRAMETYPE    = 0    Management frame
69561 +        CONTROL_FRAMETYPE = 1    Control frame
69562 +        DATA_FRAMETYPE    = 2    Data frame
69563 +    } WMI_FRAMETYPE
69564 +
69565 +Reset Values
69566 +    Retries are set to 15
69567 +
69568 +Restrictions
69569 +    None
69570 +
69571 +=====================================================================
69572 +
69573 +
69574 +Name
69575 +    SET_ROAM_CTRL
69576 +
69577 +Synopsis
69578 +    Affects how the AR6000 device selects a BSS. The host uses this command to set and
69579 +    enable low RSSI scan parameters. The time period of low RSSI background scan is
69580 +    mentioned in scan period. Low RSSI scan is triggered when the current RSSI
69581 +    threshold (75% of current RSSI) is equal to or less than scan threshold.
69582 +
69583 +    Low RSSI roam is triggered when the current RSSI threshold falls below the roam
69584 +    threshold and roams to a better AP by the end of the scan cycle. During Low RSSI
69585 +    roam, if the STA finds a new AP with an RSSI greater than roam RSSI to floor, during
69586 +    scan, it roams immediately to it instead of waiting for the end of the scan cycle. See
69587 +    also \93Scan and Roam\94 on page C-1.
69588 +
69589 +Command
69590 +    wmiconfig --roam <roamctrl> <info>, where info is <scan period>
69591 +    <scan threshold> <roam threshold> <roam rssi floor>
69592 +
69593 +Command Parameters
69594 +    A_UINT8    roamCtrlType;
69595 +
69596 +Command Values
69597 +    WMI_FORCE_ROAM     = 1
69598 +    Roam to the specified BSSID
69599 +
69600 +    WMI_SET_ROAM_MODE  = 2
69601 +    Default, progd bias, no roam
69602 +
69603 +    WMI_SET_HOST_BIAS  = 3
69604 +    Set the host bias
69605 +
69606 +    WMI_SET_LOWRSSI_SCAN_PARAMS  = 4
69607 +    Info parameters
69608 +
69609 +    A_UINT8    bssid[ATH_MAC_LEN];
69610 +    WMI_FORCE_ROAM
69611 +
69612 +    A_UINT8    roamMode;
69613 +    WMI_SET_ROAM_MODE
69614 +
69615 +    A_UINT8    bssBiasInfo;
69616 +    WMI_SET_HOST_BIAS
69617 +
69618 +    A_UINT16    lowrssi_scan_period;
69619 +    WMI_SET_LOWRSSI_SCAN_PARAMS
69620 +
69621 +    A_INT16
69622 +    lowrssi_scan_threshold;
69623 +    WMI_SET_LOWRSSI_SCAN_PARAMS
69624 +
69625 +    A_INT16    lowrssi_roam_threshold;
69626 +    WMI_SET_LOWRSSI_SCAN_PARAMS
69627 +
69628 +    A_UINT8    roam_rssi_floor;
69629 +    WMI_SET_LOWRSSI_SCAN_PARAMS
69630 +
69631 +Reset Value
69632 +    None defined (default lowrssi scan is disabled. Enabled only when scan period is set.)
69633 +
69634 +Restrictions
69635 +    None
69636 +
69637 +=====================================================================
69638 +
69639 +
69640 +Name
69641 +    SET_RTS
69642 +
69643 +Synopsis
69644 +    Decides when RTS should be sent.
69645 +
69646 +Command
69647 +    wmiconfig eth1 --setRTS <pkt length threshold>
69648 +
69649 +Command Parameters
69650 +    A_UINT16
69651 +    threshold;
69652 +    Command parameter threshold in bytes. An RTS is
69653 +    sent if the data length is more than this threshold.
69654 +    The default is to NOT send RTS.
69655 +
69656 +Command Values
69657 +    None
69658 +
69659 +Reset Value
69660 +    Not to send RTS.
69661 +
69662 +Restrictions
69663 +    None
69664 +
69665 +
69666 +=====================================================================
69667 +
69668 +Name
69669 +    SET_SCAN_PARAMS
69670 +
69671 +Synopsis
69672 +    The host uses this command to set the AR6000 scan parameters, including the duty
69673 +    cycle for both foreground and background scanning. Foreground scanning takes
69674 +    place when the AR6000 device is not connected, and discovers all available wireless
69675 +    networks to find the best BSS to join. Background scanning takes place when the
69676 +    device is already connected to a network and scans for potential roaming candidates
69677 +    and maintains them in order of best to worst. A second priority of background
69678 +    scanning is to find new wireless networks.
69679 +
69680 +    The device initiates a scan when necessary. For example, a foreground scan is always
69681 +    started on receipt of a \93CONNECT_CMD\94 command or when the device cannot find
69682 +    a BSS to connect to. Foreground scanning is disabled by default until receipt of a
69683 +    CONNECT command. Background scanning is enabled by default and occurs every
69684 +    60 seconds after the device is connected.
69685 +
69686 +    The device implements a binary backoff interval for foreground scanning when it
69687 +    enters the DISCONNECTED state after losing connectivity with an AP or when a
69688 +    CONNECT command is received. The first interval is ForegroundScanStartPeriod,
69689 +    which doubles after each scan until the interval reaches ForegroundScanEndPeriod.
69690 +    If the host terminates a connection with DISCONNECT, the foreground scan period
69691 +    is ForegroundScanEndPeriod. All scan intervals are measured from the time a full
69692 +    scan ends to the time the next full scan starts. The host starts a scan by issuing a
69693 +    \93START_SCAN\94 command. See also \93Scan and Roam\94 on page C-1.
69694 +
69695 +Command
69696 +    wmiconfig eth1 --scan --fgstart=<sec> --fgend=<sec> --bg=<sec> --
69697 +    act=<msec> --pas=<msec> --sr=<short scan ratio> --scanctrlflags
69698 +    <connScan> <scanConnected> <activeScan> <reportBSSINFO>
69699 +
69700 +Command Parameters
69701 +    UINT16    fgStartPeriod
69702 +        First interval used by the device when it
69703 +        disconnects from an AP or receives a
69704 +        CONNECT command, specified in seconds (0\96
69705 +        65535). If = 0, the device uses the reset value.
69706 +        If = 65535, the device disables foreground
69707 +        scanning.
69708 +
69709 +    UINT16    fgEndPeriod
69710 +        The maximum interval the device waits between
69711 +        foreground scans specified in seconds (from
69712 +        ForegroundScanStartPeriod to 65535). If = 0, the
69713 +        device uses the reset value.
69714 +
69715 +    UINT16    bgScanPeriod
69716 +        The period of background scan specified in
69717 +        seconds (0\9665535). By default, it is set to the reset
69718 +        value of 60 seconds. If 0 or 65535 is specified, the
69719 +        device disables background scanning.
69720 +
69721 +    UINT16    maxactChDwellTime
69722 +        The period of time the device stays on a
69723 +        particular channel while active scanning. It is
69724 +        specified in ms (10\9665535). If the special value of
69725 +        0 is specified, the device uses the reset value.
69726 +
69727 +    UINT16    PasChDwellTime
69728 +        The period of time the device remains on a
69729 +        particular channel while passive scanning. It is
69730 +        specified in ms (10\9665535). If the special value of
69731 +        0 is specified, the device uses the reset value.
69732 +
69733 +    UINT8    shortScanRatio
69734 +        Number of short scans to perform for each
69735 +        long scan.
69736 +
69737 +    UINT8    scanCtrlFlasgs
69738 +
69739 +    UINT16    minactChDwellTime
69740 +        Specified in ms
69741 +
69742 +    UINT32    maxDFSchActTime
69743 +        The maximum time a DFS channel can stay
69744 +        active before being marked passive, specified in
69745 +        ms.
69746 +
69747 +Command Values
69748 +    None
69749 +
69750 +Reset Values
69751 +    ForegroundScanStart
69752 +Period
69753 +        1 sec
69754 +
69755 +    ForegroundScanEndPeriod
69756 +        60 sec
69757 +
69758 +    BackgroundScanPeriod
69759 +        60 sec
69760 +
69761 +    ActiveChannelDwellTime
69762 +        105 ms
69763 +
69764 +=====================================================================
69765 +
69766 +
69767 +Name
69768 +    SET_TKIP_COUNTERMEASURES
69769 +
69770 +Synopsis
69771 +    The host issues this command to tell the target whether to enable or disable TKIP
69772 +    countermeasures.
69773 +
69774 +Command
69775 +    TBD
69776 +
69777 +Command Parameters
69778 +    UINT8    WMI_TKIP_CM_ENABLE
69779 +        Enables the countermeasures
69780 +
69781 +
69782 +    UINT8    TKIP_CM_DISABLE
69783 +        Disables the countermeasures
69784 +
69785 +Command Values
69786 +    None
69787 +
69788 +Reset Values
69789 +    By default, TKIP MIC reporting is disabled
69790 +
69791 +Restrictions
69792 +    None
69793 +
69794 +=====================================================================
69795 +
69796 +
69797 +Name
69798 +    SET_TX_PWR
69799 +
69800 +Synopsis
69801 +    The host uses this command to specify the Tx power level of the AR6000. Cannot be
69802 +    used to exceed the power limit permitted by the regulatory domain. The maximum
69803 +    output power is limited in the chip to 31.5 dBm; the range is 0 \96 31.5 dbm.
69804 +
69805 +Command
69806 +    wmiconfig --power <dbM>
69807 +
69808 +Command Parameters
69809 +    UINT8    dbM
69810 +        The desired Tx power specified in dbM.
69811 +        If = 0, the device chooses the maximum
69812 +        permitted by the regulatory domain.
69813 +
69814 +Command Values
69815 +    None
69816 +
69817 +Reset Values
69818 +    The maximum permitted by the regulatory domain
69819 +
69820 +Restrictions
69821 +    None
69822 +
69823 +See Also
69824 +    \93GET_TX_PWR\94
69825 +
69826 +
69827 +=====================================================================
69828 +
69829 +Name
69830 +    SET_VOICE_PKT_SIZE
69831 +
69832 +Synopsis
69833 +    If an AP does not support WMM, it has no way to differentiate voice from data.
69834 +    Because the voice packet is typically small, packet in size less than voicePktSize are
69835 +    assumed to be voice, otherwise it is treated as data.
69836 +
69837 +Command
69838 +    wmiconfig eth1 --setVoicePktSize <size-in-bytes>
69839 +
69840 +Command Parameters
69841 +    UINT16    voicePktSize
69842 +        Packet size in octets
69843 +
69844 +Command Values
69845 +    None
69846 +
69847 +Reset Values
69848 +    voicePktSize default is 400 bytes
69849 +
69850 +Restrictions
69851 +    No effect if WMM is unavailable
69852 +
69853 +
69854 +=====================================================================
69855 +
69856 +Name
69857 +    SET_WMM
69858 +
69859 +Synopsis
69860 +    Overrides the AR6000 device WMM capability
69861 +
69862 +Command
69863 +    wmiconfig eth1 --setwmm <enable>
69864 +
69865 +Command Parameters
69866 +    WMI_WMM_ENABLED
69867 +        Enables WMM
69868 +
69869 +    WMI_WMM_DISABLED
69870 +        Disables WMM support
69871 +
69872 +Command Values
69873 +    0 = disabled
69874 +    1 = enabled
69875 +
69876 +Reset Value
69877 +    WMM Disabled
69878 +
69879 +Restrictions
69880 +    None
69881 +
69882 +
69883 +=====================================================================
69884 +
69885 +Name
69886 +    SET_WMM_TXOP
69887 +
69888 +Synopsis
69889 +    Configures TxOP Bursting when sending traffic to a WMM capable AP
69890 +
69891 +Command
69892 +    wmiconfig eth1 --txopbursting <burstEnable>
69893 +
69894 +    <burstEnable>
69895 +        = 0
69896 +    Disallow TxOp bursting
69897 +
69898 +        = 1
69899 +    Allow TxOp bursting
69900 +
69901 +Command Parameters
69902 +    txopEnable
69903 +        = WMI_TXOP_DISABLED
69904 +        Disabled
69905 +
69906 +        = WMI_TXOP_ENABLED
69907 +        Enabled
69908 +
69909 +Command Values
69910 +    txopEnable
69911 +        = 0    Disabled
69912 +
69913 +        = 1    Enabled
69914 +
69915 +Reset Value
69916 +    Bursting is off by default
69917 +
69918 +Restrictions
69919 +    None
69920 +
69921 +=====================================================================
69922 +
69923 +
69924 +Name
69925 +    SET_WOW_MODE
69926 +
69927 +Synopsis
69928 +    The host uses this command to enable or disable the WoW mode. When WoW mode
69929 +    is enabled and the host is asleep, pattern matching takes place at the target level.
69930 +    Only packets that match any of the pre-specified WoW filter patterns, will be passed
69931 +    up to the host. The host will also be woken up by the target. Packets which do not
69932 +    match any of the WoW patterns are discarded.
69933 +
69934 +Command
69935 +    wmiconfig \96setwowmode <enable/disable>
69936 +
69937 +Command Parameters
69938 +    A_BOOL    enable_wow
69939 +        Enable or disable WoW:
69940 +
69941 +Command Values
69942 +        = 0
69943 +    Disable WoW
69944 +
69945 +        = 1
69946 +    Enable WoW
69947 +
69948 +Reset Value
69949 +    None defined (default WoW mode is disabled).
69950 +
69951 +Restrictions
69952 +    None
69953 +
69954 +See Also
69955 +    \93GET_WOW_LIST\94
69956 +
69957 +
69958 +=====================================================================
69959 +
69960 +Name
69961 +    SET_WSC_STATUS
69962 +
69963 +Synopsis
69964 +    The supplicant uses this command to inform the target about the status of the WSC
69965 +    registration protocol. During the WSC registration protocol, a flag is set so the target
69966 +    bypasses some of the checks in the CSERV module. At the end of the registration, this
69967 +    flag is reset.
69968 +
69969 +Command
69970 +    N/A
69971 +
69972 +Command Parameters
69973 +    A_BOOL status
69974 +        = 1    WSC registration in progress
69975 +        = 0    WSC protocol not running
69976 +
69977 +Reply Parameters
69978 +    None
69979 +
69980 +Reset Value
69981 +    None defined (default = 0)
69982 +
69983 +Restrictions
69984 +    None
69985 +
69986 +
69987 +=====================================================================
69988 +
69989 +Name
69990 +    SNR_THRESHOLD_PARAMS
69991 +
69992 +Synopsis
69993 +    Configures how the AR6000 device monitors and reports SNR of the connected BSS,
69994 +    used as a link quality metric.
69995 +
69996 +Command
69997 +    --snrThreshold <weight> <upper_threshold_1> ...
69998 +    <upper_threshold_4> <lower_threshold_1> ... <lower_threshold_4>
69999 +    <pollTimer>
70000 +
70001 +Command Parameters
70002 +    <weight>
70003 +        Share with rssiThreshold. Range in [1, 16], used
70004 +        in the formula to calculate average RSSI
70005 +
70006 +    <upper_threshold_x>
70007 +        Above thresholds expressed in db, in ascending
70008 +        order
70009 +
70010 +    <lower_threshold_x>
70011 +        Below thresholds expressed in db, in ascending
70012 +        order
70013 +
70014 +    <pollTimer>
70015 +        The signal strength sampling frequency in
70016 +        seconds. If polltime = 0, signal strength
70017 +        sampling is disabled
70018 +
70019 +Command Values
70020 +    None
70021 +
70022 +Reset Value
70023 +    None defined
70024 +
70025 +Restrictions
70026 +    None
70027 +
70028 +=====================================================================
70029 +
70030 +
70031 +Name
70032 +    START_SCAN
70033 +
70034 +Synopsis
70035 +    The host uses this command to start a long or short channel scan. All future scans are
70036 +    relative to the time the AR6000 device processes this command. The device performs
70037 +    a channel scan on receipt of this command, even if a scan was already in progress.
70038 +    The host uses this command when it wishes to refresh its cached database of wireless
70039 +    networks. The isLegacy field will be removed (0 for now) because it is achieved by
70040 +    setting CONNECT_PROFILE_MATCH_DONE in the CONNECT command. See also
70041 +    \93Scan and Roam\94
70042 +
70043 +Command
70044 +    wmiconfig eth1 --startscan <scan type> <forcefgscan> 0
70045 +    <homeDwellTime> <forceScanInterval>
70046 +
70047 +Command Parameters
70048 +    UINT8    scanType
70049 +        WMI_SCAN_TYPE
70050 +
70051 +Command Values
70052 +    {
70053 +        WMI_LONG_SCAN    =0x0
70054 +            Requests a full scan
70055 +        WMI_SHORT_SCAN   =0x1
70056 +            Requests a short scan
70057 +    } WMI_SCAN_TYPE
70058 +
70059 +    A_BOOL    forceFgScan
70060 +        forceFgScan
70061 +        = 0
70062 +        Disable the foreground scan
70063 +
70064 +        forceFgScan
70065 +        = 1
70066 +        Forces a foreground scan
70067 +
70068 +    A_UINT32    homeDwellTime
70069 +        Maximum duration in the home
70070 +        channel (in ms)
70071 +
70072 +    A_UINT32     forceScanInterval
70073 +        Time interval between scans (in ms)
70074 +
70075 +    A_UINT32     scanType
70076 +        WMI_SCAN_TYPE
70077 +
70078 +Reset Value
70079 +    Disable forcing foreground scan
70080 +
70081 +Restrictions
70082 +    isLegacy field will no longer be supported (pass as 0 for now)
70083 +
70084 +
70085 +=====================================================================
70086 +
70087 +Name
70088 +    SYNCHRONIZE
70089 +
70090 +Synopsis
70091 +    The host uses this command to force a synchronization point between the command
70092 +    and data paths
70093 +
70094 +Command
70095 +    TBD
70096 +
70097 +Command Parameters
70098 +    None
70099 +
70100 +
70101 +
70102 +Command Values
70103 +    None
70104 +
70105 +
70106 +
70107 +Reset Values
70108 +    None
70109 +
70110 +
70111 +
70112 +Restrictions
70113 +    None
70114 +
70115 +
70116 +=====================================================================
70117 +
70118 +Name
70119 +    TARGET_ERROR_REPORT_BITMASK
70120 +
70121 +Synopsis
70122 +    Allows the host to control \93ERROR_REPORT\94 events from the AR6000 device.
70123 +
70124 +        If error reporting is disabled for an error type, a count of errors of that type is
70125 +        maintained by the device.
70126 +
70127 +        If error reporting is enabled for an error type, an \93ERROR_REPORT\94 event is
70128 +        sent when an error occurs and the error report bit is cleared.
70129 +
70130 +    Error counts for each error type are available through the \93GET_TARGET_STATS\94
70131 +    command.
70132 +
70133 +Command
70134 +    wmiconfig eth1 --setErrorReportingBitmask
70135 +
70136 +Command Parameters
70137 +    UINT32    bitmask
70138 +        Represents the set of
70139 +        WMI_TARGET_ERROR_VAL error types
70140 +        enabled for reporting
70141 +
70142 +Command Values
70143 +    {
70144 +        WMI_TARGET_PM_ERR_FAIL    = 0x00000001
70145 +            Power save fails (only two cases):
70146 +               Retry out of null function/QoS null
70147 +               function to associated AP for PS
70148 +               indication'
70149 +               Host changes the PS setting when
70150 +               STA is off home channel
70151 +
70152 +        WMI_TARGET_KEY_NOT_FOUND    = 0x00000002
70153 +            No cipher key
70154 +        WMI_TARGET_DECRYPTION_ERR   = 0x00000004
70155 +            Decryption error
70156 +        WMI_TARGET_BMISS            = 0x00000008
70157 +            Beacon miss
70158 +        WMI_PSDISABLE_NODE_JOIN     = 0x00000010
70159 +            A non-PS-enabled STA joined the
70160 +            PS-enabled network
70161 +        WMI_TARGET_COM_ERR          = 0x00000020
70162 +            Host/target communication error
70163 +        WMI_TARGET_FATAL_ERR        = 0x00000040
70164 +            Fatal error
70165 +    } WMI_TARGET_ERROR_VAL
70166 +
70167 +Reset Values
70168 +    Bitmask is 0, and all error reporting is disabled
70169 +
70170 +Restrictions
70171 +    None
70172 +
70173 +
70174 +=====================================================================
70175 +WMI Events
70176 +
70177 +Event
70178 +    Description
70179 +    Page
70180 +
70181 +
70182 +BSSINFO
70183 +    Contains information describing BSSs collected during a scan
70184 +
70185 +CAC_EVENTID
70186 +    Indicates signalling events in admission control
70187 +
70188 +CMDERROR
70189 +    The AR6000 device encounters an error while attempting to process
70190 +    a command
70191 +
70192 +CONNECT
70193 +    The device has connected to a wireless network
70194 +
70195 +DISCONNECT
70196 +    The device lost connectivity with a wireless network
70197 +
70198 +ERROR_REPORT
70199 +    An error has occurred for which the host previously requested
70200 +    notification with the command
70201 +    \93TARGET_ERROR_REPORT_BITMASK\94
70202 +
70203 +EXTENSION
70204 +    WMI extension event
70205 +
70206 +GET_PMKID_LIST_EVENT
70207 +    Created in response to a \93GET_PMKID_LIST_CMD\94 command
70208 +
70209 +GET_WOW_LIST_EVENT
70210 +    Response to the wmiconfig \93GET_WOW_LIST\94 command to
70211 +    retrieve the configured WoW patterns
70212 +
70213 +NEIGHBOR_REPORT
70214 +    Neighbor APs that match the current profile were detected
70215 +
70216 +OPT_RX_FRAME_EVENT
70217 +    (Special feature) informs the host of the reception of a special frame
70218 +
70219 +PSTREAM_TIMEOUT
70220 +    A prioritized stream has been idle for a specified interval
70221 +
70222 +READY
70223 +    The AR6000 device is ready to accept commands
70224 +
70225 +REGDOMAIN
70226 +    The regulatory domain has changed
70227 +
70228 +REPORT_ROAM_DATA_EVENT
70229 +    Reports the roam time calculations made by the device
70230 +    (generated with a special build)
70231 +    \97
70232 +
70233 +REPORT_STATISTICS
70234 +    Reply to a \93GET_TARGET_STATS\94 command
70235 +
70236 +ROAM_TBL_EVENT
70237 +    Reports the roam table
70238 +
70239 +RSSI_THRESHOLD
70240 +    Signal strength from the connected AP has crossed the threshold
70241 +    defined in the \93RSSI_THRESHOLD_PARAMS\94 command
70242 +
70243 +SCAN_COMPLETE_EVENT
70244 +    A scan has completed (added status SCAN_ABORTED in release 2.0)
70245 +
70246 +TEST_EVENT
70247 +    Event generated by the TCMD
70248 +
70249 +TKIP_MICERROR
70250 +    TKIP MIC errors were detected
70251 +
70252 +=====================================================================
70253 +
70254 +Name
70255 +    BSSINFO
70256 +
70257 +Synopsis
70258 +    Contains information describing one or more BSSs as collected during a scan.
70259 +    Information includes the BSSID, SSID, RSSI, network type, channel, supported rates,
70260 +    and IEs. BSSINFO events are sent only after the device receives a beacon or probe-
70261 +    response frame that pass the filter specified in the \93SET_BSS_FILTER\94 command.
70262 +    BSSINFO events consist of a small header followed by a copy of the beacon or probe
70263 +    response frame. The 802.11 header is not present. For formats of beacon and probe-
70264 +    response frames please consult the IEEE 802.11 specification.
70265 +
70266 +    The beacons or probe responses containing the IE specified by the
70267 +    WMI_BSS_FILTER_CMD are passed to the host through the
70268 +    WMI_BSSINFO_EVENT. The event carries a 32-bit bitmask that indicates the IEs that
70269 +    were detected in the management frame. The frame type field has been extended to
70270 +    indicate action management frames. This would be helpful to route these frames
70271 +    through the same event mechanism as used by the beacon processing function.
70272 +
70273 +    If the bssFilter in the SET_BSS_FILTER matches, then the ieMask is not relevant
70274 +    because the BSSINFO event is sent to the host. If the bssFilter doesnot match in the
70275 +    beacons/probe respones, then the ieMask match dictates whether the BSSINFO
70276 +    event is sent to the host. In the case of action management frames, the ieMask is the
70277 +    filter that is applied.
70278 +
70279 +Event ID
70280 +    0x1004
70281 +
70282 +Event Parameters
70283 +    typedef struct {
70284 +        A_UINT16    channel;
70285 +            Specifies the frequency (in MHz) where the
70286 +            frame was received
70287 +        A_UINT8    frameType;
70288 +            A WMI_BI_FTYPE value
70289 +        A_UINT8    snr;
70290 +        A_INT16    rssi;
70291 +            Indicates signal strength
70292 +        A_UINT8    bssid[ATH_MAC_LEN];
70293 +        A_UINT32    ieMask;
70294 +    } _ATTRIB_PACK_WMI_BSS_INFO_HDR;
70295 +
70296 +    Beacon or Probe Response Frame
70297 +
70298 +Event Values
70299 +    {
70300 +        BEACON_FTYPE    = 0x1
70301 +            Indicates a beacon frame
70302 +        PROBERESP_FTYPE
70303 +            Indicates a probe response frame
70304 +        ACTION_MGMT_FTYPE
70305 +     } WMI_BI_FTYPE
70306 +
70307 +=====================================================================
70308 +
70309 +Name
70310 +    CAC_EVENTID
70311 +
70312 +Synopsis
70313 +    Indicates signalling events in admission control. Events are generated when
70314 +    admission is accepted, rejected, or deleted by either the host or the AP. If the AP does
70315 +    not respond to an admission request within a timeout of 500 ms, an event is
70316 +    generated to the host.
70317 +
70318 +Event ID
70319 +    0x1011
70320 +
70321 +Event Parameters
70322 +    UINT8
70323 +    ac
70324 +    Access class pertaining to the
70325 +signalling
70326 +
70327 +    UINT8    cac_indication
70328 +        Type of indication; indications are
70329 +        listed in WMI_CAC_INDICATION
70330 +
70331 +    UINT8    statusCode
70332 +        AP response status code for a
70333 +        request
70334 +
70335 +    UINT8    tspecSuggestion[63]
70336 +        Suggested TSPEC from AP
70337 +
70338 +Event Values
70339 +    {
70340 +        CAC_INDICATION_ADMISSION = 0x00
70341 +        CAC_INDICATION_ADMISSION_RESP    = 0x01
70342 +        CAC_INDICATION_DELETE    = 0x02
70343 +        CAC_INDICATION_NO_RESP   = 0x03
70344 +    } WMI_CAC_INDICATION
70345 +
70346 +
70347 +=====================================================================
70348 +
70349 +
70350 +Name
70351 +    CMDERROR
70352 +
70353 +Synopsis
70354 +    Indicates that the AR6000 device encountered an error while attempting to process a
70355 +    command. This error is fatal and indicates that the device requires a reset.
70356 +
70357 +Event ID
70358 +    0x1005
70359 +
70360 +Event Parameters
70361 +    UINT16    commandId
70362 +        Corresponds to the command which generated
70363 +        the error
70364 +    UINT8    errorCode
70365 +        A WMI_ERROR_CODE value
70366 +
70367 +Event Values
70368 +    {
70369 +        INVALID_PARAM    = 1
70370 +            Invalid parameter
70371 +        ILLEGAL_STATE    = 2
70372 +            Illegal state
70373 +        INTERNAL_ERROR   = 3
70374 +            Internal Error
70375 +        All other values reserved
70376 +    } WMI_ERROR_CODE
70377 +
70378 +
70379 +=====================================================================
70380 +
70381 +
70382 +Name
70383 +    CONNECT
70384 +
70385 +Synopsis
70386 +    Signals that the AR6000 connected to a wireless network. Connection occurs due to a
70387 +    \93CONNECT\94 command or roaming to a new AP. For infrastructure networks, shows
70388 +    that the AR6000 successfully performed 802.11 authentication and AP association.
70389 +
70390 +Event ID
70391 +    0x1002
70392 +
70393 +Event Parameters
70394 +    UINT16    channel
70395 +        Channel frequency (in MHz) of the network the
70396 +        AR6000 are connected to
70397 +
70398 +    UINT8    bssid[6]
70399 +        MAC address of the AP the AR6000 are
70400 +        connected to or the BSSID of the ad hoc
70401 +        network
70402 +
70403 +    UINT16    listenInterval
70404 +        Listen interval (in Kms) that the AR6000 are
70405 +        using
70406 +
70407 +    UINT 8    beaconIeLen
70408 +        Length (in bytes) of the beacon IEs
70409 +
70410 +    UINT8    assocInfo
70411 +        Pointer to an array containing beacon IEs,
70412 +        followed first by association request IEs then by
70413 +        association response IEs
70414 +
70415 +    UINT8    assocReqLen
70416 +        Length (in bytes) of the assocReqIEs array
70417 +
70418 +    UINT8    assocRespLen
70419 +        Length (in bytes) of the assocRespIEs array
70420 +
70421 +Event Values
70422 +    None defined
70423 +
70424 +=====================================================================
70425 +
70426 +
70427 +Name
70428 +    DISCONNECT
70429 +
70430 +Synopsis
70431 +    Signals that the AR6000 device lost connectivity with the wireless network.
70432 +    DISCONENCT is generated when the device fails to complete a \93CONNECT\94
70433 +    command or as a result of a transition from a connected state to disconnected state.
70434 +
70435 +    After sending the \93DISCONNECT\94 event the device continually tries to re-establish
70436 +    a connection. A LOST_LINK occurs when STA cannot receive beacons within the
70437 +    specified time for the SET_BMISS_TIME command.
70438 +
70439 +Event ID
70440 +    0x1003
70441 +
70442 +Event Parameters
70443 +    UINT8    disconnect
70444 +        Reason
70445 +        A WMI_DISCONNECT_REASON value
70446 +
70447 +    UINT8    bssid[6]
70448 +        Indicates which BSS the device was connected to
70449 +
70450 +    UINT8    assocRespLen
70451 +        Length of the 802.11 association response frame
70452 +        that triggered this event, or 0 if not applicable
70453 +
70454 +    UINT8    assocInfo[assocRespLen]
70455 +        Copy of the 802.11 association response frame
70456 +
70457 +Event Values
70458 +    {
70459 +        NO_NETWORK_AVAIL    =0x01
70460 +            Indicates that the device was unable to
70461 +            establish or find the desired network
70462 +        LOST_LINK    =0x02
70463 +            Indicates the devices is no longer receiving
70464 +            beacons from the BSS it was previously
70465 +            connected to
70466 +
70467 +        DISCONNECT_CMD  =0x03
70468 +            Indicates a \93DISCONNECT\94 command was
70469 +            processed
70470 +        BSS_DISCONNECTED =0x04
70471 +            Indicates the BSS explicitly disconnected the
70472 +            device. Possible mechanisms include the AP
70473 +            sending 802.11 management frames
70474 +            (e.g., disassociate or deauthentication
70475 +            messages).
70476 +        AUTH_FAILED    =0x05
70477 +            Indicates that the device failed 802.11
70478 +            authentication with the BSS
70479 +        ASSOC_FAILED    =0x06
70480 +            Indicates that the device failed 802.11
70481 +            association with the BSS
70482 +        NO_RESOURCES_AVAIL    =0x07
70483 +            Indicates that a connection failed because the
70484 +            AP had insufficient resources to complete the
70485 +            connection
70486 +        CSERV_DISCONNECT    =0x08
70487 +            Indicates that the device\92s connection services
70488 +            module decided to disconnect from a BSS,
70489 +            which can happen for a variety of reasons (e.g.,
70490 +            the host marks the current connected AP as a
70491 +            bad AP).
70492 +        INVALID_PROFILE    =0x0A
70493 +            Indicates that an attempt was made to
70494 +            reconnect to a BSS that no longer matches the
70495 +            current profile
70496 +        All other values are reserved
70497 +    } WMI_DISCONNECT_REASON
70498 +
70499 +
70500 +=====================================================================
70501 +
70502 +
70503 +Name
70504 +    ERROR_REPORT
70505 +
70506 +Synopsis
70507 +    Signals that a type of error has occurred for which the host previously requested
70508 +    notification through the \93TARGET_ERROR_REPORT_BITMASK\94 command.
70509 +
70510 +Event ID
70511 +    0x100D
70512 +
70513 +Event Parameters
70514 +    UINT32    errorVal
70515 +            WMI_TARGET_ERROR_VAL value. See
70516 +            \93TARGET_ERROR_REPORT_BITMASK\94.
70517 +
70518 +Event Values
70519 +    errorVal
70520 +    = 0x00000001
70521 +    Power save fails
70522 +
70523 +        = 0x00000002
70524 +    No cipher key
70525 +
70526 +        = 0x00000004
70527 +    Decryption error
70528 +
70529 +        = 0x00000008
70530 +    Beacon miss
70531 +
70532 +        = 0x00000010
70533 +    A non-power save disabled node has joined
70534 +    the PS-enabled network
70535 +
70536 +
70537 +=====================================================================
70538 +
70539 +
70540 +Name
70541 +    EXTENSION
70542 +
70543 +Synopsis
70544 +    The WMI is used mostly for wireless control messages to a wireless module that
70545 +    apply to wireless module management regardless of the target platform
70546 +    implementation. However, some events peripherally related to wireless management
70547 +    are desired during operation. These wireless extension events may be platform-
70548 +    specific or implementation-dependent. See \93WMI Extension Commands\94
70549 +
70550 +
70551 +Event ID
70552 +    0x1010
70553 +
70554 +
70555 +=====================================================================
70556 +
70557 +
70558 +Name
70559 +    GET_PMKID_LIST_EVENT
70560 +
70561 +Synopsis
70562 +    Generated by firmware in response to a \93GET_PMKID_LIST_CMD\94 command.
70563 +
70564 +Event Parameters
70565 +    typedef struct {
70566 +        A_UINT32    numPMKID;
70567 +            Contains the number of PMKIDs in the reply
70568 +        WMI_PMKID   pmkidList[1];
70569 +    } __ATTRIB_PACK WMI_PMKID_LIST_REPLY;
70570 +
70571 +Event Values
70572 +    None
70573 +
70574 +
70575 +=====================================================================
70576 +
70577 +
70578 +Name
70579 +    GET_WOW_LIST_EVENT
70580 +
70581 +Synopsis
70582 +    Response to the wmiconfig \96getwowlist command to retrieve the configured Wake on
70583 +    Wireless patterns
70584 +
70585 +Event ID
70586 +    0x10018
70587 +
70588 +Event Parameters
70589 +    {
70590 +
70591 +    A_UINT8    num_filters
70592 +        Total number of patterns in the list
70593 +    A_UINT8    this_filter_num
70594 +        The filter number
70595 +    A_UINT8    wow_mode
70596 +        Shows whether WoW is enabled or disabled
70597 +    A_UINT8    host_mode
70598 +        Shows whether the host is asleep or awake
70599 +    WOW_FILTER    wow_filters[1]
70600 +        List of WoW filters (pattern and mask data bytes)
70601 +    } WMI_GET_WOW_LIST_REPLY;
70602 +
70603 +    {
70604 +        Each wow_filter_list element shows:
70605 +    A_UINT8    wow_valid_filter
70606 +        Whether the filter is valid
70607 +    A_UINT8    wow_filter_list_id
70608 +        Filter List ID (23 = default)
70609 +    A_UINT8    wow_filter_size
70610 +        Size in bytes of the filter
70611 +    A_UINT8    wow_filter_offset
70612 +        Offset of the pattern to search in the data packet
70613 +    A_UINT8    wow_filter_mask[MASK_SIZE]
70614 +        The mask to be applied to the pattern
70615 +    A_UINT8    wow_filter_pattern[WOW_PATTERN_SIZE]
70616 +        The pattern that to match to wake up the host
70617 +    } WOW_FILTER
70618 +
70619 +Event Values
70620 +    None
70621 +
70622 +=====================================================================
70623 +
70624 +
70625 +
70626 +Name
70627 +    NEIGHBOR_REPORT
70628 +
70629 +Synopsis
70630 +    Indicates the existence of neighbor APs that match the current profile. The host uses
70631 +    this event to populate the PMKID cache on the AR6000 and/or to perform
70632 +    preauthentication. This event is only generated in infrastructure mode.
70633 +
70634 +    A total of numberOfAps pairs of bssid/bssFlags exist, one pair for each AP.
70635 +
70636 +Event ID
70637 +    0x1008
70638 +
70639 +Event Parameters
70640 +    UINT8    numberOfAps
70641 +        The number of APs reported about in
70642 +        this event
70643 +    {
70644 +        UINT8    bssid[6]
70645 +            MAC address of a neighbor AP
70646 +        UINT8    bssFlags
70647 +            A WMI_BSS_FLAGS value
70648 +    }[numberOfAps]
70649 +
70650 +
70651 +Event Values
70652 +    {
70653 +        WMI_DEFAULT_BSS_FLAGS    = 0
70654 +            Logical OR of 1 or more
70655 +        WMI_BSS_FLAGS
70656 +        WMI_PREAUTH_CAPABLE_BSS
70657 +            = 1
70658 +            Indicates that this AP is capable of
70659 +            preauthentication
70660 +        WMI_PMKID_VALID_BSS
70661 +            = 2
70662 +            Indicates that the AR6000 have a
70663 +            valid pairwise master key for this AP
70664 +    } WMI_BSS_FLAGS
70665 +
70666 +
70667 +=====================================================================
70668 +
70669 +
70670 +
70671 +Name
70672 +    OPT_RX_FRAME_EVENT
70673 +
70674 +Synopsis
70675 +    Special feature, informs host of the reception of a special frame.
70676 +
70677 +Event ID
70678 +    0x100E
70679 +
70680 +Event Parameters
70681 +    {
70682 +        A_UINT16    channel;
70683 +        A_UINT8    frameType;
70684 +        A_INT8    snr;
70685 +        A_UINT8    srcAddr[ATH_MAC_LEN];
70686 +        A_UINT8    bssid[ATH_MAC_LEN];
70687 +        }WMI_OPT_RX_INFO_HDR
70688 +
70689 +Event Values
70690 +    None
70691 +
70692 +=====================================================================
70693 +
70694 +
70695 +
70696 +Name
70697 +    PSTREAM_TIMEOUT
70698 +
70699 +Synopsis
70700 +    Indicates that a priority stream that got created as a result of priority-marked data
70701 +    flow (priority marked in IP TOS) being idle for the default inactivity interval period
70702 +    (specified in the \93CREATE_PSTREAM\94 command) used for priority streams created
70703 +    implicitly by the driver. This event is not indicated for user-created priority streams.
70704 +    User-created priority streams exist until the users delete them explicitly. They do not
70705 +    timeout due to data inactivity.
70706 +
70707 +Event ID
70708 +    0x1007
70709 +
70710 +Event Parameters
70711 +    A_UINT8
70712 +    trafficClass
70713 +    Indicated the traffic class of priority
70714 +    stream that timed out
70715 +
70716 +Event Values
70717 +    {
70718 +        WMM_AC_BE    = 0
70719 +            Best effort
70720 +        WMM_AC_BK    = 1
70721 +            Background
70722 +        WMM_AC_VI    = 2
70723 +            Video
70724 +        WMM_AC_VO     = 3
70725 +            Voice
70726 +    } TRAFFIC CLASS
70727 +
70728 +
70729 +=====================================================================
70730 +
70731 +Name
70732 +    READY
70733 +
70734 +Synopsis
70735 +    Indicates that the AR6000 device is prepared to accept commands. It is sent once after
70736 +    power on or reset. It also indicates the MAC address of the device.
70737 +
70738 +Event ID
70739 +    0x1001
70740 +
70741 +Event Parameters
70742 +    UINT8    macAddr[6]
70743 +        Device MAC address
70744 +    UINT8    phyCapability
70745 +        A WMI_PHY_CAPABILITY value. Indicates the
70746 +        capabilities of the device wireless module\92s radio
70747 +
70748 +Event Values
70749 +    {
70750 +        WMI_11A_CAPABILITY       = 1
70751 +        WMI_11G_CAPABILITY       = 2
70752 +        WMI_11AG_CAPABILITY      = 3
70753 +    } WMI_PHY_CAPABILITY
70754 +
70755 +
70756 +=====================================================================
70757 +
70758 +Name
70759 +    REGDOMAIN
70760 +
70761 +Synopsis
70762 +    Indicates that the regulatory domain has changed. It initially occurs when the
70763 +    AR6000 device reads the board data information. The regulatory domain can also
70764 +    change when the device is a world-mode SKU. In this case, the regulatory domain is
70765 +    based on the country advertised by APs per the IEEE 802.11d specification. A
70766 +    potential side effect of a regulatory domain change is a change in the list of available
70767 +    channels. Any channel restrictions that exist as a result of a previous
70768 +    \93SET_CHANNEL_PARAMETERS\94 command are lifted.
70769 +
70770 +Event ID
70771 +    0x1006
70772 +
70773 +Event Parameters
70774 +    UINT32    regDomain
70775 +        The range of 0x0000 \96 0x00FF
70776 +        corresponds to an ISO country code.
70777 +
70778 +    Other regCodes are reserved for world
70779 +    mode settings and specific regulatory
70780 +    domains.
70781 +
70782 +Event Values
70783 +    None
70784 +
70785 +
70786 +=====================================================================
70787 +
70788 +
70789 +
70790 +Name
70791 +    REPORT_STATISTICS
70792 +
70793 +Synopsis
70794 +    A reply to a \93GET_TARGET_STATS\94 command.
70795 +
70796 +Event ID
70797 +    0x100B
70798 +
70799 +Event Parameters
70800 +    When the statistics are sent to the host, the AR6001 clear them so that a new set of
70801 +    statistics are collected for the next report.
70802 +
70803 +    UINT32    tx_packets
70804 +    UINT32    tx_bytes
70805 +    UINT32    tx_unicast_pkts
70806 +    UINT32    tx_unicast_bytes
70807 +    UINT32    tx_multicast_pkts
70808 +    UINT32    tx_multicast_bytes
70809 +    UINT32    tx_broadcast_pkts
70810 +    UINT32    tx_broadcast_bytes
70811 +    UINT32    tx_rts_success_cnt
70812 +    UINT32    tx_packet_per_ac[4]
70813 +        Tx packets per AC: [0] = BE, [1] = BK,
70814 +        [2] = VI, [3] = VO
70815 +    UINT32    tx_errors
70816 +        Number of packets which failed Tx, due
70817 +        to all failures
70818 +    ... REPORT_STATISTICS, continued
70819 +    UINT32    tx_failed_cnt
70820 +        Number of data packets that failed Tx
70821 +    UINT32    tx_retry_cnt
70822 +        Number of Tx retries for all packets
70823 +    UINT32    tx_rts_fail_cnt
70824 +        Number of RTS Tx failed count
70825 +    UINT32    rx_packets
70826 +    UINT32    rx_bytes
70827 +    UINT32    rx_unicast_pkts
70828 +    UINT32    rx_unicast_bytes
70829 +    UINT32    rx_multicast_pkts
70830 +    UINT32    rx_multicast_bytes
70831 +    UINT32    rx_broadcast_pkts
70832 +    UINT32    rx_broadcast_bytes
70833 +    UINT32    rx_fragment_pkt
70834 +        Number of fragmented packets received
70835 +    UINT32    rx_errors
70836 +        Number of Rx errors due to all failures
70837 +    UINT32    rx_crcerr
70838 +        Number of Rx errors due to CRC errors
70839 +    UINT32    rx_key_cache_miss
70840 +        Number of Rx errors due to a key not
70841 +        being plumbed
70842 +    UINT32    rx_decrypt_err
70843 +        Number of Rx errors due to decryption
70844 +        failure
70845 +    UINT32    rx_duplicate_frames
70846 +        Number of duplicate frames received
70847 +    UINT32    tkip_local_mic_failure
70848 +        Number of TKIP MIC errors detected
70849 +    UINT32    tkip_counter_measures_invoked
70850 +        Number of times TKIP countermeasures
70851 +        were invoked
70852 +    UINT32    tkip_replays
70853 +        Number of frames that replayed a TKIP
70854 +        encrypted frame received earlier
70855 +    UINT32    tkip_format_errors
70856 +        Number of frames that did not conform
70857 +        to the TKIP frame format
70858 +    UINT32    ccmp_format_errors
70859 +        Number of frames that did not conform
70860 +        to the CCMP frame format
70861 +    UINT32    ccmp_replays
70862 +        Number of frames that replayed a CCMP
70863 +        encrypted frame received earlier
70864 +    UINT32    power_save_failure_cnt
70865 +        Number of failures that occurred when
70866 +        the AR6001 could not go to sleep
70867 +    UINT32    cs_bmiss_cnt
70868 +        Number of BMISS interrupts since
70869 +    connection
70870 +    UINT32    cs_lowRssi_cnt
70871 +        Number of the times the RSSI went below
70872 +        the low RSSI threshold
70873 +    UINT16    cs_connect_cnt
70874 +        Number of connection times
70875 +    UINT16    cs_disconnect_cnt
70876 +        Number of disconnection times
70877 +    UINT8    cs_aveBeacon_rssi
70878 +        The current averaged value of the RSSI
70879 +        from the beacons of the connected BSS
70880 +    UINT8    cs_lastRoam_msec
70881 +        Time that the last roaming took, in ms.
70882 +        This time is the difference between
70883 +        roaming start and actual connection.
70884 +
70885 +Event Values
70886 +    None defined
70887 +
70888 +
70889 +=====================================================================
70890 +
70891 +Name
70892 +    ROAM_TBL_EVENT
70893 +
70894 +Synopsis
70895 +    Reports the roam table, which contains the current roam mode and this information
70896 +    for every BSS:
70897 +
70898 +Event ID
70899 +    0x100F
70900 +
70901 +Event Parameters
70902 +    A_UINT8     bssid[ATH_MAC_LEN];
70903 +        BSSID
70904 +    A_UINT8     rssi
70905 +        Averaged RSSI
70906 +    A_UINT8     rssidt
70907 +        Change in RSSI
70908 +    A_UINT8     last_rssi
70909 +        Last recorded RSSI
70910 +    A_UINT8     roam_util
70911 +        Utility value used in roaming decision
70912 +    A_UINT8     util
70913 +        Base utility with the BSS
70914 +    A_UINT8     bias
70915 +        Host configured for this BSS
70916 +
70917 +Event Values
70918 +    roamMode
70919 +        Current roam mode
70920 +
70921 +        = 1
70922 +    RSSI based roam
70923 +
70924 +        = 2
70925 +    Host bias-based roam
70926 +
70927 +        = 3
70928 +    Lock to the current BSS
70929 +
70930 +        = 4
70931 +    Autonomous roaming disabled
70932 +
70933 +
70934 +=====================================================================
70935 +
70936 +Name
70937 +    RSSI_THRESHOLD
70938 +
70939 +Synopsis
70940 +    Alerts the host that the signal strength from the connected AP has crossed a
70941 +    interesting threshold as defined in a previous \93RSSI_THRESHOLD_PARAMS\94
70942 +    command.
70943 +
70944 +Event ID
70945 +    0x100C
70946 +
70947 +Event Parameters
70948 +    UINT8    range
70949 +        A WMI_RSSI_THRESHOLD_VAL
70950 +        value, which indicates the range of
70951 +        the average signal strength
70952 +
70953 +Event Values
70954 +    {
70955 +        WMI_RSSI_LOWTHRESHOLD_BELOW_LOWERVAL  = 1
70956 +        WMI_RSSI_LOWTHRESHOLD_LOWERVAL        = 2
70957 +        WMI_RSSI_LOWTHRESHOLD_UPPERVAL        = 3
70958 +        WMI_RSSI_HIGHTHRESHOLD_LOWERVAL       = 4
70959 +        WMI_RSSI_HIGHTHRESHOLD_HIGHERVAL      = 5
70960 +    } WMI_RSSI_THRESHOLD_VAL
70961 +
70962 +
70963 +=====================================================================
70964 +
70965 +Name
70966 +    SCAN_COMPLETE_EVENT
70967 +
70968 +Synopsis
70969 +    Indicates the scan status. if the Scan was not completed, this event is generated with
70970 +    the status A_ECANCELED.
70971 +
70972 +Event ID
70973 +    0x100A
70974 +
70975 +Event Parameters
70976 +    A_UINT8    scanStatus
70977 +
70978 +Event Values
70979 +    {
70980 +        #define     SCAN_ABORTED 16
70981 +        #define     SCAN_COMPLETED 0
70982 +        A_UINT8     scanStatus
70983 +            A_OK or A_ECANCELED
70984 +    } WMI_SCAN_COMPLETE_EVENT;
70985 +
70986 +
70987 +=====================================================================
70988 +
70989 +Name
70990 +    TEST_EVENT
70991 +
70992 +Synopsis
70993 +    The TCMD application uses a single WMI event (WMI_TEST_EVENTID) to
70994 +    communicate events from target to host. The events are parsed by the TCMD
70995 +    application and WMI layer is oblivious of it.
70996 +
70997 +Event ID
70998 +    0x1016
70999 +
71000 +Event Parameters
71001 +    WMI_TEST_EVENTID
71002 +
71003 +
71004 +Event Values
71005 +    None
71006 +
71007 +
71008 +=====================================================================
71009 +
71010 +
71011 +
71012 +Name
71013 +    TKIP_MICERR
71014 +
71015 +Synopsis
71016 +    Indicates that TKIP MIC errors were detected.
71017 +
71018 +Event ID
71019 +    0x1009
71020 +
71021 +Event Parameters
71022 +    UINT8    keyid
71023 +        Indicates the TKIP key ID
71024 +
71025 +    UINT8    ismcast
71026 +        0 = Unicast
71027 +        1 = Multicast
71028 +
71029 +Event Values
71030 +    See event parameters
71031 +
71032 +=====================================================================
71033 +
71034 +WMI Extension Commands
71035 +
71036 +The WMI EXTENSION command is used to multiplex a collection of
71037 +commands that:
71038 +
71039 +        Are not generic wireless commands
71040 +        May be implementation-specific
71041 +        May be target platform-specific
71042 +        May be optional for a host implementation
71043 +
71044 +    An extension command is sent to the AR6000 targets like any other WMI
71045 +command message and uses the WMI_EXTENSION. The first field of the
71046 +payload for this EXTENSION command is another commandId, sometimes
71047 +called the subcommandId, which indicates which extension command is
71048 +being used. A subcommandId-specific payload follows the subcommandId.
71049 +
71050 +All extensions (subcommandIds) are listed in the header file include/wmix.h.
71051 +See also \93WMI Extension Events\94 on page B-58.
71052 +
71053 +
71054 +WMI Extension Commands
71055 +
71056 +
71057 +GPIO_INPUT_GET
71058 +    Read GPIO pins configured for input
71059 +
71060 +GPIO_INTR_ACK
71061 +    Acknowledge and re-arm GPIO interrupts reported earlier
71062 +
71063 +GPIO_OUTPUT_SET
71064 +    Manage output on GPIO pins configured for output
71065 +
71066 +GPIO_REGISTER_GET
71067 +    Read an arbitrary GPIO register
71068 +
71069 +GPIO_REGISTER_SET
71070 +    Dynamically change GPIO configuration
71071 +
71072 +SET_LQTHRESHOLD
71073 +    Set link quality thresholds; the sampling happens at every unicast
71074 +    data frame Tx, if certain thresholds are met, and corresponding
71075 +    events are sent to the host
71076 +
71077 +
71078 +=====================================================================
71079 +
71080 +Name
71081 +    GPIO_INPUT_GET
71082 +
71083 +Synopsis
71084 +    Allows the host to read GPIO pins that are configured for input. The values read are
71085 +    returned through a \93GPIO_DATA\94 extension event.
71086 +
71087 +NOTE: Support for GPIO is optional.
71088 +
71089 +Command
71090 +    N/A
71091 +
71092 +Command Parameters
71093 +    None
71094 +
71095 +
71096 +
71097 +Reply Parameters
71098 +    None
71099 +
71100 +
71101 +Reset Value
71102 +    None
71103 +
71104 +
71105 +
71106 +Restrictions
71107 +    None
71108 +
71109 +=====================================================================
71110 +
71111 +
71112 +Name
71113 +    GPIO_INTR_ACK
71114 +
71115 +Synopsis
71116 +    The host uses this command to acknowledge and to re-arm GPIO interrupts reported
71117 +    through an earlier \93GPIO_INTR\94 extension event. A single \93GPIO_INTR_ACK\94
71118 +    command should be used to acknowledge all GPIO interrupts that the host knows to
71119 +    be outstanding (if pending interrupts are not acknowledged through
71120 +    \93GPIO_INTR_ACK\94, another \93GPIO_INTR\94 extension event is raised).
71121 +
71122 +NOTE: Support for GPIO is optional.
71123 +
71124 +Command
71125 +    N/A
71126 +
71127 +Command Parameters
71128 +    UINT32    ack_mask
71129 +        A mask of interrupting GPIO pins (e.g., ack_mask
71130 +        bit [3] acknowledges an interrupt from the pin GPIO3).
71131 +
71132 +Command Values
71133 +    None
71134 +
71135 +Reset Value
71136 +    None
71137 +
71138 +Restrictions
71139 +    The host should acknowledge only interrupts about which it was notified.
71140 +
71141 +
71142 +=====================================================================
71143 +
71144 +Name
71145 +    GPIO_OUTPUT_SET
71146 +
71147 +Synopsis
71148 +    Manages output on GPIO pins configured for output.
71149 +
71150 +    Conflicts between set_mask and clear_mask or enable_mask and disable_mask result
71151 +    in undefined behavior.
71152 +
71153 +NOTE: Support for GPIO is optional.
71154 +
71155 +Command
71156 +    N/A
71157 +
71158 +Command Parameters
71159 +    UINT32    set_mask
71160 +        Specifies which pins should drive a 1 out
71161 +    UINT32    clear_mask
71162 +        Specifies which pins should drive a 0 out
71163 +    UINT32    enable_mask
71164 +        Specifies which pins should be enabled for output
71165 +    UINT32    disable_mask
71166 +        Specifies which pins should be disabled for output
71167 +
71168 +Command Values
71169 +    None
71170 +
71171 +
71172 +Reset Value
71173 +    None
71174 +
71175 +
71176 +Restrictions
71177 +    None
71178 +
71179 +
71180 +
71181 +=====================================================================
71182 +
71183 +
71184 +Name
71185 +    GPIO_REGISTER_GET
71186 +
71187 +Synopsis
71188 +    Allows the host to read an arbitrary GPIO register. It is intended for use during
71189 +    bringup/debug. The target responds to this command with a \93GPIO_DATA\94 event.
71190 +
71191 +NOTE: Support for GPIO is optional.
71192 +
71193 +Command
71194 +    N/A
71195 +
71196 +Command Parameters
71197 +    UINT32
71198 +    gpioreg_id
71199 +    Specifies a GPIO register identifier, as defined
71200 +in include/AR6000/AR6000_gpio.h
71201 +
71202 +Reply Parameters
71203 +    None
71204 +
71205 +Reset Value
71206 +    N/A
71207 +
71208 +Restrictions
71209 +    None
71210 +
71211 +
71212 +=====================================================================
71213 +
71214 +Name
71215 +    GPIO_REGISTER_SET
71216 +
71217 +Synopsis
71218 +    Allows the host to dynamically change GPIO configuration (usually handled
71219 +    statically through the GPIO configuration DataSet).
71220 +
71221 +NOTE: Support for GPIO is optional.
71222 +
71223 +Command
71224 +    N/A
71225 +
71226 +Command Parameters
71227 +    UINT32    gpioreg_id
71228 +        Specifies a GPIO register identifier, as defined in
71229 +        include/AR6000/AR6000_gpio.h
71230 +    UINT32    value
71231 +        Specifies a value to write to the specified
71232 +        GPIO register
71233 +
71234 +Command Values
71235 +    None
71236 +
71237 +
71238 +Reset Value
71239 +    Initial hardware configuration is as defined in the AR6001 or AR6002 ROCmTM
71240 +    Single-Chip MAC/BB/Radio for 2.4/5 GHz Embedded WLAN Applications data sheet. This
71241 +    configuration is modified by the GPIO Configuration DataSet, if one exists.
71242 +
71243 +Restrictions
71244 +    None
71245 +
71246 +
71247 +=====================================================================
71248 +
71249 +
71250 +Name
71251 +    SET_LQTHRESHOLD
71252 +
71253 +Synopsis
71254 +    Set link quality thresholds, the sampling happens at every unicast data frame Tx, if
71255 +    certain threshold is met, corresponding event will be sent to host.
71256 +
71257 +Command
71258 +    wmiconfig eth1 --lqThreshold <enable> <upper_threshold_1>...
71259 +    <upper_threshold_4> <lower_threshold_1>... <lower_threshold_4>
71260 +
71261 +Command Parameters
71262 +    A_UINT8   enable;
71263 +    A_UINT8   thresholdAbove1_Val;
71264 +    A_UINT8   thresholdAbove2_Val;
71265 +    A_UINT8   thresholdAbove3_Val;
71266 +    A_UINT8   thresholdAbove4_Val;
71267 +    A_UINT8   thresholdBelow1_Val;
71268 +    A_UINT8   thresholdBelow2_Val;
71269 +    A_UINT8   thresholdBelow3_Val;
71270 +    A_UINT8   thresholdBelow4_Val;
71271 +
71272 +Command Values
71273 +    enable
71274 +    = 0
71275 +    Disable link quality sampling
71276 +
71277 +        = 1
71278 +    Enable link quality sampling
71279 +
71280 +
71281 +    thresholdAbove_Val
71282 +    [1...4]
71283 +    Above thresholds (value in [0,100]), in ascending
71284 +    order threshold
71285 +
71286 +    Below_Val [1...4] = below thresholds (value
71287 +    in [0,100]), in ascending order
71288 +
71289 +Reset Values
71290 +    None
71291 +
71292 +Restrictions
71293 +    None
71294 +
71295 +=====================================================================
71296 +WMI Extension Events
71297 +
71298 +The WMI EXTENSION event is used for a collection of events that:
71299 +
71300 +    Are not generic wireless events
71301 +    May be implementation-specific
71302 +    May be target platform-specific
71303 +    May be optional for a host implementation
71304 +
71305 +    An extension event is sent from the AR6000 device targets to the host just like
71306 +any other WMI event message, using the WMI_EXTENSION_EVENTID. The
71307 +first field of the payload for this \93EXTENSION\94 event is another commandId
71308 +(sometimes called the subcommandId) that indicates which \93EXTENSION\94
71309 +event is being used. A subcommandId-specific payload follows the
71310 +subcommandId.
71311 +
71312 +All extensions (subcommandIds) are listed in the header file include/wmix.h.
71313 +See also \93WMI Extension Commands\94 on page B-55.
71314 +
71315 +
71316 +WMI Extension Events
71317 +
71318 +
71319 +GPIO_ACK
71320 +    Acknowledges a host set command has been processed by the device
71321 +
71322 +GPIO_DATA
71323 +    Response to a host\92s request for data
71324 +
71325 +GPIO_INTR
71326 +    Signals that GPIO interrupts are pending
71327 +
71328 +
71329 +=====================================================================
71330 +
71331 +Name
71332 +    GPIO_ACK
71333 +
71334 +Synopsis
71335 +    Acknowledges that a host set command (either \93GPIO_OUTPUT_SET\94 or
71336 +    \93GPIO_REGISTER_SET\94) has been processed by the AR6000 device.
71337 +
71338 +NOTE: Support for GPIO is optional.
71339 +
71340 +Event ID
71341 +    N/A
71342 +
71343 +Event Parameters
71344 +    None
71345 +
71346 +
71347 +Event Values
71348 +    None
71349 +
71350 +=====================================================================
71351 +
71352 +
71353 +Name
71354 +    GPIO_DATA
71355 +
71356 +Synopsis
71357 +    The AR6000 device uses this event to respond to the host\92s earlier request for data
71358 +    (through either a \93GPIO_REGISTER_GET\94 or a \93GPIO_INPUT_GET\94 command).
71359 +
71360 +NOTE: Support for GPIO is optional.
71361 +
71362 +Event ID
71363 +    N/A
71364 +
71365 +Event Parameters
71366 +    UINT32    value
71367 +        Holds the data of interest, which is either a register value
71368 +        (in the case of \93GPIO_REGISTER_GET\94) or a mask of
71369 +        pin inputs (in the case of \93GPIO_INPUT_GET\94).
71370 +    UINT32    reg_id
71371 +        Indicates which register was read (in the case of
71372 +        \93GPIO_REGISTER_GET\94) or is GPIO_ID_NONE (in the
71373 +        case of \93GPIO_INPUT_GET\94)
71374 +
71375 +Event Values
71376 +    None
71377 +
71378 +
71379 +=====================================================================
71380 +
71381 +
71382 +
71383 +Name
71384 +    GPIO_INTR
71385 +
71386 +Synopsis
71387 +    The AR6000 device raises this event to signal that GPIO interrupts are pending.
71388 +    These GPIOs may be interrupts that occurred after the last \93GPIO_INTR_ACK\94
71389 +    command was issued, or may be GPIO interrupts that the host failed to acknowledge
71390 +    in the last \93GPIO_INTR_ACK\94. The AR6000 will not raise another GPIO_INTR
71391 +    event until this event is acknowledged through a \93GPIO_INTR_ACK\94 command.
71392 +
71393 +NOTE: Support for GPIO is optional.
71394 +
71395 +Event ID
71396 +    N/A
71397 +
71398 +Event Parameters
71399 +    UINT32    intr_mask
71400 +        Indicates which GPIO interrupts are currently pending
71401 +
71402 +    UINT32    input_values
71403 +        A recent copy of the GPIO input values, taken at the
71404 +        time the most recent GPIO interrupt was processed
71405 +
71406 +Event Values
71407 +    None
71408 +
71409 +
71410 +
71411 +=====================================================================
71412 +#endif
71413 Index: linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h
71414 ===================================================================
71415 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71416 +++ linux-2.6.24.7/drivers/sdio/function/wlan/ar6000/wmi/wmi_host.h     2008-12-11 22:46:49.000000000 +0100
71417 @@ -0,0 +1,71 @@
71418 +#ifndef _WMI_HOST_H_
71419 +#define _WMI_HOST_H_
71420 +/*
71421 + * Copyright (c) 2004-2006 Atheros Communications Inc.
71422 + * All rights reserved.
71423 + *
71424 + * This file contains local definitios for the wmi host module.
71425 + *
71426 + * $Id: //depot/sw/releases/olca2.0-GPL/host/wmi/wmi_host.h#1 $
71427 + *
71428 + *
71429 + *  This program is free software; you can redistribute it and/or modify
71430 + *  it under the terms of the GNU General Public License version 2 as
71431 + *  published by the Free Software Foundation;
71432 + *
71433 + *  Software distributed under the License is distributed on an "AS
71434 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
71435 + *  implied. See the License for the specific language governing
71436 + *  rights and limitations under the License.
71437 + *
71438 + *
71439 + *
71440 + */
71441 +
71442 +#ifdef __cplusplus
71443 +extern "C" {
71444 +#endif
71445 +
71446 +struct wmi_stats {
71447 +    A_UINT32    cmd_len_err;
71448 +    A_UINT32    cmd_id_err;
71449 +};
71450 +
71451 +struct wmi_t {
71452 +    A_BOOL                          wmi_ready;
71453 +    A_BOOL                          wmi_numQoSStream;
71454 +    A_UINT8                         wmi_wmiStream2AcMapping[WMI_PRI_MAX_COUNT];
71455 +    WMI_PRI_STREAM_ID               wmi_ac2WmiStreamMapping[WMM_NUM_AC];
71456 +    A_UINT16                        wmi_streamExistsForAC[WMM_NUM_AC];
71457 +    A_UINT8                         wmi_fatPipeExists;
71458 +    void                           *wmi_devt;
71459 +    struct wmi_stats                wmi_stats;
71460 +    struct ieee80211_node_table     wmi_scan_table;
71461 +    A_UINT8                         wmi_bssid[ATH_MAC_LEN];
71462 +    A_UINT8                         wmi_powerMode;
71463 +    A_UINT8                         wmi_phyMode;
71464 +    A_UINT8                         wmi_keepaliveInterval;
71465 +    A_MUTEX_T                       wmi_lock;
71466 +};
71467 +
71468 +#define WMI_INIT_WMISTREAM_AC_MAP(w) \
71469 +{  (w)->wmi_wmiStream2AcMapping[WMI_BEST_EFFORT_PRI] = WMM_AC_BE; \
71470 +   (w)->wmi_wmiStream2AcMapping[WMI_LOW_PRI] = WMM_AC_BK; \
71471 +   (w)->wmi_wmiStream2AcMapping[WMI_HIGH_PRI] = WMM_AC_VI; \
71472 +   (w)->wmi_wmiStream2AcMapping[WMI_HIGHEST_PRI] = WMM_AC_VO; \
71473 +   (w)->wmi_ac2WmiStreamMapping[WMM_AC_BE] = WMI_BEST_EFFORT_PRI; \
71474 +   (w)->wmi_ac2WmiStreamMapping[WMM_AC_BK] = WMI_LOW_PRI; \
71475 +   (w)->wmi_ac2WmiStreamMapping[WMM_AC_VI] = WMI_HIGH_PRI; \
71476 +   (w)->wmi_ac2WmiStreamMapping[WMM_AC_VO] = WMI_HIGHEST_PRI; }
71477 +
71478 +#define WMI_WMISTREAM_ACCESSCATEGORY(w,s)      (w)->wmi_wmiStream2AcMapping[s]
71479 +#define WMI_ACCESSCATEGORY_WMISTREAM(w,ac)       (w)->wmi_ac2WmiStreamMapping[ac]
71480 +
71481 +#define LOCK_WMI(w)     A_MUTEX_LOCK(&(w)->wmi_lock);
71482 +#define UNLOCK_WMI(w)   A_MUTEX_UNLOCK(&(w)->wmi_lock);
71483 +
71484 +#ifdef __cplusplus
71485 +}
71486 +#endif
71487 +
71488 +#endif /* _WMI_HOST_H_ */
71489 Index: linux-2.6.24.7/drivers/sdio/function/wlan/Makefile
71490 ===================================================================
71491 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71492 +++ linux-2.6.24.7/drivers/sdio/function/wlan/Makefile  2008-12-11 22:46:49.000000000 +0100
71493 @@ -0,0 +1,4 @@
71494 +#
71495 +# SDIO wlan ar600 card function driver
71496 +#
71497 +obj-$(CONFIG_SDIO_AR6000_WLAN)          += ar6000/
71498 \ No newline at end of file
71499 Index: linux-2.6.24.7/drivers/sdio/hcd/Kconfig
71500 ===================================================================
71501 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71502 +++ linux-2.6.24.7/drivers/sdio/hcd/Kconfig     2008-12-11 22:46:49.000000000 +0100
71503 @@ -0,0 +1,14 @@
71504 +config SDIO_S3C24XX
71505 +       tristate "Samsung s3c24xx host controller"
71506 +       depends on PLAT_S3C24XX && SDIO
71507 +       default m
71508 +       help
71509 +         good luck.
71510 +
71511 +config SDIO_S3C24XX_DMA
71512 +       bool "Samsung s3c24xx host controller DMA I/O"
71513 +       depends on SDIO_S3C24XX
71514 +       default n
71515 +       help
71516 +         good luck.
71517 +
71518 Index: linux-2.6.24.7/drivers/sdio/hcd/Makefile
71519 ===================================================================
71520 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71521 +++ linux-2.6.24.7/drivers/sdio/hcd/Makefile    2008-12-11 22:46:49.000000000 +0100
71522 @@ -0,0 +1 @@
71523 +obj-$(CONFIG_PLAT_S3C24XX)             += s3c24xx/
71524 Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/Makefile
71525 ===================================================================
71526 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71527 +++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/Makefile    2008-12-11 22:46:49.000000000 +0100
71528 @@ -0,0 +1,2 @@
71529 +obj-$(CONFIG_PLAT_S3C24XX) += sdio_s3c24xx_hcd.o
71530 +sdio_s3c24xx_hcd-objs := s3c24xx_hcd.o
71531 Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.c
71532 ===================================================================
71533 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
71534 +++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.c       2008-12-11 22:46:49.000000000 +0100
71535 @@ -0,0 +1,1567 @@
71536 +/*
71537 + * s3c24xx_hcd.c - Samsung S3C MCI driver, Atheros SDIO API compatible.
71538 + *
71539 + * Copyright (C) 2007 by Openmoko, Inc.
71540 + * Written by Samuel Ortiz <sameo@openedhand.com>
71541 + * All Rights Reserved
71542 + *
71543 + * This program is free software; you can redistribute it and/or modify
71544 + * it under the terms of the GNU General Public License as published by
71545 + * the Free Software Foundation; either version 2 of the License, or
71546 + * (at your option) any later version.
71547 + *
71548 + * This program is distributed in the hope that it will be useful,
71549 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
71550 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
71551 + * GNU General Public License for more details.
71552 + *
71553 + * You should have received a copy of the GNU General Public License along
71554 + * with this program; if not, write to the Free Software Foundation, Inc.,
71555 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
71556 + */
71557 +
71558 +#include <linux/kernel.h>
71559 +#include <linux/interrupt.h>
71560 +#include <linux/list.h>
71561 +#include <linux/dma-mapping.h>
71562 +#include <linux/errno.h>
71563 +#include <linux/platform_device.h>
71564 +#include <linux/device.h>
71565 +#include <linux/clk.h>
71566 +#include <linux/fs.h>
71567 +#include <linux/ioport.h>
71568 +#include <linux/workqueue.h>
71569 +#include <linux/completion.h>
71570 +#include <linux/delay.h>
71571 +#include <linux/seq_file.h>
71572 +#include <linux/debugfs.h>
71573 +
71574 +#include <linux/sdio/ctsystem.h>
71575 +#include <linux/sdio/sdio_busdriver.h>
71576 +#include <linux/sdio/sdio_lib.h>
71577 +
71578 +#include <asm/io.h>
71579 +#include <asm/irq.h>
71580 +#include <asm/uaccess.h>
71581 +#include <asm/dma.h>
71582 +#include <asm/dma-mapping.h>
71583 +
71584 +#include <asm/arch/regs-sdi.h>
71585 +#include <asm/arch/regs-gpio.h>
71586 +#include <asm/arch/mci.h>
71587 +#include <asm/arch/gta02.h>
71588 +
71589 +#include "s3c24xx_hcd.h"
71590 +
71591 +#define DESCRIPTION "S3c24xx SDIO host controller"
71592 +#define AUTHOR "Samuel Ortiz <sameo@openedhand.com>"
71593 +
71594 +#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
71595 +
71596 +static struct s3c2410_dma_client s3c24xx_hcd_dma_client = {
71597 +       .name           = "s3c24xx_hcd",
71598 +};
71599 +
71600 +extern struct platform_device s3c_device_sdi;
71601 +
71602 +static void dump_request(struct s3c24xx_hcd_context * context)
71603 +{
71604 +    if (context->hcd.pCurrentRequest != NULL) {
71605 +        DBG_PRINT(SDDBG_ERROR, ("Current Request Command:%d, ARG:0x%8.8X flags: 0x%04x\n",
71606 +                               context->hcd.pCurrentRequest->Command, context->hcd.pCurrentRequest->Argument,
71607 +                               context->hcd.pCurrentRequest->Flags));
71608 +        if (IS_SDREQ_DATA_TRANS(context->hcd.pCurrentRequest->Flags)) {
71609 +            DBG_PRINT(SDDBG_ERROR, ("Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
71610 +                      IS_SDREQ_WRITE_DATA(context->hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
71611 +                      context->hcd.pCurrentRequest->BlockCount,
71612 +                      context->hcd.pCurrentRequest->BlockLen,
71613 +                      context->hcd.pCurrentRequest->DataRemaining));
71614 +        }
71615 +    }
71616 +}
71617 +
71618 +static void s3c24xx_dump_regs(struct s3c24xx_hcd_context * context)
71619 +{
71620 +       u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
71621 +       u32 datcon, datcnt, datsta, fsta, imask;
71622 +
71623 +       con     = readl(context->base + S3C2410_SDICON);
71624 +       pre     = readl(context->base + S3C2410_SDIPRE);
71625 +       cmdarg  = readl(context->base + S3C2410_SDICMDARG);
71626 +       cmdcon  = readl(context->base + S3C2410_SDICMDCON);
71627 +       cmdsta  = readl(context->base + S3C2410_SDICMDSTAT);
71628 +       r0      = readl(context->base + S3C2410_SDIRSP0);
71629 +       r1      = readl(context->base + S3C2410_SDIRSP1);
71630 +       r2      = readl(context->base + S3C2410_SDIRSP2);
71631 +       r3      = readl(context->base + S3C2410_SDIRSP3);
71632 +       timer   = readl(context->base + S3C2410_SDITIMER);
71633 +       bsize   = readl(context->base + S3C2410_SDIBSIZE);
71634 +       datcon  = readl(context->base + S3C2410_SDIDCON);
71635 +       datcnt  = readl(context->base + S3C2410_SDIDCNT);
71636 +       datsta  = readl(context->base + S3C2410_SDIDSTA);
71637 +       fsta    = readl(context->base + S3C2410_SDIFSTA);
71638 +       imask   = readl(context->base + S3C2440_SDIIMSK);
71639 +
71640 +       printk("SDICON:    0x%08x\n", con);
71641 +       printk("SDIPRE:    0x%08x\n", pre);
71642 +       printk("SDICmdArg: 0x%08x\n", cmdarg);
71643 +       printk("SDICmdCon: 0x%08x\n", cmdcon);
71644 +       printk("SDICmdSta: 0x%08x\n", cmdsta);
71645 +       printk("SDIRSP0:   0x%08x\n", r0);
71646 +       printk("SDIRSP1:   0x%08x\n", r1);
71647 +       printk("SDIRSP2:   0x%08x\n", r2);
71648 +       printk("SDIRSP3:   0x%08x\n", r3);
71649 +       printk("SDIDTimer: 0x%08x\n", timer);
71650 +       printk("SDIBSize:  0x%08x\n", bsize);
71651 +       printk("SDIDatCon: 0x%08x\n", datcon);
71652 +       printk("SDIDatCnt: 0x%08x\n", datcnt);
71653 +       printk("SDIDatSta: 0x%08x\n", datsta);
71654 +       printk("SDIFSta:   0x%08x\n", fsta);
71655 +       printk("SDIIntMsk: 0x%08x\n", imask);
71656 +}
71657 +
71658 +static inline void s3c24xx_hcd_clear_imask(struct s3c24xx_hcd_context * context)
71659 +{
71660 +       if (context->int_sdio) {
71661 +               writel(S3C2410_SDIIMSK_SDIOIRQ | S3C2410_SDIIMSK_READWAIT,
71662 +                      context->base + S3C2440_SDIIMSK);
71663 +       }  else {
71664 +               writel(0, context->base + S3C2440_SDIIMSK);
71665 +       }
71666 +}
71667 +
71668 +static inline void s3c24xx_hcd_set_imask(struct s3c24xx_hcd_context * context)
71669 +{
71670 +       writel(context->int_mask, context->base + S3C2440_SDIIMSK);
71671 +}
71672 +
71673 +
71674 +static inline void s3c24xx_hcd_clear_dsta(struct s3c24xx_hcd_context * context)
71675 +{
71676 +       u32 dsta;
71677 +
71678 +       dsta = readl(context->base + S3C2410_SDIDSTA);
71679 +       writel(dsta, context->base + S3C2410_SDIDSTA);
71680 +}
71681 +
71682 +static inline void s3c24xx_hcd_clear_csta(struct s3c24xx_hcd_context * context)
71683 +{
71684 +       u32 csta, csta_clear = 0;
71685 +
71686 +       csta = readl(context->base + S3C2410_SDICMDSTAT);
71687 +
71688 +       if (csta & S3C2410_SDICMDSTAT_CRCFAIL)
71689 +               csta_clear |= S3C2410_SDICMDSTAT_CRCFAIL;
71690 +       if (csta & S3C2410_SDICMDSTAT_CMDSENT)
71691 +               csta_clear |= S3C2410_SDICMDSTAT_CMDSENT;
71692 +       if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT)
71693 +               csta_clear |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
71694 +       if (csta & S3C2410_SDICMDSTAT_RSPFIN)
71695 +               csta_clear |= S3C2410_SDICMDSTAT_RSPFIN;
71696 +
71697 +       writel(csta_clear, context->base + S3C2410_SDICMDSTAT);
71698 +}
71699 +
71700 +static inline void s3c24xx_hcd_clear_sta(struct s3c24xx_hcd_context * context)
71701 +{
71702 +       u32 csta, dsta, csta_clear = 0, dsta_clear = 0;
71703 +
71704 +       csta = readl(context->base + S3C2410_SDICMDSTAT);
71705 +       dsta = readl(context->base + S3C2410_SDIDSTA);
71706 +
71707 +       if (csta & S3C2410_SDICMDSTAT_CRCFAIL)
71708 +               csta_clear |= S3C2410_SDICMDSTAT_CRCFAIL;
71709 +       if (csta & S3C2410_SDICMDSTAT_CMDSENT)
71710 +               csta_clear |= S3C2410_SDICMDSTAT_CMDSENT;
71711 +       if (csta & S3C2410_SDICMDSTAT_CMDTIMEOUT)
71712 +               csta_clear |= S3C2410_SDICMDSTAT_CMDTIMEOUT;
71713 +       if (csta & S3C2410_SDICMDSTAT_RSPFIN)
71714 +               csta_clear |= S3C2410_SDICMDSTAT_RSPFIN;
71715 +
71716 +
71717 +       if (dsta & S3C2410_SDIDSTA_RDYWAITREQ)
71718 +               dsta_clear |= S3C2410_SDIDSTA_RDYWAITREQ;
71719 +       if (dsta & S3C2410_SDIDSTA_SDIOIRQDETECT)
71720 +               dsta_clear |= S3C2410_SDIDSTA_SDIOIRQDETECT;
71721 +       if (dsta & S3C2410_SDIDSTA_FIFOFAIL)
71722 +               dsta_clear |= S3C2410_SDIDSTA_FIFOFAIL;
71723 +       if (dsta & S3C2410_SDIDSTA_CRCFAIL)
71724 +               dsta_clear |= S3C2410_SDIDSTA_CRCFAIL;
71725 +       if (dsta & S3C2410_SDIDSTA_RXCRCFAIL)
71726 +               dsta_clear |= S3C2410_SDIDSTA_RXCRCFAIL;
71727 +       if (dsta & S3C2410_SDIDSTA_DATATIMEOUT)
71728 +               dsta_clear |= S3C2410_SDIDSTA_DATATIMEOUT;
71729 +       if (dsta & S3C2410_SDIDSTA_XFERFINISH)
71730 +               dsta_clear |= S3C2410_SDIDSTA_XFERFINISH;
71731 +       if (dsta & S3C2410_SDIDSTA_BUSYFINISH)
71732 +               dsta_clear |= S3C2410_SDIDSTA_BUSYFINISH;
71733 +       if (dsta & S3C2410_SDIDSTA_SBITERR)
71734 +               dsta_clear |= S3C2410_SDIDSTA_SBITERR;
71735 +
71736 +       writel(csta_clear, context->base + S3C2410_SDICMDSTAT);
71737 +       writel(dsta_clear, context->base + S3C2410_SDIDSTA);
71738 +}
71739 +
71740 +static inline void s3c24xx_hcd_fifo_reset(struct s3c24xx_hcd_context * context)
71741 +{
71742 +       u32 fsta;
71743 +
71744 +       fsta = readl(context->base + S3C2410_SDIFSTA);
71745 +       fsta |= S3C2440_SDIFSTA_FIFORESET;
71746 +       writel(fsta, context->base + S3C2410_SDIFSTA);
71747 +}
71748 +
71749 +#if 0
71750 +static void s3c24xx_hcd_reset(struct s3c24xx_hcd_context * context)
71751 +{
71752 +       u32 con, counter;
71753 +       unsigned long flags;
71754 +
71755 +       spin_lock_irqsave(&context->lock, flags);
71756 +
71757 +       con = readl(context->base + S3C2410_SDICON);
71758 +
71759 +       con |= S3C2440_SDICON_SDRESET;
71760 +
71761 +       writel(con, context->base + S3C2410_SDICON);
71762 +
71763 +       counter = 1000;
71764 +       while(counter) {
71765 +               con = readl(context->base + S3C2410_SDICON);
71766 +               if (!(con & S3C2440_SDICON_SDRESET))
71767 +                       break;
71768 +               counter--;
71769 +               mdelay(1);
71770 +       }
71771 +
71772 +       spin_unlock_irqrestore(&context->lock, flags);
71773 +}
71774 +#endif
71775 +
71776 +static SDIO_STATUS s3c24xx_hcd_clock_enable(struct s3c24xx_hcd_context * context,
71777 +                                           unsigned int clock_rate,
71778 +                                           unsigned char enable)
71779 +{
71780 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
71781 +       unsigned long flags;
71782 +       u32 con;
71783 +
71784 +       spin_lock_irqsave(&context->lock, flags);
71785 +
71786 +       con = readl(context->base + S3C2410_SDICON);
71787 +
71788 +       if (enable && clock_rate) {
71789 +               con |= S3C2410_SDICON_CLOCKTYPE;
71790 +       } else {
71791 +               con &= ~S3C2410_SDICON_CLOCKTYPE;
71792 +       }
71793 +
71794 +       if (clock_rate) {
71795 +               int prescaler;
71796 +
71797 +               for (prescaler = 0; prescaler < 0xff; prescaler++) {
71798 +                       context->device.actual_clock_rate =
71799 +                               context->device.max_clock_rate / (prescaler + 1);
71800 +
71801 +                       if (context->device.actual_clock_rate <= clock_rate &&
71802 +                           context->device.actual_clock_rate <= context->hcd.MaxClockRate)
71803 +                               break;
71804 +               }
71805 +
71806 +               if (prescaler == 0xff)
71807 +                       DBG_PRINT(SDDBG_ERROR , ("Using lowest clock rate\n"));
71808 +
71809 +               writel(prescaler, context->base + S3C2410_SDIPRE);
71810 +       }
71811 +
71812 +       writel(con, context->base + S3C2410_SDICON);
71813 +
71814 +       spin_unlock_irqrestore(&context->lock, flags);
71815 +
71816 +       return SDIOErrorToOSError(status);
71817 +}
71818 +
71819 +static void s3c24xx_hcd_set_bus_mode(struct s3c24xx_hcd_context *context,
71820 +                                    PSDCONFIG_BUS_MODE_DATA pMode)
71821 +{
71822 +       u32 datacon;
71823 +       unsigned long flags;
71824 +
71825 +       DBG_PRINT(SDDBG_TRACE , ("SetBusMode\n"));
71826 +
71827 +       spin_lock_irqsave(&context->lock, flags);
71828 +       datacon = readl(context->base + S3C2410_SDIDCON);
71829 +
71830 +       switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
71831 +        case SDCONFIG_BUS_WIDTH_1_BIT:
71832 +               context->bus_width = 1;
71833 +               datacon &= S3C2410_SDIDCON_WIDEBUS;
71834 +               break;
71835 +        case SDCONFIG_BUS_WIDTH_4_BIT:
71836 +               context->bus_width = 4;
71837 +               datacon |= S3C2410_SDIDCON_WIDEBUS;
71838 +               break;
71839 +        default:
71840 +               DBG_PRINT(SDDBG_TRACE , ("Unknown bus width: %d\n", SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)));
71841 +               break;
71842 +       }
71843 +
71844 +       writel(datacon, context->base + S3C2410_SDIDCON);
71845 +       spin_unlock_irqrestore(&context->lock, flags);
71846 +
71847 +       /* Set clock rate and enable clock */
71848 +       s3c24xx_hcd_clock_enable(context, pMode->ClockRate, 1);
71849 +       pMode->ActualClockRate = context->device.actual_clock_rate;
71850 +
71851 +       DBG_PRINT(SDDBG_TRACE , ("BUS mode: %d bits wide, actual clock rate: %d kHz (requested %d kHz)\n",
71852 +                                context->bus_width, pMode->ActualClockRate / 1000, pMode->ClockRate / 1000));
71853 +}
71854 +
71855 +
71856 +static void s3c24xx_hcd_dma_complete(struct s3c24xx_hcd_context * context)
71857 +{
71858 +       u32 dsta, counter, i;
71859 +       PSDREQUEST req;
71860 +       SDIO_STATUS status = SDIO_STATUS_ERROR;
71861 +
71862 +       req = GET_CURRENT_REQUEST(&context->hcd);
71863 +       if (req == NULL) {
71864 +               DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
71865 +               return;
71866 +       }
71867 +
71868 +       if (context->complete == S3C24XX_HCD_DATA_READ) {
71869 +               /* DMA READ completion */
71870 +               if (context->latest_xfer_size != req->DataRemaining) {
71871 +                       DBG_PRINT(SDDBG_ERROR, ("Unexpected read xfer size: %d <-> %d\n",
71872 +                                               context->latest_xfer_size, req->DataRemaining));
71873 +                       status = SDIO_STATUS_BUS_WRITE_ERROR;
71874 +               }
71875 +
71876 +               counter = 0;
71877 +               dsta = readl(context->base + S3C2410_SDIDSTA);
71878 +               while (!(dsta & S3C2410_SDIDSTA_XFERFINISH)) {
71879 +                       if (counter > 500) {
71880 +                               printk("read xfer timed out\n");
71881 +                               s3c24xx_dump_regs(context);
71882 +                               memcpy(req->pDataBuffer, context->io_buffer,
71883 +                                      req->BlockCount * req->BlockLen);
71884 +                               printk("Transfer: %dx%d\n", req->BlockCount, req->BlockLen);
71885 +                               for (i = 0; i < req->DataRemaining; i++)
71886 +                                       printk("0x%x ", *(((char *)context->io_buffer) + i));
71887 +                               printk("\n");
71888 +                               status = SDIO_STATUS_BUS_READ_TIMEOUT;
71889 +                               goto out;
71890 +                       }
71891 +                       dsta = readl(context->base + S3C2410_SDIDSTA);
71892 +                       counter++;
71893 +                       mdelay(1);
71894 +               };
71895 +
71896 +               dma_sync_single(NULL, context->io_buffer_dma,
71897 +                               req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
71898 +
71899 +               writel(S3C2410_SDIDSTA_XFERFINISH, context->base + S3C2410_SDIDSTA);
71900 +
71901 +               memcpy(req->pDataBuffer, context->io_buffer,
71902 +                      req->BlockCount * req->BlockLen);
71903 +
71904 +               req->DataRemaining = 0;
71905 +               status = SDIO_STATUS_SUCCESS;
71906 +
71907 +       } else if (context->complete == S3C24XX_HCD_DATA_WRITE) {
71908 +               /* DMA WRITE completion */
71909 +               if (context->latest_xfer_size != req->DataRemaining) {
71910 +                       DBG_PRINT(SDDBG_ERROR, ("Unexpected write xfer size: %d <-> %d\n",
71911 +                                               context->latest_xfer_size, req->DataRemaining));
71912 +                       status = SDIO_STATUS_BUS_WRITE_ERROR;
71913 +               }
71914 +
71915 +               dsta = readl(context->base + S3C2410_SDIDSTA);
71916 +               counter = 0;
71917 +               while (!(dsta & S3C2410_SDIDSTA_XFERFINISH)) {
71918 +                       if (counter > 500) {
71919 +                               printk("write xfer timed out\n");
71920 +                               status = SDIO_STATUS_BUS_WRITE_ERROR;
71921 +                               goto out;
71922 +                       }
71923 +                       dsta = readl(context->base + S3C2410_SDIDSTA);
71924 +                       counter++;
71925 +                       mdelay(1);
71926 +               };
71927 +
71928 +               writel(S3C2410_SDIDSTA_XFERFINISH, context->base + S3C2410_SDIDSTA);
71929 +               req->DataRemaining = 0;
71930 +               status = SDIO_STATUS_SUCCESS;
71931 +       }
71932 +
71933 + out:
71934 +       req->Status = status;
71935 +}
71936 +
71937 +static void s3c24xx_hcd_pio_complete(struct s3c24xx_hcd_context * context)
71938 +{
71939 +       u32 fsta, counter;
71940 +       u8 *ptr;
71941 +       int fifo_count;
71942 +       PSDREQUEST req;
71943 +       SDIO_STATUS status = SDIO_STATUS_ERROR;
71944 +
71945 +       req = GET_CURRENT_REQUEST(&context->hcd);
71946 +       if (req == NULL) {
71947 +               DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
71948 +               return;
71949 +       }
71950 +
71951 +       ptr = req->pDataBuffer;
71952 +
71953 +       if (context->complete == S3C24XX_HCD_DATA_READ) {
71954 +               counter = 0;
71955 +               DBG_PRINT(SDDBG_TRACE, ("Data read..."));
71956 +               do {
71957 +                       counter++;
71958 +                       fsta = readl(context->base + S3C2410_SDIFSTA);
71959 +                       mdelay(1);
71960 +                       if (counter > 1000) {
71961 +                               DBG_PRINT(SDDBG_ERROR, ("DATA read timeout\n"));
71962 +                               status = SDIO_STATUS_BUS_READ_TIMEOUT;
71963 +                               s3c24xx_dump_regs(context);
71964 +                               goto out;
71965 +                       }
71966 +               } while(!(fsta & S3C2410_SDIFSTA_RFDET));
71967 +               DBG_PRINT(SDDBG_TRACE, ("RX detected\n"));
71968 +
71969 +               while (1) {
71970 +                       counter = 0;
71971 +                       fifo_count = (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
71972 +                       while (!fifo_count) {
71973 +                               counter++;
71974 +                               mdelay(1);
71975 +                               if (counter > 500) {
71976 +                                       s3c24xx_dump_regs(context);
71977 +                                       DBG_PRINT(SDDBG_ERROR, ("No more bytes in FIFO\n"));
71978 +                                       goto out;
71979 +                               }
71980 +                               fifo_count = (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
71981 +                       }
71982 +
71983 +                       if (fifo_count > req->DataRemaining) {
71984 +                               DBG_PRINT(SDDBG_ERROR, ("DATA read, fifo_count %d > expected %d\n", fifo_count, req->DataRemaining));
71985 +                               fifo_count = req->DataRemaining;
71986 +                       }
71987 +
71988 +                       req->DataRemaining -= fifo_count;
71989 +                       while (fifo_count > 0) {
71990 +                               if (context->data_size == 4)
71991 +                                       *(ptr) = readl(context->base + S3C2440_SDIDATA);
71992 +                               else if (context->data_size == 2)
71993 +                                       *(ptr) = readw(context->base + S3C2440_SDIDATA);
71994 +                               else
71995 +                                       *(ptr) = readb(context->base + S3C2440_SDIDATA);
71996 +
71997 +                               ptr += context->data_size;
71998 +                               fifo_count -= context->data_size;
71999 +
72000 +                       }
72001 +
72002 +                       if (!req->DataRemaining) {
72003 +                               /* We poll for xfer finish */
72004 +                               counter = 0;
72005 +                               while (!(readl(context->base + S3C2410_SDIDSTA)
72006 +                                                & S3C2410_SDIDSTA_XFERFINISH)) {
72007 +                                       counter++;
72008 +                                       mdelay(1);
72009 +                                       if (counter > 500) {
72010 +                                               DBG_PRINT(SDDBG_ERROR, ("RX XFERFINISH missing\n"));
72011 +                                               s3c24xx_dump_regs(context);
72012 +                                               break;
72013 +                                       }
72014 +                               }
72015 +
72016 +                               status = SDIO_STATUS_SUCCESS;
72017 +                               goto out;
72018 +                       }
72019 +               }
72020 +
72021 +       } else if (context->complete == S3C24XX_HCD_DATA_WRITE) {
72022 +               counter = 0;
72023 +               DBG_PRINT(SDDBG_TRACE, ("Data write..."));
72024 +               do {
72025 +                       counter++;
72026 +                       fsta = readl(context->base + S3C2410_SDIFSTA);
72027 +                       mdelay(1);
72028 +                       if (counter > 1000) {
72029 +                               DBG_PRINT(SDDBG_ERROR, ("DATA write timeout\n"));
72030 +                               status = SDIO_STATUS_BUS_WRITE_ERROR;
72031 +                               goto out;
72032 +                               break;
72033 +                       }
72034 +
72035 +               } while(!(fsta & S3C2410_SDIFSTA_TFDET));
72036 +               DBG_PRINT(SDDBG_TRACE, ("TX detected\n"));
72037 +
72038 +               while (1) {
72039 +                       counter = 0;
72040 +                       fifo_count = 63 - (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
72041 +                       while (!fifo_count) {
72042 +                               counter++;
72043 +                               mdelay(1);
72044 +                               if (counter > 500) {
72045 +                                       s3c24xx_dump_regs(context);
72046 +                                       DBG_PRINT(SDDBG_ERROR, ("No more space in FIFO\n"));
72047 +                                       goto out;
72048 +                               }
72049 +                               fifo_count = 63 - (readl(context->base + S3C2410_SDIFSTA) & S3C2410_SDIFSTA_COUNTMASK);
72050 +                       }
72051 +
72052 +                       if (fifo_count > req->DataRemaining)
72053 +                               fifo_count = req->DataRemaining;
72054 +
72055 +                               req->DataRemaining -= fifo_count;
72056 +
72057 +                               while (fifo_count > 0) {
72058 +                                       if (context->data_size == 4)
72059 +                                               writel(*(ptr), context->base + S3C2440_SDIDATA);
72060 +                                       else if (context->data_size == 2)
72061 +                                               writew(*(ptr), context->base + S3C2440_SDIDATA);
72062 +                                       else
72063 +                                               writeb(*(ptr), context->base + S3C2440_SDIDATA);
72064 +
72065 +                                       ptr += context->data_size;
72066 +                                       fifo_count -= context->data_size;
72067 +                               }
72068 +
72069 +                               if (!req->DataRemaining) {
72070 +                                       /* We poll for xfer finish */
72071 +                                       counter = 0;
72072 +                                       while (!(readl(context->base + S3C2410_SDIDSTA)
72073 +                                                & S3C2410_SDIDSTA_XFERFINISH)) {
72074 +                                               counter++;
72075 +                                               mdelay(1);
72076 +                                               if (counter > 500) {
72077 +                                                       DBG_PRINT(SDDBG_ERROR, ("RX XFERFINISH missing\n"));
72078 +                                                       s3c24xx_dump_regs(context);
72079 +                                                       break;
72080 +                                               }
72081 +                                       }
72082 +
72083 +                                       status = SDIO_STATUS_SUCCESS;
72084 +                                       goto out;
72085 +                               }
72086 +               }
72087 +
72088 +       } else {
72089 +               DBG_PRINT(SDDBG_ERROR, ("Wrong context: %d\n", context->complete));
72090 +       }
72091 +
72092 + out:
72093 +       req->Status = status;
72094 +}
72095 +
72096 +static void s3c24xx_hcd_io_work(struct work_struct *work)
72097 +{
72098 +       PSDREQUEST req;
72099 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72100 +       struct s3c24xx_hcd_context * context =
72101 +               container_of(work, struct s3c24xx_hcd_context, io_work);
72102 +
72103 +       req = GET_CURRENT_REQUEST(&context->hcd);
72104 +       if (req == NULL) {
72105 +               DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
72106 +               return;
72107 +       }
72108 +
72109 +       if (req->Status == SDIO_STATUS_BUS_RESP_TIMEOUT) {
72110 +               DBG_PRINT(SDDBG_ERROR, ("### TIMEOUT ###\n"));
72111 +               s3c24xx_dump_regs(context);
72112 +               goto out;
72113 +       }
72114 +
72115 +       if (context->complete == S3C24XX_HCD_NO_RESPONSE &&
72116 +           req->Status == SDIO_STATUS_SUCCESS) {
72117 +               DBG_PRINT(SDDBG_TRACE, ("CMD done, Status: %d\n", req->Status));
72118 +               printk("CMD done, Status: %d\n", req->Status);
72119 +               goto out;
72120 +       }
72121 +
72122 +       if ((context->complete == S3C24XX_HCD_RESPONSE_SHORT ||
72123 +            context->complete == S3C24XX_HCD_RESPONSE_LONG ||
72124 +            context->complete == S3C24XX_HCD_DATA_READ ||
72125 +            context->complete == S3C24XX_HCD_DATA_WRITE) &&
72126 +           req->Status == SDIO_STATUS_SUCCESS) {
72127 +               u32 resp[4];
72128 +
72129 +               /* We need to copy the response data and send it over */
72130 +               resp[0] = readl(context->base + S3C2410_SDIRSP0);
72131 +               resp[1] = readl(context->base + S3C2410_SDIRSP1);
72132 +               resp[2] = readl(context->base + S3C2410_SDIRSP2);
72133 +               resp[3] = readl(context->base + S3C2410_SDIRSP3);
72134 +
72135 +               if (GET_SDREQ_RESP_TYPE(req->Flags) != SDREQ_FLAGS_RESP_R2) {
72136 +                       DBG_PRINT(SDDBG_TRACE, ("SHORT response: 0x%08x\n", resp[0]));
72137 +                       memcpy(&req->Response[1], (u8*)resp, 4);
72138 +                       req->Response[5] = (readl(context->base + S3C2410_SDICMDSTAT) & 0xff);
72139 +               } else {
72140 +                       printk("LONG response: 0x%08x\n", resp[0]);
72141 +                       DBG_PRINT(SDDBG_TRACE, ("LONG response: 0x%08x\n", resp[0]));
72142 +                       memcpy(&req->Response[1], (u8*)resp, 16);
72143 +                       //req->Response[17] = (readl(context->base + S3C2410_SDICMDSTAT) & 0xff);
72144 +               }
72145 +
72146 +               /* There is a data stage */
72147 +               if (context->complete == S3C24XX_HCD_DATA_READ ||
72148 +                   context->complete == S3C24XX_HCD_DATA_WRITE) {
72149 +                       status = SDIO_CheckResponse(&context->hcd, req,
72150 +                                                   SDHCD_CHECK_DATA_TRANS_OK);
72151 +
72152 +                       if (!SDIO_SUCCESS(status)) {
72153 +                               DBG_PRINT(SDDBG_ERROR,
72154 +                                         ("Target not ready for data xfer\n"));
72155 +                               return;
72156 +                       }
72157 +
72158 +                       if (context->dma_en) {
72159 +                               dma_sync_single(NULL, context->io_buffer_dma,
72160 +                                               req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
72161 +
72162 +                               s3c2410_dma_ctrl(context->dma_channel, S3C2410_DMAOP_START);
72163 +
72164 +                               wait_for_completion(&context->dma_complete);
72165 +
72166 +                               s3c24xx_hcd_dma_complete(context);
72167 +                       } else {
72168 +                               s3c24xx_hcd_pio_complete(context);
72169 +                       }
72170 +               }
72171 +       }
72172 +
72173 + out:
72174 +       s3c24xx_hcd_clear_sta(context);
72175 +       s3c24xx_hcd_clear_imask(context);
72176 +
72177 +       writel(0, context->base + S3C2410_SDICMDARG);
72178 +       writel(0, context->base + S3C2410_SDICMDCON);
72179 +
72180 +       SDIO_HandleHcdEvent(&context->hcd, EVENT_HCD_TRANSFER_DONE);
72181 +}
72182 +
72183 +static void s3c24xx_hcd_irq_work(struct work_struct *work)
72184 +{
72185 +       struct s3c24xx_hcd_context * context =
72186 +               container_of(work, struct s3c24xx_hcd_context, irq_work);
72187 +
72188 +       disable_irq(context->io_irq);
72189 +
72190 +       writel(S3C2410_SDIDSTA_SDIOIRQDETECT, context->base + S3C2410_SDIDSTA);
72191 +
72192 +       SDIO_HandleHcdEvent(&context->hcd, EVENT_HCD_SDIO_IRQ_PENDING);
72193 +
72194 +       enable_irq(context->io_irq);
72195 +}
72196 +
72197 +void s3c24xx_hcd_dma_done(struct s3c2410_dma_chan *dma_ch, void *buf_id,
72198 +                         int size, enum s3c2410_dma_buffresult result)
72199 +{
72200 +       struct s3c24xx_hcd_context * context =
72201 +               (struct s3c24xx_hcd_context *) buf_id;
72202 +
72203 +       if (result != S3C2410_RES_OK) {
72204 +               DBG_PRINT(SDDBG_ERROR, ("%s(): DMA xfer failed: %d\n", __FUNCTION__, result));
72205 +               s3c24xx_dump_regs(context);
72206 +       }
72207 +
72208 +       context->latest_xfer_size = size;
72209 +       complete(&context->dma_complete);
72210 +}
72211 +
72212 +static int s3c24xx_hcd_prepare_dma(struct s3c24xx_hcd_context * context)
72213 +{
72214 +       PSDREQUEST req;
72215 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72216 +       int read = 0, hwcfg = S3C2410_DISRCC_INC | S3C2410_DISRCC_APB;
72217 +       enum s3c2410_dmasrc source = S3C2410_DMASRC_MEM;
72218 +
72219 +       req = GET_CURRENT_REQUEST(&context->hcd);
72220 +       if (req == NULL) {
72221 +               DBG_PRINT(SDDBG_ERROR, ("%s(): No current request\n", __FUNCTION__));
72222 +               status = SDIO_STATUS_ERROR;
72223 +       }
72224 +
72225 +       if (!context->dma_en) {
72226 +               DBG_PRINT(SDDBG_ERROR, ("%s(): DMA is disabled\n", __FUNCTION__));
72227 +               status = SDIO_STATUS_ERROR;
72228 +       }
72229 +
72230 +       if (!IS_SDREQ_DATA_TRANS(req->Flags)) {
72231 +               DBG_PRINT(SDDBG_ERROR, ("%s(): No data to transfer\n", __FUNCTION__));
72232 +               status = SDIO_STATUS_ERROR;
72233 +       }
72234 +
72235 +       if(!IS_SDREQ_WRITE_DATA(req->Flags)) {
72236 +               read = 1;
72237 +               source = S3C2410_DMASRC_HW;
72238 +               hwcfg = S3C2410_DISRCC_APB | 1;
72239 +       } else {
72240 +               memcpy(context->io_buffer, req->pDataBuffer, req->DataRemaining);
72241 +               dma_sync_single(NULL, context->io_buffer_dma,
72242 +                               req->BlockCount * req->BlockLen, DMA_BIDIRECTIONAL);
72243 +
72244 +       }
72245 +
72246 +       s3c2410_dma_devconfig(context->dma_channel, source, hwcfg,
72247 +                             (unsigned long)context->mem->start + S3C2440_SDIDATA);
72248 +
72249 +       s3c2410_dma_config(context->dma_channel, context->data_size,
72250 +                          S3C2410_DCON_CH0_SDI);
72251 +                          //(S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
72252 +
72253 +       s3c2410_dma_set_buffdone_fn(context->dma_channel, s3c24xx_hcd_dma_done);
72254 +
72255 +//     s3c2410_dma_setflags(context->dma_channel, S3C2410_DMAF_AUTOSTART);
72256 +
72257 +       s3c2410_dma_ctrl(context->dma_channel, S3C2410_DMAOP_FLUSH);
72258 +
72259 +       s3c2410_dma_enqueue(context->dma_channel, context,
72260 +                           context->io_buffer_dma,
72261 +                           req->DataRemaining);
72262 +
72263 +       return 0;
72264 +}
72265 +
72266 +
72267 +static irqreturn_t s3c24xx_hcd_irq(int irq, void *dev_id)
72268 +{
72269 +       u32 cmdsta, dsta, fsta;
72270 +       unsigned long flags, trace = 0;
72271 +       PSDREQUEST req;
72272 +       struct s3c24xx_hcd_context * context =
72273 +               (struct s3c24xx_hcd_context *)dev_id;
72274 +
72275 +       spin_lock_irqsave(&context->lock, flags);
72276 +
72277 +       s3c24xx_hcd_clear_imask(context);
72278 +
72279 +       cmdsta = readl(context->base + S3C2410_SDICMDSTAT);
72280 +       dsta = readl(context->base + S3C2410_SDIDSTA);
72281 +       fsta = readl(context->base + S3C2410_SDIFSTA);
72282 +
72283 +       context->cmdsta = cmdsta;
72284 +       context->dsta = dsta;
72285 +       context->fsta = fsta;
72286 +
72287 +       s3c24xx_hcd_clear_csta(context);
72288 +
72289 +       if (dsta & S3C2410_SDIDSTA_SDIOIRQDETECT) {
72290 +               writel(S3C2410_SDIDSTA_SDIOIRQDETECT, context->base + S3C2410_SDIDSTA);
72291 +
72292 +               if (context->int_sdio) {
72293 +                       u32 imask;
72294 +
72295 +                       context->int_sdio = 0;
72296 +
72297 +                       imask = readl(context->base + S3C2440_SDIIMSK);
72298 +                       imask &= ~S3C2410_SDIIMSK_SDIOIRQ;
72299 +                       writel(imask, context->base + S3C2440_SDIIMSK);
72300 +                       schedule_work(&context->irq_work);
72301 +               }
72302 +       }
72303 +
72304 +       req = GET_CURRENT_REQUEST(&context->hcd);
72305 +       if (req == NULL) {
72306 +               DBG_PRINT(SDDBG_TRACE, ("%s(): No current request\n", __FUNCTION__));
72307 +               goto out;
72308 +       }
72309 +
72310 +       if (cmdsta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
72311 +               DBG_PRINT(SDDBG_ERROR, ("TIMEOUT\n"));
72312 +               printk("TIMEOUT\n");
72313 +               req->Status = SDIO_STATUS_BUS_RESP_TIMEOUT;
72314 +               writel(S3C2410_SDICMDSTAT_CMDTIMEOUT, context->base + S3C2410_SDICMDSTAT);
72315 +               schedule_work(&context->io_work);
72316 +       }
72317 +
72318 +       if (cmdsta & S3C2410_SDICMDSTAT_CRCFAIL) {
72319 +               DBG_PRINT(SDDBG_ERROR, ("CRCFAIL 0x%x\n", cmdsta));
72320 +               printk("CRCFAIL 0x%x\n", cmdsta);
72321 +               req->Status = SDIO_STATUS_BUS_RESP_CRC_ERR;
72322 +               dump_request(context);
72323 +               writel(S3C2410_SDICMDSTAT_CRCFAIL, context->base + S3C2410_SDICMDSTAT);
72324 +               schedule_work(&context->io_work);
72325 +       }
72326 +
72327 +
72328 +       if (cmdsta & S3C2410_SDICMDSTAT_CMDSENT) {
72329 +               writel(S3C2410_SDICMDSTAT_CMDSENT, context->base + S3C2410_SDICMDSTAT);
72330 +
72331 +               if (context->complete == S3C24XX_HCD_NO_RESPONSE) {
72332 +                       req->Status = SDIO_STATUS_SUCCESS;
72333 +                       trace = 1;
72334 +                       schedule_work(&context->io_work);
72335 +               }
72336 +       }
72337 +
72338 +       if (cmdsta & S3C2410_SDICMDSTAT_RSPFIN ||
72339 +           (IS_SDREQ_WRITE_DATA(req->Flags) && (fsta &  S3C2410_SDIFSTA_TFDET)) ||
72340 +           (!IS_SDREQ_WRITE_DATA(req->Flags) && (fsta &  S3C2410_SDIFSTA_RFDET))) {
72341 +
72342 +               writel(S3C2410_SDICMDSTAT_RSPFIN, context->base + S3C2410_SDICMDSTAT);
72343 +
72344 +               if (context->complete == S3C24XX_HCD_RESPONSE_SHORT ||
72345 +                   context->complete == S3C24XX_HCD_RESPONSE_LONG ||
72346 +                   context->complete == S3C24XX_HCD_DATA_READ ||
72347 +                   context->complete == S3C24XX_HCD_DATA_WRITE) {
72348 +                       req->Status = SDIO_STATUS_SUCCESS;
72349 +                       if (trace)
72350 +                               printk("IO work already scheduled, cmdsta: 0x%x\n", cmdsta);
72351 +                       schedule_work(&context->io_work);
72352 +               }
72353 +       }
72354 +
72355 + out:
72356 +       if (dsta & S3C2410_SDIDSTA_RDYWAITREQ) {
72357 +               printk("S3C2410_SDIDSTA_RDYWAITREQ\n");
72358 +               //writel(S3C2410_SDIDSTA_RDYWAITREQ, context->base + S3C2410_SDIDSTA);
72359 +       }
72360 +
72361 +       if (dsta & S3C2410_SDIDSTA_FIFOFAIL) {
72362 +               printk("S3C2410_SDIDSTA_FIFOFAIL\n");
72363 +               writel(S3C2410_SDIDSTA_FIFOFAIL, context->base + S3C2410_SDIDSTA);
72364 +       }
72365 +
72366 +       if (dsta & S3C2410_SDIDSTA_CRCFAIL) {
72367 +               printk("S3C2410_SDIDSTA_CRCFAIL\n");
72368 +               writel(S3C2410_SDIDSTA_CRCFAIL, context->base + S3C2410_SDIDSTA);
72369 +       }
72370 +
72371 +       if (dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
72372 +               printk("S3C2410_SDIDSTA_RXCRCFAIL\n");
72373 +               writel(S3C2410_SDIDSTA_RXCRCFAIL, context->base + S3C2410_SDIDSTA);
72374 +       }
72375 +
72376 +       if (dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
72377 +               printk("S3C2410_SDIDSTA_DATATIMEOUT\n");
72378 +               writel(S3C2410_SDIDSTA_DATATIMEOUT, context->base + S3C2410_SDIDSTA);
72379 +       }
72380 +
72381 +       if (dsta & S3C2410_SDIDSTA_BUSYFINISH) {
72382 +               printk("S3C2410_SDIDSTA_BUSYFINISH\n");
72383 +               writel(S3C2410_SDIDSTA_BUSYFINISH, context->base + S3C2410_SDIDSTA);
72384 +       }
72385 +
72386 +       if (dsta & S3C2410_SDIDSTA_SBITERR) {
72387 +               printk("S3C2410_SDIDSTA_SBIERR\n");
72388 +               writel(S3C2410_SDIDSTA_SBITERR, context->base + S3C2410_SDIDSTA);
72389 +       }
72390 +
72391 +       spin_unlock_irqrestore(&context->lock, flags);
72392 +       return IRQ_HANDLED;
72393 +}
72394 +
72395 +
72396 +SDIO_STATUS s3c24xx_hcd_config(PSDHCD hcd, PSDCONFIG config)
72397 +{
72398 +       u32 con, imsk;
72399 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72400 +       PSDCONFIG_SDIO_INT_CTRL_DATA int_data;
72401 +       struct s3c24xx_hcd_context * context = (struct s3c24xx_hcd_context *)hcd->pContext;
72402 +
72403 +       switch (GET_SDCONFIG_CMD(config)){
72404 +       case SDCONFIG_GET_WP:
72405 +               DBG_PRINT(SDDBG_TRACE, ("config GET_WP\n"));
72406 +               *((SDCONFIG_WP_VALUE *)config->pData) = 0;
72407 +               status = SDIO_STATUS_SUCCESS;
72408 +               break;
72409 +       case SDCONFIG_SEND_INIT_CLOCKS:
72410 +               DBG_PRINT(SDDBG_TRACE, ("config SEND_INIT_CLOCKS\n"));
72411 +
72412 +               /* We stop/start the clock */
72413 +               con = readl(context->base + S3C2410_SDICON);
72414 +
72415 +               con &= ~S3C2410_SDICON_CLOCKTYPE;
72416 +               writel(con, context->base + S3C2410_SDICON);
72417 +
72418 +               mdelay(100);
72419 +
72420 +               con |= S3C2410_SDICON_CLOCKTYPE;
72421 +               writel(con, context->base + S3C2410_SDICON);
72422 +
72423 +               mdelay(100);
72424 +
72425 +               status = SDIO_STATUS_SUCCESS;
72426 +               break;
72427 +        case SDCONFIG_SDIO_INT_CTRL:
72428 +               DBG_PRINT(SDDBG_TRACE, ("config SDIO_INT_CTRL\n"));
72429 +               int_data =  GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA, config);
72430 +
72431 +               if (int_data->SlotIRQEnable &
72432 +                   (IRQ_DETECT_1_BIT | IRQ_DETECT_4_BIT | IRQ_DETECT_MULTI_BLK) ) {
72433 +                       imsk = readl(context->base + S3C2440_SDIIMSK);
72434 +
72435 +                       if (int_data->SlotIRQEnable) {
72436 +                               printk("SDIO_INT_CTRL enable IRQ\n");
72437 +                               DBG_PRINT(SDDBG_TRACE, ("SDIO_INT_CTRL enable IRQ\n"));
72438 +                               context->int_sdio = 1;
72439 +                               imsk |= S3C2410_SDIIMSK_SDIOIRQ;
72440 +                               writel(imsk, context->base + S3C2440_SDIIMSK);
72441 +                       } else {
72442 +                               printk("SDIO_INT_CTRL disable IRQ\n");
72443 +                               DBG_PRINT(SDDBG_TRACE, ("SDIO_INT_CTRL disable IRQ\n"));
72444 +                               context->int_sdio = 0;
72445 +                               imsk &= ~S3C2410_SDIIMSK_SDIOIRQ;
72446 +                               writel(imsk, context->base + S3C2440_SDIIMSK);
72447 +                       }
72448 +               }
72449 +               status = SDIO_STATUS_SUCCESS;
72450 +               break;
72451 +        case SDCONFIG_SDIO_REARM_INT:
72452 +               DBG_PRINT(SDDBG_TRACE, ("config SDIO_REARM_INT\n"));
72453 +
72454 +               context->int_sdio = 1;
72455 +               imsk = readl(context->base + S3C2440_SDIIMSK);
72456 +               imsk |= S3C2410_SDIIMSK_SDIOIRQ;
72457 +               writel(imsk, context->base + S3C2440_SDIIMSK);
72458 +
72459 +               status = SDIO_STATUS_SUCCESS;
72460 +               break;
72461 +       case SDCONFIG_FUNC_CHANGE_BUS_MODE:
72462 +        case SDCONFIG_BUS_MODE_CTRL:
72463 +               s3c24xx_hcd_set_bus_mode(context, (PSDCONFIG_BUS_MODE_DATA)(config->pData));
72464 +               DBG_PRINT(SDDBG_TRACE, ("config BUS_MODE_CTRL\n"));
72465 +               status = SDIO_STATUS_SUCCESS;
72466 +               break;
72467 +        case SDCONFIG_POWER_CTRL:
72468 +               DBG_PRINT(SDDBG_TRACE, ("config POWER_CTRL\n"));
72469 +               status = SDIO_STATUS_SUCCESS;
72470 +               break;
72471 +        case SDCONFIG_GET_HCD_DEBUG:
72472 +               DBG_PRINT(SDDBG_TRACE, ("config GET_HCD_DEBUG\n"));
72473 +               status = SDIO_STATUS_SUCCESS;
72474 +               break;
72475 +        case SDCONFIG_SET_HCD_DEBUG:
72476 +               DBG_PRINT(SDDBG_TRACE, ("config SET_HCD_DEBUG\n"));
72477 +               status = SDIO_STATUS_SUCCESS;
72478 +               break;
72479 +       default:
72480 +               /* invalid request */
72481 +               DBG_PRINT(SDDBG_ERROR, ("%s() - unsupported command: 0x%X\n",
72482 +                                      __FUNCTION__, GET_SDCONFIG_CMD(config)));
72483 +               status = SDIO_STATUS_INVALID_PARAMETER;
72484 +       }
72485 +
72486 +       return SDIOErrorToOSError(status);
72487 +}
72488 +
72489 +
72490 +SDIO_STATUS s3c24xx_hcd_request(PSDHCD hcd)
72491 +{
72492 +       SDIO_STATUS status = SDIO_STATUS_PENDING;
72493 +       PSDREQUEST req;
72494 +       u32 cmdcon, imask;
72495 +       unsigned long flags;
72496 +       struct s3c24xx_hcd_context * context =
72497 +               (struct s3c24xx_hcd_context *)hcd->pContext;
72498 +
72499 +       req = GET_CURRENT_REQUEST(hcd);
72500 +       DBG_ASSERT(req != NULL);
72501 +
72502 +       if (req->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER)
72503 +               printk("### SHORT TRANSFER ###\n");
72504 +
72505 +       spin_lock_irqsave(&context->lock, flags);
72506 +
72507 +       /* Clear command, data and fifo status registers */
72508 +       writel(0xFFFFFFFF, context->base + S3C2410_SDICMDSTAT);
72509 +       writel(0xFFFFFFFF, context->base + S3C2410_SDIDSTA);
72510 +       writel(0xFFFFFFFF, context->base + S3C2410_SDIFSTA);
72511 +
72512 +       /* Enabling irqs */
72513 +       imask = S3C2410_SDIIMSK_READWAIT;
72514 +
72515 +       cmdcon = readl(context->base + S3C2410_SDICMDCON);
72516 +
72517 +        switch (GET_SDREQ_RESP_TYPE(req->Flags)) {
72518 +       case SDREQ_FLAGS_NO_RESP:
72519 +               cmdcon &= ~S3C2410_SDICMDCON_WAITRSP;
72520 +               context->complete = S3C24XX_HCD_NO_RESPONSE;
72521 +               imask |= S3C2410_SDIIMSK_CMDSENT;
72522 +                break;
72523 +       case SDREQ_FLAGS_RESP_R1:
72524 +       case SDREQ_FLAGS_RESP_R1B:
72525 +       case SDREQ_FLAGS_RESP_R3:
72526 +       case SDREQ_FLAGS_RESP_SDIO_R4:
72527 +       case SDREQ_FLAGS_RESP_SDIO_R5:
72528 +       case SDREQ_FLAGS_RESP_R6:
72529 +               cmdcon &= ~S3C2410_SDICMDCON_LONGRSP;
72530 +               cmdcon |= S3C2410_SDICMDCON_WAITRSP;
72531 +               context->complete = S3C24XX_HCD_RESPONSE_SHORT;
72532 +               imask |= S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_RESPONSEND
72533 +                       | S3C2410_SDIIMSK_CMDTIMEOUT | S3C2410_SDIIMSK_RESPONSECRC;
72534 +                break;
72535 +       case SDREQ_FLAGS_RESP_R2:
72536 +               cmdcon |= S3C2410_SDICMDCON_LONGRSP;
72537 +               cmdcon |= S3C2410_SDICMDCON_WAITRSP;
72538 +               context->complete = S3C24XX_HCD_RESPONSE_LONG;
72539 +               imask |= S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_RESPONSEND
72540 +                       | S3C2410_SDIIMSK_CMDTIMEOUT | S3C2410_SDIIMSK_RESPONSECRC;
72541 +                break;
72542 +
72543 +       }
72544 +
72545 +       /* There is a data part */
72546 +       if (IS_SDREQ_DATA_TRANS(req->Flags)) {
72547 +               u32 dcon = 0;
72548 +
72549 +               if (readl(context->base + S3C2410_SDIDSTA) &
72550 +                   (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
72551 +                       printk("##### DATA ON: 0x%x ######\n", readl(context->base + S3C2410_SDIDSTA));
72552 +               }
72553 +
72554 +               /* Setting timer */
72555 +               writel(0x7fffff, context->base + S3C2410_SDITIMER);
72556 +
72557 +               /* Block size */
72558 +               writel(req->BlockLen, context->base + S3C2410_SDIBSIZE);
72559 +               /* Number of blocks */
72560 +               dcon |= (0xfff & req->BlockCount);
72561 +
72562 +               if (context->bus_width == 4)
72563 +                       dcon |= S3C2410_SDIDCON_WIDEBUS;
72564 +
72565 +               req->DataRemaining = req->BlockCount * req->BlockLen;
72566 +
72567 +               /* Set data size, and start the transfer */
72568 +               dcon |= S3C2410_SDIDCON_IRQPERIOD;
72569 +               if (!(req->DataRemaining % 4)) {
72570 +                       context->data_size = 4;
72571 +                       dcon |= S3C2440_SDIDCON_DS_WORD;
72572 +               } else if (!(req->DataRemaining % 2)) {
72573 +                       context->data_size = 2;
72574 +                       dcon |= S3C2440_SDIDCON_DS_HALFWORD;
72575 +               } else {
72576 +                       context->data_size = 1;
72577 +                       dcon |= S3C2440_SDIDCON_DS_BYTE;
72578 +               }
72579 +
72580 +#ifdef CONFIG_SDIO_S3C24XX_DMA
72581 +               if (req->DataRemaining > 16) {
72582 +                       context->dma_en = 1;
72583 +               } else
72584 +#endif
72585 +               {
72586 +                       context->dma_en = 0;
72587 +                       context->data_size = 1;
72588 +                       dcon |= S3C2440_SDIDCON_DS_BYTE;
72589 +               }
72590 +
72591 +               if (context->dma_en) {
72592 +                       dcon |= S3C2410_SDIDCON_DMAEN;
72593 +                       s3c24xx_hcd_prepare_dma(context);
72594 +               }
72595 +
72596 +               if (IS_SDREQ_WRITE_DATA(req->Flags)) {
72597 +                       /* Data write */
72598 +                       DBG_PRINT(SDDBG_TRACE, ("Start data write, block count=%d, block size=%d\n",
72599 +                                               req->BlockCount, req->BlockLen));
72600 +
72601 +                       /* Data configuration: transmit after resp, block mode*/
72602 +                       dcon |= S3C2410_SDIDCON_TXAFTERRESP | S3C2410_SDIDCON_BLOCKMODE;
72603 +
72604 +                       /* This is a write */
72605 +                       dcon |= S3C2410_SDIDCON_XFER_TXSTART;
72606 +
72607 +                       imask |= S3C2410_SDIIMSK_TXFIFOHALF | S3C2410_SDIIMSK_TXFIFOEMPTY |
72608 +                               S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
72609 +                               S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
72610 +
72611 +                       context->complete = S3C24XX_HCD_DATA_WRITE;
72612 +               } else {
72613 +                       /* Data read */
72614 +                       DBG_PRINT(SDDBG_TRACE, ("Start data read, block count=%d, block size=%d\n",
72615 +                                               req->BlockCount, req->BlockLen));
72616 +
72617 +                       /* Data configuration: receive after cmd, block mode*/
72618 +                       dcon |= S3C2410_SDIDCON_RXAFTERCMD | S3C2410_SDIDCON_BLOCKMODE;
72619 +
72620 +                       /* This is a read */
72621 +                       dcon |= S3C2410_SDIDCON_XFER_RXSTART;
72622 +
72623 +                       imask |= S3C2410_SDIIMSK_RXFIFOHALF | S3C2410_SDIIMSK_RXFIFOLAST |
72624 +                               S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
72625 +                               S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
72626 +
72627 +                       context->complete = S3C24XX_HCD_DATA_READ;
72628 +               }
72629 +
72630 +               dcon |= S3C2440_SDIDCON_DATSTART;
72631 +
72632 +               writel(dcon, context->base + S3C2410_SDIDCON);
72633 +
72634 +               cmdcon |= S3C2410_SDICMDCON_WITHDATA;
72635 +
72636 +       } else {
72637 +               cmdcon &= ~S3C2410_SDICMDCON_WITHDATA;
72638 +       }
72639 +
72640 +       cmdcon |= req->Command & S3C2410_SDICMDCON_INDEX;
72641 +       cmdcon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
72642 +
72643 +       req->Status = SDIO_STATUS_PENDING;
72644 +
72645 +       if (context->int_sdio)
72646 +               imask |= S3C2410_SDIIMSK_SDIOIRQ;
72647 +       context->int_mask = imask;
72648 +       writel(imask, context->base + S3C2440_SDIIMSK);
72649 +       writel(req->Argument, context->base + S3C2410_SDICMDARG);
72650 +       writel(cmdcon, context->base + S3C2410_SDICMDCON);
72651 +
72652 +       spin_unlock_irqrestore(&context->lock, flags);
72653 +
72654 +       return status;
72655 +}
72656 +
72657 +static int s3c24xx_hcd_hw_init(struct s3c24xx_hcd_context * context)
72658 +{
72659 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72660 +       u32 con, datacon;
72661 +
72662 +       /* Clock */
72663 +       context->device.clock = clk_get(NULL, "sdi");
72664 +       if (IS_ERR(context->device.clock)) {
72665 +               DBG_PRINT(SDDBG_ERROR, ("Couldn't get clock\n"));
72666 +               status = PTR_ERR(context->device.clock);
72667 +               context->device.clock = NULL;
72668 +               return status;
72669 +       }
72670 +
72671 +       status = clk_enable(context->device.clock);
72672 +       if (SDIO_IS_ERROR(status)) {
72673 +               DBG_PRINT(SDDBG_ERROR, ("Couldn't get clock\n"));
72674 +               return SDIOErrorToOSError(status);
72675 +       }
72676 +
72677 +       context->device.max_clock_rate = clk_get_rate(context->device.clock);
72678 +       context->device.actual_clock_rate = context->device.max_clock_rate;
72679 +
72680 +       /* I/O */
72681 +       context->mem = request_mem_region(context->mem->start,
72682 +                                         RESSIZE(context->mem), context->description);
72683 +
72684 +       if (!context->mem) {
72685 +               DBG_PRINT(SDDBG_ERROR, ("Failed to request io memory region\n"));
72686 +               status = -ENOENT;
72687 +               goto out_disable_clock;
72688 +       }
72689 +
72690 +       context->base = ioremap(context->mem->start, RESSIZE(context->mem));
72691 +       if (context->base == 0) {
72692 +               DBG_PRINT(SDDBG_ERROR, ("failed to ioremap() io memory region.\n"));
72693 +               status = -EINVAL;
72694 +               goto out_free_mem_region;
72695 +       }
72696 +
72697 +       /* IRQ */
72698 +#if 0
72699 +       context->cd_irq = s3c2410_gpio_getirq(GTA02v1_GPIO_nSD_DETECT);
72700 +       s3c2410_gpio_cfgpin(GTA02v1_GPIO_nSD_DETECT, S3C2410_GPIO_IRQ);
72701 +
72702 +       if (request_irq(context->cd_irq, s3c24xx_hcd_cd_irq, 0, context->description, context)) {
72703 +               DBG_PRINT(SDDBG_ERROR, ("failed to request card detect interrupt.\n"));
72704 +               status = -ENOENT;
72705 +               goto out_unmap_mem_region;
72706 +       }
72707 +#endif
72708 +
72709 +       if (request_irq(context->io_irq, s3c24xx_hcd_irq, 0, context->description, context)) {
72710 +               DBG_PRINT(SDDBG_ERROR, ("failed to request mci interrupt.\n"));
72711 +               status = -ENOENT;
72712 +               goto out_unmap_mem_region;
72713 +       }
72714 +
72715 +
72716 +       /* DMA */
72717 +       context->io_buffer_size = 4 * 4096;
72718 +       context->io_buffer = dma_alloc_writecombine(&context->pdev->dev,
72719 +                                                   context->io_buffer_size,
72720 +                                                   &context->io_buffer_dma,
72721 +                                                   GFP_KERNEL | GFP_DMA);
72722 +
72723 +       if (context->io_buffer == NULL) {
72724 +               DBG_PRINT(SDDBG_ERROR, ("failed to allocate DMA buffer\n"));
72725 +               status = -ENOMEM;
72726 +               goto out_free_irq;
72727 +
72728 +       }
72729 +
72730 +       if (s3c2410_dma_request(context->dma_channel, &s3c24xx_hcd_dma_client, NULL)) {
72731 +               DBG_PRINT(SDDBG_ERROR, ("unable to get DMA channel.\n"));
72732 +               status = -ENOENT;
72733 +               goto out_free_dma;
72734 +       }
72735 +
72736 +
72737 +       /* Set multiplexing */
72738 +       s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
72739 +       s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
72740 +       s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
72741 +       s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
72742 +       s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
72743 +       s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
72744 +
72745 +       con = readl(context->base + S3C2410_SDICON);
72746 +       con |= S3C2410_SDICON_SDIOIRQ;
72747 +       writel(con, context->base + S3C2410_SDICON);
72748 +
72749 +       datacon = readl(context->base + S3C2410_SDIDCON);
72750 +       datacon |= S3C2410_SDIDCON_WIDEBUS;
72751 +       writel(datacon, context->base + S3C2410_SDIDCON);
72752 +
72753 +       printk("S3c24xx SDIO: IRQ:%d Detect IRQ:%d DMA channel:%d base@0x%p PCLK@%ld kHz\n",
72754 +              context->io_irq, context->cd_irq, context->dma_channel, context->base,
72755 +              context->device.max_clock_rate/1000);
72756 +
72757 +       return SDIOErrorToOSError(status);
72758 +
72759 + out_free_dma:
72760 +       dma_free_writecombine(&context->pdev->dev,context->io_buffer_size,
72761 +                             context->io_buffer, context->io_buffer_dma);
72762 +
72763 + out_free_irq:
72764 +       free_irq(context->io_irq, context);
72765 +
72766 + out_unmap_mem_region:
72767 +       iounmap(context->base);
72768 +
72769 + out_free_mem_region:
72770 +       release_mem_region(context->mem->start, RESSIZE(context->mem));
72771 +
72772 + out_disable_clock:
72773 +       clk_disable(context->device.clock);
72774 +
72775 +       return SDIOErrorToOSError(status);
72776 +}
72777 +
72778 +static void s3c24xx_hcd_hw_cleanup(struct s3c24xx_hcd_context * context)
72779 +{
72780 +       clk_disable(context->device.clock);
72781 +       free_irq(context->io_irq, context);
72782 +       iounmap(context->base);
72783 +       release_mem_region(context->mem->start, RESSIZE(context->mem));
72784 +       dma_free_writecombine(&context->pdev->dev,context->io_buffer_size,
72785 +                             context->io_buffer, context->io_buffer_dma);
72786 +}
72787 +
72788 +static int s3c24xx_hcd_pnp_probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId)
72789 +{
72790 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72791 +
72792 +       status = s3c24xx_hcd_hw_init(&hcd_context);
72793 +       if (SDIO_IS_ERROR(status)) {
72794 +               DBG_PRINT(SDDBG_ERROR, ("HW Init failed\n"));
72795 +               return SDIOErrorToOSError(status);
72796 +       }
72797 +
72798 +       status = SDIO_RegisterHostController(&hcd_context.hcd);
72799 +       if (SDIO_IS_ERROR(status)) {
72800 +               DBG_PRINT(SDDBG_ERROR, ("Host registration failed\n"));
72801 +               s3c24xx_hcd_hw_cleanup(&hcd_context);
72802 +               return SDIOErrorToOSError(status);
72803 +       }
72804 +
72805 +       /* Our card is built-in, we force the attachement event */
72806 +       SDIO_HandleHcdEvent(&hcd_context.hcd, EVENT_HCD_ATTACH);
72807 +
72808 +       return 0;
72809 +}
72810 +
72811 +static void s3c24xx_hcd_pnp_remove(struct pnp_dev *pBusDevice)
72812 +{
72813 +}
72814 +
72815 +/* the driver context data */
72816 +struct s3c24xx_hcd_context hcd_context = {
72817 +       .description  = DESCRIPTION,
72818 +       .hcd.pName = "sdio_s3c24xx",
72819 +       .hcd.Version = CT_SDIO_STACK_VERSION_CODE,
72820 +       .hcd.pModule = THIS_MODULE,
72821 +       /* builtin card, 4 bits bus */
72822 +       .hcd.Attributes = SDHCD_ATTRIB_BUS_4BIT | SDHCD_ATTRIB_BUS_1BIT | SDHCD_ATTRIB_MULTI_BLK_IRQ,
72823 +       .hcd.SlotNumber = 0,
72824 +       .hcd.MaxSlotCurrent = 500, /* 1/2 amp */
72825 +       .hcd.SlotVoltageCaps = SLOT_POWER_3_3V, /* 3.3V */
72826 +       .hcd.SlotVoltagePreferred = SLOT_POWER_3_3V, /* 3.3V */
72827 +       .hcd.MaxClockRate = 25000000,
72828 +       .hcd.MaxBytesPerBlock = 0xfff, /* 0 - 4095 */
72829 +       .hcd.MaxBlocksPerTrans = 0xfff, /* 0 - 4095 */
72830 +       .hcd.pContext = &hcd_context,
72831 +       .hcd.pRequest = s3c24xx_hcd_request,
72832 +       .hcd.pConfigure = s3c24xx_hcd_config,
72833 +       .device.pnp_device.name = "sdio_s3c24xx_hcd",
72834 +       .device.pnp_driver.name = "sdio_s3c24xx_hcd",
72835 +       .device.pnp_driver.probe  = s3c24xx_hcd_pnp_probe,
72836 +       .device.pnp_driver.remove = s3c24xx_hcd_pnp_remove,
72837 +};
72838 +
72839 +static int s3c24xx_hcd_probe(struct platform_device * pdev)
72840 +{
72841 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
72842 +       struct resource *r = NULL;
72843 +
72844 +       printk("S3c2440 SDIO Host controller\n");
72845 +
72846 +       hcd_context.pdev = pdev;
72847 +
72848 +       hcd_context.mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
72849 +       if (hcd_context.mem == NULL) {
72850 +               DBG_PRINT(SDDBG_ERROR, ("No memory region\n"));
72851 +               status = SDIO_STATUS_NO_RESOURCES;
72852 +               goto out;
72853 +       }
72854 +
72855 +       hcd_context.io_irq = platform_get_irq(pdev, 0);
72856 +       if (hcd_context.io_irq == 0) {
72857 +               DBG_PRINT(SDDBG_ERROR, ("No IRQ\n"));
72858 +               status = SDIO_STATUS_NO_RESOURCES;
72859 +               goto out;
72860 +       }
72861 +
72862 +       r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
72863 +       if (r == NULL) {
72864 +               DBG_PRINT(SDDBG_ERROR, ("No DMA channel\n"));
72865 +               status = SDIO_STATUS_NO_RESOURCES;
72866 +               goto out;
72867 +       }
72868 +       hcd_context.dma_channel = r->start;
72869 +       hcd_context.dma_en = 0;
72870 +
72871 +       hcd_context.int_sdio = 0;
72872 +
72873 +       spin_lock_init(&hcd_context.lock);
72874 +
72875 +       init_completion(&hcd_context.dma_complete);
72876 +       init_completion(&hcd_context.xfer_complete);
72877 +
72878 +       INIT_WORK(&hcd_context.io_work, s3c24xx_hcd_io_work);
72879 +       INIT_WORK(&hcd_context.irq_work, s3c24xx_hcd_irq_work);
72880 +
72881 +       mdelay(100);
72882 +
72883 +       status = SDIO_BusAddOSDevice(&hcd_context.device.dma,
72884 +                                    &hcd_context.device.pnp_driver,
72885 +                                    &hcd_context.device.pnp_device);
72886 +
72887 + out:
72888 +
72889 +       return SDIOErrorToOSError(status);
72890 +}
72891 +
72892 +/*
72893 + * module cleanup
72894 + */
72895 +static int s3c24xx_hcd_remove(struct platform_device * pdev) {
72896 +       printk("S3C2440 SDIO host controller unloaded\n");
72897 +       SDIO_BusRemoveOSDevice(&hcd_context.device.pnp_driver, &hcd_context.device.pnp_device);
72898 +
72899 +       return 0;
72900 +}
72901 +
72902 +#ifdef CONFIG_PM
72903 +
72904 +static int s3c24xx_hcd_suspend(struct platform_device * pdev, pm_message_t state)
72905 +{
72906 +       struct s3c24xx_hcd_context * context = &hcd_context;
72907 +       unsigned long flags;
72908 +
72909 +       spin_lock_irqsave(&context->lock, flags);
72910 +
72911 +       context->suspend_regs.con       = readl(context->base + S3C2410_SDICON);
72912 +       context->suspend_regs.pre       = readl(context->base + S3C2410_SDIPRE);
72913 +       context->suspend_regs.cmdarg    = readl(context->base + S3C2410_SDICMDARG);
72914 +       context->suspend_regs.cmdcon    = readl(context->base + S3C2410_SDICMDCON);
72915 +       context->suspend_regs.cmdsta    = readl(context->base + S3C2410_SDICMDSTAT);
72916 +       context->suspend_regs.r0        = readl(context->base + S3C2410_SDIRSP0);
72917 +       context->suspend_regs.r1        = readl(context->base + S3C2410_SDIRSP1);
72918 +       context->suspend_regs.r2        = readl(context->base + S3C2410_SDIRSP2);
72919 +       context->suspend_regs.r3        = readl(context->base + S3C2410_SDIRSP3);
72920 +       context->suspend_regs.timer     = readl(context->base + S3C2410_SDITIMER);
72921 +       context->suspend_regs.bsize     = readl(context->base + S3C2410_SDIBSIZE);
72922 +       context->suspend_regs.datcon    = readl(context->base + S3C2410_SDIDCON);
72923 +       context->suspend_regs.datcnt    = readl(context->base + S3C2410_SDIDCNT);
72924 +       context->suspend_regs.datsta    = readl(context->base + S3C2410_SDIDSTA);
72925 +       context->suspend_regs.fsta      = readl(context->base + S3C2410_SDIFSTA);
72926 +       context->suspend_regs.imask   = readl(context->base + S3C2440_SDIIMSK);
72927 +
72928 +       spin_unlock_irqrestore(&context->lock, flags);
72929 +       return 0;
72930 +}
72931 +
72932 +static int s3c24xx_hcd_resume(struct platform_device * pdev)
72933 +{
72934 +       struct s3c24xx_hcd_context * context = &hcd_context;
72935 +       unsigned long flags;
72936 +
72937 +       spin_lock_irqsave(&context->lock, flags);
72938 +
72939 +       writel(context->suspend_regs.con, context->base + S3C2410_SDICON);
72940 +       writel(context->suspend_regs.pre, context->base + S3C2410_SDIPRE);
72941 +       writel(context->suspend_regs.cmdarg, context->base + S3C2410_SDICMDARG);
72942 +       writel(context->suspend_regs.cmdcon, context->base + S3C2410_SDICMDCON);
72943 +       writel(context->suspend_regs.cmdsta, context->base + S3C2410_SDICMDSTAT);
72944 +       writel(context->suspend_regs.r0, context->base + S3C2410_SDIRSP0);
72945 +       writel(context->suspend_regs.r1, context->base + S3C2410_SDIRSP1);
72946 +       writel(context->suspend_regs.r2, context->base + S3C2410_SDIRSP2);
72947 +       writel(context->suspend_regs.r3, context->base + S3C2410_SDIRSP3);
72948 +       writel(context->suspend_regs.timer, context->base + S3C2410_SDITIMER);
72949 +       writel(context->suspend_regs.bsize, context->base + S3C2410_SDIBSIZE);
72950 +       writel(context->suspend_regs.datcon, context->base + S3C2410_SDIDCON);
72951 +       writel(context->suspend_regs.datcnt, context->base + S3C2410_SDIDCNT);
72952 +       writel(context->suspend_regs.datsta, context->base + S3C2410_SDIDSTA);
72953 +       writel(context->suspend_regs.fsta, context->base + S3C2410_SDIFSTA);
72954 +       writel(context->suspend_regs.imask, context->base + S3C2440_SDIIMSK);
72955 +
72956 +       spin_unlock_irqrestore(&context->lock, flags);
72957 +       return 0;
72958 +}
72959 +
72960 +#else
72961 +#define s3c24xx_hcd_suspend = NULL
72962 +#define s3c24xx_hcd_resume  = NULL
72963 +#endif
72964 +
72965 +static struct platform_driver s3c24xx_hcd_sdio =
72966 +{
72967 +       .driver.name    = "s3c24xx-sdio",
72968 +       .probe          = s3c24xx_hcd_probe,
72969 +       .remove         = s3c24xx_hcd_remove,
72970 +       .suspend    = s3c24xx_hcd_suspend,
72971 +       .resume         = s3c24xx_hcd_resume,
72972 +};
72973 +
72974 +#ifdef CONFIG_DEBUG_FS
72975 +static struct dentry *debugfs_dir;
72976 +
72977 +static int s3c24xx_hcd_debugfs_show(struct seq_file *s, void *data)
72978 +{
72979 +       PSDREQUEST req;
72980 +       u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
72981 +       u32 datcon, datcnt, datsta, fsta, imask;
72982 +       struct s3c24xx_hcd_context * context = &hcd_context;
72983 +
72984 +
72985 +       con     = readl(context->base + S3C2410_SDICON);
72986 +       pre     = readl(context->base + S3C2410_SDIPRE);
72987 +       cmdarg  = readl(context->base + S3C2410_SDICMDARG);
72988 +       cmdcon  = readl(context->base + S3C2410_SDICMDCON);
72989 +       cmdsta  = readl(context->base + S3C2410_SDICMDSTAT);
72990 +       r0      = readl(context->base + S3C2410_SDIRSP0);
72991 +       r1      = readl(context->base + S3C2410_SDIRSP1);
72992 +       r2      = readl(context->base + S3C2410_SDIRSP2);
72993 +       r3      = readl(context->base + S3C2410_SDIRSP3);
72994 +       timer   = readl(context->base + S3C2410_SDITIMER);
72995 +       bsize   = readl(context->base + S3C2410_SDIBSIZE);
72996 +       datcon  = readl(context->base + S3C2410_SDIDCON);
72997 +       datcnt  = readl(context->base + S3C2410_SDIDCNT);
72998 +       datsta  = readl(context->base + S3C2410_SDIDSTA);
72999 +       fsta    = readl(context->base + S3C2410_SDIFSTA);
73000 +       imask   = readl(context->base + S3C2440_SDIIMSK);
73001 +
73002 +       seq_printf(s, "SDICON:    0x%08x\n", con);
73003 +       seq_printf(s, "SDIPRE:    0x%08x\n", pre);
73004 +       seq_printf(s, "SDICmdArg: 0x%08x\n", cmdarg);
73005 +       seq_printf(s, "SDICmdCon: 0x%08x\n", cmdcon);
73006 +       seq_printf(s, "SDICmdSta: 0x%08x\n", cmdsta);
73007 +       seq_printf(s, "SDIRSP0:   0x%08x\n", r0);
73008 +       seq_printf(s, "SDIRSP1:   0x%08x\n", r1);
73009 +       seq_printf(s, "SDIRSP2:   0x%08x\n", r2);
73010 +       seq_printf(s, "SDIRSP3:   0x%08x\n", r3);
73011 +       seq_printf(s, "SDIDTimer: 0x%08x\n", timer);
73012 +       seq_printf(s, "SDIBSize:  0x%08x\n", bsize);
73013 +       seq_printf(s, "SDIDatCon: 0x%08x\n", datcon);
73014 +       seq_printf(s, "SDIDatCnt: 0x%08x\n", datcnt);
73015 +       seq_printf(s, "SDIDatSta: 0x%08x\n", datsta);
73016 +       seq_printf(s, "SDIFSta:   0x%08x\n", fsta);
73017 +       seq_printf(s, "SDIIntMsk: 0x%08x\n", imask);
73018 +       seq_printf(s, "\n");
73019 +
73020 +       seq_printf(s, "Current REQ: \n");
73021 +       req = GET_CURRENT_REQUEST(&context->hcd);
73022 +       if (req == NULL) {
73023 +               seq_printf(s, " No current request\n");
73024 +       } else {
73025 +               seq_printf(s, " Command: %d\n", req->Command);
73026 +               seq_printf(s, " Args: 0x%x\n", req->Argument);
73027 +               seq_printf(s, " Flags: 0x%x\n", req->Flags);
73028 +               seq_printf(s, " %d blocks x %d bytes\n", req->BlockCount, req->BlockLen);
73029 +               seq_printf(s, " %d bytes remaining\n", req->DataRemaining);
73030 +       }
73031 +
73032 +       seq_printf(s, "Context: \n");
73033 +       seq_printf(s, " INT mask: 0x%x\n", context->int_mask);
73034 +       seq_printf(s, " sdio INT: %d\n", context->int_sdio);
73035 +       seq_printf(s, " cmdsta: 0x%x\n", context->cmdsta);
73036 +       seq_printf(s, " dsta: 0x%x\n", context->dsta);
73037 +       seq_printf(s, " fsta: 0x%x\n", context->fsta);
73038 +
73039 +       return 0;
73040 +}
73041 +
73042 +static int s3c24xx_hcd_debugfs_open(struct inode *inode,
73043 +                                       struct file *file)
73044 +{
73045 +       return single_open(file, s3c24xx_hcd_debugfs_show, NULL);
73046 +}
73047 +
73048 +static const struct file_operations s3c24xx_hcd_debugfs_fops = {
73049 +       .open           = s3c24xx_hcd_debugfs_open,
73050 +       .read           = seq_read,
73051 +       .llseek         = seq_lseek,
73052 +       .release        = single_release,
73053 +       .owner          = THIS_MODULE,
73054 +};
73055 +
73056 +
73057 +static int s3c24xx_debugfs_init(struct s3c24xx_hcd_context * context)
73058 +{
73059 +       debugfs_dir = debugfs_create_dir("s3c24xx_sdio", NULL);
73060 +
73061 +       debugfs_create_file("registers", 0444, debugfs_dir,
73062 +                           (void *)context,
73063 +                           &s3c24xx_hcd_debugfs_fops);
73064 +
73065 +       return 0;
73066 +}
73067 +
73068 +#else
73069 +
73070 +static int s3c24xx_debugfs_init(struct s3c24xx_hcd_context * context)
73071 +{
73072 +       return 0;
73073 +}
73074 +
73075 +#endif
73076 +
73077 +static int __init s3c24xx_hcd_init(void)
73078 +{
73079 +       int ret;
73080 +
73081 +       ret = s3c24xx_debugfs_init(&hcd_context);
73082 +       if (ret) {
73083 +               printk("%s(): debugfs init failed\n", __FUNCTION__);
73084 +       }
73085 +
73086 +       platform_driver_register(&s3c24xx_hcd_sdio);
73087 +
73088 +       return 0;
73089 +}
73090 +
73091 +static void __exit s3c24xx_hcd_exit(void)
73092 +{
73093 +       platform_driver_unregister(&s3c24xx_hcd_sdio);
73094 +}
73095 +
73096 +
73097 +MODULE_LICENSE("GPL");
73098 +MODULE_DESCRIPTION(DESCRIPTION);
73099 +MODULE_AUTHOR(AUTHOR);
73100 +
73101 +module_init(s3c24xx_hcd_init);
73102 +module_exit(s3c24xx_hcd_exit);
73103 Index: linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.h
73104 ===================================================================
73105 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73106 +++ linux-2.6.24.7/drivers/sdio/hcd/s3c24xx/s3c24xx_hcd.h       2008-12-11 22:46:49.000000000 +0100
73107 @@ -0,0 +1,81 @@
73108 +#ifndef __SDIO_S3C24XX_HCD_H___
73109 +#define __SDIO_S3C24XX_HCD_H___
73110 +
73111 +#define S3C24XX_HCD_NO_RESPONSE     1
73112 +#define S3C24XX_HCD_RESPONSE_SHORT  2
73113 +#define S3C24XX_HCD_RESPONSE_LONG   3
73114 +#define S3C24XX_HCD_DATA_READ       4
73115 +#define S3C24XX_HCD_DATA_WRITE      5
73116 +
73117 +struct s3c24xx_hcd_device {
73118 +       OS_PNPDEVICE   pnp_device;     /* the OS device for this HCD */
73119 +       OS_PNPDRIVER   pnp_driver;     /* the OS driver for this HCD */
73120 +       SDDMA_DESCRIPTION dma;
73121 +       struct clk * clock;
73122 +       unsigned long max_clock_rate;
73123 +       unsigned long actual_clock_rate;
73124 +};
73125 +
73126 +
73127 +/* driver wide data, this driver only supports one device,
73128 + * so we include the per device data here also */
73129 +struct s3c24xx_hcd_context {
73130 +       PTEXT                     description;       /* human readable device decsription */
73131 +       SDHCD                     hcd;                /* HCD description for bus driver */
73132 +       struct s3c24xx_hcd_device device;             /* the single device's info */
73133 +       struct platform_device    *pdev;
73134 +       struct resource           *mem;
73135 +       void __iomem              *base;
73136 +       UINT32                    io_irq;
73137 +       UINT32                    cd_irq;
73138 +       BOOL                      card_inserted;       /* card inserted flag */
73139 +       BOOL                      cmd_processed;       /* command phase was processed */
73140 +       UINT32                    fifo_depth;          /* FIFO depth for the bus mode */
73141 +       BOOL                      irq_masked;
73142 +       UINT32                    bus_width;
73143 +       UINT32                    data_size;           /* Word, half word, or byte */
73144 +       UINT32                    latest_xfer_size;
73145 +
73146 +       void                      *io_buffer;         /* Kernel address */
73147 +       dma_addr_t                io_buffer_dma;      /* Bus address */
73148 +       UINT32                    io_buffer_size;
73149 +       UINT32                    dma_channel;
73150 +       UINT32                    dma_en;
73151 +       struct completion         dma_complete;
73152 +       struct completion         xfer_complete;
73153 +
73154 +       UINT32                    int_mask;
73155 +       UINT32                    int_sdio;            /* Do we have SDIO interrupt on ? */
73156 +
73157 +       UINT32                    complete;
73158 +
73159 +       UINT32                    cmdsta;
73160 +       UINT32                    dsta;
73161 +       UINT32                    fsta;
73162 +
73163 +       spinlock_t                lock;
73164 +
73165 +       struct work_struct        io_work;
73166 +       struct work_struct        irq_work;
73167 +
73168 +#ifdef CONFIG_PM
73169 +       struct {
73170 +               UINT32          con;
73171 +               UINT32          pre;
73172 +               UINT32          cmdarg, cmdcon, cmdsta;
73173 +               UINT32          r0, r1, r2, r3;
73174 +               UINT32          timer;
73175 +               UINT32          bsize;
73176 +               UINT32          datcon, datcnt, datsta;
73177 +               UINT32          fsta;
73178 +               UINT32          imask;
73179 +       } suspend_regs;
73180 +#endif
73181 +};
73182 +
73183 +SDIO_STATUS s3c24xx_hcd_config(PSDHCD hcd, PSDCONFIG config);
73184 +SDIO_STATUS s3c24xx_hcd_request(PSDHCD hcd);
73185 +
73186 +struct s3c24xx_hcd_context hcd_context;
73187 +
73188 +#endif
73189 Index: linux-2.6.24.7/drivers/sdio/Kconfig
73190 ===================================================================
73191 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73192 +++ linux-2.6.24.7/drivers/sdio/Kconfig 2008-12-11 22:46:49.000000000 +0100
73193 @@ -0,0 +1,17 @@
73194 +#
73195 +# SDIO driver and host controller support
73196 +#
73197 +
73198 +menu "SDIO support"
73199 +
73200 +config SDIO
73201 +        tristate "SDIO support"
73202 +        default m
73203 +        ---help---
73204 +          good luck.
73205 +
73206 +source "drivers/sdio/hcd/Kconfig"
73207 +
73208 +source "drivers/sdio/function/Kconfig"
73209 +
73210 +endmenu
73211 Index: linux-2.6.24.7/drivers/sdio/Makefile
73212 ===================================================================
73213 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73214 +++ linux-2.6.24.7/drivers/sdio/Makefile        2008-12-11 22:46:49.000000000 +0100
73215 @@ -0,0 +1,4 @@
73216 +#Makefile for SDIO stack
73217 +obj-$(CONFIG_SDIO)      += stack/
73218 +obj-$(CONFIG_SDIO)      += hcd/
73219 +obj-$(CONFIG_SDIO)      += function/
73220 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/_busdriver.h
73221 ===================================================================
73222 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73223 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/_busdriver.h    2008-12-11 22:46:49.000000000 +0100
73224 @@ -0,0 +1,466 @@
73225 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
73226 +@file: _busdriver.h
73227 +
73228 +@abstract: internal include file for busdriver
73229 +
73230 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
73231 +
73232 +
73233 + *
73234 + *  This program is free software; you can redistribute it and/or modify
73235 + *  it under the terms of the GNU General Public License version 2 as
73236 + *  published by the Free Software Foundation;
73237 + *
73238 + *  Software distributed under the License is distributed on an "AS
73239 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
73240 + *  implied. See the License for the specific language governing
73241 + *  rights and limitations under the License.
73242 + *
73243 + *  Portions of this code were developed with information supplied from the
73244 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
73245 + *
73246 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
73247 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
73248 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
73249 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
73250 + *   Specification may require a license from the SD Card Association or other third parties.
73251 + *   Disclaimers:
73252 + *   The information contained in the Simplified Specification is presented only as a standard
73253 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
73254 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
73255 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
73256 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
73257 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
73258 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
73259 + *   information, know-how or other confidential information to any third party.
73260 + *
73261 + *
73262 + *  The initial developers of the original code are Seung Yi and Paul Lever
73263 + *
73264 + *  sdio@atheros.com
73265 + *
73266 + *
73267 +
73268 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
73269 +#ifndef ___BUSDRIVER_H___
73270 +#define ___BUSDRIVER_H___
73271 +#include <linux/sdio/sdio_lib.h>
73272 +
73273 +#define SDIODBG_FUNC_IRQ  (SDDBG_TRACE + 1)
73274 +#define SDIODBG_REQUESTS  (SDDBG_TRACE + 2)
73275 +#define SDIODBG_CD_TIMER  (SDDBG_TRACE + 3)
73276 +#define SDIODBG_HCD_EVENTS  (SDDBG_TRACE + 4)
73277 +
73278 +#define SDIOBUS_CD_TIMER_ID 0
73279 +
73280 +#define SDBUS_MAX_RETRY   3
73281 +
73282 +/* Notes on list linkages:
73283 + *  list heads are held in BDCONTEXT
73284 + *  HcdList - SDHCD
73285 + *          one per registered host controller
73286 + *          Next - links of all HCDs
73287 + *  DeviceList SDDEVICE
73288 + *          one per inserted device
73289 + *          Next - links of all devices
73290 + *          DeviceListNext - links of all devices on a function
73291 + *          pFunction - ptr to Function supportting this device
73292 + *          pHcd - ptr to HCD with supporting this device
73293 + *  FunctionList SDFUNCTION
73294 + *          one per register function driver
73295 + *          Next - links of all functions
73296 + *          DeviceList - list of devices being support by this function
73297 + *                       uses DeviceListNext in SDDEVICE to link
73298 + *
73299 + *
73300 +*/
73301 +
73302 +#define SDMMC_DEFAULT_CMD_RETRIES           1
73303 +#define SDMMC_DEFAULT_CARD_READY_RETRIES    200
73304 +#define OCR_READY_CHECK_DELAY_MS            10
73305 +#define SDMMC_POWER_SETTLE_DELAY            400  /* in milliseconds */
73306 +#define SDBUS_DEFAULT_REQ_LIST_SIZE         16
73307 +#define SDBUS_DEFAULT_REQ_SIG_SIZE          8
73308 +#define CARD_DETECT_PAUSE                   100
73309 +#define SDBUS_DEFAULT_CD_POLLING_INTERVAL   1000  /* in milliseconds */
73310 +#define MAX_CARD_DETECT_MSGS                16
73311 +#define SDMMC_DEFAULT_BYTES_PER_BLOCK       2048
73312 +#define SDMMC_DEFAULT_BLOCKS_PER_TRANS      512
73313 +#define SDMMC_CMD13_POLLING_MULTIPLIER      1000 /* per block multiplier */
73314 +#define MAX_HCD_REQ_RECURSION               5
73315 +#define MAX_HCD_RECURSION_RUNAWAY           100
73316 +
73317 +    /* internal signalling item */
73318 +typedef struct _SIGNAL_ITEM{
73319 +    SDLIST       SDList;        /* list link*/
73320 +    OS_SIGNAL    Signal;        /* signal */
73321 +}SIGNAL_ITEM, *PSIGNAL_ITEM;
73322 +
73323 +typedef struct _HCD_EVENT_MESSAGE {
73324 +    HCD_EVENT Event;    /* the event */
73325 +    PSDHCD    pHcd;     /* hcd that generated the event */
73326 +}HCD_EVENT_MESSAGE, *PHCD_EVENT_MESSAGE;
73327 +
73328 +/* internal data for bus driver */
73329 +typedef struct _BDCONTEXT {
73330 +
73331 +    /* list of SD requests and signalling semaphores and a semaphore to protect it */
73332 +    SDLIST  RequestList;
73333 +    SDLIST  SignalList;
73334 +    OS_CRITICALSECTION RequestListCritSection;
73335 +    /* list of host controller bus drivers, sempahore to protect it */
73336 +    SDLIST HcdList;
73337 +    OS_SEMAPHORE HcdListSem;
73338 +    /* list of inserted devices, semaphore to protect it */
73339 +    SDLIST DeviceList;
73340 +    OS_SEMAPHORE DeviceListSem;
73341 +    /* list of function drivers, semaphore to protect it */
73342 +    SDLIST FunctionList;
73343 +    OS_SEMAPHORE FunctionListSem;
73344 +    INT              RequestListSize;        /* default request list */
73345 +    INT              SignalSemListSize;      /* default signalling semaphore size */
73346 +    INT              CurrentRequestAllocations; /*current count of allocated requests */
73347 +    INT              CurrentSignalAllocations;   /* current count of signal allocations */
73348 +    INT              MaxRequestAllocations;  /* max number of allocated requests to keep around*/
73349 +    INT              MaxSignalAllocations;   /* max number of signal allocations to keep around*/
73350 +    INT              RequestRetries;         /* cmd retries */
73351 +    INT              CardReadyPollingRetry;  /* card ready polling retry count */
73352 +    INT              PowerSettleDelay;       /* power settle delay */
73353 +    INT              CMD13PollingMultiplier; /* CMD13 (GET STATUS) multiplier */
73354 +    SD_BUSCLOCK_RATE DefaultOperClock;       /* default operation clock */
73355 +    SD_BUSMODE_FLAGS DefaultBusMode;         /* default bus mode */
73356 +    UINT16           DefaultOperBlockLen;    /* default operational block length per block */
73357 +    UINT16           DefaultOperBlockCount;  /* default operational block count per transaction */
73358 +    UINT32           CDPollingInterval;      /* card insert/removal polling interval */
73359 +    UINT8            InitMask;               /* bus driver init mask */
73360 +#define BD_TIMER_INIT    0x01
73361 +#define HELPER_INIT      0x02
73362 +#define RESOURCE_INIT    0x04
73363 +    BOOL             CDTimerQueued;          /* card detect timer queued */
73364 +    OSKERNEL_HELPER  CardDetectHelper;       /* card detect helper */
73365 +    PSDMESSAGE_QUEUE pCardDetectMsgQueue;    /* card detect message queue */
73366 +    ULONG            HcdInUseField;          /* bit field of in use HCD numbers*/
73367 +    UINT32           ConfigFlags;            /* bus driver configuration flags */
73368 +#define BD_CONFIG_SDREQ_FORCE_ALL_ASYNC 0x00000001
73369 +    INT              MaxHcdRecursion;        /* max HCD recurion level */
73370 +}BDCONTEXT, *PBDCONTEXT;
73371 +
73372 +#define BD_DEFAULT_CONFIG_FLAGS 0x00000000
73373 +#define IsQueueBusy(pRequestQueue)      (pRequestQueue)->Busy
73374 +#define MarkQueueBusy(pRequestQueue)    (pRequestQueue)->Busy = TRUE
73375 +#define MarkQueueNotBusy(pRequestQueue) (pRequestQueue)->Busy = FALSE
73376 +
73377 +#define CLEAR_INTERNAL_REQ_FLAGS(pReq) (pReq)->Flags &= ~(UINT)((SDREQ_FLAGS_RESP_SPI_CONVERTED | \
73378 +                                                          SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE))
73379 +
73380 +/* macros to insert request into the queue */
73381 +#define QueueRequest(pReqQ,pReq) SDListInsertTail(&(pReqQ)->Queue,&(pReq)->SDList)
73382 +#define QueueRequestToFront(pReqQ,pReq) SDListInsertHead(&(pReqQ)->Queue,&(pReq)->SDList)
73383 +
73384 +/* macros to remove an item from the head of the queue */
73385 +static INLINE PSDREQUEST DequeueRequest(PSDREQUESTQUEUE pRequestQueue) {
73386 +    PSDLIST pItem;
73387 +    pItem = SDListRemoveItemFromHead(&pRequestQueue->Queue);
73388 +    if (pItem != NULL) {
73389 +        return CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
73390 +    }
73391 +    return NULL;
73392 +};
73393 +
73394 +static INLINE SDIO_STATUS InitializeRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
73395 +    SDLIST_INIT(&pRequestQueue->Queue);
73396 +    MarkQueueNotBusy(pRequestQueue);
73397 +    return SDIO_STATUS_SUCCESS;
73398 +}
73399 +
73400 +static INLINE void CleanupRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
73401 +
73402 +}
73403 +
73404 +/* for bus driver internal use only */
73405 +SDIO_STATUS _SDIO_BusDriverInitialize(void);
73406 +SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc);
73407 +void _SDIO_BusDriverCleanup(void);
73408 +SDIO_STATUS RemoveAllFunctions(void);
73409 +SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd);
73410 +PSDDEVICE AllocateDevice(PSDHCD pHcd);
73411 +BOOL AddDeviceToList(PSDDEVICE pDevice);
73412 +SDIO_STATUS DeleteDevices(PSDHCD pHcd);
73413 +SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice);
73414 +extern PBDCONTEXT pBusContext;
73415 +extern const CT_VERSION_CODE g_Version;
73416 +SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd);
73417 +SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd);
73418 +SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event);
73419 +SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction);
73420 +SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction);
73421 +SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode);
73422 +SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd);
73423 +SDIO_STATUS SDInitializeCard(PSDHCD pHcd);
73424 +SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice);
73425 +SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice);
73426 +SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData);
73427 +SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData);
73428 +SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL Mask);
73429 +SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice);
73430 +SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable);
73431 +SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig);
73432 +SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq);
73433 +PSDREQUEST IssueAllocRequest(PSDDEVICE pDev);
73434 +void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq);
73435 +PSDREQUEST AllocateRequest(void);
73436 +void FreeRequest(PSDREQUEST pReq);
73437 +PSIGNAL_ITEM AllocateSignal(void);
73438 +void FreeSignal(PSIGNAL_ITEM pSignal);
73439 +SDIO_STATUS InitializeTimers(void);
73440 +SDIO_STATUS CleanupTimers(void);
73441 +SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut);
73442 +SDIO_STATUS DeviceAttach(PSDHCD pHcd);
73443 +SDIO_STATUS DeviceDetach(PSDHCD pHcd);
73444 +SDIO_STATUS DeviceInterrupt(PSDHCD pHcd);
73445 +SDIO_STATUS CardInitSetup(PSDHCD pHcd);
73446 +void RunCardDetect(void);
73447 +void SDIO_NotifyTimerTriggered(INT TimerID);
73448 +SDIO_STATUS TestPresence(PSDHCD          pHcd,
73449 +                         CARD_INFO_FLAGS TestType,
73450 +                         PSDREQUEST      pReq);
73451 +#define _IssueSimpleBusRequest(pHcd,Cmd,Arg,Flags,pReqToUse) \
73452 +          _IssueBusRequestBd((pHcd),(Cmd),(Arg),(Flags),(pReqToUse),NULL,0)
73453 +
73454 +SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd);
73455 +SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd);
73456 +SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDev);
73457 +
73458 +    /* check API version compatibility of an HCD or function driver to a stack major/minor version
73459 +     if the driver version is greater than the major number, we are compatible
73460 +     if the driver version is equal, then we check if the minor is greater than or equal
73461 +     we don't have to check for the less than major, because the bus driver never loads
73462 +     drivers with different major numbers ...
73463 +     if the busdriver compiled version major is greater than the major version being checked this
73464 +     macro will resolved to ALWAYS true thus optimizing the code to not check the HCD since
73465 +     as a rule we never load an HCD with a lower major number */
73466 +#define CHECK_API_VERSION_COMPAT(p,major,minor)       \
73467 +     ((CT_SDIO_STACK_VERSION_MAJOR(CT_SDIO_STACK_VERSION_CODE) > (major)) || \
73468 +      (GET_SDIO_STACK_VERSION_MINOR((p)) >= (minor)))
73469 +
73470 +static INLINE SDIO_STATUS OS_IncHcdReference(PSDHCD pHcd) {
73471 +        /* this API was added in version 2.3 which requires access to a field in the HCD structure */
73472 +    if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
73473 +            /* we can safely call the OS-dependent function */
73474 +        return Do_OS_IncHcdReference(pHcd);
73475 +    }
73476 +    return SDIO_STATUS_SUCCESS;
73477 +}
73478 +
73479 +static INLINE SDIO_STATUS OS_DecHcdReference(PSDHCD pHcd) {
73480 +            /* this API was added in version 2.3 which requires access to a field in the HCD structure */
73481 +    if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
73482 +            /* we can safely call the OS-dependent function */
73483 +        return Do_OS_DecHcdReference(pHcd);
73484 +    }
73485 +    return SDIO_STATUS_SUCCESS;
73486 +}
73487 +
73488 +SDIO_STATUS _IssueBusRequestBd(PSDHCD           pHcd,
73489 +                               UINT8            Cmd,
73490 +                               UINT32           Argument,
73491 +                               SDREQUEST_FLAGS  Flags,
73492 +                               PSDREQUEST       pReqToUse,
73493 +                               PVOID            pData,
73494 +                               INT              Length);
73495 +
73496 +SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd,PSDREQUEST pReq);
73497 +
73498 +#define CALL_HCD_CONFIG(pHcd,pCfg) (pHcd)->pConfigure((pHcd),(pCfg))
73499 +    /* macro to force all requests to be asynchronous in the HCD */
73500 +static INLINE BOOL ForceAllRequestsAsync(void) {
73501 +    return (pBusContext->ConfigFlags & BD_CONFIG_SDREQ_FORCE_ALL_ASYNC);
73502 +}
73503 +
73504 +static INLINE SDIO_STATUS CallHcdRequest(PSDHCD pHcd) {
73505 +
73506 +    if (pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_PSEUDO) {
73507 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: PSEUDO Request 0x%X \n",
73508 +                    (INT)pHcd->pCurrentRequest));
73509 +            /* return successful completion so that processing can finish */
73510 +        return SDIO_STATUS_SUCCESS;
73511 +    }
73512 +
73513 +    if (ForceAllRequestsAsync()) {
73514 +            /* all requests must be completed(indicated) in a separate context */
73515 +        pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
73516 +    } else {
73517 +            /* otherwise perform a test on flags in the HCD */
73518 +        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6) &&
73519 +            AtomicTest_Set(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT)) {
73520 +
73521 +            /* bit was already set, this is a recursive call,
73522 +             * we need to tell the HCD to complete the
73523 +             * request in a separate context */
73524 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive CallHcdRequest \n"));
73525 +            pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
73526 +        }
73527 +    }
73528 + #ifdef DEBUG
73529 +    {
73530 +        SDIO_STATUS status;
73531 +        BOOL forceDeferred;
73532 +        forceDeferred = pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
73533 +        status = pHcd->pRequest(pHcd);
73534 +        if (forceDeferred) {
73535 +                /* status better be pending... */
73536 +            DBG_ASSERT(status == SDIO_STATUS_PENDING);
73537 +        }
73538 +        return status;
73539 +    }
73540 + #else
73541 +    return pHcd->pRequest(pHcd);
73542 + #endif
73543 +
73544 +}
73545 +
73546 +/* note the caller of this macro must take the HCD lock to protect the count */
73547 +#define CHECK_HCD_RECURSE(pHcd,pReq)   \
73548 +{                                      \
73549 +    (pHcd)->Recursion++;               \
73550 +    DBG_ASSERT((pHcd)->Recursion < MAX_HCD_RECURSION_RUNAWAY); \
73551 +    if ((pHcd)->Recursion > pBusContext->MaxHcdRecursion) {    \
73552 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive Request Count Exceeded (%d) \n",(pHcd)->Recursion)); \
73553 +        (pReq)->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE; \
73554 +    }                                                         \
73555 +}
73556 +
73557 +/* InternalFlags bit number settings */
73558 +#define SDBD_INIT        1
73559 +#define SDBD_PENDING    15
73560 +#define SDBD_ALLOC_IRQ_SAFE     2
73561 +
73562 +#define SDBD_ALLOC_IRQ_SAFE_MASK (1 << SDBD_ALLOC_IRQ_SAFE)
73563 +
73564 +static void INLINE DoRequestCompletion(PSDREQUEST pReq, PSDHCD pHcd) {
73565 +    CLEAR_INTERNAL_REQ_FLAGS(pReq);
73566 +    if (pReq->pCompletion != NULL) {
73567 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Calling completion on request:0x%X, CMD:%d \n",
73568 +           (INT)pReq, pReq->Command));
73569 +            /* call completion routine, mark request reusable */
73570 +        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
73571 +        pReq->pCompletion(pReq);
73572 +    } else {
73573 +            /* mark request reusable */
73574 +        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
73575 +    }
73576 +}
73577 +
73578 +THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper);
73579 +THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper);
73580 +
73581 +void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer);
73582 +
73583 +static INLINE SDIO_STATUS PostCardDetectEvent(PBDCONTEXT pSDB, HCD_EVENT Event, PSDHCD pHcd) {
73584 +    HCD_EVENT_MESSAGE message;
73585 +    SDIO_STATUS       status;
73586 +    message.Event = Event;
73587 +    message.pHcd = pHcd;
73588 +
73589 +    if (pHcd != NULL) {
73590 +            /* increment HCD reference count to process this HCD message */
73591 +        status = OS_IncHcdReference(pHcd);
73592 +        if (!SDIO_SUCCESS(status)) {
73593 +            return status;
73594 +        }
73595 +    }
73596 +        /* post card detect message */
73597 +    status = SDLIB_PostMessage(pSDB->pCardDetectMsgQueue, &message, sizeof(message));
73598 +    if (!SDIO_SUCCESS(status)) {
73599 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: PostCardDetectEvent error status %d\n",status));
73600 +        if (pHcd != NULL) {
73601 +                /* decrement count */
73602 +            OS_DecHcdReference(pHcd);
73603 +        }
73604 +        return status;
73605 +    }
73606 +        /* wake card detect helper */
73607 +    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: PostCardDetectEvent waking\n"));
73608 +    return SD_WAKE_OS_HELPER(&pSDB->CardDetectHelper);
73609 +};
73610 +
73611 +/* initialize device fields */
73612 +static INLINE void InitDeviceData(PSDHCD pHcd, PSDDEVICE pDevice) {
73613 +    ZERO_POBJECT(pDevice);
73614 +    SDLIST_INIT(&pDevice->SDList);
73615 +    SDLIST_INIT(&pDevice->FuncListLink);
73616 +    pDevice->pRequest = IssueBusRequest;
73617 +    pDevice->pConfigure = IssueBusConfig;
73618 +    pDevice->AllocRequest = IssueAllocRequest;
73619 +    pDevice->FreeRequest = IssueFreeRequest;
73620 +        /* set card flags in the ID */
73621 +    pDevice->pId[0].CardFlags = pHcd->CardProperties.Flags;
73622 +    pDevice->pFunction = NULL;
73623 +    pDevice->pHcd = pHcd;
73624 +    SET_SDIO_STACK_VERSION(pDevice);
73625 +}
73626 +
73627 +/* de-initialize device fields */
73628 +static INLINE void DeinitDeviceData(PSDDEVICE pDevice) {
73629 +}
73630 +
73631 +/* reset hcd state */
73632 +static INLINE void ResetHcdState(PSDHCD pHcd) {
73633 +    ZERO_POBJECT(&pHcd->CardProperties);
73634 +    pHcd->PendingHelperIrqs = 0;
73635 +    pHcd->PendingIrqAcks = 0;
73636 +    pHcd->IrqsEnabled = 0;
73637 +    pHcd->pCurrentRequest = NULL;
73638 +    pHcd->IrqProcState = SDHCD_IDLE;
73639 +        /* mark this device as special */
73640 +    pHcd->pPseudoDev->pId[0].CardFlags = CARD_PSEUDO;
73641 +    pHcd->SlotCurrentAllocated = 0;
73642 +}
73643 +
73644 +static INLINE SDIO_STATUS _IssueConfig(PSDHCD           pHcd,
73645 +                                       SDCONFIG_COMMAND Command,
73646 +                                       PVOID            pData,
73647 +                                       INT              Length){
73648 +    SDCONFIG  configHdr;
73649 +    SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
73650 +    return CALL_HCD_CONFIG(pHcd,&configHdr);
73651 +}
73652 +
73653 +/* prototypes */
73654 +#define _AcquireHcdLock(pHcd)CriticalSectionAcquireSyncIrq(&(pHcd)->HcdCritSection)
73655 +#define _ReleaseHcdLock(pHcd)CriticalSectionReleaseSyncIrq(&(pHcd)->HcdCritSection)
73656 +
73657 +#define AcquireHcdLock(pDev) CriticalSectionAcquireSyncIrq(&(pDev)->pHcd->HcdCritSection)
73658 +#define ReleaseHcdLock(pDev) CriticalSectionReleaseSyncIrq(&(pDev)->pHcd->HcdCritSection)
73659 +
73660 +SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
73661 +void OS_RemoveDevice(PSDDEVICE pDevice);
73662 +SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
73663 +SDIO_STATUS SetOperationalBusMode(PSDDEVICE               pDevice,
73664 +                                  PSDCONFIG_BUS_MODE_DATA pBusMode);
73665 +void FreeDevice(PSDDEVICE pDevice);
73666 +BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList);
73667 +
73668 +
73669 +#define CHECK_FUNCTION_DRIVER_VERSION(pF) \
73670 +    (GET_SDIO_STACK_VERSION_MAJOR((pF)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
73671 +#define CHECK_HCD_DRIVER_VERSION(pH) \
73672 +    (GET_SDIO_STACK_VERSION_MAJOR((pH)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
73673 +
73674 +/* CLARIFICATION on SDREQ_FLAGS_PSEUDO and SDREQ_FLAGS_BARRIER flags :
73675 + *
73676 + * A request marked as PSEUDO is synchronized with bus requests and is not a true request
73677 + * that is issued to an HCD.
73678 + *
73679 + * A request marked with a BARRIER flag requires that the completion routine be called
73680 + * before the next bus request starts.  This is required for HCD requests that can change
73681 + * bus or clock modes.  Changing the clock or bus mode while a bus request is pending
73682 + * can cause problems.
73683 + *
73684 + *
73685 + *
73686 + * */
73687 +#define SD_PSEUDO_REQ_FLAGS \
73688 +      (SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC)
73689 +
73690 +#endif /*___BUSDRIVER_H___*/
73691 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/Makefile
73692 ===================================================================
73693 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73694 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/Makefile        2008-12-11 22:46:49.000000000 +0100
73695 @@ -0,0 +1,2 @@
73696 +obj-$(CONFIG_SDIO) += sdio_busdriver.o
73697 +sdio_busdriver-objs := sdio_bus.o sdio_function.o sdio_bus_misc.o sdio_bus_events.o sdio_bus_os.o
73698 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus.c
73699 ===================================================================
73700 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
73701 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus.c      2008-12-11 22:46:49.000000000 +0100
73702 @@ -0,0 +1,2120 @@
73703 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
73704 +@file: sdio_bus.c
73705 +
73706 +@abstract: OS independent bus driver support
73707 +@category abstract: HD_Reference Host Controller Driver Interfaces.
73708 +@category abstract: PD_Reference
73709 +    Peripheral Driver Interfaces.
73710 +
73711 +#notes: this file supports the HCD's and generic functions
73712 +
73713 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
73714 +
73715 +
73716 + *
73717 + *  This program is free software; you can redistribute it and/or modify
73718 + *  it under the terms of the GNU General Public License version 2 as
73719 + *  published by the Free Software Foundation;
73720 + *
73721 + *  Software distributed under the License is distributed on an "AS
73722 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
73723 + *  implied. See the License for the specific language governing
73724 + *  rights and limitations under the License.
73725 + *
73726 + *  Portions of this code were developed with information supplied from the
73727 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
73728 + *
73729 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
73730 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
73731 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
73732 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
73733 + *   Specification may require a license from the SD Card Association or other third parties.
73734 + *   Disclaimers:
73735 + *   The information contained in the Simplified Specification is presented only as a standard
73736 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
73737 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
73738 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
73739 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
73740 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
73741 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
73742 + *   information, know-how or other confidential information to any third party.
73743 + *
73744 + *
73745 + *  The initial developers of the original code are Seung Yi and Paul Lever
73746 + *
73747 + *  sdio@atheros.com
73748 + *
73749 + *
73750 +
73751 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
73752 +#define MODULE_NAME  SDBUSDRIVER
73753 +#include <linux/sdio/ctsystem.h>
73754 +#include <linux/sdio/sdio_busdriver.h>
73755 +#include <linux/sdio/_sdio_defs.h>
73756 +#include <linux/sdio/sdio_lib.h>
73757 +#include <linux/sdio/mmc_defs.h>
73758 +#include "_busdriver.h"
73759 +
73760 +/* list of host controller bus drivers */
73761 +PBDCONTEXT pBusContext = NULL;
73762 +static void CleanUpBusResources(void);
73763 +static SDIO_STATUS AllocateBusResources(void);
73764 +static PSIGNAL_ITEM BuildSignal(void);
73765 +static void DestroySignal(PSIGNAL_ITEM pSignal);
73766 +
73767 +const CT_VERSION_CODE g_Version = CT_SDIO_STACK_VERSION_CODE;
73768 +/*
73769 + * _SDIO_BusDriverInitialize - call once on driver loading
73770 + *
73771 +*/
73772 +SDIO_STATUS _SDIO_BusDriverInitialize(void)
73773 +{
73774 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
73775 +
73776 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Version: %d.%d\n",
73777 +       CT_SDIO_STACK_VERSION_MAJOR(g_Version),CT_SDIO_STACK_VERSION_MINOR(g_Version)));
73778 +
73779 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: enter _SDIO_BusDriverInitialize\n"));
73780 +
73781 +    do {
73782 +        /* allocate our internal data initialize it */
73783 +        pBusContext = KernelAlloc(sizeof(BDCONTEXT));
73784 +        if (pBusContext == NULL) {
73785 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't allocate memory.\n"));
73786 +            status = SDIO_STATUS_NO_RESOURCES;
73787 +            break;
73788 +        }
73789 +        memset(pBusContext,0,sizeof(BDCONTEXT));
73790 +        SDLIST_INIT(&pBusContext->RequestList);
73791 +        SDLIST_INIT(&pBusContext->HcdList);
73792 +        SDLIST_INIT(&pBusContext->DeviceList);
73793 +        SDLIST_INIT(&pBusContext->FunctionList);
73794 +        SDLIST_INIT(&pBusContext->SignalList);
73795 +
73796 +            /* setup defaults */
73797 +        pBusContext->RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
73798 +        pBusContext->CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
73799 +        pBusContext->PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
73800 +        pBusContext->DefaultOperClock = MMC_HS_MAX_BUS_CLOCK;
73801 +        pBusContext->DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
73802 +        pBusContext->RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
73803 +        pBusContext->SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
73804 +        pBusContext->CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
73805 +        pBusContext->DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
73806 +        pBusContext->DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
73807 +        pBusContext->ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
73808 +        pBusContext->CMD13PollingMultiplier = SDMMC_CMD13_POLLING_MULTIPLIER;
73809 +        pBusContext->MaxHcdRecursion = MAX_HCD_REQ_RECURSION;
73810 +
73811 +            /* get overrides for the defaults */
73812 +        status = _SDIO_BusGetDefaultSettings(pBusContext);
73813 +        if (!SDIO_SUCCESS(status)) {
73814 +            break;
73815 +        }
73816 +
73817 +        pBusContext->MaxRequestAllocations = pBusContext->RequestListSize << 1;
73818 +        pBusContext->MaxSignalAllocations = pBusContext->SignalSemListSize << 1;
73819 +
73820 +        status = CriticalSectionInit(&pBusContext->RequestListCritSection);
73821 +        if (!SDIO_SUCCESS(status)) {
73822 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CriticalSectionInit.\n"));
73823 +            break;
73824 +        }
73825 +        status = SemaphoreInitialize(&pBusContext->HcdListSem, 1);
73826 +        if (!SDIO_SUCCESS(status)) {
73827 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize HcdListSem.\n"));
73828 +            break;
73829 +        }
73830 +        status = SemaphoreInitialize(&pBusContext->DeviceListSem, 1);
73831 +        if (!SDIO_SUCCESS(status)) {
73832 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize DeviceListSem.\n"));
73833 +            break;
73834 +        }
73835 +        status = SemaphoreInitialize(&pBusContext->FunctionListSem, 1);
73836 +        if (!SDIO_SUCCESS(status)) {
73837 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize FunctionListSem.\n"));
73838 +            break;
73839 +        }
73840 +        status = AllocateBusResources();
73841 +        if (!SDIO_SUCCESS(status)) {
73842 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't AllocateBusResources.\n"));
73843 +            break;
73844 +        }
73845 +
73846 +        pBusContext->InitMask |= RESOURCE_INIT;
73847 +
73848 +        pBusContext->pCardDetectMsgQueue = SDLIB_CreateMessageQueue(MAX_CARD_DETECT_MSGS,
73849 +                                                                   sizeof(HCD_EVENT_MESSAGE));
73850 +
73851 +        if (NULL == pBusContext->pCardDetectMsgQueue) {
73852 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CreateMessageQueue.\n"));
73853 +            status = SDIO_STATUS_NO_RESOURCES;
73854 +            break;
73855 +        }
73856 +
73857 +        status = SDLIB_OSCreateHelper(&pBusContext->CardDetectHelper,
73858 +                                      CardDetectHelperFunction,
73859 +                                      NULL);
73860 +
73861 +        if (!SDIO_SUCCESS(status)) {
73862 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't OSCreateHelper.\n"));
73863 +            break;
73864 +        }
73865 +
73866 +        pBusContext->InitMask |= HELPER_INIT;
73867 +
73868 +        status = InitializeTimers();
73869 +        if (!SDIO_SUCCESS(status)) {
73870 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't InitializeTimers.\n"));
73871 +            break;
73872 +        }
73873 +        pBusContext->InitMask |= BD_TIMER_INIT;
73874 +    } while(FALSE);
73875 +
73876 +    if (!SDIO_SUCCESS(status)) {
73877 +        _SDIO_BusDriverCleanup();
73878 +    }
73879 +
73880 +    return status;
73881 +}
73882 +
73883 +
73884 +/*
73885 + * _SDIO_BusDriverBusDriverCleanup - call once on driver unloading
73886 + *
73887 +*/
73888 +void _SDIO_BusDriverCleanup(void) {
73889 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
73890 +
73891 +    if (pBusContext->InitMask & BD_TIMER_INIT) {
73892 +        CleanupTimers();
73893 +    }
73894 +
73895 +    if (pBusContext->InitMask & HELPER_INIT) {
73896 +        SDLIB_OSDeleteHelper(&pBusContext->CardDetectHelper);
73897 +    }
73898 +
73899 +    if (pBusContext->pCardDetectMsgQueue != NULL) {
73900 +        SDLIB_DeleteMessageQueue(pBusContext->pCardDetectMsgQueue);
73901 +        pBusContext->pCardDetectMsgQueue = NULL;
73902 +    }
73903 +        /* remove functions */
73904 +    RemoveAllFunctions();
73905 +        /* cleanup all devices */
73906 +    DeleteDevices(NULL);
73907 +    CleanUpBusResources();
73908 +    CriticalSectionDelete(&pBusContext->RequestListCritSection);
73909 +    SemaphoreDelete(&pBusContext->HcdListSem);
73910 +    SemaphoreDelete(&pBusContext->DeviceListSem);
73911 +    SemaphoreDelete(&pBusContext->FunctionListSem);
73912 +    KernelFree(pBusContext);
73913 +    pBusContext = NULL;
73914 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
73915 +}
73916 +
73917 +
73918 +/* cleanup hcd */
73919 +static void CleanupHcd(PSDHCD pHcd)
73920 +{
73921 +    SDLIB_OSDeleteHelper(&pHcd->SDIOIrqHelper);
73922 +    CleanupRequestQueue(&pHcd->CompletedRequestQueue);
73923 +    CleanupRequestQueue(&pHcd->RequestQueue);
73924 +    CriticalSectionDelete(&pHcd->HcdCritSection);
73925 +    SemaphoreDelete(&pHcd->ConfigureOpsSem);
73926 +    pHcd->pCurrentRequest = NULL;
73927 +    if (pHcd->pPseudoDev != NULL) {
73928 +        FreeDevice(pHcd->pPseudoDev);
73929 +        pHcd->pPseudoDev = NULL;
73930 +    }
73931 +}
73932 +
73933 +/* set up the hcd */
73934 +static SDIO_STATUS SetupHcd(PSDHCD pHcd)
73935 +{
73936 +    SDIO_STATUS status;
73937 +
73938 +    ZERO_POBJECT(&pHcd->SDIOIrqHelper);
73939 +    ZERO_POBJECT(&pHcd->ConfigureOpsSem);
73940 +    ZERO_POBJECT(&pHcd->HcdCritSection);
73941 +    ZERO_POBJECT(&pHcd->RequestQueue);
73942 +    ZERO_POBJECT(&pHcd->CompletedRequestQueue);
73943 +    pHcd->pPseudoDev = NULL;
73944 +    pHcd->Recursion = 0;
73945 +
73946 +    do {
73947 +
73948 +        pHcd->pPseudoDev = AllocateDevice(pHcd);
73949 +
73950 +        if (NULL == pHcd->pPseudoDev) {
73951 +            status = SDIO_STATUS_NO_RESOURCES;
73952 +            break;
73953 +        }
73954 +
73955 +        ResetHcdState(pHcd);
73956 +
73957 +        status = SemaphoreInitialize(&pHcd->ConfigureOpsSem,1);
73958 +        if (!SDIO_SUCCESS(status)) {
73959 +            break;
73960 +        }
73961 +        status = CriticalSectionInit(&pHcd->HcdCritSection);
73962 +        if (!SDIO_SUCCESS(status)) {
73963 +            break;
73964 +        }
73965 +        status = InitializeRequestQueue(&pHcd->RequestQueue);
73966 +        if (!SDIO_SUCCESS(status)) {
73967 +            break;
73968 +        }
73969 +        status = InitializeRequestQueue(&pHcd->CompletedRequestQueue);
73970 +        if (!SDIO_SUCCESS(status)) {
73971 +            break;
73972 +        }
73973 +            /* create SDIO Irq helper */
73974 +        status = SDLIB_OSCreateHelper(&pHcd->SDIOIrqHelper,
73975 +                                      SDIOIrqHelperFunction,
73976 +                                     (PVOID)pHcd);
73977 +    } while(FALSE);
73978 +
73979 +    if (!SDIO_SUCCESS(status)) {
73980 +            /* undo what we did */
73981 +        CleanupHcd(pHcd);
73982 +    }
73983 +    return status;
73984 +}
73985 +
73986 +
73987 +/*
73988 + * _SDIO_RegisterHostController - register a host controller bus driver
73989 + *
73990 +*/
73991 +
73992 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
73993 +  @function: Register a host controller driver with the bus driver.
73994 +
73995 +  @function name: SDIO_RegisterHostController
73996 +  @prototype: SDIO_STATUS SDIO_RegisterHostController (PSDHCD pHcd)
73997 +  @category: HD_Reference
73998 +
73999 +  @input:  pHcd - the host controller definition structure.
74000 +
74001 +  @output: none
74002 +
74003 +  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
74004 +
74005 +  @notes: Each host controller driver must register with the bus driver when loaded.
74006 +          The driver registers an SDHCD structure initialized with hardware properties
74007 +          and callback functions for bus requests and configuration.  On multi-slot
74008 +          hardware ,each slot should be registered with a separate SDHCD structure.
74009 +          The bus driver views each slot as a seperate host controller object.
74010 +          The driver should be prepared to receive configuration requests before
74011 +          this call returns. The host controller driver must unregister itself when
74012 +          shutting down.
74013 +
74014 +  @example: Registering a host controller driver:
74015 +    static SDHCD Hcd = {
74016 +       .pName = "sdio_custom_hcd",
74017 +       .Version = CT_SDIO_STACK_VERSION_CODE,  // set stack version code
74018 +       .SlotNumber = 0,                        // bus driver internal use
74019 +       .Attributes = SDHCD_ATTRIB_BUS_1BIT | SDHCD_ATTRIB_BUS_4BIT | SDHCD_ATTRIB_MULTI_BLK_IRQ
74020 +                     SDHCD_ATTRIB_AUTO_CMD12 ,
74021 +       .MaxBytesPerBlock = 2048     // each data block can be up to 2048 bytes
74022 +       .MaxBlocksPerTrans = 1024,   // each data transaction can consist of 1024 blocks
74023 +       .MaxSlotCurrent = 500,       // max FET switch current rating
74024 +       .SlotVoltageCaps = SLOT_POWER_3_3V,      // only 3.3V operation
74025 +       .SlotVoltagePreferred = SLOT_POWER_3_3V,
74026 +       .MaxClockRate = 24000000,   // 24 Mhz max operation
74027 +       .pContext = &HcdContext,    // set our driver context
74028 +       .pRequest = HcdRequest,     // set SDIO bus request callback
74029 +       .pConfigure = HcdConfig,    // set SDIO bus configuration callback
74030 +    };
74031 +    if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&Hcd)))) {
74032 +         DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to register with host, status =%d\n",
74033 +                                    status));
74034 +    }
74035 +
74036 +  @see also: SDIO_UnregisterHostController
74037 +
74038 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
74039 +SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd) {
74040 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
74041 +
74042 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_RegisterHostController - %s\n",pHcd->pName));
74043 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Host Controller Stack Version: %d.%d \n",
74044 +        GET_SDIO_STACK_VERSION_MAJOR(pHcd),GET_SDIO_STACK_VERSION_MINOR(pHcd)));
74045 +
74046 +    if (!CHECK_HCD_DRIVER_VERSION(pHcd)) {
74047 +        DBG_PRINT(SDDBG_ERROR,
74048 +           ("SDIO Bus Driver: HCD Major Version Mismatch (hcd = %d, bus driver = %d)\n",
74049 +           GET_SDIO_STACK_VERSION_MAJOR(pHcd), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
74050 +        return SDIO_STATUS_INVALID_PARAMETER;
74051 +    }
74052 +        /* setup hcd */
74053 +    status = SetupHcd(pHcd);
74054 +    if (!SDIO_SUCCESS(status)) {
74055 +        return status;
74056 +    }
74057 +
74058 +    do {
74059 +        INT slotNumber;
74060 +
74061 +            /* protect the HCD list */
74062 +        if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
74063 +            break;  /* wait interrupted */
74064 +        }
74065 +            /* find a unique number for this HCD, must be done under semaphore protection */
74066 +        slotNumber = FirstClearBit(&pBusContext->HcdInUseField);
74067 +        if (slotNumber < 0) {
74068 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error, slotNumber exceeded\n"));
74069 +            /* fake something */
74070 +            slotNumber = 31;
74071 +        }
74072 +        SetBit(&pBusContext->HcdInUseField, slotNumber);
74073 +        pHcd->SlotNumber = slotNumber;
74074 +            /* add HCD to the end of the internal list */
74075 +        SDListAdd(&pBusContext->HcdList , &pHcd->SDList);
74076 +        if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
74077 +            break;   /* wait interrupted */
74078 +        }
74079 +        if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
74080 +                /* post message to card detect helper to do polling */
74081 +            PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
74082 +        }
74083 +    } while (FALSE);
74084 +
74085 +    if (!SDIO_SUCCESS(status)) {
74086 +       CleanupHcd(pHcd);
74087 +       DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error 0x%X.\n", status));
74088 +    }
74089 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_RegisterHostController\n"));
74090 +    return status;
74091 +}
74092 +
74093 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
74094 +  @function: Unregister a host controller driver with the bus driver.
74095 +
74096 +  @function name: SDIO_UnregisterHostController
74097 +  @prototype: SDIO_STATUS SDIO_UnregisterHostController (PSDHCD pHcd)
74098 +  @category: HD_Reference
74099 +
74100 +  @input:  pHcd - the host controller definition structure that was registered.
74101 +
74102 +  @output: none
74103 +
74104 +  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
74105 +
74106 +  @notes: Each host controller driver must unregister with the bus driver when
74107 +          unloading. The driver is responsible for halting any outstanding I/O
74108 +          operations.  The bus driver will automatically unload function drivers
74109 +          that may be attached assigned to cards inserted into slots.
74110 +
74111 +  @example: Unregistering a host controller driver:
74112 +    if (!SDIO_SUCCESS((status = SDIO_UnregisterHostController(&Hcd)))) {
74113 +         DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to unregister with host, status =%d\n",
74114 +                                    status));
74115 +    }
74116 +
74117 +  @see also: SDIO_RegisterHostController
74118 +
74119 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
74120 +SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd) {
74121 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
74122 +
74123 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
74124 +
74125 +        /* remove functions associated with the HCD */
74126 +    RemoveHcdFunctions(pHcd);
74127 +        /* remove any devices associated with the HCD */
74128 +    DeleteDevices(pHcd);
74129 +    /* wait for the message queue to be empty, so we don't have any delayed requests going
74130 +       to this device */
74131 +    while(!SDLIB_IsQueueEmpty(pBusContext->pCardDetectMsgQueue)) {
74132 +        /* wait for the messages to be handled */
74133 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_UnregisterHostController, waiting on messages\n"));
74134 +        OSSleep(250);
74135 +    }
74136 +
74137 +    /* protect the HCD list */
74138 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
74139 +        goto cleanup;   /* wait interrupted */
74140 +    }
74141 +    ClearBit(&pBusContext->HcdInUseField, pHcd->SlotNumber);
74142 +    /* delete HCD from list  */
74143 +    SDListRemove(&pHcd->SDList);
74144 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
74145 +        goto cleanup;   /* wait interrupted */
74146 +    }
74147 +        /* cleanup anything we allocated */
74148 +    CleanupHcd(pHcd);
74149 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
74150 +    return status;
74151 +cleanup:
74152 +    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_UnregisterHostController, error 0x%X.\n", status));
74153 +    return status;
74154 +}
74155 +
74156 +/* documentation headers only for Request and Configure */
74157 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
74158 +  @function: The bus driver calls the request callback to start an SDIO bus transaction.
74159 +  @function name: Request
74160 +  @prototype: SDIO_STATUS (*pRequest) (struct _SDHCD *pHcd)
74161 +  @category: HD_Reference
74162 +
74163 +  @input:  pHcd - the host controller structure that was registered
74164 +
74165 +  @output: none
74166 +
74167 +  @return: SDIO_STATUS
74168 +
74169 +  @notes:
74170 +          The bus driver maintains an internal queue of SDREQUEST structures submited by function
74171 +          drivers. The driver should use request macros to obtain a pointer to the current SDREQUEST
74172 +          at the head of the queue.  The driver can access the fields of the current request in order
74173 +          to program hardware appropriately.   Once the request completes, the driver should update
74174 +          the current request information (final status, response bytes and/or data) and call
74175 +          SDIO_HandleHcdEvent() with the event type of EVENT_HCD_TRANSFER_DONE.
74176 +          The bus driver will remove the current request from the head of the queue and start the next
74177 +          request.
74178 +
74179 +  @example: Example of a typical Request callback:
74180 +  SDIO_STATUS HcdRequest(PSDHCD pHcd)
74181 +  {
74182 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
74183 +    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
74184 +    UINT32                temp = 0;
74185 +    PSDREQUEST            pReq;
74186 +       // get the current request
74187 +    pReq = GET_CURRENT_REQUEST(pHcd);
74188 +    DBG_ASSERT(pReq != NULL);
74189 +       // get controller settings based on response type
74190 +    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
74191 +        case SDREQ_FLAGS_NO_RESP:
74192 +            break;
74193 +        case SDREQ_FLAGS_RESP_R1:
74194 +        case SDREQ_FLAGS_RESP_MMC_R4:
74195 +        case SDREQ_FLAGS_RESP_MMC_R5:
74196 +        case SDREQ_FLAGS_RESP_R6:
74197 +        case SDREQ_FLAGS_RESP_SDIO_R5:
74198 +            temp |= CMDDAT_RES_R1_R4_R5;
74199 +            break;
74200 +        case SDREQ_FLAGS_RESP_R1B:
74201 +            temp |= (CMDDAT_RES_R1_R4_R5 | CMDAT_RES_BUSY);
74202 +            break;
74203 +        case SDREQ_FLAGS_RESP_R2:
74204 +            temp |= CMDDAT_RES_R2;
74205 +            break;
74206 +        case SDREQ_FLAGS_RESP_R3:
74207 +        case SDREQ_FLAGS_RESP_SDIO_R4:
74208 +            temp |= CMDDAT_RES_R3;
74209 +            break;
74210 +    }
74211 +        // check for data
74212 +    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS){
74213 +        temp |= CMDDAT_DATA_EN;
74214 +        // set data remaining count
74215 +        pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
74216 +        DBG_PRINT(TRACE_DATA, ("SDIO %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
74217 +                    IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
74218 +                    pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
74219 +        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
74220 +                // write operation
74221 +        }
74222 +    }
74223 +    // .... program hardware, interrupt handler will complete request
74224 +    return SDIO_STATUS_PENDING;
74225 +  }
74226 +
74227 +  @see also: SDIO_HandleHcdEvent
74228 +
74229 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
74230 +
74231 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
74232 +  @function: The bus driver calls the configure callback to set various options
74233 +             and modes in the host controller hardware.
74234 +
74235 +  @function name: Configure
74236 +  @prototype: SDIO_STATUS (*pConfigure) (struct _SDHCD *pHcd, PSDCONFIG pConfig)
74237 +  @category: HD_Reference
74238 +
74239 +  @input:  pHcd - the host controller structure that was registered
74240 +  @input:  pConfig - configuration request structure
74241 +
74242 +  @output: none
74243 +
74244 +  @return: SDIO_STATUS
74245 +
74246 +  @notes:
74247 +          The host controller driver recieves configuration requests for options
74248 +          such as slot voltage, bus width, clock rates and interrupt detection.
74249 +          The bus driver guarantees that only one configuration option request
74250 +          can be issued at a time.
74251 +
74252 +  @example: Example of a typical configure callback:
74253 +  SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
74254 +  {
74255 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
74256 +    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
74257 +    UINT16      command;
74258 +        // get command
74259 +    command = GET_SDCONFIG_CMD(pConfig);
74260 +        // decode command
74261 +    switch (command){
74262 +        case SDCONFIG_GET_WP:
74263 +            if (GetGpioPinLevel(pHct,SDIO_CARD_WP_GPIO) == WP_POLARITY) {
74264 +                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
74265 +            } else {
74266 +                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
74267 +            }
74268 +            break;
74269 +        case SDCONFIG_SEND_INIT_CLOCKS:
74270 +            ClockStartStop(pHct,CLOCK_ON);
74271 +                // sleep a little, should be at least 80 clocks at our lowest clock setting
74272 +            status = OSSleep(100);
74273 +            ClockStartStop(pHct,CLOCK_OFF);
74274 +            break;
74275 +        case SDCONFIG_SDIO_INT_CTRL:
74276 +            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
74277 +                // request to enable IRQ detection
74278 +            } else {
74279 +                // request to disable IRQ detectioon
74280 +            }
74281 +            break;
74282 +        case SDCONFIG_SDIO_REARM_INT:
74283 +                // request to re-arm the card IRQ detection logic
74284 +            break;
74285 +        case SDCONFIG_BUS_MODE_CTRL:
74286 +                // request to set bus mode
74287 +            {
74288 +                // get bus mode data structure
74289 +               PSDCONFIG_BUS_MODE_DATA pBusMode =
74290 +                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
74291 +                // set bus mode based on settings in bus mode structure
74292 +                // bus mode   :  pBusMode->BusModeFlags
74293 +                // clock rate :  pBusMode->ClockRate
74294 +            }
74295 +            break;
74296 +        case SDCONFIG_POWER_CTRL:
74297 +                // request to set power/voltage
74298 +            {
74299 +                PSDCONFIG_POWER_CTRL_DATA pPowerSetting =
74300 +                       GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig);
74301 +                if (pPowerSetting->SlotPowerEnable) {
74302 +                    // turn on slot power
74303 +                    //
74304 +                } else {
74305 +                    // turn off slot power
74306 +                }
74307 +                DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 PwrControl: En:%d, VCC:0x%X \n",
74308 +                      pPowerSetting->SlotPowerEnable,
74309 +                      pPowerSetting->SlotPowerVoltageMask));
74310 +            }
74311 +            break;
74312 +        default:
74313 +            // unsupported
74314 +            status = SDIO_STATUS_INVALID_PARAMETER;
74315 +    }
74316 +    return status;
74317 + }
74318 +
74319 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
74320 +
74321 +
74322 +/*
74323 + * Allocate a Device instance
74324 + */
74325 +PSDDEVICE AllocateDevice(PSDHCD pHcd)
74326 +{
74327 +    PSDDEVICE pDevice;
74328 +
74329 +    pDevice = KernelAlloc(sizeof(SDDEVICE));
74330 +    if (pDevice != NULL) {
74331 +        InitDeviceData(pHcd,pDevice);
74332 +    }
74333 +    return pDevice;
74334 +}
74335 +
74336 +
74337 +/*
74338 + * Free a Device instance
74339 + */
74340 +void FreeDevice(PSDDEVICE pDevice)
74341 +{
74342 +    DeinitDeviceData(pDevice);
74343 +    KernelFree(pDevice);
74344 +}
74345 +/*
74346 + * add this device to the list
74347 + */
74348 +BOOL AddDeviceToList(PSDDEVICE pDevice)
74349 +{
74350 +    BOOL success = FALSE;
74351 +
74352 +    do {
74353 +            /* protect the driver list */
74354 +        if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->DeviceListSem))) {
74355 +            break;   /* wait interrupted */
74356 +        }
74357 +
74358 +            /* add new device to the internal list */
74359 +        SDListAdd(&pBusContext->DeviceList , &pDevice->SDList);
74360 +
74361 +        if (!SDIO_SUCCESS(SemaphorePost(&pBusContext->DeviceListSem))) {
74362 +            break;
74363 +        }
74364 +
74365 +        success = TRUE;
74366 +    } while (FALSE);
74367 +
74368 +    return success;
74369 +}
74370 +
74371 +/*
74372 + *  Delete device associated with the HCD
74373 + *  if pHCD is NULL this function cleans up all devices, the caller
74374 + *  better have cleaned up functions first!
74375 + */
74376 +SDIO_STATUS DeleteDevices(PSDHCD pHcd)
74377 +{
74378 +    SDIO_STATUS status;
74379 +    PSDDEVICE   pDevice;
74380 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeleteDevices hcd:0x%X \n", (INT)pHcd));
74381 +      /* protect the device list */
74382 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
74383 +        goto cleanup;   /* wait interrupted */
74384 +    }
74385 +    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pBusContext->DeviceList,pDevice,SDDEVICE,SDList) {
74386 +            /* only remove devices for the hcd or if we are cleaning up all */
74387 +        if ((NULL == pHcd) || (pDevice->pHcd == pHcd)) {
74388 +            SDListRemove(&pDevice->SDList);
74389 +            DeinitDeviceData(pDevice);
74390 +            FreeDevice(pDevice);
74391 +        }
74392 +    }SDITERATE_END;
74393 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
74394 +        goto cleanup;   /* wait interrupted */
74395 +    }
74396 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeleteDevices \n"));
74397 +    return status;
74398 +cleanup:
74399 +    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: DeleteDevice, error exit 0x%X\n", status));
74400 +    return status;
74401 +}
74402 +
74403 +
74404 +static SDIO_STATUS AllocateBusResources(void)
74405 +{
74406 +    INT                 ii;
74407 +    PSDREQUEST          pReq;
74408 +    PSIGNAL_ITEM        pSignal;
74409 +
74410 +    DBG_PRINT(SDDBG_TRACE,
74411 +    ("+SDIO Bus Driver: AllocateBusResources (R:%d,S:%d) (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
74412 +       pBusContext->RequestListSize,
74413 +       pBusContext->SignalSemListSize,
74414 +       pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
74415 +       pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
74416 +
74417 +        /* allocate some initial requests */
74418 +    for (ii = 0; ii < pBusContext->RequestListSize; ii++) {
74419 +        pReq = AllocateRequest();
74420 +        if (pReq == NULL) {
74421 +            break;
74422 +        }
74423 +            /* free requests adds the request to the list */
74424 +        FreeRequest(pReq);
74425 +    }
74426 +
74427 +    for (ii = 0; ii < pBusContext->SignalSemListSize; ii++) {
74428 +        pSignal = AllocateSignal();
74429 +        if (pSignal == NULL) {
74430 +            break;
74431 +        }
74432 +            /* freeing it adds it to the list */
74433 +        FreeSignal(pSignal);
74434 +    }
74435 +
74436 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: AllocateBusResources\n"));
74437 +    return SDIO_STATUS_SUCCESS;
74438 +}
74439 +
74440 +
74441 +/* cleanup bus resources */
74442 +static void CleanUpBusResources(void)
74443 +{
74444 +    PSDLIST      pItem;
74445 +    PSDREQUEST   pReq;
74446 +    PSIGNAL_ITEM pSignal;
74447 +
74448 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: CleanUpBusResources (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
74449 +       pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
74450 +       pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
74451 +
74452 +    while(1) {
74453 +        pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
74454 +        if (NULL == pItem) {
74455 +            break;
74456 +        }
74457 +            /* free the request */
74458 +        pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
74459 +        if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
74460 +            KernelFreeIrqSafe(pReq);
74461 +        } else {
74462 +            KernelFree(pReq);
74463 +        }
74464 +        pBusContext->CurrentRequestAllocations--;
74465 +    }
74466 +
74467 +    if (pBusContext->CurrentRequestAllocations != 0) {
74468 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request allocations are not ZERO! (CR:%d)\n",
74469 +             pBusContext->CurrentRequestAllocations));
74470 +    }
74471 +
74472 +    while(1) {
74473 +        pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
74474 +        if (NULL == pItem) {
74475 +            break;
74476 +        }
74477 +        pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
74478 +        DestroySignal(pSignal);
74479 +        pBusContext->CurrentSignalAllocations--;
74480 +    }
74481 +
74482 +    if (pBusContext->CurrentSignalAllocations != 0) {
74483 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Signal allocations are not ZERO! (CR:%d)\n",
74484 +             pBusContext->CurrentRequestAllocations));
74485 +    }
74486 +
74487 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: CleanUpBusResources\n"));
74488 +}
74489 +
74490 +
74491 +/* free a request to the lookaside list */
74492 +void FreeRequest(PSDREQUEST pReq)
74493 +{
74494 +    SDIO_STATUS status;
74495 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
74496 +
74497 +    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74498 +        /* protect request list */
74499 +    if (!SDIO_SUCCESS(status)) {
74500 +        return;
74501 +    }
74502 +
74503 +    if ((pBusContext->CurrentRequestAllocations <= pBusContext->MaxRequestAllocations) ||
74504 +         !(pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK)) {
74505 +            /* add it to the list */
74506 +        SDListAdd(&pBusContext->RequestList, &pReq->SDList);
74507 +            /* we will hold onto this one */
74508 +        pReq = NULL;
74509 +    } else {
74510 +            /* decrement count */
74511 +        pBusContext->CurrentRequestAllocations--;
74512 +    }
74513 +
74514 +    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74515 +
74516 +    if (pReq != NULL) {
74517 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free Request allocation (CR:%d,MR:%d)\n",
74518 +        pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
74519 +        if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
74520 +            KernelFreeIrqSafe(pReq);
74521 +        } else {
74522 +                /* we should never free the ones that were normally allocated */
74523 +            DBG_ASSERT(FALSE);
74524 +        }
74525 +    }
74526 +}
74527 +
74528 +/* allocate a request from the lookaside list */
74529 +PSDREQUEST AllocateRequest(void)
74530 +{
74531 +    PSDLIST  pItem;
74532 +    SDIO_STATUS status;
74533 +    PSDREQUEST pReq = NULL;
74534 +    ATOMIC_FLAGS internalflags;
74535 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
74536 +
74537 +
74538 +    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74539 +
74540 +    if (!SDIO_SUCCESS(status)) {
74541 +        return NULL;
74542 +    }
74543 +
74544 +    if (pBusContext->InitMask & RESOURCE_INIT) {
74545 +            /* check the list, we are now running... */
74546 +        pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
74547 +    } else {
74548 +            /* we are loading the list with requests at initialization */
74549 +        pItem = NULL;
74550 +    }
74551 +    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74552 +
74553 +    if (pItem != NULL) {
74554 +        pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
74555 +    } else {
74556 +        if (pBusContext->InitMask & RESOURCE_INIT) {
74557 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Request List empty..allocating new one (irq-safe) (CR:%d,MR:%d)\n",
74558 +            pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
74559 +                /* the resource list was already allocated, we must be running now.
74560 +                 * at run-time, we allocate using the safe IRQ */
74561 +            pReq = (PSDREQUEST)KernelAllocIrqSafe(sizeof(SDREQUEST));
74562 +                /* mark that this one was created using IRQ safe allocation */
74563 +            internalflags = SDBD_ALLOC_IRQ_SAFE_MASK;
74564 +        } else {
74565 +                /* use the normal allocation since we are called at initialization */
74566 +            pReq = (PSDREQUEST)KernelAlloc(sizeof(SDREQUEST));
74567 +            internalflags = 0;
74568 +        }
74569 +
74570 +        if (pReq != NULL) {
74571 +            pReq->InternalFlags = internalflags;
74572 +                /* keep track of allocations */
74573 +            status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74574 +            pBusContext->CurrentRequestAllocations++;
74575 +            status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74576 +        }
74577 +    }
74578 +
74579 +
74580 +    if (pReq != NULL) {
74581 +            /* preserve internal flags */
74582 +        internalflags = pReq->InternalFlags;
74583 +        ZERO_POBJECT(pReq);
74584 +        pReq->InternalFlags = internalflags;
74585 +    }
74586 +
74587 +    return pReq;
74588 +}
74589 +
74590 +void DestroySignal(PSIGNAL_ITEM pSignal)
74591 +{
74592 +   SignalDelete(&pSignal->Signal);
74593 +   KernelFree(pSignal);
74594 +}
74595 +
74596 +PSIGNAL_ITEM BuildSignal(void)
74597 +{
74598 +    PSIGNAL_ITEM pSignal;
74599 +
74600 +    pSignal = (PSIGNAL_ITEM)KernelAlloc(sizeof(SIGNAL_ITEM));
74601 +    if (pSignal != NULL) {
74602 +            /* initialize signal */
74603 +        if (!SDIO_SUCCESS(SignalInitialize(&pSignal->Signal))) {
74604 +            KernelFree(pSignal);
74605 +            pSignal = NULL;
74606 +        }
74607 +    }
74608 +    return pSignal;
74609 +}
74610 +/* free a signal*/
74611 +void FreeSignal(PSIGNAL_ITEM pSignal)
74612 +{
74613 +    SDIO_STATUS status;
74614 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
74615 +
74616 +    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74617 +
74618 +    if (!SDIO_SUCCESS(status)) {
74619 +        return;
74620 +    }
74621 +
74622 +    if (pBusContext->CurrentSignalAllocations <= pBusContext->MaxSignalAllocations) {
74623 +            /* add it to the list */
74624 +        SDListAdd(&pBusContext->SignalList, &pSignal->SDList);
74625 +            /* flag that we are holding onto it */
74626 +        pSignal = NULL;
74627 +    } else {
74628 +            /* decrement count */
74629 +        pBusContext->CurrentSignalAllocations--;
74630 +    }
74631 +
74632 +    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74633 +
74634 +    if (pSignal != NULL) {
74635 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free signal allocation (CS:%d,MS:%d)\n",
74636 +        pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
74637 +        DestroySignal(pSignal);
74638 +    }
74639 +}
74640 +
74641 +/* allocate a signal from the list */
74642 +PSIGNAL_ITEM AllocateSignal(void)
74643 +{
74644 +    PSDLIST         pItem;
74645 +    PSIGNAL_ITEM    pSignal;
74646 +    SDIO_STATUS status;
74647 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
74648 +
74649 +    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74650 +
74651 +    if (!SDIO_SUCCESS(status)) {
74652 +        return NULL;
74653 +    }
74654 +
74655 +    if (pBusContext->InitMask & RESOURCE_INIT) {
74656 +            /* check the list */
74657 +        pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
74658 +    } else {
74659 +            /* we are loading the list */
74660 +        pItem = NULL;
74661 +    }
74662 +
74663 +    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74664 +    if (pItem != NULL) {
74665 +            /* return the one from the list */
74666 +        pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
74667 +    } else {
74668 +        if (pBusContext->InitMask & RESOURCE_INIT) {
74669 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Signal List empty..allocating new one (CS:%d,MS:%d)\n",
74670 +            pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
74671 +        }
74672 +            /* just allocate one */
74673 +        pSignal = BuildSignal();
74674 +        status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
74675 +        if (pSignal != NULL) {
74676 +            pBusContext->CurrentSignalAllocations++;
74677 +        }
74678 +        status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
74679 +    }
74680 +
74681 +
74682 +    return pSignal;
74683 +}
74684 +
74685 +/*
74686 + * Issus Bus Request (exposed to function drivers)
74687 +*/
74688 +PSDREQUEST IssueAllocRequest(PSDDEVICE pDev)
74689 +{
74690 +    return AllocateRequest();
74691 +}
74692 +
74693 +/*
74694 + * Free Request (exposed to function drivers)
74695 +*/
74696 +void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq)
74697 +{
74698 +    FreeRequest(pReq);
74699 +}
74700 +
74701 +/*
74702 + * Issus Bus Request (exposed to function drivers)
74703 +*/
74704 +SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq)
74705 +{
74706 +    pReq->pFunction = pDev->pFunction;
74707 +    return IssueRequestToHCD(pDev->pHcd,pReq);
74708 +}
74709 +
74710 +
74711 +    /* completion routine for HCD configs, this is synchronized with normal bus requests */
74712 +static void HcdConfigComplete(PSDREQUEST pReq)
74713 +{
74714 +
74715 +    pReq->Status = CALL_HCD_CONFIG((PSDHCD)pReq->pDataBuffer, (PSDCONFIG)pReq->pCompleteContext);
74716 +
74717 +    SignalSet(&((PSIGNAL_ITEM)pReq->pHcdContext)->Signal);
74718 +}
74719 +
74720 +SDIO_STATUS SendSyncedHcdBusConfig(PSDDEVICE pDevice, PSDCONFIG pConfig)
74721 +{
74722 +    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
74723 +    PSDREQUEST      pReq = NULL;
74724 +    PSIGNAL_ITEM    pSignal = NULL;
74725 +
74726 +    do {
74727 +
74728 +        pSignal = AllocateSignal();
74729 +        if (NULL == pSignal) {
74730 +            status = SDIO_STATUS_NO_RESOURCES;
74731 +            break;
74732 +        }
74733 +
74734 +        pReq = AllocateRequest();
74735 +        if (NULL == pReq) {
74736 +            status = SDIO_STATUS_NO_RESOURCES;
74737 +            break;
74738 +        }
74739 +
74740 +            /* issue pseudo request to sync this with bus requests */
74741 +        pReq->pCompletion = HcdConfigComplete;
74742 +        pReq->pCompleteContext = pConfig;
74743 +            /* re-use hcd context to store the signal since this request
74744 +             * never actually goes to an HCD */
74745 +        pReq->pHcdContext = pSignal;
74746 +        pReq->pDataBuffer = pDevice->pHcd;
74747 +            /* flag this as barrier in case it may change the bus mode of the HCD */
74748 +        pReq->Flags = SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
74749 +        pReq->Status = SDIO_STATUS_SUCCESS;
74750 +
74751 +            /* issue request */
74752 +        status = IssueRequestToHCD(pDevice->pHcd,pReq);
74753 +
74754 +    } while (FALSE);
74755 +
74756 +    if (SDIO_SUCCESS(status)) {
74757 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Config Request Sync-Op waiting....\n"));
74758 +        status = SignalWait(&pSignal->Signal);
74759 +
74760 +        if (SDIO_SUCCESS(status)) {
74761 +                /* return the result of the configuration request */
74762 +            status = pReq->Status;
74763 +        }
74764 +    }
74765 +
74766 +        /* cleanup */
74767 +    if (pReq != NULL) {
74768 +        FreeRequest(pReq);
74769 +    }
74770 +
74771 +    if (pSignal != NULL) {
74772 +        FreeSignal(pSignal);
74773 +    }
74774 +
74775 +    return status;
74776 +}
74777 +
74778 +/*
74779 + * Issus bus Configuration  (exposed to function drivers)
74780 +*/
74781 +SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig)
74782 +{
74783 +    SDIO_STATUS status;
74784 +    INT         cmdLength;
74785 +    UINT8       debugLevel = SDDBG_ERROR;
74786 +
74787 +    cmdLength = GET_SDCONFIG_CMD_LEN(pConfig);
74788 +    status = SDIO_STATUS_INVALID_PARAMETER;
74789 +
74790 +    do {
74791 +            /* check buffers and length */
74792 +        if (IS_SDCONFIG_CMD_GET(pConfig) || IS_SDCONFIG_CMD_PUT(pConfig)) {
74793 +            if ((GET_SDCONFIG_CMD_DATA(PVOID,pConfig) == NULL) || (0 == cmdLength)) {
74794 +                break;
74795 +            }
74796 +        }
74797 +
74798 +        switch (GET_SDCONFIG_CMD(pConfig)) {
74799 +            case SDCONFIG_FUNC_ACK_IRQ:
74800 +                status = SDFunctionAckInterrupt(pDev);
74801 +                break;
74802 +            case SDCONFIG_FUNC_ENABLE_DISABLE:
74803 +                if (cmdLength < sizeof(SDCONFIG_FUNC_ENABLE_DISABLE_DATA)) {
74804 +                    break;
74805 +                }
74806 +                status = SDEnableFunction(pDev,
74807 +                           GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_ENABLE_DISABLE_DATA,pConfig));
74808 +                break;
74809 +            case SDCONFIG_FUNC_UNMASK_IRQ:
74810 +                status = SDMaskUnmaskFunctionIRQ(pDev,FALSE);
74811 +                break;
74812 +            case SDCONFIG_FUNC_MASK_IRQ:
74813 +                status = SDMaskUnmaskFunctionIRQ(pDev,TRUE);
74814 +                break;
74815 +            case SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC:
74816 +                status = SDSPIModeEnableDisableCRC(pDev,FALSE);
74817 +                break;
74818 +            case SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC:
74819 +                status = SDSPIModeEnableDisableCRC(pDev,TRUE);
74820 +                break;
74821 +            case SDCONFIG_FUNC_ALLOC_SLOT_CURRENT:
74822 +                status = SDAllocFreeSlotCurrent(pDev,
74823 +                                                TRUE,
74824 +                                   GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_SLOT_CURRENT_DATA,pConfig));
74825 +                break;
74826 +            case SDCONFIG_FUNC_FREE_SLOT_CURRENT:
74827 +                status = SDAllocFreeSlotCurrent(pDev, FALSE, NULL);
74828 +                break;
74829 +            case SDCONFIG_FUNC_CHANGE_BUS_MODE:
74830 +
74831 +                status = SetOperationalBusMode(pDev,
74832 +                                               GET_SDCONFIG_CMD_DATA(PSDCONFIG_BUS_MODE_DATA,
74833 +                                               pConfig));
74834 +                break;
74835 +            case SDCONFIG_FUNC_NO_IRQ_PEND_CHECK:
74836 +                status = TryNoIrqPendingCheck(pDev);
74837 +                break;
74838 +            default:
74839 +
74840 +                if (GET_SDCONFIG_CMD(pConfig) & SDCONFIG_FLAGS_HC_CONFIG) {
74841 +                        /* synchronize config requests with busrequests */
74842 +                    status = SendSyncedHcdBusConfig(pDev,pConfig);
74843 +                } else {
74844 +                    DBG_PRINT(SDDBG_ERROR,
74845 +                        ("SDIO Bus Driver: IssueBusConfig - unknown command:0x%X \n",
74846 +                        GET_SDCONFIG_CMD(pConfig)));
74847 +                    status = SDIO_STATUS_INVALID_PARAMETER;
74848 +                }
74849 +                break;
74850 +        }
74851 +    } while(FALSE);
74852 +
74853 +    if (!SDIO_SUCCESS(status)) {
74854 +
74855 +           if(status == SDIO_STATUS_FUNC_ENABLE_TIMEOUT ){ /* reduce debug level to avoid timeout error messages */
74856 +                debugLevel = SDDBG_TRACE;
74857 +         }
74858 +
74859 +
74860 +         DBG_PRINT(debugLevel,
74861 +                ("SDIO Bus Driver: IssueBusConfig - Error in command:0x%X, Buffer:0x%X, Length:%d Err:%d\n",
74862 +                GET_SDCONFIG_CMD(pConfig),
74863 +                GET_SDCONFIG_CMD_DATA(INT,pConfig),
74864 +                cmdLength, status));
74865 +    }
74866 +    return status;
74867 +}
74868 +
74869 +/* start a request */
74870 +static INLINE SDIO_STATUS StartHcdRequest(PSDHCD pHcd, PSDREQUEST pReq)
74871 +{
74872 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
74873 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
74874 +
74875 +    if ((pReq->pFunction != NULL) && (pReq->pFunction->Flags & SDFUNCTION_FLAG_REMOVING)) {
74876 +        /* this device or function is going away, fail any new requests */
74877 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: StartHcdRequest, fail request 0x%X, device is removing\n", (UINT)pReq));
74878 +        pReq->Status = SDIO_STATUS_CANCELED;
74879 +        return SDIO_STATUS_SDREQ_QUEUE_FAILED;
74880 +    }
74881 +
74882 +    status = _AcquireHcdLock(pHcd);
74883 +
74884 +    if (!SDIO_SUCCESS(status)) {
74885 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to acquire HCD request lock: Err:%d\n", status));
74886 +        pReq->Status = SDIO_STATUS_SDREQ_QUEUE_FAILED;
74887 +        return SDIO_STATUS_SDREQ_QUEUE_FAILED;
74888 +    }
74889 +
74890 +    if (pReq->Flags & SDREQ_FLAGS_QUEUE_HEAD) {
74891 +            /* caller wants this request queued to the head */
74892 +
74893 +            /* a completion routine for a barrier request is called
74894 +             * while the queue is busy.  A barrier request can
74895 +             * insert a new request at the head of the queue */
74896 +        DBG_ASSERT(IsQueueBusy(&pHcd->RequestQueue));
74897 +        QueueRequestToFront(&pHcd->RequestQueue,pReq);
74898 +    } else {
74899 +            /* insert in queue at tail */
74900 +        QueueRequest(&pHcd->RequestQueue,pReq);
74901 +
74902 +            /* is queue busy ? */
74903 +        if (IsQueueBusy(&pHcd->RequestQueue)) {
74904 +                /* release lock */
74905 +            status = _ReleaseHcdLock(pHcd);
74906 +                /* controller is busy already, no need to call the hcd */
74907 +            return SDIO_STATUS_PENDING;
74908 +        }
74909 +            /* mark it as busy */
74910 +        MarkQueueBusy(&pHcd->RequestQueue);
74911 +    }
74912 +
74913 +        /* remove item from head and set current request */
74914 +    SET_CURRENT_REQUEST(pHcd, DequeueRequest(&pHcd->RequestQueue));
74915 +    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
74916 +        CHECK_HCD_RECURSE(pHcd, pHcd->pCurrentRequest);
74917 +    }
74918 +        /* release lock */
74919 +    status = _ReleaseHcdLock(pHcd);
74920 +        /* controller was not busy, call into HCD to process current request */
74921 +    status = CallHcdRequest(pHcd);
74922 +    return status;
74923 +}
74924 +
74925 +
74926 +/* used by CMD12,CMD13 to save the original completion routine */
74927 +#define GET_BD_RSV_REQUEST_COMPLETION(pR)   (PSDEQUEST_COMPLETION)(pR)->pBdRsv1
74928 +#define SET_BD_RSV_REQUEST_COMPLETION(pR,c) (pR)->pBdRsv1 = (PVOID)(c)
74929 +
74930 +/* used by CMD12 processing to save/restore the original data transfer status */
74931 +#define GET_BD_RSV_ORIG_STATUS(pR)          (SDIO_STATUS)(pR)->pBdRsv2
74932 +#define SET_BD_RSV_ORIG_STATUS(pR,s)        (pR)->pBdRsv2 = (PVOID)(s)
74933 +
74934 +/* used by CMD13 processing to get/set polling count */
74935 +#define GET_BD_RSV_STATUS_POLL_COUNT(pR)     (INT)(pR)->pBdRsv2
74936 +#define SET_BD_RSV_STATUS_POLL_COUNT(pR,s)   (pR)->pBdRsv2 = (PVOID)(s)
74937 +
74938 +/* used by CMD55 processing to save the second part of the request */
74939 +#define GET_BD_RSV_ORIG_REQ(pR)             (PSDREQUEST)(pR)->pBdRsv1
74940 +#define SET_BD_RSV_ORIG_REQ(pR,r)           (pR)->pBdRsv1 = (PVOID)(r)
74941 +
74942 +/* used by all to save HCD */
74943 +#define GET_BD_RSV_HCD(pR)                  (PSDHCD)(pR)->pBdRsv3
74944 +#define SET_BD_RSV_HCD(pR,h)                (pR)->pBdRsv3 = (PVOID)(h)
74945 +
74946 +static void CMD13CompletionBarrier(PSDREQUEST pReq);
74947 +
74948 +static INLINE void SetupCMD13(PSDHCD pHcd, PSDREQUEST pReq)
74949 +{
74950 +    pReq->Command = CMD13;
74951 +        /* sequence must be atomic, queue it to the head and flag as a barrier */
74952 +    pReq->Flags = SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
74953 +    if (IS_HCD_BUS_MODE_SPI(pHcd)) {
74954 +        pReq->Argument = 0;
74955 +        pReq->Flags |= SDREQ_FLAGS_RESP_R2;
74956 +    } else {
74957 +        pReq->Flags |= SDREQ_FLAGS_RESP_R1;
74958 +        pReq->Argument |= pHcd->CardProperties.RCA << 16;
74959 +    }
74960 +        /* insert completion */
74961 +    pReq->pCompletion = CMD13CompletionBarrier;
74962 +}
74963 +
74964 +/* CMD13 (GET STATUS) completion */
74965 +static void CMD13CompletionBarrier(PSDREQUEST pReq)
74966 +{
74967 +    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
74968 +    PSDHCD               pHcd = GET_BD_RSV_HCD(pReq);
74969 +    INT                  pollingCount = GET_BD_RSV_STATUS_POLL_COUNT(pReq);
74970 +    BOOL                 doCompletion = TRUE;
74971 +    UINT32               cardStatus;
74972 +
74973 +    DBG_ASSERT(pOrigCompletion != NULL);
74974 +    DBG_ASSERT(pHcd != NULL);
74975 +    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD13CompletionBarrier (cnt:%d) \n",pollingCount));
74976 +
74977 +    do {
74978 +        if (!SDIO_SUCCESS(pReq->Status)) {
74979 +            break;
74980 +        }
74981 +
74982 +        cardStatus = SD_R1_GET_CARD_STATUS(pReq->Response);
74983 +
74984 +        if (cardStatus & SD_CS_TRANSFER_ERRORS) {
74985 +            DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card transfer errors : 0x%X \n",cardStatus));
74986 +            pReq->Status = SDIO_STATUS_PROGRAM_STATUS_ERROR;
74987 +            break;
74988 +        }
74989 +
74990 +        if (SD_CS_GET_STATE(cardStatus) != SD_CS_STATE_PRG) {
74991 +            DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card programming done \n"));
74992 +            break;
74993 +        }
74994 +
74995 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Card still programming.. \n"));
74996 +        pollingCount--;
74997 +
74998 +        if (pollingCount < 0) {
74999 +            pReq->Status = SDIO_STATUS_PROGRAM_TIMEOUT;
75000 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: card programming timeout!\n"));
75001 +            break;
75002 +        }
75003 +
75004 +        doCompletion = FALSE;
75005 +            /* keep trying */
75006 +        SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
75007 +        SetupCMD13(pHcd,pReq);
75008 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: re-issuing CMD13 \n"));
75009 +            /* re-issue */
75010 +        IssueRequestToHCD(pHcd, pReq);
75011 +
75012 +    } while (FALSE);
75013 +
75014 +
75015 +    if (doCompletion) {
75016 +            /* restore original completion routine */
75017 +        pReq->pCompletion = pOrigCompletion;
75018 +            /* call original completion routine */
75019 +        pOrigCompletion(pReq);
75020 +    }
75021 +
75022 +    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD13CompletionBarrier \n"));
75023 +}
75024 +
75025 +/* command 13 (GET STATUS) preparation */
75026 +static void PrepCMD13Barrier(PSDREQUEST pReq)
75027 +{
75028 +    SDIO_STATUS status = pReq->Status;
75029 +    PSDHCD      pHcd = GET_BD_RSV_HCD(pReq);
75030 +    INT         pollingCount;
75031 +    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
75032 +
75033 +    DBG_ASSERT(pHcd != NULL);
75034 +    DBG_ASSERT(pOrigCompletion != NULL);
75035 +
75036 +    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD13Barrier \n"));
75037 +
75038 +    if (SDIO_SUCCESS(status)) {
75039 +            /* re-use the request for CMD13 */
75040 +        SetupCMD13(pHcd,pReq);
75041 +            /* set polling count to a multiple of the Block count, if the BlockCount was
75042 +             * zeroed by the HCD, then set it to 1X multiplier */
75043 +        pollingCount = max(pBusContext->CMD13PollingMultiplier,
75044 +                           pBusContext->CMD13PollingMultiplier * (INT)pReq->BlockCount);
75045 +            /* initialize count */
75046 +        SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
75047 +            /* re-issue it, we can call IssueRequest here since we are re-using the request */
75048 +        IssueRequestToHCD(pHcd, pReq);
75049 +    } else {
75050 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD13 bypassed.\n",status));
75051 +            /* call the original completion routine */
75052 +        pOrigCompletion(pReq);
75053 +    }
75054 +
75055 +    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD13Barrier (%d) \n",status));
75056 +}
75057 +
75058 +/* CMD12 completion */
75059 +static void CMD12Completion(PSDREQUEST pReq)
75060 +{
75061 +    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
75062 +
75063 +    DBG_ASSERT(pOrigCompletion != NULL);
75064 +
75065 +    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD12Completion \n"));
75066 +
75067 +        /* restore original completion routine */
75068 +    pReq->pCompletion = pOrigCompletion;
75069 +
75070 +    if (SDIO_SUCCESS(pReq->Status)) {
75071 +            /* if CMD12 succeeds, we want to return the result of the original
75072 +             * request */
75073 +        pReq->Status = GET_BD_RSV_ORIG_STATUS(pReq);
75074 +        DBG_PRINT(SDIODBG_REQUESTS,
75075 +                ("SDIO Bus Driver: PrepCMD12Completion original status %d \n",pReq->Status));
75076 +    }
75077 +        /* call original completion routine */
75078 +    pOrigCompletion(pReq);
75079 +
75080 +    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD12Completion \n"));
75081 +}
75082 +
75083 +/* CMD12 preparation */
75084 +static void PrepCMD12Barrier(PSDREQUEST pReq)
75085 +{
75086 +
75087 +    SDIO_STATUS status = pReq->Status;
75088 +    PSDHCD               pHcd = GET_BD_RSV_HCD(pReq);
75089 +    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
75090 +
75091 +    DBG_ASSERT(pHcd != NULL);
75092 +    DBG_ASSERT(pOrigCompletion != NULL);
75093 +
75094 +    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD12Barrier \n"));
75095 +
75096 +    if (SDIO_SUCCESS(status) ||    /* only issue CMD12 on success or specific bus errors */
75097 +        (SDIO_STATUS_BUS_READ_TIMEOUT == status) ||
75098 +        (SDIO_STATUS_BUS_READ_CRC_ERR == status) ||
75099 +        (SDIO_STATUS_BUS_WRITE_ERROR == status)) {
75100 +        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
75101 +            if (!ForceAllRequestsAsync()) {
75102 +                /* clear the call bit as an optimization, note clearing it wholesale here will
75103 +                 * allow request processing to recurse one more level */
75104 +                AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
75105 +            }
75106 +        }
75107 +            /* re-use the request for CMD12 */
75108 +        pReq->Command = CMD12;
75109 +        pReq->Argument = 0;
75110 +
75111 +            /* if the data transfer was successful, check for transfer check */
75112 +        if (SDIO_SUCCESS(status) &&
75113 +            (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS)) {
75114 +                /* original data request requires a transfer status check, which is another
75115 +                 * barrier request */
75116 +            pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER |
75117 +                          SDREQ_FLAGS_TRANS_ASYNC;
75118 +            DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier , chaining CMD13 \n"));
75119 +                /* switch out completion to send the CMD13 next */
75120 +            pReq->pCompletion = PrepCMD13Barrier;
75121 +        } else {
75122 +            pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_TRANS_ASYNC;
75123 +            pReq->pCompletion = CMD12Completion;
75124 +        }
75125 +
75126 +            /* save the original data transfer request status */
75127 +        SET_BD_RSV_ORIG_STATUS(pReq,status);
75128 +            /* re-issue it, we can call IssueRequest here since we are re-using the request */
75129 +        IssueRequestToHCD(pHcd, pReq);
75130 +    } else {
75131 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD12 bypassed.\n",status));
75132 +            /* call the original completion routine */
75133 +        pOrigCompletion(pReq);
75134 +    }
75135 +
75136 +    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier (%d) \n",status));
75137 +}
75138 +
75139 +
75140 +/* CMD55 barrier - this is a special barrier completion routine, we have to submit the second
75141 + * part of the command command sequence atomically */
75142 +static void CMD55CompletionBarrier(PSDREQUEST pReq)
75143 +{
75144 +    SDIO_STATUS status = pReq->Status;
75145 +    PSDREQUEST  pOrigReq = GET_BD_RSV_ORIG_REQ(pReq);
75146 +    PSDHCD      pHcd = GET_BD_RSV_HCD(pReq);
75147 +    BOOL        doCompletion = FALSE;
75148 +
75149 +    DBG_ASSERT(pOrigReq != NULL);
75150 +    DBG_ASSERT(pHcd != NULL);
75151 +
75152 +    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD55Completion \n"));
75153 +
75154 +    do {
75155 +
75156 +        if (!SDIO_SUCCESS(status)) {
75157 +                /* command 55 failed */
75158 +            pOrigReq->Status = status;
75159 +            doCompletion = TRUE;
75160 +            break;
75161 +        }
75162 +
75163 +        if (!(SD_R1_GET_CARD_STATUS(pReq->Response) & SD_CS_APP_CMD)) {
75164 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card is not accepting CMD55, status:0x%X \n",
75165 +                    SD_R1_GET_CARD_STATUS(pReq->Response)));
75166 +            pOrigReq->Status = SDIO_STATUS_INVALID_COMMAND;
75167 +            doCompletion = TRUE;
75168 +            break;
75169 +        }
75170 +
75171 +        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
75172 +            if (!ForceAllRequestsAsync()) {
75173 +                AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
75174 +            }
75175 +        }
75176 +
75177 +            /* flag the original request to queue to the head */
75178 +        pOrigReq->Flags |= SDREQ_FLAGS_QUEUE_HEAD;
75179 +            /* submit original request, we cannot call IssueRequestHCD() here because the
75180 +             * original request has already gone through IssueRequestHCD() already */
75181 +        status = StartHcdRequest(pHcd, pOrigReq);
75182 +
75183 +        if (SDIO_STATUS_PENDING == status) {
75184 +            break;
75185 +        }
75186 +
75187 +        pOrigReq->Status = status;
75188 +
75189 +        if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
75190 +                /* never made it to the queue */
75191 +            doCompletion = TRUE;
75192 +            break;
75193 +        }
75194 +
75195 +            /* request completed in-line */
75196 +        _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
75197 +
75198 +    } while (FALSE);
75199 +
75200 +    if (doCompletion) {
75201 +        DoRequestCompletion(pOrigReq, pHcd);
75202 +    }
75203 +
75204 +        /* free the CMD55 request */
75205 +    FreeRequest(pReq);
75206 +
75207 +    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD55Completion \n"));
75208 +}
75209 +
75210 +
75211 +/* synch completion routine */
75212 +static void SynchCompletion(PSDREQUEST pRequest)
75213 +{
75214 +    PSIGNAL_ITEM pSignal;
75215 +
75216 +    pSignal = (PSIGNAL_ITEM)pRequest->pCompleteContext;
75217 +    DBG_ASSERT(pSignal != NULL);
75218 +    if (!SDIO_SUCCESS(SignalSet(&pSignal->Signal))) {
75219 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SynchCompletion - signal failed \n"));
75220 +    }
75221 +
75222 +}
75223 +
75224 +/*
75225 + * Issue a request to the host controller
75226 + *
75227 + *
75228 + * The following flags are handled internally by the bus driver to guarantee atomicity.
75229 + *
75230 + *    SDREQ_FLAGS_APP_CMD - SD Extended commands requiring CMD55 to precede the actual command
75231 + *    SDREQ_FLAGS_AUTO_CMD12 - Memory Card Data transfer needs CMD12 to stop transfer
75232 + *                             (multi-block reads/writes)
75233 + *    SDREQ_FLAGS_AUTO_TRANSFER_STATUS - Memory card data transfer needs transfer status polling
75234 + *                                       using CMD13
75235 + *
75236 + *    These request flags require additional commands prepended or appended to the original command
75237 + *
75238 + *    The order of command execution :
75239 + *
75240 + *    Order  Condition                 Command Issued
75241 + *    -------------------------------------------------------------
75242 + *      1.   If APP_CMD                CMD55 issued.
75243 + *      2.   Always                    Caller command issued.
75244 + *      3.   If AUTO_CMD12             CMD12 issued.
75245 + *      4.   If AUTO_TRANSFER_STATUS   CMD13 issued until card programming is complete
75246 +*/
75247 +SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd, PSDREQUEST pReq)
75248 +{
75249 +    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
75250 +    PSIGNAL_ITEM    pSignal = NULL;
75251 +    BOOL            handleFailedReqSubmit = FALSE;
75252 +
75253 +    CLEAR_INTERNAL_REQ_FLAGS(pReq);
75254 +
75255 +    do {
75256 +            /* mark request in-use */
75257 +        ATOMIC_FLAGS internal = AtomicTest_Set(&pReq->InternalFlags, SDBD_PENDING);
75258 +        if (internal & (1<<SDBD_PENDING)) {
75259 +            DBG_ASSERT_WITH_MSG(FALSE,
75260 +                            "SDIO Bus Driver: IssueRequestToHCD - request already in use \n");
75261 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request already in use: 0x%X",(INT)pReq));
75262 +        }
75263 +
75264 +        if (!(pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC)) {
75265 +                /* caller wants synchronous operation, insert our completion routine */
75266 +            pReq->pCompletion = SynchCompletion;
75267 +            pSignal = AllocateSignal();
75268 +            if (NULL == pSignal) {
75269 +                status = SDIO_STATUS_NO_RESOURCES;
75270 +                pReq->Status = SDIO_STATUS_NO_RESOURCES;
75271 +                handleFailedReqSubmit = TRUE;
75272 +                    /* no need to continue */
75273 +                break;
75274 +            }
75275 +            pReq->pCompleteContext = (PVOID)pSignal;
75276 +        }
75277 +
75278 +        if ((pReq->Flags & SDREQ_FLAGS_AUTO_CMD12) &&
75279 +            !(pHcd->Attributes & SDHCD_ATTRIB_AUTO_CMD12) &&
75280 +            !(IS_HCD_BUS_MODE_SPI(pHcd) && IS_SDREQ_WRITE_DATA(pReq->Flags))) {
75281 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Auto CMD12 on Request:0x%08X \n",(INT)pReq));
75282 +                /* caller wants CMD12 auto-issued and the HCD does not support it */
75283 +                /* setup caller's request as a barrier and replace their completion routine */
75284 +            pReq->Flags |= SDREQ_FLAGS_BARRIER;
75285 +                /* take off the flag, since the BD will be issuing it */
75286 +            pReq->Flags &= ~SDREQ_FLAGS_AUTO_CMD12;
75287 +                /* save original completion */
75288 +            SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
75289 +                /* save the HCD we are on */
75290 +            SET_BD_RSV_HCD(pReq,pHcd);
75291 +                /* use completion for preping CMD12 */
75292 +            pReq->pCompletion = PrepCMD12Barrier;
75293 +        }
75294 +
75295 +        if (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS) {
75296 +            /* caller wants transfer status checked. If a CMD12
75297 +             * barrier request has been setup we let the CMD12 completion take care
75298 +             * of setting up the transfer check */
75299 +            if (pReq->pCompletion != PrepCMD12Barrier) {
75300 +                    /* make CMD13 prep a barrier */
75301 +                pReq->Flags |= SDREQ_FLAGS_BARRIER;
75302 +                    /* save original completion */
75303 +                SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
75304 +                    /* save the HCD we are on */
75305 +                SET_BD_RSV_HCD(pReq,pHcd);
75306 +                    /* use completion for preping CMD13 */
75307 +                pReq->pCompletion = PrepCMD13Barrier;
75308 +            }
75309 +        }
75310 +
75311 +            /* check app command, the two command sequence must be handled atomically */
75312 +        if (pReq->Flags & SDREQ_FLAGS_APP_CMD) {
75313 +            PSDREQUEST      pCmd55;
75314 +                /* allocate request to handle initial CMD55 command */
75315 +            pCmd55 = AllocateRequest();
75316 +            if (NULL == pCmd55) {
75317 +                status = SDIO_STATUS_NO_RESOURCES;
75318 +                pReq->Status = SDIO_STATUS_NO_RESOURCES;
75319 +                    /* complete the caller's request with error */
75320 +                handleFailedReqSubmit = TRUE;
75321 +                    /* no need to continue */
75322 +                break;
75323 +            }
75324 +                /* first submit CMD55 */
75325 +                /* set RCA */
75326 +            pCmd55->Argument = pHcd->CardProperties.RCA << 16;
75327 +                /* mark as a barrier request */
75328 +            pCmd55->Flags = SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
75329 +            pCmd55->Command = CMD55;
75330 +                /* call our barrier completion routine when done */
75331 +            pCmd55->pCompletion = CMD55CompletionBarrier;
75332 +                /* save request and target HCD */
75333 +            SET_BD_RSV_ORIG_REQ(pCmd55,pReq);
75334 +            SET_BD_RSV_HCD(pCmd55,pHcd);
75335 +                /* recursively start the CMD55 request, since the CMD55 is a barrier
75336 +                 * request, it's completion routine will submit the actual request
75337 +                 * atomically */
75338 +            status = IssueRequestToHCD(pHcd, pCmd55);
75339 +
75340 +        } else {
75341 +                /* start the normal request */
75342 +            status = StartHcdRequest(pHcd,pReq);
75343 +        }
75344 +
75345 +
75346 +        if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
75347 +            handleFailedReqSubmit = TRUE;
75348 +                /* no need to continue, clean up at the end */
75349 +            break;
75350 +        }
75351 +
75352 +            /* at this point, the request was either queued or was processed by the
75353 +             * HCD */
75354 +
75355 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: HCD returned status:%d on request: 0x%X, (CMD:%d) \n",
75356 +                  status, (INT)pReq, pReq->Command));
75357 +
75358 +        if (status != SDIO_STATUS_PENDING) {
75359 +            /* the HCD completed the request within the HCD request callback,
75360 +             * check and see if this is a synchronous request */
75361 +            if (pSignal != NULL) {
75362 +                    /* it was synchronous */
75363 +                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal wait bypassed \n"));
75364 +                    /* NULL out completion info, there's no need to
75365 +                     * signal the semaphore */
75366 +                pReq->pCompletion = NULL;
75367 +
75368 +            } else {
75369 +                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation completed in-line \n"));
75370 +                    /* this was an async call, always return pending */
75371 +                status = SDIO_STATUS_PENDING;
75372 +            }
75373 +                /* process this completed transfer on behalf of the HCD */
75374 +            _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
75375 +
75376 +                /* done processing */
75377 +            break;
75378 +        }
75379 +                /* I/O is now pending, could be sync or async */
75380 +                /* check for synch op */
75381 +        if (pSignal != NULL) {
75382 +                /* wait for completion */
75383 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal waiting....\n"));
75384 +                /* this is not interruptable, as the HCD must complete it. */
75385 +            status = SignalWait(&pSignal->Signal);
75386 +                /* don't need the signal anymore */
75387 +            FreeSignal(pSignal);
75388 +            pSignal = NULL;
75389 +
75390 +            /* note: it is safe to touch pReq since we own
75391 +             * the completion routine for synch transfers */
75392 +
75393 +                /* check signal wait status */
75394 +            if (!SDIO_SUCCESS(status)) {
75395 +                DBG_PRINT(SDDBG_TRACE,
75396 +                ("SDIO Bus Driver - IssueRequestToHCD: Synch transfer - signal wait failed, cancelling req 0X%X\n",
75397 +                (UINT)pReq));
75398 +                pReq->Status = SDIO_STATUS_CANCELED;
75399 +                status = SDIO_STATUS_CANCELED;
75400 +                break;
75401 +            }
75402 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op woke up\n"));
75403 +                /* return the completion status of the request */
75404 +            status = pReq->Status;
75405 +        } else {
75406 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation Pending \n"));
75407 +        }
75408 +
75409 +    } while (FALSE);
75410 +
75411 +        /* see if we need to clean up failed submissions */
75412 +    if (handleFailedReqSubmit) {
75413 +            /* make sure this is cleared */
75414 +        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
75415 +            /* the  request processing failed before it was submitted to the HCD */
75416 +            /* note: since it never made it to the queue we can touch pReq */
75417 +        if (pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC) {
75418 +            /* for ASYNC requests, we need to call the completion routine */
75419 +            DoRequestCompletion(pReq, pHcd);
75420 +                /* return pending for all ASYNC requests */
75421 +            status = SDIO_STATUS_PENDING;
75422 +        }
75423 +    }
75424 +
75425 +        /* check if we need to clean up the signal */
75426 +    if (pSignal != NULL) {
75427 +            /* make sure this is freed */
75428 +        FreeSignal(pSignal);
75429 +    }
75430 +        /* return status */
75431 +    return status;
75432 +}
75433 +
75434 +/* documentation for configuration requests */
75435 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75436 +  @function: Enable or Disable the SDIO Function
75437 +
75438 +  @function name: SDCONFIG_FUNC_ENABLE_DISABLE
75439 +  @prototype: SDCONFIG_FUNC_ENABLE_DISABLE
75440 +  @category: PD_Reference
75441 +
75442 +  @input:  SDCONFIG_FUNC_ENABLE_DISABLE_DATA - Enable Data structure
75443 +
75444 +  @output: none
75445 +
75446 +  @return: SDIO Status
75447 +
75448 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75449 +          uses the SDCONFIG_FUNC_ENABLE_DISABLE_DATA structure.  The caller must set the
75450 +          EnableFlags and specify the TimeOut value in milliseconds.   The TimeOut
75451 +          value is used for polling the I/O ready bit.  This command returns a status
75452 +          of SDIO_STATUS_FUNC_ENABLE_TIMEOUT if the ready bit was not set/cleared
75453 +          by the card within the timeout period.
75454 +
75455 +  @example: Example of enabling an I/O function:
75456 +        fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
75457 +        fData.TimeOut = 500;
75458 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75459 +                                   SDCONFIG_FUNC_ENABLE_DISABLE,
75460 +                                   &fData,
75461 +                                   sizeof(fData));
75462 +
75463 +  @see also: SDLIB_IssueConfig
75464 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75465 +
75466 +
75467 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75468 +  @function: Unmask the function's IRQ
75469 +
75470 +  @function name: SDCONFIG_FUNC_UNMASK_IRQ
75471 +  @prototype: SDCONFIG_FUNC_UNMASK_IRQ
75472 +  @category: PD_Reference
75473 +
75474 +  @input:  none
75475 +
75476 +  @output: none
75477 +
75478 +  @return: SDIO Status
75479 +
75480 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75481 +          unmasks the IRQ for the I/O function. This request sets the function's
75482 +          interrupt enable bit in the INTENABLE register in the
75483 +          common register space.
75484 +
75485 +  @example: Example of unmasking interrupt :
75486 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75487 +                                   SDCONFIG_FUNC_UNMASK_IRQ,
75488 +                                   NULL,
75489 +                                   0);
75490 +
75491 +  @see also: SDCONFIG_FUNC_MASK_IRQ
75492 +  @see also: SDLIB_IssueConfig
75493 +
75494 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75495 +
75496 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75497 +  @function: Mask the function's IRQ
75498 +
75499 +  @function name: SDCONFIG_FUNC_MASK_IRQ
75500 +  @prototype: SDCONFIG_FUNC_MASK_IRQ
75501 +  @category: PD_Reference
75502 +
75503 +  @input:  none
75504 +
75505 +  @output: none
75506 +
75507 +  @return: SDIO Status
75508 +
75509 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75510 +          masks the IRQ for the I/O function.
75511 +
75512 +  @example: Example of unmasking interrupt :
75513 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75514 +                                   SDCONFIG_FUNC_MASK_IRQ,
75515 +                                   NULL,
75516 +                                   0);
75517 +
75518 +  @see also: SDCONFIG_FUNC_UNMASK_IRQ
75519 +  @see also: SDLIB_IssueConfig
75520 +
75521 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75522 +
75523 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75524 +  @function: Acknowledge that the function's IRQ has been handled
75525 +
75526 +  @function name: SDCONFIG_FUNC_ACK_IRQ
75527 +  @prototype: SDCONFIG_FUNC_ACK_IRQ
75528 +  @category: PD_Reference
75529 +
75530 +  @input:  none
75531 +
75532 +  @output: none
75533 +
75534 +  @return: SDIO Status
75535 +
75536 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75537 +          indicates to the bus driver that the function driver has handled the
75538 +          interrupt.  The bus driver will notify the host controller to unmask the
75539 +          interrupt source.  SDIO interrupts are level triggered and are masked at the
75540 +          host controller level until all function drivers have indicated that they
75541 +          have handled their respective interrupt. This command can be issued in either
75542 +          the IRQ handler or asynchronous IRQ handler.
75543 +
75544 +  @example: Example of acknowledging an interrupt :
75545 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75546 +                                   SDCONFIG_FUNC_ACK_IRQ,
75547 +                                   NULL,
75548 +                                   0);
75549 +
75550 +  @see also: SDLIB_IssueConfig
75551 +
75552 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75553 +
75554 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75555 +  @function: Disable SD/MMC/SDIO card CRC checking.
75556 +
75557 +  @function name: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
75558 +  @prototype: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
75559 +  @category: PD_Reference
75560 +
75561 +  @input:  none
75562 +
75563 +  @output: none
75564 +
75565 +  @return: SDIO Status
75566 +
75567 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75568 +          issues CMD59 to disable SPI-CRC checking and requests the host controller
75569 +          driver to stop checking the CRC. This is typically used in systems where
75570 +          CRC checking is not required and performance is improved if the CRC checking
75571 +          is ommitted (i.e. SPI implementations without hardware CRC support).
75572 +
75573 +  @example: Example of disabling SPI CRC checking:
75574 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75575 +                                   SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC,
75576 +                                   NULL,
75577 +                                   0);
75578 +
75579 +  @see also: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
75580 +  @see also: SDLIB_IssueConfig
75581 +
75582 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75583 +
75584 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75585 +  @function: Enable SD/MMC/SDIO card CRC checking.
75586 +
75587 +  @function name: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
75588 +  @prototype: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
75589 +  @category: PD_Reference
75590 +
75591 +  @input:  none
75592 +
75593 +  @output: none
75594 +
75595 +  @return: SDIO Status
75596 +
75597 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75598 +          issues CMD59 to enable SPI-CRC checking and requests the host controller
75599 +          driver to generate valid CRCs for commands and data as well as
75600 +          check the CRC in responses and incomming data blocks.
75601 +
75602 +  @example: Example of enabling SPI CRC checking:
75603 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75604 +                                   SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC,
75605 +                                   NULL,
75606 +                                   0);
75607 +
75608 +  @see also: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
75609 +  @see also: SDLIB_IssueConfig
75610 +
75611 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75612 +
75613 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75614 +  @function: Allocate slot current for a card function.
75615 +
75616 +  @function name: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
75617 +  @prototype: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
75618 +  @category: PD_Reference
75619 +
75620 +  @input:  SDCONFIG_FUNC_SLOT_CURRENT_DATA
75621 +
75622 +  @output: SDCONFIG_FUNC_SLOT_CURRENT_DATA
75623 +
75624 +  @return: SDIO Status
75625 +
75626 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75627 +          requests an allocation of slot current to satisfy the power requirements
75628 +          of the function.  The command uses the SDCONFIG_FUNC_SLOT_CURRENT_DATA
75629 +          data structure to pass the required current in mA. Slot current allocation
75630 +          is not cummulative and this command should only be issued once by each function
75631 +          driver with the worse case slot current usage.
75632 +          The command returns SDIO_STATUS_NO_RESOURCES if the
75633 +          requirement cannot be met by the host hardware.  The SlotCurrent field will
75634 +          contain the remaining current available to the slot.  The slot current should
75635 +          be allocated before the function is enabled using SDCONFIG_FUNC_ENABLE_DISABLE.
75636 +          When a function driver is unloaded it should free the slot current allocation
75637 +          by using the SDCONFIG_FUNC_FREE_SLOT_CURRENT command.
75638 +
75639 +  @example: Example of allocating slot current:
75640 +        slotCurrent.SlotCurrent = 150;  // 150 mA
75641 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75642 +                                   SDCONFIG_FUNC_ALLOC_SLOT_CURRENT,
75643 +                                   &slotCurrent,
75644 +                                   sizeof(slotCurrent));
75645 +
75646 +
75647 +  @see also: SDCONFIG_FUNC_FREE_SLOT_CURRENT
75648 +  @see also: SDLIB_IssueConfig
75649 +
75650 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75651 +
75652 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75653 +  @function: Free slot current for a card function.
75654 +
75655 +  @function name: SDCONFIG_FUNC_FREE_SLOT_CURRENT
75656 +  @prototype: SDCONFIG_FUNC_FREE_SLOT_CURRENT
75657 +  @category: PD_Reference
75658 +
75659 +  @input:  none
75660 +
75661 +  @output: none
75662 +
75663 +  @return: SDIO Status
75664 +
75665 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75666 +          frees the allocated current for a card function.  This command should be
75667 +          issued only once (per function) and only after an allocation was successfully made.
75668 +
75669 +  @example: Example of freeing slot current:
75670 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75671 +                                   SDCONFIG_FUNC_FREE_SLOT_CURRENT,
75672 +                                   NULL,
75673 +                                   0);
75674 +
75675 +  @see also: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
75676 +  @see also: SDLIB_IssueConfig
75677 +
75678 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75679 +
75680 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75681 +  @function: Set the bus mode for the SD/SDIO card.
75682 +
75683 +  @function name: SDCONFIG_FUNC_CHANGE_BUS_MODE
75684 +  @prototype: SDCONFIG_FUNC_CHANGE_BUS_MODE
75685 +  @category: PD_Reference
75686 +
75687 +  @input:  none
75688 +
75689 +  @output: none
75690 +
75691 +  @return: SDIO Status
75692 +
75693 +  @notes:     This command code is used in the SDLIB_IssueConfig() API.  The command
75694 +          alters the card's bus mode (width and clock rate) to a driver specified
75695 +          value.  The driver must read the current bus mode flags, modify if necessary
75696 +          and pass the value in the SDCONFIG_BUS_MODE_DATA structure.
75697 +              If the bus width is changed (1 or 4 bit) the caller must adjust the mode flags
75698 +          for the new width. Cards cannot be switched between 1/4 bit and SPI mode.
75699 +          Switching to or from SPI mode requires a power cycle. Adjustments to the clock
75700 +          rate is immediate on the next bus transaction.  The actual clock rate value is
75701 +          limited by the host controller and is reported in the ClockRate field when the
75702 +          command completes successfully.
75703 +              The bus mode change is card wide and may affect other SDIO functions on
75704 +          multi-function cards. Use this feature with caution. This feature should NOT be
75705 +          used to dynamically control clock rates during runtime and should only be used
75706 +          at card initialization. Changing the bus mode must be done with SDIO function
75707 +          interrupts masked.
75708 +              This request can block and must only be called from a schedulable context.
75709 +
75710 +  @example: Example of changing the clock rate:
75711 +    SDCONFIG_BUS_MODE_DATA  busSettings;
75712 +    ZERO_OBJECT(busSettings);
75713 +       // get current bus flags and keep the same bus width
75714 +    busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(pInstance->pDevice);
75715 +    busSettings.ClockRate = 8000000;  // adjust clock to 8 Mhz
75716 +       // issue config request to override clock rate
75717 +    status = SDLIB_IssueConfig(pInstance->pDevice,
75718 +                               SDCONFIG_FUNC_CHANGE_BUS_MODE,
75719 +                               &busSettings,
75720 +                               sizeof(SDCONFIG_BUS_MODE_DATA));
75721 +
75722 +  @see also: SDDEVICE_GET_BUSMODE_FLAGS
75723 +  @see also: SDLIB_IssueConfig
75724 +
75725 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75726 +
75727 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75728 +  @function: Get the debug level of the underlying host controller driver.
75729 +
75730 +  @function name: SDCONFIG_GET_HCD_DEBUG
75731 +  @prototype: SDCONFIG_GET_HCD_DEBUG
75732 +  @category: PD_Reference
75733 +
75734 +  @input:  none
75735 +
75736 +  @output: CT_DEBUG_LEVEL
75737 +
75738 +  @return: SDIO Status
75739 +
75740 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75741 +          requests the current debug level of the HCD driver.  This API is useful for
75742 +          saving the current debug level of the HCD prior to issuing SDCONFIG_SET_HCD_DEBUG
75743 +          in order to increase the verbosity of the HCD. This API should be used only for
75744 +          debugging purposes.  If multiple functions attempt to save and set the HCD debug
75745 +          level simultanously, the final debug level will be unknown. Not all HCDs support
75746 +          this command.
75747 +
75748 +  @example: Example of saving the debug level:
75749 +        CT_DEBUG_LEVEL savedDebug;
75750 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75751 +                                   SDCONFIG_GET_HCD_DEBUG,
75752 +                                   &savedDebug,
75753 +                                   sizeof(savedDebug));
75754 +
75755 +  @see also: SDCONFIG_SET_HCD_DEBUG
75756 +  @see also: SDLIB_IssueConfig
75757 +
75758 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75759 +
75760 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75761 +  @function: Set the debug level of the underlying host controller driver.
75762 +
75763 +  @function name: SDCONFIG_SET_HCD_DEBUG
75764 +  @prototype: SDCONFIG_SET_HCD_DEBUG
75765 +  @category: PD_Reference
75766 +
75767 +  @input:  CT_DEBUG_LEVEL
75768 +
75769 +  @output: none
75770 +
75771 +  @return: SDIO Status
75772 +
75773 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
75774 +          sets the current debug level of the HCD driver.  This API is useful for
75775 +          setting the debug level of the HCD programatically for debugging purposes.
75776 +          If multiple functions attempt to save and set the HCD debug
75777 +          level simultanously, the final debug level will be unknown. Not all HCDs support
75778 +          this request.
75779 +
75780 +  @example: Example of setting the debug level:
75781 +        CT_DEBUG_LEVEL setDebug = 15;
75782 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75783 +                                   SDCONFIG_GET_HCD_DEBUG,
75784 +                                   &setDebug,
75785 +                                   sizeof(setDebug));
75786 +
75787 +  @see also: SDCONFIG_GET_HCD_DEBUG
75788 +  @see also: SDLIB_IssueConfig
75789 +
75790 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75791 +
75792 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75793 +  @function: Instruct the bus driver to not check the SDIO card interrupt pending
75794 +             register on card interrupts, if possible.
75795 +
75796 +  @function name: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
75797 +  @prototype: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
75798 +  @category: PD_Reference
75799 +
75800 +  @input:  none
75801 +
75802 +  @output: none
75803 +
75804 +  @return: SDIO Status
75805 +
75806 +  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command instructs the
75807 +          bus driver to skip checking the card interrupt pending register on each card
75808 +          interrupt.  The bus driver will assume the function is interrupting and immediately start
75809 +          the interrupt processing stage. This option is only valid for single function cards.
75810 +          The bus driver will reject the command for a card with more than 1 function.
75811 +          For single function cards, this can improve interrupt response time.
75812 +
75813 +  @example: Example of skipping IRQ pending checks:
75814 +
75815 +        status = SDLIB_IssueConfig(pInstance->pDevice,
75816 +                                   SDCONFIG_FUNC_NO_IRQ_PEND_CHECK,
75817 +                                   NULL,
75818 +                                   0);
75819 +
75820 +  @see also: SDLIB_IssueConfig
75821 +
75822 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75823 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_events.c
75824 ===================================================================
75825 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
75826 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_events.c       2008-12-11 22:46:49.000000000 +0100
75827 @@ -0,0 +1,1040 @@
75828 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
75829 +@file: sdio_bus_events.c
75830 +
75831 +@abstract: OS independent bus driver support
75832 +
75833 +#notes: this file contains various event handlers and helpers
75834 +
75835 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
75836 +
75837 +
75838 + *
75839 + *  This program is free software; you can redistribute it and/or modify
75840 + *  it under the terms of the GNU General Public License version 2 as
75841 + *  published by the Free Software Foundation;
75842 + *
75843 + *  Software distributed under the License is distributed on an "AS
75844 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
75845 + *  implied. See the License for the specific language governing
75846 + *  rights and limitations under the License.
75847 + *
75848 + *  Portions of this code were developed with information supplied from the
75849 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
75850 + *
75851 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
75852 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
75853 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
75854 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
75855 + *   Specification may require a license from the SD Card Association or other third parties.
75856 + *   Disclaimers:
75857 + *   The information contained in the Simplified Specification is presented only as a standard
75858 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
75859 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
75860 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
75861 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
75862 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
75863 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
75864 + *   information, know-how or other confidential information to any third party.
75865 + *
75866 + *
75867 + *  The initial developers of the original code are Seung Yi and Paul Lever
75868 + *
75869 + *  sdio@atheros.com
75870 + *
75871 + *
75872 +
75873 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
75874 +#define MODULE_NAME  SDBUSDRIVER
75875 +#include <linux/sdio/ctsystem.h>
75876 +#include <linux/sdio/sdio_busdriver.h>
75877 +#include <linux/sdio/sdio_lib.h>
75878 +#include "_busdriver.h"
75879 +#include <linux/sdio/_sdio_defs.h>
75880 +#include <linux/sdio/mmc_defs.h>
75881 +
75882 +static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,
75883 +                                   PBOOL  pCardPresent);
75884 +static void GetPendingIrqComplete(PSDREQUEST pReq);
75885 +static void ProcessPendingIrqs(PSDHCD  pHcd, UINT8 IntPendingMsk);
75886 +
75887 +/*
75888 + * DeviceDetach - tell core a device was removed from a slot
75889 +*/
75890 +SDIO_STATUS DeviceDetach(PSDHCD pHcd)
75891 +{
75892 +    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
75893 +
75894 +    ZERO_OBJECT(irqData);
75895 +
75896 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceDetach\n"));
75897 +        /* tell any function drivers we are gone */
75898 +    RemoveHcdFunctions(pHcd);
75899 +        /* delete the devices associated with this HCD */
75900 +    DeleteDevices(pHcd);
75901 +        /* check and see if there are any IRQs that were left enabled */
75902 +    if (pHcd->IrqsEnabled) {
75903 +        irqData.SlotIRQEnable = FALSE;
75904 +            /* turn off IRQ detection in HCD */
75905 +        _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,(PVOID)&irqData, sizeof(irqData));
75906 +    }
75907 +
75908 +        /* reset hcd state */
75909 +    ResetHcdState(pHcd);
75910 +
75911 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceDetach\n"));
75912 +    return SDIO_STATUS_SUCCESS;
75913 +}
75914 +
75915 +/*
75916 + * DeviceAttach - tell core a device was inserted into a slot
75917 +*/
75918 +SDIO_STATUS DeviceAttach(PSDHCD pHcd)
75919 +{
75920 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
75921 +    PSDDEVICE pDevice = NULL;
75922 +    UINT      ii;
75923 +
75924 +
75925 +    if (IS_CARD_PRESENT(pHcd)) {
75926 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach called on occupied slot!\n"));
75927 +        return SDIO_STATUS_ERROR;
75928 +    }
75929 +
75930 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceAttach bdctxt:0x%X \n", (UINT32)pBusContext));
75931 +
75932 +    if (IS_HCD_RAW(pHcd)) {
75933 +         DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: RAW HCD (%s) device attach \n",pHcd->pName));
75934 +            /* this is a raw HCD */
75935 +        memset(&pHcd->CardProperties,0,sizeof(pHcd->CardProperties));
75936 +        pHcd->CardProperties.Flags = CARD_RAW;
75937 +        pHcd->CardProperties.IOFnCount = 0;
75938 +          /* for raw HCD, set up minimum parameters
75939 +           * since we cannot determine these values using any standard, use values
75940 +           * reported by the HCD */
75941 +            /* the operational rate is just the max clock rate reported */
75942 +        pHcd->CardProperties.OperBusClock =  pHcd->MaxClockRate;
75943 +            /* the max bytes per data transfer is just the max bytes per block */
75944 +        pHcd->CardProperties.OperBlockLenLimit = pHcd->MaxBytesPerBlock;
75945 +            /* if the raw HCD uses blocks to transfer, report the operational size
75946 +             * from the HCD max value */
75947 +        pHcd->CardProperties.OperBlockCountLimit = pHcd->MaxBlocksPerTrans;
75948 +            /* set the slot preferred voltage */
75949 +        pHcd->CardProperties.CardVoltage = pHcd->SlotVoltagePreferred;
75950 +    } else {
75951 +            /* initialize this card and get card properties  */
75952 +        if (!SDIO_SUCCESS((status = SDInitializeCard(pHcd)))) {
75953 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, failed to initialize card, %d\n",
75954 +                                   status));
75955 +            return status;
75956 +        }
75957 +    }
75958 +
75959 +        /* check for SD or MMC, this must be done first as the query may involve
75960 +         * de-selecting the card */
75961 +    do {
75962 +        if (!(pHcd->CardProperties.Flags & (CARD_MMC | CARD_SD | CARD_RAW))) {
75963 +                /* none of these were discovered */
75964 +            break;
75965 +        }
75966 +        pDevice = AllocateDevice(pHcd);
75967 +        if (NULL == pDevice) {
75968 +            break;
75969 +        }
75970 +        if (pHcd->CardProperties.Flags & CARD_RAW) {
75971 +                /* set function number to 1 for IRQ processing */
75972 +            SDDEVICE_SET_SDIO_FUNCNO(pDevice,1);
75973 +        } else {
75974 +                /* get the ID info for the SD/MMC Card */
75975 +            if (!SDIO_SUCCESS((status = SDQuerySDMMCInfo(pDevice)))) {
75976 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, query SDMMC Info failed \n"));
75977 +                FreeDevice(pDevice);
75978 +                break;
75979 +            }
75980 +        }
75981 +        AddDeviceToList(pDevice);
75982 +            /* look for a function driver to handle this card */
75983 +        ProbeForFunction(pDevice, pHcd);
75984 +    } while (FALSE);
75985 +
75986 +        /* create a device for each I/O function */
75987 +    for(ii= 1; ii <= pHcd->CardProperties.IOFnCount; ii++) {
75988 +        pDevice = AllocateDevice(pHcd);
75989 +        if (NULL == pDevice) {
75990 +            break;
75991 +        }
75992 +            /* set the function number */
75993 +        SDDEVICE_SET_SDIO_FUNCNO(pDevice,ii);
75994 +            /* get the ID info for each I/O function */
75995 +        if (!SDIO_SUCCESS((status = SDQuerySDIOInfo(pDevice)))) {
75996 +            DBG_PRINT(SDDBG_ERROR,
75997 +                    ("SDIO Bus Driver: DeviceAttach, could not query SDIO Info, funcNo:%d status:%d \n",
75998 +                    ii, status));
75999 +            FreeDevice(pDevice);
76000 +                /* keep loading other functions */
76001 +            continue;
76002 +        }
76003 +        AddDeviceToList(pDevice);
76004 +            /* look for a function driver to handle this card */
76005 +        ProbeForFunction(pDevice, pHcd);
76006 +    }
76007 +
76008 +
76009 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceAttach \n"));
76010 +    return status;
76011 +}
76012 +
76013 +static INLINE void CompleteRequestCheckCancel(PSDHCD pHcd, PSDREQUEST pReqToComplete)
76014 +{
76015 +    BOOL cancel = FALSE;
76016 +    PSDFUNCTION pFunc = NULL;
76017 +
76018 +        /* handle cancel of current request */
76019 +    if (pReqToComplete->Flags & SDREQ_FLAGS_CANCELED) {
76020 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - _SDIO_HandleHcdEvent: cancelling req 0X%X\n", (UINT)pReqToComplete));
76021 +        cancel = TRUE;
76022 +        pReqToComplete->Status = SDIO_STATUS_CANCELED;
76023 +        pFunc = pReqToComplete->pFunction;
76024 +        DBG_ASSERT(pFunc != NULL);
76025 +    }
76026 +
76027 +    DoRequestCompletion(pReqToComplete, pHcd);
76028 +
76029 +    if (cancel) {
76030 +        SignalSet(&pFunc->CleanupReqSig);
76031 +    }
76032 +}
76033 +
76034 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76035 +  @function: Indicate to the SDIO bus driver (core) of an event in the host controller
76036 +             driver.
76037 +
76038 +  @function name: SDIO_HandleHcdEvent
76039 +  @prototype: SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
76040 +  @category: HD_Reference
76041 +
76042 +  @input:  pHcd - the host controller structure that was registered
76043 +           HCD_EVENT - event code
76044 +
76045 +  @output: none
76046 +
76047 +  @return: SDIO_STATUS
76048 +
76049 +  @notes:
76050 +          The host controller driver can indicate asynchronous events by calling this
76051 +          function with an appropriate event code. Refer to the HDK help manual for
76052 +          more information on the event types
76053 +
76054 +  @example: Example of indicating a card insertion event:
76055 +            SDIO_HandleHcdEvent(&Hcd, EVENT_HCD_ATTACH);
76056 +
76057 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76058 +SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
76059 +{
76060 +    PSDREQUEST       pReq;
76061 +    PSDREQUEST       pReqToComplete = NULL;
76062 +    PSDREQUEST       pNextReq = NULL;
76063 +    SDIO_STATUS      status;
76064 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
76065 +
76066 +    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: _SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
76067 +                         Event, (UINT)pHcd));
76068 +
76069 +    if (Event == EVENT_HCD_TRANSFER_DONE) {
76070 +        pReq = GET_CURRENT_REQUEST(pHcd);
76071 +        if (NULL == pReq) {
76072 +            DBG_ASSERT(FALSE);
76073 +            return SDIO_STATUS_ERROR;
76074 +        }
76075 +
76076 +        status = _AcquireHcdLock(pHcd);
76077 +        if (SDIO_SUCCESS(status)) {
76078 +                /* null out the current request */
76079 +            SET_CURRENT_REQUEST(pHcd, NULL);
76080 +            status = _ReleaseHcdLock(pHcd);
76081 +        } else {
76082 +            DBG_PRINT(SDDBG_ERROR,
76083 +              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
76084 +            return SDIO_STATUS_ERROR;
76085 +        }
76086 +
76087 +            /* note: the queue is still marked busy to prevent other threads/tasks from starting
76088 +             * new requests while we are handling completion , some completed requests are
76089 +             * marked as barrier requests which must be handled atomically */
76090 +
76091 +        status = pReq->Status;
76092 +        DBG_PRINT(SDIODBG_REQUESTS,
76093 +            ("+SDIO Bus Driver: Handling Transfer Done (CMD:%d, Status:%d) from HCD:0x%08X \n",
76094 +                  pReq->Command, status, (INT)pHcd));
76095 +            /* check SPI mode conversion */
76096 +        if (IS_HCD_BUS_MODE_SPI(pHcd) && SDIO_SUCCESS(status)) {
76097 +            if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT) && !(pReq->Flags & SDREQ_FLAGS_PSEUDO) &&
76098 +                (GET_SDREQ_RESP_TYPE(pReq->Flags) != SDREQ_FLAGS_NO_RESP)) {
76099 +                ConvertSPI_Response(pReq, NULL);
76100 +            }
76101 +        }
76102 +
76103 +        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Completing Request:0x%08X \n",(INT)pReq));
76104 +
76105 +        if (!SDIO_SUCCESS(status) &&
76106 +            (status != SDIO_STATUS_CANCELED)  &&
76107 +            !(pReq->Flags & SDREQ_FLAGS_CANCELED) &&
76108 +            (pReq->RetryCount > 0)) {
76109 +                /* retry the request if it failed, was NOT cancelled and the retry count
76110 +                 * is greater than zero */
76111 +            pReq->RetryCount--;
76112 +            pReqToComplete = NULL;
76113 +                /* clear SPI converted flag */
76114 +            pReq->Flags &= ~SDREQ_FLAGS_RESP_SPI_CONVERTED;
76115 +            pNextReq = pReq;
76116 +        } else {
76117 +                /* complete the request */
76118 +            if (pReq->Flags & SDREQ_FLAGS_BARRIER) {
76119 +                    /* a barrier request must be completed before the next bus request is
76120 +                     * started */
76121 +                CompleteRequestCheckCancel(pHcd, pReq);
76122 +                if (!ForceAllRequestsAsync()) {
76123 +                    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
76124 +                            /* the request was completed, decrement recursion count */
76125 +                        status = _AcquireHcdLock(pHcd);
76126 +                        if (!SDIO_SUCCESS(status)) {
76127 +                            return status;
76128 +                        }
76129 +                        pHcd->Recursion--;
76130 +                        DBG_ASSERT(pHcd->Recursion >= 0);
76131 +                        status = _ReleaseHcdLock(pHcd);
76132 +                    } else {
76133 +                            /* reset bit */
76134 +                        AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
76135 +                    }
76136 +                }
76137 +                pReqToComplete = NULL;
76138 +            } else {
76139 +                    /* complete this after the next request has
76140 +                     * been started */
76141 +                pReqToComplete = pReq;
76142 +            }
76143 +        }
76144 +
76145 +            /* acquire the hcd lock to look at the queues */
76146 +        status = _AcquireHcdLock(pHcd);
76147 +        if (SDIO_SUCCESS(status)) {
76148 +            if (pReqToComplete != NULL) {
76149 +                    /* queue the request that was completed */
76150 +                QueueRequest(&pHcd->CompletedRequestQueue, pReqToComplete);
76151 +            }
76152 +            if (NULL == pNextReq) {
76153 +                    /* check the queue for the next request */
76154 +                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Checking queue.. \n"));
76155 +                    /* check to see if the HCD was already working on one.  This occurs if
76156 +                     * the current request being completed was a barrier request and the
76157 +                     * barrier completion routine submitted a new request to the head of the
76158 +                     * queue */
76159 +                if (GET_CURRENT_REQUEST(pHcd) == NULL) {
76160 +                    pNextReq = DequeueRequest(&pHcd->RequestQueue);
76161 +                    if (NULL == pNextReq) {
76162 +                            /* nothing in the queue, mark it not busy */
76163 +                        MarkQueueNotBusy(&pHcd->RequestQueue);
76164 +                        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Queue idle \n"));
76165 +                    } else {
76166 +                        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Next request in queue: 0x%X \n",
76167 +                            (INT)pNextReq));
76168 +                    }
76169 +                } else {
76170 +                    DBG_PRINT(SDIODBG_REQUESTS,
76171 +                        ("SDIO Bus Driver: Busy Queue from barrier request \n"));
76172 +                }
76173 +            }
76174 +
76175 +            if (pNextReq != NULL) {
76176 +                    /* a new request will be submitted to the HCD below,
76177 +                     * check recursion while we have the lock */
76178 +                if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
76179 +                    CHECK_HCD_RECURSE(pHcd,pNextReq);
76180 +                }
76181 +            }
76182 +            status = _ReleaseHcdLock(pHcd);
76183 +        } else {
76184 +            DBG_PRINT(SDDBG_ERROR,
76185 +              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
76186 +            return SDIO_STATUS_ERROR;
76187 +        }
76188 +            /* check for the next request to issue */
76189 +        if (pNextReq != NULL) {
76190 +            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Starting Next Request: 0x%X \n",
76191 +                        (INT)pNextReq));
76192 +            SET_CURRENT_REQUEST(pHcd,pNextReq);
76193 +            status = CallHcdRequest(pHcd);
76194 +                /* check and see if the HCD completed the request in the callback */
76195 +            if (status != SDIO_STATUS_PENDING) {
76196 +                    /* recurse and process the request */
76197 +                _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
76198 +            }
76199 +        }
76200 +
76201 +        /* now empty the completed request queue
76202 +         * - this guarantees in-order completion even during recursion */
76203 +        status = _AcquireHcdLock(pHcd);
76204 +        if (SDIO_SUCCESS(status)) {
76205 +            while (1) {
76206 +                pReqToComplete = DequeueRequest(&pHcd->CompletedRequestQueue);
76207 +                status = _ReleaseHcdLock(pHcd);
76208 +                if (pReqToComplete != NULL) {
76209 +                    CompleteRequestCheckCancel(pHcd, pReqToComplete);
76210 +                    if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
76211 +                        if (!ForceAllRequestsAsync()) {
76212 +                                /* reset bit */
76213 +                            AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
76214 +                        }
76215 +                    }
76216 +                        /* re-acquire lock */
76217 +                    status = _AcquireHcdLock(pHcd);
76218 +                    if (!SDIO_SUCCESS(status)) {
76219 +                        return SDIO_STATUS_ERROR;
76220 +                    }
76221 +                    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
76222 +                        if (!ForceAllRequestsAsync()) {
76223 +                            /* while we have the lock, decrement recursion count each time
76224 +                             * we complete a request */
76225 +                            pHcd->Recursion--;
76226 +                            DBG_ASSERT(pHcd->Recursion >= 0);
76227 +                        }
76228 +                    }
76229 +                }  else {
76230 +                        /* we're done */
76231 +                    break;
76232 +                }
76233 +            }
76234 +        } else {
76235 +            DBG_PRINT(SDDBG_ERROR,
76236 +              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
76237 +            return SDIO_STATUS_ERROR;
76238 +        }
76239 +        DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: Transfer Done Handled \n"));
76240 +        return SDIO_STATUS_SUCCESS;
76241 +    }
76242 +
76243 +    switch(Event) {
76244 +        case EVENT_HCD_ATTACH:
76245 +        case EVENT_HCD_DETACH:
76246 +                /* card detect helper does the actual attach detach */
76247 +            return PostCardDetectEvent(pBusContext,Event,pHcd);
76248 +        case EVENT_HCD_SDIO_IRQ_PENDING:
76249 +            return DeviceInterrupt(pHcd);
76250 +        default:
76251 +            DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: SDIO_HandleHcdEvent, invalid event type 0x%X, HCD:0x%X\n",
76252 +                                    Event, (UINT)pHcd));
76253 +        return SDIO_STATUS_INVALID_PARAMETER;
76254 +    }
76255 +
76256 +}
76257 +
76258 +/* card detect helper function */
76259 +THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper)
76260 +{
76261 +    SDIO_STATUS       status;
76262 +    HCD_EVENT_MESSAGE message;
76263 +    INT               length;
76264 +
76265 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - CardDetectHelperFunction starting up: 0x%X \n", (INT)pHelper));
76266 +
76267 +    while (1) {
76268 +
76269 +            /* wait for wake up event */
76270 +        status = SD_WAIT_FOR_WAKEUP(pHelper);
76271 +        if (!SDIO_SUCCESS(status)) {
76272 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - Card Detect Helper Semaphore Pend Error:%d \n",
76273 +                                    status));
76274 +            break;
76275 +        }
76276 +
76277 +        if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
76278 +                /* cleanup message queue on shutdown */
76279 +            while (1) {
76280 +                length = sizeof(message);
76281 +                    /* get a message */
76282 +                status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
76283 +                                          &message, &length);
76284 +                if (!SDIO_SUCCESS(status)) {
76285 +                    break;
76286 +                }
76287 +                if (message.pHcd != NULL) {
76288 +                        /* decrement HCD reference count */
76289 +                    OS_DecHcdReference(message.pHcd);
76290 +                }
76291 +            }
76292 +
76293 +            break;
76294 +        }
76295 +
76296 +        while (1) {
76297 +            length = sizeof(message);
76298 +                /* get a message */
76299 +            status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
76300 +                                      &message, &length);
76301 +            if (!SDIO_SUCCESS(status)) {
76302 +                break;
76303 +            }
76304 +
76305 +            switch (message.Event) {
76306 +                case EVENT_HCD_ATTACH:
76307 +                    DeviceAttach(message.pHcd);
76308 +                    break;
76309 +                case EVENT_HCD_DETACH:
76310 +                    DeviceDetach(message.pHcd);
76311 +                    break;
76312 +                case EVENT_HCD_CD_POLLING:
76313 +                        /* run detector */
76314 +                    RunCardDetect();
76315 +                    break;
76316 +                default:
76317 +                    DBG_ASSERT(FALSE);
76318 +                    break;
76319 +            }
76320 +
76321 +            if (message.pHcd != NULL) {
76322 +                    /* message was processed, decrement reference count */
76323 +                OS_DecHcdReference(message.pHcd);
76324 +            }
76325 +        }
76326 +    }
76327 +
76328 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - Card Detect Helper Exiting.. \n"));
76329 +    return 0;
76330 +}
76331 +
76332 +
76333 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76334 +  RunCardDetect - run card detect on host controller slots that require polling
76335 +  Input:
76336 +  Output:
76337 +  Return:
76338 +  Notes: This function is called from the card detect timer thread
76339 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76340 +void RunCardDetect(void)
76341 +{
76342 +    BOOL       CDPollingRequired = FALSE;
76343 +    PSDLIST    pListItem;
76344 +    PSDHCD     pHcd;
76345 +    BOOL       cardPresent;
76346 +
76347 +    DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: RunCardDetect\n"));
76348 +
76349 +       /* protect the HCD list */
76350 +    if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->HcdListSem))) {
76351 +        DBG_ASSERT(FALSE);
76352 +        return;  /* wait interrupted */
76353 +    }
76354 +        /* while we are running the detector we are blocking HCD removal*/
76355 +    SDITERATE_OVER_LIST(&pBusContext->HcdList, pListItem) {
76356 +        pHcd = CONTAINING_STRUCT(pListItem, SDHCD, SDList);
76357 +            /* does the HCD require polling ? */
76358 +        if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
76359 +            DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Found HCD requiring polling \n"));
76360 +                /* set flag to queue the timer */
76361 +            CDPollingRequired = TRUE;
76362 +            if (IS_CARD_PRESENT(pHcd)) {
76363 +                    /* there is a device in the slot */
76364 +                cardPresent = TRUE;
76365 +                if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
76366 +                    if (!cardPresent) {
76367 +                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Removal Detected\n"));
76368 +                        DeviceDetach(pHcd);
76369 +                    }
76370 +                }
76371 +            } else {
76372 +                cardPresent = FALSE;
76373 +                if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
76374 +                     if (cardPresent) {
76375 +                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Detected\n"));
76376 +                        DeviceAttach(pHcd);
76377 +                    }
76378 +                }
76379 +            }
76380 +        }
76381 +
76382 +        DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: moving to next hcd:0x%X \n",
76383 +                                     (INT)pListItem->pNext));
76384 +    }
76385 +
76386 +        /* check if we need to queue the timer */
76387 +    if (CDPollingRequired && !pBusContext->CDTimerQueued) {
76388 +        pBusContext->CDTimerQueued = TRUE;
76389 +        DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Queuing Card detect timer \n"));
76390 +        if (!SDIO_SUCCESS(
76391 +            QueueTimer(SDIOBUS_CD_TIMER_ID, pBusContext->CDPollingInterval))) {
76392 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: failed to queue CD timer \n"));
76393 +            pBusContext->CDTimerQueued = FALSE;
76394 +        }
76395 +    }
76396 +        /* release HCD list lock */
76397 +    SemaphorePost(&pBusContext->HcdListSem);
76398 +    DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: RunCardDetect\n"));
76399 +}
76400 +
76401 +
76402 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76403 +  ScanSlotForCard - scan slot for a card
76404 +  Input:  pHcd - the hcd
76405 +  Output: pCardPresent - card present flag (set/cleared on return)
76406 +  Return:
76407 +  Notes:
76408 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76409 +static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,PBOOL pCardPresent)
76410 +{
76411 +    SDIO_STATUS         status = SDIO_STATUS_SUCCESS;
76412 +    UINT8               temp;
76413 +
76414 +    DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: ScanSlotForCard\n"));
76415 +
76416 +    do {
76417 +        if (!IS_CARD_PRESENT(pHcd)) {
76418 +            INT   dbgLvl;
76419 +            dbgLvl = DBG_GET_DEBUG_LEVEL();
76420 +            DBG_SET_DEBUG_LEVEL(SDDBG_WARN);
76421 +            status = CardInitSetup(pHcd);
76422 +            DBG_SET_DEBUG_LEVEL(dbgLvl);
76423 +            if (!SDIO_SUCCESS(status)) {
76424 +                break;
76425 +            }
76426 +                /* issue go-idle */
76427 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
76428 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
76429 +            } else {
76430 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
76431 +            }
76432 +                /* try SDIO */
76433 +            status = TestPresence(pHcd,CARD_SDIO,NULL);
76434 +            if (SDIO_SUCCESS(status)) {
76435 +                *pCardPresent = TRUE;
76436 +                break;
76437 +            }
76438 +                /* issue go-idle */
76439 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
76440 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
76441 +            } else {
76442 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
76443 +            }
76444 +                /* try SD */
76445 +            status = TestPresence(pHcd,CARD_SD,NULL);
76446 +            if (SDIO_SUCCESS(status)) {
76447 +                *pCardPresent = TRUE;
76448 +                break;
76449 +            }
76450 +                /* issue go-idle */
76451 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
76452 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
76453 +            } else {
76454 +                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
76455 +            }
76456 +                /* try MMC */
76457 +            status = TestPresence(pHcd,CARD_MMC,NULL);
76458 +            if (SDIO_SUCCESS(status)) {
76459 +                *pCardPresent = TRUE;
76460 +                break;
76461 +            }
76462 +        } else {
76463 +            if (pHcd->CardProperties.Flags & CARD_SDIO) {
76464 +#ifdef DUMP_INT_PENDING
76465 +                temp = 0;
76466 +                    /* handy debug prints to check interrupt status and print pending register */
76467 +                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_ENABLE_REG, &temp);
76468 +                if (SDIO_SUCCESS(status) && (temp != 0)) {
76469 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Enable Reg: 0x%2.2X\n", temp));
76470 +                    status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_PENDING_REG, &temp);
76471 +                    if (SDIO_SUCCESS(status)) {
76472 +                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Pend Reg: 0x%2.2X\n", temp));
76473 +                    }
76474 +                }
76475 +#endif
76476 +                    /* for SDIO cards, read the revision register */
76477 +                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
76478 +            } else if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
76479 +                    /* for SD/MMC cards, issue SEND_STATUS */
76480 +                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
76481 +                        /* SPI uses the SPI R2 response */
76482 +                    status = _IssueSimpleBusRequest(pHcd,
76483 +                                                    CMD13,
76484 +                                                    0,
76485 +                                                    SDREQ_FLAGS_RESP_R2,
76486 +                                                    NULL);
76487 +                } else {
76488 +                    status = _IssueSimpleBusRequest(pHcd,
76489 +                                                    CMD13,
76490 +                                                    (pHcd->CardProperties.RCA << 16),
76491 +                                                    SDREQ_FLAGS_RESP_R1,NULL);
76492 +                }
76493 +            } else {
76494 +                DBG_ASSERT(FALSE);
76495 +            }
76496 +            if (!SDIO_SUCCESS(status)) {
76497 +                    /* card is gone */
76498 +                *pCardPresent = FALSE;
76499 +            }
76500 +        }
76501 +    } while (FALSE);
76502 +
76503 +    if (status == SDIO_STATUS_BUS_RESP_TIMEOUT) {
76504 +        status = SDIO_STATUS_SUCCESS;
76505 +    }
76506 +
76507 +    DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: ScanSlotForCard status:%d\n",
76508 +                                 status));
76509 +
76510 +    return status;
76511 +}
76512 +
76513 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76514 +  DeviceInterrupt - handle device interrupt
76515 +  Input:  pHcd -  host controller
76516 +  Output:
76517 +  Return:
76518 +  Notes:
76519 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76520 +SDIO_STATUS DeviceInterrupt(PSDHCD pHcd)
76521 +{
76522 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
76523 +    SDIO_STATUS status2;
76524 +    PSDREQUEST pReq = NULL;
76525 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
76526 +
76527 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: DeviceInterrupt\n"));
76528 +
76529 +    if (!IS_CARD_PRESENT(pHcd)) {
76530 +        DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: Device interrupt asserted on empty slot!\n"));
76531 +        return SDIO_STATUS_ERROR;
76532 +    }
76533 +
76534 +    do {
76535 +            /* for RAW HCDs or HCDs flagged for single-function IRQ optimization */
76536 +        if (IS_HCD_RAW(pHcd) || (pHcd->HcdFlags & (1 << HCD_IRQ_NO_PEND_CHECK))) {
76537 +            status = _AcquireHcdLock(pHcd);
76538 +            if (!SDIO_SUCCESS(status)) {
76539 +                return status;
76540 +            }
76541 +            if (pHcd->IrqProcState != SDHCD_IDLE) {
76542 +                status = SDIO_STATUS_ERROR;
76543 +                status2 = _ReleaseHcdLock(pHcd);
76544 +            } else {
76545 +                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver :  Device Interrupt \n"));
76546 +                    /* mark that we are processing */
76547 +                pHcd->IrqProcState = SDHCD_IRQ_PENDING;
76548 +                status2 = _ReleaseHcdLock(pHcd);
76549 +                    /* process Irqs for raw hcds or HCDs with the single function optimization */
76550 +                    /* force processing of function 1 interrupt */
76551 +                ProcessPendingIrqs(pHcd, (1 << 1));
76552 +            }
76553 +            DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
76554 +                /* done with RAW irqs */
76555 +            return status;
76556 +        }
76557 +
76558 +            /* pre-allocate a request to get the pending bits, we have to do this outside the
76559 +              * hcd lock acquisition */
76560 +        pReq = AllocateRequest();
76561 +
76562 +        if (NULL == pReq) {
76563 +            status = SDIO_STATUS_NO_RESOURCES;
76564 +            break;
76565 +        }
76566 +
76567 +        status = _AcquireHcdLock(pHcd);
76568 +
76569 +        if (!SDIO_SUCCESS(status)) {
76570 +            break;
76571 +        }
76572 +
76573 +        if (pHcd->IrqProcState != SDHCD_IDLE) {
76574 +            status = SDIO_STATUS_ERROR;
76575 +        } else {
76576 +                /* mark that we are processing */
76577 +            pHcd->IrqProcState = SDHCD_IRQ_PENDING;
76578 +                /* build argument to read IRQ pending register */
76579 +            SDIO_SET_CMD52_READ_ARG(pReq->Argument,0,SDIO_INT_PENDING_REG);
76580 +            pReq->Command = CMD52;
76581 +            pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
76582 +            pReq->pCompleteContext = (PVOID)pHcd;
76583 +            pReq->pCompletion = GetPendingIrqComplete;
76584 +            pReq->RetryCount = SDBUS_MAX_RETRY;
76585 +        }
76586 +
76587 +        status2 = _ReleaseHcdLock(pHcd);
76588 +
76589 +        if (!SDIO_SUCCESS(status2)) {
76590 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: lock release error: %d\n", status2));
76591 +        }
76592 +
76593 +    } while (FALSE);
76594 +
76595 +    if (SDIO_SUCCESS(status)) {
76596 +        DBG_ASSERT(pReq != NULL);
76597 +        IssueRequestToHCD(pHcd,pReq);
76598 +        status = SDIO_STATUS_PENDING;
76599 +    } else {
76600 +        if (pReq != NULL) {
76601 +            FreeRequest(pReq);
76602 +        }
76603 +    }
76604 +
76605 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
76606 +    return status;
76607 +}
76608 +
76609 +
76610 +/* SDIO IRQ helper */
76611 +THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper)
76612 +{
76613 +    PSDHCD            pHcd;
76614 +    SDIO_STATUS       status;
76615 +    PSDLIST           pListItem;
76616 +    PSDDEVICE         pDevice;
76617 +    UINT8             funcMask;
76618 +    PSDDEVICE         pDeviceIRQ[7];
76619 +    UINT              deviceIrqCount = 0;
76620 +    UINT              ii;
76621 +
76622 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction starting up \n"));
76623 +
76624 +    pHcd = (PSDHCD)pHelper->pContext;
76625 +    DBG_ASSERT(pHcd != NULL);
76626 +
76627 +    while (1) {
76628 +
76629 +            /* wait for wake up event */
76630 +        status = SD_WAIT_FOR_WAKEUP(pHelper);
76631 +
76632 +        if (!SDIO_SUCCESS(status)) {
76633 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - SDIOIrqHelperFunction Pend Error:%d \n",
76634 +                                    status));
76635 +            break;
76636 +        }
76637 +
76638 +        if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
76639 +            break;
76640 +        }
76641 +
76642 +        DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver - Pending IRQs:0x%X \n",
76643 +                                     pHcd->PendingHelperIrqs));
76644 +
76645 +         /* take the device list lock as we iterate through the list, this blocks
76646 +             * device removals */
76647 +        status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
76648 +        if (!SDIO_SUCCESS(status)) {
76649 +            break;
76650 +        }
76651 +            /* walk through the device list matching HCD and interrupting function */
76652 +        SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
76653 +            pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
76654 +                /* check if device belongs to the HCD */
76655 +            if (pDevice->pHcd != pHcd){
76656 +                    /* not on this hcd */
76657 +                continue;
76658 +            }
76659 +            funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
76660 +                /* check device function against the pending mask */
76661 +            if (!(funcMask & pHcd->PendingHelperIrqs)) {
76662 +                    /* this one is not scheduled for the helper */
76663 +                continue;
76664 +            }
76665 +                /* clear bit */
76666 +            pHcd->PendingHelperIrqs &= ~funcMask;
76667 +                /* check for sync IRQ and call handler */
76668 +            if (pDevice->pIrqFunction != NULL) {
76669 +                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling IRQ Handler. Fn:%d\n",
76670 +                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
76671 +                /* save the device so we can process it without holding any locks */
76672 +                pDeviceIRQ[deviceIrqCount++] = pDevice;
76673 +            } else {
76674 +                    /* this is actually okay if the device is removing, the callback
76675 +                     * is NULLed out */
76676 +                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No IRQ handler Fn:%d\n",
76677 +                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
76678 +            }
76679 +        }
76680 +            /* should have handled all these */
76681 +        DBG_ASSERT(pHcd->PendingHelperIrqs == 0);
76682 +        pHcd->PendingHelperIrqs = 0;
76683 +        SemaphorePost(&pBusContext->DeviceListSem);
76684 +        for (ii = 0; ii < deviceIrqCount; ii++) {
76685 +            /* now call the function */
76686 +            SDDEVICE_CALL_IRQ_HANDLER(pDeviceIRQ[ii]);
76687 +        }
76688 +        deviceIrqCount = 0;
76689 +    }
76690 +
76691 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction Exiting.. \n"));
76692 +    return 0;
76693 +}
76694 +
76695 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76696 +  GetPendingIrqComplete - completion routine for getting pending IRQs
76697 +  Input:  pRequest -  completed request
76698 +  Output:
76699 +  Return:
76700 +  Notes:
76701 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76702 +static void GetPendingIrqComplete(PSDREQUEST pReq)
76703 +{
76704 +    UINT8       intPendingMsk;
76705 +    PSDHCD      pHcd;
76706 +
76707 +    do {
76708 +        pHcd = (PSDHCD)pReq->pCompleteContext;
76709 +        DBG_ASSERT(pHcd != NULL);
76710 +
76711 +        if (!SDIO_SUCCESS(pReq->Status)) {
76712 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get Interrupt pending register Err:%d\n",
76713 +                                    pReq->Status));
76714 +            break;
76715 +        }
76716 +
76717 +        if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
76718 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: CMD52 resp error: 0x%X \n",
76719 +                                    SD_R5_GET_RESP_FLAGS(pReq->Response)));
76720 +            break;
76721 +        }
76722 +            /* extract the pending mask */
76723 +        intPendingMsk =  SD_R5_GET_READ_DATA(pReq->Response) & SDIO_INT_PEND_MASK;
76724 +            /* process them */
76725 +        ProcessPendingIrqs(pHcd, intPendingMsk);
76726 +
76727 +    } while (FALSE);
76728 +
76729 +    FreeRequest(pReq);
76730 +
76731 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: GetPendingIrqComplete \n"));
76732 +}
76733 +
76734 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76735 +  ProcessPendingIrqs - processing pending Irqs
76736 +  Input:  pHcd - host controller
76737 +  Input:  IntPendingMsk -  pending irq bit mask
76738 +  Output:
76739 +  Return:
76740 +  Notes:
76741 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76742 +static void ProcessPendingIrqs(PSDHCD pHcd, UINT8 IntPendingMsk)
76743 +{
76744 +    PSDLIST     pListItem;
76745 +    PSDDEVICE   pDevice;
76746 +    UINT8       funcMask;
76747 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
76748 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
76749 +
76750 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: ProcessPendingIrqs \n"));
76751 +    do {
76752 +            /* acquire lock to protect configuration and irq enables */
76753 +        status = _AcquireHcdLock(pHcd);
76754 +        if (!SDIO_SUCCESS(status)) {
76755 +            break;
76756 +        }
76757 +
76758 +            /* sanity check */
76759 +        if ((IntPendingMsk & pHcd->IrqsEnabled) != IntPendingMsk) {
76760 +            DBG_PRINT(SDDBG_ERROR,
76761 +                ("SDIO Bus Driver: IRQs asserting when not enabled : curr:0x%X , card reports: 0x%X\n",
76762 +                     pHcd->IrqsEnabled, IntPendingMsk));
76763 +                /* remove the pending IRQs that are not enabled */
76764 +            IntPendingMsk &= pHcd->IrqsEnabled;
76765 +                /* fall through */
76766 +        }
76767 +
76768 +        if (!IntPendingMsk) {
76769 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: No interrupts on HCD:0x%X \n", (INT)pHcd));
76770 +            pHcd->IrqProcState = SDHCD_IDLE;
76771 +            if (pHcd->IrqsEnabled) {
76772 +                    /* only re-arm if there are IRQs enabled */
76773 +                _IssueConfig(pHcd,SDCONFIG_SDIO_REARM_INT,NULL,0);
76774 +            }
76775 +            status = _ReleaseHcdLock(pHcd);
76776 +            break;
76777 +        }
76778 +            /* reset helper IRQ bits */
76779 +        pHcd->PendingHelperIrqs = 0;
76780 +            /* save pending IRQ acks */
76781 +        pHcd->PendingIrqAcks = IntPendingMsk;
76782 +        status = _ReleaseHcdLock(pHcd);
76783 +        DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: INTs Pending - 0x%2.2X \n", IntPendingMsk));
76784 +            /* take the device list lock as we iterate through the list, this blocks
76785 +             * device removals */
76786 +        status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
76787 +        if (!SDIO_SUCCESS(status)) {
76788 +            break;
76789 +        }
76790 +            /* walk through the device list matching HCD and interrupting function */
76791 +        SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
76792 +            pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
76793 +                /* check if device belongs to the HCD */
76794 +            if (pDevice->pHcd != pHcd){
76795 +                    /* not on this hcd */
76796 +                continue;
76797 +            }
76798 +            funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
76799 +                /* check device function against the pending mask */
76800 +            if (!(funcMask & IntPendingMsk)) {
76801 +                    /* this one is not interrupting */
76802 +                continue;
76803 +            }
76804 +                /* check for async IRQ and call handler */
76805 +            if (pDevice->pIrqAsyncFunction != NULL) {
76806 +                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling Async IRQ Handler. Fn:%d\n",
76807 +                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
76808 +                SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDevice);
76809 +            } else {
76810 +                    /* this one needs the helper */
76811 +                pHcd->PendingHelperIrqs |= funcMask;
76812 +                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No Async IRQ, Pending Helper Fn:%d\n",
76813 +                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
76814 +            }
76815 +        }
76816 +            /* release HCD list lock */
76817 +        SemaphorePost(&pBusContext->DeviceListSem);
76818 +            /* check for helper IRQs */
76819 +        if (pHcd->PendingHelperIrqs) {
76820 +            pHcd->IrqProcState = SDHCD_IRQ_HELPER;
76821 +            DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Waking IRQ Helper \n"));
76822 +            if (!SDIO_SUCCESS(SD_WAKE_OS_HELPER(&pHcd->SDIOIrqHelper))) {
76823 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to wake helper! \n"));
76824 +            }
76825 +        }
76826 +    } while (FALSE);
76827 +
76828 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: ProcessPendingIrqs \n"));
76829 +}
76830 +
76831 +SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDevice)
76832 +{
76833 +    if (pDevice->pHcd->CardProperties.IOFnCount > 1) {
76834 +            /* not supported on multi-function cards */
76835 +        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: IRQ Pending Check cannot be bypassed, (Funcs:%d)\n",
76836 +            pDevice->pHcd->CardProperties.IOFnCount));
76837 +        return SDIO_STATUS_UNSUPPORTED;
76838 +    }
76839 +
76840 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: pending IRQ check bypassed \n"));
76841 +        /* set flag to optimize this */
76842 +    AtomicTest_Set(&pDevice->pHcd->HcdFlags, HCD_IRQ_NO_PEND_CHECK);
76843 +    return SDIO_STATUS_SUCCESS;
76844 +}
76845 +
76846 +
76847 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76848 +  SDIO_NotifyTimerTriggered - notification handler that a timer expired
76849 +  Input:  TimerID - ID of timer that expired
76850 +  Output:
76851 +  Return:
76852 +  Notes:
76853 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76854 +void SDIO_NotifyTimerTriggered(INT TimerID)
76855 +{
76856 +
76857 +    switch (TimerID) {
76858 +        case SDIOBUS_CD_TIMER_ID:
76859 +            pBusContext->CDTimerQueued = FALSE;
76860 +                /* post an HCD polling event to the helper thread */
76861 +            PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
76862 +            break;
76863 +        default:
76864 +            DBG_ASSERT(FALSE);
76865 +    }
76866 +
76867 +}
76868 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_misc.c
76869 ===================================================================
76870 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
76871 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_misc.c 2008-12-11 22:46:49.000000000 +0100
76872 @@ -0,0 +1,3122 @@
76873 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76874 +@file: sdio_bus_misc.c
76875 +
76876 +@abstract: OS independent bus driver support
76877 +
76878 +#notes: this file contains miscellaneous control functions
76879 +
76880 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
76881 +
76882 +
76883 + *
76884 + *  This program is free software; you can redistribute it and/or modify
76885 + *  it under the terms of the GNU General Public License version 2 as
76886 + *  published by the Free Software Foundation;
76887 + *
76888 + *  Software distributed under the License is distributed on an "AS
76889 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
76890 + *  implied. See the License for the specific language governing
76891 + *  rights and limitations under the License.
76892 + *
76893 + *  Portions of this code were developed with information supplied from the
76894 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
76895 + *
76896 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
76897 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
76898 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
76899 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
76900 + *   Specification may require a license from the SD Card Association or other third parties.
76901 + *   Disclaimers:
76902 + *   The information contained in the Simplified Specification is presented only as a standard
76903 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
76904 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
76905 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
76906 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
76907 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
76908 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
76909 + *   information, know-how or other confidential information to any third party.
76910 + *
76911 + *
76912 + *  The initial developers of the original code are Seung Yi and Paul Lever
76913 + *
76914 + *  sdio@atheros.com
76915 + *
76916 + *
76917 +
76918 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76919 +#define MODULE_NAME  SDBUSDRIVER
76920 +#include <linux/sdio/ctsystem.h>
76921 +#include <linux/sdio/sdio_busdriver.h>
76922 +#include <linux/sdio/sdio_lib.h>
76923 +#include "_busdriver.h"
76924 +#include <linux/sdio/_sdio_defs.h>
76925 +#include <linux/sdio/mmc_defs.h>
76926 +
76927 +
76928 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76929 +  IssueBusRequestBd - issue a bus request
76930 +  Input:  pHcd - HCD object
76931 +          Cmd - command to issue
76932 +          Argument - command argument
76933 +          Flags - request flags
76934 +
76935 +  Output: pReqToUse - request to use (if caller wants response data)
76936 +  Return: SDIO Status
76937 +  Notes:  This function only issues 1 block data transfers
76938 +          This function issues the request synchronously
76939 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76940 +SDIO_STATUS _IssueBusRequestBd(PSDHCD           pHcd,
76941 +                               UINT8            Cmd,
76942 +                               UINT32           Argument,
76943 +                               SDREQUEST_FLAGS  Flags,
76944 +                               PSDREQUEST       pReqToUse,
76945 +                               PVOID            pData,
76946 +                               INT              Length)
76947 +{
76948 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
76949 +    PSDREQUEST  pReq;
76950 +
76951 +    if (NULL == pReqToUse) {
76952 +            /* caller doesn't care about the response data, allocate locally */
76953 +        pReq = AllocateRequest();
76954 +        if (NULL == pReq) {
76955 +            return SDIO_STATUS_NO_RESOURCES;
76956 +        }
76957 +    } else {
76958 +            /* use the caller's request buffer */
76959 +        pReq = pReqToUse;
76960 +    }
76961 +
76962 +    pReq->Argument = Argument;
76963 +    pReq->Flags = Flags;
76964 +    pReq->Command = Cmd;
76965 +    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
76966 +        pReq->pDataBuffer  = pData;
76967 +        pReq->BlockCount = 1;
76968 +        pReq->BlockLen = Length;
76969 +    }
76970 +
76971 +    status = IssueRequestToHCD(pHcd,pReq);
76972 +
76973 +    if (NULL == pReqToUse) {
76974 +        DBG_ASSERT(pReq != NULL);
76975 +        FreeRequest(pReq);
76976 +    }
76977 +    return status;
76978 +}
76979 +
76980 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76981 +  ConvertVoltageCapsToOCRMask - initialize card
76982 +  Input:  VoltageCaps - voltage cap to look up
76983 +  Return: 32 bit OCR mask
76984 +  Notes:  this function sets voltage for +- 10%
76985 +
76986 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
76987 +static UINT32 ConvertVoltageCapsToOCRMask(SLOT_VOLTAGE_MASK VoltageCaps)
76988 +{
76989 +    UINT32 ocrMask;
76990 +
76991 +    ocrMask = 0;
76992 +
76993 +    if (VoltageCaps & SLOT_POWER_3_3V) {
76994 +        ocrMask |= SD_OCR_3_2_TO_3_3_VDD | SD_OCR_3_3_TO_3_4_VDD;
76995 +    }
76996 +    if (VoltageCaps & SLOT_POWER_3_0V) {
76997 +        ocrMask |= SD_OCR_2_9_TO_3_0_VDD | SD_OCR_3_0_TO_3_1_VDD;
76998 +    }
76999 +    if (VoltageCaps & SLOT_POWER_2_8V) {
77000 +        ocrMask |= SD_OCR_2_7_TO_2_8_VDD | SD_OCR_2_8_TO_2_9_VDD;
77001 +    }
77002 +    if (VoltageCaps & SLOT_POWER_2_0V) {
77003 +        ocrMask |= SD_OCR_1_9_TO_2_0_VDD | SD_OCR_2_0_TO_2_1_VDD;
77004 +    }
77005 +    if (VoltageCaps & SLOT_POWER_1_8V) {
77006 +        ocrMask |= SD_OCR_1_7_TO_1_8_VDD | SD_OCR_1_8_TO_1_9_VDD;
77007 +    }
77008 +    if (VoltageCaps & SLOT_POWER_1_6V) {
77009 +        ocrMask |= SD_OCR_1_6_TO_1_7_VDD;
77010 +    }
77011 +
77012 +    return ocrMask;
77013 +}
77014 +
77015 +static UINT32 GetUsableOCRValue(UINT32 CardOCR, UINT32 SlotOCRMask)
77016 +{
77017 +    INT    i;
77018 +    UINT32 mask = 0;
77019 +
77020 +    for (i = 0; i < 32; i++) {
77021 +        mask = 1 << i;
77022 +        if ((SlotOCRMask & mask) && (CardOCR & mask)) {
77023 +            return mask;
77024 +        }
77025 +    }
77026 +
77027 +    return mask;
77028 +}
77029 +
77030 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77031 +  GetPowerSetting - power up the SDIO card
77032 +  Input:  pHcd - HCD object
77033 +          pOCRvalue - OCR value of the card
77034 +  Output: pOCRvalue - OCR to actually use
77035 +  Return: power setting for HCD based on card's OCR, zero indicates unsupported
77036 +  Notes:
77037 +
77038 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77039 +static SLOT_VOLTAGE_MASK GetPowerSetting(PSDHCD pHcd, UINT32 *pOCRvalue)
77040 +{
77041 +    UINT32                      ocrMask;
77042 +    SLOT_VOLTAGE_MASK           hcdVoltage = 0;
77043 +    SLOT_VOLTAGE_MASK           hcdVMask;
77044 +    INT                         i;
77045 +
77046 +        /* check preferred value */
77047 +    ocrMask = ConvertVoltageCapsToOCRMask(pHcd->SlotVoltagePreferred);
77048 +    if (ocrMask & *pOCRvalue) {
77049 +            /* using preferred voltage */
77050 +        *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
77051 +        hcdVoltage = pHcd->SlotVoltagePreferred;
77052 +    } else {
77053 +            /* walk through the slot voltage caps and find a match */
77054 +        for (i = 0; i < 8; i++) {
77055 +            hcdVMask = (1 << i);
77056 +            if (hcdVMask & pHcd->SlotVoltageCaps) {
77057 +                ocrMask = ConvertVoltageCapsToOCRMask((SLOT_VOLTAGE_MASK)(pHcd->SlotVoltageCaps & hcdVMask));
77058 +                if (ocrMask & *pOCRvalue) {
77059 +                        /* found a match */
77060 +                    *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
77061 +                    hcdVoltage = pHcd->SlotVoltageCaps & hcdVMask;
77062 +                    break;
77063 +                }
77064 +            }
77065 +        }
77066 +    }
77067 +
77068 +    return hcdVoltage;
77069 +}
77070 +
77071 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77072 +  TestPresence - test the presence of a card/function
77073 +  Input:  pHcd - HCD object
77074 +          TestType - type of test to perform
77075 +  Output: pReq - Request to use (optional)
77076 +  Return:
77077 +  Notes:
77078 +
77079 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77080 +SDIO_STATUS TestPresence(PSDHCD          pHcd,
77081 +                         CARD_INFO_FLAGS TestType,
77082 +                         PSDREQUEST      pReq)
77083 +{
77084 +    SDIO_STATUS status = SDIO_STATUS_ERROR;
77085 +
77086 +     switch (TestType) {
77087 +        case CARD_SDIO:
77088 +                /* issue CMD5 */
77089 +            status = _IssueSimpleBusRequest(pHcd,CMD5,0,
77090 +                        SDREQ_FLAGS_RESP_SDIO_R4 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,pReq);
77091 +            break;
77092 +        case CARD_SD:
77093 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77094 +                 /* ACMD41 just starts initialization when in SPI mode, argument is ignored
77095 +                 * Note: In SPI mode ACMD41 uses an R1 response */
77096 +                status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
77097 +                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,pReq);
77098 +
77099 +            } else {
77100 +                /* issue ACMD41 with OCR value of zero */
77101 +                /* ACMD41 on SD uses an R3 response */
77102 +                status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
77103 +                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,pReq);
77104 +            }
77105 +            break;
77106 +        case CARD_MMC:
77107 +                 /* issue CMD1 */
77108 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77109 +                    /* note: in SPI mode an R1 response is used */
77110 +                status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R1,pReq);
77111 +            } else {
77112 +                status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R3,pReq);
77113 +            }
77114 +            break;
77115 +        default:
77116 +            DBG_ASSERT(FALSE);
77117 +            break;
77118 +    }
77119 +
77120 +    return status;
77121 +}
77122 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77123 +  ReadOCR - read the OCR
77124 +  Input:  pHcd - HCD object
77125 +          ReadType - type of read to perform
77126 +          OCRValue - OCR value to use as an argument
77127 +  Output: pReq - Request to use
77128 +          pOCRValueRd - OCR value read back (can be NULL)
77129 +  Return:
77130 +  Notes:
77131 +
77132 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77133 +static SDIO_STATUS ReadOCR(PSDHCD          pHcd,
77134 +                           CARD_INFO_FLAGS ReadType,
77135 +                           PSDREQUEST      pReq,
77136 +                           UINT32          OCRValue,
77137 +                           UINT32          *pOCRValueRd)
77138 +{
77139 +    SDIO_STATUS status = SDIO_STATUS_ERROR;
77140 +
77141 +     switch (ReadType) {
77142 +        case CARD_SDIO:
77143 +                /* CMD5 for SDIO cards */
77144 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77145 +                    /* skip the SPI filter, we will decode the response here  */
77146 +                status = _IssueSimpleBusRequest(pHcd,CMD5,
77147 +                                                OCRValue,
77148 +                                                SDREQ_FLAGS_RESP_SDIO_R4 |
77149 +                                                SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
77150 +                                                pReq);
77151 +            } else {
77152 +                    /* native SD */
77153 +                status = _IssueSimpleBusRequest(pHcd,CMD5,
77154 +                                                OCRValue,
77155 +                                                SDREQ_FLAGS_RESP_SDIO_R4,
77156 +                                                pReq);
77157 +            }
77158 +            break;
77159 +        case CARD_SD:
77160 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77161 +                    /* CMD58 is used to read the OCR */
77162 +                status = _IssueSimpleBusRequest(pHcd,CMD58,
77163 +                                                0, /* argument ignored */
77164 +                                                (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
77165 +                                                pReq);
77166 +            } else {
77167 +                    /* SD Native uses ACMD41 */
77168 +                status = _IssueSimpleBusRequest(pHcd,ACMD41,
77169 +                                                OCRValue,
77170 +                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,
77171 +                                                pReq);
77172 +            }
77173 +            break;
77174 +        case CARD_MMC:
77175 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77176 +                    /* CMD58 is used to read the OCR  */
77177 +                status = _IssueSimpleBusRequest(pHcd,CMD58,
77178 +                                                0, /* argument ignored */
77179 +                                                (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
77180 +                                                pReq);
77181 +            } else {
77182 +                    /* MMC Native uses CMD1 */
77183 +                status = _IssueSimpleBusRequest(pHcd,CMD1,
77184 +                                                OCRValue, SDREQ_FLAGS_RESP_R3,
77185 +                                                pReq);
77186 +            }
77187 +            break;
77188 +        default:
77189 +            DBG_ASSERT(FALSE);
77190 +            break;
77191 +    }
77192 +
77193 +    if (SDIO_SUCCESS(status) && (pOCRValueRd != NULL)) {
77194 +        *pOCRValueRd = 0;
77195 +            /* someone wants the OCR read back */
77196 +        switch (ReadType) {
77197 +            case CARD_SDIO:
77198 +                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77199 +                    *pOCRValueRd = SPI_SDIO_R4_GET_OCR(pReq->Response);
77200 +                } else {
77201 +                    *pOCRValueRd = SD_SDIO_R4_GET_OCR(pReq->Response);
77202 +                }
77203 +                break;
77204 +            case CARD_SD:
77205 +            case CARD_MMC:
77206 +                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77207 +                    *pOCRValueRd = SPI_R3_GET_OCR(pReq->Response);
77208 +                } else {
77209 +                    *pOCRValueRd = SD_R3_GET_OCR(pReq->Response);
77210 +                }
77211 +                break;
77212 +            default:
77213 +                DBG_ASSERT(FALSE);
77214 +                break;
77215 +        }
77216 +    }
77217 +    return status;
77218 +}
77219 +
77220 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77221 +  PollCardReady - poll card till it's ready
77222 +  Input:  pHcd - HCD object
77223 +          OCRValue - OCR value to poll with
77224 +          PollType - polling type (based on card type)
77225 +  Output:
77226 +  Return:
77227 +  Notes:
77228 +
77229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77230 +SDIO_STATUS PollCardReady(PSDHCD pHcd, UINT32 OCRValue, CARD_INFO_FLAGS PollType)
77231 +{
77232 +    INT             cardReadyRetry;
77233 +    SDIO_STATUS     status;
77234 +    PSDREQUEST      pReq;
77235 +
77236 +    if (!((PollType == CARD_SDIO) || (PollType == CARD_SD) || (PollType == CARD_MMC))) {
77237 +        DBG_ASSERT(FALSE);
77238 +        return SDIO_STATUS_INVALID_PARAMETER;
77239 +    }
77240 +
77241 +    pReq = AllocateRequest();
77242 +    if (NULL == pReq) {
77243 +        return SDIO_STATUS_NO_RESOURCES;
77244 +    }
77245 +
77246 +    status = SDIO_STATUS_SUCCESS;
77247 +    cardReadyRetry = pBusContext->CardReadyPollingRetry;
77248 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Polling card ready, Using OCR:0x%8.8X, Poll Type:0x%X\n",
77249 +                            OCRValue,PollType));
77250 +
77251 +        /* now issue CMD with the actual OCR as an argument until the card is ready */
77252 +    while (cardReadyRetry) {
77253 +        if (IS_HCD_BUS_MODE_SPI(pHcd) && !(PollType == CARD_SDIO)) {
77254 +            if (PollType == CARD_MMC) {
77255 +                /* under SPI mode for MMC cards, we need to issue CMD1 and
77256 +                 * check the response for the "in-idle" bit */
77257 +                status = _IssueSimpleBusRequest(pHcd,
77258 +                                                CMD1,
77259 +                                                0,
77260 +                                                SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
77261 +                                                pReq);
77262 +            } else if (PollType == CARD_SD) {
77263 +                 /* under SPI mode for SD cards, we need to issue ACMD41 and
77264 +                 * check the response for the "in-idle" bit */
77265 +                 status = _IssueSimpleBusRequest(pHcd,
77266 +                                                 ACMD41,
77267 +                                                 0,
77268 +                                                 SDREQ_FLAGS_RESP_R1 |
77269 +                                                 SDREQ_FLAGS_APP_CMD |
77270 +                                                 SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
77271 +                                                 pReq);
77272 +            } else {
77273 +                DBG_ASSERT(FALSE);
77274 +            }
77275 +        } else {
77276 +                /* for SD/MMC in native mode and SDIO (all modes) we need to read the OCR register */
77277 +                /* read the OCR using the supplied OCR value as an argument, we don't care about the
77278 +                  * actual OCR read-back, but we are interested in the response */
77279 +            status = ReadOCR(pHcd,PollType,pReq,OCRValue,NULL);
77280 +        }
77281 +
77282 +        if (!SDIO_SUCCESS(status)) {
77283 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to issue CMD to poll ready \n"));
77284 +            break;
77285 +        }
77286 +        if (PollType == CARD_SDIO)  {
77287 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77288 +                if (SPI_SDIO_R4_IS_CARD_READY(pReq->Response)) {
77289 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! (SPI) \n"));
77290 +                    break;
77291 +                }
77292 +            } else {
77293 +                if (SD_SDIO_R4_IS_CARD_READY(pReq->Response)) {
77294 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! \n"));
77295 +                    break;
77296 +                }
77297 +            }
77298 +        } else if ((PollType == CARD_SD) || (PollType == CARD_MMC)) {
77299 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77300 +                    /* check response when MMC or SD cards operate in SPI mode */
77301 +                if (!(GET_SPI_R1_RESP_TOKEN(pReq->Response) & SPI_CS_STATE_IDLE)) {
77302 +                        /* card is no longer in idle */
77303 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC Card (SPI mode) is ready! \n"));
77304 +                    break;
77305 +                }
77306 +            } else {
77307 +                    /* check the OCR busy bit */
77308 +                if (SD_R3_IS_CARD_READY(pReq->Response)) {
77309 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC (Native Mode) Card Ready! \n"));
77310 +                    break;
77311 +                }
77312 +            }
77313 +        } else {
77314 +            DBG_ASSERT(FALSE);
77315 +        }
77316 +        cardReadyRetry--;
77317 +            /* delay */
77318 +        status = OSSleep(OCR_READY_CHECK_DELAY_MS);
77319 +        if (!SDIO_SUCCESS(status)){
77320 +            break;
77321 +        }
77322 +    }
77323 +
77324 +    if (0 == cardReadyRetry) {
77325 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card Ready timeout! \n"));
77326 +        status = SDIO_STATUS_DEVICE_ERROR;
77327 +    }
77328 +
77329 +    FreeRequest(pReq);
77330 +
77331 +    return status;
77332 +}
77333 +
77334 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77335 +  AdjustSlotPower - adjust slot power
77336 +  Input:  pHcd - HCD object
77337 +  Output: pOCRvalue - ocr value to use
77338 +  Return:
77339 +  Notes:
77340 +
77341 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77342 +static SDIO_STATUS AdjustSlotPower(PSDHCD pHcd, UINT32 *pOCRvalue)
77343 +{
77344 +    SDCONFIG_POWER_CTRL_DATA    pwrSetting;
77345 +    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
77346 +
77347 +    ZERO_OBJECT(pwrSetting);
77348 +    DBG_PRINT(SDDBG_TRACE,
77349 +        ("SDIO Bus Driver: Adjusting Slot Power, Requesting adjustment for OCR:0x%8.8X \n",
77350 +         *pOCRvalue));
77351 +
77352 +    do {
77353 +        pwrSetting.SlotPowerEnable = TRUE;
77354 +            /* get optimal power setting */
77355 +        pwrSetting.SlotPowerVoltageMask = GetPowerSetting(pHcd, pOCRvalue);
77356 +        if (0 == pwrSetting.SlotPowerVoltageMask) {
77357 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: No matching voltage for OCR \n"));
77358 +            status = SDIO_STATUS_DEVICE_ERROR;
77359 +            break;
77360 +        }
77361 +
77362 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Pwr Mask 0x%X for OCR:0x%8.8X \n",
77363 +                                pwrSetting.SlotPowerVoltageMask,*pOCRvalue));
77364 +        status = _IssueConfig(pHcd,SDCONFIG_POWER_CTRL,&pwrSetting,sizeof(pwrSetting));
77365 +        if (!SDIO_SUCCESS(status)) {
77366 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
77367 +            break;
77368 +        }
77369 +            /* delay for power to settle */
77370 +        OSSleep(pBusContext->PowerSettleDelay);
77371 +            /* save off for drivers */
77372 +        pHcd->CardProperties.CardVoltage  = pwrSetting.SlotPowerVoltageMask;
77373 +
77374 +    } while (FALSE);
77375 +
77376 +    return status;
77377 +}
77378 +
77379 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77380 +  ConvertEncodedTransSpeed - convert encoded TRANS_SPEED value to a clock rate
77381 +  Input:  TransSpeedValue - encoded transfer speed value
77382 +  Output:
77383 +  Return: appropriate SD clock rate
77384 +  Notes: This function returns a rate of 0, if it could not be determined.
77385 +         This function can check tran speed values for SD,SDIO and MMC cards
77386 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77387 +static SD_BUSCLOCK_RATE ConvertEncodedTransSpeed(UINT8 TransSpeedValue)
77388 +{
77389 +    SD_BUSCLOCK_RATE transfMul = 0;
77390 +    UINT8            timeVal = 0;
77391 +
77392 +    switch (TransSpeedValue & TRANSFER_UNIT_MULTIPIER_MASK) {
77393 +        case 0:
77394 +            transfMul = 10000;
77395 +            break;
77396 +        case 1:
77397 +            transfMul = 100000;
77398 +            break;
77399 +        case 2:
77400 +            transfMul = 1000000;
77401 +            break;
77402 +        case 3:
77403 +            transfMul = 10000000;
77404 +            break;
77405 +        default:
77406 +            transfMul = 0;
77407 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card transfer multipler is wrong (val=0x%X)! \n",
77408 +                                   TransSpeedValue));
77409 +            break;
77410 +    }
77411 +
77412 +    switch ((TransSpeedValue & TIME_VALUE_MASK) >> TIME_VALUE_SHIFT) {
77413 +        case 1: timeVal = 10; break;
77414 +        case 2: timeVal = 12; break;
77415 +        case 3: timeVal = 13; break;
77416 +        case 4: timeVal = 15; break;
77417 +        case 5: timeVal = 20; break;
77418 +        case 6: timeVal = 25; break;
77419 +        case 7: timeVal = 30; break;
77420 +        case 8: timeVal = 35; break;
77421 +        case 9: timeVal = 40; break;
77422 +        case 10: timeVal = 45; break;
77423 +        case 11: timeVal = 50; break;
77424 +        case 12: timeVal = 55; break;
77425 +        case 13: timeVal = 60; break;
77426 +        case 14: timeVal = 70; break;
77427 +        case 15: timeVal = 80; break;
77428 +        default: timeVal = 0;
77429 +        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card time value is wrong (val=0x%X)! \n",
77430 +                               TransSpeedValue));
77431 +        break;
77432 +    }
77433 +
77434 +    if ((transfMul != 0) && (timeVal != 0)) {
77435 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card Reported Max: %d Hz (0x%X) \n",
77436 +                                (timeVal*transfMul), TransSpeedValue));
77437 +        return timeVal*transfMul;
77438 +    }
77439 +
77440 +    return 0;
77441 +}
77442 +
77443 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77444 +  SelectDeselectCard - Select or deselect a card
77445 +  Input:  pHcd - HCD object
77446 +          Select - select the card
77447 +  Output:
77448 +  Return: status
77449 +  Notes:
77450 +
77451 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77452 +static SDIO_STATUS SelectDeselectCard(PSDHCD pHcd, BOOL Select)
77453 +{
77454 +    SDIO_STATUS status;
77455 +
77456 +    if (IS_HCD_BUS_MODE_SPI(pHcd)) {
77457 +            /* SPI mode cards do not support selection */
77458 +        status = SDIO_STATUS_SUCCESS;
77459 +    } else {
77460 +        if (!Select) {
77461 +                /* deselect, note that deselecting a card does not return a response */
77462 +            status = _IssueSimpleBusRequest(pHcd,
77463 +                                            CMD7,0,
77464 +                                            SDREQ_FLAGS_NO_RESP,NULL);
77465 +        } else {
77466 +                /* select */
77467 +            status = _IssueSimpleBusRequest(pHcd,
77468 +                                            CMD7,(pHcd->CardProperties.RCA << 16),
77469 +                                            SDREQ_FLAGS_RESP_R1B,NULL);
77470 +        }
77471 +    }
77472 +
77473 +    if (!SDIO_SUCCESS(status)) {
77474 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to %s card, RCA:0x%X Err:%d \n",
77475 +            (Select ? "Select":"Deselect"), pHcd->CardProperties.RCA, status));
77476 +    }
77477 +    return status;
77478 +}
77479 +
77480 +/* reorder a buffer by swapping MSB with LSB */
77481 +static void ReorderBuffer(UINT8 *pBuffer, INT Bytes)
77482 +{
77483 +    UINT8 *pEnd;
77484 +    UINT8 temp;
77485 +
77486 +    DBG_ASSERT(!(Bytes & 1));
77487 +        /* point to the end */
77488 +    pEnd = &pBuffer[Bytes - 1];
77489 +        /* divide in half */
77490 +    Bytes = Bytes >> 1;
77491 +
77492 +    while (Bytes) {
77493 +        temp = *pBuffer;
77494 +            /* swap bytes */
77495 +        *pBuffer = *pEnd;
77496 +        *pEnd = temp;
77497 +        pBuffer++;
77498 +        pEnd--;
77499 +        Bytes--;
77500 +    }
77501 +}
77502 +
77503 +#define ADJUST_OPER_CLOCK(pBusMode,Clock) \
77504 +    (pBusMode)->ClockRate = min((SD_BUSCLOCK_RATE)(Clock),(pBusMode)->ClockRate)
77505 +#define ADJUST_OPER_BLOCK_LEN(pCaps,Length) \
77506 +    (pCaps)->OperBlockLenLimit = min((UINT16)(Length),(pCaps)->OperBlockLenLimit)
77507 +#define ADJUST_OPER_BLOCK_COUNT(pCaps,Count) \
77508 +    (pCaps)->OperBlockCountLimit = min((UINT16)(Count),(pCaps)->OperBlockCountLimit)
77509 +
77510 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77511 +  GetBusParameters - Get bus parameters for a card
77512 +  Input:  pHcd - HCD object
77513 +          pBusMode - current bus mode on entry
77514 +  Output: pBusMode - new adjusted bus mode
77515 +  Return: status
77516 +  Notes:
77517 +
77518 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77519 +static SDIO_STATUS GetBusParameters(PSDHCD pHcd, PSDCONFIG_BUS_MODE_DATA pBusMode)
77520 +{
77521 +    SDIO_STATUS                        status = SDIO_STATUS_SUCCESS;
77522 +    UINT8                              temp;
77523 +    UINT32                             tplAddr;
77524 +    struct SDIO_FUNC_EXT_COMMON_TPL    func0ext;
77525 +    UINT8                              scrRegister[SD_SCR_BYTES];
77526 +    SD_BUSCLOCK_RATE                   cardReportedRate = 0;
77527 +    PSDREQUEST                         pReq = NULL;
77528 +    BOOL                               spiMode = FALSE;
77529 +
77530 +
77531 +    if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
77532 +        spiMode = TRUE;
77533 +    }
77534 +
77535 +    if (!spiMode) {
77536 +            /* set highest bus mode bus driver is allowing (non-SPI), the code below will
77537 +               * adjust to lower or equal settings */
77538 +        pBusMode->BusModeFlags = pBusContext->DefaultBusMode;
77539 +    }
77540 +        /* set operational parameters */
77541 +    pBusMode->ClockRate = pBusContext->DefaultOperClock;
77542 +    pHcd->CardProperties.OperBlockLenLimit = pBusContext->DefaultOperBlockLen;
77543 +    pHcd->CardProperties.OperBlockCountLimit = pBusContext->DefaultOperBlockCount;
77544 +
77545 +        /* adjust operational block counts and length to match HCD */
77546 +    ADJUST_OPER_BLOCK_LEN(&pHcd->CardProperties,pHcd->MaxBytesPerBlock);
77547 +    ADJUST_OPER_BLOCK_COUNT(&pHcd->CardProperties,pHcd->MaxBlocksPerTrans);
77548 +        /* limit operational clock to the max clock rate */
77549 +    ADJUST_OPER_CLOCK(pBusMode,pHcd->MaxClockRate);
77550 +
77551 +    if (!spiMode) {
77552 +            /* check HCD bus mode */
77553 +        if (!(pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) ||
77554 +            ((pHcd->CardProperties.Flags & CARD_SDIO) &&
77555 +             (pHcd->Attributes & SDHCD_ATTRIB_NO_4BIT_IRQ)) ) {
77556 +
77557 +            if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
77558 +                DBG_PRINT(SDDBG_WARN,
77559 +                ("SDIO Card Detected, but host does not support IRQs in 4 bit mode - dropping to 1 bit. \n"));
77560 +            }
77561 +                /* force to 1 bit mode */
77562 +            SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
77563 +        }
77564 +    }
77565 +
77566 +        /* now do various card inquiries to drop the bus mode or clock
77567 +         * none of these checks can raise the bus mode or clock higher that what
77568 +         * was initialized above */
77569 +    do {
77570 +        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
77571 +                /* allocate a request for response data we'll need */
77572 +            pReq = AllocateRequest();
77573 +            if (NULL == pReq) {
77574 +                status = SDIO_STATUS_NO_RESOURCES;
77575 +                break;
77576 +            }
77577 +        }
77578 +
77579 +        if (!spiMode && (pHcd->CardProperties.Flags & CARD_MMC)) {
77580 +                /* MMC cards all run in 1 bit mode */
77581 +            SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
77582 +        }
77583 +
77584 +        if (pHcd->CardProperties.Flags & CARD_SD) {
77585 +            DBG_ASSERT(pReq != NULL);
77586 +            DBG_PRINT(SDDBG_TRACE, ("Getting SCR from SD Card..\n"));
77587 +                /* read SCR (requires data transfer) to get supported modes */
77588 +            status = _IssueBusRequestBd(pHcd,ACMD51,0,
77589 +                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_APP_CMD |
77590 +                                        SDREQ_FLAGS_DATA_TRANS,
77591 +                                        pReq,&scrRegister,SD_SCR_BYTES);
77592 +            if (!SDIO_SUCCESS(status)) {
77593 +                DBG_PRINT(SDDBG_WARN, ("SD card does not have SCR. \n"));
77594 +                if (!spiMode) {
77595 +                        /* switch it to 1 bit mode */
77596 +                    SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
77597 +                }
77598 +                status = SDIO_STATUS_SUCCESS;
77599 +            } else {
77600 +                    /* we have to reorder this buffer since the SCR is sent MSB first on the data
77601 +                     * data bus */
77602 +                ReorderBuffer(scrRegister,SD_SCR_BYTES);
77603 +                    /* got the SCR */
77604 +                DBG_PRINT(SDDBG_TRACE, ("SD SCR StructRev:0x%X, Flags:0x%X \n",
77605 +                        GET_SD_SCR_STRUCT_VER(scrRegister),
77606 +                        GET_SD_SCR_BUSWIDTHS_FLAGS(scrRegister)));
77607 +                    /* set the revision */
77608 +                switch (GET_SD_SCR_SDSPEC_VER(scrRegister)) {
77609 +                    case SCR_SD_SPEC_1_00:
77610 +                        DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.01 \n"));
77611 +                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_01;
77612 +                        break;
77613 +                    case SCR_SD_SPEC_1_10:
77614 +                        DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.10 \n"));
77615 +                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
77616 +                        break;
77617 +                    default:
77618 +                        DBG_PRINT(SDDBG_WARN, ("SD Spec Revision is greater than 1.10 \n"));
77619 +                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
77620 +                        break;
77621 +                }
77622 +
77623 +                if (!(GET_SD_SCR_BUSWIDTHS(scrRegister) & SCR_BUS_SUPPORTS_4_BIT)) {
77624 +                    if (!spiMode) {
77625 +                        DBG_PRINT(SDDBG_WARN, ("SD SCR reports 1bit only Mode \n"));
77626 +                            /* switch it to 1 bit mode */
77627 +                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
77628 +                    }
77629 +                }
77630 +            }
77631 +        }
77632 +
77633 +        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
77634 +            DBG_ASSERT(pReq != NULL);
77635 +                /* de-select the card in order to get the CSD */
77636 +            status = SelectDeselectCard(pHcd,FALSE);
77637 +            if (!SDIO_SUCCESS(status)) {
77638 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CSD \n"));
77639 +                break;
77640 +            }
77641 +                /* Get CSD for SD or MMC cards */
77642 +            if (spiMode) {
77643 +                    /* in SPI mode, getting the CSD requires a read data transfer */
77644 +                status = _IssueBusRequestBd(pHcd,CMD9,0,
77645 +                                            SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
77646 +                                            pReq,
77647 +                                            pHcd->CardProperties.CardCSD,
77648 +                                            MAX_CSD_CID_BYTES);
77649 +                if (SDIO_SUCCESS(status)) {
77650 +                        /* when the CSD is sent over in SPI data mode, it comes to us in MSB first
77651 +                         * and thus is not ordered correctly as defined in the SD spec */
77652 +                    ReorderBuffer(pHcd->CardProperties.CardCSD,MAX_CSD_CID_BYTES);
77653 +                }
77654 +            } else {
77655 +                status = _IssueSimpleBusRequest(pHcd,
77656 +                                                CMD9,
77657 +                                                (pHcd->CardProperties.RCA << 16),
77658 +                                                SDREQ_FLAGS_RESP_R2,
77659 +                                                pReq);
77660 +                if (SDIO_SUCCESS(status)) {
77661 +                        /* save the CSD */
77662 +                    memcpy(pHcd->CardProperties.CardCSD,pReq->Response,MAX_CARD_RESPONSE_BYTES);
77663 +                }
77664 +            }
77665 +
77666 +            if (!SDIO_SUCCESS(status)) {
77667 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CSD, Err:%d \n",
77668 +                                        status));
77669 +                break;
77670 +            }
77671 +                /* for MMC cards, the spec version is in the CSD */
77672 +            if (pHcd->CardProperties.Flags & CARD_MMC) {
77673 +                DBG_PRINT(SDDBG_TRACE, ("MMC Spec version : (0x%2.2X) \n",
77674 +                            GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)));
77675 +                switch (GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)) {
77676 +                    case MMC_SPEC_1_0_TO_1_2:
77677 +                    case MMC_SPEC_1_4:
77678 +                    case MMC_SPEC_2_0_TO_2_2:
77679 +                        DBG_PRINT(SDDBG_WARN, ("MMC Spec version less than 3.1 \n"));
77680 +                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_1_0_2_2;
77681 +                        break;
77682 +                    case MMC_SPEC_3_1:
77683 +                        DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 3.1 \n"));
77684 +                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
77685 +                        break;
77686 +                    case MMC_SPEC_4_0_TO_4_1:
77687 +                        DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 4.0-4.1 \n"));
77688 +                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_4_0;
77689 +                        break;
77690 +                    default:
77691 +                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
77692 +                        DBG_PRINT(SDDBG_WARN, ("MMC Spec version greater than 4.1\n"));
77693 +                        break;
77694 +                }
77695 +            }
77696 +                /* re-select the card  */
77697 +            status = SelectDeselectCard(pHcd,TRUE);
77698 +            if (!SDIO_SUCCESS(status)) {
77699 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CSD \n"));
77700 +                break;
77701 +            }
77702 +        }
77703 +
77704 +        if ((pHcd->CardProperties.Flags & CARD_SD) &&
77705 +            !(pHcd->CardProperties.Flags & CARD_SDIO) &&
77706 +             SDDEVICE_IS_SD_REV_GTEQ_1_10(pHcd->pPseudoDev) &&
77707 +             (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
77708 +             !spiMode)  {
77709 +            UINT32 arg;
77710 +            PUINT8 pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
77711 +
77712 +            if (NULL == pSwitchStatusBlock) {
77713 +                status = SDIO_STATUS_NO_RESOURCES;
77714 +                break;
77715 +            }
77716 +
77717 +            arg = SD_SWITCH_FUNC_ARG_GROUP_CHECK(SD_SWITCH_HIGH_SPEED_GROUP,
77718 +                                                 SD_SWITCH_HIGH_SPEED_FUNC_NO);
77719 +
77720 +                /* for 1.10 SD cards, check if high speed mode is supported */
77721 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Checking SD Card for switchable functions (CMD6 arg:0x%X)\n",arg));
77722 +
77723 +                /* issue simple data transfer request to read the switch status */
77724 +            status = _IssueBusRequestBd(pHcd,
77725 +                                        CMD6,
77726 +                                        arg,
77727 +                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
77728 +                                        pReq,
77729 +                                        pSwitchStatusBlock,
77730 +                                        SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
77731 +
77732 +            if (SDIO_SUCCESS(status)) {
77733 +                UINT16 switchGroupMask;
77734 +                    /* need to reorder this since cards send this MSB first */
77735 +                ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
77736 +                switchGroupMask = SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pSwitchStatusBlock,SD_SWITCH_HIGH_SPEED_GROUP);
77737 +                DBG_PRINT(SDDBG_TRACE, ("SD Card Switch Status Group1 Mask:0x%X Max Current:%d\n",
77738 +                        switchGroupMask, SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) ));
77739 +                if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
77740 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SD Switch Status block has zero max current \n"));
77741 +                    SDLIB_PrintBuffer(pSwitchStatusBlock,
77742 +                                      SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
77743 +                                      "SDIO Bus Driver: SD Switch Status Block Error");
77744 +                } else {
77745 +                        /* check HS support */
77746 +                    if (switchGroupMask & (1 << SD_SWITCH_HIGH_SPEED_FUNC_NO)) {
77747 +                        DBG_PRINT(SDDBG_TRACE, ("SD Card Supports High Speed Mode\n"));
77748 +                            /* set the rate, this will override the CSD value */
77749 +                        cardReportedRate = SD_HS_MAX_BUS_CLOCK;
77750 +                        pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
77751 +                    }
77752 +                }
77753 +            } else {
77754 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get SD Switch Status block (%d)\n", status));
77755 +                    /* just fall through, we'll handle this like a normal SD card */
77756 +                status = SDIO_STATUS_SUCCESS;
77757 +            }
77758 +
77759 +            KernelFree(pSwitchStatusBlock);
77760 +        }
77761 +
77762 +        if ((pHcd->CardProperties.Flags & CARD_MMC) &&
77763 +             SDDEVICE_IS_MMC_REV_GTEQ_4_0(pHcd->pPseudoDev) &&
77764 +             (pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED) &&
77765 +             !spiMode)  {
77766 +                /* for MMC cards, get the Extended CSD to get the High speed and
77767 +                 * wide bus paramaters */
77768 +
77769 +            PUINT8 pExtData = KernelAlloc(MMC_EXT_CSD_SIZE);
77770 +
77771 +            if (NULL == pExtData) {
77772 +                status = SDIO_STATUS_NO_RESOURCES;
77773 +                break;
77774 +            }
77775 +                /* issue simple data transfer request to read the extended CSD */
77776 +            status = _IssueBusRequestBd(pHcd,MMC_CMD8,0,
77777 +                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
77778 +                                        pReq,
77779 +                                        pExtData,
77780 +                                        MMC_EXT_CSD_SIZE);
77781 +            if (SDIO_SUCCESS(status)) {
77782 +                 DBG_PRINT(SDDBG_TRACE, ("MMC Ext CSD Version: 0x%X Card Type: 0x%X\n",
77783 +                        pExtData[MMC_EXT_VER_OFFSET],pExtData[MMC_EXT_CARD_TYPE_OFFSET]));
77784 +                    /* check HS support */
77785 +                if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_52) {
77786 +                        /* try 52 Mhz */
77787 +                    cardReportedRate = 52000000;
77788 +                    pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
77789 +                } else if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_26) {
77790 +                        /* try 26MHZ */
77791 +                    cardReportedRate = 26000000;
77792 +                    pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
77793 +                } else {
77794 +                        /* doesn't report high speed capable */
77795 +                    cardReportedRate = 0;
77796 +                }
77797 +
77798 +                if (cardReportedRate && !spiMode) {
77799 +                        /* figure out the bus mode */
77800 +                    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_MMC8BIT) {
77801 +                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_MMC8_BIT);
77802 +                    } else if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
77803 +                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_4_BIT);
77804 +                    } else {
77805 +                        /* we leave it to default to 1 bit mode */
77806 +                    }
77807 +                }
77808 +            } else {
77809 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get MMC Extended CSD \n"));
77810 +                    /* just fall through, we'll do without the extended information
77811 +                     * and run it like a legacy MMC card */
77812 +                status = SDIO_STATUS_SUCCESS;
77813 +            }
77814 +
77815 +            KernelFree(pExtData);
77816 +        }
77817 +
77818 +        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
77819 +
77820 +            if (0 == cardReportedRate) {
77821 +                    /* extract rate from CSD only if it was not set by earlier tests */
77822 +                cardReportedRate = ConvertEncodedTransSpeed(
77823 +                                GET_SD_CSD_TRANS_SPEED(pHcd->CardProperties.CardCSD));
77824 +                    /* fall through and test for zero again */
77825 +            }
77826 +
77827 +            if (cardReportedRate != 0) {
77828 +                     /* adjust clock based on what the card can handle */
77829 +                ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
77830 +            } else {
77831 +                    /* something is wrong with the CSD */
77832 +                if (DBG_GET_DEBUG_LEVEL() >= SDDBG_TRACE) {
77833 +                    SDLIB_PrintBuffer(pHcd->CardProperties.CardCSD,
77834 +                                      MAX_CARD_RESPONSE_BYTES,
77835 +                                      "SDIO Bus Driver: CSD Dump");
77836 +                }
77837 +                    /* can't figure out the card rate, so set reasonable defaults */
77838 +                if (pHcd->CardProperties.Flags & CARD_SD) {
77839 +                    ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
77840 +                } else {
77841 +                    ADJUST_OPER_CLOCK(pBusMode,MMC_MAX_BUS_CLOCK);
77842 +                }
77843 +            }
77844 +        }
77845 +
77846 +            /* note, we do SDIO card "after" SD in case this is a combo card */
77847 +        if (pHcd->CardProperties.Flags & CARD_SDIO) {
77848 +                /* read card capabilities */
77849 +            status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
77850 +                                         SDIO_CARD_CAPS_REG,
77851 +                                         &pHcd->CardProperties.SDIOCaps);
77852 +            if (!SDIO_SUCCESS(status)) {
77853 +                break;
77854 +            }
77855 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Card Caps: 0x%X \n",pHcd->CardProperties.SDIOCaps));
77856 +            if (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_LOW_SPEED) {
77857 +                    /* adjust max clock for LS device */
77858 +                ADJUST_OPER_CLOCK(pBusMode,SDIO_LOW_SPEED_MAX_BUS_CLOCK);
77859 +                    /* adjust bus if LS device does not support 4 bit mode */
77860 +                if (!(pHcd->CardProperties.SDIOCaps & SDIO_CAPS_4BIT_LS)) {
77861 +                    if (!spiMode) {
77862 +                            /* low speed device does not support 4 bit mode, force us to 1 bit */
77863 +                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags,
77864 +                                               SDCONFIG_BUS_WIDTH_1_BIT);
77865 +                    }
77866 +                }
77867 +            }
77868 +
77869 +                /* check if 1.2 card supports high speed mode, checking HCD as well*/
77870 +            if (SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pHcd->pPseudoDev) &&
77871 +                (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
77872 +                !spiMode) {
77873 +                UCHAR hsControl = 0;
77874 +
77875 +                status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
77876 +                                             SDIO_HS_CONTROL_REG,
77877 +                                             &hsControl);
77878 +
77879 +                if (!SDIO_SUCCESS(status)) {
77880 +                    DBG_PRINT(SDDBG_TRACE,
77881 +                        ("SDIO Failed to read high speed control (%d) \n",status));
77882 +                        /* reset status and continue */
77883 +                    status = SDIO_STATUS_SUCCESS;
77884 +                } else {
77885 +                    if (hsControl & SDIO_HS_CONTROL_SHS) {
77886 +                        DBG_PRINT(SDDBG_TRACE, ("SDIO Card Supports High Speed Mode\n"));
77887 +                        pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
77888 +                    }
77889 +                }
77890 +
77891 +            }
77892 +
77893 +            cardReportedRate = 0;
77894 +            temp = sizeof(func0ext);
77895 +            tplAddr = pHcd->CardProperties.CommonCISPtr;
77896 +                /* get the FUNCE tuple */
77897 +            status = SDLIB_FindTuple(pHcd->pPseudoDev,
77898 +                                     CISTPL_FUNCE,
77899 +                                     &tplAddr,
77900 +                                     (PUINT8)&func0ext,
77901 +                                     &temp);
77902 +            if (!SDIO_SUCCESS(status) || (temp < sizeof(func0ext))) {
77903 +                DBG_PRINT(SDDBG_WARN, ("SDIO Function 0 Ext. Tuple Missing (Got size:%d) \n", temp));
77904 +                    /* reset status */
77905 +                status = SDIO_STATUS_SUCCESS;
77906 +            } else {
77907 +                    /* convert encoded value to rate */
77908 +                cardReportedRate = ConvertEncodedTransSpeed(func0ext.MaxTransSpeed);
77909 +            }
77910 +
77911 +            if (cardReportedRate != 0) {
77912 +                if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
77913 +                    if (cardReportedRate <= SD_MAX_BUS_CLOCK) {
77914 +                        DBG_PRINT(SDDBG_WARN,
77915 +                            ("SDIO Function tuple reports clock:%d Hz, with advertised High Speed support \n", cardReportedRate));
77916 +                            /* back off high speed support */
77917 +                        pBusMode->BusModeFlags &= ~SDCONFIG_BUS_MODE_SD_HS;
77918 +                    }
77919 +                } else {
77920 +                    if (cardReportedRate > SD_MAX_BUS_CLOCK) {
77921 +                        DBG_PRINT(SDDBG_WARN,
77922 +                            ("SDIO Function tuple reports clock:%d Hz, without advertising High Speed support..using 25Mhz \n", cardReportedRate));
77923 +                        cardReportedRate = SD_MAX_BUS_CLOCK;
77924 +                    }
77925 +                }
77926 +                    /* adjust clock based on what the card can handle */
77927 +                ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
77928 +
77929 +            } else {
77930 +                    /* set a reasonable default */
77931 +                ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
77932 +            }
77933 +        }
77934 +    } while (FALSE);
77935 +
77936 +    if (pReq != NULL) {
77937 +        FreeRequest(pReq);
77938 +    }
77939 +    return status;
77940 +}
77941 +
77942 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
77943 +  SetOperationalBusMode - set operational bus mode
77944 +  Input:  pDevice - pDevice that is requesting the change
77945 +          pBusMode - operational bus mode
77946 +  Output: pBusMode - on return will have the actual clock rate set
77947 +  Return: status
77948 +  Notes:
77949 +
77950 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
77951 +SDIO_STATUS SetOperationalBusMode(PSDDEVICE                pDevice,
77952 +                                  PSDCONFIG_BUS_MODE_DATA  pBusMode)
77953 +{
77954 +    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
77955 +    UCHAR           regData;
77956 +    UINT32          arg;
77957 +    UINT32          switcharg;
77958 +    PSDHCD          pHcd = pDevice->pHcd;
77959 +
77960 +        /* synchronize access for updating bus mode settings */
77961 +    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
77962 +    if (!SDIO_SUCCESS(status)) {
77963 +        return status;
77964 +    }
77965 +
77966 +    do {
77967 +
77968 +        if (!IS_CARD_PRESENT(pHcd)) {
77969 +                /* for an empty slot (a Pseudo dev was passed in) we still allow the
77970 +                 * bus mode to be set for the card detect
77971 +                 * polling */
77972 +            status = _IssueConfig(pHcd,SDCONFIG_BUS_MODE_CTRL,pBusMode,sizeof(SDCONFIG_BUS_MODE_DATA));
77973 +            if (!SDIO_SUCCESS(status)) {
77974 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
77975 +                                        status));
77976 +            }
77977 +                /* nothing more to do */
77978 +            break;
77979 +        }
77980 +
77981 +
77982 +        if ((pBusMode->BusModeFlags == SDDEVICE_GET_BUSMODE_FLAGS(pDevice)) &&
77983 +            (pBusMode->ClockRate == SDDEVICE_GET_OPER_CLOCK(pDevice))) {
77984 +            DBG_PRINT(SDDBG_TRACE,
77985 +               ("SDIO Bus Driver: Bus mode already set, nothing to do\n"));
77986 +            pBusMode->ActualClockRate = SDDEVICE_GET_OPER_CLOCK(pDevice);
77987 +            break;
77988 +        }
77989 +
77990 +        if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) {
77991 +            if (!(pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED)) {
77992 +                status = SDIO_STATUS_INVALID_PARAMETER;
77993 +                DBG_PRINT(SDDBG_ERROR,
77994 +                        ("SDIO Bus Driver: HCD does not support MMC High Speed\n"));
77995 +                break;
77996 +            }
77997 +        }
77998 +
77999 +        if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
78000 +            if (!(pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED)) {
78001 +                status = SDIO_STATUS_INVALID_PARAMETER;
78002 +                DBG_PRINT(SDDBG_ERROR,
78003 +                        ("SDIO Bus Driver: HCD does not support SD High Speed\n"));
78004 +                break;
78005 +            }
78006 +        }
78007 +
78008 +            /* before we set the operational clock and mode, configure the clock for high
78009 +             * speed mode on the card , if necessary */
78010 +        if ((pHcd->CardProperties.Flags & CARD_MMC) &&
78011 +            (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) &&
78012 +            !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_MMC_HS)) {
78013 +
78014 +            switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
78015 +                                             MMC_SWITCH_WRITE_BYTE,
78016 +                                             MMC_EXT_HS_TIMING_OFFSET,
78017 +                                             MMC_EXT_HS_TIMING_ENABLE);
78018 +            status = _IssueSimpleBusRequest(pHcd,
78019 +                                            MMC_CMD_SWITCH,
78020 +                                            switcharg,
78021 +                                            SDREQ_FLAGS_RESP_R1B,
78022 +                                            NULL);
78023 +            if (!SDIO_SUCCESS(status)) {
78024 +                DBG_PRINT(SDDBG_ERROR,
78025 +                 ("SDIO Bus Driver: Failed to switch MMC High Speed Mode (arg:0x%X): %d \n",
78026 +                                        switcharg, status));
78027 +                break;
78028 +            }
78029 +
78030 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: High Speed MMC enabled (arg:0x%X)\n",
78031 +                switcharg));
78032 +        }
78033 +
78034 +            /* before setting bus mode and clock in the HCD, switch card to high speed mode
78035 +             * if necessary */
78036 +        if ((pHcd->CardProperties.Flags & CARD_SD) &&
78037 +            (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
78038 +            !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
78039 +            UINT32     arg;
78040 +            PUINT8     pSwitchStatusBlock;
78041 +
78042 +            pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
78043 +
78044 +            if (NULL == pSwitchStatusBlock) {
78045 +                status = SDIO_STATUS_NO_RESOURCES;
78046 +                break;
78047 +            }
78048 +
78049 +                /* set high speed group */
78050 +            arg = SD_SWITCH_FUNC_ARG_GROUP_SET(SD_SWITCH_HIGH_SPEED_GROUP,
78051 +                                               SD_SWITCH_HIGH_SPEED_FUNC_NO);
78052 +
78053 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Setting SD Card for High Speed mode (CMD6 arg:0x%X)\n",arg));
78054 +
78055 +                /* issue simple data transfer request to switch modes */
78056 +            status = _IssueBusRequestBd(pHcd,
78057 +                                        CMD6,
78058 +                                        arg,
78059 +                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
78060 +                                        NULL,
78061 +                                        pSwitchStatusBlock,
78062 +                                        SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
78063 +
78064 +            if (SDIO_SUCCESS(status)) {
78065 +                ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
78066 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Result, Got Max Current:%d mA, SwitchResult:0x%X \n",
78067 +                      SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock),
78068 +                      SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP)));
78069 +                if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
78070 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Error in Status Block after High Speed Switch (current==0) \n"));
78071 +                    status = SDIO_STATUS_DEVICE_ERROR;
78072 +                }
78073 +                if (SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP) !=
78074 +                    SD_SWITCH_HIGH_SPEED_FUNC_NO) {
78075 +                    DBG_PRINT(SDDBG_ERROR,
78076 +                        ("SDIO Bus Driver: Error in Status Block after High Speed Switch (Group1 did not switch) \n"));
78077 +                    status = SDIO_STATUS_DEVICE_ERROR;
78078 +                }
78079 +                if (SDIO_SUCCESS(status)) {
78080 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Mode Enabled \n"));
78081 +                } else {
78082 +                    SDLIB_PrintBuffer(pSwitchStatusBlock,
78083 +                                      SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
78084 +                                       "SDIO Bus Driver: SD Switch Status Block Error");
78085 +                }
78086 +            } else {
78087 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to Set SD High Speed Mode (%d) \n",status));
78088 +            }
78089 +            KernelFree(pSwitchStatusBlock);
78090 +
78091 +            if (!SDIO_SUCCESS(status)) {
78092 +                break;
78093 +            }
78094 +        }
78095 +
78096 +            /* enable/disable high speed mode for SDIO card */
78097 +        if (pHcd->CardProperties.Flags & CARD_SDIO) {
78098 +            BOOL doSet = TRUE;
78099 +
78100 +            if ((pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
78101 +                !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
78102 +                    /* enable */
78103 +                regData = SDIO_HS_CONTROL_EHS;
78104 +            } else if (!(pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
78105 +                       (SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
78106 +                    /* disable */
78107 +                regData = 0;
78108 +            } else {
78109 +                    /* do nothing */
78110 +                doSet = FALSE;
78111 +            }
78112 +
78113 +            if (doSet) {
78114 +                status = Cmd52WriteByteCommon(pDevice,
78115 +                                              SDIO_HS_CONTROL_REG,
78116 +                                              &regData);
78117 +
78118 +                if (!SDIO_SUCCESS(status)) {
78119 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to %s HS mode in SDIO card : Err:%d\n",
78120 +                                            (SDIO_HS_CONTROL_EHS == regData) ? "enable":"disable" , status));
78121 +                    break;
78122 +                } else {
78123 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver:SDIO Card %s for High Speed mode \n",
78124 +                                    (SDIO_HS_CONTROL_EHS == regData) ? "enabled":"disabled" ));
78125 +                }
78126 +            }
78127 +        }
78128 +
78129 +            /* use synchronize-with-bus request version, this may have been requested by a
78130 +             * function driver */
78131 +        status = SDLIB_IssueConfig(pDevice,
78132 +                                   SDCONFIG_BUS_MODE_CTRL,
78133 +                                   pBusMode,
78134 +                                   sizeof(SDCONFIG_BUS_MODE_DATA));
78135 +
78136 +        if (!SDIO_SUCCESS(status)) {
78137 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
78138 +                                    status));
78139 +            break;
78140 +        }
78141 +
78142 +             /* check requested bus width against the current mode */
78143 +        if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) ==
78144 +                SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
78145 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Bus mode set, no width change\n"));
78146 +            break;
78147 +        }
78148 +
78149 +        if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
78150 +                /* nothing more to do for SPI */
78151 +            break;
78152 +        }
78153 +
78154 +            /* set the bus width for SD and combo cards */
78155 +        if (pHcd->CardProperties.Flags & CARD_SD) {
78156 +            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
78157 +                    /* turn off card detect resistor */
78158 +                status = _IssueSimpleBusRequest(pHcd,
78159 +                                                ACMD42,
78160 +                                                0, /* disable CD */
78161 +                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
78162 +                                                NULL);
78163 +                if (!SDIO_SUCCESS(status)) {
78164 +                    DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to disable CD Res: %d \n",
78165 +                                           status)); /* this should be okay */
78166 +                }
78167 +                arg = SD_ACMD6_BUS_WIDTH_4_BIT;
78168 +            } else {
78169 +                    /* don't need to turn off CD in 1 bit mode, just set mode */
78170 +                arg = SD_ACMD6_BUS_WIDTH_1_BIT;
78171 +
78172 +            }
78173 +                /* set the bus width */
78174 +            status = _IssueSimpleBusRequest(pHcd,
78175 +                                            ACMD6,
78176 +                                            arg, /* set bus mode */
78177 +                                            SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
78178 +                                            NULL);
78179 +            if (!SDIO_SUCCESS(status)) {
78180 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus width: %d \n",
78181 +                                        status));
78182 +                break;
78183 +            }
78184 +        }
78185 +            /* set bus width for SDIO cards */
78186 +        if (pHcd->CardProperties.Flags & CARD_SDIO) {
78187 +                /* default */
78188 +            regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_1_BIT;
78189 +
78190 +            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
78191 +                    /* turn off card detect resistor and set buswidth */
78192 +                regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_4_BIT;
78193 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 4 bit mode on card \n"));
78194 +            } else {
78195 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 1 bit mode on card \n"));
78196 +            }
78197 +            status = Cmd52WriteByteCommon(pDevice,
78198 +                                          SDIO_BUS_IF_REG,
78199 +                                          &regData);
78200 +            if (!SDIO_SUCCESS(status)) {
78201 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in Card : Err:%d\n",
78202 +                                        status));
78203 +                break;
78204 +            }
78205 +
78206 +                /* check for 4-bit interrupt detect mode */
78207 +            if ((SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) &&
78208 +                (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
78209 +                (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
78210 +                    /* enable interrupts between blocks, this doesn't actually turn on interrupts
78211 +                     * it merely allows interrupts to be asserted in the inter-block gap */
78212 +                pHcd->CardProperties.SDIOCaps |= SDIO_CAPS_ENB_INT_MULTI_BLK;
78213 +
78214 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4-Bit Multi-blk Interrupt support enabled\n"));
78215 +            } else {
78216 +                    /* make sure this is disabled */
78217 +                pHcd->CardProperties.SDIOCaps &= ~SDIO_CAPS_ENB_INT_MULTI_BLK;
78218 +            }
78219 +
78220 +            status = Cmd52WriteByteCommon(pDevice,
78221 +                                          SDIO_CARD_CAPS_REG,
78222 +                                          &pHcd->CardProperties.SDIOCaps);
78223 +            if (!SDIO_SUCCESS(status)) {
78224 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to update Card Caps register Err:%d\n",
78225 +                                        status));
78226 +                break;
78227 +            }
78228 +        }
78229 +
78230 +            /* set data bus width for MMC */
78231 +        if (pHcd->CardProperties.Flags & CARD_MMC) {
78232 +            UINT8  buswidth = 0;
78233 +
78234 +            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
78235 +                buswidth = MMC_EXT_BUS_WIDTH_4_BIT;
78236 +            } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
78237 +                buswidth = MMC_EXT_BUS_WIDTH_8_BIT;
78238 +            } else {
78239 +                /* normal 1 bit mode .. nothing to do */
78240 +                break;
78241 +            }
78242 +                /* now set the bus mode on the card */
78243 +            switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
78244 +                                             MMC_SWITCH_WRITE_BYTE,
78245 +                                             MMC_EXT_BUS_WIDTH_OFFSET,
78246 +                                             buswidth);
78247 +
78248 +            status = _IssueSimpleBusRequest(pHcd,
78249 +                                            MMC_CMD_SWITCH,
78250 +                                            switcharg,
78251 +                                            SDREQ_FLAGS_RESP_R1B,
78252 +                                            NULL);
78253 +            if (!SDIO_SUCCESS(status)) {
78254 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set MMC bus width (arg:0x%X): %d \n",
78255 +                                        switcharg, status));
78256 +                break;
78257 +            }
78258 +
78259 +            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
78260 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4 bit MMC mode enabled (arg:0x%X) \n",
78261 +                      switcharg));
78262 +            } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
78263 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 8-Bit MMC mode enabled (arg:0x%X) \n",
78264 +                      switcharg));
78265 +            }
78266 +        }
78267 +
78268 +    } while (FALSE);
78269 +
78270 +    if (SDIO_SUCCESS(status)) {
78271 +            /* set the operating mode */
78272 +        pHcd->CardProperties.BusMode = pBusMode->BusModeFlags;
78273 +            /* set the actual clock rate */
78274 +        pHcd->CardProperties.OperBusClock = pBusMode->ActualClockRate;
78275 +    }
78276 +
78277 +    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
78278 +
78279 +    return status;
78280 +}
78281 +
78282 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
78283 +  CardInitSetup - setup host for card initialization
78284 +  Input:  pHcd - HCD object
78285 +  Output:
78286 +  Return:
78287 +  Notes:
78288 +
78289 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
78290 +SDIO_STATUS CardInitSetup(PSDHCD pHcd)
78291 +{
78292 +    SDCONFIG_INIT_CLOCKS_DATA   initClocks;
78293 +    SDCONFIG_BUS_MODE_DATA      busMode;
78294 +    UINT32                      OCRvalue;
78295 +    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
78296 +
78297 +    ZERO_OBJECT(initClocks);
78298 +    ZERO_OBJECT(busMode);
78299 +        /* setup defaults */
78300 +    initClocks.NumberOfClocks = SDMMC_MIN_INIT_CLOCKS;
78301 +    busMode.ClockRate = SD_INIT_BUS_CLOCK;
78302 +
78303 +        /* check for SPI only */
78304 +    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_SPI) {
78305 +            /* SPI cards startup in non-CRC mode with the exception of CMD0, the
78306 +             * HCDs must issue CMD0 with the correct CRC , the spec shows that a
78307 +             * CMD 0 sequence is 0x40,0x00,0x00,0x00,0x00,0x95 */
78308 +        busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_SPI | SDCONFIG_BUS_MODE_SPI_NO_CRC;
78309 +    }
78310 +        /* check if host supports 1 bit mode */
78311 +        /* TODO : if host supports power switching, we can
78312 +         * could initialize cards in SPI mode first */
78313 +    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_1BIT) {
78314 +        busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_1_BIT;
78315 +    }
78316 +
78317 +        /* set initial VDD, starting at the highest allowable voltage and working
78318 +         * our way down */
78319 +    if (pHcd->SlotVoltageCaps & SLOT_POWER_3_3V) {
78320 +        OCRvalue = SD_OCR_3_2_TO_3_3_VDD;
78321 +    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_3_0V) {
78322 +        OCRvalue = SD_OCR_2_9_TO_3_0_VDD;
78323 +    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_8V) {
78324 +        OCRvalue = SD_OCR_2_7_TO_2_8_VDD;
78325 +    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_0V) {
78326 +        OCRvalue = SD_OCR_1_9_TO_2_0_VDD;
78327 +    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_8V) {
78328 +        OCRvalue = SD_OCR_1_7_TO_1_8_VDD;
78329 +    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_6V) {
78330 +        OCRvalue = SD_OCR_1_6_TO_1_7_VDD;
78331 +    } else {
78332 +        DBG_ASSERT(FALSE);
78333 +        OCRvalue = 0;
78334 +    }
78335 +
78336 +    do {
78337 +            /* power up the card */
78338 +        status = AdjustSlotPower(pHcd, &OCRvalue);
78339 +        if (!SDIO_SUCCESS(status)) {
78340 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust slot power \n"));
78341 +            break;
78342 +        }
78343 +        status = SetOperationalBusMode(pHcd->pPseudoDev,&busMode);
78344 +        if (!SDIO_SUCCESS(status)) {
78345 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode \n"));
78346 +            break;
78347 +        }
78348 +        status = _IssueConfig(pHcd,SDCONFIG_SEND_INIT_CLOCKS,&initClocks,sizeof(initClocks));
78349 +        if (!SDIO_SUCCESS(status)) {
78350 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to send init clocks in hcd \n"));
78351 +            break;
78352 +        }
78353 +
78354 +    } while(FALSE);
78355 +
78356 +    return status;
78357 +}
78358 +
78359 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
78360 +  SDInitializeCard - initialize card
78361 +  Input:  pHcd - HCD object
78362 +  Output: pProperties - card properties
78363 +  Return:
78364 +  Notes:
78365 +
78366 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
78367 +SDIO_STATUS SDInitializeCard(PSDHCD pHcd)
78368 +{
78369 +    SDCONFIG_BUS_MODE_DATA      busMode;
78370 +    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
78371 +    PSDREQUEST                  pReq = NULL;
78372 +    UINT32                      OCRvalue;
78373 +    UINT32                      tplAddr;
78374 +    UINT8                       temp;
78375 +    struct SDIO_MANFID_TPL      manfid;
78376 +    SDCONFIG_WP_VALUE           wpValue;
78377 +    UINT8                       cisBuffer[3];
78378 +
78379 +    OCRvalue = 0;
78380 +
78381 +    do {
78382 +        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78383 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in SPI mode \n"));
78384 +        } else {
78385 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in MMC/SD mode \n"));
78386 +        }
78387 +
78388 +        pReq = AllocateRequest();
78389 +        if (NULL == pReq) {
78390 +            status = SDIO_STATUS_NO_RESOURCES;
78391 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to allocate bus request \n"));
78392 +            break;
78393 +        }
78394 +        memset(pReq, 0, sizeof(SDREQUEST));
78395 +
78396 +        status = CardInitSetup(pHcd);
78397 +        if (!SDIO_SUCCESS(status)) {
78398 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to setup card \n"));
78399 +            break;
78400 +        }
78401 +        status = _IssueConfig(pHcd,SDCONFIG_GET_WP,&wpValue,sizeof(wpValue));
78402 +        if (!SDIO_SUCCESS(status)) {
78403 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: host doesn't support Write Protect \n"));
78404 +        } else {
78405 +            if (wpValue) {
78406 +                pHcd->CardProperties.Flags |= CARD_SD_WP;
78407 +                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: SD WP switch is on \n"));
78408 +            }
78409 +        }
78410 +
78411 +        if (!(pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) &&
78412 +            IS_HCD_BUS_MODE_SPI(pHcd)) {
78413 +                /* for non-slot polling HCDs operating in SPI mode
78414 +                 * issue CMD0 to reset card state and to place the card
78415 +                 * in SPI mode.  If slot polling is used, the polling thread
78416 +                 * will have already issued a CMD0 to place the card in SPI mode*/
78417 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78418 +                INT ii = 256;
78419 +                status = SDIO_STATUS_ERROR;
78420 +                /* if the CMD0 fails, retry it. Some cards have a hard time getting into SPI mode.*/
78421 +                while ((!SDIO_SUCCESS(status)) && (ii-- >= 0)) {
78422 +                    status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
78423 +                    OSSleep(20);
78424 +                }
78425 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: cmd0 go SPI retries:(256) %d\n", ii));
78426 +
78427 +            } else {
78428 +                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
78429 +            }
78430 +            if (!SDIO_SUCCESS(status)) {
78431 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
78432 +                break;
78433 +            }
78434 +        }
78435 +
78436 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SDIO.. \n"));
78437 +            /* check for SDIO card by trying to read it's OCR */
78438 +        status = ReadOCR(pHcd,CARD_SDIO,pReq,0,&OCRvalue);
78439 +        if (SDIO_SUCCESS(status)) {
78440 +                /* we got a response, this is an SDIO card */
78441 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78442 +                    /* handle SPI */
78443 +                pHcd->CardProperties.IOFnCount = SPI_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
78444 +                if (SPI_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
78445 +                        /* flag an SD function exists */
78446 +                    pHcd->CardProperties.Flags |= CARD_SD;
78447 +                }
78448 +            } else {
78449 +                    /* handle native SD */
78450 +                pHcd->CardProperties.IOFnCount = SD_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
78451 +                if (SD_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
78452 +                        /* flag an SD function exists */
78453 +                    pHcd->CardProperties.Flags |= CARD_SD;
78454 +                }
78455 +
78456 +            }
78457 +            if (0 == pHcd->CardProperties.IOFnCount) {
78458 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card reports no functions \n"));
78459 +                status = SDIO_STATUS_DEVICE_ERROR;
78460 +                pHcd->CardProperties.Flags = 0;
78461 +                break;
78462 +            }
78463 +            pHcd->CardProperties.Flags |= CARD_SDIO;
78464 +
78465 +            DBG_PRINT(SDDBG_TRACE,
78466 +                ("SDIO Bus Driver: SDIO Card, Functions: %d Card Info Flags:0x%X OCR:0x%8.8X\n",
78467 +                      pHcd->CardProperties.IOFnCount, pHcd->CardProperties.Flags, OCRvalue));
78468 +                /* adjust slot power for this SDIO card */
78469 +            status = AdjustSlotPower(pHcd, &OCRvalue);
78470 +            if (!SDIO_SUCCESS(status)) {
78471 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
78472 +                break;
78473 +            }
78474 +                /* poll for SDIO card ready */
78475 +            status = PollCardReady(pHcd,OCRvalue,CARD_SDIO);
78476 +            if (!SDIO_SUCCESS(status)) {
78477 +                break;
78478 +            }
78479 +        } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
78480 +                /* major error in hcd, bail */
78481 +            break;
78482 +        }
78483 +
78484 +            /* check if this is an SDIO-only card before continuing  */
78485 +        if (!(pHcd->CardProperties.Flags & CARD_SD) && (pHcd->CardProperties.Flags & CARD_SDIO)) {
78486 +                /* this is an SDIO card with no memory function */
78487 +            goto prepareCard;
78488 +        }
78489 +
78490 +        if (!(pHcd->CardProperties.Flags & CARD_SDIO)) {
78491 +                /* issue go idle only if we did not find an SDIO function in our earlier test */
78492 +            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78493 +                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
78494 +            } else {
78495 +                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
78496 +            }
78497 +            if (!SDIO_SUCCESS(status)) {
78498 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
78499 +                break;
78500 +            }
78501 +        }
78502 +
78503 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SD Memory.. \n"));
78504 +            /* SD Memory Card checking */
78505 +            /* test for present of SD card (stand-alone or combo card) */
78506 +        status = TestPresence(pHcd, CARD_SD, pReq);
78507 +        if (SDIO_SUCCESS(status)) {
78508 +                /* there is an SD Card present, could be part of a combo system */
78509 +            pHcd->CardProperties.Flags |= CARD_SD;
78510 +            if (0 == OCRvalue) {
78511 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory card detected. \n"));
78512 +                    /* no OCR value on entry this is a stand-alone card, go and get it*/
78513 +                status = ReadOCR(pHcd,CARD_SD,pReq,0,&OCRvalue);
78514 +                if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
78515 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get OCR (status:%d) \n",
78516 +                                            status));
78517 +                    break;
78518 +                }
78519 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Card Reports OCR:0x%8.8X \n", OCRvalue));
78520 +                status = AdjustSlotPower(pHcd, &OCRvalue);
78521 +                if (!SDIO_SUCCESS(status)) {
78522 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
78523 +                    break;
78524 +                }
78525 +            } else {
78526 +                 DBG_ASSERT((pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
78527 +                 DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Combo Card detected \n"));
78528 +            }
78529 +                /* poll for SD card ready */
78530 +            status = PollCardReady(pHcd,OCRvalue,CARD_SD);
78531 +            if (!SDIO_SUCCESS(status)) {
78532 +                    /* check if this card has an SDIO function */
78533 +                if (pHcd->CardProperties.Flags & CARD_SDIO) {
78534 +                    DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Combo Detected but SD memory function failed \n"));
78535 +                        /* allow SDIO functions to load normally */
78536 +                    status = SDIO_STATUS_SUCCESS;
78537 +                        /* remove SD flag */
78538 +                    pHcd->CardProperties.Flags &= ~CARD_SD;
78539 +                } else {
78540 +                    break;
78541 +                }
78542 +            } else {
78543 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory ready. \n"));
78544 +            }
78545 +                /* we're done, no need to check for MMC */
78546 +            goto prepareCard;
78547 +        } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
78548 +                /* major error in hcd, bail */
78549 +            break;
78550 +        }
78551 +
78552 +        /* MMC card checking */
78553 +        /* if we get here, these better not be set */
78554 +        DBG_ASSERT(!(pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
78555 +           /* issue go idle */
78556 +        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78557 +            status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
78558 +        } else {
78559 +            status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
78560 +        }
78561 +        if (!SDIO_SUCCESS(status)) {
78562 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
78563 +            break;
78564 +        }
78565 +
78566 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for MMC.. \n"));
78567 +        status = TestPresence(pHcd, CARD_MMC, pReq);
78568 +        if (!SDIO_SUCCESS(status)) {
78569 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: unknown card detected \n"));
78570 +            break;
78571 +        }
78572 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Detected \n"));
78573 +        pHcd->CardProperties.Flags |= CARD_MMC;
78574 +            /* read the OCR value */
78575 +        status = ReadOCR(pHcd,CARD_MMC,pReq,0,&OCRvalue);
78576 +        if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
78577 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to get OCR (status:%d)",
78578 +                                    status));
78579 +            break;
78580 +        }
78581 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Reports OCR:0x%8.8X \n", OCRvalue));
78582 +            /* adjust power */
78583 +        status = AdjustSlotPower(pHcd, &OCRvalue);
78584 +        if (!SDIO_SUCCESS(status)) {
78585 +             DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
78586 +             break;
78587 +        }
78588 +            /* poll for MMC card ready */
78589 +        status = PollCardReady(pHcd,OCRvalue,CARD_MMC);
78590 +        if (!SDIO_SUCCESS(status)) {
78591 +            break;
78592 +        }
78593 +            /* fall through and prepare MMC card */
78594 +
78595 +prepareCard:
78596 +            /* we're done figuring out what was inserted, and setting up
78597 +             * optimal slot voltage, now we need to prepare the card */
78598 +        if (!IS_HCD_BUS_MODE_SPI(pHcd) &&
78599 +            (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC))) {
78600 +                /* non-SPI SD or MMC cards need to be moved to the "ident" state before we can get the
78601 +                 * RCA or select the card using the new RCA */
78602 +            status = _IssueSimpleBusRequest(pHcd,CMD2,0,SDREQ_FLAGS_RESP_R2,pReq);
78603 +            if (!SDIO_SUCCESS(status)){
78604 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to move SD/MMC card into ident state \n"));
78605 +                break;
78606 +            }
78607 +        }
78608 +
78609 +        if (!IS_HCD_BUS_MODE_SPI(pHcd)) {
78610 +                /* non-SPI mode cards need their RCA's setup */
78611 +            if (pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)) {
78612 +                    /* issue CMD3 to get RCA on SD/SDIO cards */
78613 +                status = _IssueSimpleBusRequest(pHcd,CMD3,0,SDREQ_FLAGS_RESP_R6,pReq);
78614 +                if (!SDIO_SUCCESS(status)){
78615 +                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to get RCA for SD/SDIO card \n"));
78616 +                    break;
78617 +                }
78618 +                pHcd->CardProperties.RCA = SD_R6_GET_RCA(pReq->Response);
78619 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/SDIO RCA:0x%X \n",
78620 +                                        pHcd->CardProperties.RCA));
78621 +            } else if (pHcd->CardProperties.Flags & CARD_MMC) {
78622 +                    /* for MMC cards, we have to assign a relative card address */
78623 +                    /* just a non-zero number */
78624 +                pHcd->CardProperties.RCA = 1;
78625 +                    /* issue CMD3 to set the RCA for MMC cards */
78626 +                status = _IssueSimpleBusRequest(pHcd,
78627 +                                                CMD3,(pHcd->CardProperties.RCA << 16),
78628 +                                                SDREQ_FLAGS_RESP_R1,pReq);
78629 +                if (!SDIO_SUCCESS(status)){
78630 +                    DBG_PRINT(SDDBG_ERROR,
78631 +                            ("SDIO Bus Driver: failed to set RCA for MMC card! (err=%d) \n",status));
78632 +                    break;
78633 +                }
78634 +            } else {
78635 +                DBG_ASSERT(FALSE);
78636 +            }
78637 +        }
78638 +            /* select the card in order to get the rest of the card info, applies
78639 +             * to SDIO/SD/MMC cards*/
78640 +        status = SelectDeselectCard(pHcd, TRUE);
78641 +        if (!SDIO_SUCCESS(status)) {
78642 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to select card! \n"));
78643 +            break;
78644 +        }
78645 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver, Card now Selected.. \n"));
78646 +
78647 +        if (pHcd->CardProperties.Flags & CARD_SDIO) {
78648 +                /* read SDIO revision register */
78649 +            status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
78650 +            if (!SDIO_SUCCESS(status)) {
78651 +                break;
78652 +            }
78653 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Revision Reg: 0x%X \n", temp));
78654 +            switch (temp & SDIO_REV_MASK) {
78655 +                case SDIO_REV_1_00:
78656 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.00 \n"));
78657 +                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
78658 +                    break;
78659 +                case SDIO_REV_1_10:
78660 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.10 \n"));
78661 +                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_10;
78662 +                    break;
78663 +                case SDIO_REV_1_20:
78664 +                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.20 \n"));
78665 +                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_20;
78666 +                    break;
78667 +                default:
78668 +                    DBG_PRINT(SDDBG_WARN, ("SDIO Warning: unknown SDIO revision, treating like 1.0 device \n"));
78669 +                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
78670 +                    break;
78671 +            }
78672 +                /* get the common CIS ptr */
78673 +            status = Cmd52ReadMultipleCommon(pHcd->pPseudoDev,
78674 +                                             SDIO_CMN_CIS_PTR_LOW_REG,
78675 +                                             cisBuffer,
78676 +                                             3);
78677 +            if (!SDIO_SUCCESS(status)) {
78678 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CIS ptr, Err:%d", status));
78679 +                break;
78680 +            }
78681 +                /* this is endian-safe*/
78682 +            pHcd->CardProperties.CommonCISPtr = ((UINT32)cisBuffer[0]) |
78683 +                                                (((UINT32)cisBuffer[1]) << 8) |
78684 +                                                (((UINT32)cisBuffer[2]) << 16);
78685 +
78686 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Card CIS Ptr: 0x%X \n", pHcd->CardProperties.CommonCISPtr));
78687 +            temp = sizeof(manfid);
78688 +            tplAddr = pHcd->CardProperties.CommonCISPtr;
78689 +                /* get the MANFID tuple */
78690 +            status = SDLIB_FindTuple(pHcd->pPseudoDev,
78691 +                                     CISTPL_MANFID,
78692 +                                     &tplAddr,
78693 +                                     (PUINT8)&manfid,
78694 +                                     &temp);
78695 +            if (!SDIO_SUCCESS(status)) {
78696 +                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get MANFID tuple err:%d \n", status));
78697 +                status = SDIO_STATUS_SUCCESS;
78698 +            } else {
78699 +                    /* save this off so that it can be copied into each SDIO Func's SDDEVICE structure */
78700 +                pHcd->CardProperties.SDIO_ManufacturerCode =
78701 +                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
78702 +                pHcd->CardProperties.SDIO_ManufacturerID =
78703 +                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
78704 +                DBG_PRINT(SDDBG_TRACE, ("SDIO MANFID:0x%X, MANFINFO:0x%X \n",
78705 +                                        pHcd->CardProperties.SDIO_ManufacturerID,
78706 +                                        pHcd->CardProperties.SDIO_ManufacturerCode));
78707 +            }
78708 +
78709 +            if (pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10) {
78710 +                    /* read power control */
78711 +                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
78712 +                if (SDIO_SUCCESS(status)) {
78713 +                        /* check for power control support which indicates the card may use more
78714 +                         * than 200 mA */
78715 +                    if (temp & SDIO_POWER_CONTROL_SMPC) {
78716 +                            /* check that the host can support this. */
78717 +                        if (pHcd->MaxSlotCurrent >= SDIO_EMPC_CURRENT_THRESHOLD) {
78718 +                            temp = SDIO_POWER_CONTROL_EMPC;
78719 +                                /* enable power control on the card */
78720 +                            status = Cmd52WriteByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
78721 +                            if (!SDIO_SUCCESS(status)) {
78722 +                                DBG_PRINT(SDDBG_ERROR,
78723 +                                        ("SDIO Busdriver: failed to enable power control (%d) \n",status));
78724 +                                break;
78725 +                            }
78726 +                                /* mark that the card is high power */
78727 +                            pHcd->CardProperties.Flags |= CARD_HIPWR;
78728 +
78729 +                            DBG_PRINT(SDDBG_TRACE,
78730 +                               ("SDIO Busdriver: Power Control Enabled on SDIO (1.10 or greater) card \n"));
78731 +                        } else {
78732 +                            DBG_PRINT(SDDBG_WARN,
78733 +                               ("SDIO Busdriver: Card can operate higher than 200mA, host cannot (max:%d) \n",
78734 +                               pHcd->MaxSlotCurrent));
78735 +                            /* this is not fatal, the card should operate at a reduced rate */
78736 +                        }
78737 +                    } else {
78738 +                        DBG_PRINT(SDDBG_TRACE,
78739 +                            ("SDIO Busdriver: SDIO 1.10 (or greater) card draws less than 200mA \n"));
78740 +                    }
78741 +                } else {
78742 +                    DBG_PRINT(SDDBG_WARN,
78743 +                            ("SDIO Busdriver: failed to get POWER CONTROL REG (%d) \n",status));
78744 +                    /* fall through and continue on at reduced mode */
78745 +                }
78746 +            }
78747 +        }
78748 +            /* get the current bus parameters */
78749 +        busMode.BusModeFlags = pHcd->CardProperties.BusMode;
78750 +        busMode.ClockRate =  pHcd->CardProperties.OperBusClock;
78751 +            /* get the rest of the bus parameters like clock and supported bus width */
78752 +        status = GetBusParameters(pHcd,&busMode);
78753 +        if (!SDIO_SUCCESS(status)) {
78754 +            break;
78755 +        }
78756 +
78757 +        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
78758 +                /* check HCD if it wants to run without SPI CRC */
78759 +            if (pHcd->Attributes & SDHCD_ATTRIB_NO_SPI_CRC) {
78760 +                    /* hcd would rather not run with CRC we don't need to tell the card since SPI mode
78761 +                     * cards power up with CRC initially disabled */
78762 +                busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
78763 +            } else {
78764 +                    /* first enable SPI CRC checking if the HCD can handle it */
78765 +                status = SDSPIModeEnableDisableCRC(pHcd->pPseudoDev, TRUE);
78766 +                if (!SDIO_SUCCESS(status)) {
78767 +                    DBG_PRINT(SDDBG_ERROR,
78768 +                                ("SDIO Bus Driver: Failed to set Enable SPI CRC on card \n"));
78769 +                    break;
78770 +                }
78771 +            }
78772 +        }
78773 +
78774 +        status = SetOperationalBusMode(pHcd->pPseudoDev, &busMode);
78775 +
78776 +        if (!SDIO_SUCCESS(status)) {
78777 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set operational bus mode\n"));
78778 +            break;
78779 +        }
78780 +
78781 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Oper. Mode: Clock:%d, Bus:0x%X \n",
78782 +                                pHcd->CardProperties.OperBusClock,pHcd->CardProperties.BusMode));
78783 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card in TRANS state, Ready: CardInfo Flags 0x%X \n",
78784 +                                pHcd->CardProperties.Flags));
78785 +
78786 +    } while (FALSE);
78787 +
78788 +    if (pReq != NULL) {
78789 +        FreeRequest(pReq);
78790 +    }
78791 +
78792 +    return status;
78793 +}
78794 +
78795 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
78796 +  SDQuerySDMMCInfo - query MMC card info
78797 +  Input:  pDevice - device
78798 +  Output:
78799 +  Return:
78800 +  Notes:
78801 +
78802 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
78803 +SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice)
78804 +{
78805 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
78806 +    PSDREQUEST  pReq = NULL;
78807 +    UINT8       CID[MAX_CSD_CID_BYTES];
78808 +
78809 +    do {
78810 +        pReq = AllocateRequest();
78811 +        if (NULL == pReq) {
78812 +            status = SDIO_STATUS_NO_RESOURCES;
78813 +            break;
78814 +        }
78815 +            /* de-select the card */
78816 +        status = SelectDeselectCard(pDevice->pHcd,FALSE);
78817 +        if (!SDIO_SUCCESS(status)) {
78818 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CID \n"));
78819 +            break;
78820 +        }
78821 +
78822 +        if (SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
78823 +                /* in SPI mode, getting the CSD requires a data transfer */
78824 +            status = _IssueBusRequestBd(pDevice->pHcd,CMD10,0,
78825 +                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
78826 +                                        pReq,
78827 +                                        CID,
78828 +                                        MAX_CSD_CID_BYTES);
78829 +            if (SDIO_SUCCESS(status)) {
78830 +                    /* in SPI mode we need to reorder to the CID since SPI data comes in MSB first*/
78831 +                ReorderBuffer(CID,MAX_CSD_CID_BYTES);
78832 +            }
78833 +        } else {
78834 +                /* get the CID */
78835 +            status = _IssueSimpleBusRequest(pDevice->pHcd,
78836 +                                            CMD10,
78837 +                                            (SDDEVICE_GET_CARD_RCA(pDevice) << 16),
78838 +                                            SDREQ_FLAGS_RESP_R2,
78839 +                                            pReq);
78840 +            if (SDIO_SUCCESS(status)) {
78841 +                    /* extract it from the reponse */
78842 +                memcpy(CID,pReq->Response,MAX_CSD_CID_BYTES);
78843 +            }
78844 +        }
78845 +
78846 +        if (!SDIO_SUCCESS(status)) {
78847 +            DBG_PRINT(SDDBG_WARN, ("SDQuerySDMMCInfo: failed to get CID. \n"));
78848 +            status = SDIO_STATUS_SUCCESS;
78849 +        } else {
78850 +            pDevice->pId[0].SDMMC_ManfacturerID = GET_SD_CID_MANFID(CID);
78851 +            pDevice->pId[0].SDMMC_OEMApplicationID = GET_SD_CID_OEMID(CID);
78852 +#ifdef DEBUG
78853 +            {
78854 +                char pBuf[7];
78855 +
78856 +                pBuf[0] = GET_SD_CID_PN_1(CID);
78857 +                pBuf[1] = GET_SD_CID_PN_2(CID);
78858 +                pBuf[2] = GET_SD_CID_PN_3(CID);
78859 +                pBuf[3] = GET_SD_CID_PN_4(CID);
78860 +                pBuf[4] = GET_SD_CID_PN_5(CID);
78861 +                if (pDevice->pHcd->CardProperties.Flags & CARD_MMC) {
78862 +                    pBuf[5] = GET_SD_CID_PN_6(CID);
78863 +                    pBuf[6] = 0;
78864 +                } else {
78865 +                    pBuf[5] = 0;
78866 +                }
78867 +                DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: Product String: %s\n", pBuf));
78868 +            }
78869 +#endif
78870 +            DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: ManfID: 0x%X, OEMID:0x%X \n",
78871 +                       pDevice->pId[0].SDMMC_ManfacturerID, pDevice->pId[0].SDMMC_OEMApplicationID));
78872 +        }
78873 +            /* re-select card */
78874 +        status = SelectDeselectCard(pDevice->pHcd,TRUE);
78875 +        if (!SDIO_SUCCESS(status)) {
78876 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CID \n"));
78877 +            break;
78878 +        }
78879 +    } while (FALSE);
78880 +
78881 +    if (pReq != NULL) {
78882 +        FreeRequest(pReq);
78883 +    }
78884 +
78885 +    return status;
78886 +}
78887 +
78888 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
78889 +  SDQuerySDIOInfo - query SDIO card info
78890 +  Input:  pDevice - the device
78891 +  Output:
78892 +  Return:
78893 +  Notes:
78894 +
78895 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
78896 +SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice)
78897 +{
78898 +    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
78899 +    UINT32          faddress;
78900 +    UINT8           fInfo;
78901 +    UINT32          nextTpl;
78902 +    UINT8           tplLength;
78903 +    UINT8           cisPtrBuffer[3];
78904 +    struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
78905 +
78906 +        /* use the card-wide SDIO manufacturer code and ID previously read.*/
78907 +    pDevice->pId[0].SDIO_ManufacturerCode = pDevice->pHcd->CardProperties.SDIO_ManufacturerCode;
78908 +    pDevice->pId[0].SDIO_ManufacturerID = pDevice->pHcd->CardProperties.SDIO_ManufacturerID;
78909 +
78910 +        /* calculate function base address */
78911 +    faddress = CalculateFBROffset(SDDEVICE_GET_SDIO_FUNCNO(pDevice));
78912 +    DBG_ASSERT(faddress != 0);
78913 +
78914 +    do {
78915 +        status = Cmd52ReadByteCommon(pDevice,
78916 +                                     FBR_FUNC_INFO_REG_OFFSET(faddress),
78917 +                                     &fInfo);
78918 +        if (!SDIO_SUCCESS(status)) {
78919 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get function info, Err:%d , using Class:UNKNOWN\n", status));
78920 +            fInfo = 0;
78921 +            pDevice->pId[0].SDIO_FunctionClass = 0;
78922 +            status = SDIO_STATUS_SUCCESS;
78923 +        } else {
78924 +            pDevice->pId[0].SDIO_FunctionClass = fInfo & FUNC_INFO_DEVICE_CODE_MASK;
78925 +        }
78926 +
78927 +        if ((FUNC_INFO_DEVICE_CODE_LAST == pDevice->pId[0].SDIO_FunctionClass) &&
78928 +            SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
78929 +                /* if the device code is the last one, check for 1.1 revision and get the
78930 +                 * extended code */
78931 +            status = Cmd52ReadByteCommon(pDevice,
78932 +                                         FBR_FUNC_EXT_DEVICE_CODE_OFFSET(faddress),
78933 +                                         &(pDevice->pId[0].SDIO_FunctionClass));
78934 +            if (!SDIO_SUCCESS(status)) {
78935 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get 1.1 extended DC, Err:%d\n",
78936 +                                        status));
78937 +                break;
78938 +            }
78939 +        }
78940 +
78941 +            /* get the function CIS ptr */
78942 +        status = Cmd52ReadMultipleCommon(pDevice,
78943 +                                         FBR_FUNC_CIS_LOW_OFFSET(faddress),
78944 +                                         cisPtrBuffer,
78945 +                                         3);
78946 +        if (!SDIO_SUCCESS(status)) {
78947 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CIS ptr, Err:%d\n", status));
78948 +            break;
78949 +        }
78950 +            /* endian safe */
78951 +        pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr = ((UINT32)cisPtrBuffer[0]) |
78952 +                                                        (((UINT32)cisPtrBuffer[1]) << 8) |
78953 +                                                        (((UINT32)cisPtrBuffer[2]) << 16);
78954 +
78955 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, Class:%d FnCISPtr:0x%X \n",
78956 +                  SDDEVICE_GET_SDIO_FUNCNO(pDevice),
78957 +                  pDevice->pId[0].SDIO_FunctionClass,pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr));
78958 +
78959 +        if (fInfo & FUNC_INFO_SUPPORTS_CSA_MASK) {
78960 +               /* get the function CSA ptr */
78961 +            status = Cmd52ReadMultipleCommon(pDevice,
78962 +                                             FBR_FUNC_CSA_LOW_OFFSET(faddress),
78963 +                                             cisPtrBuffer,
78964 +                                             3);
78965 +            if (!SDIO_SUCCESS(status)) {
78966 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CSA ptr, Err:%d \n", status));
78967 +                break;
78968 +            }
78969 +                /* endian safe */
78970 +            pDevice->DeviceInfo.AsSDIOInfo.FunctionCSAPtr = ((UINT32)cisPtrBuffer[0]) |
78971 +                                                            (((UINT32)cisPtrBuffer[1]) << 8) |
78972 +                                                            (((UINT32)cisPtrBuffer[2]) << 16);
78973 +
78974 +        }
78975 +
78976 +        nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
78977 +            /* look for the funce TPL */
78978 +        tplLength = sizeof(funcTuple);
78979 +            /* go get the func CE tuple */
78980 +        status = SDLIB_FindTuple(pDevice,
78981 +                                 CISTPL_FUNCE,
78982 +                                 &nextTpl,
78983 +                                 (PUINT8)&funcTuple,
78984 +                                 &tplLength);
78985 +
78986 +        if (!SDIO_SUCCESS(status)){
78987 +            /* handles case of bad CIS or missing tupple, allow function driver to handle */
78988 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get FuncCE Tuple: %d \n", status));
78989 +            status = SDIO_STATUS_SUCCESS;
78990 +            break;
78991 +        }
78992 +            /* set the max block size */
78993 +        pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize =
78994 +                                CT_LE16_TO_CPU_ENDIAN(funcTuple.CommonInfo.MaxBlockSize);
78995 +
78996 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, MaxBlocks:%d \n",
78997 +                  SDDEVICE_GET_SDIO_FUNCNO(pDevice),
78998 +                  pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize));
78999 +
79000 +            /* check for MANFID function tuple (SDIO 1.1 or greater) */
79001 +        if (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
79002 +            struct SDIO_MANFID_TPL      manfid;
79003 +            nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
79004 +            tplLength = sizeof(manfid);
79005 +                /* get the MANFID tuple */
79006 +            status = SDLIB_FindTuple(pDevice,
79007 +                                     CISTPL_MANFID,
79008 +                                     &nextTpl,
79009 +                                     (PUINT8)&manfid,
79010 +                                     &tplLength);
79011 +            if (SDIO_SUCCESS(status)) {
79012 +                    /* this function has a MANFID tuple */
79013 +                pDevice->pId[0].SDIO_ManufacturerCode =
79014 +                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
79015 +                pDevice->pId[0].SDIO_ManufacturerID =
79016 +                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
79017 +                DBG_PRINT(SDDBG_TRACE, ("SDIO 1.1 (Function Specific) MANFID:0x%X, MANFINFO:0x%X \n",
79018 +                                        pDevice->pId[0].SDIO_ManufacturerID,
79019 +                                        pDevice->pId[0].SDIO_ManufacturerCode));
79020 +            } else {
79021 +                DBG_PRINT(SDDBG_WARN, ("SDIO 1.1, No CISTPL_MANFID Tuple in FUNC CIS \n"));
79022 +                status = SDIO_STATUS_SUCCESS;
79023 +            }
79024 +        }
79025 +    } while (FALSE);
79026 +
79027 +    return status;
79028 +}
79029 +
79030 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79031 +  SDEnableFunction - enable function
79032 +  Input:  pDevice - the device/function
79033 +          pEnData - enable data;
79034 +  Output:
79035 +  Return: status
79036 +  Notes: Note, this performs synchronous calls
79037 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79038 +SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData)
79039 +{
79040 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
79041 +    UINT8       registerValue;
79042 +    UINT8       mask;
79043 +    FUNC_ENABLE_TIMEOUT  retry;
79044 +
79045 +        /* take the configure op lock to make this atomic */
79046 +    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
79047 +    if (!SDIO_SUCCESS(status)) {
79048 +        return status;
79049 +    }
79050 +
79051 +    status = SDIO_STATUS_INVALID_PARAMETER;
79052 +    do {
79053 +        if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
79054 +                /* nothing to do if it's not an SDIO card */
79055 +            break;
79056 +        }
79057 +
79058 +        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
79059 +              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
79060 +            DBG_ASSERT(FALSE);
79061 +            break;
79062 +        }
79063 +            /* make sure there is a timeout value */
79064 +        if (0 == pEnData->TimeOut) {
79065 +            break;
79066 +        }
79067 +
79068 +        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
79069 +            /* read the enable register */
79070 +        status = Cmd52ReadByteCommon(pDevice, SDIO_ENABLE_REG, &registerValue);
79071 +        if (!SDIO_SUCCESS(status)){
79072 +            break;
79073 +        }
79074 +        if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
79075 +                /* set the enable register bit */
79076 +            registerValue |= mask;
79077 +        } else {
79078 +               /* clear the bit */
79079 +            registerValue &= ~mask;
79080 +        }
79081 +
79082 +        DBG_PRINT(SDDBG_TRACE,
79083 +                ("SDIO Bus Driver %s Function, Mask:0x%X Enable Reg Value:0x%2.2X\n",
79084 +                 (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) ? "Enabling":"Disabling",
79085 +                 mask,
79086 +                 registerValue));
79087 +
79088 +            /* write it back out */
79089 +        status = Cmd52WriteByteCommon(pDevice, SDIO_ENABLE_REG, &registerValue);
79090 +        if (!SDIO_SUCCESS(status)){
79091 +            break;
79092 +        }
79093 +            /* now poll the ready bit until it sets or clears */
79094 +        retry = pEnData->TimeOut;
79095 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Function Enable/Disable Polling: %d retries \n",
79096 +                                retry));
79097 +        while (retry) {
79098 +            status = Cmd52ReadByteCommon(pDevice, SDIO_READY_REG, &registerValue);
79099 +            if (!SDIO_SUCCESS(status)){
79100 +                break;
79101 +            }
79102 +            if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
79103 +                    /* if the bit is set, the device is ready */
79104 +                if (registerValue & mask) {
79105 +                        /* device ready */
79106 +                    break;
79107 +                }
79108 +            } else {
79109 +                if (!(registerValue & mask)) {
79110 +                        /* device is no longer ready */
79111 +                    break;
79112 +                }
79113 +            }
79114 +                /* sleep before trying again */
79115 +            status = OSSleep(1);
79116 +            if (!SDIO_SUCCESS(status)) {
79117 +                DBG_PRINT(SDDBG_ERROR, ("OSSleep Failed! \n"));
79118 +                break;
79119 +            }
79120 +            retry--;
79121 +        }
79122 +
79123 +        if (0 == retry) {
79124 +            status = SDIO_STATUS_FUNC_ENABLE_TIMEOUT;
79125 +            break;
79126 +        }
79127 +
79128 +    } while (FALSE);
79129 +
79130 +    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
79131 +    return status;
79132 +}
79133 +
79134 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79135 +  SDAllocFreeSlotCurrent - allocate or free slot current
79136 +  Input:  pDevice - the device/function
79137 +          Allocate - Allocate current, else free
79138 +          pData - slotcurrent data (non-NULL if Allocate is TRUE)
79139 +  Output:
79140 +  Return: status
79141 +  Notes:  if the function returns SDIO_STATUS_NO_RESOURCES, the pData->SlotCurrent field is
79142 +          updated with the available current
79143 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79144 +SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData)
79145 +{
79146 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
79147 +
79148 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: SDAllocFreeSlotCurrent\n"));
79149 +
79150 +        /* take the configure op lock to make this atomic */
79151 +    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
79152 +    if (!SDIO_SUCCESS(status)) {
79153 +        return status;
79154 +    }
79155 +
79156 +    status = SDIO_STATUS_INVALID_PARAMETER;
79157 +    do {
79158 +            /* check the current budget and allocate */
79159 +        if (Allocate) {
79160 +            if (0 == pData->SlotCurrent) {
79161 +                /* caller must specify current requirement for the power mode */
79162 +                break;
79163 +            }
79164 +            if (pDevice->SlotCurrentAlloc != 0) {
79165 +               /* slot current has already been allocated, caller needs to free
79166 +                * first */
79167 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Already allocated! \n"));
79168 +                break;
79169 +            }
79170 +            if (((UINT32)pDevice->pHcd->SlotCurrentAllocated + (UINT32)pData->SlotCurrent) >
79171 +                (UINT32)pDevice->pHcd->MaxSlotCurrent) {
79172 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Budget exceeded, Requesting: %d, Allocated already: %d, Max: %d \n",
79173 +                            pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
79174 +                            pDevice->pHcd->MaxSlotCurrent));
79175 +                status = SDIO_STATUS_NO_RESOURCES;
79176 +                    /* return remaining */
79177 +                pData->SlotCurrent = pDevice->pHcd->MaxSlotCurrent -
79178 +                                     pDevice->pHcd->SlotCurrentAllocated;
79179 +                break;
79180 +            }
79181 +                /* bump up allocation */
79182 +            pDevice->pHcd->SlotCurrentAllocated += pData->SlotCurrent;
79183 +                /* save this off for the call to free slot current */
79184 +            pDevice->SlotCurrentAlloc = pData->SlotCurrent;
79185 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Requested: %d, New Total: %d, Max: %d \n",
79186 +                            pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
79187 +                            pDevice->pHcd->MaxSlotCurrent));
79188 +
79189 +        } else {
79190 +            if (0 == pDevice->SlotCurrentAlloc) {
79191 +                    /* no allocation */
79192 +                break;
79193 +            }
79194 +                /* return the allocation back */
79195 +            if (pDevice->SlotCurrentAlloc <= pDevice->pHcd->SlotCurrentAllocated) {
79196 +                pDevice->pHcd->SlotCurrentAllocated -= pDevice->SlotCurrentAlloc;
79197 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Freed: %d, New Total: %d, Max: %d \n",
79198 +                            pDevice->SlotCurrentAlloc, pDevice->pHcd->SlotCurrentAllocated,
79199 +                            pDevice->pHcd->MaxSlotCurrent));
79200 +            } else {
79201 +                DBG_ASSERT(FALSE);
79202 +            }
79203 +
79204 +                /* make sure this is zeroed */
79205 +            pDevice->SlotCurrentAlloc = 0;
79206 +        }
79207 +
79208 +        status = SDIO_STATUS_SUCCESS;
79209 +
79210 +    } while (FALSE);
79211 +
79212 +    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
79213 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: SDAllocFreeSlotCurrent, %d\n", status));
79214 +    return status;
79215 +}
79216 +
79217 +static void RawHcdIrqControl(PSDHCD pHcd, BOOL Enable)
79218 +{
79219 +    SDIO_STATUS status;
79220 +    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
79221 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
79222 +
79223 +    ZERO_OBJECT(irqData);
79224 +
79225 +    status = _AcquireHcdLock(pHcd);
79226 +    if (!SDIO_SUCCESS(status)) {
79227 +        return;
79228 +    }
79229 +
79230 +    do {
79231 +            /* for raw devices, we simply enable/disable in the HCD only */
79232 +        if (Enable) {
79233 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Unmasking Int \n"));
79234 +            irqData.IRQDetectMode = IRQ_DETECT_RAW;
79235 +            irqData.SlotIRQEnable = TRUE;
79236 +        } else {
79237 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Masking Int \n"));
79238 +            irqData.SlotIRQEnable = FALSE;
79239 +        }
79240 +
79241 +        status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
79242 +                              (PVOID)&irqData, sizeof(irqData));
79243 +
79244 +        if (!SDIO_SUCCESS(status)){
79245 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in (RAW) hcd :%d\n",
79246 +                                    status));
79247 +        }
79248 +
79249 +    } while (FALSE);
79250 +
79251 +    status = _ReleaseHcdLock(pHcd);
79252 +}
79253 +
79254 +static void RawHcdEnableIrqPseudoComplete(PSDREQUEST pReq)
79255 +{
79256 +    if (SDIO_SUCCESS(pReq->Status)) {
79257 +        RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
79258 +    }
79259 +    FreeRequest(pReq);
79260 +}
79261 +
79262 +static void RawHcdDisableIrqPseudoComplete(PSDREQUEST pReq)
79263 +{
79264 +    RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
79265 +    FreeRequest(pReq);
79266 +}
79267 +
79268 +static void HcdIrqControl(PSDHCD pHcd, BOOL Enable)
79269 +{
79270 +    SDIO_STATUS                 status;
79271 +    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
79272 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
79273 +
79274 +    ZERO_OBJECT(irqData);
79275 +
79276 +    status = _AcquireHcdLock(pHcd);
79277 +    if (!SDIO_SUCCESS(status)) {
79278 +        return;
79279 +    }
79280 +
79281 +    do {
79282 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: HcdIrqControl (%s), IrqsEnabled:0x%X \n",
79283 +                        Enable ? "Enable":"Disable",pHcd->IrqsEnabled ));
79284 +
79285 +        if (Enable) {
79286 +            irqData.SlotIRQEnable = TRUE;
79287 +        } else {
79288 +            irqData.SlotIRQEnable = FALSE;
79289 +        }
79290 +                /* setup HCD to enable/disable it's detection hardware */
79291 +        if (irqData.SlotIRQEnable) {
79292 +                /* set the IRQ detection mode */
79293 +            switch (SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
79294 +                case SDCONFIG_BUS_WIDTH_SPI:
79295 +                    irqData.IRQDetectMode = IRQ_DETECT_SPI;
79296 +                    break;
79297 +                case SDCONFIG_BUS_WIDTH_1_BIT:
79298 +                    irqData.IRQDetectMode = IRQ_DETECT_1_BIT;
79299 +                    break;
79300 +                case SDCONFIG_BUS_WIDTH_4_BIT:
79301 +                    irqData.IRQDetectMode = IRQ_DETECT_4_BIT;
79302 +                        /* check card and HCD for 4bit multi-block interrupt support */
79303 +                    if ((pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
79304 +                        (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
79305 +                            /* note: during initialization of the card, the mult-blk IRQ support
79306 +                             * is enabled in card caps register */
79307 +                        irqData.IRQDetectMode |= IRQ_DETECT_MULTI_BLK;
79308 +                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in multi-block mode:\n"));
79309 +                    }
79310 +                    break;
79311 +                default:
79312 +                    DBG_ASSERT(FALSE);
79313 +                    break;
79314 +            }
79315 +
79316 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in HCD Mode:0x%X\n",
79317 +                                     irqData.IRQDetectMode));
79318 +        }
79319 +
79320 +        status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
79321 +                                (PVOID)&irqData, sizeof(irqData));
79322 +        if (!SDIO_SUCCESS(status)){
79323 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in hcd %d\n",
79324 +                                    status));
79325 +        }
79326 +
79327 +    } while (FALSE);
79328 +
79329 +    status = _ReleaseHcdLock(pHcd);
79330 +}
79331 +
79332 +static BOOL CheckWriteIntEnableSuccess(PSDREQUEST pReq)
79333 +{
79334 +    if (!SDIO_SUCCESS(pReq->Status)){
79335 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get write INT Enable register Err:%d\n",
79336 +                                     pReq->Status));
79337 +        return FALSE;
79338 +    }
79339 +
79340 +    if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
79341 +       DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: WriteIntEnableComplete CMD52 resp error: 0x%X \n",
79342 +                  SD_R5_GET_RESP_FLAGS(pReq->Response)));
79343 +        return FALSE;
79344 +    }
79345 +
79346 +    return TRUE;
79347 +}
79348 +
79349 +static void HcdIrqEnableComplete(PSDREQUEST pReq)
79350 +{
79351 +    if (CheckWriteIntEnableSuccess(pReq)) {
79352 +            /* configure HCD */
79353 +        HcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
79354 +    }
79355 +    FreeRequest(pReq);
79356 +}
79357 +
79358 +static void HcdIrqDisableComplete(PSDREQUEST pReq)
79359 +{
79360 +    CheckWriteIntEnableSuccess(pReq);
79361 +    HcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
79362 +    FreeRequest(pReq);
79363 +}
79364 +
79365 +static void WriteIntEnableComplete(PSDREQUEST pReq)
79366 +{
79367 +   if (CheckWriteIntEnableSuccess(pReq)) {
79368 +       DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Wrote INT Enable value:0x%X \n",
79369 +                    (INT)pReq->pCompleteContext));
79370 +   }
79371 +   FreeRequest(pReq);
79372 +}
79373 +
79374 +static void HcdAckComplete(PSDREQUEST pReq)
79375 +{
79376 +    SDIO_STATUS status;
79377 +    DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Hcd (0x%X) Irq Ack \n",
79378 +                    (INT)pReq->pCompleteContext));
79379 +        /* re-arm the HCD */
79380 +    status = _IssueConfig((PSDHCD)pReq->pCompleteContext,SDCONFIG_SDIO_REARM_INT,NULL,0);
79381 +
79382 +    if (!SDIO_SUCCESS(status)) {
79383 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: HCD Re-Arm failed : %d\n",
79384 +                    status));
79385 +    }
79386 +    FreeRequest(pReq);
79387 +}
79388 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79389 +  SDFunctionAckInterrupt - handle device interrupt acknowledgement
79390 +  Input:  pDevice - the device
79391 +  Output:
79392 +  Return:
79393 +  Notes:
79394 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79395 +SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice)
79396 +{
79397 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
79398 +    UCHAR       mask;
79399 +    PSDREQUEST  pReq = NULL;
79400 +    BOOL        setHcd = FALSE;
79401 +    SDIO_STATUS status2;
79402 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
79403 +
79404 +    pReq = AllocateRequest();
79405 +    if (NULL == pReq) {
79406 +        return SDIO_STATUS_NO_RESOURCES;
79407 +    }
79408 +
79409 +    status = _AcquireHcdLock(pDevice->pHcd);
79410 +
79411 +    if (!SDIO_SUCCESS(status)) {
79412 +        FreeRequest(pReq);
79413 +        return status;
79414 +    }
79415 +
79416 +    do {
79417 +        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
79418 +              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
79419 +            status = SDIO_STATUS_INVALID_PARAMETER;
79420 +            DBG_ASSERT(FALSE);
79421 +            break;
79422 +        }
79423 +        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
79424 +        if (pDevice->pHcd->PendingIrqAcks & mask) {
79425 +                /* clear the ack bit in question */
79426 +            pDevice->pHcd->PendingIrqAcks &= ~mask;
79427 +            if (0 == pDevice->pHcd->PendingIrqAcks) {
79428 +                pDevice->pHcd->IrqProcState = SDHCD_IDLE;
79429 +                    /* no pending acks, so re-arm if irqs are stilled enabled */
79430 +                if (pDevice->pHcd->IrqsEnabled) {
79431 +                    setHcd = TRUE;
79432 +                        /* issue pseudo request to sync this with bus requests */
79433 +                    pReq->Status = SDIO_STATUS_SUCCESS;
79434 +                    pReq->pCompletion = HcdAckComplete;
79435 +                    pReq->pCompleteContext = pDevice->pHcd;
79436 +                    pReq->Flags = SD_PSEUDO_REQ_FLAGS;
79437 +                }
79438 +            }
79439 +        } else {
79440 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: AckInterrupt: no IRQ pending on Function :%d, \n",
79441 +                        SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
79442 +        }
79443 +    } while (FALSE);
79444 +
79445 +    status2 = ReleaseHcdLock(pDevice);
79446 +
79447 +    if (pReq != NULL) {
79448 +        if (SDIO_SUCCESS(status) && (setHcd)) {
79449 +                /* issue request */
79450 +            IssueRequestToHCD(pDevice->pHcd,pReq);
79451 +        } else {
79452 +            FreeRequest(pReq);
79453 +        }
79454 +    }
79455 +
79456 +    return status;
79457 +}
79458 +
79459 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79460 +  SDMaskUnmaskFunctionIRQ - mask/unmask function IRQ
79461 +  Input:  pDevice - the device/function
79462 +          MaskInt - mask interrupt
79463 +  Output:
79464 +  Return: status
79465 +  Notes:  Note, this function can be called from an ISR or completion context
79466 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79467 +SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL MaskInt)
79468 +{
79469 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
79470 +    UINT8       mask;
79471 +    UINT8       controlVal;
79472 +    BOOL        setHcd;
79473 +    PSDREQUEST  pReq = NULL;
79474 +    SDIO_STATUS status2;
79475 +
79476 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
79477 +
79478 +    setHcd = FALSE;
79479 +
79480 +    pReq = AllocateRequest();
79481 +    if (NULL == pReq) {
79482 +        return SDIO_STATUS_NO_RESOURCES;
79483 +    }
79484 +
79485 +    status = _AcquireHcdLock(pDevice->pHcd);
79486 +
79487 +    if (!SDIO_SUCCESS(status)) {
79488 +        FreeRequest(pReq);
79489 +        return status;
79490 +    }
79491 +
79492 +    do {
79493 +
79494 +        if (pDevice->pHcd->CardProperties.Flags & CARD_RAW) {
79495 +            if (!MaskInt) {
79496 +                if (!pDevice->pHcd->IrqsEnabled) {
79497 +                    pReq->pCompletion = RawHcdEnableIrqPseudoComplete;
79498 +                    setHcd = TRUE;
79499 +                    pDevice->pHcd->IrqsEnabled = 1 << 1;
79500 +                }
79501 +            } else {
79502 +                if (pDevice->pHcd->IrqsEnabled) {
79503 +                    pReq->pCompletion = RawHcdDisableIrqPseudoComplete;
79504 +                    setHcd = TRUE;
79505 +                    pDevice->pHcd->IrqsEnabled = 0;
79506 +                }
79507 +            }
79508 +
79509 +            if (setHcd) {
79510 +                    /* hcd IRQ control requests must be synched with outstanding
79511 +                     * bus requests so we issue a pseudo bus request  */
79512 +                pReq->pCompleteContext = pDevice->pHcd;
79513 +                pReq->Flags = SD_PSEUDO_REQ_FLAGS;
79514 +                pReq->Status = SDIO_STATUS_SUCCESS;
79515 +            } else {
79516 +                    /* no request to submit, just free it */
79517 +                FreeRequest(pReq);
79518 +                pReq = NULL;
79519 +            }
79520 +                /* we're done, submit the bus request if any */
79521 +            break;
79522 +        }
79523 +
79524 +        if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
79525 +                /* nothing to do if it's not an SDIO card */
79526 +            DBG_ASSERT(FALSE);
79527 +            status = SDIO_STATUS_INVALID_PARAMETER;
79528 +            break;
79529 +        }
79530 +
79531 +        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
79532 +              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
79533 +            status = SDIO_STATUS_INVALID_PARAMETER;
79534 +            DBG_ASSERT(FALSE);
79535 +            break;
79536 +        }
79537 +
79538 +        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
79539 +        if (!MaskInt) {
79540 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Unmasking Int, Mask:0x%X\n", mask));
79541 +                /* check interrupts that were enabled on entry */
79542 +            if (0 == pDevice->pHcd->IrqsEnabled) {
79543 +                    /* need to turn on interrupts in HCD */
79544 +                setHcd = TRUE;
79545 +                    /* use this completion routine */
79546 +                pReq->pCompletion = HcdIrqEnableComplete;
79547 +            }
79548 +                /* set the enable bit, in the shadow register */
79549 +            pDevice->pHcd->IrqsEnabled |= mask;
79550 +                /* make sure control value includes the master enable */
79551 +            controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
79552 +        } else {
79553 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Masking Int, Mask:0x%X\n", mask));
79554 +                /* clear the bit */
79555 +            pDevice->pHcd->IrqsEnabled &= ~mask;
79556 +                /* check and see if this clears all the bits */
79557 +            if (0 == pDevice->pHcd->IrqsEnabled){
79558 +                    /* if none of the functions are enabled, clear this register */
79559 +                controlVal = 0;
79560 +                    /* disable in host */
79561 +                setHcd = TRUE;
79562 +                    /* use this completion routine */
79563 +                pReq->pCompletion = HcdIrqDisableComplete;
79564 +            } else {
79565 +                    /* set control value making sure master enable is left on */
79566 +                controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
79567 +            }
79568 +        }
79569 +
79570 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver INT_ENABLE_REG value:0x%X\n", controlVal));
79571 +            /* setup bus request to update the mask register */
79572 +        SDIO_SET_CMD52_WRITE_ARG(pReq->Argument,0,SDIO_INT_ENABLE_REG,controlVal);
79573 +        pReq->Command = CMD52;
79574 +        pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
79575 +
79576 +        if (setHcd) {
79577 +                /* make this a barrier request and set context*/
79578 +            pReq->Flags |= SDREQ_FLAGS_BARRIER;
79579 +            pReq->pCompleteContext = pDevice->pHcd;
79580 +        } else {
79581 +                /* does not require an update to the HCD  */
79582 +            pReq->pCompleteContext = (PVOID)(UINT32)controlVal;
79583 +            pReq->pCompletion = WriteIntEnableComplete;
79584 +        }
79585 +
79586 +    } while (FALSE);
79587 +
79588 +    status2 = _ReleaseHcdLock(pDevice->pHcd);
79589 +
79590 +    if (pReq != NULL) {
79591 +        if (SDIO_SUCCESS(status)) {
79592 +                /* issue request */
79593 +            IssueRequestToHCD(pDevice->pHcd,pReq);
79594 +        } else {
79595 +            FreeRequest(pReq);
79596 +        }
79597 +    }
79598 +
79599 +    return status;
79600 +}
79601 +
79602 +
79603 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79604 +  SDSPIModeEnableDisableCRC - Enable/Disable SPI Mode CRC checking
79605 +  Input:  pDevice - the device/function
79606 +          Enable - Enable CRC
79607 +  Output:
79608 +  Return: status
79609 +  Notes:  Note, this function can be called from an ISR or completion context
79610 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79611 +SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable)
79612 +{
79613 +    SDCONFIG_BUS_MODE_DATA busMode;
79614 +    SDIO_STATUS            status = SDIO_STATUS_SUCCESS;
79615 +    UINT32                 cmdARG = 0;
79616 +
79617 +    if (!SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
79618 +        return SDIO_STATUS_INVALID_PARAMETER;
79619 +    }
79620 +       //??we should make these atomic using a barrier
79621 +
79622 +        /* get the current mode and clock */
79623 +    busMode.BusModeFlags = pDevice->pHcd->CardProperties.BusMode;
79624 +    busMode.ClockRate = pDevice->pHcd->CardProperties.OperBusClock;
79625 +
79626 +    if (Enable) {
79627 +            /* clear the no-CRC flag */
79628 +        busMode.BusModeFlags &= ~SDCONFIG_BUS_MODE_SPI_NO_CRC;
79629 +        cmdARG = SD_CMD59_CRC_ON;
79630 +    } else {
79631 +        busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
79632 +        cmdARG = SD_CMD59_CRC_OFF;
79633 +    }
79634 +
79635 +    do {
79636 +            /* issue CMD59 to turn on/off CRC */
79637 +        status = _IssueSimpleBusRequest(pDevice->pHcd,
79638 +                                        CMD59,
79639 +                                        cmdARG,
79640 +                                        SDREQ_FLAGS_RESP_R1,
79641 +                                        NULL);
79642 +        if (!SDIO_SUCCESS(status)) {
79643 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed issue CMD59 (arg=0x%X) Err:%d \n",
79644 +                                    cmdARG, status));
79645 +            break;
79646 +        }
79647 +        if (Enable) {
79648 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Enabled in SPI mode \n"));
79649 +        } else {
79650 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Disabled in SPI mode \n"));
79651 +        }
79652 +        status = SetOperationalBusMode(pDevice,&busMode);
79653 +        if (!SDIO_SUCCESS(status)) {
79654 +            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set SPI NO CRC mode in hcd : Err:%d \n",
79655 +                                    status));
79656 +            break;
79657 +        }
79658 +    } while (FALSE);
79659 +
79660 +    return status;
79661 +}
79662 +
79663 +
79664 +static UINT32 ConvertSPIStatusToSDCardStatus(UINT8 SpiR1, UINT8 SpiR2)
79665 +{
79666 +    UINT32 cardStatus = 0;
79667 +
79668 +    if (SpiR1 != 0) {
79669 +            /* convert the error */
79670 +        if (SpiR1 & SPI_CS_ERASE_RESET) {
79671 +            cardStatus |= SD_CS_ERASE_RESET;
79672 +        }
79673 +        if (SpiR1 & SPI_CS_ILLEGAL_CMD) {
79674 +            cardStatus |= SD_CS_ILLEGAL_CMD_ERR;
79675 +        }
79676 +        if (SpiR1 & SPI_CS_CMD_CRC_ERR) {
79677 +            cardStatus |= SD_CS_PREV_CMD_CRC_ERR;
79678 +        }
79679 +        if (SpiR1 & SPI_CS_ERASE_SEQ_ERR) {
79680 +            cardStatus |= SD_CS_ERASE_SEQ_ERR;
79681 +        }
79682 +        if (SpiR1 & SPI_CS_ADDRESS_ERR) {
79683 +            cardStatus |= SD_CS_ADDRESS_ERR;
79684 +        }
79685 +        if (SpiR1 & SPI_CS_PARAM_ERR) {
79686 +            cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
79687 +        }
79688 +    }
79689 +
79690 +    if (SpiR2 != 0) {
79691 +            /* convert the error */
79692 +        if (SpiR2 & SPI_CS_CARD_IS_LOCKED) {
79693 +            cardStatus |= SD_CS_CARD_LOCKED;
79694 +        }
79695 +        if (SpiR2 & SPI_CS_LOCK_UNLOCK_FAILED) {
79696 +                /* this bit is shared, just set both */
79697 +            cardStatus |= (SD_CS_LK_UNLK_FAILED | SD_CS_WP_ERASE_SKIP);
79698 +        }
79699 +        if (SpiR2 & SPI_CS_ERROR) {
79700 +            cardStatus |= SD_CS_GENERAL_ERR;
79701 +        }
79702 +        if (SpiR2 & SPI_CS_INTERNAL_ERROR) {
79703 +            cardStatus |= SD_CS_CARD_INTERNAL_ERR;
79704 +        }
79705 +        if (SpiR2 & SPI_CS_ECC_FAILED) {
79706 +            cardStatus |= SD_CS_ECC_FAILED;
79707 +        }
79708 +        if (SpiR2 & SPI_CS_WP_VIOLATION) {
79709 +            cardStatus |= SD_CS_WP_ERR;
79710 +        }
79711 +        if (SpiR2 & SPI_CS_ERASE_PARAM_ERR) {
79712 +            cardStatus |= SD_CS_ERASE_PARAM_ERR;
79713 +        }
79714 +        if (SpiR2 & SPI_CS_OUT_OF_RANGE) {
79715 +            cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
79716 +        }
79717 +    }
79718 +
79719 +    return cardStatus;
79720 +}
79721 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79722 +  ConvertSPI_Response - filter the SPI response and convert it to an SD Response
79723 +  Input:  pReq - request
79724 +  Output: pReq - modified response, if pRespBuffer is not NULL
79725 +          pRespBuffer - converted response (optional)
79726 +  Return:
79727 +  Notes:  This function converts a SPI response into an SD response.  A caller
79728 +          can supply a buffer instead.
79729 +          For SPI bus operation the HCD must send the SPI response as
79730 +          a stream of bytes, the highest byte contains the first received byte from the
79731 +          card.  This function only filters simple responses (R1 primarily).
79732 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79733 +void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer)
79734 +{
79735 +
79736 +    UINT32  cardStatus;
79737 +
79738 +    if (pReq->Flags & SDREQ_FLAGS_RESP_SPI_CONVERTED) {
79739 +            /* already converted */
79740 +        return;
79741 +    }
79742 +    if (NULL == pRespBuffer) {
79743 +        pRespBuffer = pReq->Response;
79744 +    }
79745 +
79746 +    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
79747 +        case SDREQ_FLAGS_RESP_R1:
79748 +        case SDREQ_FLAGS_RESP_R1B:
79749 +            cardStatus = ConvertSPIStatusToSDCardStatus(GET_SPI_R1_RESP_TOKEN(pReq->Response),
79750 +                                                        0);
79751 +            if (CMD55 == pReq->Command) {
79752 +                    /* we emulate this since SPI does not have such a bit */
79753 +                cardStatus |= SD_CS_APP_CMD;
79754 +            }
79755 +                /* stuff the SD card status */
79756 +            SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
79757 +                /* stuff the command */
79758 +            SD_R1_SET_CMD(pRespBuffer,pReq->Command);
79759 +            pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
79760 +            break;
79761 +        case SDREQ_FLAGS_RESP_SDIO_R5:
79762 +            {
79763 +                UINT8 respFlags;
79764 +                UINT8 readData;
79765 +
79766 +                readData = GET_SPI_SDIO_R5_RESPONSE_RDATA(pReq->Response);
79767 +                respFlags = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
79768 +
79769 +                pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] = 0;
79770 +                if (respFlags != 0) {
79771 +                    if (respFlags & SPI_R5_ILLEGAL_CMD) {
79772 +                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ILLEGAL_CMD;
79773 +                    }
79774 +                    if (respFlags & SPI_R5_CMD_CRC) {
79775 +                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_RESP_CMD_ERR;
79776 +                    }
79777 +                    if (respFlags & SPI_R5_FUNC_ERR) {
79778 +                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_INVALID_FUNC;
79779 +                    }
79780 +                    if (respFlags & SPI_R5_PARAM_ERR) {
79781 +                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ARG_RANGE_ERR;
79782 +                    }
79783 +                }
79784 +                    /* stuff read data */
79785 +                pRespBuffer[SD_SDIO_R5_READ_DATA_OFFSET] = readData;
79786 +                    /* stuff the command */
79787 +                SD_R5_SET_CMD(pRespBuffer,pReq->Command);
79788 +            }
79789 +            pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
79790 +            break;
79791 +        case SDREQ_FLAGS_RESP_R2:
79792 +                /* for CMD13 and ACMD13 , SPI uses it's own R2 response format (2 bytes) */
79793 +                /* the issue of CMD13 needs to change the response flag to R2 */
79794 +            if (CMD13 == pReq->Command) {
79795 +                cardStatus = ConvertSPIStatusToSDCardStatus(
79796 +                                    GET_SPI_R2_RESP_TOKEN(pReq->Response),
79797 +                                    GET_SPI_R2_STATUS_TOKEN(pReq->Response));
79798 +                    /* stuff the SD card status */
79799 +                SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
79800 +                    /* stuff the command */
79801 +                SD_R1_SET_CMD(pRespBuffer,pReq->Command);
79802 +                pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
79803 +                break;
79804 +            }
79805 +                /* no other commands should be using R2 when using SPI, if they are
79806 +                 * they should be bypassing the filter  */
79807 +            DBG_ASSERT(FALSE);
79808 +            break;
79809 +        default:
79810 +                /* for all others:
79811 +                 *
79812 +                 * SDREQ_FLAGS_RESP_R6 - SPI mode does not use RCA
79813 +                 * SDREQ_FLAGS_RESP_R3 - bus driver handles this internally
79814 +                 * SDREQ_FLAGS_RESP_SDIO_R4 - bus driver handles this internally
79815 +                 *
79816 +                 */
79817 +            DBG_PRINT(SDDBG_ERROR, ("ConvertSPI_Response - invalid response type:0x%2.2X",
79818 +                                    GET_SDREQ_RESP_TYPE(pReq->Flags)));
79819 +            DBG_ASSERT(FALSE);
79820 +            break;
79821 +    }
79822 +}
79823 +
79824 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79825 +  @function: Check an SD/MMC/SDIO response.
79826 +
79827 +  @function name: SDIO_CheckResponse
79828 +  @prototype: SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
79829 +  @category: HD_Reference
79830 +
79831 +  @input:  pHcd - the host controller definition structure.
79832 +  @input:  pReq - request containing the response
79833 +  @input:  CheckMode - mode
79834 +
79835 +  @return: SDIO_STATUS
79836 +
79837 +  @notes: Host controller drivers must call into this function to validate various command
79838 +          responses before continuing with data transfers or for decoding received SPI tokens.
79839 +          The CheckMode option determines the type of validation to perform.
79840 +          if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) :
79841 +             The host controller must check the card response to determine whether it
79842 +          is safe to perform a data transfer.  This API only checks commands that
79843 +          involve data transfers and checks various status fields in the command response.
79844 +          If the card cannot accept data, this function will return a non-successful status that
79845 +          should be treated as a request failure.  The host driver should complete the request with the
79846 +          returned status. Host controller should only call this function in preparation for a
79847 +          data transfer.
79848 +          if (CheckMode == SDHCD_CHECK_SPI_TOKEN) :
79849 +             This API checks the SPI token and returns a timeout status if the illegal command bit is
79850 +          set.  This simulates the behavior of SD 1/4 bit operation where illegal commands result in
79851 +          a command timeout.  A driver that supports SPI mode should pass every response to this
79852 +          function to determine the appropriate error status to complete the request with.  If the
79853 +          API returns success, the response indicates that the card accepted the command.
79854 +
79855 +  @example: Checking the response before starting the data transfer :
79856 +        if (SDIO_SUCCESS(status) && (pReq->Flags & SDREQ_FLAGS_DATA_TRANS)) {
79857 +                // check the response to see if we should continue with data
79858 +            status = SDIO_CheckResponse(pHcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
79859 +            if (SDIO_SUCCESS(status)) {
79860 +                .... start data transfer phase
79861 +            } else {
79862 +               ... card response indicates that the card cannot handle data
79863 +                  // set completion status
79864 +               pRequest->Status = status;
79865 +            }
79866 +        }
79867 +
79868 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79869 +/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
79870 +  _SDIO_CheckResponse - check response on behalf of the host controller
79871 +  Input:  pHcd - host controller
79872 +          pReq - request containing the response
79873 +          CheckMode - mode
79874 +  Output:
79875 +  Return: status
79876 +  Notes:
79877 +
79878 +    CheckMode == SDHCD_CHECK_DATA_TRANS_OK :
79879 +    The host controller requests a check on the response to determine whether it
79880 +    is okay to perform a data transfer.  This function only filters on commands that
79881 +    involve data.  Host controller should only call this function in preparation for a
79882 +    data transfer.
79883 +
79884 +    CheckMode == SDHCD_CHECK_SPI_TOKEN :
79885 +    The bus driver checks the SPI token and returns a timeout status if the illegal command bit is
79886 +    set.  This simulates the behavior of SD native operation.
79887 +
79888 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
79889 +SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
79890 +{
79891 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
79892 +
79893 +    if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) {
79894 +        UINT32      cardStatus;
79895 +        UINT8       *pResponse;
79896 +        UINT8       convertedResponse[MAX_CARD_RESPONSE_BYTES];
79897 +
79898 +        if (!(pReq->Flags & SDREQ_FLAGS_DATA_TRANS) ||
79899 +             (pReq->Flags & SDREQ_FLAGS_DATA_SKIP_RESP_CHK) ||
79900 +             (GET_SDREQ_RESP_TYPE(pReq->Flags) ==  SDREQ_FLAGS_NO_RESP)) {
79901 +            return SDIO_STATUS_SUCCESS;
79902 +        }
79903 +        pResponse = pReq->Response;
79904 +            /* check SPI mode */
79905 +        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
79906 +            if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT)) {
79907 +                    /* apply conversion */
79908 +                ConvertSPI_Response(pReq, NULL);
79909 +            } else {
79910 +                    /* temporarily convert the response, without altering the original */
79911 +                ConvertSPI_Response(pReq, convertedResponse);
79912 +                    /* point to the converted one */
79913 +                pResponse = convertedResponse;
79914 +            }
79915 +        }
79916 +
79917 +        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
79918 +            case SDREQ_FLAGS_RESP_R1:
79919 +            case SDREQ_FLAGS_RESP_R1B:
79920 +                cardStatus = SD_R1_GET_CARD_STATUS(pResponse);
79921 +                if (!(cardStatus &
79922 +                     (SD_CS_ILLEGAL_CMD_ERR | SD_CS_CARD_INTERNAL_ERR | SD_CS_GENERAL_ERR))) {
79923 +                        /* okay for data */
79924 +                    break;
79925 +                }
79926 +                    /* figure out what it was */
79927 +                if (cardStatus & SD_CS_ILLEGAL_CMD_ERR) {
79928 +                    status = SDIO_STATUS_DATA_STATE_INVALID;
79929 +                } else {
79930 +                    status = SDIO_STATUS_DATA_ERROR_UNKNOWN;
79931 +                }
79932 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R1 CardStatus:0x%X \n",
79933 +                                        cardStatus));
79934 +                break;
79935 +            case SDREQ_FLAGS_RESP_SDIO_R5:
79936 +                cardStatus = SD_R5_GET_RESP_FLAGS(pResponse);
79937 +                if (!(cardStatus & SD_R5_CURRENT_CMD_ERRORS)){
79938 +                        /* all okay */
79939 +                    break;
79940 +                }
79941 +
79942 +                status = ConvertCMD52ResponseToSDIOStatus((UINT8)cardStatus);
79943 +                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R5 CardStatus:0x%X \n",
79944 +                                        cardStatus));
79945 +                break;
79946 +            default:
79947 +                break;
79948 +        }
79949 +
79950 +        return status;
79951 +    }
79952 +
79953 +    {
79954 +        UINT8       spiToken;
79955 +
79956 +            /* handle SPI token validation */
79957 +        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
79958 +            case SDREQ_FLAGS_RESP_R2:
79959 +                spiToken = GET_SPI_R2_RESP_TOKEN(pReq->Response);
79960 +                break;
79961 +            case SDREQ_FLAGS_RESP_SDIO_R5:
79962 +                spiToken = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
79963 +                break;
79964 +            case SDREQ_FLAGS_RESP_R3:
79965 +                spiToken = GET_SPI_R3_RESP_TOKEN(pReq->Response);
79966 +                break;
79967 +            case SDREQ_FLAGS_RESP_SDIO_R4:
79968 +                spiToken = GET_SPI_SDIO_R4_RESP_TOKEN(pReq->Response);
79969 +                break;
79970 +            default:
79971 +                    /* all other tokesn are SPI R1 type */
79972 +                spiToken = GET_SPI_R1_RESP_TOKEN(pReq->Response);
79973 +                break;
79974 +        }
79975 +
79976 +        if ((GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R5) ||
79977 +            (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R4)) {
79978 +                /* handle SDIO status tokens */
79979 +            if ((spiToken & SPI_R5_ILLEGAL_CMD) ||
79980 +                (spiToken & SPI_R5_CMD_CRC)) {
79981 +                status = SDIO_STATUS_BUS_RESP_TIMEOUT;
79982 +            }
79983 +        } else {
79984 +                /* handle all other status tokens */
79985 +            if ((spiToken & SPI_CS_ILLEGAL_CMD) ||
79986 +                (spiToken & SPI_CS_CMD_CRC_ERR)) {
79987 +                status = SDIO_STATUS_BUS_RESP_TIMEOUT;
79988 +            }
79989 +       }
79990 +    }
79991 +
79992 +    return status;
79993 +}
79994 +
79995 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_os.c
79996 ===================================================================
79997 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
79998 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_bus_os.c   2008-12-11 22:46:49.000000000 +0100
79999 @@ -0,0 +1,832 @@
80000 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80001 +@file: sdio_bus_os.c
80002 +
80003 +@abstract: Linux implementation module
80004 +
80005 +#notes: includes module load and unload functions
80006 +
80007 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
80008 +
80009 +
80010 + *
80011 + *  This program is free software; you can redistribute it and/or modify
80012 + *  it under the terms of the GNU General Public License version 2 as
80013 + *  published by the Free Software Foundation;
80014 + *
80015 + *  Software distributed under the License is distributed on an "AS
80016 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
80017 + *  implied. See the License for the specific language governing
80018 + *  rights and limitations under the License.
80019 + *
80020 + *  Portions of this code were developed with information supplied from the
80021 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
80022 + *
80023 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
80024 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
80025 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
80026 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
80027 + *   Specification may require a license from the SD Card Association or other third parties.
80028 + *   Disclaimers:
80029 + *   The information contained in the Simplified Specification is presented only as a standard
80030 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
80031 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
80032 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
80033 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
80034 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
80035 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
80036 + *   information, know-how or other confidential information to any third party.
80037 + *
80038 + *
80039 + *  The initial developers of the original code are Seung Yi and Paul Lever
80040 + *
80041 + *  sdio@atheros.com
80042 + *
80043 + *
80044 +
80045 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
80046 +/* debug level for this module*/
80047 +#define DBG_DECLARE 3;
80048 +
80049 +#include <linux/sdio/ctsystem.h>
80050 +#include <linux/kernel.h>
80051 +#include <linux/module.h>
80052 +#include <linux/version.h>
80053 +#include <linux/init.h>
80054 +#include <linux/workqueue.h>
80055 +#include <linux/delay.h>
80056 +#include <linux/kthread.h>
80057 +#include <linux/pnp.h>
80058 +void pnp_remove_card_device(struct pnp_dev *dev);
80059 +#include <linux/sdio/sdio_busdriver.h>
80060 +#include <linux/sdio/sdio_lib.h>
80061 +#include "_busdriver.h"
80062 +
80063 +#define DESCRIPTION "SDIO Bus Driver"
80064 +#define AUTHOR "Atheros Communications, Inc."
80065 +
80066 +/* debug print parameter */
80067 +/* configuration and default parameters */
80068 +static int RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
80069 +module_param(RequestRetries, int, 0644);
80070 +MODULE_PARM_DESC(RequestRetries, "number of command retries");
80071 +static int CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
80072 +module_param(CardReadyPollingRetry, int, 0644);
80073 +MODULE_PARM_DESC(CardReadyPollingRetry, "number of card ready retries");
80074 +static int PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
80075 +module_param(PowerSettleDelay, int, 0644);
80076 +MODULE_PARM_DESC(PowerSettleDelay, "delay in ms for power to settle after power changes");
80077 +static int DefaultOperClock = 52000000;
80078 +module_param(DefaultOperClock, int, 0644);
80079 +MODULE_PARM_DESC(DefaultOperClock, "maximum operational clock limit");
80080 +static int DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
80081 +module_param(DefaultBusMode, int, 0644);
80082 +MODULE_PARM_DESC(DefaultBusMode, "default bus mode: see SDCONFIG_BUS_WIDTH_xxx");
80083 +static int RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
80084 +module_param(RequestListSize, int, 0644);
80085 +MODULE_PARM_DESC(RequestListSize, "");
80086 +static int SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
80087 +module_param(SignalSemListSize, int, 0644);
80088 +MODULE_PARM_DESC(SignalSemListSize, "");
80089 +static int CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
80090 +module_param(CDPollingInterval, int, 0644);
80091 +MODULE_PARM_DESC(CDPollingInterval, "");
80092 +static int DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
80093 +module_param(DefaultOperBlockLen, int, 0644);
80094 +MODULE_PARM_DESC(DefaultOperBlockLen, "operational block length");
80095 +static int DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
80096 +module_param(DefaultOperBlockCount, int, 0644);
80097 +MODULE_PARM_DESC(DefaultOperBlockCount, "operational block count");
80098 +static int ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
80099 +module_param(ConfigFlags, int, 0644);
80100 +MODULE_PARM_DESC(ConfigFlags, "config flags");
80101 +
80102 +static int HcdRCount = MAX_HCD_REQ_RECURSION;
80103 +module_param(HcdRCount, int, 0644);
80104 +MODULE_PARM_DESC(HcdRCount, "HCD request recursion count");
80105 +
80106 +static void CardDetect_WorkItem(
80107 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
80108 +void *context);
80109 +#else
80110 +struct work_struct *ignored);
80111 +#endif
80112 +static void CardDetect_TimerFunc(unsigned long Context);
80113 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
80114 +static DECLARE_WORK(CardDetectPollWork, CardDetect_WorkItem
80115 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
80116 +, 0);
80117 +#else
80118 +);
80119 +#endif
80120 +#endif
80121 +static int RegisterDriver(PSDFUNCTION pFunction);
80122 +static int UnregisterDriver(PSDFUNCTION pFunction);
80123 +
80124 +static struct timer_list CardDetectTimer;
80125 +
80126 +#define SDDEVICE_FROM_OSDEVICE(pOSDevice)  container_of(pOSDevice, SDDEVICE, Device)
80127 +#define SDFUNCTION_FROM_OSDRIVER(pOSDriver)  container_of(pOSDriver, SDFUNCTION, Driver)
80128 +
80129 +
80130 +/*
80131 + * SDIO_RegisterHostController - register a host controller bus driver
80132 +*/
80133 +SDIO_STATUS SDIO_RegisterHostController(PSDHCD pHcd) {
80134 +    /* we are the exported verison, call the internal verison */
80135 +    return _SDIO_RegisterHostController(pHcd);
80136 +}
80137 +
80138 +/*
80139 + * SDIO_UnregisterHostController - unregister a host controller bus driver
80140 +*/
80141 +SDIO_STATUS SDIO_UnregisterHostController(PSDHCD pHcd) {
80142 +    /* we are the exported verison, call the internal verison */
80143 +    return _SDIO_UnregisterHostController(pHcd);
80144 +}
80145 +
80146 +/*
80147 + * SDIO_RegisterFunction - register a function driver
80148 +*/
80149 +SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction) {
80150 +    int error;
80151 +    SDIO_STATUS status;
80152 +
80153 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - SDIO_RegisterFunction\n"));
80154 +
80155 +        /* since we do PnP registration first, we need to check the version */
80156 +    if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
80157 +        DBG_PRINT(SDDBG_ERROR,
80158 +           ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
80159 +           GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
80160 +        return SDIO_STATUS_INVALID_PARAMETER;
80161 +    }
80162 +
80163 +    /* we are the exported verison, call the internal verison after registering with the bus
80164 +       we handle probes internally to the bus driver */
80165 +    if ((error = RegisterDriver(pFunction)) < 0) {
80166 +        DBG_PRINT(SDDBG_ERROR,
80167 +            ("SDIO BusDriver - SDIO_RegisterFunction, failed to register with system bus driver: %d\n",
80168 +            error));
80169 +        status = OSErrorToSDIOError(error);
80170 +    } else {
80171 +        status = _SDIO_RegisterFunction(pFunction);
80172 +        if (!SDIO_SUCCESS(status)) {
80173 +            UnregisterDriver(pFunction);
80174 +        }
80175 +    }
80176 +
80177 +    return status;
80178 +}
80179 +
80180 +/*
80181 + * SDIO_UnregisterFunction - unregister a function driver
80182 +*/
80183 +SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction) {
80184 +    SDIO_STATUS status;
80185 +    /* we are the exported verison, call the internal verison */
80186 +    status = _SDIO_UnregisterFunction(pFunction);
80187 +    UnregisterDriver(pFunction);
80188 +    return  status;
80189 +}
80190 +
80191 +/*
80192 + * SDIO_HandleHcdEvent - tell core an event occurred
80193 +*/
80194 +SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event) {
80195 +    /* we are the exported verison, call the internal verison */
80196 +    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
80197 +                         Event, (UINT)pHcd));
80198 +    return _SDIO_HandleHcdEvent(pHcd, Event);
80199 +}
80200 +
80201 +/* get default settings */
80202 +SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc)
80203 +{
80204 +    /* these defaults are module params */
80205 +    pBdc->RequestRetries = RequestRetries;
80206 +    pBdc->CardReadyPollingRetry = CardReadyPollingRetry;
80207 +    pBdc->PowerSettleDelay = PowerSettleDelay;
80208 +    pBdc->DefaultOperClock = DefaultOperClock;
80209 +    pBdc->DefaultBusMode = DefaultBusMode;
80210 +    pBdc->RequestListSize = RequestListSize;
80211 +    pBdc->SignalSemListSize = SignalSemListSize;
80212 +    pBdc->CDPollingInterval = CDPollingInterval;
80213 +    pBdc->DefaultOperBlockLen = DefaultOperBlockLen;
80214 +    pBdc->DefaultOperBlockCount = DefaultOperBlockCount;
80215 +    pBdc->ConfigFlags = ConfigFlags;
80216 +    pBdc->MaxHcdRecursion = HcdRCount;
80217 +    return SDIO_STATUS_SUCCESS;
80218 +}
80219 +
80220 +static void CardDetect_TimerFunc(unsigned long Context)
80221 +{
80222 +    DBG_PRINT(SDIODBG_CD_TIMER, ("+ SDIO BusDriver Card Detect Timer\n"));
80223 +
80224 +        /* timers run in an ISR context and cannot block or sleep, so we need
80225 +         * to queue a work item to call the bus driver timer notification */
80226 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
80227 +    if (schedule_work(&CardDetectPollWork) <= 0) {
80228 +        DBG_PRINT(SDDBG_ERROR, ("Failed to queue Card Detect timer!\n"));
80229 +    }
80230 +#else
80231 +    CardDetect_WorkItem(NULL);
80232 +#endif
80233 +    DBG_PRINT(SDIODBG_CD_TIMER, ("- SDIO BusDriver  Card Detect Timer\n"));
80234 +}
80235 +
80236 +/*
80237 + * Initialize any timers we are using
80238 +*/
80239 +SDIO_STATUS InitializeTimers(void)
80240 +{
80241 +    init_timer(&CardDetectTimer);
80242 +    CardDetectTimer.function = CardDetect_TimerFunc;
80243 +    CardDetectTimer.data = 0;
80244 +    return SDIO_STATUS_SUCCESS;
80245 +}
80246 +
80247 +/*
80248 + * cleanup timers
80249 +*/
80250 +SDIO_STATUS CleanupTimers(void)
80251 +{
80252 +    del_timer(&CardDetectTimer);
80253 +    return SDIO_STATUS_SUCCESS;
80254 +}
80255 +
80256 +
80257 +/*
80258 + * Queue a timer, Timeout is in milliseconds
80259 +*/
80260 +SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut)
80261 +{
80262 +    UINT32 delta;
80263 +
80264 +        /* convert timeout to ticks */
80265 +    delta = (TimeOut * HZ)/1000;
80266 +    if (delta == 0) {
80267 +        delta = 1;
80268 +    }
80269 +    DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer System Ticks Per Sec:%d \n",HZ));
80270 +    DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer TimerID: %d TimeOut:%d MS, requires %d Ticks\n",
80271 +                TimerID,TimeOut,delta));
80272 +    switch (TimerID) {
80273 +        case SDIOBUS_CD_TIMER_ID:
80274 +            CardDetectTimer.expires = jiffies + delta;
80275 +            add_timer(&CardDetectTimer);
80276 +            break;
80277 +        default:
80278 +            return SDIO_STATUS_INVALID_PARAMETER;
80279 +    }
80280 +
80281 +    return SDIO_STATUS_SUCCESS;
80282 +}
80283 +
80284 +/* check a response on behalf of the host controller, to allow it to proceed with a
80285 + * data transfer */
80286 +SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
80287 +{
80288 +    return _SDIO_CheckResponse(pHcd,pReq,CheckMode);
80289 +}
80290 +
80291 +/*
80292 + * CardDetect_WorkItem - the work item for handling card detect polling interrupt
80293 +*/
80294 +static void CardDetect_WorkItem(
80295 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
80296 +void *context)
80297 +#else
80298 +struct work_struct *ignored)
80299 +#endif
80300 +{
80301 +        /* call bus driver function */
80302 +    SDIO_NotifyTimerTriggered(SDIOBUS_CD_TIMER_ID);
80303 +}
80304 +
80305 +/*
80306 + * OS_IncHcdReference - increment host controller driver reference count
80307 +*/
80308 +SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd)
80309 +{
80310 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
80311 +
80312 +    do {
80313 +        if (NULL == pHcd->pModule) {
80314 +                /* hcds that are 2.3 or higher should set this */
80315 +            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s should set module ptr!\n",
80316 +                (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
80317 +            break;
80318 +        }
80319 +
80320 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
80321 +        if (!try_module_get(pHcd->pModule)) {
80322 +            status = SDIO_STATUS_ERROR;
80323 +        }
80324 +#else
80325 +        if (!try_inc_mod_count(pHcd->pModule)) {
80326 +            status = SDIO_STATUS_ERROR;
80327 +        }
80328 +#endif
80329 +
80330 +    } while (FALSE);
80331 +
80332 +    if (!SDIO_SUCCESS(status)) {
80333 +        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s failed to get module\n",
80334 +            (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
80335 +    }
80336 +
80337 +    return status;
80338 +}
80339 +
80340 +/*
80341 + * OS_DecHcdReference - decrement host controller driver reference count
80342 +*/
80343 +SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd)
80344 +{
80345 +    if (pHcd->pModule != NULL) {
80346 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
80347 +        module_put(pHcd->pModule);
80348 +#else
80349 +            /* 2.4 or lower */
80350 +        __MOD_DEC_USE_COUNT(pHcd->pModule);
80351 +#endif
80352 +    }
80353 +    return SDIO_STATUS_SUCCESS;
80354 +}
80355 +
80356 +/****************************************************************************************/
80357 +
80358 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
80359 +#include <linux/pnp.h>
80360 +
80361 +#if !defined(CONFIG_PNP)
80362 +#error "CONFIG_PNP not defined"
80363 +#endif
80364 +
80365 +static ULONG InUseDevices = 0;
80366 +static spinlock_t InUseDevicesLock = SPIN_LOCK_UNLOCKED;
80367 +
80368 +static const struct pnp_device_id pnp_idtable[] = {
80369 +    {"SD_XXXX",  0}
80370 +};
80371 +static int sdio_get_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
80372 +{
80373 +    DBG_PRINT(SDDBG_TRACE,
80374 +        ("SDIO BusDriver - sdio_get_resources: %s\n",
80375 +        pDev->dev.bus_id));
80376 +    return 0;
80377 +}
80378 +static int sdio_set_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
80379 +{
80380 +    DBG_PRINT(SDDBG_TRACE,
80381 +        ("SDIO BusDriver - sdio_set_resources: %s\n",
80382 +        pDev->dev.bus_id));
80383 +    return 0;
80384 +}
80385 +
80386 +static int sdio_disable_resources(struct pnp_dev *pDev)
80387 +{
80388 +    DBG_PRINT(SDDBG_TRACE,
80389 +        ("SDIO BusDriver - sdio_disable_resources: %s\n",
80390 +        pDev->dev.bus_id));
80391 +    if (pDev != NULL) {
80392 +        pDev->active = 0;
80393 +    }
80394 +    return 0;
80395 +}
80396 +void    release(struct device * pDev) {
80397 +    DBG_PRINT(SDDBG_TRACE,
80398 +        ("SDIO BusDriver - release: %s\n",
80399 +        pDev->bus_id));
80400 +    return;
80401 +}
80402 +struct pnp_protocol sdio_protocol = {
80403 +    .name   = "SDIO",
80404 +    .get    = sdio_get_resources,
80405 +    .set    = sdio_set_resources,
80406 +    .disable = sdio_disable_resources,
80407 +    .dev.release = release,
80408 +};
80409 +
80410 +/*
80411 + * driver_probe - probe for OS based driver
80412 +*/
80413 +static int driver_probe(struct pnp_dev* pOSDevice, const struct pnp_device_id *pId)
80414 +{
80415 +    PSDDEVICE pDevice = SDDEVICE_FROM_OSDEVICE(pOSDevice);
80416 +    PSDFUNCTION pFunction = pDevice->Device.dev.driver_data;
80417 +
80418 +    if (pFunction == NULL) {
80419 +        return -1;
80420 +    }
80421 +
80422 +    if (strcmp(pFunction->pName, pOSDevice->dev.driver->name) == 0) {
80423 +        DBG_PRINT(SDDBG_TRACE,
80424 +            ("SDIO BusDriver - driver_probe, match: %s/%s driver: %s\n",
80425 +            pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
80426 +        return 1;
80427 +    } else {
80428 +        DBG_PRINT(SDDBG_TRACE,
80429 +            ("SDIO BusDriver - driver_probe, no match: %s/%s driver: %s\n",
80430 +            pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
80431 +        return -1;
80432 +    }
80433 +/*    if (pOSDevice->id != NULL) {
80434 +        if (strcmp(pOSDevice->id->id, pId->id) == 0) {
80435 +            DBG_PRINT(SDDBG_TRACE,
80436 +                ("SDIO BusDriver - driver_probe, match: %s/%s\n",
80437 +                pOSDevice->dev.bus_id, pId->id));
80438 +            return 1;
80439 +        }
80440 +        DBG_PRINT(SDDBG_TRACE,
80441 +            ("SDIO BusDriver - driver_probe, did not match: %s/%s/%s\n",
80442 +            pOSDevice->dev.bus_id, pId->id, pOSDevice->id->id));
80443 +    } else {
80444 +        DBG_PRINT(SDDBG_TRACE,
80445 +            ("SDIO BusDriver - driver_probe, did not match: %s/%s\n",
80446 +            pOSDevice->dev.bus_id, pId->id));
80447 +    }
80448 +    return -1;
80449 +*/
80450 +//??    if (pDevice->Device.dev.driver_data != NULL) {
80451 +//??        if (pDevice->Device.dev.driver_data == pFunction) {
80452 +//??    if (pDevice->Device.data != NULL) {
80453 +//??        if (pDevice->Device.data == pFunction) {
80454 +//??            DBG_PRINT(SDDBG_TRACE,
80455 +//??                ("SDIO BusDriver - driver_probe, match: %s\n",
80456 +//??                pOSDevice->dev.bus_id));
80457 +//??            return 1;
80458 +//??        }
80459 +//??    }
80460 +   DBG_PRINT(SDDBG_TRACE,
80461 +        ("SDIO BusDriver - driver_probe,  match: %s\n",
80462 +        pOSDevice->dev.bus_id));
80463 +    return 1;
80464 +}
80465 +
80466 +static int RegisterDriver(PSDFUNCTION pFunction)
80467 +{
80468 +    memset(&pFunction->Driver, 0, sizeof(pFunction->Driver));
80469 +    pFunction->Driver.name = pFunction->pName;
80470 +    pFunction->Driver.probe = driver_probe;
80471 +    pFunction->Driver.id_table = pnp_idtable;
80472 +    pFunction->Driver.flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
80473 +
80474 +    DBG_PRINT(SDDBG_TRACE,
80475 +            ("SDIO BusDriver - SDIO_RegisterFunction, registering driver: %s\n",
80476 +            pFunction->Driver.name));
80477 +    return pnp_register_driver(&pFunction->Driver);
80478 +}
80479 +
80480 +static int UnregisterDriver(PSDFUNCTION pFunction)
80481 +{
80482 +    DBG_PRINT(SDDBG_TRACE,
80483 +            ("+SDIO BusDriver - UnregisterDriver, driver: %s\n",
80484 +            pFunction->Driver.name));
80485 +    pnp_unregister_driver(&pFunction->Driver);
80486 +    DBG_PRINT(SDDBG_TRACE,
80487 +            ("-SDIO BusDriver - UnregisterDriver\n"));
80488 +   return 0;
80489 +}
80490 +
80491 +/*
80492 + * OS_InitializeDevice - initialize device that will be registered
80493 +*/
80494 +SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
80495 +{
80496 +    struct pnp_id *pFdname;
80497 +    memset(&pDevice->Device, 0, sizeof(pDevice->Device));
80498 +    pDevice->Device.dev.driver_data = (PVOID)pFunction;
80499 +//??    pDevice->Device.data = (PVOID)pFunction;
80500 +//??    pDevice->Device.dev.driver = &pFunction->Driver.driver;
80501 +//??    pDevice->Device.driver = &pFunction->Driver;
80502 +//??    pDevice->Device.dev.release = release;
80503 +    /* get a unique device number, must be done with locks held */
80504 +    spin_lock(&InUseDevicesLock);
80505 +    pDevice->Device.number = FirstClearBit(&InUseDevices);
80506 +    SetBit(&InUseDevices, pDevice->Device.number);
80507 +    spin_unlock(&InUseDevicesLock);
80508 +    pDevice->Device.capabilities = PNP_REMOVABLE | PNP_DISABLE;
80509 +    pDevice->Device.protocol = &sdio_protocol;
80510 +    pDevice->Device.active = 1;
80511 +
80512 +    pnp_init_resource_table(&pDevice->Device.res);
80513 +
80514 +    pFdname = KernelAlloc(sizeof(struct pnp_id));
80515 +
80516 +    if (NULL == pFdname) {
80517 +        return SDIO_STATUS_NO_RESOURCES;
80518 +    }
80519 +    /* set the id as slot number/function number */
80520 +    snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X%02X",
80521 +             pDevice->pHcd->SlotNumber, (UINT)SDDEVICE_GET_SDIO_FUNCNO(pDevice));
80522 +    pFdname->next = NULL;
80523 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_InitializeDevice adding id: %s\n",
80524 +                             pFdname->id));
80525 +    pnp_add_id(pFdname, &pDevice->Device);
80526 +
80527 +        /* deal with DMA settings */
80528 +    if (pDevice->pHcd->pDmaDescription != NULL) {
80529 +        pDevice->Device.dev.dma_mask = &pDevice->pHcd->pDmaDescription->Mask;
80530 +        pDevice->Device.dev.coherent_dma_mask = pDevice->pHcd->pDmaDescription->Mask;
80531 +    }
80532 +
80533 +    return SDIO_STATUS_SUCCESS;
80534 +}
80535 +
80536 +/*
80537 + * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
80538 +*/
80539 +SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
80540 +{
80541 +    int error;
80542 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
80543 +                               pFunction->pName));
80544 +    error = pnp_add_device(&pDevice->Device);
80545 +    if (error < 0) {
80546 +        DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - OS_AddDevice failed pnp_add_device: %d\n",
80547 +                               error));
80548 +    }
80549 +        /* replace the buggy pnp's release */
80550 +    pDevice->Device.dev.release = release;
80551 +
80552 +    return OSErrorToSDIOError(error);
80553 +}
80554 +
80555 +/*
80556 + * OS_RemoveDevice - unregister device with driver and bus
80557 +*/
80558 +void OS_RemoveDevice(PSDDEVICE pDevice)
80559 +{
80560 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
80561 +    pnp_remove_card_device(&pDevice->Device);
80562 +    spin_lock(&InUseDevicesLock);
80563 +    ClearBit(&InUseDevices, pDevice->Device.number);
80564 +    spin_unlock(&InUseDevicesLock);
80565 +
80566 +    if (pDevice->Device.id != NULL) {
80567 +        KernelFree(pDevice->Device.id);
80568 +        pDevice->Device.id = NULL;
80569 +    }
80570 +}
80571 +
80572 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80573 +  @function: Add OS device to bus driver.
80574 +
80575 +  @function name: SDIO_BusAddOSDevice
80576 +  @category: HD_Reference
80577 +
80578 +  @output: pDma    - descrip[tion of support DMA or NULL
80579 +  @output: pDriver - assigned driver object
80580 +  @output: pDevice - assigned device object
80581 +
80582 +  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
80583 +
80584 +  @notes: If the HCD does not register with the driver sub-system directly (like in the PCI case),
80585 +          then it should register with the bus driver to obtain OS dependent device objects.
80586 +          All input structures should be maintained throughout the life of the driver.
80587 +
80588 +  @example: getting device objects:
80589 +    typedef struct _SDHCD_DRIVER {
80590 +        OS_PNPDEVICE   HcdDevice;     / * the OS device for this HCD * /
80591 +        OS_PNPDRIVER   HcdDriver;     / * the OS driver for this HCD * /
80592 +        SDDMA_DESCRIPTION Dma;        / * driver DMA description * /
80593 +    }SDHCD_DRIVER, *PSDHCD_DRIVER;
80594 +
80595 +    typedef struct _SDHCD_DRIVER_CONTEXT {
80596 +        PTEXT        pDescription;       / * human readable device decsription * /
80597 +        SDLIST       DeviceList;         / * the list of current devices handled by this driver * /
80598 +        OS_SEMAPHORE DeviceListSem;      / * protection for the DeviceList * /
80599 +        UINT         DeviceCount;        / * number of devices currently installed * /
80600 +        SDHCD_DRIVER Driver;             / * OS dependent driver specific info * /
80601 +    }SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
80602 +
80603 +    static SDHCD_DRIVER_CONTEXT HcdContext = {
80604 +        .pDescription  = DESCRIPTION,
80605 +        .DeviceCount   = 0,
80606 +        .Driver.HcdDevice.name = "sdio_xxx_hcd",
80607 +        .Driver.HcdDriver.name = "sdio_xxx_hcd",
80608 +    }
80609 +    .....
80610 +    status = SDIO_BusAddOSDevice(NULL, &HcdContext.Driver, &HcdContext.Device);
80611 +    if (SDIO_SUCCESS(status) {
80612 +        return Probe(&HcdContext.Device);
80613 +    }
80614 +    return SDIOErrorToOSError(status);
80615 +
80616 +  @see also: SDIO_BusRemoveOSDevice
80617 +
80618 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
80619 +SDIO_STATUS SDIO_BusAddOSDevice(PSDDMA_DESCRIPTION pDma, POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
80620 +{
80621 +    int err;
80622 +    struct pnp_id *pFdname;
80623 +    struct pnp_device_id *pFdid;
80624 +    static int slotNumber = 0; /* we just use an increasing count for the slots number */
80625 +
80626 +    if (pDma != NULL) {
80627 +        pDevice->dev.dma_mask = &pDma->Mask;
80628 +        pDevice->dev.coherent_dma_mask = pDma->Mask;
80629 +    }
80630 +    DBG_PRINT(SDDBG_ERROR,
80631 +            ("SDIO BusDriver - SDIO_GetBusOSDevice, registering driver: %s DMAmask: 0x%x\n",
80632 +            pDriver->name, (UINT)*pDevice->dev.dma_mask));
80633 +    pFdid = KernelAlloc(sizeof(struct pnp_device_id)*2);
80634 +    /* set the id as slot number/function number */
80635 +    snprintf(pFdid[0].id, sizeof(pFdid[0].id), "SD_%02X08",
80636 +             slotNumber++);
80637 +    pFdid[0].driver_data = 0;
80638 +    pFdid[1].id[0] = '\0';
80639 +    pFdid[1].driver_data = 0;
80640 +
80641 +    pDriver->id_table = pFdid;
80642 +    pDriver->flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
80643 +    err = pnp_register_driver(pDriver);
80644 +    if (err < 0) {
80645 +        DBG_PRINT(SDDBG_ERROR,
80646 +            ("SDIO BusDriver - SDIO_GetBusOSDevice, failed registering driver: %s, err: %d\n",
80647 +            pDriver->name, err));
80648 +        return OSErrorToSDIOError(err);
80649 +    }
80650 +
80651 +    pDevice->protocol = &sdio_protocol;
80652 +    pDevice->capabilities = PNP_REMOVABLE | PNP_DISABLE;
80653 +    pDevice->active = 1;
80654 +
80655 +    pFdname = KernelAlloc(sizeof(struct pnp_id));
80656 +    /* set the id as slot number/function number */
80657 +    snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X08",
80658 +             0); //??pDevice->pHcd->SlotNumber);//?????fix this, slotnumber isn't vaialble yet
80659 +    pFdname->next = NULL;
80660 +    pnp_add_id(pFdname, pDevice);
80661 +
80662 +    /* get a unique device number */
80663 +    spin_lock(&InUseDevicesLock);
80664 +    pDevice->number = FirstClearBit(&InUseDevices);
80665 +    SetBit(&InUseDevices, pDevice->number);
80666 +    spin_unlock(&InUseDevicesLock);
80667 +    pnp_init_resource_table(&pDevice->res);
80668 +    err = pnp_add_device(pDevice);
80669 +    if (err < 0) {
80670 +        DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - SDIO_GetBusOSDevice failed pnp_device_add: %d\n",
80671 +                               err));
80672 +        pnp_unregister_driver(pDriver);
80673 +    }
80674 +    /* replace the buggy pnp's release */
80675 +    pDevice->dev.release = release;
80676 +    return OSErrorToSDIOError(err);
80677 +}
80678 +
80679 +/**+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80680 +  @function: Return OS device from bus driver.
80681 +
80682 +  @function name: SDIO_BusRemoveOSDevice
80683 +  @category: HD_Reference
80684 +
80685 +  @input: pDriver - setup PNP driver object
80686 +  @input: pDevice - setup PNP device object
80687 +
80688 +  @return: none
80689 +
80690 +
80691 +  @example: returning device objects:
80692 +        SDIO_BusRemoveOSDevice(&HcdContext.Driver, &HcdContext.Device);
80693 +
80694 +
80695 +  @see also: SDIO_BusAddOSDevice
80696 +
80697 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
80698 +void SDIO_BusRemoveOSDevice(POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
80699 +{
80700 +    DBG_PRINT(SDDBG_ERROR,
80701 +            ("SDIO BusDriver - SDIO_PutBusOSDevice, unregistering driver: %s\n",
80702 +            pDriver->name));
80703 +
80704 +    pnp_remove_card_device(pDevice);
80705 +    if (pDevice->id != NULL) {
80706 +        KernelFree(pDevice->id);
80707 +        pDevice->id = NULL;
80708 +    }
80709 +
80710 +    spin_lock(&InUseDevicesLock);
80711 +    ClearBit(&InUseDevices, pDevice->number);
80712 +    spin_unlock(&InUseDevicesLock);
80713 +
80714 +    pnp_unregister_driver(pDriver);
80715 +    if (pDriver->id_table != NULL) {
80716 +        KernelFree((void *)pDriver->id_table);
80717 +        pDriver->id_table = NULL;
80718 +    }
80719 +
80720 +}
80721 +
80722 +
80723 +/*
80724 + * module init
80725 +*/
80726 +static int __init sdio_busdriver_init(void) {
80727 +    SDIO_STATUS status;
80728 +    int error;
80729 +    REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
80730 +    if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
80731 +        return SDIOErrorToOSError(status);
80732 +    }
80733 +    /* register the sdio bus */
80734 +    error = pnp_register_protocol(&sdio_protocol);
80735 +    if (error < 0) {
80736 +        REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: failed to register bus device, %d\n", error));
80737 +        _SDIO_BusDriverCleanup();
80738 +        return error;
80739 +    }
80740 +    return 0;
80741 +}
80742 +
80743 +/*
80744 + * module cleanup
80745 +*/
80746 +static void __exit sdio_busdriver_cleanup(void) {
80747 +    REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
80748 +    _SDIO_BusDriverCleanup();
80749 +    pnp_unregister_protocol(&sdio_protocol);
80750 +DBG_PRINT(SDDBG_TRACE,
80751 +            ("SDIO BusDriver - unloaded 1\n"));
80752 +}
80753 +EXPORT_SYMBOL(SDIO_BusAddOSDevice);
80754 +EXPORT_SYMBOL(SDIO_BusRemoveOSDevice);
80755 +
80756 +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
80757 +    /* 2.4 */
80758 +static int RegisterDriver(PSDFUNCTION pFunction)
80759 +{
80760 +    return 0;
80761 +}
80762 +
80763 +static int UnregisterDriver(PSDFUNCTION pFunction)
80764 +{
80765 +    DBG_PRINT(SDDBG_TRACE,
80766 +            ("+-SDIO BusDriver - UnregisterDriver, driver: \n"));
80767 +   return 0;
80768 +}
80769 +
80770 +/*
80771 + * OS_InitializeDevice - initialize device that will be registered
80772 +*/
80773 +SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
80774 +{
80775 +    return SDIO_STATUS_SUCCESS;
80776 +}
80777 +
80778 +/*
80779 + * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
80780 +*/
80781 +SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
80782 +{
80783 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
80784 +                               pFunction->pName));
80785 +    return SDIO_STATUS_SUCCESS;
80786 +
80787 +}
80788 +
80789 +/*
80790 + * OS_RemoveDevice - unregister device with driver and bus
80791 +*/
80792 +void OS_RemoveDevice(PSDDEVICE pDevice)
80793 +{
80794 +    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
80795 +}
80796 +
80797 +/*
80798 + * module init
80799 +*/
80800 +static int __init sdio_busdriver_init(void) {
80801 +    SDIO_STATUS status;
80802 +    REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
80803 +    if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
80804 +        return SDIOErrorToOSError(status);
80805 +    }
80806 +    return 0;
80807 +}
80808 +
80809 +/*
80810 + * module cleanup
80811 +*/
80812 +static void __exit sdio_busdriver_cleanup(void) {
80813 +    REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
80814 +    _SDIO_BusDriverCleanup();
80815 +}
80816 +#else  ////KERNEL_VERSION
80817 +#error "unsupported kernel version: "UTS_RELEASE
80818 +#endif //KERNEL_VERSION
80819 +
80820 +MODULE_LICENSE("GPL and additional rights");
80821 +MODULE_DESCRIPTION(DESCRIPTION);
80822 +MODULE_AUTHOR(AUTHOR);
80823 +
80824 +module_init(sdio_busdriver_init);
80825 +module_exit(sdio_busdriver_cleanup);
80826 +EXPORT_SYMBOL(SDIO_RegisterHostController);
80827 +EXPORT_SYMBOL(SDIO_UnregisterHostController);
80828 +EXPORT_SYMBOL(SDIO_HandleHcdEvent);
80829 +EXPORT_SYMBOL(SDIO_CheckResponse);
80830 +EXPORT_SYMBOL(SDIO_RegisterFunction);
80831 +EXPORT_SYMBOL(SDIO_UnregisterFunction);
80832 Index: linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_function.c
80833 ===================================================================
80834 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
80835 +++ linux-2.6.24.7/drivers/sdio/stack/busdriver/sdio_function.c 2008-12-11 22:46:49.000000000 +0100
80836 @@ -0,0 +1,715 @@
80837 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80838 +@file: sdio_function.c
80839 +
80840 +@abstract: OS independent bus driver support for function drivers
80841 +
80842 +@notes: This file supports the interface between SDIO function drivers and the bus driver.
80843 +
80844 +@notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
80845 +
80846 +
80847 + *
80848 + *  This program is free software; you can redistribute it and/or modify
80849 + *  it under the terms of the GNU General Public License version 2 as
80850 + *  published by the Free Software Foundation;
80851 + *
80852 + *  Software distributed under the License is distributed on an "AS
80853 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
80854 + *  implied. See the License for the specific language governing
80855 + *  rights and limitations under the License.
80856 + *
80857 + *  Portions of this code were developed with information supplied from the
80858 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
80859 + *
80860 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
80861 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
80862 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
80863 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
80864 + *   Specification may require a license from the SD Card Association or other third parties.
80865 + *   Disclaimers:
80866 + *   The information contained in the Simplified Specification is presented only as a standard
80867 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
80868 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
80869 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
80870 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
80871 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
80872 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
80873 + *   information, know-how or other confidential information to any third party.
80874 + *
80875 + *
80876 + *  The initial developers of the original code are Seung Yi and Paul Lever
80877 + *
80878 + *  sdio@atheros.com
80879 + *
80880 + *
80881 +
80882 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
80883 +#define MODULE_NAME  SDBUSDRIVER
80884 +#include <linux/sdio/ctsystem.h>
80885 +#include <linux/sdio/sdio_busdriver.h>
80886 +#include <linux/sdio/sdio_lib.h>
80887 +#include "_busdriver.h"
80888 +
80889 +static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction);
80890 +
80891 +#ifdef CT_MAN_CODE_CHECK
80892 +static UINT16 ManCodeCheck = CT_MAN_CODE_CHECK;
80893 +#endif
80894 +
80895 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80896 +  @function: Register a function driver with the bus driver.
80897 +
80898 +  @function name: SDIO_RegisterFunction
80899 +  @prototype: SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction)
80900 +  @category: PD_Reference
80901 +  @input:  pFunction - the function definition structure.
80902 +
80903 +  @output: none
80904 +
80905 +  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
80906 +
80907 +  @notes: Each function driver must register with the bus driver once upon loading.
80908 +          The calling function must be prepared to receive a Probe callback before
80909 +          this function returns. This will occur when an perpheral device is already
80910 +          pluugged in that is supported by this function.
80911 +          The function driver should unregister itself when exiting.
80912 +          The bus driver checks for possible function drivers to support a device
80913 +          in reverse registration order.
80914 +
80915 +  @example: Registering a function driver:
80916 +            //list of devices supported by this function driver
80917 +       static SD_PNP_INFO Ids[] = {
80918 +            {.SDIO_ManufacturerID = 0xaa55,
80919 +             .SDIO_ManufacturerCode = 0x5555,
80920 +             .SDIO_FunctionNo = 1},
80921 +            {}                      //list is null termintaed
80922 +        };
80923 +        static GENERIC_FUNCTION_CONTEXT FunctionContext = {
80924 +            .Function.pName    = "sdio_generic", //name of the device
80925 +            .Function.Version  = CT_SDIO_STACK_VERSION_CODE, // set stack version
80926 +            .Function.MaxDevices = 1,    //maximum number of devices supported by this driver
80927 +            .Function.NumDevices = 0,    //current number of devices, always zero to start
80928 +            .Function.pIds     = Ids,    //the list of devices supported by this device
80929 +            .Function.pProbe   = Probe,  //pointer to the function drivers Probe function
80930 +                                         //  that will be called when a possibly supported device
80931 +                                         //  is inserted.
80932 +            .Function.pRemove  = Remove, //pointer to the function drivers Remove function
80933 +                                         /  that will be called when a device is removed.
80934 +            .Function.pContext = &FunctionContext, //data value that will be passed into Probe and
80935 +                                         //  Remove callbacks.
80936 +        };
80937 +        SDIO_STATUS status;
80938 +        status = SDIO_RegisterFunction(&FunctionContext.Function)
80939 +        if (!SDIO_SUCCESS(status)) {
80940 +            ...failed to register
80941 +        }
80942 +
80943 +  @see also: SDIO_UnregisterFunction
80944 +
80945 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
80946 +SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction)
80947 +{
80948 +       SDIO_STATUS status = SDIO_STATUS_SUCCESS;
80949 +
80950 +#ifdef CT_MAN_CODE_CHECK
80951 +    DBG_PRINT(SDDBG_TRACE,
80952 +        ("SDIO Bus Driver: _SDIO_RegisterFunction: WARNING, this version is locked to Memory cards and SDIO cards with JEDEC IDs of: 0x%X\n",
80953 +            ManCodeCheck));
80954 +#else
80955 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_RegisterFunction\n"));
80956 +#endif
80957 +
80958 +       DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Function Driver Stack Version: %d.%d \n",
80959 +        GET_SDIO_STACK_VERSION_MAJOR(pFunction),GET_SDIO_STACK_VERSION_MINOR(pFunction)));
80960 +
80961 +    if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
80962 +        DBG_PRINT(SDDBG_ERROR,
80963 +           ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
80964 +           GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
80965 +        return SDIO_STATUS_INVALID_PARAMETER;
80966 +    }
80967 +
80968 +
80969 +       /* sanity check the driver */
80970 +       if ((pFunction == NULL) ||
80971 +               (pFunction->pProbe == NULL) ||
80972 +               (pFunction->pIds == NULL)) {
80973 +        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, invalid registration data\n"));
80974 +           return SDIO_STATUS_INVALID_PARAMETER;
80975 +       }
80976 +    /* protect the function list and add the function */
80977 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
80978 +      goto cleanup;   /* wait interrupted */
80979 +    }
80980 +    SignalInitialize(&pFunction->CleanupReqSig);
80981 +    SDLIST_INIT(&pFunction->DeviceList);
80982 +    SDListAdd(&pBusContext->FunctionList, &pFunction->SDList);
80983 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
80984 +      goto cleanup;   /* wait interrupted */
80985 +    }
80986 +
80987 +       /* see if we have devices for this new function driver */
80988 +       ProbeForDevice(pFunction);
80989 +
80990 +       return status;
80991 +cleanup:
80992 +    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, error exit 0x%X\n", status));
80993 +    return status;
80994 +}
80995 +
80996 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
80997 +  @function: Unregister a function driver with the bus driver.
80998 +
80999 +  @function name: SDIO_UnregisterFunction
81000 +  @prototype: SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction)
81001 +  @category: PD_Reference
81002 +
81003 +  @input:  pFunction - the function definition structure.
81004 +
81005 +  @output: none
81006 +
81007 +  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
81008 +
81009 +  @notes: Each function driver must unregister from the bus driver when the function driver
81010 +          exits.
81011 +          A function driver must disconnect from any interrupts before calling this function.
81012 +
81013 +  @example: Unregistering a function driver:
81014 +        SDIO_UnregisterFunction(&FunctionContext.Function);
81015 +
81016 +  @see also: SDIO_RegisterFunction
81017 +
81018 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81019 +SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction)
81020 +{
81021 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
81022 +    PSDDEVICE pDevice;
81023 +
81024 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
81025 +
81026 +    /* protect the function list and synchronize with Probe() and Remove()*/
81027 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
81028 +        goto cleanup;   /* wait interrupted */
81029 +    }
81030 +        /* remove this function from the function list */
81031 +    SDListRemove(&pFunction->SDList);
81032 +        /* now remove this function as the handler for any of its devices */
81033 +    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink)  {
81034 +        if (pDevice->pFunction == pFunction) {
81035 +                /* notify removal */
81036 +            NotifyDeviceRemove(pDevice);
81037 +        }
81038 +    }SDITERATE_END;
81039 +
81040 +    SignalDelete(&pFunction->CleanupReqSig);
81041 +
81042 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
81043 +        goto cleanup;   /* wait interrupted */
81044 +    }
81045 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
81046 +       return status;
81047 +
81048 +cleanup:
81049 +    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: _SDIO_UnregisterFunction, error exit 0x%X\n", status));
81050 +    return status;
81051 +}
81052 +
81053 +/* documentation headers only for Probe and Remove */
81054 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81055 +  @function: This function is called by the Busdriver when a device is inserted that can be supported by this function driver.
81056 +
81057 +  @function name: Probe
81058 +  @prototype: BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
81059 +  @category: PD_Reference
81060 +
81061 +  @input:  pFunction - the function definition structure that was passed to Busdriver
81062 +                       via the SDIO_RegisterFunction.
81063 +  @input:  pDevice   - the description of the newly inserted device.
81064 +
81065 +  @output: none
81066 +
81067 +  @return: TRUE  - this function driver will suport this device
81068 +           FALSE - this function driver will not support this device
81069 +
81070 +  @notes: The Busdriver calls the Probe function of a function driver to inform it that device is
81071 +          available for the function driver to control. The function driver should initialize the
81072 +          device and be pepared to acceopt any interrupts from the device before returning.
81073 +
81074 +  @example: Example of typical Probe function callback:
81075 +  static BOOL Probe(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
81076 +       ...get the our context info passed into the SDIO_RegisterFunction
81077 +    PSDXXX_DRIVER_CONTEXT pFunctionContext =
81078 +                                (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
81079 +    SDIO_STATUS status;
81080 +       //test the identification of this device and ensure we want to support it
81081 +       // we can test based on class, or use more specific tests on SDIO_ManufacturerID, etc.
81082 +    if (pDevice->pId[0].SDIO_FunctionClass == XXX) {
81083 +        DBG_PRINT(SDDBG_TRACE, ("SDIO XXX Function: Probe - card matched (0x%X/0x%X/0x%X)\n",
81084 +                                pDevice->pId[0].SDIO_ManufacturerID,
81085 +                                pDevice->pId[0].SDIO_ManufacturerCode,
81086 +                                pDevice->pId[0].SDIO_FunctionNo));
81087 +        ...
81088 +
81089 +  @see also: SDIO_RegisterFunction
81090 +  @see also: Remove
81091 +
81092 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81093 +
81094 +BOOL FilterPnpInfo(PSDDEVICE pDevice)
81095 +{
81096 +#ifdef CT_MAN_CODE_CHECK
81097 +    if (pDevice->pId[0].CardFlags & CARD_SDIO) {
81098 +        if (pDevice->pId[0].SDIO_ManufacturerCode != ManCodeCheck) {
81099 +            DBG_PRINT(SDDBG_ERROR,
81100 +             ("SDIO Card with JEDEC ID:0x%X , not Allowed! Driver check halted. "
81101 +              "Please Contact sales@codetelligence.com.\n",
81102 +                    pDevice->pId[0].SDIO_ManufacturerCode));
81103 +            return FALSE;
81104 +        }
81105 +    }
81106 +    return TRUE;
81107 +#else
81108 +    return TRUE;
81109 +#endif
81110 +}
81111 +
81112 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81113 +  @function: This function is called by the Busdriver when a device controlled by this function
81114 +             function driver is removed.
81115 +
81116 +  @function name: Remove
81117 +  @prototype: void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
81118 +  @category: PD_Reference
81119 +
81120 +  @input:  pFunction - the function definition structure that was passed to Busdriver
81121 +                       via the SDIO_RegisterFunction.
81122 +  @input:  pDevice   - the description of the device being removed.
81123 +
81124 +  @output: none
81125 +
81126 +  @return: none
81127 +
81128 +  @notes: The Busdriver calls the Remove function of a function driver to inform it that device it
81129 +          was supporting has been removed. The device has already been removed, so no further I/O
81130 +          to the device can be performed.
81131 +
81132 +  @example: Example of typical Remove function callback:
81133 +    void Remove(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
81134 +            // get the our context info passed into the SDIO_RegisterFunction
81135 +        PSDXXX_DRIVER_CONTEXT pFunctionContext =
81136 +                             (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
81137 +           ...free any acquired resources.
81138 +
81139 +  @see also: SDIO_RegisterFunction
81140 +  @see also: Probe
81141 +
81142 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81143 +
81144 +/*
81145 + * ProbeForFunction - look for a function driver to handle this card
81146 + *
81147 +*/
81148 +SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd) {
81149 +    SDIO_STATUS status;
81150 +    PSDLIST pList;
81151 +    PSDFUNCTION pFunction;
81152 +
81153 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: ProbeForFunction\n"));
81154 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - Dump of Device PNP Data: \n"));
81155 +    DBG_PRINT(SDDBG_TRACE, (" Card Flags 0x%X \n", pDevice->pId[0].CardFlags));
81156 +    if (pDevice->pId[0].CardFlags & CARD_SDIO) {
81157 +        DBG_PRINT(SDDBG_TRACE, (" SDIO MANF:      0x%X \n", pDevice->pId[0].SDIO_ManufacturerID));
81158 +        DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE:  0x%X \n", pDevice->pId[0].SDIO_ManufacturerCode));
81159 +        DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo:    %d \n", pDevice->pId[0].SDIO_FunctionNo));
81160 +        DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pDevice->pId[0].SDIO_FunctionClass));
81161 +    }
81162 +    if (pDevice->pId[0].CardFlags & (CARD_MMC | CARD_SD)) {
81163 +        DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID: 0x%X \n",pDevice->pId[0].SDMMC_ManfacturerID));
81164 +        DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID:  0x%X \n",pDevice->pId[0].SDMMC_OEMApplicationID));
81165 +    }
81166 +
81167 +    if (!FilterPnpInfo(pDevice)) {
81168 +        status = SDIO_STATUS_SUCCESS;
81169 +        goto cleanup;
81170 +    }
81171 +
81172 +    /* protect the function list */
81173 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
81174 +        goto cleanup;   /* wait interrupted */
81175 +    }
81176 +
81177 +    /* protect against ProbeForDevice */
81178 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
81179 +            /* release the function list semaphore we just took */
81180 +        SemaphorePost(&pBusContext->FunctionListSem);
81181 +        goto cleanup;
81182 +    }
81183 +
81184 +    if (pDevice->pFunction != NULL) {
81185 +            /* device already has a function driver handling it */
81186 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction, device already has function\n"));
81187 +            /* release function list */
81188 +        SemaphorePost(&pBusContext->DeviceListSem);
81189 +            /* release function list */
81190 +        SemaphorePost(&pBusContext->FunctionListSem);
81191 +            /* just return success */
81192 +        status = SDIO_STATUS_SUCCESS;
81193 +        goto cleanup;
81194 +    }
81195 +
81196 +        /* release device list */
81197 +    SemaphorePost(&pBusContext->DeviceListSem);
81198 +
81199 +    /* walk functions looking for one that can handle this device */
81200 +    SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
81201 +        pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
81202 +        if (pFunction->NumDevices >=  pFunction->MaxDevices) {
81203 +            /* function can't support any more devices */
81204 +            continue;
81205 +        }
81206 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - checking: %s \n",
81207 +                                pFunction->pName));
81208 +
81209 +        /* see if this function handles this device */
81210 +        if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
81211 +            if (!FilterPnpInfo(pDevice)) {
81212 +                break;
81213 +            }
81214 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction -Got Match, probing: %s \n",
81215 +                                    pFunction->pName));
81216 +            /* we need to setup with the OS bus driver before the probe, so probe can
81217 +              do OS operations. */
81218 +            OS_InitializeDevice(pDevice, pFunction);
81219 +            if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
81220 +                break;
81221 +            }
81222 +            /* close enough match, ask the function driver if it supports us */
81223 +            if (pFunction->pProbe(pFunction, pDevice)) {
81224 +                /* she accepted the device, add to list */
81225 +                pDevice->pFunction = pFunction;
81226 +                SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
81227 +                pFunction->NumDevices++;
81228 +                break;
81229 +            } else {
81230 +                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
81231 +                  pFunction->pName));
81232 +                /* didn't take this device */
81233 +                OS_RemoveDevice(pDevice);
81234 +            }
81235 +
81236 +        }
81237 +    }
81238 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
81239 +        goto cleanup;   /* wait interrupted */
81240 +    }
81241 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: ProbeForFunction\n"));
81242 +       return status;
81243 +cleanup:
81244 +    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForFunction, error exit 0x%X\n", status));
81245 +    return status;
81246 +}
81247 +
81248 +/*
81249 + * ProbeForDevice - look for a device that this function driver supports
81250 + *
81251 +*/
81252 +static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction) {
81253 +    SDIO_STATUS status;
81254 +    PSDLIST pList;
81255 +    PSDDEVICE pDevice;
81256 +
81257 +    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice\n"));
81258 +    if (pFunction->NumDevices >=  pFunction->MaxDevices) {
81259 +        /* function can't support any more devices */
81260 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, too many devices in function\n"));
81261 +        return SDIO_STATUS_SUCCESS;
81262 +    }
81263 +
81264 +     /* protect the driver list */
81265 +    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
81266 +      goto cleanup;   /* wait interrupted */
81267 +    }
81268 +    /* walk device list */
81269 +    SDITERATE_OVER_LIST(&pBusContext->DeviceList, pList) {
81270 +        pDevice = CONTAINING_STRUCT(pList, SDDEVICE, SDList);
81271 +        if (pDevice->pFunction != NULL) {
81272 +            /* device already has a function driver handling it */
81273 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, device already has function\n"));
81274 +            continue;
81275 +        }
81276 +        /* see if this function handles this device */
81277 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, matching ID:%d %d class:%d\n",
81278 +                                pDevice->pId[0].SDIO_ManufacturerID,
81279 +                                pDevice->pId[0].SDIO_FunctionNo,
81280 +                                pDevice->pId[0].SDIO_FunctionClass));
81281 +        if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
81282 +            if (!FilterPnpInfo(pDevice)) {
81283 +                break;
81284 +            }
81285 +            /* we need to setup with the OS bus driver before the probe, so probe can
81286 +              do OS operations. */
81287 +            OS_InitializeDevice(pDevice, pFunction);
81288 +            if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
81289 +                break;
81290 +            }
81291 +            /* close enough match, ask the function driver if it supports us */
81292 +            if (pFunction->pProbe(pFunction, pDevice)) {
81293 +                /* she accepted the device, add to list */
81294 +                pDevice->pFunction = pFunction;
81295 +                SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
81296 +                pFunction->NumDevices++;
81297 +                break;
81298 +            } else {
81299 +                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
81300 +                  pFunction->pName));
81301 +                /* didn't take this device */
81302 +                OS_RemoveDevice(pDevice);
81303 +            }
81304 +        }
81305 +    }
81306 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
81307 +      goto cleanup;   /* wait interrupted */
81308 +    }
81309 +
81310 +       return status;
81311 +cleanup:
81312 +    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForDevice, error exit 0x%X\n", status));
81313 +    return status;
81314 +}
81315 +
81316 +#if 0
81317 +static void DumpPnpEntry(PSD_PNP_INFO pInfo)
81318 +{
81319 +    DBG_PRINT(SDDBG_TRACE, ("Function PnpInfo Dump: \n"));
81320 +    DBG_PRINT(SDDBG_TRACE, (" Card Flags      0x%X \n", pInfo->CardFlags));
81321 +    DBG_PRINT(SDDBG_TRACE, (" SDIO MANF:      0x%X \n", pInfo->SDIO_ManufacturerID));
81322 +    DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE:  0x%X \n", pInfo->SDIO_ManufacturerCode));
81323 +    DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo:    %d \n", pInfo->SDIO_FunctionNo));
81324 +    DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pInfo->SDIO_FunctionClass));
81325 +    DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID:   0x%X \n", pInfo->SDMMC_ManfacturerID));
81326 +    DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID:    0x%X \n", pInfo->SDMMC_OEMApplicationID));
81327 +}
81328 +#endif
81329 +/*
81330 + * IsPotentialIdMatch - test for potential device match
81331 + *
81332 +*/
81333 +BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList) {
81334 +    PSD_PNP_INFO pTFn;
81335 +       BOOL match = FALSE;
81336 +
81337 +       for (pTFn = pIdsFuncList;!IS_LAST_SDPNPINFO_ENTRY(pTFn);pTFn++) {
81338 +        //DumpPnpEntry(pTFn);
81339 +            /* check specific SDIO Card manufacturer ID, Code and Function number */
81340 +               if ((pIdsDev->SDIO_ManufacturerID != 0) &&
81341 +                   (pTFn->SDIO_ManufacturerID != 0) &&
81342 +                   (pIdsDev->SDIO_ManufacturerID == pTFn->SDIO_ManufacturerID) &&
81343 +                   (pIdsDev->SDIO_ManufacturerCode == pTFn->SDIO_ManufacturerCode) &&
81344 +            ((pIdsDev->SDIO_FunctionNo == pTFn->SDIO_FunctionNo) ||
81345 +             (pTFn->SDIO_FunctionNo == 0)) ) {
81346 +                   match = TRUE;
81347 +            break;
81348 +               }
81349 +            /* check generic function class */
81350 +        if ((pIdsDev->SDIO_FunctionClass != 0) &&
81351 +            (pTFn->SDIO_FunctionClass != 0) &&
81352 +            (pIdsDev->SDIO_FunctionClass == pTFn->SDIO_FunctionClass)) {
81353 +            match = TRUE;
81354 +            break;
81355 +        }
81356 +            /* check specific SDMMC MANFID and APPLICATION ID, NOTE SANDISK
81357 +             * uses a MANFID of zero! */
81358 +        if ((pTFn->SDMMC_OEMApplicationID != 0) &&
81359 +            (pIdsDev->SDMMC_ManfacturerID == pTFn->SDMMC_ManfacturerID) &&
81360 +            (pIdsDev->SDMMC_OEMApplicationID == pTFn->SDMMC_OEMApplicationID)) {
81361 +            match = TRUE;
81362 +            break;
81363 +        }
81364 +
81365 +            /* check generic SD Card */
81366 +        if ((pIdsDev->CardFlags & CARD_SD) &&
81367 +            (pTFn->CardFlags & CARD_SD)){
81368 +            match = TRUE;
81369 +            break;
81370 +        }
81371 +
81372 +            /* check generic MMC Card */
81373 +        if ((pIdsDev->CardFlags & CARD_MMC) &&
81374 +            (pTFn->CardFlags & CARD_MMC)){
81375 +            match = TRUE;
81376 +            break;
81377 +        }
81378 +
81379 +             /* check raw Card */
81380 +        if ((pIdsDev->CardFlags & CARD_RAW) &&
81381 +            (pTFn->CardFlags & CARD_RAW)){
81382 +            match = TRUE;
81383 +            break;
81384 +        }
81385 +       }
81386 +
81387 +    return match;
81388 +}
81389 +
81390 +/*
81391 + * NotifyDeviceRemove - tell function driver on this device that the device is being removed
81392 + *
81393 +*/
81394 +SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice) {
81395 +    SDIO_STATUS     status;
81396 +    SDREQUESTQUEUE  cancelQueue;
81397 +    PSDREQUEST      pReq;
81398 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
81399 +
81400 +    InitializeRequestQueue(&cancelQueue);
81401 +
81402 +       if ((pDevice->pFunction != NULL) &&
81403 +        (pDevice->pFunction->pRemove != NULL)){
81404 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: removing device 0x%X\n", (INT)pDevice));
81405 +            /* fail any outstanding requests for this device */
81406 +            /* acquire lock for request queue */
81407 +        status = _AcquireHcdLock(pDevice->pHcd);
81408 +        if (!SDIO_SUCCESS(status)) {
81409 +            return status;
81410 +        }
81411 +            /* mark the function to block any more requests comming down */
81412 +        pDevice->pFunction->Flags |= SDFUNCTION_FLAG_REMOVING;
81413 +            /* walk through HCD queue and remove this function's requests */
81414 +        SDITERATE_OVER_LIST_ALLOW_REMOVE(&pDevice->pHcd->RequestQueue.Queue, pReq, SDREQUEST, SDList) {
81415 +            if (pReq->pFunction == pDevice->pFunction) {
81416 +                /* cancel this request, as this device or function is being removed */
81417 +                /* note that these request are getting completed out of order */
81418 +                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: canceling req 0x%X\n", (UINT)pReq));
81419 +                pReq->Status = SDIO_STATUS_CANCELED;
81420 +                    /* remove it from the HCD queue */
81421 +                SDListRemove(&pReq->SDList);
81422 +                    /* add it to the cancel queue */
81423 +                QueueRequest(&cancelQueue, pReq);
81424 +            }
81425 +        }SDITERATE_END;
81426 +
81427 +        status = _ReleaseHcdLock(pDevice->pHcd);
81428 +
81429 +           /* now empty the cancel queue if anything is in there */
81430 +        while (TRUE) {
81431 +            pReq = DequeueRequest(&cancelQueue);
81432 +            if (NULL == pReq) {
81433 +                break;
81434 +            }
81435 +                /* complete the request */
81436 +            DoRequestCompletion(pReq, pDevice->pHcd);
81437 +        }
81438 +            /* re-acquire the lock to deal with the current request */
81439 +        status = _AcquireHcdLock(pDevice->pHcd);
81440 +        if (!SDIO_SUCCESS(status)) {
81441 +            return status;
81442 +        }
81443 +            /* now deal with the current request */
81444 +        pReq = GET_CURRENT_REQUEST(pDevice->pHcd);
81445 +        if ((pReq !=NULL) && (pReq->pFunction == pDevice->pFunction) && (pReq->pFunction != NULL)) {
81446 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding Req 0x%X on HCD: 0x%X.. waiting...\n",
81447 +                (UINT)pReq, (UINT)pDevice->pHcd));
81448 +                /* the outstanding request on this device is for the function being removed */
81449 +            pReq->Flags |= SDREQ_FLAGS_CANCELED;
81450 +                /* wait for this request to get completed normally */
81451 +            status = _ReleaseHcdLock(pDevice->pHcd);
81452 +            SignalWait(&pDevice->pFunction->CleanupReqSig);
81453 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding HCD Req 0x%X completed \n", (UINT)pReq));
81454 +        }  else {
81455 +                /* release lock */
81456 +            status = _ReleaseHcdLock(pDevice->pHcd);
81457 +        }
81458 +
81459 +            /* synchronize with ISR SYNC Handlers */
81460 +               status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
81461 +        if (!SDIO_SUCCESS(status)) {
81462 +            return status;
81463 +        }
81464 +            /* call this devices Remove function */
81465 +        pDevice->pFunction->pRemove(pDevice->pFunction,pDevice);
81466 +        pDevice->pFunction->NumDevices--;
81467 +            /* make sure the sync handler is NULLed out */
81468 +        pDevice->pIrqFunction = NULL;
81469 +        SemaphorePost(&pBusContext->DeviceListSem);
81470 +
81471 +        OS_RemoveDevice(pDevice);
81472 +            /* detach this device from the function list it belongs to */
81473 +        SDListRemove(&pDevice->FuncListLink);
81474 +        pDevice->pFunction->Flags &= ~SDFUNCTION_FLAG_REMOVING;
81475 +               pDevice->pFunction = NULL;
81476 +       }
81477 +       return SDIO_STATUS_SUCCESS;
81478 +}
81479 +
81480 +
81481 +/*
81482 + * RemoveHcdFunctions - remove all functions attached to an HCD
81483 + *
81484 +*/
81485 +SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd) {
81486 +    SDIO_STATUS status;
81487 +    PSDLIST pList;
81488 +    PSDFUNCTION pFunction;
81489 +    PSDDEVICE pDevice;
81490 +    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: RemoveHcdFunctions\n"));
81491 +
81492 +    /* walk through the functions and remove the ones associated with this HCD */
81493 +    /* protect the driver list */
81494 +    if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->FunctionListSem)))) {
81495 +        goto cleanup;   /* wait interrupted */
81496 +    }
81497 +        /* mark that card is being removed */
81498 +    pHcd->CardProperties.CardState |= CARD_STATE_REMOVED;
81499 +    SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
81500 +        pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
81501 +        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: scanning function 0x%X, %s\n", (INT)pFunction,
81502 +                                (pFunction == NULL)?"NULL":pFunction->pName));
81503 +
81504 +        /* walk the devices on this function and look for a match */
81505 +        SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink) {
81506 +            if (pDevice->pHcd == pHcd) {
81507 +                /* match, remove it */
81508 +                NotifyDeviceRemove(pDevice);
81509 +            }
81510 +        SDITERATE_END;
81511 +    SDITERATE_END;
81512 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
81513 +        goto cleanup;   /* wait interrupted */
81514 +    }
81515 +    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: RemoveHcdFunctions\n"));
81516 +    return SDIO_STATUS_SUCCESS;
81517 +
81518 +cleanup:
81519 +    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: RemoveHcdFunctions, error exit 0x%X\n", status));
81520 +    return status;
81521 +}
81522 +
81523 +/*
81524 + * RemoveAllFunctions - remove all functions attached
81525 + *
81526 +*/
81527 +SDIO_STATUS RemoveAllFunctions()
81528 +{
81529 +    SDIO_STATUS status;
81530 +    PSDLIST pList;
81531 +    PSDHCD pHcd;
81532 +
81533 +    /* walk through the HCDs  */
81534 +    /* protect the driver list */
81535 +    if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->HcdListSem)))) {
81536 +        goto cleanup;   /* wait interrupted */
81537 +    }
81538 +    SDITERATE_OVER_LIST(&pBusContext->HcdList, pList) {
81539 +        pHcd = CONTAINING_STRUCT(pList, SDHCD, SDList);
81540 +            /* remove the functions */
81541 +        RemoveHcdFunctions(pHcd);
81542 +    }
81543 +    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
81544 +        goto cleanup;   /* wait interrupted */
81545 +    }
81546 +    return SDIO_STATUS_SUCCESS;
81547 +cleanup:
81548 +    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: RemoveAllFunctions, error exit 0x%X\n", status));
81549 +    return status;
81550 +}
81551 +
81552 Index: linux-2.6.24.7/drivers/sdio/stack/lib/Makefile
81553 ===================================================================
81554 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
81555 +++ linux-2.6.24.7/drivers/sdio/stack/lib/Makefile      2008-12-11 22:46:49.000000000 +0100
81556 @@ -0,0 +1,2 @@
81557 +obj-$(CONFIG_SDIO) += sdio_lib.o
81558 +sdio_lib-objs := sdio_lib_c.o sdio_lib_os.o
81559 Index: linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_c.c
81560 ===================================================================
81561 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
81562 +++ linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_c.c  2008-12-11 22:46:49.000000000 +0100
81563 @@ -0,0 +1,908 @@
81564 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81565 +@file: sdio_lib_c.c
81566 +
81567 +@abstract: OS independent SDIO library functions
81568 +@category abstract: Support_Reference Support Functions.
81569 +
81570 +@notes: Support functions for device I/O
81571 +
81572 +@notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
81573 +
81574 +
81575 + *
81576 + *  This program is free software; you can redistribute it and/or modify
81577 + *  it under the terms of the GNU General Public License version 2 as
81578 + *  published by the Free Software Foundation;
81579 + *
81580 + *  Software distributed under the License is distributed on an "AS
81581 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
81582 + *  implied. See the License for the specific language governing
81583 + *  rights and limitations under the License.
81584 + *
81585 + *  Portions of this code were developed with information supplied from the
81586 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
81587 + *
81588 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
81589 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
81590 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
81591 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
81592 + *   Specification may require a license from the SD Card Association or other third parties.
81593 + *   Disclaimers:
81594 + *   The information contained in the Simplified Specification is presented only as a standard
81595 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
81596 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
81597 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
81598 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
81599 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
81600 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
81601 + *   information, know-how or other confidential information to any third party.
81602 + *
81603 + *
81604 + *  The initial developers of the original code are Seung Yi and Paul Lever
81605 + *
81606 + *  sdio@atheros.com
81607 + *
81608 + *
81609 +
81610 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81611 +#define MODULE_NAME  SDLIB_
81612 +
81613 +#include <linux/sdio/ctsystem.h>
81614 +#include <linux/sdio/sdio_busdriver.h>
81615 +#include <linux/sdio/_sdio_defs.h>
81616 +#include <linux/sdio/sdio_lib.h>
81617 +#include "_sdio_lib.h"
81618 +
81619 +#define _Cmd52WriteByteCommon(pDev, Address, pValue) \
81620 +                _SDLIB_IssueCMD52((pDev),0,(Address),(pValue),1,TRUE)
81621 +#define _Cmd52ReadByteCommon(pDev, Address, pValue) \
81622 +                _SDLIB_IssueCMD52((pDev),0,(Address),pValue,1,FALSE)
81623 +#define _Cmd52ReadMultipleCommon(pDev, Address, pBuf,length) \
81624 +                _SDLIB_IssueCMD52((pDev),0,(Address),(pBuf),(length),FALSE)
81625 +
81626 +/* inline version */
81627 +static INLINE void _iSDLIB_SetupCMD52Request(UINT8         FuncNo,
81628 +                                             UINT32        Address,
81629 +                                             BOOL          Write,
81630 +                                             UINT8         WriteData,
81631 +                                             PSDREQUEST    pRequest) {
81632 +    if (Write) {
81633 +        SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_WRITE,
81634 +                           FuncNo,
81635 +                           CMD52_NORMAL_WRITE,Address,WriteData);
81636 +    } else {
81637 +        SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_READ,FuncNo,0,Address,0x00);
81638 +    }
81639 +
81640 +    pRequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5;
81641 +    pRequest->Command = CMD52;
81642 +}
81643 +
81644 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81645 +  @function: Setup cmd52 requests
81646 +
81647 +  @function name: SDLIB_SetupCMD52Request
81648 +  @prototype: void SDLIB_SetupCMD52Request(UINT8         FuncNo,
81649 +                                           UINT32        Address,
81650 +                                           BOOL          Write,
81651 +                                           UINT8         WriteData,
81652 +                                           PSDREQUEST    pRequest)
81653 +  @category: PD_Reference
81654 +
81655 +  @input:  FunctionNo - function number.
81656 +  @input:  Address - I/O address, 17-bit register address.
81657 +  @input:  Write  - TRUE if a write operation, FALSE for reads.
81658 +  @input:  WriteData - write data, byte to write if write operation.
81659 +
81660 +  @output: pRequest - request is updated with cmd52 parameters
81661 +
81662 +  @return: none
81663 +
81664 +  @notes: This function does not perform any I/O. For register reads, the completion
81665 +          routine can use the SD_R5_GET_READ_DATA() macro to extract the register value.
81666 +          The routine should also extract the response flags using the SD_R5_GET_RESP_FLAGS()
81667 +          macro and check the flags with the SD_R5_ERRORS mask.
81668 +
81669 +  @example: Getting the register value from the completion routine:
81670 +          flags = SD_R5_GET_RESP_FLAGS(pRequest->Response);
81671 +          if (flags & SD_R5_ERRORS) {
81672 +             ... errors
81673 +          } else {
81674 +             registerValue = SD_R5_GET_READ_DATA(pRequest->Response);
81675 +          }
81676 +
81677 +  @see also: SDLIB_IssueCMD52
81678 +  @see also: SDDEVICE_CALL_REQUEST_FUNC
81679 +
81680 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81681 +void _SDLIB_SetupCMD52Request(UINT8         FuncNo,
81682 +                              UINT32        Address,
81683 +                              BOOL          Write,
81684 +                              UINT8         WriteData,
81685 +                              PSDREQUEST    pRequest)
81686 +{
81687 +    _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
81688 +}
81689 +
81690 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81691 +  @function: Issue a CMD52 to read or write a register
81692 +
81693 +  @function name: SDLIB_IssueCMD52
81694 +  @prototype: SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE     pDevice,
81695 +                                           UINT8         FuncNo,
81696 +                                           UINT32        Address,
81697 +                                           PUINT8        pData,
81698 +                                           INT           ByteCount,
81699 +                                           BOOL          Write)
81700 +  @category: PD_Reference
81701 +  @input: pDevice - the device that is the target of the command.
81702 +  @input: FunctionNo - function number of the target.
81703 +  @input: Address - 17-bit register address.
81704 +  @input: ByteCount - number of bytes to read or write,
81705 +  @input: Write - TRUE if a write operation, FALSE for reads.
81706 +  @input: pData - data buffer for writes.
81707 +
81708 +  @output: pData - data buffer for writes.
81709 +
81710 +  @return: SDIO Status
81711 +
81712 +  @notes:  This function will allocate a request and issue multiple byte reads or writes
81713 +           to satisfy the ByteCount requested.  This function is fully synchronous and will block
81714 +           the caller.
81715 +
81716 +  @see also: SDLIB_SetupCMD52Request
81717 +
81718 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81719 +SDIO_STATUS _SDLIB_IssueCMD52(PSDDEVICE     pDevice,
81720 +                              UINT8         FuncNo,
81721 +                              UINT32        Address,
81722 +                              PUINT8        pData,
81723 +                              INT           ByteCount,
81724 +                              BOOL          Write)
81725 +{
81726 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
81727 +
81728 +    PSDREQUEST  pReq = NULL;
81729 +
81730 +    pReq = SDDeviceAllocRequest(pDevice);
81731 +
81732 +    if (NULL == pReq) {
81733 +        return SDIO_STATUS_NO_RESOURCES;
81734 +    }
81735 +
81736 +    while (ByteCount) {
81737 +        _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,*pData,pReq);
81738 +        status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
81739 +        if (!SDIO_SUCCESS(status)) {
81740 +            break;
81741 +        }
81742 +
81743 +        status = ConvertCMD52ResponseToSDIOStatus(SD_R5_GET_RESP_FLAGS(pReq->Response));
81744 +        if (!SDIO_SUCCESS(status)) {
81745 +            DBG_PRINT(SDDBG_TRACE, ("SDIO Library: CMD52 resp error: 0x%X \n",
81746 +                                    SD_R5_GET_RESP_FLAGS(pReq->Response)));
81747 +            break;
81748 +        }
81749 +        if (!Write) {
81750 +                /* store the byte */
81751 +            *pData =  SD_R5_GET_READ_DATA(pReq->Response);
81752 +        }
81753 +        pData++;
81754 +        Address++;
81755 +        ByteCount--;
81756 +    }
81757 +
81758 +    SDDeviceFreeRequest(pDevice,pReq);
81759 +    return status;
81760 +}
81761 +
81762 +
81763 +
81764 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81765 +  @function: Find a device's tuple.
81766 +
81767 +  @function name: SDLIB_FindTuple
81768 +  @prototype: SDIO_STATUS SDLIB_FindTuple(PSDDEVICE  pDevice,
81769 +                                          UINT8      Tuple,
81770 +                                          UINT32     *pTupleScanAddress,
81771 +                                          PUINT8     pBuffer,
81772 +                                          UINT8      *pLength)
81773 +
81774 +  @category: PD_Reference
81775 +  @input: pDevice - the device that is the target of the command.
81776 +  @input: Tuple - 8-bit ID of tuple to find
81777 +  @input: pTupleScanAddress - On entry pTupleScanAddress is the adddress to start scanning
81778 +  @input: pLength - length of pBuffer
81779 +
81780 +  @output: pBuffer - storage for tuple
81781 +  @output: pTupleScanAddress - address of the next tuple
81782 +  @output: pLength - length of tuple read
81783 +
81784 +  @return: status
81785 +
81786 +  @notes: It is possible to have the same tuple ID multiple times with different lengths. This function
81787 +          blocks and is fully synchronous.
81788 +
81789 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81790 +SDIO_STATUS _SDLIB_FindTuple(PSDDEVICE  pDevice,
81791 +                             UINT8      Tuple,
81792 +                             UINT32     *pTupleScanAddress,
81793 +                             PUINT8     pBuffer,
81794 +                             UINT8      *pLength)
81795 +{
81796 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
81797 +    UINT32      scanStart = *pTupleScanAddress;
81798 +    UINT8       tupleCode;
81799 +    UINT8       tupleLink;
81800 +
81801 +        /* sanity check */
81802 +    if (scanStart < SDIO_CIS_AREA_BEGIN) {
81803 +        return SDIO_STATUS_CIS_OUT_OF_RANGE;
81804 +    }
81805 +
81806 +    while (TRUE) {
81807 +            /* check for end */
81808 +        if (scanStart > SDIO_CIS_AREA_END) {
81809 +            status = SDIO_STATUS_TUPLE_NOT_FOUND;
81810 +            break;
81811 +        }
81812 +            /* get the code */
81813 +        status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleCode);
81814 +        if (!SDIO_SUCCESS(status)) {
81815 +            break;
81816 +        }
81817 +        if (CISTPL_END == tupleCode) {
81818 +                /* found the end */
81819 +            status = SDIO_STATUS_TUPLE_NOT_FOUND;
81820 +            break;
81821 +        }
81822 +            /* bump past tuple code */
81823 +        scanStart++;
81824 +            /* get the tuple link value */
81825 +        status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleLink);
81826 +        if (!SDIO_SUCCESS(status)) {
81827 +            break;
81828 +        }
81829 +            /* bump past tuple link*/
81830 +        scanStart++;
81831 +            /* check tuple we just found */
81832 +        if (tupleCode == Tuple) {
81833 +             DBG_PRINT(SDDBG_TRACE, ("SDIO Library: Tuple:0x%2.2X Found at Address:0x%X, TupleLink:0x%X \n",
81834 +                                     Tuple, (scanStart - 2), tupleLink));
81835 +            if (tupleLink != CISTPL_LINK_END) {
81836 +                    /* return the next scan address to the caller */
81837 +                *pTupleScanAddress = scanStart + tupleLink;
81838 +            } else {
81839 +                    /* the tuple link is an end marker */
81840 +                *pTupleScanAddress = 0xFFFFFFFF;
81841 +            }
81842 +                /* go get the tuple */
81843 +            status = _Cmd52ReadMultipleCommon(pDevice, scanStart,pBuffer,min(*pLength,tupleLink));
81844 +            if (SDIO_SUCCESS(status)) {
81845 +                    /* set the actual return length */
81846 +                *pLength = min(*pLength,tupleLink);
81847 +            }
81848 +                /* break out of loop */
81849 +            break;
81850 +        }
81851 +            /*increment past this entire tuple */
81852 +        scanStart += tupleLink;
81853 +    }
81854 +
81855 +    return status;
81856 +}
81857 +
81858 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81859 +  @function: Issue an SDIO configuration command.
81860 +
81861 +  @function name: SDLIB_IssueConfig
81862 +  @prototype: SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE        pDevice,
81863 +                                             SDCONFIG_COMMAND Command,
81864 +                                             PVOID            pData,
81865 +                                             INT              Length)
81866 +
81867 +  @category: PD_Reference
81868 +  @input:  pDevice - the device that is the target of the command.
81869 +  @input:  Command - command to send, see example.
81870 +  @input:  pData - command's data
81871 +  @input:  Length length of pData
81872 +
81873 +  @output: pData - updated on commands that return data.
81874 +
81875 +  @return: SDIO Status
81876 +
81877 +  @example: Command and data pairs:
81878 +            Type                               Data
81879 +            SDCONFIG_GET_WP             SDCONFIG_WP_VALUE
81880 +            SDCONFIG_SEND_INIT_CLOCKS   none
81881 +            SDCONFIG_SDIO_INT_CTRL      SDCONFIG_SDIO_INT_CTRL_DATA
81882 +            SDCONFIG_SDIO_REARM_INT     none
81883 +            SDCONFIG_BUS_MODE_CTRL      SDCONFIG_BUS_MODE_DATA
81884 +            SDCONFIG_POWER_CTRL         SDCONFIG_POWER_CTRL_DATA
81885 +
81886 +  @notes:
81887 +
81888 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81889 +SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE        pDevice,
81890 +                               SDCONFIG_COMMAND Command,
81891 +                               PVOID            pData,
81892 +                               INT              Length)
81893 +{
81894 +    SDCONFIG  configHdr;
81895 +    SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
81896 +    return SDDEVICE_CALL_CONFIG_FUNC(pDevice,&configHdr);
81897 +}
81898 +
81899 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81900 +  @function: Set function block size
81901 +
81902 +  @function name: SDLIB_SetFunctionBlockSize
81903 +  @prototype: SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
81904 +                                                     UINT16           BlockSize)
81905 +
81906 +  @category: PD_Reference
81907 +  @input:  pDevice - the device that is the target of the command.
81908 +  @input:  BlockSize - block size to set in function
81909 +
81910 +  @output: none
81911 +
81912 +  @return: SDIO Status
81913 +
81914 +  @notes:  Issues CMD52 to set the block size.  This function is fully synchronous and may
81915 +           block.
81916 +
81917 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81918 +SDIO_STATUS _SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
81919 +                                        UINT16           BlockSize)
81920 +{
81921 +    UINT8   data[2];
81922 +
81923 +      /* endian safe */
81924 +    data[0] = (UINT8)BlockSize;
81925 +    data[1] = (UINT8)(BlockSize >> 8);
81926 +        /* write the function blk size control register */
81927 +    return _SDLIB_IssueCMD52(pDevice,
81928 +                             0,    /* function 0 register space */
81929 +                             FBR_FUNC_BLK_SIZE_LOW_OFFSET(CalculateFBROffset(
81930 +                             SDDEVICE_GET_SDIO_FUNCNO(pDevice))),
81931 +                             data,
81932 +                             2,
81933 +                             TRUE);
81934 +}
81935 +
81936 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
81937 +  @function: Print a buffer to the debug output
81938 +
81939 +  @function name: SDLIB_PrintBuffer
81940 +  @prototype: void SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
81941 +  @category: Support_Reference
81942 +
81943 +  @input:  pBuffer - Hex buffer to be printed.
81944 +  @input:  Length - length of pBuffer.
81945 +  @input:  pDescription - String title to be printed above the dump.
81946 +
81947 +  @output: none
81948 +
81949 +  @return: none
81950 +
81951 +  @notes:  Prints the buffer by converting to ASCII and using REL_PRINT() with 16
81952 +           bytes per line.
81953 +
81954 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
81955 +void _SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
81956 +{
81957 +    TEXT  line[49];
81958 +    TEXT  address[5];
81959 +    TEXT  ascii[17];
81960 +    TEXT  temp[5];
81961 +    INT   i;
81962 +    UCHAR num;
81963 +    USHORT offset = 0;
81964 +
81965 +    REL_PRINT(0,
81966 +              ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
81967 +    if (pDescription != NULL) {
81968 +        REL_PRINT(0, ("Description: %s \n\n",pDescription));
81969 +    } else {
81970 +        REL_PRINT(0, ("Description: NONE \n\n"));
81971 +    }
81972 +    REL_PRINT(0,
81973 +              ("Offset                   Data                               ASCII        \n"));
81974 +    REL_PRINT(0,
81975 +              ("--------------------------------------------------------------------------\n"));
81976 +
81977 +    while (Length) {
81978 +        line[0] = (TEXT)0;
81979 +        ascii[0] = (TEXT)0;
81980 +        address[0] = (TEXT)0;
81981 +        sprintf(address,"%4.4X",offset);
81982 +        for (i = 0; i < 16; i++) {
81983 +            if (Length != 0) {
81984 +                num = *pBuffer;
81985 +                sprintf(temp,"%2.2X ",num);
81986 +                strcat(line,temp);
81987 +                if ((num >= 0x20) && (num <= 0x7E)) {
81988 +                    sprintf(temp,"%c",*pBuffer);
81989 +                } else {
81990 +                    sprintf(temp,"%c",0x2e);
81991 +                }
81992 +                strcat(ascii,temp);
81993 +                pBuffer++;
81994 +                Length--;
81995 +            } else {
81996 +                    /* pad partial line with spaces */
81997 +                strcat(line,"   ");
81998 +                strcat(ascii," ");
81999 +            }
82000 +        }
82001 +        REL_PRINT(0,("%s    %s   %s\n", address, line, ascii));
82002 +        offset += 16;
82003 +    }
82004 +    REL_PRINT(0,
82005 +              ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
82006 +
82007 +}
82008 +
82009 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82010 +  @function: Get default operational current
82011 +
82012 +  @function name: SDLIB_GetDefaultOpCurrent
82013 +  @prototype: SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
82014 +  @category: PD_Reference
82015 +
82016 +  @input: pDevice - the device that is the target of the command.
82017 +
82018 +  @output: pOpCurrent - operational current in mA.
82019 +
82020 +  @return: SDIO_STATUS
82021 +
82022 +  @notes:  This routine reads the function's CISTPL_FUNCE tuple for the default operational
82023 +           current. For SDIO 1.0 devices this value is read from the 8-bit TPLFE_OP_MAX_PWR
82024 +           field.  For SDIO 1.1 devices, the HP MAX power field is used only if the device is
82025 +           operating in HIPWR mode. Otherwise the 8-bit TPLFE_OP_MAX_PWR field is used.
82026 +           Some systems may restrict high power/current mode and force cards to operate in a
82027 +           legacy (< 200mA) mode.  This function is fully synchronous and will block the caller.
82028 +
82029 +   @example: Getting the default operational current for this function:
82030 +            // get default operational current
82031 +       status = SDLIB_GetDefaultOpCurrent(pDevice, &slotCurrent);
82032 +       if (!SDIO_SUCCESS(status)) {
82033 +           .. failed
82034 +       }
82035 +
82036 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82037 +SDIO_STATUS _SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
82038 +{
82039 +    UINT32              nextTpl;
82040 +    UINT8               tplLength;
82041 +    struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
82042 +    SDIO_STATUS         status;
82043 +
82044 +      /* get the FUNCE tuple */
82045 +    nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
82046 +    tplLength = sizeof(funcTuple);
82047 +        /* go get the function Extension tuple */
82048 +    status = _SDLIB_FindTuple(pDevice,
82049 +                              CISTPL_FUNCE,
82050 +                              &nextTpl,
82051 +                              (PUINT8)&funcTuple,
82052 +                              &tplLength);
82053 +
82054 +    if (!SDIO_SUCCESS(status)) {
82055 +        DBG_PRINT(SDDBG_ERROR, ("SDLIB_GetDefaultOpCurrent: Failed to get FuncE Tuple: %d \n", status));
82056 +        return status;
82057 +    }
82058 +       /* use the operational power (8-bit) value of current in mA as default*/
82059 +    *pOpCurrent = funcTuple.CommonInfo.OpMaxPwr;
82060 +    if ((tplLength >= sizeof(funcTuple)) && (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice))) {
82061 +            /* we have a 1.1 tuple */
82062 +             /* check for HIPWR mode */
82063 +        if (SDDEVICE_GET_CARD_FLAGS(pDevice) & CARD_HIPWR) {
82064 +                /* use the maximum operational power (16 bit ) from the tuple */
82065 +            *pOpCurrent = CT_LE16_TO_CPU_ENDIAN(funcTuple.HiPwrMaxPwr);
82066 +        }
82067 +    }
82068 +    return SDIO_STATUS_SUCCESS;
82069 +}
82070 +
82071 +
82072 +static INLINE void FreeMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
82073 +    SDListInsertHead(&pQueue->FreeMessageList, &pMsg->SDList);
82074 +}
82075 +static INLINE void QueueMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
82076 +    SDListInsertTail(&pQueue->MessageList, &pMsg->SDList);
82077 +}
82078 +static INLINE void QueueMessageToHead(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
82079 +    SDListInsertHead(&pQueue->MessageList, &pMsg->SDList);
82080 +}
82081 +
82082 +static INLINE PSDMESSAGE_BLOCK GetFreeMessageBlock(PSDMESSAGE_QUEUE pQueue) {
82083 +    PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->FreeMessageList);
82084 +    if (pItem != NULL) {
82085 +        return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
82086 +    }
82087 +    return NULL;
82088 +}
82089 +static INLINE PSDMESSAGE_BLOCK GetQueuedMessage(PSDMESSAGE_QUEUE pQueue) {
82090 +    PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->MessageList);
82091 +    if (pItem != NULL) {
82092 +        return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
82093 +    }
82094 +    return NULL;
82095 +}
82096 +
82097 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82098 +  @function: Create a message queue
82099 +
82100 +  @function name: SDLIB_CreateMessageQueue
82101 +  @prototype: PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
82102 +  @category: Support_Reference
82103 +
82104 +  @input: MaxMessages - Maximum number of messages this queue supports
82105 +  @input: MaxMessageLength - Maximum size of each message
82106 +
82107 +  @return: Message queue object, NULL on failure
82108 +
82109 +  @notes:  This function creates a simple first-in-first-out message queue.  The caller must determine
82110 +           the maximum number of messages the queue supports and the size of each message.  This
82111 +           function will pre-allocate memory for each message. A producer of data posts a message
82112 +           using SDLIB_PostMessage with a user defined data structure. A consumer of this data
82113 +           can retrieve the message (in FIFO order) using SDLIB_GetMessage. A message queue does not
82114 +           provide a signaling mechanism for notifying a consumer of data. Notifying a consumer is
82115 +           user defined.
82116 +
82117 +  @see also: SDLIB_DeleteMessageQueue, SDLIB_GetMessage, SDLIB_PostMessage.
82118 +
82119 +  @example: Creating a message queue:
82120 +       typedef struct _MyMessage {
82121 +           UINT8 Code;
82122 +           PVOID pDataBuffer;
82123 +       } MyMessage;
82124 +            // create message queue, 16 messages max.
82125 +       pMsgQueue = SDLIB_CreateMessageQueue(16,sizeof(MyMessage));
82126 +       if (NULL == pMsgQueue) {
82127 +           .. failed
82128 +       }
82129 +
82130 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82131 +PSDMESSAGE_QUEUE _CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
82132 +{
82133 +    PSDMESSAGE_QUEUE pQueue = NULL;
82134 +    SDIO_STATUS      status = SDIO_STATUS_SUCCESS;
82135 +    INT              ii;
82136 +    PSDMESSAGE_BLOCK pMsg;
82137 +
82138 +    do {
82139 +        pQueue = (PSDMESSAGE_QUEUE)KernelAlloc(sizeof(SDMESSAGE_QUEUE));
82140 +
82141 +        if (NULL == pQueue) {
82142 +            status = SDIO_STATUS_NO_RESOURCES;
82143 +            break;
82144 +        }
82145 +        SDLIST_INIT(&pQueue->MessageList);
82146 +        SDLIST_INIT(&pQueue->FreeMessageList);
82147 +        pQueue->MaxMessageLength = MaxMessageLength;
82148 +        status = CriticalSectionInit(&pQueue->MessageCritSection);
82149 +        if (!SDIO_SUCCESS(status)) {
82150 +            break;
82151 +        }
82152 +            /* allocate message blocks */
82153 +        for (ii = 0; ii < MaxMessages; ii++) {
82154 +            pMsg = (PSDMESSAGE_BLOCK)KernelAlloc(sizeof(SDMESSAGE_BLOCK) + MaxMessageLength -1);
82155 +            if (NULL == pMsg) {
82156 +                break;
82157 +            }
82158 +            FreeMessageBlock(pQueue, pMsg);
82159 +        }
82160 +
82161 +        if (0 == ii) {
82162 +            status = SDIO_STATUS_NO_RESOURCES;
82163 +            break;
82164 +        }
82165 +
82166 +    } while (FALSE);
82167 +
82168 +    if (!SDIO_SUCCESS(status)) {
82169 +        if (pQueue != NULL) {
82170 +            _DeleteMessageQueue(pQueue);
82171 +            pQueue = NULL;
82172 +        }
82173 +    }
82174 +    return pQueue;
82175 +}
82176 +
82177 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82178 +  @function: Delete a message queue
82179 +
82180 +  @function name: SDLIB_DeleteMessageQueue
82181 +  @prototype: void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
82182 +  @category: Support_Reference
82183 +
82184 +  @input: pQueue - message queue to delete
82185 +
82186 +  @notes: This function flushes the message queue and frees all memory allocated for
82187 +          messages.
82188 +
82189 +  @see also: SDLIB_CreateMessageQueue
82190 +
82191 +  @example: Deleting a message queue:
82192 +       if (pMsgQueue != NULL) {
82193 +            SDLIB_DeleteMessageQueue(pMsgQueue);
82194 +       }
82195 +
82196 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82197 +void _DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
82198 +{
82199 +    PSDMESSAGE_BLOCK pMsg;
82200 +    SDIO_STATUS     status;
82201 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
82202 +
82203 +    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
82204 +
82205 +        /* cleanup free list */
82206 +    while (1) {
82207 +        pMsg = GetFreeMessageBlock(pQueue);
82208 +        if (pMsg != NULL) {
82209 +            KernelFree(pMsg);
82210 +        } else {
82211 +            break;
82212 +        }
82213 +    }
82214 +        /* cleanup any in the queue */
82215 +    while (1) {
82216 +        pMsg = GetQueuedMessage(pQueue);
82217 +        if (pMsg != NULL) {
82218 +            KernelFree(pMsg);
82219 +        } else {
82220 +            break;
82221 +        }
82222 +    }
82223 +
82224 +    status = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
82225 +    CriticalSectionDelete(&pQueue->MessageCritSection);
82226 +    KernelFree(pQueue);
82227 +
82228 +}
82229 +
82230 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82231 +  @function: Post a message queue
82232 +
82233 +  @function name: SDLIB_PostMessage
82234 +  @prototype: SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
82235 +  @category: Support_Reference
82236 +
82237 +  @input: pQueue - message queue to post to
82238 +  @input: pMessage - message to post
82239 +  @input: MessageLength - length of message (for validation)
82240 +
82241 +  @return: SDIO_STATUS
82242 +
82243 +  @notes: The message queue uses an internal list of user defined message structures.  When
82244 +          posting a message the message is copied into an allocated structure and queued.  The memory
82245 +          pointed to by pMessage does not need to be allocated and can reside on the stack.
82246 +          The length of the message to post can be smaller that the maximum message size. This allows
82247 +          for variable length messages up to the maximum message size. This
82248 +          function returns SDIO_STATUS_NO_RESOURCES, if the message queue is full.  This
82249 +          function returns SDIO_STATUS_BUFFER_TOO_SMALL, if the message size exceeds the maximum
82250 +          size of a message.  Posting and getting messsages from a message queue is safe in any
82251 +          driver context.
82252 +
82253 +  @see also: SDLIB_CreateMessageQueue , SDLIB_GetMessage
82254 +
82255 +  @example: Posting a message
82256 +       MyMessage message;
82257 +           // set up message
82258 +       message.code = MESSAGE_DATA_READY;
82259 +       message.pData = pInstance->pDataBuffers[currentIndex];
82260 +           // post message
82261 +       status = SDLIB_PostMessage(pInstance->pReadQueue,&message,sizeof(message));
82262 +       if (!SDIO_SUCCESS(status)) {
82263 +           // failed
82264 +       }
82265 +
82266 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82267 +SDIO_STATUS _PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
82268 +{
82269 +    SDIO_STATUS status2;
82270 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
82271 +    PSDMESSAGE_BLOCK pMsg;
82272 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
82273 +
82274 +    if (MessageLength > pQueue->MaxMessageLength) {
82275 +        return SDIO_STATUS_BUFFER_TOO_SMALL;
82276 +    }
82277 +
82278 +    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
82279 +    if (!SDIO_SUCCESS(status)) {
82280 +        return status;
82281 +    }
82282 +
82283 +    do {
82284 +            /* get a message block */
82285 +        pMsg = GetFreeMessageBlock(pQueue);
82286 +        if (NULL == pMsg) {
82287 +            status = SDIO_STATUS_NO_RESOURCES;
82288 +            break;
82289 +        }
82290 +            /* copy the message */
82291 +        memcpy(pMsg->MessageStart,pMessage,MessageLength);
82292 +            /* set the length of the message */
82293 +        pMsg->MessageLength = MessageLength;
82294 +            /* queue the message to the list  */
82295 +        QueueMessageBlock(pQueue,pMsg);
82296 +    } while (FALSE);
82297 +
82298 +    status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
82299 +    return status;
82300 +}
82301 +
82302 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82303 +  @function: Get a message from a message queue
82304 +
82305 +  @function name: SDLIB_GetMessage
82306 +  @prototype: SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
82307 +  @category: Support_Reference
82308 +
82309 +  @input: pQueue - message queue to retreive a message from
82310 +  @input: pBufferLength - on entry, the length of the data buffer
82311 +  @output: pData - buffer to hold the message
82312 +  @output: pBufferLength - on return, contains the number of bytes copied
82313 +
82314 +  @return: SDIO_STATUS
82315 +
82316 +  @notes: The message queue uses an internal list of user defined message structures.  The message is
82317 +          dequeued (FIFO order) and copied to the callers buffer.  The internal allocation for the message
82318 +          is returned back to the message queue. This function returns SDIO_STATUS_NO_MORE_MESSAGES
82319 +          if the message queue is empty. If the length of the buffer is smaller than the length of
82320 +          the message at the head of the queue,this function returns SDIO_STATUS_BUFFER_TOO_SMALL and
82321 +          returns the required length in pBufferLength.
82322 +
82323 +  @see also: SDLIB_CreateMessageQueue , SDLIB_PostMessage
82324 +
82325 +  @example: Getting a message
82326 +       MyMessage message;
82327 +       INT       length;
82328 +           // set length
82329 +       length = sizeof(message);
82330 +           // post message
82331 +       status = SDLIB_GetMessage(pInstance->pReadQueue,&message,&length);
82332 +       if (!SDIO_SUCCESS(status)) {
82333 +           // failed
82334 +       }
82335 +
82336 +  @example: Checking queue for a message and getting the size of the message
82337 +       INT       length;
82338 +           // use zero length to get the size of the message
82339 +       length = 0;
82340 +       status = SDLIB_GetMessage(pInstance->pReadQueue,NULL,&length);
82341 +       if (status == SDIO_STATUS_NO_MORE_MESSAGES) {
82342 +            // no messages in queue
82343 +       } else if (status == SDIO_STATUS_BUFFER_TOO_SMALL) {
82344 +            // message exists in queue and length of message is returned
82345 +            messageSizeInQueue = length;
82346 +       } else {
82347 +            // some other failure
82348 +       }
82349 +
82350 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82351 +SDIO_STATUS _GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
82352 +{
82353 +    SDIO_STATUS status2;
82354 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
82355 +    PSDMESSAGE_BLOCK pMsg;
82356 +    CT_DECLARE_IRQ_SYNC_CONTEXT();
82357 +
82358 +    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
82359 +    if (!SDIO_SUCCESS(status)) {
82360 +        return status;
82361 +    }
82362 +
82363 +    do {
82364 +        pMsg = GetQueuedMessage(pQueue);
82365 +        if (NULL == pMsg) {
82366 +            status = SDIO_STATUS_NO_MORE_MESSAGES;
82367 +            break;
82368 +        }
82369 +        if (*pBufferLength < pMsg->MessageLength) {
82370 +                /* caller buffer is too small */
82371 +            *pBufferLength = pMsg->MessageLength;
82372 +                /* stick it back to the front */
82373 +            QueueMessageToHead(pQueue, pMsg);
82374 +            status = SDIO_STATUS_BUFFER_TOO_SMALL;
82375 +            break;
82376 +        }
82377 +            /* copy the message to the callers buffer */
82378 +        memcpy(pData,pMsg->MessageStart,pMsg->MessageLength);
82379 +            /* return actual length */
82380 +        *pBufferLength = pMsg->MessageLength;
82381 +            /* return this message block back to the free list  */
82382 +        FreeMessageBlock(pQueue, pMsg);
82383 +
82384 +    } while (FALSE);
82385 +
82386 +    status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
82387 +
82388 +    return status;
82389 +}
82390 +
82391 +/* the following documents the OS helper APIs */
82392 +
82393 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82394 +  @function: Create an OS-specific helper task/thread
82395 +
82396 +  @function name: SDLIB_OSCreateHelper
82397 +  @prototype: SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
82398 +                                               PHELPER_FUNCTION pFunction,
82399 +                                               PVOID            pContext)
82400 +  @category: Support_Reference
82401 +
82402 +  @input: pHelper - caller allocated helper object
82403 +  @input: pFunction - helper function
82404 +  @input: pContext - helper context
82405 +
82406 +  @return: SDIO_STATUS
82407 +
82408 +  @notes: This function creates a helper task/thread that runs in a new execution context. The newly
82409 +          created task/thread invokes the helper function. The thread/task exits when the helper
82410 +          function returns.  The helper function has the prototype of:
82411 +          THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
82412 +          The helper function usually implements a while loop and suspends execution using
82413 +          SD_WAIT_FOR_WAKEUP().  On exit the helper function can return an OS-specific THREAD_RETURN
82414 +          code (usually zero). The helper function executes in a fully schedule-able context and
82415 +          can block on semaphores and sleep.
82416 +
82417 +  @see also: SDLIB_OSDeleteHelper , SD_WAIT_FOR_WAKEUP
82418 +
82419 +  @example: A thread helper function:
82420 +       THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
82421 +       {
82422 +           SDIO_STATUS status;
82423 +           PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
82424 +                // wait for wake up
82425 +           while(1) {
82426 +                  status = SD_WAIT_FOR_WAKEUP(pHelper);
82427 +                  if (!SDIO_SUCCESS(status)) {
82428 +                      break;
82429 +                  }
82430 +                  if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
82431 +                      //... shutting down
82432 +                      break;
82433 +                  }
82434 +                  // handle wakeup...
82435 +            }
82436 +            return 0;
82437 +       }
82438 +
82439 +  @example: Creating a helper:
82440 +       status = SDLIB_OSCreateHelper(&pInstance->OSHelper,HelperFunction,pInstance);
82441 +       if (!SDIO_SUCCESS(status)) {
82442 +           // failed
82443 +       }
82444 +
82445 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82446 +
82447 +/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82448 +  @function: Delete an OS helper task/thread
82449 +
82450 +  @function name: SDLIB_OSDeleteHelper
82451 +  @prototype: void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
82452 +  @category: Support_Reference
82453 +
82454 +  @input: pHelper - caller allocated helper object
82455 +
82456 +  @notes: This function wakes the helper and waits(blocks) until the helper exits. The caller can
82457 +          only pass an OS helper structure that was initialized sucessfully by
82458 +          SDLIB_OSCreateHelper.  The caller must be in a schedulable context.
82459 +
82460 +  @see also: SDLIB_OSCreateHelper
82461 +
82462 +  @example: Deleting a helper:
82463 +       if (pInstance->HelperCreated) {
82464 +               // clean up the helper if we successfully created it
82465 +           SDLIB_OSDeleteHelper(&pInstance->OSHelper);
82466 +       }
82467 +
82468 +
82469 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82470 +
82471 +
82472 Index: linux-2.6.24.7/drivers/sdio/stack/lib/_sdio_lib.h
82473 ===================================================================
82474 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
82475 +++ linux-2.6.24.7/drivers/sdio/stack/lib/_sdio_lib.h   2008-12-11 22:46:49.000000000 +0100
82476 @@ -0,0 +1,50 @@
82477 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82478 +@file: _sdio_lib.h
82479 +
82480 +@abstract: SDIO Lib internal include
82481 +
82482 +#notes:
82483 +
82484 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
82485 +
82486 +
82487 + *
82488 + *  This program is free software; you can redistribute it and/or modify
82489 + *  it under the terms of the GNU General Public License version 2 as
82490 + *  published by the Free Software Foundation;
82491 + *
82492 + *  Software distributed under the License is distributed on an "AS
82493 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
82494 + *  implied. See the License for the specific language governing
82495 + *  rights and limitations under the License.
82496 + *
82497 + *  Portions of this code were developed with information supplied from the
82498 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
82499 + *
82500 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
82501 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
82502 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
82503 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
82504 + *   Specification may require a license from the SD Card Association or other third parties.
82505 + *   Disclaimers:
82506 + *   The information contained in the Simplified Specification is presented only as a standard
82507 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
82508 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
82509 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
82510 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
82511 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
82512 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
82513 + *   information, know-how or other confidential information to any third party.
82514 + *
82515 + *
82516 + *  The initial developers of the original code are Seung Yi and Paul Lever
82517 + *
82518 + *  sdio@atheros.com
82519 + *
82520 + *
82521 +
82522 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82523 +#ifndef ___SDIO_LIB_H___
82524 +#define ___SDIO_LIB_H___
82525 +
82526 +#endif /* ___SDIO_LIB_H___*/
82527 Index: linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_os.c
82528 ===================================================================
82529 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
82530 +++ linux-2.6.24.7/drivers/sdio/stack/lib/sdio_lib_os.c 2008-12-11 22:46:49.000000000 +0100
82531 @@ -0,0 +1,251 @@
82532 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82533 +@file: sdio_function_os.c
82534 +
82535 +@abstract: Linux implementation module for SDIO library
82536 +
82537 +#notes: includes module load and unload functions
82538 +
82539 +@notice: Copyright (c), 2004 Atheros Communications, Inc.
82540 +
82541 +
82542 + *
82543 + *  This program is free software; you can redistribute it and/or modify
82544 + *  it under the terms of the GNU General Public License version 2 as
82545 + *  published by the Free Software Foundation;
82546 + *
82547 + *  Software distributed under the License is distributed on an "AS
82548 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
82549 + *  implied. See the License for the specific language governing
82550 + *  rights and limitations under the License.
82551 + *
82552 + *  Portions of this code were developed with information supplied from the
82553 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
82554 + *
82555 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
82556 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
82557 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
82558 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
82559 + *   Specification may require a license from the SD Card Association or other third parties.
82560 + *   Disclaimers:
82561 + *   The information contained in the Simplified Specification is presented only as a standard
82562 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
82563 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
82564 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
82565 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
82566 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
82567 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
82568 + *   information, know-how or other confidential information to any third party.
82569 + *
82570 + *
82571 + *  The initial developers of the original code are Seung Yi and Paul Lever
82572 + *
82573 + *  sdio@atheros.com
82574 + *
82575 + *
82576 +
82577 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82578 +/* debug level for this module*/
82579 +#define DBG_DECLARE 4;
82580 +#include <linux/sdio/ctsystem.h>
82581 +
82582 +#include <linux/module.h>
82583 +#include <linux/init.h>
82584 +#include <linux/kthread.h>
82585 +
82586 +#include <linux/sdio/sdio_busdriver.h>
82587 +#include <linux/sdio/sdio_lib.h>
82588 +#include "_sdio_lib.h"
82589 +
82590 +#define DESCRIPTION "SDIO Kernel Library"
82591 +#define AUTHOR "Atheros Communications, Inc."
82592 +
82593 +/* proxies */
82594 +SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE     pDevice,
82595 +                            UINT8         FuncNo,
82596 +                            UINT32        Address,
82597 +                            PUINT8        pData,
82598 +                            INT           ByteCount,
82599 +                            BOOL          Write)
82600 +{
82601 +    return _SDLIB_IssueCMD52(pDevice,FuncNo,Address,pData,ByteCount,Write);
82602 +}
82603 +
82604 +SDIO_STATUS SDLIB_FindTuple(PSDDEVICE  pDevice,
82605 +                         UINT8      Tuple,
82606 +                         UINT32     *pTupleScanAddress,
82607 +                         PUINT8     pBuffer,
82608 +                         UINT8      *pLength)
82609 +{
82610 +    return _SDLIB_FindTuple(pDevice,Tuple,pTupleScanAddress,pBuffer,pLength);
82611 +}
82612 +
82613 +SDIO_STATUS SDLIB_IssueConfig(PSDDEVICE        pDevice,
82614 +                              SDCONFIG_COMMAND Command,
82615 +                              PVOID            pData,
82616 +                              INT              Length)
82617 +{
82618 +    return _SDLIB_IssueConfig(pDevice,Command,pData,Length);
82619 +}
82620 +
82621 +void SDLIB_PrintBuffer(PUCHAR pBuffer,INT Length,PTEXT pDescription)
82622 +{
82623 +    _SDLIB_PrintBuffer(pBuffer,Length,pDescription);
82624 +}
82625 +
82626 +SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
82627 +                                       UINT16           BlockSize)
82628 +{
82629 +    return _SDLIB_SetFunctionBlockSize(pDevice,BlockSize);
82630 +}
82631 +
82632 +void SDLIB_SetupCMD52Request(UINT8         FuncNo,
82633 +                             UINT32        Address,
82634 +                             BOOL          Write,
82635 +                             UINT8         WriteData,
82636 +                             PSDREQUEST    pRequest)
82637 +{
82638 +    _SDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
82639 +}
82640 +
82641 +SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
82642 +{
82643 +    return _SDLIB_GetDefaultOpCurrent(pDevice,pOpCurrent);
82644 +}
82645 +
82646 +/* helper function launcher */
82647 +INT HelperLaunch(PVOID pContext)
82648 +{
82649 +    INT exit;
82650 +        /* call function */
82651 +    exit = ((POSKERNEL_HELPER)pContext)->pHelperFunc((POSKERNEL_HELPER)pContext);
82652 +    complete_and_exit(&((POSKERNEL_HELPER)pContext)->Completion, exit);
82653 +    return exit;
82654 +}
82655 +
82656 +/*
82657 + * OSCreateHelper - create a worker kernel thread
82658 +*/
82659 +SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
82660 +                           PHELPER_FUNCTION pFunction,
82661 +                           PVOID            pContext)
82662 +{
82663 +    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
82664 +
82665 +    memset(pHelper,0,sizeof(OSKERNEL_HELPER));
82666 +
82667 +    do {
82668 +        pHelper->pContext = pContext;
82669 +        pHelper->pHelperFunc = pFunction;
82670 +        status = SignalInitialize(&pHelper->WakeSignal);
82671 +        if (!SDIO_SUCCESS(status)) {
82672 +            break;
82673 +        }
82674 +        init_completion(&pHelper->Completion);
82675 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
82676 +        pHelper->pTask = kthread_create(HelperLaunch,
82677 +                                       (PVOID)pHelper,
82678 +                                       "SDIO Helper");
82679 +        if (NULL == pHelper->pTask) {
82680 +            status = SDIO_STATUS_NO_RESOURCES;
82681 +            break;
82682 +        }
82683 +        wake_up_process(pHelper->pTask);
82684 +#else
82685 +    /* 2.4 */
82686 +        pHelper->pTask = kernel_thread(HelperLaunch,
82687 +                                       (PVOID)pHelper,
82688 +                                       (CLONE_FS | CLONE_FILES | SIGCHLD));
82689 +        if (pHelper->pTask < 0) {
82690 +            DBG_PRINT(SDDBG_TRACE,
82691 +                ("SDIO BusDriver - OSCreateHelper, failed to create thread\n"));
82692 +        }
82693 +#endif
82694 +
82695 +    } while (FALSE);
82696 +
82697 +    if (!SDIO_SUCCESS(status)) {
82698 +        SDLIB_OSDeleteHelper(pHelper);
82699 +    }
82700 +    return status;
82701 +}
82702 +
82703 +/*
82704 + * OSDeleteHelper - delete thread created with OSCreateHelper
82705 +*/
82706 +void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
82707 +{
82708 +
82709 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
82710 +    if (pHelper->pTask != NULL) {
82711 +#else
82712 +    /* 2.4 */
82713 +    if (pHelper->pTask >= 0) {
82714 +#endif
82715 +        pHelper->ShutDown = TRUE;
82716 +        SignalSet(&pHelper->WakeSignal);
82717 +            /* wait for thread to exit */
82718 +        wait_for_completion(&pHelper->Completion);
82719 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
82720 +        pHelper->pTask = NULL;
82721 +#else
82722 +    /* 2.4 */
82723 +        pHelper->pTask = 0;
82724 +#endif
82725 +    }
82726 +
82727 +    SignalDelete(&pHelper->WakeSignal);
82728 +}
82729 +
82730 +/*
82731 + * module init
82732 +*/
82733 +static int __init sdio_lib_init(void) {
82734 +    REL_PRINT(SDDBG_TRACE, ("SDIO Library load\n"));
82735 +    return 0;
82736 +}
82737 +
82738 +/*
82739 + * module cleanup
82740 +*/
82741 +static void __exit sdio_lib_cleanup(void) {
82742 +    REL_PRINT(SDDBG_TRACE, ("SDIO Library unload\n"));
82743 +}
82744 +
82745 +PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
82746 +{
82747 +    return _CreateMessageQueue(MaxMessages,MaxMessageLength);
82748 +
82749 +}
82750 +void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
82751 +{
82752 +    _DeleteMessageQueue(pQueue);
82753 +}
82754 +
82755 +SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
82756 +{
82757 +    return _PostMessage(pQueue,pMessage,MessageLength);
82758 +}
82759 +
82760 +SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
82761 +{
82762 +    return _GetMessage(pQueue,pData,pBufferLength);
82763 +}
82764 +
82765 +MODULE_LICENSE("GPL and additional rights");
82766 +MODULE_DESCRIPTION(DESCRIPTION);
82767 +MODULE_AUTHOR(AUTHOR);
82768 +module_init(sdio_lib_init);
82769 +module_exit(sdio_lib_cleanup);
82770 +EXPORT_SYMBOL(SDLIB_IssueCMD52);
82771 +EXPORT_SYMBOL(SDLIB_FindTuple);
82772 +EXPORT_SYMBOL(SDLIB_IssueConfig);
82773 +EXPORT_SYMBOL(SDLIB_PrintBuffer);
82774 +EXPORT_SYMBOL(SDLIB_SetFunctionBlockSize);
82775 +EXPORT_SYMBOL(SDLIB_SetupCMD52Request);
82776 +EXPORT_SYMBOL(SDLIB_GetDefaultOpCurrent);
82777 +EXPORT_SYMBOL(SDLIB_OSCreateHelper);
82778 +EXPORT_SYMBOL(SDLIB_OSDeleteHelper);
82779 +EXPORT_SYMBOL(SDLIB_CreateMessageQueue);
82780 +EXPORT_SYMBOL(SDLIB_DeleteMessageQueue);
82781 +EXPORT_SYMBOL(SDLIB_PostMessage);
82782 +EXPORT_SYMBOL(SDLIB_GetMessage);
82783 Index: linux-2.6.24.7/drivers/sdio/stack/Makefile
82784 ===================================================================
82785 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
82786 +++ linux-2.6.24.7/drivers/sdio/stack/Makefile  2008-12-11 22:46:49.000000000 +0100
82787 @@ -0,0 +1 @@
82788 +obj-$(CONFIG_SDIO)      += busdriver/ lib/
82789 \ No newline at end of file
82790 Index: linux-2.6.24.7/drivers/sdio/stack/platform/Makefile
82791 ===================================================================
82792 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
82793 +++ linux-2.6.24.7/drivers/sdio/stack/platform/Makefile 2008-12-11 22:46:49.000000000 +0100
82794 @@ -0,0 +1,2 @@
82795 +obj-$(CONFIG_SDIO) += sdio_platform.o
82796 +sdio_platform-objs := sdioplatformdriver.o
82797 \ No newline at end of file
82798 Index: linux-2.6.24.7/drivers/sdio/stack/platform/sdioplatformdriver.c
82799 ===================================================================
82800 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
82801 +++ linux-2.6.24.7/drivers/sdio/stack/platform/sdioplatformdriver.c     2008-12-11 22:46:49.000000000 +0100
82802 @@ -0,0 +1,300 @@
82803 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
82804 +@file: sdioplatformdriver.c
82805 +
82806 +@abstract: Linux implementation module for SDIO pltaform driver
82807 +
82808 +#notes:
82809 +
82810 +@notice: Copyright (c), 2006 Atheros Communications, Inc.
82811 +
82812 +@license:  This program is free software; you can redistribute it and/or modify
82813 +           it under the terms of the GNU General Public License version 2 as
82814 +           published by the Free Software Foundation.
82815 +
82816 +
82817 +
82818 + *
82819 + *  This program is free software; you can redistribute it and/or modify
82820 + *  it under the terms of the GNU General Public License version 2 as
82821 + *  published by the Free Software Foundation;
82822 + *
82823 + *  Software distributed under the License is distributed on an "AS
82824 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
82825 + *  implied. See the License for the specific language governing
82826 + *  rights and limitations under the License.
82827 + *
82828 + *  Portions of this code were developed with information supplied from the
82829 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
82830 + *
82831 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
82832 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
82833 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
82834 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
82835 + *   Specification may require a license from the SD Card Association or other third parties.
82836 + *   Disclaimers:
82837 + *   The information contained in the Simplified Specification is presented only as a standard
82838 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
82839 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
82840 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
82841 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
82842 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
82843 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
82844 + *   information, know-how or other confidential information to any third party.
82845 + *
82846 + *
82847 + *  The initial developers of the original code are Seung Yi and Paul Lever
82848 + *
82849 + *  sdio@atheros.com
82850 + *
82851 + *
82852 +
82853 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
82854 +
82855 +#define DESCRIPTION "SDIO Platform Driver"
82856 +#define AUTHOR "Atheros Communications, Inc."
82857 +
82858 +//??for .h
82859 +
82860 +struct sdioplatform_peripheral {
82861 +    struct list_head    node;
82862 +    struct sdioplatform_controller *controller;
82863 +    struct device       dev;
82864 +};
82865 +struct sdioplatform_driver {
82866 +    struct device_driver drv;
82867 +    int (*probe)(struct sdioplatform_peripheral *);
82868 +    void (*remove)(struct sdioplatform_peripheral *);
82869 +    int (*suspend)(struct sdioplatform_peripheral *, pm_message_t);
82870 +    int (*resume)(struct sdioplatform_peripheral *);
82871 +};
82872 +
82873 +
82874 +struct sdioplatform_controller {
82875 +    struct device       *dev;
82876 +};
82877 +struct sdioplatform_controller_driver {
82878 +    struct device_driver drv;
82879 +    int (*probe)(struct sdioplatform_controller *);
82880 +    void (*remove)(struct sdioplatform_controller *);
82881 +    int (*suspend)(struct sdioplatform_controller *, pm_message_t);
82882 +    int (*resume)(struct sdioplatform_controller *);
82883 +};
82884 +
82885 +
82886 +
82887 +#define device_to_sdioplatform_peripheral(d)  container_of(d, struct sdioplatform_peripheral, dev)
82888 +#define driver_to_sdioplatform_driver(d)  container_of(d, struct sdioplatform_driver, drv)
82889 +
82890 +#define device_to_sdioplatform_controller(d)  container_of(d, struct sdioplatform_controller, dev)
82891 +#define driver_to_sdioplatform_controller_driver(d)  container_of(d, struct sdioplatform_controller_driver, drv)
82892 +
82893 +#define SDIOPLATFORM_ATTR(name, fmt, args...)                    \
82894 +static ssize_t sdio_##name##_show (struct device *dev, struct device_attribute *attr, char *buf) \
82895 +{                                   \
82896 +    struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);  \
82897 +    return sprintf(buf, fmt, args);                 \
82898 +}
82899 +
82900 +SDIOPLATFORM_ATTR(bus_id, "%s\n", bus_id);
82901 +#define SDIOPLATFORM_ATTR_RO(name) __ATTR(name, S_IRUGO, sdioplatform_##name##_show, NULL)
82902 +
82903 +static struct device_attribute sdioplatform_dev_attrs[] = {
82904 +    SDIOPLATFORM_ATTR_RO(bus_id),
82905 +    __ATTR_NULL
82906 +};
82907 +
82908 +static struct bus_type sdioplatform_bus_type = {
82909 +    .name       = "sdioplatform",
82910 +    .dev_attrs  = sdioplatform_dev_attrs,
82911 +    .match      = sdioplatform_bus_match,
82912 +    .hotplug    = NULL,
82913 +    .suspend    = sdioplatform_bus_suspend,
82914 +    .resume     = sdioplatform_bus_resume,
82915 +};
82916 +
82917 +
82918 +/* controller functions */
82919 +static int sdioplatform_controllerdrv_probe(struct device *dev)
82920 +{
82921 +    struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
82922 +    struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
82923 +
82924 +    return drv->probe(controller);
82925 +}
82926 +
82927 +static int sdioplatform_controllerdrv_remove(struct device *dev)
82928 +{
82929 +    struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
82930 +    struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
82931 +
82932 +    return drv->remove(controller);
82933 +}
82934 +
82935 +/*
82936 + * sdioplatform_register_controller_driver - register a controller driver
82937 + */
82938 +int sdioplatform_register_controller_driver(struct sdioplatform_controller_driver *drv)
82939 +{
82940 +    drv->drv.bus = &sdioplatform_bus_type;
82941 +    drv->drv.probe = sdioplatform_controllerdrv_probe;
82942 +    drv->drv.remove = sdioplatform_controllerdrv_remove;
82943 +    return driver_register(&drv->drv);
82944 +}
82945 +
82946 +/*
82947 + *  sdioplatform_unregister_controller_driver - unregister a controller driver
82948 + */
82949 +void sdioplatform_unregister_controller_driver(struct sdioplatform_driver *drv)
82950 +{
82951 +    driver_unregister(&drv->drv);
82952 +}
82953 +
82954 +/*
82955 + * sdioplatform_add_controller - register a controller device
82956 + */
82957 +int sdioplatform_add_controller(char *name, struct sdioplatform_controller *dev)
82958 +{
82959 +    if (!dev) {
82960 +        return -EINVAL;
82961 +    }
82962 +    strncpy(dev->dev.bus_id, BUS_ID_SIZE, name);
82963 +    return device_register(&dev->dev);
82964 +}
82965 +
82966 +/*
82967 + * sdioplatform_remove_controller - unregister a controller device
82968 + */
82969 +int sdioplatform_remove_controller(char *name, struct sdioplatform_controller *dev)
82970 +{
82971 +    if (!dev) {
82972 +        return -EINVAL;
82973 +    }
82974 +    return device_unregister(&dev->dev);
82975 +}
82976 +
82977 +/* peripheral functions */
82978 +static int sdioplatform_drv_probe(struct device *dev)
82979 +{
82980 +    struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
82981 +    struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
82982 +
82983 +    return drv->probe(peripheral);
82984 +}
82985 +
82986 +static int sdioplatform_controllerdrv_remove(struct device *dev)
82987 +{
82988 +    struct sdioplatform_controller_driver *drv = driver_to_sdioplatform_controller_driver(dev->driver);
82989 +    struct sdioplatform_controller *controller = device_to_sdioplatform_controller(dev);
82990 +
82991 +    return drv->remove(controller);
82992 +}
82993 +
82994 +/*
82995 + * sdioplatform_register_driver - register a driver
82996 + */
82997 +int sdioplatform_register_driver(struct sdioplatform_driver *drv)
82998 +{
82999 +    drv->drv.bus = &sdioplatform_bus_type;
83000 +    drv->drv.probe = sdioplatform_drv_probe;
83001 +    drv->drv.remove = sdioplatform_drv_remove;
83002 +    return driver_register(&drv->drv);
83003 +}
83004 +
83005 +/*
83006 + *  sdioplatform_unregister_driver - unregister a driver
83007 + */
83008 +void sdioplatform_unregister_driver(struct sdioplatform_driver *drv)
83009 +{
83010 +    driver_unregister(&drv->drv);
83011 +}
83012 +
83013 +/*
83014 + * sdioplatform_add_peripheral - register a peripheral device
83015 + */
83016 +int sdioplatform_add_peripheral(char *name, struct sdioplatform_peripheral *dev)
83017 +{
83018 +    if (!dev) {
83019 +        return -EINVAL;
83020 +    }
83021 +    strncpy(dev->dev.bus_id, BUS_ID_SIZE, name);
83022 +    return device_register(&dev->dev);
83023 +}
83024 +
83025 +/*
83026 + * sdioplatform_remove_peripheral - unregister a peripheral device
83027 + */
83028 +int sdioplatform_remove_peripheral(char *name, struct sdioplatform_peripheral *dev)
83029 +{
83030 +    if (!dev) {
83031 +        return -EINVAL;
83032 +    }
83033 +    return device_unregister(&dev->dev);
83034 +}
83035 +
83036 +
83037 +
83038 +
83039 +
83040 +static int sdioplatform_bus_match(struct device *dev, struct device_driver *drv)
83041 +{
83042 +    /* probes handle the matching */
83043 +    return 1;
83044 +}
83045 +
83046 +static int sdioplatform_bus_suspend(struct device *dev, pm_message_t state)
83047 +{
83048 +    struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
83049 +    struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
83050 +    int ret = 0;
83051 +
83052 +    if (peripheral->driver && drv->suspend) {
83053 +        ret = drv->suspend(peripheral, state);
83054 +    }
83055 +    return ret;
83056 +}
83057 +
83058 +static int sdioplatform_bus_resume(struct device *dev)
83059 +{
83060 +    struct sdioplatform_driver *drv = driver_to_sdioplatform_driver(dev->driver);
83061 +    struct sdioplatform_peripheral *peripheral = device_to_sdioplatform_peripheral(dev);
83062 +    int ret = 0;
83063 +
83064 +    if (peripheral->driver && drv->resume) {
83065 +        ret = drv->resume(card);
83066 +    }
83067 +    return ret;
83068 +}
83069 +
83070 +/*
83071 + * module init
83072 +*/
83073 +static int __init sdio_platformdriver_init(void) {
83074 +    int ret = bus_register(&sdioplatform_bus_type);
83075 +    return ret;
83076 +}
83077 +
83078 +/*
83079 + * module cleanup
83080 +*/
83081 +static void __exit sdio_platformdriver_cleanup(void) {
83082 +    REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
83083 +    _SDIO_BusDriverCleanup();
83084 +}
83085 +
83086 +MODULE_LICENSE("GPL");
83087 +MODULE_DESCRIPTION(DESCRIPTION);
83088 +MODULE_AUTHOR(AUTHOR);
83089 +
83090 +module_init(sdio_platformdriver_init);
83091 +module_exit(sdio_platformdriver_cleanup);
83092 +EXPORT_SYMBOL(sdioplatform_register_controller_driver);
83093 +EXPORT_SYMBOL(sdioplatform_unregister_controller_driver);
83094 +EXPORT_SYMBOL(sdioplatform_add_controller);
83095 +EXPORT_SYMBOL(sdioplatform_remove_controller);
83096 +EXPORT_SYMBOL(sdioplatform_register_driver);
83097 +EXPORT_SYMBOL(sdioplatform_unregister_driver);
83098 +EXPORT_SYMBOL(sdioplatform_add_peripheral);
83099 +EXPORT_SYMBOL(sdioplatform_remove_peripheral);
83100 +
83101 +
83102 +
83103 Index: linux-2.6.24.7/drivers/serial/s3c2410.c
83104 ===================================================================
83105 --- linux-2.6.24.7.orig/drivers/serial/s3c2410.c        2008-12-11 22:46:07.000000000 +0100
83106 +++ linux-2.6.24.7/drivers/serial/s3c2410.c     2008-12-11 22:46:49.000000000 +0100
83107 @@ -72,6 +72,7 @@
83108  #include <linux/serial.h>
83109  #include <linux/delay.h>
83110  #include <linux/clk.h>
83111 +#include <linux/resume-dependency.h>
83112
83113  #include <asm/io.h>
83114  #include <asm/irq.h>
83115 @@ -80,6 +81,7 @@
83116
83117  #include <asm/plat-s3c/regs-serial.h>
83118  #include <asm/arch/regs-gpio.h>
83119 +#include <asm/arch/regs-clock.h>
83120
83121  /* structures */
83122
83123 @@ -112,6 +114,9 @@ struct s3c24xx_uart_port {
83124         struct clk                      *clk;
83125         struct clk                      *baudclk;
83126         struct uart_port                port;
83127 +
83128 +       struct resume_dependency        resume_dependency;
83129 +       int                             is_suspended;
83130  };
83131
83132
83133 @@ -353,7 +358,7 @@ s3c24xx_serial_rx_chars(int irq, void *d
83134                 port->icount.rx++;
83135
83136                 if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) {
83137 -                       dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
83138 +                       printk(KERN_DEBUG "rxerr: port ch=0x%02x, rxs=0x%08x\n",
83139                             ch, uerstat);
83140
83141                         /* check for break */
83142 @@ -382,7 +387,8 @@ s3c24xx_serial_rx_chars(int irq, void *d
83143                 if (uart_handle_sysrq_char(port, ch))
83144                         goto ignore_char;
83145
83146 -               uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag);
83147 +               uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch,
83148 +                                                                         flag);
83149
83150         ignore_char:
83151                 continue;
83152 @@ -708,10 +714,6 @@ static unsigned int s3c24xx_serial_getcl
83153                 int calc_deviation;
83154
83155                 for (sptr = res; sptr < resptr; sptr++) {
83156 -                       printk(KERN_DEBUG
83157 -                              "found clk %p (%s) quot %d, calc %d\n",
83158 -                              sptr->clksrc, sptr->clksrc->name,
83159 -                              sptr->quot, sptr->calc);
83160
83161                         calc_deviation = baud - sptr->calc;
83162                         if (calc_deviation < 0)
83163 @@ -723,12 +725,8 @@ static unsigned int s3c24xx_serial_getcl
83164                         }
83165                 }
83166
83167 -               printk(KERN_DEBUG "best %p (deviation %d)\n", best, deviation);
83168         }
83169
83170 -       printk(KERN_DEBUG "selected clock %p (%s) quot %d, calc %d\n",
83171 -              best->clksrc, best->clksrc->name, best->quot, best->calc);
83172 -
83173         /* store results to pass back */
83174
83175         *clksrc = best->clksrc;
83176 @@ -996,6 +994,69 @@ static struct s3c24xx_uart_port s3c24xx_
83177  #endif
83178  };
83179
83180 +static void s3c24xx_serial_force_debug_port_up(void)
83181 +{
83182 +       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
83183 +                                                        CONFIG_DEBUG_S3C_UART];
83184 +       struct s3c24xx_uart_clksrc *clksrc = NULL;
83185 +       struct clk *clk = NULL;
83186 +       unsigned long tmp;
83187 +
83188 +       s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
83189 +
83190 +       tmp = __raw_readl(S3C2410_CLKCON);
83191 +
83192 +       /* re-start uart clocks */
83193 +       tmp |= S3C2410_CLKCON_UART0;
83194 +       tmp |= S3C2410_CLKCON_UART1;
83195 +       tmp |= S3C2410_CLKCON_UART2;
83196 +
83197 +       __raw_writel(tmp, S3C2410_CLKCON);
83198 +       udelay(10);
83199 +
83200 +       s3c24xx_serial_setsource(&ourport->port, clksrc);
83201 +
83202 +       if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
83203 +               clk_disable(ourport->baudclk);
83204 +               ourport->baudclk  = NULL;
83205 +       }
83206 +
83207 +       clk_enable(clk);
83208 +
83209 +       ourport->clksrc = clksrc;
83210 +       ourport->baudclk = clk;
83211 +}
83212 +
83213 +static void s3c2410_printascii(const char *sz)
83214 +{
83215 +       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
83216 +                                                        CONFIG_DEBUG_S3C_UART];
83217 +       struct uart_port *port = &ourport->port;
83218 +
83219 +       /* 8 N 1 */
83220 +       wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
83221 +       /* polling mode */
83222 +       wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
83223 +       /* disable FIFO */
83224 +       wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
83225 +       /* fix baud rate */
83226 +       wr_regl(port, S3C2410_UBRDIV, 26);
83227 +
83228 +       while (*sz) {
83229 +               int timeout = 10000000;
83230 +
83231 +               /* spin on it being busy */
83232 +               while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
83233 +                       ;
83234 +
83235 +               /* transmit register */
83236 +               wr_regl(port, S3C2410_UTXH, *sz);
83237 +
83238 +               sz++;
83239 +       }
83240 +}
83241 +
83242 +
83243  /* s3c24xx_serial_resetport
83244   *
83245   * wrapper to call the specific reset for this port (reset the fifos
83246 @@ -1093,6 +1154,8 @@ static int s3c24xx_serial_probe(struct p
83247         ourport = &s3c24xx_serial_ports[probe_index];
83248         probe_index++;
83249
83250 +       init_resume_dependency_list(&ourport->resume_dependency);
83251 +
83252         dbg("%s: initialising port %p...\n", __FUNCTION__, ourport);
83253
83254         ret = s3c24xx_serial_init_port(ourport, info, dev);
83255 @@ -1126,13 +1189,28 @@ static int s3c24xx_serial_remove(struct
83256  static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
83257  {
83258         struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
83259 +       struct s3c24xx_uart_port *ourport = to_ourport(port);
83260
83261         if (port)
83262                 uart_suspend_port(&s3c24xx_uart_drv, port);
83263
83264 +       activate_all_resume_dependencies(&ourport->resume_dependency);
83265 +       ourport->is_suspended = 1;
83266         return 0;
83267  }
83268
83269 +void s3c24xx_serial_register_resume_dependency(struct resume_dependency *
83270 +                                             resume_dependency, int uart_index)
83271 +{
83272 +       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[uart_index];
83273 +
83274 +       register_resume_dependency(&ourport->resume_dependency,
83275 +                                                            resume_dependency);
83276 +       if (ourport->is_suspended)
83277 +               activate_all_resume_dependencies(&ourport->resume_dependency);
83278 +}
83279 +EXPORT_SYMBOL(s3c24xx_serial_register_resume_dependency);
83280 +
83281  static int s3c24xx_serial_resume(struct platform_device *dev)
83282  {
83283         struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
83284 @@ -1146,6 +1224,9 @@ static int s3c24xx_serial_resume(struct
83285                 uart_resume_port(&s3c24xx_uart_drv, port);
83286         }
83287
83288 +       ourport->is_suspended = 0;
83289 +       callback_all_resume_dependencies(&ourport->resume_dependency);
83290 +
83291         return 0;
83292  }
83293
83294 @@ -1157,6 +1238,11 @@ static int s3c24xx_serial_resume(struct
83295  static int s3c24xx_serial_init(struct platform_driver *drv,
83296                                struct s3c24xx_uart_info *info)
83297  {
83298 +       /* set up the emergency debug UART functions */
83299 +
83300 +       printk_emergency_debug_spew_init = s3c24xx_serial_force_debug_port_up;
83301 +       printk_emergency_debug_spew_send_string = s3c2410_printascii;
83302 +
83303         dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
83304         return platform_driver_register(drv);
83305  }
83306 @@ -1701,6 +1787,13 @@ module_exit(s3c24xx_serial_modexit);
83307  #ifdef CONFIG_SERIAL_S3C2410_CONSOLE
83308
83309  static struct uart_port *cons_uart;
83310 +static int cons_silenced;
83311 +
83312 +void s3c24xx_serial_console_set_silence(int silenced)
83313 +{
83314 +       cons_silenced = silenced;
83315 +}
83316 +EXPORT_SYMBOL(s3c24xx_serial_console_set_silence);
83317
83318  static int
83319  s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
83320 @@ -1725,9 +1818,21 @@ static void
83321  s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
83322  {
83323         unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
83324 +       unsigned int umcon = rd_regl(cons_uart, S3C2410_UMCON);
83325 +
83326 +       if (cons_silenced)
83327 +               return;
83328 +
83329 +       /* If auto HW flow control enabled, temporarily turn it off */
83330 +       if (umcon & S3C2410_UMCOM_AFC)
83331 +               wr_regl(port, S3C2410_UMCON, (umcon & !S3C2410_UMCOM_AFC));
83332 +
83333         while (!s3c24xx_serial_console_txrdy(port, ufcon))
83334                 barrier();
83335         wr_regb(cons_uart, S3C2410_UTXH, ch);
83336 +
83337 +       if (umcon & S3C2410_UMCOM_AFC)
83338 +               wr_regl(port, S3C2410_UMCON, umcon);
83339  }
83340
83341  static void
83342 Index: linux-2.6.24.7/drivers/spi/spi_s3c24xx_gpio.c
83343 ===================================================================
83344 --- linux-2.6.24.7.orig/drivers/spi/spi_s3c24xx_gpio.c  2008-12-11 22:46:07.000000000 +0100
83345 +++ linux-2.6.24.7/drivers/spi/spi_s3c24xx_gpio.c       2008-12-11 22:46:49.000000000 +0100
83346 @@ -91,7 +91,7 @@ static void s3c2410_spigpio_chipselect(s
83347         struct s3c2410_spigpio *sg = spidev_to_sg(dev);
83348
83349         if (sg->info && sg->info->chip_select)
83350 -               (sg->info->chip_select)(sg->info, value);
83351 +               (sg->info->chip_select)(sg->info, dev->chip_select, value);
83352  }
83353
83354  static int s3c2410_spigpio_probe(struct platform_device *dev)
83355 @@ -113,9 +113,11 @@ static int s3c2410_spigpio_probe(struct
83356
83357         platform_set_drvdata(dev, sp);
83358
83359 -       /* copy in the plkatform data */
83360 +       /* copy in the platform data */
83361         info = sp->info = dev->dev.platform_data;
83362
83363 +       master->num_chipselect = info->num_chipselect;
83364 +
83365         /* setup spi bitbang adaptor */
83366         sp->bitbang.master = spi_master_get(master);
83367         sp->bitbang.master->bus_num = info->bus_num;
83368 @@ -146,12 +148,17 @@ static int s3c2410_spigpio_probe(struct
83369         /* register the chips to go with the board */
83370
83371         for (i = 0; i < sp->info->board_size; i++) {
83372 +               struct spi_device *spidev;
83373 +
83374                 dev_info(&dev->dev, "registering %p: %s\n",
83375                          &sp->info->board_info[i],
83376                          sp->info->board_info[i].modalias);
83377
83378                 sp->info->board_info[i].controller_data = sp;
83379 -               spi_new_device(master, sp->info->board_info + i);
83380 +               spidev = spi_new_device(master, sp->info->board_info + i);
83381 +               if (spidev)
83382 +                       spidev->max_speed_hz =
83383 +                                         sp->info->board_info[i].max_speed_hz;
83384         }
83385
83386         return 0;
83387 Index: linux-2.6.24.7/drivers/usb/gadget/ether.c
83388 ===================================================================
83389 --- linux-2.6.24.7.orig/drivers/usb/gadget/ether.c      2008-12-11 22:46:07.000000000 +0100
83390 +++ linux-2.6.24.7/drivers/usb/gadget/ether.c   2008-12-11 22:48:25.000000000 +0100
83391 @@ -134,11 +134,8 @@ struct eth_dev {
83392   * Instead:  allocate your own, using normal USB-IF procedures.
83393   */
83394
83395 -/* Thanks to NetChip Technologies for donating this product ID.
83396 - * It's for devices with only CDC Ethernet configurations.
83397 - */
83398 -#define CDC_VENDOR_NUM 0x0525          /* NetChip */
83399 -#define CDC_PRODUCT_NUM        0xa4a1          /* Linux-USB Ethernet Gadget */
83400 +#define CDC_VENDOR_NUM 0x1457          /* First International Computer */
83401 +#define CDC_PRODUCT_NUM        0x5117          /* Linux-USB Ethernet Gadget */
83402
83403  /* For hardware that can't talk CDC, we use the same vendor ID that
83404   * ARM Linux has used for ethernet-over-usb, both with sa1100 and
83405 @@ -159,8 +156,8 @@ struct eth_dev {
83406   * used with CDC Ethernet, Linux 2.4 hosts will need updates to choose
83407   * the non-RNDIS configuration.
83408   */
83409 -#define RNDIS_VENDOR_NUM       0x0525  /* NetChip */
83410 -#define RNDIS_PRODUCT_NUM      0xa4a2  /* Ethernet/RNDIS Gadget */
83411 +#define RNDIS_VENDOR_NUM       0x1457  /* NetChip */
83412 +#define RNDIS_PRODUCT_NUM      0x5122  /* Ethernet/RNDIS Gadget */
83413
83414
83415  /* Some systems will want different product identifers published in the
83416 @@ -464,7 +461,7 @@ eth_config = {
83417         .bConfigurationValue =  DEV_CONFIG_VALUE,
83418         .iConfiguration =       STRING_CDC,
83419         .bmAttributes =         USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
83420 -       .bMaxPower =            50,
83421 +       .bMaxPower =            250,
83422  };
83423
83424  #ifdef CONFIG_USB_ETH_RNDIS
83425 @@ -478,7 +475,7 @@ rndis_config = {
83426         .bConfigurationValue =  DEV_RNDIS_CONFIG_VALUE,
83427         .iConfiguration =       STRING_RNDIS,
83428         .bmAttributes =         USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
83429 -       .bMaxPower =            50,
83430 +       .bMaxPower =            250,
83431  };
83432  #endif
83433
83434 Index: linux-2.6.24.7/drivers/usb/gadget/s3c2410_udc.c
83435 ===================================================================
83436 --- linux-2.6.24.7.orig/drivers/usb/gadget/s3c2410_udc.c        2008-12-11 22:46:07.000000000 +0100
83437 +++ linux-2.6.24.7/drivers/usb/gadget/s3c2410_udc.c     2008-12-11 22:46:49.000000000 +0100
83438 @@ -845,6 +845,7 @@ static void s3c2410_udc_handle_ep(struct
83439         u32                     ep_csr1;
83440         u32                     idx;
83441
83442 +handle_ep_again:
83443         if (likely (!list_empty(&ep->queue)))
83444                 req = list_entry(ep->queue.next,
83445                                 struct s3c2410_request, queue);
83446 @@ -884,6 +885,8 @@ static void s3c2410_udc_handle_ep(struct
83447
83448                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
83449                         s3c2410_udc_read_fifo(ep,req);
83450 +                       if (s3c2410_udc_fifo_count_out())
83451 +                               goto handle_ep_again;
83452                 }
83453         }
83454  }
83455 Index: linux-2.6.24.7/drivers/usb/host/ohci-s3c2410.c
83456 ===================================================================
83457 --- linux-2.6.24.7.orig/drivers/usb/host/ohci-s3c2410.c 2008-12-11 22:46:07.000000000 +0100
83458 +++ linux-2.6.24.7/drivers/usb/host/ohci-s3c2410.c      2008-12-11 22:46:49.000000000 +0100
83459 @@ -24,6 +24,7 @@
83460
83461  #include <asm/hardware.h>
83462  #include <asm/arch/usb-control.h>
83463 +#include <asm/arch/regs-gpio.h>
83464
83465  #define valid_port(idx) ((idx) == 1 || (idx) == 2)
83466
83467 @@ -308,6 +309,42 @@ static void s3c2410_hcd_oc(struct s3c241
83468         local_irq_restore(flags);
83469  }
83470
83471 +/* switching of USB pads */
83472 +static ssize_t show_usb_mode(struct device *dev, struct device_attribute *attr,
83473 +                            char *buf)
83474 +{
83475 +       if (__raw_readl(S3C24XX_MISCCR) & S3C2410_MISCCR_USBHOST)
83476 +               return sprintf(buf, "host\n");
83477 +
83478 +       return sprintf(buf, "device\n");
83479 +}
83480 +
83481 +static ssize_t set_usb_mode(struct device *dev, struct device_attribute *attr,
83482 +                           const char *buf, size_t count)
83483 +{
83484 +       if (!strncmp(buf, "host", 4)) {
83485 +               printk("s3c2410: changing usb to host\n");
83486 +               s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST,
83487 +                                     S3C2410_MISCCR_USBHOST);
83488 +               /* FIXME:
83489 +                * - call machine-specific disable-pullup function i
83490 +                * - enable +Vbus (if hardware supports it)
83491 +                */
83492 +               s3c2410_gpio_setpin(S3C2410_GPB9, 0);
83493 +       } else if (!strncmp(buf, "device", 6)) {
83494 +               printk("s3c2410: changing usb to device\n");
83495 +               s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST, 0);
83496 +               s3c2410_gpio_setpin(S3C2410_GPB9, 1);
83497 +       } else {
83498 +               printk("s3c2410: unknown mode\n");
83499 +               return -EINVAL;
83500 +       }
83501 +
83502 +       return count;
83503 +}
83504 +
83505 +static DEVICE_ATTR(usb_mode, S_IRUGO | S_IWUSR, show_usb_mode, set_usb_mode);
83506 +
83507  /* may be called without controller electrically present */
83508  /* may be called with controller, bus, and devices active */
83509
83510 @@ -325,6 +362,7 @@ static void s3c2410_hcd_oc(struct s3c241
83511  static void
83512  usb_hcd_s3c2410_remove (struct usb_hcd *hcd, struct platform_device *dev)
83513  {
83514 +       device_remove_file(&dev->dev, &dev_attr_usb_mode);
83515         usb_remove_hcd(hcd);
83516         s3c2410_stop_hc(dev);
83517         iounmap(hcd->regs);
83518 @@ -392,8 +430,15 @@ static int usb_hcd_s3c2410_probe (const
83519         if (retval != 0)
83520                 goto err_ioremap;
83521
83522 +       retval = device_create_file(&dev->dev, &dev_attr_usb_mode);
83523 +       if (retval != 0)
83524 +               goto err_hcd;
83525 +
83526         return 0;
83527
83528 + err_hcd:
83529 +       usb_remove_hcd(hcd);
83530 +
83531   err_ioremap:
83532         s3c2410_stop_hc(dev);
83533         iounmap(hcd->regs);
83534 Index: linux-2.6.24.7/drivers/video/backlight/gta01_bl.c
83535 ===================================================================
83536 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
83537 +++ linux-2.6.24.7/drivers/video/backlight/gta01_bl.c   2008-12-11 22:46:49.000000000 +0100
83538 @@ -0,0 +1,269 @@
83539 +/*
83540 + *  Backlight Driver for FIC GTA01 (Neo1973) GSM Phone
83541 + *
83542 + * Copyright (C) 2006-2007 by Openmoko, Inc.
83543 + * Author: Harald Welte <laforge@openmoko.org>
83544 + * All rights reserved.
83545 + *
83546 + *  based on corgi_cl.c, Copyright (c) 2004-2006 Richard Purdie
83547 + *
83548 + * This program is free software; you can redistribute it and/or
83549 + * modify it under the terms of the GNU General Public License as
83550 + * published by the Free Software Foundation, version 2.
83551 + *
83552 + * This program is distributed in the hope that it will be useful,
83553 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
83554 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
83555 + * GNU General Public License for more details.
83556 + *
83557 + * You should have received a copy of the GNU General Public License
83558 + * along with this program; if not, write to the Free Software
83559 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
83560 + * MA 02111-1307 USA
83561 + *
83562 + * Javi Roman <javiroman@kernel-labs.org>:
83563 + *     implement PWM, instead of simple on/off switching
83564 + *
83565 + */
83566 +
83567 +#include <linux/module.h>
83568 +#include <linux/kernel.h>
83569 +#include <linux/init.h>
83570 +#include <linux/platform_device.h>
83571 +#include <linux/mutex.h>
83572 +#include <linux/fb.h>
83573 +#include <linux/backlight.h>
83574 +#include <linux/clk.h>
83575 +
83576 +#include <asm/arch/hardware.h>
83577 +#include <asm/arch/gta01.h>
83578 +#include <asm/arch/pwm.h>
83579 +
83580 +#include <asm/plat-s3c/regs-timer.h>
83581 +#include <asm/plat-s3c24xx/neo1973.h>
83582 +
83583 +static struct backlight_properties gta01bl_prop;
83584 +static struct backlight_device *gta01_backlight_device;
83585 +static struct gta01bl_machinfo *bl_machinfo;
83586 +
83587 +static unsigned long gta01bl_flags;
83588 +
83589 +struct gta01bl_data {
83590 +       int intensity;
83591 +       struct mutex mutex;
83592 +       struct clk *clk;
83593 +       struct s3c2410_pwm pwm;
83594 +};
83595 +
83596 +static struct gta01bl_data gta01bl;
83597 +
83598 +static int gta01bl_defer_resume_backlight;
83599 +
83600 +#define GTA01BL_SUSPENDED     0x01
83601 +#define GTA01BL_BATTLOW       0x02
83602 +
83603 +/* On the GTA01 / Neo1973, we use a 50 or 66MHz PCLK, which gives
83604 + * us a 6.25..8.25MHz DIV8 clock, which is further divided by a
83605 + * prescaler of 4, resulting in a 1.56..2.06MHz tick.  This results in a
83606 + * minimum frequency of 24..31Hz.  At 400Hz, we need to set the count
83607 + * to something like 3906..5156, providing us a way sufficient resolution
83608 + * for display brightness adjustment. */
83609 +#define GTA01BL_COUNTER 5156
83610 +
83611 +static int gta01bl_send_intensity(struct backlight_device *bd)
83612 +{
83613 +       int intensity = bd->props.brightness;
83614 +
83615 +       if (bd->props.power != FB_BLANK_UNBLANK)
83616 +               intensity = 0;
83617 +       if (bd->props.fb_blank != FB_BLANK_UNBLANK)
83618 +               intensity = 0;
83619 +       if (gta01bl_flags & GTA01BL_SUSPENDED)
83620 +               intensity = 0;
83621 +       if (gta01bl_flags & GTA01BL_BATTLOW)
83622 +               intensity &= bl_machinfo->limit_mask;
83623 +
83624 +       mutex_lock(&gta01bl.mutex);
83625 +#ifdef GTA01_BACKLIGHT_ONOFF_ONLY
83626 +       if (intensity)
83627 +               neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
83628 +       else
83629 +               neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 0);
83630 +#else
83631 +       if (intensity == bd->props.max_brightness) {
83632 +               neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
83633 +               s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
83634 +       } else  {
83635 +               s3c2410_pwm_duty_cycle(intensity & 0xffff, &gta01bl.pwm);
83636 +               s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPB0_TOUT0);
83637 +       }
83638 +#endif
83639 +       mutex_unlock(&gta01bl.mutex);
83640 +
83641 +       gta01bl.intensity = intensity;
83642 +       return 0;
83643 +}
83644 +
83645 +static int gta01bl_init_hw(void)
83646 +{
83647 +       int rc;
83648 +
83649 +       rc = s3c2410_pwm_init(&gta01bl.pwm);
83650 +       if (rc)
83651 +               return rc;
83652 +
83653 +       gta01bl.pwm.timerid = PWM0;
83654 +       gta01bl.pwm.prescaler = (4 - 1);
83655 +       gta01bl.pwm.divider = S3C2410_TCFG1_MUX0_DIV8;
83656 +       gta01bl.pwm.counter = GTA01BL_COUNTER;
83657 +       gta01bl.pwm.comparer = gta01bl.pwm.counter;
83658 +
83659 +       rc = s3c2410_pwm_enable(&gta01bl.pwm);
83660 +       if (rc)
83661 +               return rc;
83662 +
83663 +       s3c2410_pwm_start(&gta01bl.pwm);
83664 +
83665 +       gta01bl_prop.max_brightness = gta01bl.pwm.counter;
83666 +
83667 +       return 0;
83668 +}
83669 +
83670 +#ifdef CONFIG_PM
83671 +static int gta01bl_suspend(struct platform_device *dev, pm_message_t state)
83672 +{
83673 +       gta01bl_flags |= GTA01BL_SUSPENDED;
83674 +       gta01bl_send_intensity(gta01_backlight_device);
83675 +       neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 0);
83676 +       s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
83677 +       return 0;
83678 +}
83679 +
83680 +void gta01bl_deferred_resume(void)
83681 +{
83682 +       mutex_lock(&gta01bl.mutex);
83683 +       gta01bl_init_hw();
83684 +       mutex_unlock(&gta01bl.mutex);
83685 +
83686 +       gta01bl_flags &= ~GTA01BL_SUSPENDED;
83687 +       gta01bl_send_intensity(gta01_backlight_device);
83688 +}
83689 +EXPORT_SYMBOL_GPL(gta01bl_deferred_resume);
83690 +
83691 +static int gta01bl_resume(struct platform_device *dev)
83692 +{
83693 +       if (!gta01bl_defer_resume_backlight)
83694 +               gta01bl_deferred_resume();
83695 +       return 0;
83696 +}
83697 +#else
83698 +#define gta01bl_suspend        NULL
83699 +#define gta01bl_resume NULL
83700 +#endif
83701 +
83702 +static int gta01bl_get_intensity(struct backlight_device *bd)
83703 +{
83704 +       return gta01bl.intensity;
83705 +}
83706 +
83707 +static int gta01bl_set_intensity(struct backlight_device *bd)
83708 +{
83709 +       gta01bl_send_intensity(gta01_backlight_device);
83710 +       return 0;
83711 +}
83712 +
83713 +/*
83714 + * Called when the battery is low to limit the backlight intensity.
83715 + * If limit==0 clear any limit, otherwise limit the intensity
83716 + */
83717 +void gta01bl_limit_intensity(int limit)
83718 +{
83719 +       if (limit)
83720 +               gta01bl_flags |= GTA01BL_BATTLOW;
83721 +       else
83722 +               gta01bl_flags &= ~GTA01BL_BATTLOW;
83723 +       gta01bl_send_intensity(gta01_backlight_device);
83724 +}
83725 +EXPORT_SYMBOL_GPL(gta01bl_limit_intensity);
83726 +
83727 +
83728 +static struct backlight_ops gta01bl_ops = {
83729 +       .get_brightness = gta01bl_get_intensity,
83730 +       .update_status  = gta01bl_set_intensity,
83731 +};
83732 +
83733 +static int __init gta01bl_probe(struct platform_device *pdev)
83734 +{
83735 +       struct gta01bl_machinfo *machinfo = pdev->dev.platform_data;
83736 +       int rc;
83737 +
83738 +#ifdef GTA01_BACKLIGHT_ONOFF_ONLY
83739 +       s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
83740 +       gta01bl_prop.max_brightness = 1;
83741 +#else
83742 +       rc = gta01bl_init_hw();
83743 +       if (rc < 0)
83744 +               return rc;
83745 +#endif
83746 +       mutex_init(&gta01bl.mutex);
83747 +
83748 +       if (!machinfo->limit_mask)
83749 +               machinfo->limit_mask = -1;
83750 +
83751 +       gta01bl_defer_resume_backlight = machinfo->defer_resume_backlight;
83752 +
83753 +       gta01_backlight_device = backlight_device_register("gta01-bl",
83754 +                                                          &pdev->dev, NULL,
83755 +                                                          &gta01bl_ops);
83756 +       if (IS_ERR(gta01_backlight_device))
83757 +               return PTR_ERR(gta01_backlight_device);
83758 +
83759 +       gta01bl_prop.power = FB_BLANK_UNBLANK;
83760 +       gta01bl_prop.brightness = gta01bl_prop.max_brightness;
83761 +       memcpy(&gta01_backlight_device->props,
83762 +              &gta01bl_prop, sizeof(gta01bl_prop));
83763 +       gta01bl_send_intensity(gta01_backlight_device);
83764 +
83765 +       return 0;
83766 +}
83767 +
83768 +static int gta01bl_remove(struct platform_device *dev)
83769 +{
83770 +#ifndef GTA01_BACKLIGHT_ONOFF_ONLY
83771 +       s3c2410_pwm_disable(&gta01bl.pwm);
83772 +#endif
83773 +       backlight_device_unregister(gta01_backlight_device);
83774 +       mutex_destroy(&gta01bl.mutex);
83775 +
83776 +       s3c2410_gpio_cfgpin(GTA01_GPIO_BACKLIGHT, S3C2410_GPIO_OUTPUT);
83777 +       neo1973_gpb_setpin(GTA01_GPIO_BACKLIGHT, 1);
83778 +
83779 +       return 0;
83780 +}
83781 +
83782 +static struct platform_driver gta01bl_driver = {
83783 +       .probe          = gta01bl_probe,
83784 +       .remove         = gta01bl_remove,
83785 +       .suspend        = gta01bl_suspend,
83786 +       .resume         = gta01bl_resume,
83787 +       .driver         = {
83788 +               .name   = "gta01-bl",
83789 +       },
83790 +};
83791 +
83792 +static int __init gta01bl_init(void)
83793 +{
83794 +       return platform_driver_register(&gta01bl_driver);
83795 +}
83796 +
83797 +static void __exit gta01bl_exit(void)
83798 +{
83799 +       platform_driver_unregister(&gta01bl_driver);
83800 +}
83801 +
83802 +module_init(gta01bl_init);
83803 +module_exit(gta01bl_exit);
83804 +
83805 +MODULE_DESCRIPTION("FIC GTA01 (Neo1973) Backlight Driver");
83806 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
83807 +MODULE_LICENSE("GPL");
83808 Index: linux-2.6.24.7/drivers/video/backlight/Kconfig
83809 ===================================================================
83810 --- linux-2.6.24.7.orig/drivers/video/backlight/Kconfig 2008-12-11 22:46:07.000000000 +0100
83811 +++ linux-2.6.24.7/drivers/video/backlight/Kconfig      2008-12-11 22:46:49.000000000 +0100
83812 @@ -67,6 +67,14 @@ config BACKLIGHT_LOCOMO
83813           If you have a Sharp Zaurus SL-5500 (Collie) or SL-5600 (Poodle) say y to
83814           enable the LCD/backlight driver.
83815
83816 +config BACKLIGHT_GTA01
83817 +       tristate "FIC Neo1973 GTA01 Backlight Driver"
83818 +       depends on BACKLIGHT_CLASS_DEVICE && MACH_NEO1973_GTA01
83819 +       default y
83820 +       help
83821 +         If you have a FIC Neo1973 GTA01, say y to enable the backlight driver.
83822 +
83823 +
83824  config BACKLIGHT_HP680
83825         tristate "HP Jornada 680 Backlight Driver"
83826         depends on BACKLIGHT_CLASS_DEVICE && SH_HP6XX
83827 Index: linux-2.6.24.7/drivers/video/backlight/Makefile
83828 ===================================================================
83829 --- linux-2.6.24.7.orig/drivers/video/backlight/Makefile        2008-12-11 22:46:07.000000000 +0100
83830 +++ linux-2.6.24.7/drivers/video/backlight/Makefile     2008-12-11 22:46:49.000000000 +0100
83831 @@ -5,6 +5,7 @@ obj-$(CONFIG_LCD_LTV350QV)      += ltv350qv.o
83832
83833  obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
83834  obj-$(CONFIG_BACKLIGHT_CORGI)  += corgi_bl.o
83835 +obj-$(CONFIG_BACKLIGHT_GTA01)  += gta01_bl.o
83836  obj-$(CONFIG_BACKLIGHT_HP680)  += hp680_bl.o
83837  obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
83838  obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
83839 Index: linux-2.6.24.7/drivers/video/display/jbt6k74.c
83840 ===================================================================
83841 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
83842 +++ linux-2.6.24.7/drivers/video/display/jbt6k74.c      2008-12-11 22:46:49.000000000 +0100
83843 @@ -0,0 +1,757 @@
83844 +/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
83845 + *
83846 + * Copyright (C) 2006-2007 by Openmoko, Inc.
83847 + * Author: Harald Welte <laforge@openmoko.org>,
83848 + *        Stefan Schmidt <stefan@openmoko.org>
83849 + * Copyright (C) 2008 by Harald Welte <laforge@openmoko.org>
83850 + * All rights reserved.
83851 + *
83852 + * This program is free software; you can redistribute it and/or
83853 + * modify it under the terms of the GNU General Public License as
83854 + * published by the Free Software Foundation; either version 2 of
83855 + * the License, or (at your option) any later version.
83856 + *
83857 + * This program is distributed in the hope that it will be useful,
83858 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
83859 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
83860 + * GNU General Public License for more details.
83861 + *
83862 + * You should have received a copy of the GNU General Public License
83863 + * along with this program; if not, write to the Free Software
83864 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
83865 + * MA 02111-1307 USA
83866 + *
83867 + */
83868 +
83869 +#include <linux/kernel.h>
83870 +#include <linux/types.h>
83871 +#include <linux/module.h>
83872 +#include <linux/device.h>
83873 +#include <linux/platform_device.h>
83874 +#include <linux/delay.h>
83875 +#include <linux/jbt6k74.h>
83876 +#include <linux/fb.h>
83877 +
83878 +enum jbt_register {
83879 +       JBT_REG_SLEEP_IN                = 0x10,
83880 +       JBT_REG_SLEEP_OUT               = 0x11,
83881 +
83882 +       JBT_REG_DISPLAY_OFF             = 0x28,
83883 +       JBT_REG_DISPLAY_ON              = 0x29,
83884 +
83885 +       JBT_REG_RGB_FORMAT              = 0x3a,
83886 +       JBT_REG_QUAD_RATE               = 0x3b,
83887 +
83888 +       JBT_REG_POWER_ON_OFF            = 0xb0,
83889 +       JBT_REG_BOOSTER_OP              = 0xb1,
83890 +       JBT_REG_BOOSTER_MODE            = 0xb2,
83891 +       JBT_REG_BOOSTER_FREQ            = 0xb3,
83892 +       JBT_REG_OPAMP_SYSCLK            = 0xb4,
83893 +       JBT_REG_VSC_VOLTAGE             = 0xb5,
83894 +       JBT_REG_VCOM_VOLTAGE            = 0xb6,
83895 +       JBT_REG_EXT_DISPL               = 0xb7,
83896 +       JBT_REG_OUTPUT_CONTROL          = 0xb8,
83897 +       JBT_REG_DCCLK_DCEV              = 0xb9,
83898 +       JBT_REG_DISPLAY_MODE1           = 0xba,
83899 +       JBT_REG_DISPLAY_MODE2           = 0xbb,
83900 +       JBT_REG_DISPLAY_MODE            = 0xbc,
83901 +       JBT_REG_ASW_SLEW                = 0xbd,
83902 +       JBT_REG_DUMMY_DISPLAY           = 0xbe,
83903 +       JBT_REG_DRIVE_SYSTEM            = 0xbf,
83904 +
83905 +       JBT_REG_SLEEP_OUT_FR_A          = 0xc0,
83906 +       JBT_REG_SLEEP_OUT_FR_B          = 0xc1,
83907 +       JBT_REG_SLEEP_OUT_FR_C          = 0xc2,
83908 +       JBT_REG_SLEEP_IN_LCCNT_D        = 0xc3,
83909 +       JBT_REG_SLEEP_IN_LCCNT_E        = 0xc4,
83910 +       JBT_REG_SLEEP_IN_LCCNT_F        = 0xc5,
83911 +       JBT_REG_SLEEP_IN_LCCNT_G        = 0xc6,
83912 +
83913 +       JBT_REG_GAMMA1_FINE_1           = 0xc7,
83914 +       JBT_REG_GAMMA1_FINE_2           = 0xc8,
83915 +       JBT_REG_GAMMA1_INCLINATION      = 0xc9,
83916 +       JBT_REG_GAMMA1_BLUE_OFFSET      = 0xca,
83917 +
83918 +       /* VGA */
83919 +       JBT_REG_BLANK_CONTROL           = 0xcf,
83920 +       JBT_REG_BLANK_TH_TV             = 0xd0,
83921 +       JBT_REG_CKV_ON_OFF              = 0xd1,
83922 +       JBT_REG_CKV_1_2                 = 0xd2,
83923 +       JBT_REG_OEV_TIMING              = 0xd3,
83924 +       JBT_REG_ASW_TIMING_1            = 0xd4,
83925 +       JBT_REG_ASW_TIMING_2            = 0xd5,
83926 +
83927 +       /* QVGA */
83928 +       JBT_REG_BLANK_CONTROL_QVGA      = 0xd6,
83929 +       JBT_REG_BLANK_TH_TV_QVGA        = 0xd7,
83930 +       JBT_REG_CKV_ON_OFF_QVGA         = 0xd8,
83931 +       JBT_REG_CKV_1_2_QVGA            = 0xd9,
83932 +       JBT_REG_OEV_TIMING_QVGA         = 0xde,
83933 +       JBT_REG_ASW_TIMING_1_QVGA       = 0xdf,
83934 +       JBT_REG_ASW_TIMING_2_QVGA       = 0xe0,
83935 +
83936 +
83937 +       JBT_REG_HCLOCK_VGA              = 0xec,
83938 +       JBT_REG_HCLOCK_QVGA             = 0xed,
83939 +
83940 +};
83941 +
83942 +enum jbt_state {
83943 +       JBT_STATE_DEEP_STANDBY,
83944 +       JBT_STATE_SLEEP,
83945 +       JBT_STATE_NORMAL,
83946 +       JBT_STATE_QVGA_NORMAL,
83947 +};
83948 +
83949 +static const char *jbt_state_names[] = {
83950 +       [JBT_STATE_DEEP_STANDBY]        = "deep-standby",
83951 +       [JBT_STATE_SLEEP]               = "sleep",
83952 +       [JBT_STATE_NORMAL]              = "normal",
83953 +       [JBT_STATE_QVGA_NORMAL]         = "qvga-normal",
83954 +};
83955 +
83956 +struct jbt_info {
83957 +       enum jbt_state state, last_state;
83958 +       struct spi_device *spi_dev;
83959 +       struct mutex lock;              /* protects tx_buf and reg_cache */
83960 +       struct notifier_block fb_notif;
83961 +       u16 tx_buf[8];
83962 +       u16 reg_cache[0xEE];
83963 +       int have_resumed;
83964 +};
83965 +
83966 +#define JBT_COMMAND    0x000
83967 +#define JBT_DATA       0x100
83968 +
83969 +
83970 +static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg)
83971 +{
83972 +       int rc;
83973 +
83974 +       mutex_lock(&jbt->lock);
83975 +
83976 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
83977 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
83978 +                      1*sizeof(u16));
83979 +       if (rc == 0)
83980 +               jbt->reg_cache[reg] = 0;
83981 +       else
83982 +               printk(KERN_ERR"jbt_reg_write_nodata spi_write ret %d\n",
83983 +                      rc);
83984 +
83985 +       mutex_unlock(&jbt->lock);
83986 +
83987 +       return rc;
83988 +}
83989 +
83990 +
83991 +static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data)
83992 +{
83993 +       int rc;
83994 +
83995 +       mutex_lock(&jbt->lock);
83996 +
83997 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
83998 +       jbt->tx_buf[1] = JBT_DATA | data;
83999 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
84000 +                      2*sizeof(u16));
84001 +       if (rc == 0)
84002 +               jbt->reg_cache[reg] = data;
84003 +       else
84004 +               printk(KERN_ERR"jbt_reg_write spi_write ret %d\n", rc);
84005 +
84006 +       mutex_unlock(&jbt->lock);
84007 +
84008 +       return rc;
84009 +}
84010 +
84011 +static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data)
84012 +{
84013 +       int rc;
84014 +
84015 +       mutex_lock(&jbt->lock);
84016 +
84017 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
84018 +       jbt->tx_buf[1] = JBT_DATA | (data >> 8);
84019 +       jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
84020 +
84021 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
84022 +                      3*sizeof(u16));
84023 +       if (rc == 0)
84024 +               jbt->reg_cache[reg] = data;
84025 +       else
84026 +               printk(KERN_ERR"jbt_reg_write16 spi_write ret %d\n", rc);
84027 +
84028 +       mutex_unlock(&jbt->lock);
84029 +
84030 +       return rc;
84031 +}
84032 +
84033 +static int jbt_init_regs(struct jbt_info *jbt, int qvga)
84034 +{
84035 +       int rc;
84036 +
84037 +       dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n", qvga ? 'Q' : ' ');
84038 +
84039 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
84040 +       rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
84041 +       rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
84042 +       rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
84043 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
84044 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
84045 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
84046 +       rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
84047 +       rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
84048 +       rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
84049 +       rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
84050 +       rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
84051 +       /*
84052 +        * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
84053 +        * to avoid red / blue flicker
84054 +        */
84055 +       rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04);
84056 +       rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
84057 +
84058 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
84059 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
84060 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
84061 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
84062 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
84063 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
84064 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
84065 +
84066 +       rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
84067 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
84068 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
84069 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
84070 +
84071 +       if (!qvga) {
84072 +               rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
84073 +               rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
84074 +               rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
84075 +
84076 +               rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
84077 +               rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
84078 +
84079 +               rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
84080 +               rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
84081 +               rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
84082 +       } else {
84083 +               rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
84084 +               rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
84085 +               rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
84086 +
84087 +               rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
84088 +               rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
84089 +
84090 +               rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
84091 +               rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
84092 +               rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
84093 +       }
84094 +
84095 +       return rc ? -EIO : 0;
84096 +}
84097 +
84098 +static int standby_to_sleep(struct jbt_info *jbt)
84099 +{
84100 +       int rc;
84101 +
84102 +       /* three times command zero */
84103 +       rc = jbt_reg_write_nodata(jbt, 0x00);
84104 +       mdelay(1);
84105 +       rc |= jbt_reg_write_nodata(jbt, 0x00);
84106 +       mdelay(1);
84107 +       rc |= jbt_reg_write_nodata(jbt, 0x00);
84108 +       mdelay(1);
84109 +
84110 +       /* deep standby out */
84111 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17);
84112 +
84113 +       return rc ? -EIO : 0;
84114 +}
84115 +
84116 +static int sleep_to_normal(struct jbt_info *jbt)
84117 +{
84118 +       int rc;
84119 +
84120 +       /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
84121 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
84122 +
84123 +       /* Quad mode off */
84124 +       rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
84125 +
84126 +       /* AVDD on, XVDD on */
84127 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
84128 +
84129 +       /* Output control */
84130 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
84131 +
84132 +       /* Sleep mode off */
84133 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
84134 +
84135 +       /* initialize register set */
84136 +       rc |= jbt_init_regs(jbt, 0);
84137 +
84138 +       /* Turn on display */
84139 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
84140 +
84141 +       return rc ? -EIO : 0;
84142 +}
84143 +
84144 +static int sleep_to_qvga_normal(struct jbt_info *jbt)
84145 +{
84146 +       int rc;
84147 +
84148 +       /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
84149 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
84150 +
84151 +       /* Quad mode on */
84152 +       rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
84153 +
84154 +       /* AVDD on, XVDD on */
84155 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
84156 +
84157 +       /* Output control */
84158 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
84159 +
84160 +       /* Sleep mode off */
84161 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
84162 +
84163 +       /* initialize register set for qvga*/
84164 +       rc |= jbt_init_regs(jbt, 1);
84165 +
84166 +       /* Turn on display */
84167 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
84168 +
84169 +       return rc ? -EIO : 0;
84170 +}
84171 +
84172 +static int normal_to_sleep(struct jbt_info *jbt)
84173 +{
84174 +       int rc;
84175 +
84176 +       rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
84177 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
84178 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
84179 +
84180 +       return rc ? -EIO : 0;
84181 +}
84182 +
84183 +static int sleep_to_standby(struct jbt_info *jbt)
84184 +{
84185 +       return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
84186 +}
84187 +
84188 +/* frontend function */
84189 +int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state)
84190 +{
84191 +       int rc = -EINVAL;
84192 +
84193 +       dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%u, "
84194 +               "new_state=%u)\n", jbt->state, new_state);
84195 +
84196 +       switch (jbt->state) {
84197 +       case JBT_STATE_DEEP_STANDBY:
84198 +               switch (new_state) {
84199 +               case JBT_STATE_DEEP_STANDBY:
84200 +                       rc = 0;
84201 +                       break;
84202 +               case JBT_STATE_SLEEP:
84203 +                       rc = standby_to_sleep(jbt);
84204 +                       break;
84205 +               case JBT_STATE_NORMAL:
84206 +                       /* first transition into sleep */
84207 +                       rc = standby_to_sleep(jbt);
84208 +                       /* then transition into normal */
84209 +                       rc |= sleep_to_normal(jbt);
84210 +                       break;
84211 +               case JBT_STATE_QVGA_NORMAL:
84212 +                       /* first transition into sleep */
84213 +                       rc = standby_to_sleep(jbt);
84214 +                       /* then transition into normal */
84215 +                       rc |= sleep_to_qvga_normal(jbt);
84216 +                       break;
84217 +               }
84218 +               break;
84219 +       case JBT_STATE_SLEEP:
84220 +               switch (new_state) {
84221 +               case JBT_STATE_SLEEP:
84222 +                       rc = 0;
84223 +                       break;
84224 +               case JBT_STATE_DEEP_STANDBY:
84225 +                       rc = sleep_to_standby(jbt);
84226 +                       break;
84227 +               case JBT_STATE_NORMAL:
84228 +                       rc = sleep_to_normal(jbt);
84229 +                       break;
84230 +               case JBT_STATE_QVGA_NORMAL:
84231 +                       rc = sleep_to_qvga_normal(jbt);
84232 +                       break;
84233 +               }
84234 +               break;
84235 +       case JBT_STATE_NORMAL:
84236 +               switch (new_state) {
84237 +               case JBT_STATE_NORMAL:
84238 +                       rc = 0;
84239 +                       break;
84240 +               case JBT_STATE_DEEP_STANDBY:
84241 +                       /* first transition into sleep */
84242 +                       rc = normal_to_sleep(jbt);
84243 +                       /* then transition into deep standby */
84244 +                       rc |= sleep_to_standby(jbt);
84245 +                       break;
84246 +               case JBT_STATE_SLEEP:
84247 +                       rc = normal_to_sleep(jbt);
84248 +                       break;
84249 +               case JBT_STATE_QVGA_NORMAL:
84250 +                       /* first transition into sleep */
84251 +                       rc = normal_to_sleep(jbt);
84252 +                       /* second transition into deep standby */
84253 +                       rc |= sleep_to_standby(jbt);
84254 +                       /* third transition into sleep */
84255 +                       rc |= standby_to_sleep(jbt);
84256 +                       /* fourth transition into normal */
84257 +                       rc |= sleep_to_qvga_normal(jbt);
84258 +                       break;
84259 +               }
84260 +               break;
84261 +       case JBT_STATE_QVGA_NORMAL:
84262 +               switch (new_state) {
84263 +               case JBT_STATE_QVGA_NORMAL:
84264 +                       rc = 0;
84265 +                       break;
84266 +               case JBT_STATE_DEEP_STANDBY:
84267 +                       /* first transition into sleep */
84268 +                       rc = normal_to_sleep(jbt);
84269 +                       /* then transition into deep standby */
84270 +                       rc |= sleep_to_standby(jbt);
84271 +                       break;
84272 +               case JBT_STATE_SLEEP:
84273 +                       rc = normal_to_sleep(jbt);
84274 +                       break;
84275 +               case JBT_STATE_NORMAL:
84276 +                       /* first transition into sleep */
84277 +                       rc = normal_to_sleep(jbt);
84278 +                       /* second transition into deep standby */
84279 +                       rc |= sleep_to_standby(jbt);
84280 +                       /* third transition into sleep */
84281 +                       rc |= standby_to_sleep(jbt);
84282 +                       /* fourth transition into normal */
84283 +                       rc |= sleep_to_normal(jbt);
84284 +                       break;
84285 +               }
84286 +               break;
84287 +       }
84288 +
84289 +       if (rc == 0)
84290 +               jbt->state = new_state;
84291 +
84292 +       return rc;
84293 +}
84294 +EXPORT_SYMBOL_GPL(jbt6k74_enter_state);
84295 +
84296 +static ssize_t state_read(struct device *dev, struct device_attribute *attr,
84297 +                         char *buf)
84298 +{
84299 +       struct jbt_info *jbt = dev_get_drvdata(dev);
84300 +
84301 +       if (jbt->state >= ARRAY_SIZE(jbt_state_names))
84302 +               return -EIO;
84303 +
84304 +       return sprintf(buf, "%s\n", jbt_state_names[jbt->state]);
84305 +}
84306 +
84307 +static ssize_t state_write(struct device *dev, struct device_attribute *attr,
84308 +                          const char *buf, size_t count)
84309 +{
84310 +       struct jbt_info *jbt = dev_get_drvdata(dev);
84311 +       int i, rc;
84312 +
84313 +       for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) {
84314 +               if (!strncmp(buf, jbt_state_names[i],
84315 +                            strlen(jbt_state_names[i]))) {
84316 +                       rc = jbt6k74_enter_state(jbt, i);
84317 +                       if (rc)
84318 +                               return rc;
84319 +                       return count;
84320 +               }
84321 +       }
84322 +
84323 +       return -EINVAL;
84324 +}
84325 +
84326 +static DEVICE_ATTR(state, 0644, state_read, state_write);
84327 +
84328 +static int reg_by_string(const char *name)
84329 +{
84330 +       if (!strcmp(name, "gamma_fine1"))
84331 +               return JBT_REG_GAMMA1_FINE_1;
84332 +       else if (!strcmp(name, "gamma_fine2"))
84333 +               return JBT_REG_GAMMA1_FINE_2;
84334 +       else if (!strcmp(name, "gamma_inclination"))
84335 +               return JBT_REG_GAMMA1_INCLINATION;
84336 +       else
84337 +               return JBT_REG_GAMMA1_BLUE_OFFSET;
84338 +}
84339 +
84340 +static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
84341 +                         char *buf)
84342 +{
84343 +       struct jbt_info *jbt = dev_get_drvdata(dev);
84344 +       int reg = reg_by_string(attr->attr.name);
84345 +       u16 val;
84346 +
84347 +       mutex_lock(&jbt->lock);
84348 +       val = jbt->reg_cache[reg];
84349 +       mutex_unlock(&jbt->lock);
84350 +
84351 +       return sprintf(buf, "0x%04x\n", val);
84352 +}
84353 +
84354 +static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
84355 +                          const char *buf, size_t count)
84356 +{
84357 +       struct jbt_info *jbt = dev_get_drvdata(dev);
84358 +       int reg = reg_by_string(attr->attr.name);
84359 +       unsigned long val = simple_strtoul(buf, NULL, 10);
84360 +
84361 +       dev_info(dev, "**** jbt6k74 writing gama %lu\n", val & 0xff);
84362 +
84363 +       jbt_reg_write(jbt, reg, val & 0xff);
84364 +
84365 +       return count;
84366 +}
84367 +
84368 +static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
84369 +static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
84370 +static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
84371 +static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
84372 +
84373 +static struct attribute *jbt_sysfs_entries[] = {
84374 +       &dev_attr_state.attr,
84375 +       &dev_attr_gamma_fine1.attr,
84376 +       &dev_attr_gamma_fine2.attr,
84377 +       &dev_attr_gamma_inclination.attr,
84378 +       &dev_attr_gamma_blue_offset.attr,
84379 +       NULL,
84380 +};
84381 +
84382 +static struct attribute_group jbt_attr_group = {
84383 +       .name   = NULL,
84384 +       .attrs  = jbt_sysfs_entries,
84385 +};
84386 +
84387 +static int fb_notifier_callback(struct notifier_block *self,
84388 +                               unsigned long event, void *data)
84389 +{
84390 +       struct jbt_info *jbt;
84391 +       struct fb_event *evdata = data;
84392 +       int fb_blank;
84393 +
84394 +       if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
84395 +               return 0;
84396 +
84397 +       fb_blank = *(int *)evdata->data;
84398 +       jbt = container_of(self, struct jbt_info, fb_notif);
84399 +
84400 +       switch (fb_blank) {
84401 +       case FB_BLANK_UNBLANK:
84402 +               dev_info(&jbt->spi_dev->dev, "**** jbt6k74 unblank\n");
84403 +               jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
84404 +               break;
84405 +       case FB_BLANK_NORMAL:
84406 +               dev_info(&jbt->spi_dev->dev, "**** jbt6k74 normal\n");
84407 +               break;
84408 +       case FB_BLANK_VSYNC_SUSPEND:
84409 +               dev_info(&jbt->spi_dev->dev, "**** jbt6k74 vsync suspend\n");
84410 +               break;
84411 +       case FB_BLANK_HSYNC_SUSPEND:
84412 +               dev_info(&jbt->spi_dev->dev, "**** jbt6k74 hsync suspend\n");
84413 +               /* FIXME: we disable SLEEP since it would result in
84414 +                * a visible artefact (white screen) before the backlight
84415 +                * is dimmed to a dark enough level */
84416 +               /* jbt6k74_enter_state(jbt, JBT_STATE_SLEEP); */
84417 +               break;
84418 +       case FB_BLANK_POWERDOWN:
84419 +               dev_info(&jbt->spi_dev->dev, "**** jbt6k74 powerdown\n");
84420 +       /* FIXME: deep standby causes WSOD on certain devices. We use
84421 +        * sleep as workaround */
84422 +               jbt6k74_enter_state(jbt, JBT_STATE_SLEEP);
84423 +               break;
84424 +       }
84425 +
84426 +       return 0;
84427 +}
84428 +
84429 +/* linux device model infrastructure */
84430 +
84431 +static int __devinit jbt_probe(struct spi_device *spi)
84432 +{
84433 +       int rc;
84434 +       struct jbt_info *jbt;
84435 +
84436 +       /* the controller doesn't have a MISO pin; we can't do detection */
84437 +
84438 +       spi->mode = SPI_CPOL | SPI_CPHA;
84439 +       spi->bits_per_word = 9;
84440 +
84441 +       rc = spi_setup(spi);
84442 +       if (rc < 0) {
84443 +               dev_err(&spi->dev,
84444 +                       "error during spi_setup of jbt6k74 driver\n");
84445 +               return rc;
84446 +       }
84447 +
84448 +       jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
84449 +       if (!jbt)
84450 +               return -ENOMEM;
84451 +
84452 +       jbt->spi_dev = spi;
84453 +       jbt->state = JBT_STATE_DEEP_STANDBY;
84454 +       mutex_init(&jbt->lock);
84455 +
84456 +       dev_set_drvdata(&spi->dev, jbt);
84457 +
84458 +       rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
84459 +       if (rc < 0) {
84460 +               dev_err(&spi->dev, "cannot enter NORMAL state\n");
84461 +               goto err_free_drvdata;
84462 +       }
84463 +
84464 +       rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
84465 +       if (rc < 0) {
84466 +               dev_err(&spi->dev, "cannot create sysfs group\n");
84467 +               goto err_standby;
84468 +       }
84469 +
84470 +       jbt->fb_notif.notifier_call = fb_notifier_callback;
84471 +       rc = fb_register_client(&jbt->fb_notif);
84472 +       if (rc < 0) {
84473 +               dev_err(&spi->dev, "cannot register notifier\n");
84474 +               goto err_sysfs;
84475 +       }
84476 +
84477 +       return 0;
84478 +
84479 +err_sysfs:
84480 +       sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
84481 +err_standby:
84482 +       jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
84483 +err_free_drvdata:
84484 +       dev_set_drvdata(&spi->dev, NULL);
84485 +       kfree(jbt);
84486 +
84487 +       return rc;
84488 +}
84489 +
84490 +static int __devexit jbt_remove(struct spi_device *spi)
84491 +{
84492 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
84493 +
84494 +       /* We don't want to switch off the display in case the user
84495 +        * accidentially onloads the module (whose use count normally is 0) */
84496 +
84497 +       fb_unregister_client(&jbt->fb_notif);
84498 +       sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
84499 +       dev_set_drvdata(&spi->dev, NULL);
84500 +       kfree(jbt);
84501 +
84502 +       return 0;
84503 +}
84504 +
84505 +#ifdef CONFIG_PM
84506 +static int jbt_suspend(struct spi_device *spi, pm_message_t state)
84507 +{
84508 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
84509 +       struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
84510 +
84511 +       dev_info(&spi->dev, "**** jbt6k74 suspend start\n");
84512 +
84513 +       /* platform can register resume dependencies here, if any */
84514 +       if (jbt6k74_pdata->suspending)
84515 +               (jbt6k74_pdata->suspending)(0, spi);
84516 +
84517 +       /* Save mode for resume */
84518 +       jbt->last_state = jbt->state;
84519 +       /* FIXME: deep standby causes WSOD on certain devices. We use
84520 +        * sleep as workaround */
84521 +       jbt6k74_enter_state(jbt, JBT_STATE_SLEEP);
84522 +
84523 +       jbt->have_resumed = 0;
84524 +
84525 +       dev_info(&spi->dev, "**** jbt6k74 suspend end\n");
84526 +
84527 +       return 0;
84528 +}
84529 +
84530 +int jbt6k74_resume(struct spi_device *spi)
84531 +{
84532 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
84533 +       struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
84534 +
84535 +       dev_info(&spi->dev, "**** jbt6k74 resume start\n");
84536 +       if (jbt6k74_pdata->all_dependencies_resumed)
84537 +               if (!(jbt6k74_pdata->all_dependencies_resumed)(0))
84538 +                       return 0;
84539 +
84540 +       /* we can get called twice with all dependencies resumed if our core
84541 +        * resume callback is last of all.  Protect against doing anything twice
84542 +        */
84543 +       if (jbt->have_resumed) {
84544 +               dev_info(&spi->dev, "**** jbt6k74 already resumed\n");
84545 +               return 0;
84546 +       }
84547 +
84548 +       jbt->have_resumed |= 1;
84549 +
84550 +       switch (jbt->last_state) {
84551 +       case JBT_STATE_QVGA_NORMAL:
84552 +               jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
84553 +               break;
84554 +       default:
84555 +               jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
84556 +               break;
84557 +       }
84558 +
84559 +       if (jbt6k74_pdata->resuming)
84560 +               (jbt6k74_pdata->resuming)(0);
84561 +
84562 +       dev_info(&spi->dev, "**** jbt6k74 resume end\n");
84563 +
84564 +       return 0;
84565 +}
84566 +EXPORT_SYMBOL_GPL(jbt6k74_resume);
84567 +
84568 +#else
84569 +#define jbt_suspend    NULL
84570 +#define jbt_resume     NULL
84571 +#endif
84572 +
84573 +static struct spi_driver jbt6k74_driver = {
84574 +       .driver = {
84575 +               .name   = "jbt6k74",
84576 +               .owner  = THIS_MODULE,
84577 +       },
84578 +
84579 +       .probe   = jbt_probe,
84580 +       .remove  = __devexit_p(jbt_remove),
84581 +       .suspend = jbt_suspend,
84582 +       .resume  = jbt6k74_resume,
84583 +};
84584 +
84585 +static int __init jbt_init(void)
84586 +{
84587 +       return spi_register_driver(&jbt6k74_driver);
84588 +}
84589 +
84590 +static void __exit jbt_exit(void)
84591 +{
84592 +       spi_unregister_driver(&jbt6k74_driver);
84593 +}
84594 +
84595 +MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
84596 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
84597 +MODULE_LICENSE("GPL");
84598 +
84599 +module_init(jbt_init);
84600 +module_exit(jbt_exit);
84601 Index: linux-2.6.24.7/drivers/video/display/Kconfig
84602 ===================================================================
84603 --- linux-2.6.24.7.orig/drivers/video/display/Kconfig   2008-12-11 22:46:07.000000000 +0100
84604 +++ linux-2.6.24.7/drivers/video/display/Kconfig        2008-12-11 22:46:49.000000000 +0100
84605 @@ -21,4 +21,15 @@ config DISPLAY_SUPPORT
84606  comment "Display hardware drivers"
84607         depends on DISPLAY_SUPPORT
84608
84609 +config DISPLAY_JBT6K74
84610 +       tristate "TPO JBT6K74-AS TFT display ASIC control interface"
84611 +       depends on SPI_MASTER && SYSFS
84612 +       help
84613 +         SPI driver for the control interface of TFT panels containing
84614 +         the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1
84615 +         TFT diplay module used in the FIC/Openmoko Neo1973 GSM phones.
84616 +
84617 +         The control interface is required for display operation, as it
84618 +         controls power management, display timing and gamma calibration.
84619 +
84620  endmenu
84621 Index: linux-2.6.24.7/drivers/video/display/Makefile
84622 ===================================================================
84623 --- linux-2.6.24.7.orig/drivers/video/display/Makefile  2008-12-11 22:46:07.000000000 +0100
84624 +++ linux-2.6.24.7/drivers/video/display/Makefile       2008-12-11 22:46:49.000000000 +0100
84625 @@ -3,4 +3,5 @@
84626  display-objs                           := display-sysfs.o
84627
84628  obj-$(CONFIG_DISPLAY_SUPPORT)          += display.o
84629 +obj-$(CONFIG_DISPLAY_JBT6K74)          += jbt6k74.o
84630
84631 Index: linux-2.6.24.7/drivers/video/logo/Kconfig
84632 ===================================================================
84633 --- linux-2.6.24.7.orig/drivers/video/logo/Kconfig      2008-12-11 22:46:07.000000000 +0100
84634 +++ linux-2.6.24.7/drivers/video/logo/Kconfig   2008-12-11 22:46:49.000000000 +0100
84635 @@ -67,6 +67,11 @@ config LOGO_SUPERH_CLUT224
84636         depends on SUPERH
84637         default y
84638
84639 +config LOGO_OPENMOKO_CLUT224
84640 +       bool "224-color Openmoko Linux logo"
84641 +       depends on MACH_NEO1973_GTA01 || MACH_NEO1973_GTA02
84642 +       default y
84643 +
84644  config LOGO_M32R_CLUT224
84645         bool "224-color M32R Linux logo"
84646         depends on M32R
84647 Index: linux-2.6.24.7/drivers/video/logo/logo.c
84648 ===================================================================
84649 --- linux-2.6.24.7.orig/drivers/video/logo/logo.c       2008-12-11 22:46:07.000000000 +0100
84650 +++ linux-2.6.24.7/drivers/video/logo/logo.c    2008-12-11 22:46:49.000000000 +0100
84651 @@ -33,6 +33,7 @@ extern const struct linux_logo logo_supe
84652  extern const struct linux_logo logo_superh_vga16;
84653  extern const struct linux_logo logo_superh_clut224;
84654  extern const struct linux_logo logo_m32r_clut224;
84655 +extern const struct linux_logo logo_openmoko_clut224;
84656
84657  static int nologo;
84658  module_param(nologo, bool, 0);
84659 @@ -105,6 +106,10 @@ const struct linux_logo * __init_refok f
84660                 /* M32R Linux logo */
84661                 logo = &logo_m32r_clut224;
84662  #endif
84663 +#ifdef CONFIG_LOGO_OPENMOKO_CLUT224
84664 +               /* Openmoko Linux logo */
84665 +               logo = &logo_openmoko_clut224;
84666 +#endif
84667         }
84668         return logo;
84669  }
84670 Index: linux-2.6.24.7/drivers/video/logo/logo_openmoko_clut224.ppm
84671 ===================================================================
84672 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
84673 +++ linux-2.6.24.7/drivers/video/logo/logo_openmoko_clut224.ppm 2008-12-11 22:46:49.000000000 +0100
84674 @@ -0,0 +1,40003 @@
84675 +P3
84676 +480 500
84677 +255
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99999 +51 40 13  55 44 14  59 49 15  59 49 15  71 53 16  71 53 16
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100003 +59 45 14  51 40 13  50 37 12  49 31 9  38 29 9  48 30 8
100004 +38 27 8  48 30 8  38 29 9  43 33 10  46 36 11  51 40 13
100005 +59 49 15  57 50 16  57 50 17  71 53 16  80 59 18  57 50 17
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100009 +44 35 11  29 24 7  24 21 6  18 15 5  13 11 4  9 7 3
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102874 +48 30 8  48 30 8  48 30 8  56 33 8  56 33 8  56 33 8
102875 +56 33 8  62 38 11  62 38 11  62 38 11  62 38 11  62 38 11
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102878 +90 63 20  90 63 20  90 63 20  90 63 20  90 63 20  90 63 20
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102880 +104 73 28  90 63 20  104 73 28  104 73 28  104 73 28  104 73 28
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102883 +143 92 37  143 92 37  131 88 37  154 97 33  156 118 66  156 118 66
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103930 +57 50 16  57 50 16  47 39 13  47 39 13  37 31 10  31 27 8
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109984 +10 10 10  10 10 10  9 9 9  9 9 9  9 9 9  8 8 8
109985 +8 8 8  8 8 8  8 8 8  8 8 8  7 7 7  7 7 7
109986 +7 7 7  7 7 7  7 7 7  7 7 7  7 7 7  7 7 7
109987 +7 7 7  8 8 8  8 8 8  8 8 8  8 8 8  8 8 8
109988 +9 9 9  9 9 9  9 9 9  9 9 9  9 9 9  10 10 10
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109990 +9 9 9  9 9 9  9 9 9  9 9 9  9 9 9  9 9 9
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109998 +9 9 9  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
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110010 +9 9 9  9 9 9  9 9 9  9 9 9  8 8 8  8 8 8
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110012 +9 9 9  9 9 9  9 9 9  9 9 9  9 9 9  9 9 9
110013 +9 9 9  9 9 9  9 9 9  9 9 9  9 9 9  9 9 9
110014 +9 9 9  9 9 9  10 10 10  10 10 10  10 10 10  10 10 10
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110016 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
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110019 +7 7 7  6 6 6  6 6 6  5 5 5  5 5 5  4 4 4
110020 +3 3 3  3 3 3  2 2 2  2 2 2  1 1 1  1 1 1
110021 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
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110033 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
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110055 +2 2 2  3 3 3  3 3 3  4 4 4  5 5 5  5 5 5
110056 +6 6 6  7 7 7  7 7 7  8 8 8  9 9 9  9 9 9
110057 +10 10 10  10 10 10  11 11 11  11 11 11  11 11 11  12 12 12
110058 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110059 +12 12 12  12 12 12  12 12 12  11 11 11  11 11 11  11 11 11
110060 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110061 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110062 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110063 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110064 +12 12 12  12 12 12  11 11 11  11 11 11  11 11 11  10 10 10
110065 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
110066 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
110067 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
110068 +10 10 10  11 11 11  11 11 11  11 11 11  11 11 11  12 12 12
110069 +12 12 12  12 12 12  12 12 12  11 11 11  11 11 11  11 11 11
110070 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110071 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110072 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110073 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110074 +12 12 12  12 12 12  12 12 12  12 12 12  11 11 11  11 11 11
110075 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110076 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110077 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110078 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  13 13 13
110079 +13 13 13  14 14 14  13 13 13  13 13 13  13 13 13  13 13 13
110080 +14 14 14  13 13 13  13 13 13  13 13 13  13 13 13  13 13 13
110081 +13 13 13  13 13 13  13 13 13  13 13 13  13 13 13  12 12 12
110082 +12 12 12  12 12 12  11 11 11  11 11 11  11 11 11  10 10 10
110083 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
110084 +10 10 10  10 10 10  10 10 10  10 10 10  10 10 10  10 10 10
110085 +10 10 10  10 10 10  10 10 10  10 10 10  11 11 11  11 11 11
110086 +11 11 11  11 11 11  12 12 12  12 12 12  12 12 12  12 12 12
110087 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110088 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110089 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  11 11 11
110090 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110091 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110092 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110093 +11 11 11  11 11 11  11 11 11  11 11 11  11 11 11  11 11 11
110094 +11 11 11  11 11 11  12 12 12  12 12 12  12 12 12  12 12 12
110095 +13 13 13  13 13 13  13 13 13  13 13 13  13 13 13  13 13 13
110096 +13 13 13  13 13 13  13 13 13  13 13 13  13 13 13  13 13 13
110097 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110098 +11 11 11  11 11 11  11 11 11  10 10 10  10 10 10  9 9 9
110099 +9 9 9  8 8 8  7 7 7  7 7 7  6 6 6  5 5 5
110100 +5 5 5  4 4 4  3 3 3  3 3 3  2 2 2  1 1 1
110101 +1 1 1  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110102 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110103 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110104 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110105 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110106 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110107 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110108 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110109 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110110 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110111 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110112 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110113 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110114 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110115 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110116 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110117 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110118 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110119 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110120 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110121 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110122 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110123 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110124 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110125 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110126 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110127 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110128 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110129 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110130 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110131 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110132 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110133 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
110134 +0 0 0  0 0 0  1 1 1  1 1 1  2 2 2  3 3 3
110135 +3 3 3  4 4 4  4 4 4  5 5 5  6 6 6  7 7 7
110136 +8 8 8  9 9 9  9 9 9  10 10 10  11 11 11  11 11 11
110137 +12 12 12  12 12 12  13 13 13  13 13 13  13 13 13  14 14 14
110138 +14 14 14  14 14 14  15 14 14  15 14 14  15 14 14  15 14 14
110139 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110140 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110141 +13 13 13  13 13 13  13 13 13  13 13 13  13 13 13  13 13 13
110142 +13 13 13  13 13 13  13 13 13  13 13 13  14 14 14  14 14 14
110143 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110144 +14 14 14  14 14 14  14 14 14  13 13 13  13 13 13  13 13 13
110145 +13 13 13  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110146 +12 12 12  12 12 12  12 12 12  12 12 12  12 12 12  12 12 12
110147 +12 12 12  12 12 12  12 12 12  12 12 12  13 13 13  13 13 13
110148 +13 13 13  13 13 13  13 13 13  13 13 13  14 14 14  14 14 14
110149 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110150 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110151 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110152 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110153 +14 14 14  14 14 14  14 14 14  15 14 14  15 14 14  15 14 14
110154 +15 14 14  15 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110155 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110156 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110157 +14 14 14  14 14 14  14 14 14  14 14 14  14 14 14  14 14 14
110158 +14 14 14  14 14 14  14 14 14  16 16 16  14 14 14  16 16 16
110159 +16 16 16  16 16 16  14 14 14  16 16 16  16 16 16  16 16 16
110160 +16 16 16  16 16 16  16 16 16  16 16 16  16 16 16  16 16 16
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115105 +10 10 10  9 9 9  8 8 8  6 6 6  5 5 5  5 5 5
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115114 +5 5 5  5 5 5  5 5 5  5 5 5  5 5 5  5 5 5
115115 +5 5 5  5 5 5  5 5 5  5 5 5  5 5 5  6 6 6
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115119 +5 5 5  5 5 5  5 5 5  5 5 5  5 5 5  6 6 6
115120 +6 6 6  6 6 6  5 5 5  5 5 5  5 5 5  5 5 5
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124531 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124532 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124533 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124534 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124535 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124536 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124537 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124538 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124539 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124540 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124541 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124542 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124543 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124544 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124545 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124546 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124547 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124548 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124549 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124550 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124551 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124552 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124553 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124554 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124555 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124556 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124557 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124558 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124559 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124560 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124561 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124562 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124563 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124564 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124565 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124566 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124567 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124568 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124569 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124570 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124571 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124572 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124573 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124574 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124575 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124576 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124577 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124578 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124579 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124580 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124581 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124582 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124583 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124584 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124585 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124586 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124587 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124588 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124589 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124590 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124591 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124592 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124593 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124594 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124595 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124596 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124597 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124598 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124599 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124600 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124601 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124602 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124603 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124604 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124605 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124606 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124607 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124608 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124609 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124610 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124611 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124612 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124613 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124614 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124615 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124616 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124617 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124618 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124619 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124620 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124621 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124622 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124623 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124624 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124625 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124626 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124627 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124628 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124629 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124630 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124631 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124632 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124633 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124634 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124635 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124636 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124637 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124638 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124639 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124640 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124641 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124642 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124643 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124644 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124645 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124646 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124647 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124648 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124649 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124650 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124651 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124652 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124653 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124654 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124655 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124656 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124657 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124658 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124659 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124660 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124661 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124662 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124663 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124664 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124665 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124666 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124667 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124668 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124669 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124670 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124671 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124672 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124673 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124674 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124675 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124676 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124677 +0 0 0  0 0 0  0 0 0  0 0 0  0 0 0  0 0 0
124678 Index: linux-2.6.24.7/drivers/video/logo/Makefile
124679 ===================================================================
124680 --- linux-2.6.24.7.orig/drivers/video/logo/Makefile     2008-12-11 22:46:07.000000000 +0100
124681 +++ linux-2.6.24.7/drivers/video/logo/Makefile  2008-12-11 22:46:49.000000000 +0100
124682 @@ -13,6 +13,7 @@ obj-$(CONFIG_LOGO_SUPERH_MONO)                += logo_
124683  obj-$(CONFIG_LOGO_SUPERH_VGA16)                += logo_superh_vga16.o
124684  obj-$(CONFIG_LOGO_SUPERH_CLUT224)      += logo_superh_clut224.o
124685  obj-$(CONFIG_LOGO_M32R_CLUT224)                += logo_m32r_clut224.o
124686 +obj-$(CONFIG_LOGO_OPENMOKO_CLUT224)    += logo_openmoko_clut224.o
124687
124688  obj-$(CONFIG_SPU_BASE)                 += logo_spe_clut224.o
124689
124690 Index: linux-2.6.24.7/drivers/video/s3c2410fb.c
124691 ===================================================================
124692 --- linux-2.6.24.7.orig/drivers/video/s3c2410fb.c       2008-12-11 22:46:07.000000000 +0100
124693 +++ linux-2.6.24.7/drivers/video/s3c2410fb.c    2008-12-11 22:46:49.000000000 +0100
124694 @@ -1028,6 +1028,8 @@ static int s3c2410fb_resume(struct platf
124695
124696         s3c2410fb_init_registers(fbinfo);
124697
124698 +       s3c2410fb_set_par(fbinfo);
124699 +
124700         return 0;
124701  }
124702
124703 Index: linux-2.6.24.7/fs/jffs2/background.c
124704 ===================================================================
124705 --- linux-2.6.24.7.orig/fs/jffs2/background.c   2008-12-11 22:46:07.000000000 +0100
124706 +++ linux-2.6.24.7/fs/jffs2/background.c        2008-12-11 22:46:49.000000000 +0100
124707 @@ -95,13 +95,17 @@ static int jffs2_garbage_collect_thread(
124708                         schedule();
124709                 }
124710
124711 -               /* This thread is purely an optimisation. But if it runs when
124712 -                  other things could be running, it actually makes things a
124713 -                  lot worse. Use yield() and put it at the back of the runqueue
124714 -                  every time. Especially during boot, pulling an inode in
124715 -                  with read_inode() is much preferable to having the GC thread
124716 -                  get there first. */
124717 -               yield();
124718 +               /* Problem - immediately after bootup, the GCD spends a lot
124719 +                * of time in places like jffs2_kill_fragtree(); so much so
124720 +                * that userspace processes (like gdm and X) are starved
124721 +                * despite plenty of cond_resched()s and renicing.  Yield()
124722 +                * doesn't help, either (presumably because userspace and GCD
124723 +                * are generally competing for a higher latency resource -
124724 +                * disk).
124725 +                * This forces the GCD to slow the hell down.   Pulling an
124726 +                * inode in with read_inode() is much preferable to having
124727 +                * the GC thread get there first. */
124728 +               schedule_timeout_interruptible(msecs_to_jiffies(50));
124729
124730                 /* Put_super will send a SIGKILL and then wait on the sem.
124731                  */
124732 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
124733 ===================================================================
124734 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
124735 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h 2008-12-11 22:46:49.000000000 +0100
124736 @@ -0,0 +1,58 @@
124737 +#ifndef _LINUX_FIQ_IPC_H
124738 +#define _LINUX_FIQ_IPC_H
124739 +
124740 +/*
124741 + * this defines the struct which is used to communicate between the FIQ
124742 + * world and the normal linux kernel world.  One of these structs is
124743 + * statically defined for you in the monolithic kernel so the FIQ ISR code
124744 + * can safely touch it any any time.
124745 + *
124746 + * You also want to include this file in your kernel module that wants to
124747 + * communicate with your FIQ code.  Add any kinds of vars that are used by
124748 + * the FIQ ISR and the module in here.
124749 + *
124750 + * To get you started there is just an int that is incremented every FIQ
124751 + * you can remove this when you are ready to customize, but it is useful
124752 + * for testing
124753 + */
124754 +
124755 +#include <asm/arch/pwm.h>
124756 +#include <asm/plat-s3c/regs-timer.h>
124757 +
124758 +enum hdq_bitbang_states {
124759 +       HDQB_IDLE = 0,
124760 +       HDQB_TX_BREAK,
124761 +       HDQB_TX_BREAK_RECOVERY,
124762 +       HDQB_ADS_CALC,
124763 +       HDQB_ADS_LOW,
124764 +       HDQB_ADS_HIGH,
124765 +       HDQB_WAIT_RX,
124766 +       HDQB_DATA_RX_LOW,
124767 +       HDQB_DATA_RX_HIGH,
124768 +       HDQB_WAIT_TX,
124769 +};
124770 +
124771 +struct fiq_ipc {
124772 +       /* vibrator */
124773 +       unsigned long vib_gpio_pin; /* which pin to meddle with */
124774 +       u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
124775 +       u8 vib_pwm_latched;
124776 +
124777 +       /* hdq */
124778 +       u8 hdq_probed; /* nonzero after HDQ driver probed */
124779 +       struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */
124780 +       unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */
124781 +       u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */
124782 +       u8 hdq_tx_data; /* data to tx for write action */
124783 +       u8 hdq_rx_data; /* data received in read action */
124784 +       u8 hdq_request_ctr; /* incremented by "user" to request a transfer */
124785 +       u8 hdq_transaction_ctr; /* incremented after each transfer */
124786 +       u8 hdq_error; /* 0 = no error */
124787 +};
124788 +
124789 +/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
124790 +extern struct fiq_ipc fiq_ipc;
124791 +extern unsigned long _fiq_count_fiqs;
124792 +extern void fiq_kick(void);  /* provoke a FIQ "immediately" */
124793 +
124794 +#endif /* _LINUX_FIQ_IPC_H */
124795 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/glofiish.h
124796 ===================================================================
124797 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
124798 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/glofiish.h      2008-12-11 22:46:49.000000000 +0100
124799 @@ -0,0 +1,39 @@
124800 +#ifndef _GLOFIISH_H
124801 +#define _GLOFIISH_H
124802 +
124803 +#include <asm/arch/regs-gpio.h>
124804 +
124805 +#define M800_GPIO_USB_PULLUP   S3C2410_GPA21
124806 +
124807 +#define M800_GPIO_BACKLIGHT    S3C2410_GPB0
124808 +#define M800_GPIO_KBDLIGHT     S3C2410_GPB1
124809 +#define M800_GPIO_GPS_POWER    S3C2410_GPB6
124810 +
124811 +#define M800_GPIO_BT_POWER_1   S3C2410_GPC8
124812 +#define M800_GPIO_BT_POWER_2   S3C2410_GPC9
124813 +
124814 +#define M800_GPIO_nKEY_POWER   S3C2410_GPF0
124815 +#define M800_GPIO_CPLD         S3C2410_GPF2
124816 +#define M800_GPIO_USB_ATTACH   S3C2410_GPF3
124817 +#define M800_GPIO_WIFI_1       S3C2410_GPF5
124818 +#define M800_GPIO_WIFI_2       S3C2410_GPF7
124819 +
124820 +#define M800_GPIO_FMRADIO      S3C2410_GPG0
124821 +#define M800_GPIO_nKEY_CAMERA  S3C2410_GPG2
124822 +#define M800_GPIO_nKEY_RECORD  S3C2410_GPG4
124823 +#define M800_GPIO_SLIDE                S3C2410_GPG6
124824 +#define M800_GPIO_nSD_DETECT   S3C2410_GPG7
124825 +
124826 +#define M800_IRQ_nKEY_POWER    IRQ_EINT0
124827 +#define M800_IRQ_CPLD_KEY      IRQ_EINT2
124828 +#define M800_IRQ_USB_ATTACH    IRQ_EINT3
124829 +#define M800_IRQ_WIFI_1                IRQ_EINT5
124830 +#define M800_IRQ_WIFI_2                IRQ_EINT7
124831 +#define M800_IRQ_FMRADIO       IRQ_EINT8
124832 +#define M800_IRQ_nKEY_CAMERA   IRQ_EINT10
124833 +#define M800_IRQ_nKEY_RECORD   IRQ_EINT12
124834 +#define M800_IRQ_CAPSENSE      IRQ_EINT13
124835 +#define M800_IRQ_KBD_SLIDE     IRQ_EINT14
124836 +#define M800_IRQ_nSD_DETECT    IRQ_EINT15
124837 +
124838 +#endif
124839 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gpio.h
124840 ===================================================================
124841 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/gpio.h     2008-12-11 22:46:07.000000000 +0100
124842 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gpio.h  2008-12-11 22:46:49.000000000 +0100
124843 @@ -61,6 +61,7 @@ static inline int gpio_direction_output(
124844  #define gpio_to_irq(gpio)              s3c2400_gpio_getirq(gpio)
124845  #else
124846  #define gpio_to_irq(gpio)              s3c2410_gpio_getirq(gpio)
124847 +#define irq_to_gpio(irq)               s3c2410_irq_to_gpio(irq)
124848  #endif
124849
124850  /* FIXME implement irq_to_gpio() */
124851 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta01.h
124852 ===================================================================
124853 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
124854 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta01.h 2008-12-11 22:46:49.000000000 +0100
124855 @@ -0,0 +1,74 @@
124856 +#ifndef _GTA01_H
124857 +#define _GTA01_H
124858 +
124859 +#include <asm/arch/regs-gpio.h>
124860 +#include <asm/arch/irqs.h>
124861 +
124862 +/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
124863 +#define GTA01v3_SYSTEM_REV     0x00000130
124864 +#define GTA01v4_SYSTEM_REV     0x00000140
124865 +#define GTA01Bv2_SYSTEM_REV    0x00000220
124866 +#define GTA01Bv3_SYSTEM_REV    0x00000230
124867 +#define GTA01Bv4_SYSTEM_REV    0x00000240
124868 +
124869 +/* Backlight */
124870 +
124871 +extern void gta01bl_deferred_resume(void);
124872 +
124873 +struct gta01bl_machinfo {
124874 +       unsigned int default_intensity;
124875 +       unsigned int max_intensity;
124876 +       unsigned int limit_mask;
124877 +       unsigned int defer_resume_backlight;
124878 +};
124879 +
124880 +/* Definitions common to all revisions */
124881 +#define GTA01_GPIO_BACKLIGHT   S3C2410_GPB0
124882 +#define GTA01_GPIO_GPS_PWRON   S3C2410_GPB1
124883 +#define GTA01_GPIO_MODEM_RST   S3C2410_GPB6
124884 +#define GTA01_GPIO_MODEM_ON    S3C2410_GPB7
124885 +#define GTA01_GPIO_LCD_RESET   S3C2410_GPC6
124886 +#define GTA01_GPIO_PMU_IRQ     S3C2410_GPG8
124887 +#define GTA01_GPIO_JACK_INSERT S3C2410_GPF4
124888 +#define GTA01_GPIO_nSD_DETECT  S3C2410_GPF5
124889 +#define GTA01_GPIO_AUX_KEY     S3C2410_GPF6
124890 +#define GTA01_GPIO_HOLD_KEY    S3C2410_GPF7
124891 +#define GTA01_GPIO_VIBRATOR_ON S3C2410_GPG11
124892 +
124893 +#define GTA01_IRQ_MODEM                IRQ_EINT1
124894 +#define GTA01_IRQ_JACK_INSERT  IRQ_EINT4
124895 +#define GTA01_IRQ_nSD_DETECT   IRQ_EINT5
124896 +#define GTA01_IRQ_AUX_KEY      IRQ_EINT6
124897 +#define GTA01_IRQ_PCF50606      IRQ_EINT16
124898 +
124899 +/* GTA01v3 */
124900 +#define GTA01v3_GPIO_nGSM_EN   S3C2410_GPG9
124901 +
124902 +/* GTA01v4 */
124903 +#define GTA01_GPIO_MODEM_DNLOAD        S3C2410_GPG0
124904 +
124905 +/* GTA01Bv2 */
124906 +#define GTA01Bv2_GPIO_nGSM_EN  S3C2410_GPF2
124907 +#define GTA01Bv2_GPIO_VIBRATOR_ON S3C2410_GPB10
124908 +
124909 +/* GTA01Bv3 */
124910 +#define GTA01_GPIO_GPS_EN_3V3  S3C2410_GPG9
124911 +
124912 +#define GTA01_GPIO_SDMMC_ON    S3C2410_GPB2
124913 +#define GTA01_GPIO_BT_EN       S3C2410_GPB5
124914 +#define GTA01_GPIO_AB_DETECT   S3C2410_GPB8
124915 +#define GTA01_GPIO_USB_PULLUP  S3C2410_GPB9
124916 +#define GTA01_GPIO_USB_ATTACH  S3C2410_GPB10
124917 +
124918 +#define GTA01_GPIO_GPS_EN_2V8  S3C2410_GPG9
124919 +#define GTA01_GPIO_GPS_EN_3V   S3C2410_GPG10
124920 +#define GTA01_GPIO_GPS_RESET   S3C2410_GPC0
124921 +
124922 +/* GTA01Bv4 */
124923 +#define GTA01Bv4_GPIO_nNAND_WP S3C2410_GPA16
124924 +#define GTA01Bv4_GPIO_VIBRATOR_ON S3C2410_GPB3
124925 +#define GTA01Bv4_GPIO_PMU_IRQ  S3C2410_GPG1
124926 +
124927 +#define GTA01Bv4_IRQ_PCF50606  IRQ_EINT9
124928 +
124929 +#endif /* _GTA01_H */
124930 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta02.h
124931 ===================================================================
124932 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
124933 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/gta02.h 2008-12-11 22:46:49.000000000 +0100
124934 @@ -0,0 +1,109 @@
124935 +#ifndef _GTA02_H
124936 +#define _GTA02_H
124937 +
124938 +#include <asm/arch/regs-gpio.h>
124939 +#include <asm/arch/irqs.h>
124940 +
124941 +/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
124942 +#define GTA02v1_SYSTEM_REV     0x00000310
124943 +#define GTA02v2_SYSTEM_REV     0x00000320
124944 +#define GTA02v3_SYSTEM_REV     0x00000330
124945 +#define GTA02v4_SYSTEM_REV     0x00000340
124946 +#define GTA02v5_SYSTEM_REV     0x00000350
124947 +#define GTA02v6_SYSTEM_REV     0x00000360
124948 +
124949 +#define GTA02_GPIO_n3DL_GSM    S3C2410_GPA13   /* v1 + v2 + v3 only */
124950 +
124951 +#define GTA02_GPIO_PWR_LED1    S3C2410_GPB0
124952 +#define GTA02_GPIO_PWR_LED2    S3C2410_GPB1
124953 +#define GTA02_GPIO_AUX_LED     S3C2410_GPB2
124954 +#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB3
124955 +#define GTA02v1_GPIO_GPS_PWRON S3C2410_GPB4    /* v1 only */
124956 +#define GTA02_GPIO_MODEM_RST   S3C2410_GPB5
124957 +#define GTA02_GPIO_BT_EN       S3C2410_GPB6
124958 +#define GTA02_GPIO_MODEM_ON    S3C2410_GPB7
124959 +#define GTA02v1_GPIO_EN_AGPS3V S3C2410_GPB8    /* v1 only */
124960 +#define GTA02_GPIO_EXTINT8     S3C2410_GPB8
124961 +#define GTA02_GPIO_USB_PULLUP  S3C2410_GPB9
124962 +
124963 +#define GTA02v1_GPIO_nGPS_RST  S3C2410_GPC0    /* v1 only */
124964 +#define GTA02v12_GPIO_PIO3     S3C2410_GPC5    /* v1 + v2 only */
124965 +#define GTA02_GPIO_PIO5                S3C2410_GPC5    /* v3 + v4 only */
124966 +#define GTA02_GPIO_LCD_RESET   S3C2410_GPC6    /* v1 + v2 only */
124967 +#define GTA02v12_GPIO_PIO2     S3C2410_GPC7    /* v1 + v2 only */
124968 +#define GTA02v2_nUSB_FLT       S3C2410_GPC9    /* v2 only */
124969 +#define GTA02v2_nUSB_OC                S3C2410_GPC10   /* v2 only */
124970 +#define GTA02v2_nGSM_OC                S3C2410_GPC12   /* v2 only */
124971 +
124972 +#define GTA02v3_GPIO_nG1_CS    S3C2410_GPD12   /* v3 + v4 only */
124973 +#define GTA02v3_GPIO_nG2_CS    S3C2410_GPD13   /* v3 + v4 only */
124974 +#define GTA02v5_GPIO_HDQ       S3C2410_GPD14   /* v5 + */
124975 +
124976 +#define GTA02_GPIO_nG1_INT     S3C2410_GPF0
124977 +#define GTA02_GPIO_IO1         S3C2410_GPF1
124978 +#define GTA02v1_GPIO_nG2_INT   S3C2410_GPF2    /* v1 only */
124979 +#define GTA02_GPIO_PIO_2       S3C2410_GPF2    /* v2 + v3 + v4 only */
124980 +#define GTA02_GPIO_JACK_INSERT S3C2410_GPF4
124981 +#define GTA02v1_GPIO_nSD_DETECT        S3C2410_GPF5    /* v1 only */
124982 +#define GTA02_GPIO_WLAN_GPIO1  S3C2410_GPF5    /* v2 + v3 + v4 only */
124983 +#define GTA02_GPIO_AUX_KEY     S3C2410_GPF6
124984 +#define GTA02_GPIO_HOLD_KEY    S3C2410_GPF7
124985 +
124986 +#define GTA02_GPIO_3D_IRQ      S3C2410_GPG4
124987 +#define GTA02v1_GPIO_nG1_CS    S3C2410_GPG8    /* v1 only */
124988 +#define GTA02v2_GPIO_nG2_INT   S3C2410_GPG8    /* v2 + v3 + v4 only */
124989 +#define GTA02v3_GPIO_nUSB_OC   S3C2410_GPG9    /* v3 + v4 only */
124990 +#define GTA02v3_GPIO_nUSB_FLT  S3C2410_GPG10   /* v3 + v4 only */
124991 +#define GTA02v1_GPIO_nG2_CS    S3C2410_GPG11   /* v1 only */
124992 +#define GTA02v3_GPIO_nGSM_OC   S3C2410_GPG11   /* v3 + v4 only */
124993 +
124994 +#define GTA02v1_GPIO_3D_RESET  S3C2440_GPJ0    /* v1 only */
124995 +#define GTA02v2_GPIO_BAT_ID    S3C2440_GPJ0    /* v2 only */
124996 +#define GTA02v1_GPIO_WLAN_GPIO8        S3C2440_GPJ1    /* v1 only */
124997 +#define GTA02_GPIO_AMP_SHUT    S3C2440_GPJ1    /* v2 + v3 + v4 only */
124998 +#define GTA02v1_GPIO_WLAN_GPIO10       S3C2440_GPJ2
124999 +#define GTA02_GPIO_HP_IN       S3C2440_GPJ2    /* v2 + v3 + v4 only */
125000 +#define GTA02v1_GPIO_KEEPACT   S3C2440_GPJ3    /* v1 only */
125001 +#define GTA02_GPIO_INT0                S3C2440_GPJ3    /* v2 + v3 + v4 only */
125002 +#define GTA02_GPIO_nGSM_EN     S3C2440_GPJ4
125003 +#define GTA02_GPIO_3D_RESET    S3C2440_GPJ5
125004 +#define GTA02_GPIO_nDL_GSM     S3C2440_GPJ6    /* v4 + v5 only */
125005 +#define GTA02_GPIO_WLAN_GPIO0  S3C2440_GPJ7
125006 +#define GTA02v1_GPIO_BAT_ID    S3C2440_GPJ8
125007 +#define GTA02_GPIO_KEEPACT     S3C2440_GPJ8
125008 +#define GTA02v1_GPIO_AMP_SHUT  S3C2440_GPJ9    /* v1 only */
125009 +#define GTA02v2_nG1_CS         S3C2440_GPJ9    /* v2 only */
125010 +#define GTA02v1_GPIO_HP_IN     S3C2440_GPJ10
125011 +#define GTA02v2_nG2_CS         S3C2440_GPJ10   /* v2 only */
125012 +#define GTA02v1_GPIO_INT0      S3C2440_GPJ11   /* v1 only */
125013 +#define GTA02_CHIP_PWD         S3C2440_GPJ11   /* v2 + v3 + v4 only */
125014 +#define GTA02v1_GPIO_nGSM_EN   S3C2440_GPJ12   /* v1 only */
125015 +#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12   /* v2 + v3 + v4 only */
125016 +
125017 +#define GTA02_IRQ_GSENSOR_1    IRQ_EINT0
125018 +#define GTA02_IRQ_MODEM                IRQ_EINT1
125019 +#define GTA02v1_IRQ_GSENSOR_2  IRQ_EINT2       /* v1 only */
125020 +#define GTA02_IRQ_PIO_2                IRQ_EINT2       /* v2 + v3 + v4 only */
125021 +#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4
125022 +#define GTA02v1_IRQ_nSD_CD     IRQ_EINT5       /* v1 only */
125023 +#define GTA02_IRQ_WLAN_GPIO1   IRQ_EINT5
125024 +#define GTA02_IRQ_AUX          IRQ_EINT6
125025 +#define GTA02_IRQ_nHOLD                IRQ_EINT7
125026 +#define GTA02v1_IRQ_nSIM_CD    IRQ_EINT8       /* v1 only */
125027 +#define GTA02_IRQ_PCF50633     IRQ_EINT9
125028 +#define GTA02_IRQ_3D           IRQ_EINT12
125029 +#define GTA02_IRQ_GSENSOR_2    IRQ_EINT16      /* v2 + v3 + v4 only */
125030 +#define GTA02v3_IRQ_nUSB_OC    IRQ_EINT17      /* v3 + v4 only */
125031 +#define GTA02v3_IRQ_nUSB_FLT   IRQ_EINT18      /* v3 + v4 only */
125032 +#define GTA02v3_IRQ_nGSM_OC    IRQ_EINT19      /* v3 + v4 only */
125033 +
125034 +/* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */
125035 +#define GTA02_PCB_ID1_0                S3C2410_GPC13
125036 +#define GTA02_PCB_ID1_1                S3C2410_GPC15
125037 +#define GTA02_PCB_ID1_2                S3C2410_GPD0
125038 +#define GTA02_PCB_ID2_0                S3C2410_GPD3
125039 +#define GTA02_PCB_ID2_1                S3C2410_GPD4
125040 +
125041 +int gta02_get_pcb_revision(void);
125042 +
125043 +#endif /* _GTA02_H */
125044 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/hardware.h
125045 ===================================================================
125046 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/hardware.h 2008-12-11 22:46:07.000000000 +0100
125047 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/hardware.h      2008-12-11 22:46:49.000000000 +0100
125048 @@ -50,6 +50,8 @@ extern unsigned int s3c2410_gpio_getcfg(
125049
125050  extern int s3c2410_gpio_getirq(unsigned int pin);
125051
125052 +extern int s3c2410_irq_to_gpio(unsigned int irq);
125053 +
125054  #ifdef CONFIG_CPU_S3C2400
125055
125056  extern int s3c2400_gpio_getirq(unsigned int pin);
125057 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/irqs.h
125058 ===================================================================
125059 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/irqs.h     2008-12-11 22:46:07.000000000 +0100
125060 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/irqs.h  2008-12-11 22:46:49.000000000 +0100
125061 @@ -155,9 +155,41 @@
125062  #define IRQ_S3C2443_AC97       S3C2410_IRQSUB(28)
125063
125064  #ifdef CONFIG_CPU_S3C2443
125065 -#define NR_IRQS (IRQ_S3C2443_AC97+1)
125066 +#define _NR_IRQS (IRQ_S3C2443_AC97+1)
125067  #else
125068 -#define NR_IRQS (IRQ_S3C2440_AC97+1)
125069 +#define _NR_IRQS (IRQ_S3C2440_AC97+1)
125070  #endif
125071
125072 +/*
125073 + * The next 16 interrupts are for board specific purposes.  Since
125074 + * the kernel can only run on one machine at a time, we can re-use
125075 + * these.  If you need more, increase IRQ_BOARD_END, but keep it
125076 + * within sensible limits.
125077 + */
125078 +#define IRQ_BOARD_START                _NR_IRQS
125079 +#define IRQ_BOARD_END          (_NR_IRQS + 10)
125080 +
125081 +#if defined(CONFIG_MACH_NEO1973_GTA02)
125082 +#define NR_IRQS                        (IRQ_BOARD_END)
125083 +#else
125084 +#define NR_IRQS                        (IRQ_BOARD_START)
125085 +#endif
125086 +
125087 +/* Neo1973 GTA02 interrupts */
125088 +#define NEO1973_GTA02_IRQ(x)   (IRQ_BOARD_START + (x))
125089 +#define IRQ_GLAMO(x)           NEO1973_GTA02_IRQ(x)
125090 +#define IRQ_GLAMO_HOSTBUS      IRQ_GLAMO(0)
125091 +#define IRQ_GLAMO_JPEG         IRQ_GLAMO(1)
125092 +#define IRQ_GLAMO_MPEG         IRQ_GLAMO(2)
125093 +#define IRQ_GLAMO_MPROC1       IRQ_GLAMO(3)
125094 +#define IRQ_GLAMO_MPROC0       IRQ_GLAMO(4)
125095 +#define IRQ_GLAMO_CMDQUEUE     IRQ_GLAMO(5)
125096 +#define IRQ_GLAMO_2D           IRQ_GLAMO(6)
125097 +#define IRQ_GLAMO_MMC          IRQ_GLAMO(7)
125098 +#define IRQ_GLAMO_RISC         IRQ_GLAMO(8)
125099 +
125100 +/* offset for FIQ IRQ numbers - used by arm fiq.c */
125101 +
125102 +#define FIQ_START 0
125103 +
125104  #endif /* __ASM_ARCH_IRQ_H */
125105 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/mci.h
125106 ===================================================================
125107 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125108 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/mci.h   2008-12-11 22:46:49.000000000 +0100
125109 @@ -0,0 +1,14 @@
125110 +#ifndef _ARCH_MCI_H
125111 +#define _ARCH_MCI_H
125112 +
125113 +struct s3c24xx_mci_pdata {
125114 +       unsigned int    gpio_detect;
125115 +       unsigned int    gpio_wprotect;
125116 +       unsigned long   ocr_avail;
125117 +       unsigned int    do_dma;
125118 +       void            (*set_power)(unsigned char power_mode,
125119 +                                    unsigned short vdd);
125120 +       int             (*use_slow)(void);
125121 +};
125122 +
125123 +#endif /* _ARCH_NCI_H */
125124 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/neo1973-pm-gsm.h
125125 ===================================================================
125126 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125127 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/neo1973-pm-gsm.h        2008-12-11 22:46:49.000000000 +0100
125128 @@ -0,0 +1 @@
125129 +extern int gta_gsm_interrupts;
125130 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/pwm.h
125131 ===================================================================
125132 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125133 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/pwm.h   2008-12-11 22:46:49.000000000 +0100
125134 @@ -0,0 +1,40 @@
125135 +#ifndef __S3C2410_PWM_H
125136 +#define __S3C2410_PWM_H
125137 +
125138 +#include <linux/err.h>
125139 +#include <linux/platform_device.h>
125140 +#include <linux/clk.h>
125141 +
125142 +#include <asm-arm/io.h>
125143 +#include <asm/arch/hardware.h>
125144 +#include <asm/mach-types.h>
125145 +#include <asm/plat-s3c/regs-timer.h>
125146 +#include <asm/arch/gta01.h>
125147 +
125148 +enum pwm_timer {
125149 +       PWM0,
125150 +       PWM1,
125151 +       PWM2,
125152 +       PWM3,
125153 +       PWM4
125154 +};
125155 +
125156 +struct s3c2410_pwm {
125157 +       enum pwm_timer timerid;
125158 +       struct clk *pclk;
125159 +       unsigned long pclk_rate;
125160 +       unsigned long prescaler;
125161 +       unsigned long divider;
125162 +       unsigned long counter;
125163 +       unsigned long comparer;
125164 +};
125165 +
125166 +int s3c2410_pwm_init(struct s3c2410_pwm *s3c2410_pwm);
125167 +int s3c2410_pwm_enable(struct s3c2410_pwm *s3c2410_pwm);
125168 +int s3c2410_pwm_disable(struct s3c2410_pwm *s3c2410_pwm);
125169 +int s3c2410_pwm_start(struct s3c2410_pwm *s3c2410_pwm);
125170 +int s3c2410_pwm_stop(struct s3c2410_pwm *s3c2410_pwm);
125171 +int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *s3c2410_pwm);
125172 +int s3c2410_pwm_dumpregs(void);
125173 +
125174 +#endif /* __S3C2410_PWM_H */
125175 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-dsc.h
125176 ===================================================================
125177 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/regs-dsc.h 2008-12-11 22:46:07.000000000 +0100
125178 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-dsc.h      2008-12-11 22:46:49.000000000 +0100
125179 @@ -19,7 +19,7 @@
125180  #define S3C2412_DSC1      S3C2410_GPIOREG(0xe0)
125181  #endif
125182
125183 -#if defined(CONFIG_CPU_S3C2440)
125184 +#if defined(CONFIG_CPU_S3C244X)
125185
125186  #define S3C2440_DSC0      S3C2410_GPIOREG(0xc4)
125187  #define S3C2440_DSC1      S3C2410_GPIOREG(0xc8)
125188 @@ -178,7 +178,7 @@
125189  #define S3C2440_DSC1_CS0_4mA    (3<<0)
125190  #define S3C2440_DSC1_CS0_MASK   (3<<0)
125191
125192 -#endif /* CONFIG_CPU_S3C2440 */
125193 +#endif /* CONFIG_CPU_S3C244X */
125194
125195  #endif /* __ASM_ARCH_REGS_DSC_H */
125196
125197 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-sdi.h
125198 ===================================================================
125199 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/regs-sdi.h 2008-12-11 22:46:07.000000000 +0100
125200 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/regs-sdi.h      2008-12-11 22:46:49.000000000 +0100
125201 @@ -28,9 +28,17 @@
125202  #define S3C2410_SDIDCNT               (0x30)
125203  #define S3C2410_SDIDSTA               (0x34)
125204  #define S3C2410_SDIFSTA               (0x38)
125205 +
125206  #define S3C2410_SDIDATA               (0x3C)
125207 +#define S3C2410_SDIDATA_BYTE          (0x3C)
125208  #define S3C2410_SDIIMSK               (0x40)
125209
125210 +#define S3C2440_SDIDATA               (0x40)
125211 +#define S3C2440_SDIDATA_BYTE          (0x48)
125212 +#define S3C2440_SDIIMSK               (0x3C)
125213 +
125214 +#define S3C2440_SDICON_SDRESET        (1<<8)
125215 +#define S3C2440_SDICON_MMCCLOCK       (1<<5)
125216  #define S3C2410_SDICON_BYTEORDER      (1<<4)
125217  #define S3C2410_SDICON_SDIOIRQ        (1<<3)
125218  #define S3C2410_SDICON_RWAITEN        (1<<2)
125219 @@ -42,7 +50,8 @@
125220  #define S3C2410_SDICMDCON_LONGRSP     (1<<10)
125221  #define S3C2410_SDICMDCON_WAITRSP     (1<<9)
125222  #define S3C2410_SDICMDCON_CMDSTART    (1<<8)
125223 -#define S3C2410_SDICMDCON_INDEX       (0xff)
125224 +#define S3C2410_SDICMDCON_SENDERHOST  (1<<6)
125225 +#define S3C2410_SDICMDCON_INDEX       (0x3f)
125226
125227  #define S3C2410_SDICMDSTAT_CRCFAIL    (1<<12)
125228  #define S3C2410_SDICMDSTAT_CMDSENT    (1<<11)
125229 @@ -51,6 +60,9 @@
125230  #define S3C2410_SDICMDSTAT_XFERING    (1<<8)
125231  #define S3C2410_SDICMDSTAT_INDEX      (0xff)
125232
125233 +#define S3C2440_SDIDCON_DS_BYTE       (0<<22)
125234 +#define S3C2440_SDIDCON_DS_HALFWORD   (1<<22)
125235 +#define S3C2440_SDIDCON_DS_WORD       (2<<22)
125236  #define S3C2410_SDIDCON_IRQPERIOD     (1<<21)
125237  #define S3C2410_SDIDCON_TXAFTERRESP   (1<<20)
125238  #define S3C2410_SDIDCON_RXAFTERCMD    (1<<19)
125239 @@ -59,6 +71,7 @@
125240  #define S3C2410_SDIDCON_WIDEBUS       (1<<16)
125241  #define S3C2410_SDIDCON_DMAEN         (1<<15)
125242  #define S3C2410_SDIDCON_STOP          (1<<14)
125243 +#define S3C2440_SDIDCON_DATSTART      (1<<14)
125244  #define S3C2410_SDIDCON_DATMODE              (3<<12)
125245  #define S3C2410_SDIDCON_BLKNUM        (0x7ff)
125246
125247 @@ -68,6 +81,7 @@
125248  #define S3C2410_SDIDCON_XFER_RXSTART  (2<<12)
125249  #define S3C2410_SDIDCON_XFER_TXSTART  (3<<12)
125250
125251 +#define S3C2410_SDIDCON_BLKNUM_MASK   (0xFFF)
125252  #define S3C2410_SDIDCNT_BLKNUM_SHIFT  (12)
125253
125254  #define S3C2410_SDIDSTA_RDYWAITREQ    (1<<10)
125255 @@ -82,10 +96,12 @@
125256  #define S3C2410_SDIDSTA_TXDATAON      (1<<1)
125257  #define S3C2410_SDIDSTA_RXDATAON      (1<<0)
125258
125259 +#define S3C2440_SDIFSTA_FIFORESET      (1<<16)
125260 +#define S3C2440_SDIFSTA_FIFOFAIL       (3<<14)  /* 3 is correct (2 bits) */
125261  #define S3C2410_SDIFSTA_TFDET          (1<<13)
125262  #define S3C2410_SDIFSTA_RFDET          (1<<12)
125263 -#define S3C2410_SDIFSTA_TXHALF         (1<<11)
125264 -#define S3C2410_SDIFSTA_TXEMPTY        (1<<10)
125265 +#define S3C2410_SDIFSTA_TFHALF         (1<<11)
125266 +#define S3C2410_SDIFSTA_TFEMPTY        (1<<10)
125267  #define S3C2410_SDIFSTA_RFLAST         (1<<9)
125268  #define S3C2410_SDIFSTA_RFFULL         (1<<8)
125269  #define S3C2410_SDIFSTA_RFHALF         (1<<7)
125270 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/s3c24xx-serial.h
125271 ===================================================================
125272 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125273 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/s3c24xx-serial.h        2008-12-11 22:46:49.000000000 +0100
125274 @@ -0,0 +1,5 @@
125275 +#include <linux/resume-dependency.h>
125276 +
125277 +extern void s3c24xx_serial_console_set_silence(int silence);
125278 +extern void s3c24xx_serial_register_resume_dependency(struct resume_dependency *
125279 +                                            resume_dependency, int uart_index);
125280 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/spi-gpio.h
125281 ===================================================================
125282 --- linux-2.6.24.7.orig/include/asm-arm/arch-s3c2410/spi-gpio.h 2008-12-11 22:46:07.000000000 +0100
125283 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/spi-gpio.h      2008-12-11 22:46:49.000000000 +0100
125284 @@ -22,11 +22,12 @@ struct s3c2410_spigpio_info {
125285         unsigned long            pin_miso;
125286
125287         int                      bus_num;
125288 +       int                      num_chipselect;
125289
125290         unsigned long            board_size;
125291         struct spi_board_info   *board_info;
125292
125293 -       void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
125294 +       void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs);
125295  };
125296
125297
125298 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2410/ts.h
125299 ===================================================================
125300 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125301 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2410/ts.h    2008-12-11 22:46:49.000000000 +0100
125302 @@ -0,0 +1,30 @@
125303 +/* linux/include/asm/arch-s3c2410/ts.h
125304 + *
125305 + * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
125306 + *
125307 + *
125308 + * This program is free software; you can redistribute it and/or modify
125309 + * it under the terms of the GNU General Public License version 2 as
125310 + * published by the Free Software Foundation.
125311 + *
125312 + *
125313 + *  Changelog:
125314 + *     24-Mar-2005     RTP     Created file
125315 + *     03-Aug-2005     RTP     Renamed to ts.h
125316 + */
125317 +
125318 +#ifndef __ASM_ARM_TS_H
125319 +#define __ASM_ARM_TS_H
125320 +
125321 +struct s3c2410_ts_mach_info {
125322 +       int             delay;
125323 +       int             presc;
125324 +       int             oversampling_shift;
125325 +       int             excursion_filter_len_bits;
125326 +       int             reject_threshold_vs_avg;
125327 +};
125328 +
125329 +void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info);
125330 +
125331 +#endif /* __ASM_ARM_TS_H */
125332 +
125333 Index: linux-2.6.24.7/include/asm-arm/arch-s3c2440/hxd8.h
125334 ===================================================================
125335 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125336 +++ linux-2.6.24.7/include/asm-arm/arch-s3c2440/hxd8.h  2008-12-11 22:46:49.000000000 +0100
125337 @@ -0,0 +1,16 @@
125338 +#ifndef _HXD8_H
125339 +#define _HXD8_H
125340 +
125341 +#include <asm/arch/regs-gpio.h>
125342 +#include <asm/arch/irqs.h>
125343 +
125344 +#define HXD8v1_SYSTEM_REV      0x00000110
125345 +
125346 +#define HXD8_GPIO_USB_CUR_SEL  S3C2410_GPA0
125347 +#define HXD8_GPIO_BACKLIGHT    S3C2410_GPB0
125348 +#define HXD8_GPIO_USB_PULLUP   S3C2410_GPB9
125349 +#define HXD8_GPIO_PCF50606     S3C2410_GPF6
125350 +
125351 +#define HXD8_IRQ_PCF50606      IRQ_EINT6
125352 +
125353 +#endif
125354 Index: linux-2.6.24.7/include/asm-arm/kexec.h
125355 ===================================================================
125356 --- linux-2.6.24.7.orig/include/asm-arm/kexec.h 2008-12-11 22:46:07.000000000 +0100
125357 +++ linux-2.6.24.7/include/asm-arm/kexec.h      2008-12-11 22:46:49.000000000 +0100
125358 @@ -1,8 +1,6 @@
125359  #ifndef _ARM_KEXEC_H
125360  #define _ARM_KEXEC_H
125361
125362 -#ifdef CONFIG_KEXEC
125363 -
125364  /* Maximum physical address we can use pages from */
125365  #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
125366  /* Maximum address we can reach in physical address mode */
125367 @@ -16,6 +14,11 @@
125368
125369  #define KEXEC_BOOT_PARAMS_SIZE 1536
125370
125371 +#ifdef CONFIG_KEXEC
125372 +
125373 +#define KEXEC_ARM_ATAGS_OFFSET  0x1000
125374 +#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
125375 +
125376  #ifndef __ASSEMBLY__
125377
125378  struct kimage;
125379 Index: linux-2.6.24.7/include/asm-arm/plat-s3c/nand.h
125380 ===================================================================
125381 --- linux-2.6.24.7.orig/include/asm-arm/plat-s3c/nand.h 2008-12-11 22:46:07.000000000 +0100
125382 +++ linux-2.6.24.7/include/asm-arm/plat-s3c/nand.h      2008-12-11 22:46:49.000000000 +0100
125383 @@ -21,9 +21,12 @@
125384   * partitions   = mtd partition list
125385  */
125386
125387 +#define S3C2410_NAND_BBT       0x0001
125388 +
125389  struct s3c2410_nand_set {
125390         int                     nr_chips;
125391         int                     nr_partitions;
125392 +       unsigned int            flags;
125393         char                    *name;
125394         int                     *nr_map;
125395         struct mtd_partition    *partitions;
125396 @@ -39,6 +42,9 @@ struct s3c2410_platform_nand {
125397         int                     nr_sets;
125398         struct s3c2410_nand_set *sets;
125399
125400 +       /* force software_ecc at runtime */
125401 +       int     software_ecc;
125402 +
125403         void                    (*select_chip)(struct s3c2410_nand_set *,
125404                                                int chip);
125405  };
125406 Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/devs.h
125407 ===================================================================
125408 --- linux-2.6.24.7.orig/include/asm-arm/plat-s3c24xx/devs.h     2008-12-11 22:46:07.000000000 +0100
125409 +++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/devs.h  2008-12-11 22:46:49.000000000 +0100
125410 @@ -42,6 +42,7 @@ extern struct platform_device s3c_device
125411  extern struct platform_device s3c_device_timer3;
125412
125413  extern struct platform_device s3c_device_usbgadget;
125414 +extern struct platform_device s3c_device_ts;
125415
125416  /* s3c2440 specific devices */
125417
125418 Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/irq.h
125419 ===================================================================
125420 --- linux-2.6.24.7.orig/include/asm-arm/plat-s3c24xx/irq.h      2008-12-11 22:46:07.000000000 +0100
125421 +++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/irq.h   2008-12-11 22:46:49.000000000 +0100
125422 @@ -23,8 +23,15 @@ s3c_irqsub_mask(unsigned int irqno, unsi
125423  {
125424         unsigned long mask;
125425         unsigned long submask;
125426 +#ifdef CONFIG_S3C2440_C_FIQ
125427 +       unsigned long flags;
125428 +#endif
125429
125430         submask = __raw_readl(S3C2410_INTSUBMSK);
125431 +#ifdef CONFIG_S3C2440_C_FIQ
125432 +       local_save_flags(flags);
125433 +       local_fiq_disable();
125434 +#endif
125435         mask = __raw_readl(S3C2410_INTMSK);
125436
125437         submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
125438 @@ -37,6 +44,9 @@ s3c_irqsub_mask(unsigned int irqno, unsi
125439
125440         /* write back masks */
125441         __raw_writel(submask, S3C2410_INTSUBMSK);
125442 +#ifdef CONFIG_S3C2440_C_FIQ
125443 +       local_irq_restore(flags);
125444 +#endif
125445
125446  }
125447
125448 @@ -45,8 +55,15 @@ s3c_irqsub_unmask(unsigned int irqno, un
125449  {
125450         unsigned long mask;
125451         unsigned long submask;
125452 +#ifdef CONFIG_S3C2440_C_FIQ
125453 +       unsigned long flags;
125454 +#endif
125455
125456         submask = __raw_readl(S3C2410_INTSUBMSK);
125457 +#ifdef CONFIG_S3C2440_C_FIQ
125458 +       local_save_flags(flags);
125459 +       local_fiq_disable();
125460 +#endif
125461         mask = __raw_readl(S3C2410_INTMSK);
125462
125463         submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
125464 @@ -55,6 +72,9 @@ s3c_irqsub_unmask(unsigned int irqno, un
125465         /* write back masks */
125466         __raw_writel(submask, S3C2410_INTSUBMSK);
125467         __raw_writel(mask, S3C2410_INTMSK);
125468 +#ifdef CONFIG_S3C2440_C_FIQ
125469 +       local_irq_restore(flags);
125470 +#endif
125471  }
125472
125473
125474 Index: linux-2.6.24.7/include/asm-arm/plat-s3c24xx/neo1973.h
125475 ===================================================================
125476 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125477 +++ linux-2.6.24.7/include/asm-arm/plat-s3c24xx/neo1973.h       2008-12-11 22:46:49.000000000 +0100
125478 @@ -0,0 +1,33 @@
125479 +/*
125480 + * include/asm-arm/plat-s3c24xx/neo1973.h
125481 + *
125482 + * Common utility code for GTA01 and GTA02
125483 + *
125484 + * Copyright (C) 2008 by Openmoko, Inc.
125485 + * Author: Holger Hans Peter Freyther <freyther@openmoko.org>
125486 + * All rights reserved.
125487 + *
125488 + * This program is free software; you can redistribute it and/or
125489 + * modify it under the terms of the GNU General Public License as
125490 + * published by the Free Software Foundation; either version 2 of
125491 + * the License, or (at your option) any later version.
125492 + *
125493 + * This program is distributed in the hope that it will be useful,
125494 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
125495 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
125496 + * GNU General Public License for more details.
125497 + *
125498 + * You should have received a copy of the GNU General Public License
125499 + * along with this program; if not, write to the Free Software
125500 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
125501 + * MA 02111-1307 USA
125502 + *
125503 + */
125504 +
125505 +#ifndef NEO1973_H
125506 +#define NEO1973_H
125507 +
125508 +void neo1973_gpb_add_shadow_gpio(unsigned int gpio);
125509 +void neo1973_gpb_setpin(unsigned int pin, unsigned to);
125510 +
125511 +#endif
125512 Index: linux-2.6.24.7/include/linux/bq27000_battery.h
125513 ===================================================================
125514 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125515 +++ linux-2.6.24.7/include/linux/bq27000_battery.h      2008-12-11 22:46:49.000000000 +0100
125516 @@ -0,0 +1,16 @@
125517 +#ifndef __BQ27000_BATTERY_H__
125518 +#define __BQ27000_BATTERY_H__
125519 +
125520 +void bq27000_charging_state_change(struct platform_device *pdev);
125521 +
125522 +struct bq27000_platform_data {
125523 +       const char      *name;
125524 +       int             rsense_mohms;
125525 +       int (*hdq_read)(int);
125526 +       int (*hdq_write)(int, u8);
125527 +       int (*hdq_initialized)(void);
125528 +       int (*get_charger_online_status)(void);
125529 +       int (*get_charger_active_status)(void);
125530 +};
125531 +
125532 +#endif
125533 Index: linux-2.6.24.7/include/linux/fb.h
125534 ===================================================================
125535 --- linux-2.6.24.7.orig/include/linux/fb.h      2008-12-11 22:46:07.000000000 +0100
125536 +++ linux-2.6.24.7/include/linux/fb.h   2008-12-11 22:46:49.000000000 +0100
125537 @@ -120,6 +120,7 @@ struct dentry;
125538  #define FB_ACCEL_XGI_VOLARI_V  47      /* XGI Volari V3XT, V5, V8      */
125539  #define FB_ACCEL_XGI_VOLARI_Z  48      /* XGI Volari Z7                */
125540  #define FB_ACCEL_OMAP1610      49      /* TI OMAP16xx                  */
125541 +#define FB_ACCEL_GLAMO         50      /* SMedia Glamo                 */
125542  #define FB_ACCEL_NEOMAGIC_NM2070 90    /* NeoMagic NM2070              */
125543  #define FB_ACCEL_NEOMAGIC_NM2090 91    /* NeoMagic NM2090              */
125544  #define FB_ACCEL_NEOMAGIC_NM2093 92    /* NeoMagic NM2093              */
125545 Index: linux-2.6.24.7/include/linux/glamofb.h
125546 ===================================================================
125547 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125548 +++ linux-2.6.24.7/include/linux/glamofb.h      2008-12-11 22:46:49.000000000 +0100
125549 @@ -0,0 +1,48 @@
125550 +#ifndef _LINUX_GLAMOFB_H
125551 +#define _LINUX_GLAMOFB_H
125552 +
125553 +#include <linux/spi/glamo.h>
125554 +#include <linux/resume-dependency.h>
125555 +
125556 +struct glamofb_val {
125557 +       unsigned int defval;
125558 +       unsigned int min;
125559 +       unsigned int max;
125560 +};
125561 +
125562 +struct glamo_core;
125563 +
125564 +struct glamofb_platform_data {
125565 +       int width, height;
125566 +       int pixclock;
125567 +       int left_margin, right_margin;
125568 +       int upper_margin, lower_margin;
125569 +       int hsync_len, vsync_len;
125570 +       int fb_mem_size;
125571 +
125572 +       struct glamofb_val xres;
125573 +       struct glamofb_val yres;
125574 +       struct glamofb_val bpp;
125575 +
125576 +       struct glamo_spi_info *spi_info;
125577 +       struct glamo_spigpio_info *spigpio_info;
125578 +       struct glamo_core *glamo;
125579 +
125580 +       /* glamo mmc platform specific info */
125581 +       void            (*glamo_set_mci_power)(unsigned char power_mode,
125582 +                                    unsigned short vdd);
125583 +       /* glamo-mci asking if it should use the slow clock to card */
125584 +       int             (*glamo_mci_use_slow)(void);
125585 +       int             (*glamo_irq_is_wired)(void);
125586 +       void            (*mci_suspending)(struct platform_device *dev);
125587 +       int             (*mci_all_dependencies_resumed)(struct platform_device
125588 +                                                                         *dev);
125589 +};
125590 +
125591 +int glamofb_cmd_mode(struct glamofb_handle *gfb, int on);
125592 +int glamofb_cmd_write(struct glamofb_handle *gfb, u_int16_t val);
125593 +void glamo_lcm_reset(int level);
125594 +extern void
125595 +glamo_register_resume_dependency(struct resume_dependency * resume_dependency);
125596 +
125597 +#endif
125598 Index: linux-2.6.24.7/include/linux/glamo-gpio.h
125599 ===================================================================
125600 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125601 +++ linux-2.6.24.7/include/linux/glamo-gpio.h   2008-12-11 22:46:49.000000000 +0100
125602 @@ -0,0 +1,99 @@
125603 +#ifndef __GLAMO_GPIO_H
125604 +#define __GLAMO_GPIO_H
125605 +
125606 +struct glamo_core;
125607 +
125608 +#define GLAMO_GPIO_BANKA       0x0000
125609 +#define GLAMO_GPIO_BANKB       0x1000
125610 +#define GLAMO_GPIO_BANKC       0x2000
125611 +#define GLAMO_GPIO_BANKD       0x3000
125612 +
125613 +#define GLAMO_GPIONO(bank, pin)        ((bank & 0xf000) | ((pin & 0xf) << 8))
125614 +
125615 +#define GLAMO_GPIO_F_IN                0x0010
125616 +#define GLAMO_GPIO_F_OUT       0x0020
125617 +#define GLAMO_GPIO_F_FUNC      0x0030
125618 +
125619 +#define GLAMO_GPIO0            GLAMO_GPIONO(GLAMO_GPIO_BANKA, 0)
125620 +#define GLAMO_GPIO0_INPUT      (GLAMO_GPIO0 | GLAMO_GPIO_F_IN)
125621 +#define GLAMO_GPIO0_OUTPUT     (GLAMO_GPIO0 | GLAMO_GPIO_F_OUT)
125622 +#define GLAMO_GPIO0_HA20       (GLAMO_GPIO0 | GLAMO_GPIO_F_FUNC)
125623 +
125624 +#define GLAMO_GPIO1            GLAMO_GPIONO(GLAMO_GPIO_BANKA, 1)
125625 +#define GLAMO_GPIO1_INPUT      (GLAMO_GPIO1 | GLAMO_GPIO_F_IN)
125626 +#define GLAMO_GPIO1_OUTPUT     (GLAMO_GPIO1 | GLAMO_GPIO_F_OUT)
125627 +#define GLAMO_GPIO1_HA21       (GLAMO_GPIO1 | GLAMO_GPIO_F_FUNC)
125628 +
125629 +#define GLAMO_GPIO2            GLAMO_GPIONO(GLAMO_GPIO_BANKA, 2)
125630 +#define GLAMO_GPIO2_INPUT      (GLAMO_GPIO2 | GLAMO_GPIO_F_IN)
125631 +#define GLAMO_GPIO2_OUTPUT     (GLAMO_GPIO2 | GLAMO_GPIO_F_OUT)
125632 +#define GLAMO_GPIO2_HA22       (GLAMO_GPIO2 | GLAMO_GPIO_F_FUNC)
125633 +
125634 +#define GLAMO_GPIO3            GLAMO_GPIONO(GLAMO_GPIO_BANKA, 3)
125635 +#define GLAMO_GPIO3_INPUT      (GLAMO_GPIO3 | GLAMO_GPIO_F_IN)
125636 +#define GLAMO_GPIO3_OUTPUT     (GLAMO_GPIO3 | GLAMO_GPIO_F_OUT)
125637 +#define        GLAMO_GPIO3_HA23        (GLAMO_GPIO3 | GLAMO_GPIO_F_FUNC)
125638 +
125639 +#define GLAMO_GPIO4            GLAMO_GPIONO(GLAMO_GPIO_BANKB, 0)
125640 +#define GLAMO_GPIO4_INPUT      (GLAMO_GPIO4 | GLAMO_GPIO_F_IN)
125641 +#define GLAMO_GPIO4_OUTPUT     (GLAMO_GPIO4 | GLAMO_GPIO_F_OUT)
125642 +#define GLAMO_GPIO4_nLCS0      (GLAMO_GPIO4 | GLAMO_GPIO_F_FUNC)
125643 +
125644 +#define GLAMO_GPIO5            GLAMO_GPIONO(GLAMO_GPIO_BANKB, 1)
125645 +#define GLAMO_GPIO5_INPUT      (GLAMO_GPIO5 | GLAMO_GPIO_F_IN)
125646 +#define GLAMO_GPIO5_OUTPUT     (GLAMO_GPIO5 | GLAMO_GPIO_F_OUT)
125647 +#define GLAMO_GPIO5_nLCS1      (GLAMO_GPIO5 | GLAMO_GPIO_F_FUNC)
125648 +
125649 +#define GLAMO_GPIO6            GLAMO_GPIONO(GLAMO_GPIO_BANKB, 2)
125650 +#define GLAMO_GPIO6_INPUT      (GLAMO_GPIO6 | GLAMO_GPIO_F_IN)
125651 +#define GLAMO_GPIO6_OUTPUT     (GLAMO_GPIO6 | GLAMO_GPIO_F_OUT)
125652 +#define GLAMO_GPIO6_LDCLK      (GLAMO_GPIO6 | GLAMO_GPIO_F_FUNC)
125653 +
125654 +#define GLAMO_GPIO7            GLAMO_GPIONO(GLAMO_GPIO_BANKB, 3)
125655 +#define GLAMO_GPIO7_INPUT      (GLAMO_GPIO7 | GLAMO_GPIO_F_IN)
125656 +#define GLAMO_GPIO7_OUTPUT     (GLAMO_GPIO7 | GLAMO_GPIO_F_OUT)
125657 +#define GLAMO_GPIO7_nLDE       (GLAMO_GPIO7 | GLAMO_GPIO_F_FUNC)
125658 +
125659 +#define GLAMO_GPIO8            GLAMO_GPIONO(GLAMO_GPIO_BANKC, 0)
125660 +#define GLAMO_GPIO8_INPUT      (GLAMO_GPIO8 | GLAMO_GPIO_F_IN)
125661 +#define GLAMO_GPIO8_OUTPUT     (GLAMO_GPIO8 | GLAMO_GPIO_F_OUT)
125662 +#define GLAMO_GPIO8_LD16       (GLAMO_GPIO8 | GLAMO_GPIO_F_FUNC)
125663 +
125664 +#define GLAMO_GPIO9            GLAMO_GPIONO(GLAMO_GPIO_BANKC, 1)
125665 +#define GLAMO_GPIO9_INPUT      (GLAMO_GPIO9 | GLAMO_GPIO_F_IN)
125666 +#define GLAMO_GPIO9_OUTPUT     (GLAMO_GPIO9 | GLAMO_GPIO_F_OUT)
125667 +#define GLAMO_GPIO9_LD17       (GLAMO_GPIO9 | GLAMO_GPIO_F_FUNC)
125668 +
125669 +#define GLAMO_GPIO10           GLAMO_GPIONO(GLAMO_GPIO_BANKC, 2)
125670 +#define GLAMO_GPIO10_INPUT     (GLAMO_GPIO10 | GLAMO_GPIO_F_IN)
125671 +#define GLAMO_GPIO10_OUTPUT    (GLAMO_GPIO10 | GLAMO_GPIO_F_OUT)
125672 +#define GLAMO_GPIO10_LSCK      (GLAMO_GPIO10 | GLAMO_GPIO_F_FUNC)
125673 +
125674 +#define GLAMO_GPIO11           GLAMO_GPIONO(GLAMO_GPIO_BANKC, 3)
125675 +#define GLAMO_GPIO11_INPUT     (GLAMO_GPIO11 | GLAMO_GPIO_F_IN)
125676 +#define GLAMO_GPIO11_OUTPUT    (GLAMO_GPIO11 | GLAMO_GPIO_F_OUT)
125677 +#define GLAMO_GPIO11_LSDA      (GLAMO_GPIO11 | GLAMO_GPIO_F_FUNC)
125678 +
125679 +#define GLAMO_GPIO12           GLAMO_GPIONO(GLAMO_GPIO_BANKD, 0)
125680 +#define GLAMO_GPIO12_INPUT     (GLAMO_GPIO12 | GLAMO_GPIO_F_IN)
125681 +#define GLAMO_GPIO12_OUTPUT    (GLAMO_GPIO12 | GLAMO_GPIO_F_OUT)
125682 +#define GLAMO_GPIO12_LSA0      (GLAMO_GPIO12 | GLAMO_GPIO_F_FUNC)
125683 +
125684 +
125685 +#define REG_OF_GPIO(gpio)      (((gpio & 0xf000) >> 12)*2 \
125686 +                                               + GLAMO_REG_GPIO_GEN1)
125687 +#define NUM_OF_GPIO(gpio)      ((gpio & 0x0f00) >> 8)
125688 +#define GPIO_OUT_BIT(gpio)     (1 << (NUM_OF_GPIO(gpio) + 0))
125689 +#define OUTPUT_BIT(gpio)       (1 << (NUM_OF_GPIO(gpio) + 4))
125690 +#define INPUT_BIT(gpio)                (1 << (NUM_OF_GPIO(gpio) + 8))
125691 +#define FUNC_BIT(gpio)         (1 << (NUM_OF_GPIO(gpio) + 12))
125692 +
125693 +void glamo_gpio_setpin(struct glamo_core *glamo, unsigned int pin,
125694 +                      unsigned int value);
125695 +
125696 +int glamo_gpio_getpin(struct glamo_core *glamo, unsigned int pin);
125697 +
125698 +void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc);
125699 +
125700 +
125701 +#endif /* _GLAMO_GPIO */
125702 Index: linux-2.6.24.7/include/linux/gta02_hdq.h
125703 ===================================================================
125704 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125705 +++ linux-2.6.24.7/include/linux/gta02_hdq.h    2008-12-11 22:46:49.000000000 +0100
125706 @@ -0,0 +1,8 @@
125707 +#ifndef __GTA02HDQ_H__
125708 +#define __GTA02HDQ_H__
125709 +
125710 +int gta02hdq_read(int address);
125711 +int gta02hdq_write(int address, u8 data);
125712 +int gta02hdq_initialized(void);
125713 +
125714 +#endif
125715 Index: linux-2.6.24.7/include/linux/i2c-id.h
125716 ===================================================================
125717 --- linux-2.6.24.7.orig/include/linux/i2c-id.h  2008-12-11 22:46:07.000000000 +0100
125718 +++ linux-2.6.24.7/include/linux/i2c-id.h       2008-12-11 22:46:49.000000000 +0100
125719 @@ -167,6 +167,10 @@
125720  #define I2C_DRIVERID_FSCHER 1046
125721  #define I2C_DRIVERID_W83L785TS 1047
125722  #define I2C_DRIVERID_OV7670 1048       /* Omnivision 7670 camera */
125723 +#define I2C_DRIVERID_PCF50606 1049
125724 +#define I2C_DRIVERID_TSL256X 1050
125725 +#define I2C_DRIVERID_PCF50633 1051
125726 +#define I2C_DRIVERID_PCA9632  1052
125727
125728  /*
125729   * ---- Adapter types ----------------------------------------------------
125730 Index: linux-2.6.24.7/include/linux/jbt6k74.h
125731 ===================================================================
125732 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125733 +++ linux-2.6.24.7/include/linux/jbt6k74.h      2008-12-11 22:46:49.000000000 +0100
125734 @@ -0,0 +1,13 @@
125735 +#ifndef __JBT6K74_H__
125736 +#define __JBT6K74_H__
125737 +
125738 +#include <linux/spi/spi.h>
125739 +
125740 +struct jbt6k74_platform_data {
125741 +       void (*reset)(int devindex, int level);
125742 +       void (*resuming)(int devindex); /* called when LCM is resumed */
125743 +       void (*suspending)(int devindex, struct spi_device *spi);
125744 +       int (*all_dependencies_resumed)(int devindex);
125745 +};
125746 +
125747 +#endif
125748 Index: linux-2.6.24.7/include/linux/kernel.h
125749 ===================================================================
125750 --- linux-2.6.24.7.orig/include/linux/kernel.h  2008-12-11 22:46:07.000000000 +0100
125751 +++ linux-2.6.24.7/include/linux/kernel.h       2008-12-11 22:46:49.000000000 +0100
125752 @@ -182,6 +182,8 @@ asmlinkage int printk(const char * fmt,
125753  extern int log_buf_get_len(void);
125754  extern int log_buf_read(int idx);
125755  extern int log_buf_copy(char *dest, int idx, int len);
125756 +extern void (*printk_emergency_debug_spew_init)(void);
125757 +extern void (*printk_emergency_debug_spew_send_string)(const char *);
125758  #else
125759  static inline int vprintk(const char *s, va_list args)
125760         __attribute__ ((format (printf, 1, 0)));
125761 Index: linux-2.6.24.7/include/linux/kexec.h
125762 ===================================================================
125763 --- linux-2.6.24.7.orig/include/linux/kexec.h   2008-12-11 22:46:07.000000000 +0100
125764 +++ linux-2.6.24.7/include/linux/kexec.h        2008-12-11 22:46:49.000000000 +0100
125765 @@ -1,7 +1,6 @@
125766  #ifndef LINUX_KEXEC_H
125767  #define LINUX_KEXEC_H
125768
125769 -#ifdef CONFIG_KEXEC
125770  #include <linux/types.h>
125771  #include <linux/list.h>
125772  #include <linux/linkage.h>
125773 @@ -11,6 +10,8 @@
125774  #include <linux/elf.h>
125775  #include <asm/kexec.h>
125776
125777 +#ifdef CONFIG_KEXEC
125778 +
125779  /* Verify architecture specific macros are defined */
125780
125781  #ifndef KEXEC_SOURCE_MEMORY_LIMIT
125782 Index: linux-2.6.24.7/include/linux/lis302dl.h
125783 ===================================================================
125784 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125785 +++ linux-2.6.24.7/include/linux/lis302dl.h     2008-12-11 22:46:49.000000000 +0100
125786 @@ -0,0 +1,156 @@
125787 +#ifndef _LINUX_LIS302DL_H
125788 +#define _LINUX_LIS302DL_H
125789 +
125790 +#include <linux/types.h>
125791 +#include <linux/spi/spi.h>
125792 +#include <linux/input.h>
125793 +
125794 +
125795 +struct lis302dl_info;
125796 +
125797 +struct lis302dl_platform_data {
125798 +       char *name;
125799 +       unsigned long pin_chip_select;
125800 +       unsigned long pin_clk;
125801 +       unsigned long pin_mosi;
125802 +       unsigned long pin_miso;
125803 +       int open_drain;
125804 +       int interrupt;
125805 +       void (*lis302dl_bitbang)(struct lis302dl_info *lis, u8 *tx,
125806 +                       int tx_bytes, u8 *rx, int rx_bytes);
125807 +       void (*lis302dl_suspend_io)(struct lis302dl_info *, int resuming);
125808 +       int (*lis302dl_bitbang_reg_read)(struct lis302dl_info *, u8 reg);
125809 +       void (*lis302dl_bitbang_reg_write)(struct lis302dl_info *, u8 reg,
125810 +                                                                       u8 val);
125811 +};
125812 +
125813 +struct lis302dl_info {
125814 +       struct lis302dl_platform_data *pdata;
125815 +       struct device *dev;
125816 +       struct input_dev *input_dev;
125817 +       unsigned int flags;
125818 +       unsigned int threshold;
125819 +       unsigned int duration;
125820 +       struct {
125821 +               u8 cfg;
125822 +               u8 threshold;
125823 +               u8 duration;
125824 +               int active;
125825 +       } wakeup;
125826 +       u_int8_t regs[0x40];
125827 +};
125828 +
125829 +enum lis302dl_reg {
125830 +       LIS302DL_REG_WHO_AM_I           = 0x0f,
125831 +       LIS302DL_REG_CTRL1              = 0x20,
125832 +       LIS302DL_REG_CTRL2              = 0x21,
125833 +       LIS302DL_REG_CTRL3              = 0x22,
125834 +       LIS302DL_REG_HP_FILTER_RESET    = 0x23,
125835 +       LIS302DL_REG_STATUS             = 0x27,
125836 +       LIS302DL_REG_OUT_X              = 0x29,
125837 +       LIS302DL_REG_OUT_Y              = 0x2b,
125838 +       LIS302DL_REG_OUT_Z              = 0x2d,
125839 +       LIS302DL_REG_FF_WU_CFG_1        = 0x30,
125840 +       LIS302DL_REG_FF_WU_SRC_1        = 0x31,
125841 +       LIS302DL_REG_FF_WU_THS_1        = 0x32,
125842 +       LIS302DL_REG_FF_WU_DURATION_1   = 0x33,
125843 +       LIS302DL_REG_FF_WU_CFG_2        = 0x34,
125844 +       LIS302DL_REG_FF_WU_SRC_2        = 0x35,
125845 +       LIS302DL_REG_FF_WU_THS_2        = 0x36,
125846 +       LIS302DL_REG_FF_WU_DURATION_2   = 0x37,
125847 +       LIS302DL_REG_CLICK_CFG          = 0x38,
125848 +       LIS302DL_REG_CLICK_SRC          = 0x39,
125849 +       LIS302DL_REG_CLICK_THSY_X       = 0x3b,
125850 +       LIS302DL_REG_CLICK_THSZ         = 0x3c,
125851 +       LIS302DL_REG_CLICK_TIME_LIMIT   = 0x3d,
125852 +       LIS302DL_REG_CLICK_LATENCY      = 0x3e,
125853 +       LIS302DL_REG_CLICK_WINDOW       = 0x3f,
125854 +};
125855 +
125856 +enum lis302dl_reg_ctrl1 {
125857 +       LIS302DL_CTRL1_Xen              = 0x01,
125858 +       LIS302DL_CTRL1_Yen              = 0x02,
125859 +       LIS302DL_CTRL1_Zen              = 0x04,
125860 +       LIS302DL_CTRL1_STM              = 0x08,
125861 +       LIS302DL_CTRL1_STP              = 0x10,
125862 +       LIS302DL_CTRL1_FS               = 0x20,
125863 +       LIS302DL_CTRL1_PD               = 0x40,
125864 +       LIS302DL_CTRL1_DR               = 0x80,
125865 +};
125866 +
125867 +enum lis302dl_reg_ctrl2 {
125868 +       LIS302DL_CTRL2_HPC1             = 0x01,
125869 +       LIS302DL_CTRL2_HPC2             = 0x02,
125870 +       LIS302DL_CTRL2_HPFF1            = 0x04,
125871 +       LIS302DL_CTRL2_HPFF2            = 0x08,
125872 +       LIS302DL_CTRL2_FDS              = 0x10,
125873 +       LIS302DL_CTRL2_BOOT             = 0x40,
125874 +       LIS302DL_CTRL2_SIM              = 0x80,
125875 +};
125876 +enum lis302dl_reg_ctrl3 {
125877 +       LIS302DL_CTRL3_PP_OD            = 0x40,
125878 +       LIS302DL_CTRL3_IHL              = 0x80,
125879 +};
125880 +
125881 +enum lis302dl_reg_status {
125882 +       LIS302DL_STATUS_XDA             = 0x01,
125883 +       LIS302DL_STATUS_YDA             = 0x02,
125884 +       LIS302DL_STATUS_ZDA             = 0x04,
125885 +       LIS302DL_STATUS_XYZDA           = 0x08,
125886 +       LIS302DL_STATUS_XOR             = 0x10,
125887 +       LIS302DL_STATUS_YOR             = 0x20,
125888 +       LIS302DL_STATUS_ZOR             = 0x40,
125889 +       LIS302DL_STATUS_XYZOR           = 0x80,
125890 +};
125891 +
125892 +/* Wakeup/freefall interrupt defs */
125893 +enum lis302dl_reg_ffwucfg {
125894 +       LIS302DL_FFWUCFG_XLIE           = 0x01,
125895 +       LIS302DL_FFWUCFG_XHIE           = 0x02,
125896 +       LIS302DL_FFWUCFG_YLIE           = 0x04,
125897 +       LIS302DL_FFWUCFG_YHIE           = 0x08,
125898 +       LIS302DL_FFWUCFG_ZLIE           = 0x10,
125899 +       LIS302DL_FFWUCFG_ZHIE           = 0x20,
125900 +       LIS302DL_FFWUCFG_LIR            = 0x40,
125901 +       LIS302DL_FFWUCFG_AOI            = 0x80,
125902 +};
125903 +
125904 +enum lis302dl_reg_ffwuths {
125905 +       LIS302DL_FFWUTHS_DCRM           = 0x80,
125906 +};
125907 +
125908 +enum lis302dl_reg_ffwusrc {
125909 +       LIS302DL_FFWUSRC_XL             = 0x01,
125910 +       LIS302DL_FFWUSRC_XH             = 0x02,
125911 +       LIS302DL_FFWUSRC_YL             = 0x04,
125912 +       LIS302DL_FFWUSRC_YH             = 0x08,
125913 +       LIS302DL_FFWUSRC_ZL             = 0x10,
125914 +       LIS302DL_FFWUSRC_ZH             = 0x20,
125915 +       LIS302DL_FFWUSRC_IA             = 0x40,
125916 +};
125917 +
125918 +enum lis302dl_reg_cloik_src {
125919 +       LIS302DL_CLICKSRC_SINGLE_X      = 0x01,
125920 +       LIS302DL_CLICKSRC_DOUBLE_X      = 0x02,
125921 +       LIS302DL_CLICKSRC_SINGLE_Y      = 0x04,
125922 +       LIS302DL_CLICKSRC_DOUBLE_Y      = 0x08,
125923 +       LIS302DL_CLICKSRC_SINGLE_Z      = 0x10,
125924 +       LIS302DL_CLICKSRC_DOUBLE_Z      = 0x20,
125925 +       LIS302DL_CLICKSRC_IA            = 0x40,
125926 +};
125927 +
125928 +#define LIS302DL_WHO_AM_I_MAGIC                0x3b
125929 +
125930 +#define LIS302DL_F_WUP_FF_1            0x0001  /* wake up from free fall */
125931 +#define LIS302DL_F_WUP_FF_2            0x0002
125932 +#define LIS302DL_F_WUP_FF              0x0003
125933 +#define LIS302DL_F_WUP_CLICK   0x0004
125934 +#define LIS302DL_F_POWER               0x0010
125935 +#define LIS302DL_F_FS                  0x0020  /* ADC full scale */
125936 +#define LIS302DL_F_INPUT_OPEN  0x0040  /* Set if input device is opened */
125937 +#define LIS302DL_F_IRQ_WAKE    0x0080  /* IRQ is setup in wake mode */
125938 +#define LIS302DL_F_DR                  0x0100  /* Data rate, 400Hz/100Hz */
125939 +
125940 +
125941 +#endif /* _LINUX_LIS302DL_H */
125942 +
125943 Index: linux-2.6.24.7/include/linux/pcf50606.h
125944 ===================================================================
125945 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
125946 +++ linux-2.6.24.7/include/linux/pcf50606.h     2008-12-11 22:46:49.000000000 +0100
125947 @@ -0,0 +1,91 @@
125948 +#ifndef _LINUX_PCF50606_H
125949 +#define _LINUX_PCF50606_H
125950 +
125951 +#include <linux/pcf506xx.h>
125952 +
125953 +
125954 +/* public in-kernel pcf50606 api */
125955 +enum pcf50606_regulator_id {
125956 +       PCF50606_REGULATOR_DCD,
125957 +       PCF50606_REGULATOR_DCDE,
125958 +       PCF50606_REGULATOR_DCUD,
125959 +       PCF50606_REGULATOR_D1REG,
125960 +       PCF50606_REGULATOR_D2REG,
125961 +       PCF50606_REGULATOR_D3REG,
125962 +       PCF50606_REGULATOR_LPREG,
125963 +       PCF50606_REGULATOR_IOREG,
125964 +       __NUM_PCF50606_REGULATORS
125965 +};
125966 +
125967 +struct pcf50606_data;
125968 +
125969 +/* This is an ugly construct on how to access the (currently single/global)
125970 + * pcf50606 handle from other code in the kernel.  I didn't really come up with
125971 + * a more decent method of dynamically resolving this */
125972 +extern struct pcf50606_data *pcf50606_global;
125973 +
125974 +extern void
125975 +pcf50606_go_standby(void);
125976 +
125977 +extern void
125978 +pcf50606_gpo0_set(struct pcf50606_data *pcf, int on);
125979 +
125980 +extern int
125981 +pcf50606_gpo0_get(struct pcf50606_data *pcf);
125982 +
125983 +extern int
125984 +pcf50606_voltage_set(struct pcf50606_data *pcf,
125985 +                    enum pcf50606_regulator_id reg,
125986 +                    unsigned int millivolts);
125987 +extern unsigned int
125988 +pcf50606_voltage_get(struct pcf50606_data *pcf,
125989 +                    enum pcf50606_regulator_id reg);
125990 +extern int
125991 +pcf50606_onoff_get(struct pcf50606_data *pcf,
125992 +                  enum pcf50606_regulator_id reg);
125993 +
125994 +extern int
125995 +pcf50606_onoff_set(struct pcf50606_data *pcf,
125996 +                  enum pcf50606_regulator_id reg, int on);
125997 +
125998 +extern void
125999 +pcf50606_charge_fast(struct pcf50606_data *pcf, int on);
126000 +
126001 +
126002 +#define PCF50606_FEAT_EXTON    0x00000001      /* not yet supported */
126003 +#define PCF50606_FEAT_MBC      0x00000002
126004 +#define PCF50606_FEAT_BBC      0x00000004      /* not yet supported */
126005 +#define PCF50606_FEAT_TSC      0x00000008      /* not yet supported */
126006 +#define PCF50606_FEAT_WDT      0x00000010
126007 +#define PCF50606_FEAT_ACD      0x00000020
126008 +#define PCF50606_FEAT_RTC      0x00000040
126009 +#define PCF50606_FEAT_PWM      0x00000080
126010 +#define PCF50606_FEAT_CHGCUR   0x00000100
126011 +#define PCF50606_FEAT_BATVOLT  0x00000200
126012 +#define PCF50606_FEAT_BATTEMP  0x00000400
126013 +#define PCF50606_FEAT_PWM_BL   0x00000800
126014 +
126015 +struct pcf50606_platform_data {
126016 +       /* general */
126017 +       unsigned int used_features;
126018 +       unsigned int onkey_seconds_required;
126019 +
126020 +       /* voltage regulator related */
126021 +       struct pmu_voltage_rail rails[__NUM_PCF50606_REGULATORS];
126022 +       unsigned int used_regulators;
126023 +
126024 +       /* charger related */
126025 +       unsigned int r_fix_batt;
126026 +       unsigned int r_fix_batt_par;
126027 +       unsigned int r_sense_milli;
126028 +
126029 +       /* backlight related */
126030 +       unsigned int init_brightness;
126031 +
126032 +       struct {
126033 +               u_int8_t mbcc3; /* charger voltage / current */
126034 +       } charger;
126035 +       pmu_cb cb;
126036 +};
126037 +
126038 +#endif
126039 Index: linux-2.6.24.7/include/linux/pcf50633.h
126040 ===================================================================
126041 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
126042 +++ linux-2.6.24.7/include/linux/pcf50633.h     2008-12-11 22:46:49.000000000 +0100
126043 @@ -0,0 +1,180 @@
126044 +#ifndef _LINUX_PCF50633_H
126045 +#define _LINUX_PCF50633_H
126046 +
126047 +#include <linux/pcf506xx.h>
126048 +#include <linux/resume-dependency.h>
126049 +
126050 +
126051 +/* public in-kernel pcf50633 api */
126052 +enum pcf50633_regulator_id {
126053 +       PCF50633_REGULATOR_AUTO,
126054 +       PCF50633_REGULATOR_DOWN1,
126055 +       PCF50633_REGULATOR_DOWN2,
126056 +       PCF50633_REGULATOR_MEMLDO,
126057 +       PCF50633_REGULATOR_LDO1,
126058 +       PCF50633_REGULATOR_LDO2,
126059 +       PCF50633_REGULATOR_LDO3,
126060 +       PCF50633_REGULATOR_LDO4,
126061 +       PCF50633_REGULATOR_LDO5,
126062 +       PCF50633_REGULATOR_LDO6,
126063 +       PCF50633_REGULATOR_HCLDO,
126064 +       __NUM_PCF50633_REGULATORS
126065 +};
126066 +
126067 +enum pcf50633_reg_int1 {
126068 +       PCF50633_INT1_ADPINS    = 0x01, /* Adapter inserted */
126069 +       PCF50633_INT1_ADPREM    = 0x02, /* Adapter removed */
126070 +       PCF50633_INT1_USBINS    = 0x04, /* USB inserted */
126071 +       PCF50633_INT1_USBREM    = 0x08, /* USB removed */
126072 +       /* reserved */
126073 +       PCF50633_INT1_ALARM     = 0x40, /* RTC alarm time is reached */
126074 +       PCF50633_INT1_SECOND    = 0x80, /* RTC periodic second interrupt */
126075 +};
126076 +
126077 +enum pcf50633_reg_int2 {
126078 +       PCF50633_INT2_ONKEYR    = 0x01, /* ONKEY rising edge */
126079 +       PCF50633_INT2_ONKEYF    = 0x02, /* ONKEY falling edge */
126080 +       PCF50633_INT2_EXTON1R   = 0x04, /* EXTON1 rising edge */
126081 +       PCF50633_INT2_EXTON1F   = 0x08, /* EXTON1 falling edge */
126082 +       PCF50633_INT2_EXTON2R   = 0x10, /* EXTON2 rising edge */
126083 +       PCF50633_INT2_EXTON2F   = 0x20, /* EXTON2 falling edge */
126084 +       PCF50633_INT2_EXTON3R   = 0x40, /* EXTON3 rising edge */
126085 +       PCF50633_INT2_EXTON3F   = 0x80, /* EXTON3 falling edge */
126086 +};
126087 +
126088 +enum pcf50633_reg_int3 {
126089 +       PCF50633_INT3_BATFULL   = 0x01, /* Battery full */
126090 +       PCF50633_INT3_CHGHALT   = 0x02, /* Charger halt */
126091 +       PCF50633_INT3_THLIMON   = 0x04,
126092 +       PCF50633_INT3_THLIMOFF  = 0x08,
126093 +       PCF50633_INT3_USBLIMON  = 0x10,
126094 +       PCF50633_INT3_USBLIMOFF = 0x20,
126095 +       PCF50633_INT3_ADCRDY    = 0x40, /* ADC conversion finished */
126096 +       PCF50633_INT3_ONKEY1S   = 0x80, /* ONKEY pressed 1 second */
126097 +};
126098 +
126099 +enum pcf50633_reg_int4 {
126100 +       PCF50633_INT4_LOWSYS            = 0x01,
126101 +       PCF50633_INT4_LOWBAT            = 0x02,
126102 +       PCF50633_INT4_HIGHTMP           = 0x04,
126103 +       PCF50633_INT4_AUTOPWRFAIL       = 0x08,
126104 +       PCF50633_INT4_DWN1PWRFAIL       = 0x10,
126105 +       PCF50633_INT4_DWN2PWRFAIL       = 0x20,
126106 +       PCF50633_INT4_LEDPWRFAIL        = 0x40,
126107 +       PCF50633_INT4_LEDOVP            = 0x80,
126108 +};
126109 +
126110 +enum pcf50633_reg_int5 {
126111 +       PCF50633_INT5_LDO1PWRFAIL       = 0x01,
126112 +       PCF50633_INT5_LDO2PWRFAIL       = 0x02,
126113 +       PCF50633_INT5_LDO3PWRFAIL       = 0x04,
126114 +       PCF50633_INT5_LDO4PWRFAIL       = 0x08,
126115 +       PCF50633_INT5_LDO5PWRFAIL       = 0x10,
126116 +       PCF50633_INT5_LDO6PWRFAIL       = 0x20,
126117 +       PCF50633_INT5_HCLDOPWRFAIL      = 0x40,
126118 +       PCF50633_INT5_HCLDOOVL          = 0x80,
126119 +};
126120 +
126121 +struct pcf50633_data;
126122 +extern struct pcf50633_data *pcf50633_global;
126123 +
126124 +extern void
126125 +pcf50633_go_standby(void);
126126 +
126127 +enum pcf50633_gpio {
126128 +       PCF50633_GPIO1 = 1,
126129 +       PCF50633_GPIO2 = 2,
126130 +       PCF50633_GPIO3 = 3,
126131 +       PCF50633_GPO = 4,
126132 +};
126133 +
126134 +extern void
126135 +pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio, int on);
126136 +
126137 +extern int
126138 +pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio);
126139 +
126140 +extern int
126141 +pcf50633_voltage_set(struct pcf50633_data *pcf,
126142 +                    enum pcf50633_regulator_id reg,
126143 +                    unsigned int millivolts);
126144 +extern unsigned int
126145 +pcf50633_voltage_get(struct pcf50633_data *pcf,
126146 +                    enum pcf50633_regulator_id reg);
126147 +
126148 +extern int
126149 +pcf50633_onoff_get(struct pcf50633_data *pcf,
126150 +                  enum pcf50633_regulator_id reg);
126151 +
126152 +extern int
126153 +pcf50633_onoff_set(struct pcf50633_data *pcf,
126154 +                  enum pcf50633_regulator_id reg, int on);
126155 +
126156 +extern void
126157 +pcf50633_backlight_resume(struct pcf50633_data *pcf);
126158 +
126159 +extern u_int16_t
126160 +pcf50633_battvolt(struct pcf50633_data *pcf);
126161 +
126162 +extern int
126163 +pcf50633_report_resumers(struct pcf50633_data *pcf, char *buf);
126164 +
126165 +extern void
126166 +pcf50633_register_resume_dependency(struct pcf50633_data *pcf,
126167 +                                       struct resume_dependency *dep);
126168 +
126169 +extern int
126170 +pcf50633_notify_usb_current_limit_change(struct pcf50633_data *pcf,
126171 +                                                              unsigned int ma);
126172 +extern int
126173 +pcf50633_wait_for_ready(struct pcf50633_data *pcf, int timeout_ms,
126174 +                                                               char *name);
126175 +
126176 +/* 0 = initialized and resumed and ready to roll, !=0 = either not
126177 + * initialized or not resumed yet
126178 + */
126179 +extern int
126180 +pcf50633_ready(struct pcf50633_data *pcf);
126181 +
126182 +#define PCF50633_FEAT_EXTON    0x00000001      /* not yet supported */
126183 +#define PCF50633_FEAT_MBC      0x00000002
126184 +#define PCF50633_FEAT_BBC      0x00000004      /* not yet supported */
126185 +#define PCF50633_FEAT_RTC      0x00000040
126186 +#define PCF50633_FEAT_CHGCUR   0x00000100
126187 +#define PCF50633_FEAT_BATVOLT  0x00000200
126188 +#define PCF50633_FEAT_BATTEMP  0x00000400
126189 +#define PCF50633_FEAT_PWM_BL   0x00000800
126190 +
126191 +struct pcf50633_platform_data {
126192 +       /* general */
126193 +       unsigned int used_features;
126194 +       unsigned int onkey_seconds_sig_init;
126195 +       unsigned int onkey_seconds_shutdown;
126196 +
126197 +       /* callback to attach platform children (to enforce suspend / resume
126198 +        * ordering */
126199 +       void (*attach_child_devices)(struct device *parent_device);
126200 +
126201 +       /* voltage regulator related */
126202 +       struct pmu_voltage_rail rails[__NUM_PCF50633_REGULATORS];
126203 +       unsigned int used_regulators;
126204 +
126205 +       /* charger related */
126206 +       unsigned int r_fix_batt;
126207 +       unsigned int r_fix_batt_par;
126208 +       unsigned int r_sense_milli;
126209 +       int flag_use_apm_emulation;
126210 +
126211 +       unsigned char resumers[5];
126212 +
126213 +       struct {
126214 +               u_int8_t mbcc3; /* charger voltage / current */
126215 +       } charger;
126216 +       pmu_cb cb;
126217 +
126218 +       /* post-resume backlight bringup */
126219 +       int defer_resume_backlight;
126220 +       u8 resume_backlight_ramp_speed;
126221 +};
126222 +
126223 +#endif /* _PCF50633_H */
126224 Index: linux-2.6.24.7/include/linux/pcf506xx.h
126225 ===================================================================
126226 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
126227 +++ linux-2.6.24.7/include/linux/pcf506xx.h     2008-12-11 22:46:49.000000000 +0100
126228 @@ -0,0 +1,34 @@
126229 +#ifndef _LINUX_PCF506XX_H
126230 +#define _LINUX_PCF506XX_H
126231 +
126232 +
126233 +#define PMU_VRAIL_F_SUSPEND_ON 0x00000001      /* Remains on during suspend */
126234 +#define PMU_VRAIL_F_UNUSED     0x00000002      /* This rail is not used */
126235 +struct pmu_voltage_rail {
126236 +       char *name;
126237 +       unsigned int flags;
126238 +       struct {
126239 +               unsigned int init;
126240 +               unsigned int max;
126241 +       } voltage;
126242 +};
126243 +
126244 +enum pmu_event {
126245 +       PMU_EVT_NONE,
126246 +       PMU_EVT_INSERT,
126247 +       PMU_EVT_REMOVE,
126248 +#ifdef CONFIG_SENSORS_PCF50633
126249 +       PMU_EVT_USB_INSERT,
126250 +       PMU_EVT_USB_REMOVE,
126251 +#endif
126252 +       PMU_EVT_CHARGER_ACTIVE,
126253 +       PMU_EVT_CHARGER_IDLE,
126254 +       PMU_EVT_CHARGER_CHANGE,
126255 +       __NUM_PMU_EVTS
126256 +};
126257 +
126258 +typedef int (*pmu_cb)(struct device *dev, unsigned int feature,
126259 +                  enum pmu_event event);
126260 +
126261 +
126262 +#endif /* !_LINUX_PCF506XX_H */
126263 Index: linux-2.6.24.7/include/linux/resume-dependency.h
126264 ===================================================================
126265 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
126266 +++ linux-2.6.24.7/include/linux/resume-dependency.h    2008-12-11 22:46:49.000000000 +0100
126267 @@ -0,0 +1,105 @@
126268 +#ifndef __RESUME_DEPENDENCY_H__
126269 +#define __RESUME_DEPENDENCY_H__
126270 +
126271 +/* Resume dependency framework
126272 + *
126273 + * (C) 2008 Openmoko, Inc.
126274 + * Author: Andy Green <andy@openmoko.com>
126275 + *
126276 + * This program is free software; you can redistribute it and/or
126277 + * modify it under the terms of the GNU General Public License as
126278 + * published by the Free Software Foundation; version 2.1.
126279 + *
126280 + * This program is distributed in the hope that it will be useful,
126281 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
126282 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
126283 + * GNU General Public License for more details.
126284 + *
126285 + * You should have received a copy of the GNU General Public License
126286 + * along with this program; if not, write to the Free Software
126287 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
126288 + * MA 02111-1307 USA
126289 + *
126290 + */
126291 +
126292 +#include <linux/list.h>
126293 +
126294 +struct resume_dependency {
126295 +       struct list_head list;
126296 +
126297 +       void (*callback)(void *); /* called with context as arg */
126298 +       void * context;
126299 +       int called_flag; /* set to 1 after called, use for multi dep */
126300 +};
126301 +
126302 +/* if you are a driver accept to have other drivers as dependencies, you need to
126303 + * instantiate a struct resume_dependency above, then initialize it by invoking
126304 + * init_resume_dependency_list() on it
126305 + */
126306 +
126307 +#define init_resume_dependency_list(_head) \
126308 +       INIT_LIST_HEAD(&(_head)->list);
126309 +
126310 +
126311 +/* if your resume function depends on something else being resumed first, you
126312 + * can register the dependency by calling this in your suspend function with
126313 + * head being the list held by the thing you are dependent on, and dep being
126314 + * your struct resume_dependency
126315 + */
126316 +
126317 +#define register_resume_dependency(_head, _dep) { \
126318 +       struct list_head *_pos, *_q; \
126319 +       struct resume_dependency *_d; \
126320 +\
126321 +       (_dep)->called_flag = 1; \
126322 +       list_for_each_safe(_pos, _q, &((_head)->list)) { \
126323 +               _d = list_entry(_pos, struct resume_dependency, list); \
126324 +               if (_d == (_dep)) \
126325 +                       list_del(_pos); \
126326 +       } \
126327 +       list_add(&(_dep)->list, &(_head)->list); \
126328 +}
126329 +
126330 +/* In the resume function that things can be dependent on, at the end you
126331 + * invoke this macro.  This calls back the dependent resumes now it is safe to
126332 + * use the resumed thing they were dependent on.
126333 + */
126334 +
126335 +#define callback_all_resume_dependencies(_head) { \
126336 +       struct list_head *_pos, *_q; \
126337 +       struct resume_dependency *_dep; \
126338 +\
126339 +       list_for_each_safe(_pos, _q, &((_head)->list)) { \
126340 +               _dep = list_entry(_pos, struct resume_dependency, list); \
126341 +               _dep->called_flag = 1; \
126342 +               (_dep->callback)(_dep->context); \
126343 +               list_del(_pos); \
126344 +       } \
126345 +}
126346 +
126347 +/* When a dependency is added, it is not actually active; the dependent resume
126348 + * handler will function as normal.  The dependency is activated by the suspend
126349 + * handler for the driver that will be doing the callbacks.  This ensures that
126350 + * if the suspend is aborted for any reason (error, driver busy, etc), that all
126351 + * suspended drivers will resume, even if the driver upon which they are
126352 + * dependent did not suspend, and hence will not resume, and thus would be
126353 + * unable to perform the callbacks.
126354 + */
126355 +
126356 +#define activate_all_resume_dependencies(_head) { \
126357 +       struct list_head *_pos, *_q; \
126358 +       struct resume_dependency *_dep; \
126359 +\
126360 +       list_for_each_safe(_pos, _q, &((_head)->list)) { \
126361 +               _dep = list_entry(_pos, struct resume_dependency, list); \
126362 +               _dep->called_flag = 0; \
126363 +       } \
126364 +}
126365 +
126366 +/* if your resume action is dependent on multiple drivers being resumed already,
126367 + * register the same callback with each driver you are dependent on, and check
126368 + * .called_flag for all of the struct resume_dependency.  When they are all 1
126369 + * you know it is the last callback and you can resume, otherwise just return
126370 + */
126371 +
126372 +#endif
126373 Index: linux-2.6.24.7/include/linux/sdio/ctsystem.h
126374 ===================================================================
126375 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
126376 +++ linux-2.6.24.7/include/linux/sdio/ctsystem.h        2008-12-11 22:46:49.000000000 +0100
126377 @@ -0,0 +1,115 @@
126378 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126379 +@file: cpsystem.h
126380 +
126381 +@abstract: common system include file.
126382 +
126383 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
126384 +
126385 +
126386 + *
126387 + *  This program is free software; you can redistribute it and/or modify
126388 + *  it under the terms of the GNU General Public License version 2 as
126389 + *  published by the Free Software Foundation;
126390 + *
126391 + *  Software distributed under the License is distributed on an "AS
126392 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
126393 + *  implied. See the License for the specific language governing
126394 + *  rights and limitations under the License.
126395 + *
126396 + *  Portions of this code were developed with information supplied from the
126397 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
126398 + *
126399 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
126400 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
126401 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
126402 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
126403 + *   Specification may require a license from the SD Card Association or other third parties.
126404 + *   Disclaimers:
126405 + *   The information contained in the Simplified Specification is presented only as a standard
126406 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
126407 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
126408 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
126409 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
126410 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
126411 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
126412 + *   information, know-how or other confidential information to any third party.
126413 + *
126414 + *
126415 + *  The initial developers of the original code are Seung Yi and Paul Lever
126416 + *
126417 + *  sdio@atheros.com
126418 + *
126419 + *
126420 +
126421 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126422 +#ifndef __CPSYSTEM_H___
126423 +#define __CPSYSTEM_H___
126424 +
126425 +/* SDIO stack status defines */
126426 +/* < 0 error, >0 warning, 0 success */
126427 +#define SDIO_IS_WARNING(status) ((status) > 0)
126428 +#define SDIO_IS_ERROR(status) ((status) < 0)
126429 +#define SDIO_SUCCESS(status) ((SDIO_STATUS)(status) >= 0)
126430 +#define SDIO_STATUS_SUCCESS             0
126431 +#define SDIO_STATUS_ERROR              -1
126432 +#define SDIO_STATUS_INVALID_PARAMETER  -2
126433 +#define SDIO_STATUS_PENDING             3
126434 +#define SDIO_STATUS_DEVICE_NOT_FOUND   -4
126435 +#define SDIO_STATUS_DEVICE_ERROR       -5
126436 +#define SDIO_STATUS_INTERRUPTED        -6
126437 +#define SDIO_STATUS_NO_RESOURCES       -7
126438 +#define SDIO_STATUS_CANCELED           -8
126439 +#define SDIO_STATUS_BUFFER_TOO_SMALL   -9
126440 +#define SDIO_STATUS_NO_MORE_MESSAGES   -10
126441 +#define SDIO_STATUS_BUS_RESP_TIMEOUT   -20    /* response timed-out */
126442 +#define SDIO_STATUS_BUS_READ_TIMEOUT   -21    /* read data timed-out */
126443 +#define SDIO_STATUS_BUS_READ_CRC_ERR   -22   /* data CRC failed */
126444 +#define SDIO_STATUS_BUS_WRITE_ERROR    -23   /* write failed */
126445 +#define SDIO_STATUS_BUS_RESP_CRC_ERR   -24   /* response received with a CRC error */
126446 +#define SDIO_STATUS_INVALID_TUPLE_LENGTH -25 /* tuple length was invalid */
126447 +#define SDIO_STATUS_TUPLE_NOT_FOUND      -26 /* tuple could not be found */
126448 +#define SDIO_STATUS_CIS_OUT_OF_RANGE     -27 /* CIS is out of range in the tuple scan */
126449 +#define SDIO_STATUS_FUNC_ENABLE_TIMEOUT  -28 /* card timed out enabling or disabling */
126450 +#define SDIO_STATUS_DATA_STATE_INVALID   -29 /* card is in an invalid state for data */
126451 +#define SDIO_STATUS_DATA_ERROR_UNKNOWN   -30 /* card cannot process data transfer */
126452 +#define SDIO_STATUS_INVALID_FUNC         -31 /* sdio request is not valid for the function */
126453 +#define SDIO_STATUS_FUNC_ARG_ERROR       -32 /* sdio request argument is invalid or out of range */
126454 +#define SDIO_STATUS_INVALID_COMMAND      -33 /* SD COMMAND is invalid for the card state */
126455 +#define SDIO_STATUS_SDREQ_QUEUE_FAILED   -34 /* request failed to insert into queue */
126456 +#define SDIO_STATUS_BUS_RESP_TIMEOUT_SHIFTABLE -35  /* response timed-out, possibily shiftable to correct  */
126457 +#define SDIO_STATUS_UNSUPPORTED          -36  /* not supported  */
126458 +#define SDIO_STATUS_PROGRAM_TIMEOUT      -37  /* memory card programming timeout  */
126459 +#define SDIO_STATUS_PROGRAM_STATUS_ERROR -38  /* memory card programming errors  */
126460 +
126461 +#include <linux/sdio/ctsystem_linux.h>
126462 +
126463 +/* get structure from contained field */
126464 +#define CONTAINING_STRUCT(address, struct_type, field_name)\
126465 +            ((struct_type *)((ULONG_PTR)(address) - (ULONG_PTR)(&((struct_type *)0)->field_name)))
126466 +
126467 +#define ZERO_OBJECT(obj) memset(&(obj),0,sizeof(obj))
126468 +#define ZERO_POBJECT(pObj) memset((pObj),0,sizeof(*(pObj)))
126469 +
126470 +
126471 +/* bit field support functions */
126472 +static INLINE void SetBit(PULONG pField, UINT position) {
126473 +    *pField |= 1 << position;
126474 +}
126475 +static INLINE void ClearBit(PULONG pField, UINT position) {
126476 +    *pField &= ~(1 << position);
126477 +}
126478 +static INLINE BOOL IsBitSet(PULONG pField, UINT position) {
126479 +    return (*pField & (1 << position));
126480 +}
126481 +static INLINE INT FirstClearBit(PULONG pField) {
126482 +    UINT ii;
126483 +    for(ii = 0; ii < sizeof(ULONG)*8; ii++) {
126484 +        if (!IsBitSet(pField, ii)) {
126485 +            return ii;
126486 +        }
126487 +    }
126488 +    /* no clear bits found */
126489 +    return -1;
126490 +}
126491 +
126492 +#endif /* __CPSYSTEM_H___ */
126493 Index: linux-2.6.24.7/include/linux/sdio/ctsystem_linux.h
126494 ===================================================================
126495 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
126496 +++ linux-2.6.24.7/include/linux/sdio/ctsystem_linux.h  2008-12-11 22:46:49.000000000 +0100
126497 @@ -0,0 +1,981 @@
126498 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126499 +@file: ctsystem_linux.h
126500 +
126501 +@abstract: common system include file for Linux.
126502 +
126503 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
126504 +
126505 +
126506 + *
126507 + *  This program is free software; you can redistribute it and/or modify
126508 + *  it under the terms of the GNU General Public License version 2 as
126509 + *  published by the Free Software Foundation;
126510 + *
126511 + *  Software distributed under the License is distributed on an "AS
126512 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
126513 + *  implied. See the License for the specific language governing
126514 + *  rights and limitations under the License.
126515 + *
126516 + *  Portions of this code were developed with information supplied from the
126517 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
126518 + *
126519 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
126520 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
126521 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
126522 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
126523 + *   Specification may require a license from the SD Card Association or other third parties.
126524 + *   Disclaimers:
126525 + *   The information contained in the Simplified Specification is presented only as a standard
126526 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
126527 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
126528 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
126529 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
126530 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
126531 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
126532 + *   information, know-how or other confidential information to any third party.
126533 + *
126534 + *
126535 + *  The initial developers of the original code are Seung Yi and Paul Lever
126536 + *
126537 + *  sdio@atheros.com
126538 + *
126539 + *
126540 +
126541 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126542 +#ifndef __CPSYSTEM_LINUX_H___
126543 +#define __CPSYSTEM_LINUX_H___
126544 +
126545 +/* #define DBG_TIMESTAMP 1 */
126546 +#define SD_TRACK_REQ 1
126547 +
126548 +/* LINUX support */
126549 +#include <linux/version.h>
126550 +
126551 +#ifndef KERNEL_VERSION
126552 +  #error KERNEL_VERSION macro not defined!
126553 +#endif
126554 +
126555 +#ifndef  LINUX_VERSION_CODE
126556 +  #error LINUX_VERSION_CODE macro not defined!
126557 +#endif
126558 +
126559 +#include <linux/autoconf.h>
126560 +#include <linux/kernel.h>
126561 +#include <linux/init.h>
126562 +#include <linux/types.h>
126563 +#include <linux/spinlock.h>
126564 +#include <linux/module.h>
126565 +
126566 +#include <linux/interrupt.h>
126567 +#include <linux/pnp.h>
126568 +#include <asm/hardirq.h>
126569 +#include <asm/semaphore.h>
126570 +#include <asm/io.h>
126571 +#include <asm/scatterlist.h>
126572 +#ifdef DBG_TIMESTAMP
126573 +#include <asm/timex.h>
126574 +#endif /* DBG_TIMESTAMP */
126575 +#ifndef in_atomic
126576 +    /* released version of 2.6.9 */
126577 +#include <linux/hardirq.h>
126578 +#endif
126579 +#include <linux/delay.h>
126580 +#include <linux/device.h>
126581 +
126582 +/* generic types */
126583 +typedef    unsigned char    UCHAR;
126584 +typedef    unsigned char *  PUCHAR;
126585 +typedef    char             TEXT;
126586 +typedef    char *           PTEXT;
126587 +typedef    unsigned short   USHORT;
126588 +typedef    unsigned short*  PUSHORT;
126589 +typedef    unsigned int     UINT;
126590 +typedef    unsigned int*    PUINT;
126591 +typedef    int              INT;
126592 +typedef    int*             PINT;
126593 +typedef    unsigned long    ULONG;
126594 +typedef    unsigned long*   PULONG;
126595 +typedef    u8               UINT8;
126596 +typedef    u16              UINT16;
126597 +typedef    u32              UINT32;
126598 +typedef    u8*              PUINT8;
126599 +typedef    u16*             PUINT16;
126600 +typedef    u32*             PUINT32;
126601 +typedef    unsigned char *  ULONG_PTR;
126602 +typedef    void*            PVOID;
126603 +typedef    unsigned char    BOOL;
126604 +typedef    BOOL*            PBOOL;
126605 +typedef    int              SDIO_STATUS;
126606 +typedef    int              SYSTEM_STATUS;
126607 +typedef    unsigned int     EVENT_TYPE;
126608 +typedef    unsigned int     EVENT_ARG;
126609 +typedef    unsigned int*    PEVENT_TYPE;
126610 +typedef    struct semaphore OS_SEMAPHORE;
126611 +typedef    struct semaphore* POS_SEMAPHORE;
126612 +typedef    struct semaphore  OS_SIGNAL;    /* OS signals are just semaphores */
126613 +typedef    struct semaphore* POS_SIGNAL;
126614 +typedef    spinlock_t OS_CRITICALSECTION;
126615 +typedef    spinlock_t *POS_CRITICALSECTION;
126616 +typedef    int              SDPOWER_STATE;
126617 +typedef    unsigned long    ATOMIC_FLAGS;
126618 +typedef    INT              THREAD_RETURN;
126619 +typedef    dma_addr_t       DMA_ADDRESS;
126620 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
126621 +typedef    struct task_struct* PKERNEL_TASK;
126622 +typedef    struct device_driver OS_DRIVER;
126623 +typedef    struct device_driver* POS_DRIVER;
126624 +typedef    struct device    OS_DEVICE;
126625 +typedef    struct device*   POS_DEVICE;
126626 +typedef    struct pnp_driver OS_PNPDRIVER;
126627 +typedef    struct pnp_driver* POS_PNPDRIVER;
126628 +typedef    struct pnp_dev   OS_PNPDEVICE;
126629 +typedef    struct pnp_dev*  POS_PNPDEVICE;
126630 +typedef    struct module*   POS_MODULE;
126631 +#else
126632 +/* 2.4 */
126633 +typedef    int              PKERNEL_TASK;
126634 +typedef    PVOID            OS_DRIVER;
126635 +typedef    PVOID*           POS_DRIVER;
126636 +typedef    PVOID            OS_DEVICE;
126637 +typedef    PVOID*           POS_DEVICE;
126638 +typedef    PVOID            OS_PNPDRIVER;
126639 +typedef    PVOID*           POS_PNPDRIVER;
126640 +typedef    PVOID            OS_PNPDEVICE;
126641 +typedef    PVOID*           POS_PNPDEVICE;
126642 +typedef    struct module*   POS_MODULE;
126643 +#define    module_param(a,b,c) MODULE_PARM(a, "i")
126644 +#endif
126645 +
126646 +typedef    int              CT_DEBUG_LEVEL;
126647 +
126648 +
126649 +#ifndef TRUE
126650 +#define TRUE 1
126651 +#endif
126652 +#ifndef FALSE
126653 +#define FALSE 0
126654 +#endif
126655 +#ifndef NULL
126656 +#define NULL ((PVOID)0)
126657 +#endif
126658 +#define SDDMA_DESCRIPTION_FLAG_DMA   0x1  /* DMA enabled */
126659 +#define SDDMA_DESCRIPTION_FLAG_SGDMA 0x2  /* Scatter-Gather DMA enabled */
126660 +typedef struct _SDDMA_DESCRIPTION {
126661 +    UINT16      Flags;      /* SDDMA_DESCRIPTION_FLAG_xxx */
126662 +    UINT16      MaxDescriptors; /* number of supported scatter gather entries */
126663 +    UINT32      MaxBytesPerDescriptor;  /* maximum bytes in a DMA descriptor entry */
126664 +    u64         Mask;              /* dma address mask */
126665 +    UINT32      AddressAlignment;  /* dma address alignment mask, least significant bits indicate illegal address bits */
126666 +    UINT32      LengthAlignment;   /* dma buffer length alignment mask, least significant bits indicate illegal length bits  */
126667 +}SDDMA_DESCRIPTION, *PSDDMA_DESCRIPTION;
126668 +typedef struct scatterlist SDDMA_DESCRIPTOR, *PSDDMA_DESCRIPTOR;
126669 +
126670 +#define INLINE  inline
126671 +#define CT_PACK_STRUCT __attribute__ ((packed))
126672 +
126673 +#define CT_DECLARE_MODULE_PARAM_INTEGER(p)  module_param(p, int, 0644);
126674 +
126675 +/* debug print macros */
126676 +//#define SDDBG_KERNEL_PRINT_LEVEL KERN_DEBUG
126677 +#define SDDBG_KERNEL_PRINT_LEVEL KERN_ALERT
126678 +#define DBG_MASK_NONE 0x0
126679 +#define DBG_MASK_HCD  0x100
126680 +#define DBG_MASK_LIB  0x200
126681 +#define DBG_MASK_BUS  0x400
126682 +
126683 +/* debug output levels, this must be order low number to higher */
126684 +#define SDDBG_ERROR 3
126685 +#define SDDBG_WARN  4
126686 +#define SDDBG_DEBUG 6
126687 +#define SDDBG_TRACE 7
126688 +#define SDDBG_ALL   0xff
126689 +
126690 +#define DBG_LEVEL_NONE  0
126691 +#define DBG_LEVEL_ERROR SDDBG_ERROR
126692 +#define DBG_LEVEL_WARN  SDDBG_WARN
126693 +#define DBG_LEVEL_DEBUG SDDBG_DEBUG
126694 +#define DBG_LEVEL_TRACE SDDBG_TRACE
126695 +#define DBG_LEVEL_ALL   SDDBG_ALL
126696 +
126697 +#define DBG_GET_LEVEL(lvl) ((lvl) & 0xff)
126698 +#define DBG_GET_MASK(lvl) (((lvl) & 0xff00))
126699 +
126700 +#define DBG_SDIO_MASK (DBG_MASK_NONE | DBG_LEVEL_DEBUG)
126701 +
126702 +#ifdef DEBUG
126703 +
126704 +#define DBG_ASSERT(test) \
126705 +{                         \
126706 +    if (!(test)) {          \
126707 +        DBG_PRINT(SDDBG_ERROR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \
126708 +    }                     \
126709 +}
126710 +#define DBG_ASSERT_WITH_MSG(test,s) \
126711 +{                                   \
126712 +    if (!(test)) {                  \
126713 +        DBG_PRINT(SDDBG_ERROR, ("Assert:%s File %s, Line: %d \n",(s),__FILE__, __LINE__)); \
126714 +    }                     \
126715 +}
126716 +
126717 +#define DBG_PRINT(lvl, args)\
126718 +    do {\
126719 +            if (DBG_GET_LEVEL(lvl) <= (DBG_SDIO_MASK & 0xff)) \
126720 +                printk(_DBG_PRINTX_ARG args); \
126721 +    } while(0);
126722 +
126723 +#else /* DEBUG */
126724 +
126725 +#define DBG_PRINT(lvl, str)
126726 +#define DBG_ASSERT(test)
126727 +#define DBG_ASSERT_WITH_MSG(test,s)
126728 +#endif /* DEBUG */
126729 +
126730 +#define _DBG_PRINTX_ARG(arg...) arg /* unroll the parens around the var args*/
126731 +#define DBG_GET_DEBUG_LEVEL() DBG_GET_LEVEL(DBG_SDIO_MASK)
126732 +#define DBG_SET_DEBUG_LEVEL(v)
126733 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126734 +  @function: Print a string to the debugger or console
126735 +
126736 +  @function name: REL_PRINT
126737 +  @prototype: void REL_PRINT(INT Level, string)
126738 +  @category: Support_Reference
126739 +  @input:  Level - debug level for the print
126740 +
126741 +  @output: none
126742 +
126743 +  @return:
126744 +
126745 +  @notes: If Level is less than the current debug level, the print will be
126746 +          issued. This print cannot be conditionally compiled.
126747 +  @see also: DBG_PRINT
126748 +
126749 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126750 +#define REL_PRINT(lvl, args)\
126751 +    {if (lvl <= DBG_GET_DEBUG_LEVEL())\
126752 +        printk(SDDBG_KERNEL_PRINT_LEVEL _DBG_PRINTX_ARG args);\
126753 +    }
126754 +/* debug output levels, this must be order low number to higher */
126755 +#define SDDBG_ERROR 3
126756 +#define SDDBG_WARN  4
126757 +#define SDDBG_DEBUG 6
126758 +#define SDDBG_TRACE 7
126759 +
126760 +#ifdef DBG_CRIT_SECTION_RECURSE
126761 +   /* this macro thows an exception if the lock is recursively taken
126762 +    * the kernel must be configured with: CONFIG_DEBUG_SPINLOCK=y */
126763 +#define call_spin_lock(pCrit) \
126764 +{                                     \
126765 +  UINT32 unlocked = 1;                \
126766 +  if ((pCrit)->lock) {unlocked = 0;}  \
126767 +  spin_lock_bh(pCrit);                \
126768 +  if (!unlocked) {                     \
126769 +     unlocked = 0x01;                   \
126770 +     unlocked = *((volatile UINT32 *)unlocked); \
126771 +  }                                   \
126772 +}
126773 +
126774 +#define call_spin_lock_irqsave(pCrit,isc) \
126775 +{                                     \
126776 +  UINT32 unlocked = 1;                \
126777 +  if ((pCrit)->lock) {unlocked = 0;}  \
126778 +  spin_lock_irqsave(pCrit,isc);                \
126779 +  if (!unlocked) {                     \
126780 +     unlocked = 0x01;                   \
126781 +     unlocked = *((volatile UINT32 *)unlocked); \
126782 +  }                                   \
126783 +}
126784 +
126785 +#else
126786 +#define call_spin_lock(s) spin_lock_bh(s)
126787 +#define call_spin_lock_irqsave(s,isc) spin_lock_irqsave(s,isc)
126788 +#endif
126789 +
126790 +#define call_spin_unlock(s) spin_unlock_bh((s))
126791 +#define call_spin_unlock_irqrestore(s,isc) spin_unlock_irqrestore(s,isc)
126792 +
126793 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
126794 +#define NonSchedulable() (in_atomic() || irqs_disabled())
126795 +#else
126796 +#define NonSchedulable() (irqs_disabled())
126797 +#endif
126798 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126799 +  @function: Initialize a critical section object.
126800 +
126801 +  @function name: CriticalSectionInit
126802 +  @prototype: SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit)
126803 +  @category: Support_Reference
126804 +  @output: pCrit - pointer to critical section to initialize
126805 +
126806 +  @return: SDIO_STATUS_SUCCESS on success.
126807 +
126808 +  @notes:  CriticalSectionDelete() must be called to cleanup any resources
126809 +           associated with the critical section.
126810 +
126811 +  @see also: CriticalSectionDelete, CriticalSectionAcquire, CriticalSectionRelease
126812 +  @example: To initialize a critical section:
126813 +        status = CriticalSectionInit(&pDevice->ListLock);
126814 +        if (!SDIO_SUCCESS(status)) {
126815 +                .. failed
126816 +            return status;
126817 +        }
126818 +
126819 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126820 +static inline SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit) {
126821 +    spin_lock_init(pCrit);
126822 +    return SDIO_STATUS_SUCCESS;
126823 +}
126824 +
126825 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126826 +  @function: Acquire a critical section lock.
126827 +
126828 +  @function name: CriticalSectionAcquire
126829 +  @prototype: SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit)
126830 +  @category: Support_Reference
126831 +
126832 +  @input: pCrit - pointer to critical section that was initialized
126833 +
126834 +  @return: SDIO_STATUS_SUCCESS on success.
126835 +
126836 +  @notes:  The critical section lock is acquired when this function returns
126837 +           SDIO_STATUS_SUCCESS.  Use CriticalSectionRelease() to release
126838 +           the critical section lock.
126839 +
126840 +  @see also: CriticalSectionRelease
126841 +
126842 +  @example: To acquire a critical section lock:
126843 +        status = CriticalSectionAcquire(&pDevice->ListLock);
126844 +        if (!SDIO_SUCCESS(status)) {
126845 +                .. failed
126846 +            return status;
126847 +        }
126848 +        ... access protected data
126849 +            // unlock
126850 +        status = CriticalSectionRelease(&pDevice->ListLock);
126851 +        if (!SDIO_SUCCESS(status)) {
126852 +                .. failed
126853 +            return status;
126854 +        }
126855 +
126856 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126857 +static inline SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit) {
126858 +    call_spin_lock(pCrit);
126859 +    return SDIO_STATUS_SUCCESS;
126860 +}
126861 +
126862 +// macro-tized versions
126863 +#define CriticalSectionAcquire_M(pCrit) \
126864 +    SDIO_STATUS_SUCCESS; call_spin_lock(pCrit)
126865 +#define CriticalSectionRelease_M(pCrit) \
126866 +    SDIO_STATUS_SUCCESS; call_spin_unlock(pCrit)
126867 +
126868 +#define CT_DECLARE_IRQ_SYNC_CONTEXT() unsigned long _ctSyncFlags
126869 +
126870 +#define CriticalSectionAcquireSyncIrq(pCrit) \
126871 +    SDIO_STATUS_SUCCESS; call_spin_lock_irqsave(pCrit,_ctSyncFlags)
126872 +
126873 +#define CriticalSectionReleaseSyncIrq(pCrit) \
126874 +    SDIO_STATUS_SUCCESS; call_spin_unlock_irqrestore(pCrit,_ctSyncFlags)
126875 +
126876 +
126877 +
126878 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126879 +  @function: Release a critical section lock.
126880 +
126881 +  @function name: CriticalSectionRelease
126882 +  @prototype: SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit)
126883 +  @category: Support_Reference
126884 +
126885 +  @input: pCrit - pointer to critical section that was initialized
126886 +
126887 +  @return: SDIO_STATUS_SUCCESS on success.
126888 +
126889 +  @notes:  The critical section lock is released when this function returns
126890 +           SDIO_STATUS_SUCCESS.
126891 +
126892 +  @see also: CriticalSectionAcquire
126893 +
126894 +  @example: see CriticalSectionAcquire
126895 +
126896 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126897 +static inline SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit) {
126898 +    call_spin_unlock(pCrit);
126899 +    return SDIO_STATUS_SUCCESS;
126900 +}
126901 +
126902 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126903 +  @function: Cleanup a critical section object
126904 +
126905 +  @function name: CriticalSectionDelete
126906 +  @prototype: void CriticalSectionDelete(POS_CRITICALSECTION pCrit)
126907 +  @category: Support_Reference
126908 +
126909 +  @input: pCrit - an initialized critical section object
126910 +
126911 +  @return: SDIO_STATUS_SUCCESS on success.
126912 +
126913 +  @notes:
126914 +
126915 +  @see also: CriticalSectionInit, CriticalSectionAcquire, CriticalSectionRelease
126916 +
126917 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126918 +static inline void CriticalSectionDelete(POS_CRITICALSECTION pCrit) {
126919 +    return;
126920 +}
126921 +
126922 +/* internal use */
126923 +static inline SDIO_STATUS SignalInitialize(POS_SIGNAL pSignal) {
126924 +    sema_init(pSignal, 0);
126925 +    return SDIO_STATUS_SUCCESS;
126926 +}
126927 +/* internal use */
126928 +static inline void SignalDelete(POS_SIGNAL pSignal) {
126929 +    return;
126930 +}
126931 +/* internal use */
126932 +static inline SDIO_STATUS SignalWaitInterruptible(POS_SIGNAL pSignal) {
126933 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWaitInterruptible not allowed\n");
126934 +    if (down_interruptible(pSignal) == 0) {
126935 +        return SDIO_STATUS_SUCCESS;
126936 +    } else {
126937 +        return SDIO_STATUS_INTERRUPTED;
126938 +    }
126939 +}
126940 +/* internal use */
126941 +static inline SDIO_STATUS SignalWait(POS_SIGNAL pSignal) {
126942 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWait not allowed\n");
126943 +    down(pSignal);
126944 +    return SDIO_STATUS_SUCCESS;
126945 +}
126946 +
126947 +/* internal use */
126948 +static inline SDIO_STATUS SignalSet(POS_SIGNAL pSignal) {
126949 +    up(pSignal);
126950 +    return SDIO_STATUS_SUCCESS;
126951 +}
126952 +
126953 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126954 +  @function: Initialize a semaphore object.
126955 +
126956 +  @function name: SemaphoreInitialize
126957 +  @prototype: SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value)
126958 +  @category: Support_Reference
126959 +
126960 +  @input:  value - initial value of the semaphore
126961 +
126962 +  @output: pSem - pointer to a semaphore object to initialize
126963 +
126964 +  @return: SDIO_STATUS_SUCCESS on success.
126965 +
126966 +  @notes:  SemaphoreDelete() must be called to cleanup any resources
126967 +           associated with the semaphore
126968 +
126969 +  @see also: SemaphoreDelete, SemaphorePend, SemaphorePendInterruptable
126970 +
126971 +  @example: To initialize a semaphore:
126972 +        status = SemaphoreInitialize(&pDevice->ResourceSem,1);
126973 +        if (!SDIO_SUCCESS(status)) {
126974 +                .. failed
126975 +            return status;
126976 +        }
126977 +
126978 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126979 +static inline SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value) {
126980 +    sema_init(pSem, value);
126981 +    return SDIO_STATUS_SUCCESS;
126982 +}
126983 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
126984 +  @function: Cleanup a semaphore object.
126985 +
126986 +  @function name: SemaphoreDelete
126987 +  @prototype: void SemaphoreDelete(POS_SEMAPHORE pSem)
126988 +  @category: Support_Reference
126989 +
126990 +  @input: pSem - pointer to a semaphore object to cleanup
126991 +
126992 +  @return:
126993 +
126994 +  @notes:
126995 +
126996 +  @see also: SemaphoreInitialize
126997 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
126998 +static inline void SemaphoreDelete(POS_SEMAPHORE pSem) {
126999 +    return;
127000 +}
127001 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127002 +  @function: Acquire the semaphore or pend if the resource is not available
127003 +
127004 +  @function name: SemaphorePend
127005 +  @prototype: SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem)
127006 +  @category: Support_Reference
127007 +
127008 +  @input: pSem - pointer to an initialized semaphore object
127009 +
127010 +  @return: SDIO_STATUS_SUCCESS on success.
127011 +
127012 +  @notes: If the semaphore count is zero this function blocks until the count
127013 +          becomes non-zero, otherwise the count is decremented and execution
127014 +          continues. While waiting, the task/thread cannot be interrupted.
127015 +          If the task or thread should be interruptible, use SemaphorePendInterruptible.
127016 +          On some OSes SemaphorePend and SemaphorePendInterruptible behave the same.
127017 +
127018 +  @see also: SemaphorePendInterruptable, SemaphorePost
127019 +  @example: To wait for a resource using a semaphore:
127020 +        status = SemaphorePend(&pDevice->ResourceSem);
127021 +        if (!SDIO_SUCCESS(status)) {
127022 +                .. failed
127023 +            return status;
127024 +        }
127025 +        ... resource acquired
127026 +        SemaphorePost(&pDevice->ResourceSem);
127027 +
127028 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127029 +static inline SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem) {
127030 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePend not allowed\n");
127031 +    down(pSem);
127032 +    return SDIO_STATUS_SUCCESS;
127033 +}
127034 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127035 +  @function: Acquire the semaphore or pend if the resource is not available
127036 +
127037 +  @function name: SemaphorePendInterruptable
127038 +  @prototype: SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem)
127039 +  @category: Support_Reference
127040 +
127041 +  @input: pSem - pointer to an initialized semaphore object
127042 +
127043 +  @return: SDIO_STATUS_SUCCESS on success.
127044 +
127045 +  @notes: If the semaphore count is zero this function blocks until the count
127046 +          becomes non-zero, otherwise the count is decremented and execution
127047 +          continues. While waiting, the task/thread can be interrupted.
127048 +          If the task or thread should not be interruptible, use SemaphorePend.
127049 +
127050 +  @see also: SemaphorePend, SemaphorePost
127051 +  @example: To wait for a resource using a semaphore:
127052 +        status = SemaphorePendInterruptable(&pDevice->ResourceSem);
127053 +        if (!SDIO_SUCCESS(status)) {
127054 +                .. failed, could have been interrupted
127055 +            return status;
127056 +        }
127057 +        ... resource acquired
127058 +        SemaphorePost(&pDevice->ResourceSem);
127059 +
127060 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127061 +static inline SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem) {
127062 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePendInterruptable not allowed\n");
127063 +    if (down_interruptible(pSem) == 0) {
127064 +        return SDIO_STATUS_SUCCESS;
127065 +    } else {
127066 +        return SDIO_STATUS_INTERRUPTED;
127067 +    }
127068 +}
127069 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127070 +  @function: Post a semaphore.
127071 +
127072 +  @function name: SemaphorePost
127073 +  @prototype: SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem)
127074 +  @category: Support_Reference
127075 +
127076 +  @input: pSem - pointer to an initialized semaphore object
127077 +
127078 +  @return: SDIO_STATUS_SUCCESS on success.
127079 +
127080 +  @notes: This function increments the semaphore count.
127081 +
127082 +  @see also: SemaphorePend, SemaphorePendInterruptable.
127083 +  @example: Posting a semaphore:
127084 +        status = SemaphorePendInterruptable(&pDevice->ResourceSem);
127085 +        if (!SDIO_SUCCESS(status)) {
127086 +                .. failed, could have been interrupted
127087 +            return status;
127088 +        }
127089 +        ... resource acquired
127090 +            // post the semaphore
127091 +        SemaphorePost(&pDevice->ResourceSem);
127092 +
127093 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127094 +static inline SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem) {
127095 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePost not allowed\n");
127096 +    up(pSem);
127097 +    return SDIO_STATUS_SUCCESS;
127098 +}
127099 +
127100 +
127101 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127102 +  @function: Allocate a block of kernel accessible memory
127103 +
127104 +  @function name: KernelAlloc
127105 +  @prototype: PVOID KernelAlloc(UINT size)
127106 +  @category: Support_Reference
127107 +
127108 +  @input: size - size of memory block to allocate
127109 +
127110 +  @return: pointer to the allocated memory, NULL if allocation failed
127111 +
127112 +  @notes: For operating systems that use paging, the allocated memory is always
127113 +          non-paged memory.  Caller should only use KernelFree() to release the
127114 +          block of memory.  This call can potentially block and should only be called
127115 +          from a schedulable context.  Use KernelAllocIrqSafe() if the allocation
127116 +          must be made from a non-schedulable context.
127117 +
127118 +  @see also: KernelFree, KernelAllocIrqSafe
127119 +  @example: allocating memory:
127120 +        pBlock = KernelAlloc(1024);
127121 +        if (pBlock == NULL) {
127122 +                .. failed, no memory
127123 +            return SDIO_STATUS_INSUFFICIENT_RESOURCES;
127124 +        }
127125 +
127126 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127127 +static inline PVOID KernelAlloc(UINT size) {
127128 +    PVOID pMem = kmalloc(size, GFP_KERNEL);
127129 +    if (pMem != NULL) { memset(pMem,0,size); }
127130 +    return pMem;
127131 +}
127132 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127133 +  @function: Free a block of kernel accessible memory.
127134 +
127135 +  @function name: KernelFree
127136 +  @prototype: void KernelFree(PVOID ptr)
127137 +  @category: Support_Reference
127138 +
127139 +  @input: ptr - pointer to memory allocated with KernelAlloc()
127140 +
127141 +  @return:
127142 +
127143 +  @notes: Caller should only use KernelFree() to release memory that was allocated
127144 +          with KernelAlloc().
127145 +
127146 +  @see also: KernelAlloc
127147 +  @example: KernelFree(pBlock);
127148 +
127149 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127150 +static inline void KernelFree(PVOID ptr) {
127151 +    kfree(ptr);
127152 +}
127153 +
127154 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127155 +  @function: Allocate a block of kernel accessible memory in an IRQ-safe manner
127156 +
127157 +  @function name: KernelAllocIrqSafe
127158 +  @prototype: PVOID KernelAllocIrqSafe(UINT size)
127159 +  @category: Support_Reference
127160 +
127161 +  @input: size - size of memory block to allocate
127162 +
127163 +  @return: pointer to the allocated memory, NULL if allocation failed
127164 +
127165 +  @notes: This variant of KernelAlloc allows the allocation of small blocks of
127166 +          memory from an ISR or from a context where scheduling has been disabled.
127167 +          The allocations should be small as the memory is typically allocated
127168 +          from a critical heap. The caller should only use KernelFreeIrqSafe()
127169 +          to release the block of memory.
127170 +
127171 +  @see also: KernelAlloc, KernelFreeIrqSafe
127172 +  @example: allocating memory:
127173 +        pBlock = KernelAllocIrqSafe(16);
127174 +        if (pBlock == NULL) {
127175 +                .. failed, no memory
127176 +            return SDIO_STATUS_INSUFFICIENT_RESOURCES;
127177 +        }
127178 +
127179 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127180 +static inline PVOID KernelAllocIrqSafe(UINT size) {
127181 +    return kmalloc(size, GFP_ATOMIC);
127182 +}
127183 +
127184 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127185 +  @function: Free a block of kernel accessible memory.
127186 +
127187 +  @function name: KernelFreeIrqSafe
127188 +  @prototype: void KernelFreeIrqSafe(PVOID ptr)
127189 +  @category: Support_Reference
127190 +
127191 +  @input: ptr - pointer to memory allocated with KernelAllocIrqSafe()
127192 +
127193 +  @return:
127194 +
127195 +  @notes: Caller should only use KernelFreeIrqSafe() to release memory that was allocated
127196 +          with KernelAllocIrqSafe().
127197 +
127198 +  @see also: KernelAllocIrqSafe
127199 +  @example: KernelFreeIrqSafe(pBlock);
127200 +
127201 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127202 +static inline void KernelFreeIrqSafe(PVOID ptr) {
127203 +    kfree(ptr);
127204 +}
127205 +
127206 +/* error status conversions */
127207 +static inline SYSTEM_STATUS SDIOErrorToOSError(SDIO_STATUS status) {
127208 +    switch (status) {
127209 +        case SDIO_STATUS_SUCCESS:
127210 +            return 0;
127211 +        case SDIO_STATUS_INVALID_PARAMETER:
127212 +            return -EINVAL;
127213 +        case SDIO_STATUS_PENDING:
127214 +            return -EAGAIN; /* try again */
127215 +        case SDIO_STATUS_DEVICE_NOT_FOUND:
127216 +            return -ENXIO;
127217 +        case SDIO_STATUS_DEVICE_ERROR:
127218 +            return -EIO;
127219 +        case SDIO_STATUS_INTERRUPTED:
127220 +            return -EINTR;
127221 +        case SDIO_STATUS_NO_RESOURCES:
127222 +            return -ENOMEM;
127223 +        case SDIO_STATUS_ERROR:
127224 +        default:
127225 +            return -EFAULT;
127226 +    }
127227 +}
127228 +static inline SDIO_STATUS OSErrorToSDIOError(SYSTEM_STATUS status) {
127229 +    if (status >=0) {
127230 +        return SDIO_STATUS_SUCCESS;
127231 +    }
127232 +    switch (status) {
127233 +        case -EINVAL:
127234 +            return SDIO_STATUS_INVALID_PARAMETER;
127235 +        case -ENXIO:
127236 +            return SDIO_STATUS_DEVICE_NOT_FOUND;
127237 +        case -EIO:
127238 +            return SDIO_STATUS_DEVICE_ERROR;
127239 +        case -EINTR:
127240 +            return SDIO_STATUS_INTERRUPTED;
127241 +        case -ENOMEM:
127242 +            return SDIO_STATUS_NO_RESOURCES;
127243 +        case -EFAULT:
127244 +            return SDIO_STATUS_ERROR;
127245 +        default:
127246 +            return SDIO_STATUS_ERROR;
127247 +    }
127248 +}
127249 +
127250 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127251 +  @function: Sleep or delay the execution context for a number of milliseconds.
127252 +
127253 +  @function name: OSSleep
127254 +  @prototype: SDIO_STATUS OSSleep(INT SleepInterval)
127255 +  @category: Support_Reference
127256 +
127257 +  @input: SleepInterval - time in milliseconds to put the execution context to sleep
127258 +
127259 +  @return: SDIO_STATUS_SUCCESS if sleep succeeded.
127260 +
127261 +  @notes: Caller should be in a context that allows it to sleep or block.  The
127262 +  minimum duration of sleep may be greater than 1 MS on some platforms and OSes.
127263 +
127264 +  @see also: OSSleep
127265 +  @example: Using sleep to delay
127266 +        EnableSlotPower(pSlot);
127267 +            // wait for power to settle
127268 +        status = OSSleep(100);
127269 +        if (!SDIO_SUCCESS(status)){
127270 +            // failed..
127271 +        }
127272 +
127273 +
127274 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127275 +static inline SDIO_STATUS OSSleep(INT SleepInterval) {
127276 +    UINT32 delta;
127277 +
127278 +    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"OSSleep not allowed\n");
127279 +        /* convert timeout to ticks */
127280 +    delta = (SleepInterval * HZ)/1000;
127281 +    if (delta == 0) {
127282 +        delta = 1;
127283 +    }
127284 +    set_current_state(TASK_INTERRUPTIBLE);
127285 +    if (schedule_timeout(delta) != 0) {
127286 +        return SDIO_STATUS_INTERRUPTED;
127287 +    }
127288 +    return SDIO_STATUS_SUCCESS;
127289 +}
127290 +
127291 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127292 +  @function: get the OSs device object
127293 +
127294 +  @function name: SD_GET_OS_DEVICE
127295 +  @prototype: POS_DEVICE SD_GET_OS_DEVICE(PSDDEVICE pDevice)
127296 +  @category: Support_Reference
127297 +
127298 +  @input: pDevice - the device on the HCD
127299 +
127300 +  @return: pointer to the OSs device
127301 +
127302 +  @see also:
127303 +  @example: obtain low level device
127304 +        pFunctionContext->GpsDevice.Port.dev = SD_GET_OS_DEVICE(pDevice);
127305 +
127306 +
127307 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127308 +#define SD_GET_OS_DEVICE(pDevice) &((pDevice)->Device.dev)
127309 +
127310 +
127311 +#ifdef __iomem
127312 +    /* new type checking in 2.6.9 */
127313 +    /* I/O Access macros */
127314 +#define _READ_DWORD_REG(reg)  \
127315 +        readl((const volatile void __iomem *)(reg))
127316 +#define _READ_WORD_REG(reg)  \
127317 +        readw((const volatile void __iomem *)(reg))
127318 +#define _READ_BYTE_REG(reg)  \
127319 +        readb((const volatile void __iomem *)(reg))
127320 +#define _WRITE_DWORD_REG(reg,value)  \
127321 +        writel((value),(volatile void __iomem *)(reg))
127322 +#define _WRITE_WORD_REG(reg,value)  \
127323 +        writew((value),(volatile void __iomem *)(reg))
127324 +#define _WRITE_BYTE_REG(reg,value)  \
127325 +        writeb((value),(volatile void __iomem *)(reg))
127326 +#else
127327 +    /* I/O Access macros */
127328 +#define _READ_DWORD_REG(reg)  \
127329 +        readl((reg))
127330 +#define _READ_WORD_REG(reg)  \
127331 +        readw((reg))
127332 +#define _READ_BYTE_REG(reg)  \
127333 +        readb((reg))
127334 +#define _WRITE_DWORD_REG(reg,value)  \
127335 +        writel((value),(reg))
127336 +#define _WRITE_WORD_REG(reg,value)  \
127337 +        writew((value),(reg))
127338 +#define _WRITE_BYTE_REG(reg,value)  \
127339 +        writeb((value),(reg))
127340 +#endif
127341 +    /* atomic operators */
127342 +static inline ATOMIC_FLAGS AtomicTest_Set(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
127343 +    return test_and_set_bit(BitNo,(ATOMIC_FLAGS *)pValue);
127344 +}
127345 +static inline ATOMIC_FLAGS AtomicTest_Clear(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
127346 +    return test_and_clear_bit(BitNo,(ATOMIC_FLAGS *)pValue);
127347 +}
127348 +
127349 +struct _OSKERNEL_HELPER;
127350 +
127351 +typedef THREAD_RETURN (*PHELPER_FUNCTION)(struct _OSKERNEL_HELPER *);
127352 +
127353 +typedef struct _OSKERNEL_HELPER {
127354 +    PKERNEL_TASK            pTask;
127355 +    BOOL                    ShutDown;
127356 +    OS_SIGNAL               WakeSignal;
127357 +    struct completion       Completion;
127358 +    PVOID                   pContext;
127359 +    PHELPER_FUNCTION        pHelperFunc;
127360 +}OSKERNEL_HELPER, *POSKERNEL_HELPER;
127361 +
127362 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127363 +  @function: Wake the helper thread
127364 +
127365 +  @function name: SD_WAKE_OS_HELPER
127366 +  @prototype: SD_WAKE_OS_HELPER(POSKERNEL_HELPER pOSHelper)
127367 +  @category: Support_Reference
127368 +
127369 +  @input: pOSHelper - the OS helper object
127370 +
127371 +  @return: SDIO_STATUS
127372 +
127373 +  @see also: SDLIB_OSCreateHelper
127374 +
127375 +  @example: Waking up a helper thread
127376 +        status = SD_WAKE_OS_HELPER(&pInstance->OSHelper);
127377 +
127378 +
127379 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127380 +#define SD_WAKE_OS_HELPER(p)        SignalSet(&(p)->WakeSignal)
127381 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127382 +  @function: Obtains the context for the helper function
127383 +
127384 +  @function name: SD_GET_OS_HELPER_CONTEXT
127385 +  @prototype: SD_GET_OS_HELPER_CONTEXT(POSKERNEL_HELPER pOSHelper)
127386 +  @category: Support_Reference
127387 +
127388 +  @input: pOSHelper - the OS helper object
127389 +
127390 +  @return: helper specific context
127391 +
127392 +  @notes: This macro should only be called by the function associated with
127393 +          the helper object.
127394 +
127395 +  @see also: SDLIB_OSCreateHelper
127396 +
127397 +  @example: Getting the helper specific context
127398 +        PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
127399 +
127400 +
127401 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127402 +#define SD_GET_OS_HELPER_CONTEXT(p)     (p)->pContext
127403 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127404 +  @function: Check helper function shut down flag.
127405 +
127406 +  @function name: SD_IS_HELPER_SHUTTING_DOWN
127407 +  @prototype: SD_IS_HELPER_SHUTTING_DOWN(POSKERNEL_HELPER pOSHelper)
127408 +  @category: Support_Reference
127409 +
127410 +  @input: pOSHelper - the OS helper object
127411 +
127412 +  @return: TRUE if shutting down, else FALSE
127413 +
127414 +  @notes: This macro should only be called by the function associated with
127415 +          the helper object.  The function should call this macro when it
127416 +          unblocks from the call to SD_WAIT_FOR_WAKEUP().  If this function
127417 +          returns TRUE, the function should clean up and exit.
127418 +
127419 +  @see also: SDLIB_OSCreateHelper , SD_WAIT_FOR_WAKEUP
127420 +
127421 +  @example: Checking for shutdown
127422 +        while(1) {
127423 +              status = SD_WAIT_FOR_WAKEUP(pHelper);
127424 +              if (!SDIO_SUCCESS(status)) {
127425 +                  break;
127426 +              }
127427 +              if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
127428 +                  ... shutting down
127429 +                  break;
127430 +              }
127431 +        }
127432 +
127433 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127434 +#define SD_IS_HELPER_SHUTTING_DOWN(p)   (p)->ShutDown
127435 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127436 +  @function: Suspend and wait for wakeup signal
127437 +
127438 +  @function name: SD_WAIT_FOR_WAKEUP
127439 +  @prototype: SD_WAIT_FOR_WAKEUP(POSKERNEL_HELPER pOSHelper)
127440 +  @category: Support_Reference
127441 +
127442 +  @input: pOSHelper - the OS helper object
127443 +
127444 +  @return: SDIO_STATUS
127445 +
127446 +  @notes: This macro should only be called by the function associated with
127447 +          the helper object.  The function should call this function to suspend (block)
127448 +          itself and wait for a wake up signal. The function should always check
127449 +          whether the function should exit by calling SD_IS_HELPER_SHUTTING_DOWN.
127450 +
127451 +  @see also: SDLIB_OSCreateHelper , SD_IS_HELPER_SHUTTING_DOWN
127452 +
127453 +  @example: block on the wake signal
127454 +        while(1) {
127455 +              status = SD_WAIT_FOR_WAKEUP(pHelper);
127456 +              if (!SDIO_SUCCESS(status)) {
127457 +                  break;
127458 +              }
127459 +              if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
127460 +                  ... shutting down
127461 +                  break;
127462 +              }
127463 +        }
127464 +
127465 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127466 +#define SD_WAIT_FOR_WAKEUP(p)   SignalWaitInterruptible(&(p)->WakeSignal);
127467 +
127468 +#define CT_LE16_TO_CPU_ENDIAN(x) __le16_to_cpu(x)
127469 +#define CT_LE32_TO_CPU_ENDIAN(x) __le32_to_cpu(x)
127470 +#define CT_CPU_ENDIAN_TO_LE16(x) __cpu_to_le16(x)
127471 +#define CT_CPU_ENDIAN_TO_LE32(x) __cpu_to_le32(x)
127472 +
127473 +#define CT_CPU_ENDIAN_TO_BE16(x) __cpu_to_be16(x)
127474 +#define CT_CPU_ENDIAN_TO_BE32(x) __cpu_to_be32(x)
127475 +#define CT_BE16_TO_CPU_ENDIAN(x) __be16_to_cpu(x)
127476 +#define CT_BE32_TO_CPU_ENDIAN(x) __be32_to_cpu(x)
127477 +#endif /* __CPSYSTEM_LINUX_H___ */
127478 +
127479 Index: linux-2.6.24.7/include/linux/sdio/mmc_defs.h
127480 ===================================================================
127481 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
127482 +++ linux-2.6.24.7/include/linux/sdio/mmc_defs.h        2008-12-11 22:46:49.000000000 +0100
127483 @@ -0,0 +1,103 @@
127484 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127485 +@file: mmc_defs.h
127486 +
127487 +@abstract: MMC definitions not already defined in _sdio_defs.h
127488 +
127489 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
127490 +
127491 +
127492 + *
127493 + *  This program is free software; you can redistribute it and/or modify
127494 + *  it under the terms of the GNU General Public License version 2 as
127495 + *  published by the Free Software Foundation;
127496 + *
127497 + *  Software distributed under the License is distributed on an "AS
127498 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
127499 + *  implied. See the License for the specific language governing
127500 + *  rights and limitations under the License.
127501 + *
127502 + *  Portions of this code were developed with information supplied from the
127503 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
127504 + *
127505 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
127506 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
127507 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
127508 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
127509 + *   Specification may require a license from the SD Card Association or other third parties.
127510 + *   Disclaimers:
127511 + *   The information contained in the Simplified Specification is presented only as a standard
127512 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
127513 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
127514 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
127515 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
127516 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
127517 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
127518 + *   information, know-how or other confidential information to any third party.
127519 + *
127520 + *
127521 + *  The initial developers of the original code are Seung Yi and Paul Lever
127522 + *
127523 + *  sdio@atheros.com
127524 + *
127525 + *
127526 +
127527 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127528 +#ifndef ___MMC_DEFS_H___
127529 +#define ___MMC_DEFS_H___
127530 +
127531 +#define MMC_MAX_BUS_CLOCK    20000000 /* max clock speed in hz */
127532 +#define MMC_HS_MAX_BUS_CLOCK 52000000 /* MMC PLUS (high speed) max clock rate in hz */
127533 +
127534 +/* R2 (CSD) macros */
127535 +#define GET_MMC_CSD_TRANS_SPEED(pR) (pR)[12]
127536 +#define GET_MMC_SPEC_VERSION(pR)    (((pR)[15] >> 2) & 0x0F)
127537 +#define MMC_SPEC_1_0_TO_1_2         0x00
127538 +#define MMC_SPEC_1_4                0x01
127539 +#define MMC_SPEC_2_0_TO_2_2         0x02
127540 +#define MMC_SPEC_3_1                0x03
127541 +#define MMC_SPEC_4_0_TO_4_1         0x04
127542 +
127543 +#define MMC_CMD_SWITCH    6
127544 +#define MMC_CMD8    8
127545 +
127546 +#define MMC_SWITCH_CMD_SET    0
127547 +#define MMC_SWITCH_SET_BITS   1
127548 +#define MMC_SWITCH_CLEAR_BITS 2
127549 +#define MMC_SWITCH_WRITE_BYTE 3
127550 +#define MMC_SWITCH_CMD_SET0   0
127551 +#define MMC_SWITCH_BUILD_ARG(cmdset,access,index,value) \
127552 +     (((cmdset) & 0x07) | (((access) & 0x03) << 24) | (((index) & 0xFF) << 16) | (((value) & 0xFF) << 8))
127553 +
127554 +#define MMC_EXT_CSD_SIZE                     512
127555 +
127556 +#define MMC_EXT_S_CMD_SET_OFFSET             504
127557 +#define MMC_EXT_MIN_PERF_W_8_52_OFFSET       210
127558 +#define MMC_EXT_MIN_PERF_R_8_52_OFFSET       209
127559 +#define MMC_EXT_MIN_PERF_W_8_26_4_52_OFFSET  208
127560 +#define MMC_EXT_MIN_PERF_R_8_26_4_52_OFFSET  207
127561 +#define MMC_EXT_MIN_PERF_W_4_26_OFFSET       206
127562 +#define MMC_EXT_MIN_PERF_R_4_56_OFFSET       205
127563 +#define MMC_EXT_PWR_CL_26_360_OFFSET         203
127564 +#define MMC_EXT_PWR_CL_52_360_OFFSET         202
127565 +#define MMC_EXT_PWR_CL_26_195_OFFSET         201
127566 +#define MMC_EXT_PWR_CL_52_195_OFFSET         200
127567 +#define MMC_EXT_GET_PWR_CLASS(reg)    ((reg) & 0xF)
127568 +#define MMC_EXT_MAX_PWR_CLASSES       16
127569 +#define MMC_EXT_CARD_TYPE_OFFSET             196
127570 +#define MMC_EXT_CARD_TYPE_HS_52  (1 << 1)
127571 +#define MMC_EXT_CARD_TYPE_HS_26  (1 << 0)
127572 +#define MMC_EXT_CSD_VER_OFFSET               194
127573 +#define MMC_EXT_VER_OFFSET                   192
127574 +#define MMC_EXT_VER_1_0          0
127575 +#define MMC_EXT_VER_1_1          1
127576 +#define MMC_EXT_CMD_SET_OFFSET               191
127577 +#define MMC_EXT_CMD_SET_REV_OFFSET           189
127578 +#define MMC_EXT_PWR_CLASS_OFFSET             187
127579 +#define MMC_EXT_HS_TIMING_OFFSET             185
127580 +#define MMC_EXT_HS_TIMING_ENABLE   0x01
127581 +#define MMC_EXT_BUS_WIDTH_OFFSET             183
127582 +#define MMC_EXT_BUS_WIDTH_1_BIT    0x00
127583 +#define MMC_EXT_BUS_WIDTH_4_BIT    0x01
127584 +#define MMC_EXT_BUS_WIDTH_8_BIT    0x02
127585 +
127586 +#endif
127587 Index: linux-2.6.24.7/include/linux/sdio/sdio_busdriver.h
127588 ===================================================================
127589 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
127590 +++ linux-2.6.24.7/include/linux/sdio/sdio_busdriver.h  2008-12-11 22:46:49.000000000 +0100
127591 @@ -0,0 +1,1435 @@
127592 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127593 +@file: sdio_busdriver.h
127594 +
127595 +@abstract: include file for registration of SDIO function drivers
127596 +  and SDIO host controller bus drivers.
127597 +
127598 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
127599 +
127600 +
127601 + *
127602 + *  This program is free software; you can redistribute it and/or modify
127603 + *  it under the terms of the GNU General Public License version 2 as
127604 + *  published by the Free Software Foundation;
127605 + *
127606 + *  Software distributed under the License is distributed on an "AS
127607 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
127608 + *  implied. See the License for the specific language governing
127609 + *  rights and limitations under the License.
127610 + *
127611 + *  Portions of this code were developed with information supplied from the
127612 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
127613 + *
127614 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
127615 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
127616 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
127617 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
127618 + *   Specification may require a license from the SD Card Association or other third parties.
127619 + *   Disclaimers:
127620 + *   The information contained in the Simplified Specification is presented only as a standard
127621 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
127622 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
127623 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
127624 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
127625 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
127626 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
127627 + *   information, know-how or other confidential information to any third party.
127628 + *
127629 + *
127630 + *  The initial developers of the original code are Seung Yi and Paul Lever
127631 + *
127632 + *  sdio@atheros.com
127633 + *
127634 + *
127635 +
127636 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127637 +#ifndef __SDIO_BUSDRIVER_H___
127638 +#define __SDIO_BUSDRIVER_H___
127639 +
127640 +typedef UINT8      CT_VERSION_CODE;
127641 +#define CT_SDIO_STACK_VERSION_CODE ((CT_VERSION_CODE)0x26)   /* version code that must be set in various structures */
127642 +#define CT_SDIO_STACK_VERSION_MAJOR(v) (((v) & 0xF0) >> 4)
127643 +#define CT_SDIO_STACK_VERSION_MINOR(v) (((v) & 0x0F))
127644 +#define SET_SDIO_STACK_VERSION(p) (p)->Version = CT_SDIO_STACK_VERSION_CODE
127645 +#define GET_SDIO_STACK_VERSION(p) (p)->Version
127646 +#define GET_SDIO_STACK_VERSION_MAJOR(p) CT_SDIO_STACK_VERSION_MAJOR(GET_SDIO_STACK_VERSION(p))
127647 +#define GET_SDIO_STACK_VERSION_MINOR(p) CT_SDIO_STACK_VERSION_MINOR(GET_SDIO_STACK_VERSION(p))
127648 +#include "sdlist.h"
127649 +
127650 +/* card flags */
127651 +typedef UINT16      CARD_INFO_FLAGS;
127652 +#define CARD_MMC        0x0001    /* Multi-media card */
127653 +#define CARD_SD         0x0002    /* SD-Memory present */
127654 +#define CARD_SDIO       0x0004    /* SDIO present */
127655 +#define CARD_RAW        0x0008    /* Raw card */
127656 +#define CARD_COMBO      (CARD_SD | CARD_SDIO)  /* SDIO with SD */
127657 +#define CARD_TYPE_MASK  0x000F    /* card type mask */
127658 +#define CARD_SD_WP      0x0010    /* SD WP on */
127659 +#define CARD_PSEUDO     0x0020    /* pseudo card (internal use) */
127660 +#define CARD_HIPWR      0x0040    /* card can use more than 200mA (SDIO 1.1 or greater)*/
127661 +#define GET_CARD_TYPE(flags) ((flags) & CARD_TYPE_MASK)
127662 +
127663 +/* bus mode and clock rate */
127664 +typedef UINT32  SD_BUSCLOCK_RATE;       /* clock rate in hz */
127665 +typedef UINT16  SD_BUSMODE_FLAGS;
127666 +#define SDCONFIG_BUS_WIDTH_RESERVED           0x00
127667 +#define SDCONFIG_BUS_WIDTH_SPI                0x01
127668 +#define SDCONFIG_BUS_WIDTH_1_BIT              0x02
127669 +#define SDCONFIG_BUS_WIDTH_4_BIT              0x03
127670 +#define SDCONFIG_BUS_WIDTH_MMC8_BIT           0x04
127671 +#define SDCONFIG_BUS_WIDTH_MASK               0x0F
127672 +#define SDCONFIG_SET_BUS_WIDTH(flags,width) \
127673 +{                       \
127674 +    (flags) &= ~SDCONFIG_BUS_WIDTH_MASK; \
127675 +    (flags) |= (width);                  \
127676 +}
127677 +#define SDCONFIG_GET_BUSWIDTH(flags) ((flags) & SDCONFIG_BUS_WIDTH_MASK)
127678 +#define SDCONFIG_BUS_MODE_SPI_NO_CRC         0x40   /* SPI bus is operating with NO CRC */
127679 +#define SDCONFIG_BUS_MODE_SD_HS              0x80   /* set interface to SD high speed mode  */
127680 +#define SDCONFIG_BUS_MODE_MMC_HS             0x20   /* set interface to MMC high speed mode */
127681 +
127682 +typedef UINT16 SD_SLOT_CURRENT;      /* slot current in mA */
127683 +
127684 +typedef UINT8 SLOT_VOLTAGE_MASK;     /* slot voltage */
127685 +#define SLOT_POWER_3_3V  0x01
127686 +#define SLOT_POWER_3_0V  0x02
127687 +#define SLOT_POWER_2_8V  0x04
127688 +#define SLOT_POWER_2_0V  0x08
127689 +#define SLOT_POWER_1_8V  0x10
127690 +#define SLOT_POWER_1_6V  0x20
127691 +
127692 +#define MAX_CARD_RESPONSE_BYTES 17
127693 +
127694 +/* plug and play information for SD cards */
127695 +typedef struct _SD_PNP_INFO {
127696 +    UINT16 SDIO_ManufacturerCode;  /* JEDEC Code */
127697 +    UINT16 SDIO_ManufacturerID;    /* manf-specific ID */
127698 +    UINT8  SDIO_FunctionNo;        /* function number 1-7 */
127699 +    UINT8  SDIO_FunctionClass;     /* function class */
127700 +    UINT8  SDMMC_ManfacturerID;    /* card CID's MANF-ID */
127701 +    UINT16 SDMMC_OEMApplicationID; /* card CID's OEMAPP-ID */
127702 +    CARD_INFO_FLAGS CardFlags;     /* card flags */
127703 +}SD_PNP_INFO, *PSD_PNP_INFO;
127704 +
127705 +#define IS_LAST_SDPNPINFO_ENTRY(id)\
127706 +    (((id)->SDIO_ManufacturerCode == 0) &&\
127707 +     ((id)->SDIO_ManufacturerID == 0) &&\
127708 +     ((id)->SDIO_FunctionNo == 0) &&\
127709 +     ((id)->SDIO_FunctionClass == 0) &&\
127710 +     ((id)->SDMMC_OEMApplicationID == 0) && \
127711 +     ((id)->CardFlags == 0))
127712 +
127713 +/* card properties */
127714 +typedef struct _CARD_PROPERTIES {
127715 +    UINT8              IOFnCount;      /* number of I/O functions */
127716 +    UINT8              SDIORevision;   /* SDIO revision */
127717 +#define SDIO_REVISION_1_00 0x00
127718 +#define SDIO_REVISION_1_10 0x01
127719 +#define SDIO_REVISION_1_20 0x02
127720 +    UINT8              SD_MMC_Revision; /* SD or MMC revision */
127721 +#define SD_REVISION_1_01  0x00
127722 +#define SD_REVISION_1_10  0x01
127723 +#define MMC_REVISION_1_0_2_2 0x00
127724 +#define MMC_REVISION_3_1  0x01
127725 +#define MMC_REVISION_4_0  0x02
127726 +    UINT16 SDIO_ManufacturerCode;      /* JEDEC Code */
127727 +    UINT16 SDIO_ManufacturerID;        /* manf-specific ID */
127728 +    UINT32             CommonCISPtr;   /* common CIS ptr */
127729 +    UINT16             RCA;            /* relative card address */
127730 +    UINT8              SDIOCaps;       /* SDIO card capabilities (refer to SDIO spec for decoding) */
127731 +    UINT8              CardCSD[MAX_CARD_RESPONSE_BYTES];    /* for SD/MMC cards */
127732 +    CARD_INFO_FLAGS    Flags;          /* card flags */
127733 +    SD_BUSCLOCK_RATE   OperBusClock;   /* operational bus clock (based on HCD limit)*/
127734 +    SD_BUSMODE_FLAGS   BusMode;        /* current card bus mode */
127735 +    UINT16             OperBlockLenLimit; /* operational bytes per block length limit*/
127736 +    UINT16             OperBlockCountLimit; /* operational number of blocks per transfer limit */
127737 +    UINT8              CardState;      /* card state flags */
127738 +    SLOT_VOLTAGE_MASK  CardVoltage;    /* card operational voltage */
127739 +#define CARD_STATE_REMOVED 0x01
127740 +}CARD_PROPERTIES, *PCARD_PROPERTIES;
127741 +
127742 +/* SDREQUEST request flags */
127743 +typedef UINT32 SDREQUEST_FLAGS;
127744 +/* write operation */
127745 +#define SDREQ_FLAGS_DATA_WRITE         0x8000
127746 +/* has data (read or write) */
127747 +#define SDREQ_FLAGS_DATA_TRANS         0x4000
127748 +/* command is an atomic APP command, requiring CMD55 to be issued */
127749 +#define SDREQ_FLAGS_APP_CMD            0x2000
127750 +/* transfer should be handled asynchronously */
127751 +#define SDREQ_FLAGS_TRANS_ASYNC        0x1000
127752 +/* host should skip the SPI response filter for this command */
127753 +#define SDREQ_FLAGS_RESP_SKIP_SPI_FILT 0x0800
127754 +/* host should skip the response check for this data transfer */
127755 +#define SDREQ_FLAGS_DATA_SKIP_RESP_CHK 0x0400
127756 +/* flag requesting a CMD12 be automatically issued by host controller */
127757 +#define SDREQ_FLAGS_AUTO_CMD12         0x0200
127758 +/* flag indicating that the data buffer meets HCD's DMA restrictions   */
127759 +#define SDREQ_FLAGS_DATA_DMA           0x0010
127760 +/* indicate to host that this is a short and quick transfer, the HCD may optimize
127761 + * this request to reduce interrupt overhead */
127762 +#define SDREQ_FLAGS_DATA_SHORT_TRANSFER   0x00010000
127763 +/* indicate to the host that this is a raw request */
127764 +#define SDREQ_FLAGS_RAW                   0x00020000
127765 +/* auto data transfer status check for MMC and Memory cards */
127766 +#define SDREQ_FLAGS_AUTO_TRANSFER_STATUS  0x00100000
127767 +
127768 +#define SDREQ_FLAGS_UNUSED1               0x00200000
127769 +#define SDREQ_FLAGS_UNUSED2               0x00400000
127770 +#define SDREQ_FLAGS_UNUSED3               0x00800000
127771 +#define SDREQ_FLAGS_UNUSED4               0x01000000
127772 +#define SDREQ_FLAGS_UNUSED5               0x02000000
127773 +
127774 +/* the following flags are internal use only */
127775 +#define SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE 0x0100
127776 +/* flag indicating that response has been converted (internal use) */
127777 +#define SDREQ_FLAGS_RESP_SPI_CONVERTED      0x0040
127778 +/* request was cancelled - internal use only */
127779 +#define SDREQ_FLAGS_CANCELED                0x0020
127780 +/* a barrier operation */
127781 +#define SDREQ_FLAGS_BARRIER                 0x00040000
127782 +/* a pseudo bus request */
127783 +#define SDREQ_FLAGS_PSEUDO                  0x00080000
127784 +/* queue to the head */
127785 +#define SDREQ_FLAGS_QUEUE_HEAD              0x04000000
127786 +
127787 +#define SDREQ_FLAGS_I_UNUSED1               0x08000000
127788 +#define SDREQ_FLAGS_I_UNUSED2               0x10000000
127789 +#define SDREQ_FLAGS_I_UNUSED3               0x20000000
127790 +#define SDREQ_FLAGS_I_UNUSED4               0x40000000
127791 +#define SDREQ_FLAGS_I_UNUSED5               0x80000000
127792 +
127793 +/* response type mask */
127794 +#define SDREQ_FLAGS_RESP_MASK       0x000F
127795 +#define GET_SDREQ_RESP_TYPE(flags)     ((flags) & SDREQ_FLAGS_RESP_MASK)
127796 +#define IS_SDREQ_WRITE_DATA(flags)     ((flags) & SDREQ_FLAGS_DATA_WRITE)
127797 +#define IS_SDREQ_DATA_TRANS(flags)     ((flags) & SDREQ_FLAGS_DATA_TRANS)
127798 +#define IS_SDREQ_RAW(flags)            ((flags) & SDREQ_FLAGS_RAW)
127799 +#define IS_SDREQ_FORCE_DEFERRED_COMPLETE(flags) ((flags) & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE)
127800 +#define SDREQ_FLAGS_NO_RESP         0x0000
127801 +#define SDREQ_FLAGS_RESP_R1         0x0001
127802 +#define SDREQ_FLAGS_RESP_R1B        0x0002
127803 +#define SDREQ_FLAGS_RESP_R2         0x0003
127804 +#define SDREQ_FLAGS_RESP_R3         0x0004
127805 +#define SDREQ_FLAGS_RESP_MMC_R4     0x0005 /* not supported, for future use */
127806 +#define SDREQ_FLAGS_RESP_MMC_R5     0x0006 /* not supported, for future use */
127807 +#define SDREQ_FLAGS_RESP_R6         0x0007
127808 +#define SDREQ_FLAGS_RESP_SDIO_R4    0x0008
127809 +#define SDREQ_FLAGS_RESP_SDIO_R5    0x0009
127810 +
127811 +struct _SDREQUEST;
127812 +struct _SDFUNCTION;
127813 +
127814 +typedef void (*PSDEQUEST_COMPLETION)(struct _SDREQUEST *);
127815 +
127816 +/* defines SD/MMC and SDIO requests for the RAW-mode API */
127817 +typedef struct _SDREQUEST {
127818 +    SDLIST  SDList;             /* internal use list*/
127819 +    UINT32  Argument;           /* SD/SDIO/MMC 32 bit argument */
127820 +    SDREQUEST_FLAGS Flags;      /* request flags */
127821 +    ATOMIC_FLAGS InternalFlags; /* internal use flags */
127822 +    UINT8   Command;            /* SD/SDIO/MMC 8 bit command */
127823 +    UINT8   Response[MAX_CARD_RESPONSE_BYTES];       /* buffer for CMD response */
127824 +    UINT16  BlockCount;         /* number of blocks to send/rcv */
127825 +    UINT16  BlockLen;           /* length of each block */
127826 +    UINT16  DescriptorCount;    /* number of DMA descriptor entries in pDataBuffer if DMA */
127827 +    PVOID   pDataBuffer;        /* starting address of buffer (or ptr to PSDDMA_DESCRIPTOR*/
127828 +    UINT32  DataRemaining;      /* number of bytes remaining in the transfer (internal use) */
127829 +    PVOID   pHcdContext;        /* internal use context */
127830 +    PSDEQUEST_COMPLETION pCompletion; /* function driver completion routine */
127831 +    PVOID   pCompleteContext;   /* function driver completion context */
127832 +    SDIO_STATUS Status;         /* completion status */
127833 +    struct _SDFUNCTION* pFunction; /* function driver that generated request (internal use)*/
127834 +    INT     RetryCount;          /* number of times to retry on error, non-data cmds only */
127835 +    PVOID   pBdRsv1;        /* reserved */
127836 +    PVOID   pBdRsv2;
127837 +    PVOID   pBdRsv3;
127838 +}SDREQUEST, *PSDREQUEST;
127839 +
127840 +    /* a request queue */
127841 +typedef struct _SDREQUESTQUEUE {
127842 +    SDLIST        Queue;           /* the queue of requests */
127843 +    BOOL          Busy;            /* busy flag */
127844 +}SDREQUESTQUEUE, *PSDREQUESTQUEUE;
127845 +
127846 +
127847 +typedef UINT16 SDCONFIG_COMMAND;
127848 +/* SDCONFIG request flags */
127849 +/* get operation */
127850 +#define SDCONFIG_FLAGS_DATA_GET       0x8000
127851 +/* put operation */
127852 +#define SDCONFIG_FLAGS_DATA_PUT       0x4000
127853 +/* host controller */
127854 +#define SDCONFIG_FLAGS_HC_CONFIG      0x2000
127855 +/* both */
127856 +#define SDCONFIG_FLAGS_DATA_BOTH      (SDCONFIG_FLAGS_DATA_GET | SDCONFIG_FLAGS_DATA_PUT)
127857 +/* no data */
127858 +#define SDCONFIG_FLAGS_DATA_NONE      0x0000
127859 +
127860 +/* SDCONFIG commands */
127861 +#define SDCONFIG_GET_HCD_DEBUG   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET  | 275)
127862 +#define SDCONFIG_SET_HCD_DEBUG   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 276)
127863 +
127864 +/* custom hcd commands */
127865 +#define SDCONFIG_GET_HOST_CUSTOM   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET  | 300)
127866 +#define SDCONFIG_PUT_HOST_CUSTOM   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 301)
127867 +
127868 +/* function commands */
127869 +#define SDCONFIG_FUNC_ENABLE_DISABLE         (SDCONFIG_FLAGS_DATA_PUT  | 18)
127870 +#define SDCONFIG_FUNC_UNMASK_IRQ             (SDCONFIG_FLAGS_DATA_NONE | 21)
127871 +#define SDCONFIG_FUNC_MASK_IRQ               (SDCONFIG_FLAGS_DATA_NONE | 22)
127872 +#define SDCONFIG_FUNC_ACK_IRQ                (SDCONFIG_FLAGS_DATA_NONE | 23)
127873 +#define SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC   (SDCONFIG_FLAGS_DATA_NONE | 24)
127874 +#define SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC    (SDCONFIG_FLAGS_DATA_NONE | 25)
127875 +#define SDCONFIG_FUNC_ALLOC_SLOT_CURRENT     (SDCONFIG_FLAGS_DATA_PUT  | 26)
127876 +#define SDCONFIG_FUNC_FREE_SLOT_CURRENT      (SDCONFIG_FLAGS_DATA_NONE | 27)
127877 +#define SDCONFIG_FUNC_CHANGE_BUS_MODE        (SDCONFIG_FLAGS_DATA_BOTH | 28)
127878 +#define SDCONFIG_FUNC_CHANGE_BUS_MODE_ASYNC  (SDCONFIG_FLAGS_DATA_BOTH | 29)
127879 +#define SDCONFIG_FUNC_NO_IRQ_PEND_CHECK      (SDCONFIG_FLAGS_DATA_NONE | 30)
127880 +
127881 +typedef UINT8  FUNC_ENABLE_DISABLE_FLAGS;
127882 +typedef UINT32 FUNC_ENABLE_TIMEOUT;
127883 +
127884 +    /* function enable */
127885 +typedef struct _SDCONFIG_FUNC_ENABLE_DISABLE_DATA {
127886 +#define SDCONFIG_DISABLE_FUNC   0x0000
127887 +#define SDCONFIG_ENABLE_FUNC    0x0001
127888 +    FUNC_ENABLE_DISABLE_FLAGS    EnableFlags;     /* enable flags*/
127889 +    FUNC_ENABLE_TIMEOUT          TimeOut;         /* timeout in milliseconds */
127890 +    void (*pOpComplete)(PVOID Context, SDIO_STATUS status); /* reserved */
127891 +    PVOID                        pOpCompleteContext;        /* reserved */
127892 +}SDCONFIG_FUNC_ENABLE_DISABLE_DATA, *PSDCONFIG_FUNC_ENABLE_DISABLE_DATA;
127893 +
127894 +    /* slot current allocation data */
127895 +typedef struct _SDCONFIG_FUNC_SLOT_CURRENT_DATA {
127896 +    SD_SLOT_CURRENT     SlotCurrent;    /* slot current to request in mA*/
127897 +}SDCONFIG_FUNC_SLOT_CURRENT_DATA, *PSDCONFIG_FUNC_SLOT_CURRENT_DATA;
127898 +
127899 +/* slot bus mode configuration */
127900 +typedef struct _SDCONFIG_BUS_MODE_DATA {
127901 +    SD_BUSCLOCK_RATE   ClockRate;       /* clock rate in Hz */
127902 +    SD_BUSMODE_FLAGS   BusModeFlags;    /* bus mode flags */
127903 +    SD_BUSCLOCK_RATE   ActualClockRate; /* actual rate in KHz */
127904 +}SDCONFIG_BUS_MODE_DATA, *PSDCONFIG_BUS_MODE_DATA;
127905 +
127906 +/* defines configuration requests for the HCD */
127907 +typedef struct _SDCONFIG {
127908 +    SDCONFIG_COMMAND  Cmd;          /* configuration command */
127909 +    PVOID   pData;        /* configuration data */
127910 +    INT     DataLength;   /* config data length */
127911 +}SDCONFIG, *PSDCONFIG;
127912 +
127913 +#define SET_SDCONFIG_CMD_INFO(pHdr,cmd,pC,len) \
127914 +{           \
127915 +  (pHdr)->Cmd = (cmd);                     \
127916 +  (pHdr)->pData = (PVOID)(pC);             \
127917 +  (pHdr)->DataLength = (len);              \
127918 +}
127919 +
127920 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127921 +  @function: Get a pointer to the configuration command data.
127922 +
127923 +  @function name: GET_SDCONFIG_CMD
127924 +  @prototype: UNIT16 GET_SDCONFIG_CMD (PSDCONFIG pCommand)
127925 +  @category: HD_Reference
127926 +
127927 +  @input:  pCommand - config command structure.
127928 +
127929 +  @return: command code
127930 +
127931 +  @notes: Implemented as a macro. This macro returns the command code for this
127932 +          configuration request.
127933 +
127934 +  @example: getting the command code:
127935 +    cmd = GET_SDCONFIG_CMD(pConfig);
127936 +    switch (cmd) {
127937 +        case SDCONFIG_GET_WP:
127938 +             .. get write protect switch position
127939 +           break;
127940 +        ...
127941 +    }
127942 +
127943 +  @see also: GET_SDCONFIG_CMD_LEN, GET_SDCONFIG_CMD_DATA
127944 +
127945 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127946 +#define GET_SDCONFIG_CMD(pBuffer)     ((pBuffer)->Cmd)
127947 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127948 +  @function: Get a pointer to the configuration command data.
127949 +
127950 +  @function name: GET_SDCONFIG_CMD_LEN
127951 +  @prototype: INT GET_SDCONFIG_CMD_LEN (PSDCONFIG pCommand)
127952 +  @category: HD_Reference
127953 +
127954 +  @input:  pCommand - config command structure.
127955 +
127956 +  @return: length of config command data
127957 +
127958 +  @notes: Implemented as a macro. Host controller drivers can use this macro to extract
127959 +          the number of bytes of command specific data. This can be used to validate the
127960 +          config data buffer size.
127961 +
127962 +  @example: getting the data length:
127963 +    length = GET_SDCONFIG_CMD_LEN(pConfig);
127964 +    if (length < CUSTOM_COMMAND_XXX_SIZE) {
127965 +       ... invalid length
127966 +    }
127967 +
127968 +  @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_DATA
127969 +
127970 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127971 +#define GET_SDCONFIG_CMD_LEN(pBuffer) ((pBuffer)->DataLength)
127972 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
127973 +  @function: Get a pointer to the configuration command data.
127974 +
127975 +  @function name: GET_SDCONFIG_CMD_DATA
127976 +  @prototype: (casted ptr) GET_SDCONFIG_CMD_DATA (type, PSDCONFIG pCommand)
127977 +  @category: HD_Reference
127978 +
127979 +  @input:  type - pointer type to cast the returned pointer to.
127980 +           pCommand - config command structure.
127981 +
127982 +  @return: type-casted pointer to the command's data
127983 +
127984 +  @notes: Implemented as a macro.  Host controller drivers can use this macro to extract
127985 +          a pointer to the command specific data in an HCD configuration request.
127986 +
127987 +  @example: getting the pointer:
127988 +        // get interrupt control data
127989 +    pIntControl = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
127990 +    if (pIntControl->SlotIRQEnable) {
127991 +       ... enable slot IRQ detection
127992 +    }
127993 +
127994 +  @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_LEN
127995 +
127996 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
127997 +#define GET_SDCONFIG_CMD_DATA(type,pBuffer) ((type)((pBuffer)->pData))
127998 +#define IS_SDCONFIG_CMD_GET(pBuffer)  ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_GET)
127999 +#define IS_SDCONFIG_CMD_PUT(pBuffer)  ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_PUT)
128000 +
128001 +struct _SDDEVICE;
128002 +struct _SDHCD;
128003 +
128004 +typedef UINT8   SD_FUNCTION_FLAGS;
128005 +#define SDFUNCTION_FLAG_REMOVING       0x01
128006 +
128007 +/* function driver registration structure */
128008 +typedef struct _SDFUNCTION {
128009 +    CT_VERSION_CODE Version;    /* version code of the SDIO stack */
128010 +       SDLIST     SDList;          /* internal use list*/
128011 +    PTEXT      pName;           /* name of registering driver */
128012 +    UINT       MaxDevices;      /* maximum number of devices supported by this function */
128013 +    UINT       NumDevices;      /* number of devices supported by this function */
128014 +    PSD_PNP_INFO pIds;          /* null terminated table of supported devices*/
128015 +    BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);/* New device inserted */
128016 +                                /* Device removed (NULL if not a hot-plug capable driver) */
128017 +    void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);
128018 +    SDIO_STATUS (*pSuspend)(struct _SDFUNCTION *pFunction, SDPOWER_STATE state); /* Device suspended */
128019 +    SDIO_STATUS (*pResume)(struct _SDFUNCTION *pFunction); /* Device woken up */
128020 +                                /* Enable wake event */
128021 +    SDIO_STATUS (*pWake) (struct _SDFUNCTION *pFunction, SDPOWER_STATE state, BOOL enable);
128022 +       PVOID      pContext;        /* function driver use data */
128023 +       OS_PNPDRIVER Driver;        /* driver registration with base system */
128024 +       SDLIST     DeviceList;      /* the list of devices this driver is using*/
128025 +    OS_SIGNAL   CleanupReqSig;  /* wait for requests completion on cleanup (internal use) */
128026 +    SD_FUNCTION_FLAGS Flags;    /* internal flags (internal use) */
128027 +}SDFUNCTION, *PSDFUNCTION;
128028 +
128029 +typedef UINT8  HCD_EVENT;
128030 +
128031 +    /* device info for SDIO functions */
128032 +typedef struct _SDIO_DEVICE_INFO {
128033 +    UINT32  FunctionCISPtr;         /* function's CIS ptr */
128034 +    UINT32  FunctionCSAPtr;         /* function's CSA ptr */
128035 +    UINT16  FunctionMaxBlockSize;   /* function's reported max block size */
128036 +}SDIO_DEVICE_INFO, *PSDIO_DEVICE_INFO;
128037 +
128038 +    /* device info for SD/MMC card functions */
128039 +typedef struct _SDMMC_INFO{
128040 +    UINT8  Unused;    /* reserved */
128041 +}SDMMC_INFO, *PSDMMC_INFO;
128042 +
128043 +    /* union of SDIO function and device info */
128044 +typedef union _SDDEVICE_INFO {
128045 +    SDIO_DEVICE_INFO AsSDIOInfo;
128046 +    SDMMC_INFO       AsSDMMCInfo;
128047 +}SDDEVICE_INFO, *PSDDEVICE_INFO;
128048 +
128049 +
128050 +typedef UINT8   SD_DEVICE_FLAGS;
128051 +#define SDDEVICE_FLAG_REMOVING       0x01
128052 +
128053 +/* inserted device description, describes an inserted card */
128054 +typedef struct _SDDEVICE {
128055 +    SDLIST      SDList;             /* internal use list*/
128056 +    SDLIST      FuncListLink;       /* internal use list */
128057 +                                    /* read/write request function */
128058 +    SDIO_STATUS (*pRequest)(struct _SDDEVICE *pDev, PSDREQUEST req);
128059 +                                    /* get/set configuration */
128060 +    SDIO_STATUS (*pConfigure)(struct _SDDEVICE *pDev, PSDCONFIG config);
128061 +    PSDREQUEST  (*AllocRequest)(struct _SDDEVICE *pDev);      /* allocate a request */
128062 +    void        (*FreeRequest)(struct _SDDEVICE *pDev, PSDREQUEST pReq); /* free the request */
128063 +    void        (*pIrqFunction)(PVOID pContext);       /* interrupt routine, synchronous calls allowed */
128064 +    void        (*pIrqAsyncFunction)(PVOID pContext); /* async IRQ function , asynch only calls */
128065 +    PVOID       IrqContext;         /* irq context */
128066 +    PVOID       IrqAsyncContext;    /* irq async context */
128067 +    PSDFUNCTION pFunction;          /* function driver supporting this device */
128068 +    struct _SDHCD  *pHcd;           /* host controller this device is on (internal use) */
128069 +    SDDEVICE_INFO   DeviceInfo;     /* device info */
128070 +    SD_PNP_INFO pId[1];             /* id of this device  */
128071 +    OS_PNPDEVICE Device;            /* device registration with base system */
128072 +    SD_SLOT_CURRENT  SlotCurrentAlloc; /* allocated slot current for this device/function (internal use) */
128073 +    SD_DEVICE_FLAGS Flags;          /* internal use flags */
128074 +    CT_VERSION_CODE Version;        /* version code of the bus driver */
128075 +}SDDEVICE, *PSDDEVICE;
128076 +
128077 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128078 +  @function: Get SDIO Bus Driver Version Major number
128079 +
128080 +  @function name: SDDEVICE_GET_VERSION_MAJOR
128081 +  @prototype: INT SDDEVICE_GET_VERSION_MAJOR(PSDDEVICE pDevice)
128082 +  @category: PD_Reference
128083 +
128084 +  @input:  pDevice   - the target device for this request
128085 +
128086 +  @output: none
128087 +
128088 +  @return: integer value for the major version
128089 +
128090 +  @notes: Implemented as a macro.
128091 +
128092 +  @see also: SDDEVICE_GET_VERSION_MINOR
128093 +
128094 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128095 +#define SDDEVICE_GET_VERSION_MAJOR(pDev) (GET_SDIO_STACK_VERSION_MAJOR(pDev))
128096 +
128097 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128098 +  @function: Get SDIO Bus Driver Version Minor number
128099 +
128100 +  @function name: SDDEVICE_GET_VERSION_MINOR
128101 +  @prototype: INT SDDEVICE_GET_VERSION_MINOR(PSDDEVICE pDevice)
128102 +  @category: PD_Reference
128103 +
128104 +  @input:  pDevice   - the target device for this request
128105 +
128106 +  @output: none
128107 +
128108 +  @return: integer value for the minor version
128109 +
128110 +  @notes: Implemented as a macro.
128111 +
128112 +  @see also: SDDEVICE_GET_VERSION_MAJOR
128113 +
128114 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128115 +#define SDDEVICE_GET_VERSION_MINOR(pDev) (GET_SDIO_STACK_VERSION_MINOR(pDev))
128116 +
128117 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128118 +  @function: Test the SDIO revision for greater than or equal to 1.10
128119 +
128120 +  @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
128121 +  @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_10(PSDDEVICE pDevice)
128122 +  @category: PD_Reference
128123 +
128124 +  @input:  pDevice   - the target device for this request
128125 +
128126 +  @output: none
128127 +
128128 +  @return: TRUE if the revision is greater than or equal to 1.10
128129 +
128130 +  @notes: Implemented as a macro.
128131 +
128132 +  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
128133 +  @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
128134 +
128135 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128136 +#define SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10)
128137 +
128138 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128139 +  @function: Test the SDIO revision for greater than or equal to 1.20
128140 +
128141 +  @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_20
128142 +  @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_20(PSDDEVICE pDevice)
128143 +  @category: PD_Reference
128144 +
128145 +  @input:  pDevice   - the target device for this request
128146 +
128147 +  @output: none
128148 +
128149 +  @return: TRUE if the revision is greater than or equal to 1.20
128150 +
128151 +  @notes: Implemented as a macro.
128152 +
128153 +  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
128154 +  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
128155 +
128156 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128157 +#define SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_20)
128158 +
128159 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128160 +  @function: Test the SD revision for greater than or equal to 1.10
128161 +
128162 +  @function name: SDDEVICE_IS_SD_REV_GTEQ_1_10
128163 +  @prototype: BOOL SDDEVICE_IS_SD_REV_GTEQ_1_10(PSDDEVICE pDevice)
128164 +  @category: PD_Reference
128165 +
128166 +  @input:  pDevice   - the target device for this request
128167 +
128168 +  @output: none
128169 +
128170 +  @return: TRUE if the revision is greater than or equal to 1.10
128171 +
128172 +  @notes: Implemented as a macro.
128173 +
128174 +  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
128175 +  @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
128176 +
128177 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128178 +#define SDDEVICE_IS_SD_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= SD_REVISION_1_10)
128179 +
128180 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128181 +  @function: Test the MMC revision for greater than or equal to 4.0
128182 +
128183 +  @function name: SDDEVICE_IS_MMC_REV_GTEQ_4_0
128184 +  @prototype: BOOL SDDEVICE_IS_MMC_REV_GTEQ_4_0(PSDDEVICE pDevice)
128185 +  @category: PD_Reference
128186 +
128187 +  @input:  pDevice   - the target device for this request
128188 +
128189 +  @output: none
128190 +
128191 +  @return: TRUE if the revision is greater than or equal to 4.0
128192 +
128193 +  @notes: Implemented as a macro.
128194 +
128195 +  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
128196 +  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
128197 +
128198 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128199 +#define SDDEVICE_IS_MMC_REV_GTEQ_4_0(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= MMC_REVISION_4_0)
128200 +
128201 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128202 +  @function: Test for write protect enabled
128203 +
128204 +  @function name: SDDEVICE_IS_CARD_WP_ON
128205 +  @prototype: BOOL SDDEVICE_IS_CARD_WP_ON(PSDDEVICE pDevice)
128206 +  @category: PD_Reference
128207 +
128208 +  @input:  pDevice   - the target device for this request
128209 +
128210 +  @output: none
128211 +
128212 +  @return: TRUE if device is write protected.
128213 +
128214 +  @notes: Implemented as a macro.
128215 +
128216 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128217 +#define SDDEVICE_IS_CARD_WP_ON(pDev)       ((pDev)->pHcd->CardProperties.Flags & CARD_SD_WP)
128218 +
128219 +
128220 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128221 +  @function: Get the device's manufacturer specific ID
128222 +
128223 +  @function name: SDDEVICE_GET_SDIO_MANFID
128224 +  @prototype: UINT16 SDDEVICE_GET_SDIO_MANFID(PSDDEVICE pDevice)
128225 +  @category: PD_Reference
128226 +
128227 +  @input:  pDevice   - the target device for this request
128228 +
128229 +  @output: none
128230 +
128231 +  @return: function number
128232 +
128233 +  @notes: Implemented as a macro.
128234 +
128235 +  @see also: SDDEVICE_GET_SDIO_MANFCODE
128236 +
128237 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128238 +#define SDDEVICE_GET_SDIO_MANFID(pDev)     (pDev)->pId[0].SDIO_ManufacturerID
128239 +
128240 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128241 +  @function: Get the device's manufacturer code
128242 +
128243 +  @function name: SDDEVICE_GET_SDIO_MANFCODE
128244 +  @prototype: UINT16 SDDEVICE_GET_SDIO_MANFCODE(PSDDEVICE pDevice)
128245 +  @category: PD_Reference
128246 +
128247 +  @input:  pDevice   - the target device for this request
128248 +
128249 +  @output: none
128250 +
128251 +  @return: function number
128252 +
128253 +  @notes: Implemented as a macro.
128254 +
128255 +  @see also: SDDEVICE_GET_SDIO_MANFID
128256 +
128257 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128258 +#define SDDEVICE_GET_SDIO_MANFCODE(pDev)     (pDev)->pId[0].SDIO_ManufacturerCode
128259 +
128260 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128261 +  @function: Get the device's function number
128262 +
128263 +  @function name: SDDEVICE_GET_SDIO_FUNCNO
128264 +  @prototype: UINT8 SDDEVICE_GET_SDIO_FUNCNO(PSDDEVICE pDevice)
128265 +  @category: PD_Reference
128266 +
128267 +  @input:  pDevice   - the target device for this request
128268 +
128269 +  @output: none
128270 +
128271 +  @return: function number
128272 +
128273 +  @notes: Implemented as a macro.
128274 +
128275 +  @see also: SDDEVICE_GET_SDIO_FUNC_CLASS
128276 +
128277 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128278 +#define SDDEVICE_GET_SDIO_FUNCNO(pDev)     (pDev)->pId[0].SDIO_FunctionNo
128279 +
128280 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128281 +  @function: Get the functions's class
128282 +
128283 +  @function name: SDDEVICE_GET_SDIO_FUNC_CLASS
128284 +  @prototype: UINT8 SDDEVICE_GET_SDIO_FUNC_CLASS(PSDDEVICE pDevice)
128285 +  @category: PD_Reference
128286 +
128287 +  @input:  pDevice   - the target device for this request
128288 +
128289 +  @output: none
128290 +
128291 +  @return: class number
128292 +
128293 +  @notes: Implemented as a macro.
128294 +
128295 +  @see also: SDDEVICE_GET_SDIO_FUNCNO
128296 +
128297 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128298 +#define SDDEVICE_GET_SDIO_FUNC_CLASS(pDev) (pDev)->pId[0].SDIO_FunctionClass
128299 +
128300 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128301 +  @function: Get the functions's Card Information Structure pointer
128302 +
128303 +  @function name: SDDEVICE_GET_SDIO_FUNC_CISPTR
128304 +  @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CISPTR(PSDDEVICE pDevice)
128305 +  @category: PD_Reference
128306 +
128307 +  @input:  pDevice   - the target device for this request
128308 +
128309 +  @output: none
128310 +
128311 +  @return: CIS offset
128312 +
128313 +  @notes: Implemented as a macro.
128314 +
128315 +  @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
128316 +  @see also: SDDEVICE_GET_SDIO_COMMON_CISPTR
128317 +
128318 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128319 +#define SDDEVICE_GET_SDIO_FUNC_CISPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCISPtr
128320 +
128321 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128322 +  @function: Get the functions's Code Stoarge Area pointer
128323 +
128324 +  @function name: SDDEVICE_GET_SDIO_FUNC_CSAPTR
128325 +  @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CSAPTR(PSDDEVICE pDevice)
128326 +  @category: PD_Reference
128327 +
128328 +  @input:  pDevice   - the target device for this request
128329 +
128330 +  @output: none
128331 +
128332 +  @return: CSA offset
128333 +
128334 +  @notes: Implemented as a macro.
128335 +
128336 +  @see also: SDDEVICE_GET_SDIO_FUNC_CISPTR
128337 +
128338 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128339 +#define SDDEVICE_GET_SDIO_FUNC_CSAPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCSAPtr
128340 +
128341 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128342 +  @function: Get the functions's maximum reported block size
128343 +
128344 +  @function name: SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE
128345 +  @prototype: UINT16 SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(PSDDEVICE pDevice)
128346 +  @category: PD_Reference
128347 +
128348 +  @input:  pDevice   - the target device for this request
128349 +
128350 +  @output: none
128351 +
128352 +  @return: block size
128353 +
128354 +  @notes: Implemented as a macro.
128355 +
128356 +  @see also:
128357 +
128358 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128359 +#define SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(pDev) (pDev)->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize
128360 +
128361 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128362 +  @function: Get the common Card Information Structure pointer
128363 +
128364 +  @function name: SDDEVICE_GET_SDIO_COMMON_CISPTR
128365 +  @prototype: UINT32 SDDEVICE_GET_SDIO_COMMON_CISPTR(PSDDEVICE pDevice)
128366 +  @category: PD_Reference
128367 +
128368 +  @input:  pDevice   - the target device for this request
128369 +
128370 +  @output: none
128371 +
128372 +  @return: Common CIS Address (in SDIO address space)
128373 +
128374 +  @notes: Implemented as a macro.
128375 +
128376 +  @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
128377 +
128378 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128379 +#define SDDEVICE_GET_SDIO_COMMON_CISPTR(pDev) (pDev)->pHcd->CardProperties.CommonCISPtr
128380 +
128381 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128382 +  @function: Get the card capabilities
128383 +
128384 +  @function name: SDDEVICE_GET_SDIO_CARD_CAPS
128385 +  @prototype: UINT8 SDDEVICE_GET_SDIO_CARD_CAPS(PSDDEVICE pDevice)
128386 +  @category: PD_Reference
128387 +
128388 +  @input:  pDevice   - the target device for this request
128389 +
128390 +  @output: none
128391 +
128392 +  @return: 8-bit card capabilities register
128393 +
128394 +  @notes: Implemented as a macro. Refer to SDIO spec for decoding.
128395 +
128396 +  @see also: SDDEVICE_GET_CARD_FLAGS
128397 +  @see also: SDDEVICE_GET_SDIOCARD_CAPS
128398 +
128399 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128400 +#define SDDEVICE_GET_SDIO_CARD_CAPS(pDev)     (pDev)->pHcd->CardProperties.SDIOCaps
128401 +
128402 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128403 +  @function: Get the card flags
128404 +
128405 +  @function name: SDDEVICE_GET_CARD_FLAGS
128406 +  @prototype: CARD_INFO_FLAGS SDDEVICE_GET_CARD_FLAGS(PSDDEVICE pDevice)
128407 +  @category: PD_Reference
128408 +
128409 +  @input:  pDevice   - the target device for this request
128410 +
128411 +  @output: none
128412 +
128413 +  @return: flags
128414 +
128415 +  @notes: Implemented as a macro.
128416 +
128417 +  @example: Get card type:
128418 +        CARD_INFO_FLAGS flags;
128419 +        flags = SDDEVICE_GET_CARD_FLAGS(pDevice);
128420 +        switch(GET_CARD_TYPE(flags)) {
128421 +            case CARD_MMC: // Multi-media card
128422 +                ...
128423 +            case CARD_SD:  // SD-Memory present
128424 +                ...
128425 +            case CARD_SDIO: // SDIO card present
128426 +                ...
128427 +            case CARD_COMBO: //SDIO card with SD
128428 +                ...
128429 +        }
128430 +        if (flags & CARD_SD_WP) {
128431 +            ...SD write protect on
128432 +        }
128433 +
128434 +  @see also: SDDEVICE_GET_SDIO_CARD_CAPS
128435 +
128436 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128437 +#define SDDEVICE_GET_CARD_FLAGS(pDev)      (pDev)->pHcd->CardProperties.Flags
128438 +
128439 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128440 +  @function: Get the Relative Card Address register
128441 +
128442 +  @function name: SDDEVICE_GET_CARD_RCA
128443 +  @prototype: UINT16 SDDEVICE_GET_CARD_RCA(PSDDEVICE pDevice)
128444 +  @category: PD_Reference
128445 +
128446 +  @input:  pDevice   - the target device for this request
128447 +
128448 +  @output: none
128449 +
128450 +  @return: register address
128451 +
128452 +  @notes: Implemented as a macro. Refer to SDIO spec for decoding.
128453 +
128454 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128455 +#define SDDEVICE_GET_CARD_RCA(pDev)        (pDev)->pHcd->CardProperties.RCA
128456 +
128457 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128458 +  @function: Get operational bus clock
128459 +
128460 +  @function name: SDDEVICE_GET_OPER_CLOCK
128461 +  @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_OPER_CLOCK(PSDDEVICE pDevice)
128462 +  @category: PD_Reference
128463 +
128464 +  @input:  pDevice   - the target device for this request
128465 +
128466 +  @output: none
128467 +
128468 +  @return: clock rate
128469 +
128470 +  @notes: Implemented as a macro. Returns the current bus clock rate.
128471 +          This may be lower than reported by the card due to Host Controller,
128472 +          Bus driver, or power management limitations.
128473 +
128474 +  @see also: SDDEVICE_GET_MAX_CLOCK
128475 +
128476 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128477 +#define SDDEVICE_GET_OPER_CLOCK(pDev)      (pDev)->pHcd->CardProperties.OperBusClock
128478 +
128479 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128480 +  @function: Get maximum bus clock
128481 +
128482 +  @function name: SDDEVICE_GET_MAX_CLOCK
128483 +  @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_MAX_CLOCK(PSDDEVICE pDevice)
128484 +  @category: PD_Reference
128485 +
128486 +  @input:  pDevice   - the target device for this request
128487 +
128488 +  @output: none
128489 +
128490 +  @return: clock rate
128491 +
128492 +  @notes: To obtain the current maximum clock rate use SDDEVICE_GET_OPER_CLOCK().
128493 +          This rate my be lower than the host controllers maximum obtained using
128494 +          SDDEVICE_GET_MAX_CLOCK().
128495 +
128496 +  @see also: SDDEVICE_GET_OPER_CLOCK
128497 +
128498 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128499 +#define SDDEVICE_GET_MAX_CLOCK(pDev)       (pDev)->pHcd->MaxClockRate
128500 +
128501 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128502 +  @function: Get operational maximum block length.
128503 +
128504 +  @function name: SDDEVICE_GET_OPER_BLOCK_LEN
128505 +  @prototype: UINT16 SDDEVICE_GET_OPER_BLOCK_LEN(PSDDEVICE pDevice)
128506 +  @category: PD_Reference
128507 +
128508 +  @input:  pDevice   - the target device for this request
128509 +
128510 +  @output: none
128511 +
128512 +  @return: block size in bytes
128513 +
128514 +  @notes: Implemented as a macro. Returns the maximum current block length.
128515 +          This may be lower than reported by the card due to Host Controller,
128516 +          Bus driver, or power management limitations.
128517 +
128518 +  @see also: SDDEVICE_GET_MAX_BLOCK_LEN
128519 +
128520 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128521 +#define SDDEVICE_GET_OPER_BLOCK_LEN(pDev)  (pDev)->pHcd->CardProperties.OperBlockLenLimit
128522 +
128523 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128524 +  @function: Get maximum block length.
128525 +
128526 +  @function name: SDDEVICE_GET_MAX_BLOCK_LEN
128527 +  @prototype: UINT16 SDDEVICE_GET_MAX_BLOCK_LEN(PSDDEVICE pDevice)
128528 +  @category: PD_Reference
128529 +
128530 +  @input:  pDevice   - the target device for this request
128531 +
128532 +  @output: none
128533 +
128534 +  @return: block size in bytes
128535 +
128536 +  @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCK_LEN to obtain
128537 +          the current block length.
128538 +
128539 +  @see also: SDDEVICE_GET_OPER_BLOCK_LEN
128540 +
128541 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128542 +#define SDDEVICE_GET_MAX_BLOCK_LEN(pDev)   (pDev)->pHcd->MaxBytesPerBlock
128543 +
128544 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128545 +  @function: Get operational maximum block count.
128546 +
128547 +  @function name: SDDEVICE_GET_OPER_BLOCKS
128548 +  @prototype: UINT16 SDDEVICE_GET_OPER_BLOCKS(PSDDEVICE pDevice)
128549 +  @category: PD_Reference
128550 +
128551 +  @input:  pDevice   - the target device for this request
128552 +
128553 +  @output: none
128554 +
128555 +  @return: maximum number of blocks per transaction.
128556 +
128557 +  @notes: Implemented as a macro. Returns the maximum current block count.
128558 +          This may be lower than reported by the card due to Host Controller,
128559 +          Bus driver, or power management limitations.
128560 +
128561 +  @see also: SDDEVICE_GET_MAX_BLOCK_LEN
128562 +
128563 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128564 +#define SDDEVICE_GET_OPER_BLOCKS(pDev)     (pDev)->pHcd->CardProperties.OperBlockCountLimit
128565 +
128566 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128567 +  @function: Get maximum block count.
128568 +
128569 +  @function name: SDDEVICE_GET_MAX_BLOCKS
128570 +  @prototype: UINT16 SDDEVICE_GET_MAX_BLOCKS(PSDDEVICE pDevice)
128571 +  @category: PD_Reference
128572 +
128573 +  @input:  pDevice   - the target device for this request
128574 +
128575 +  @output: none
128576 +
128577 +  @return: maximum number of blocks per transaction.
128578 +
128579 +  @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCKS to obtain
128580 +          the current block count.
128581 +
128582 +  @see also: SDDEVICE_GET_OPER_BLOCKS
128583 +
128584 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128585 +#define SDDEVICE_GET_MAX_BLOCKS(pDev)      (pDev)->pHcd->MaxBlocksPerTrans
128586 +
128587 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128588 +  @function: Get applied slot voltage
128589 +
128590 +  @function name: SDDEVICE_GET_SLOT_VOLTAGE_MASK
128591 +  @prototype: SLOT_VOLTAGE_MASK SDDEVICE_GET_SLOT_VOLTAGE_MASK(PSDDEVICE pDevice)
128592 +  @category: PD_Reference
128593 +
128594 +  @input:  pDevice   - the target device for this request
128595 +
128596 +  @output: none
128597 +
128598 +  @return: slot voltage mask
128599 +
128600 +  @notes: This function returns the applied voltage on the slot. The voltage value is a
128601 +          mask having the following values:
128602 +          SLOT_POWER_3_3V
128603 +          SLOT_POWER_3_0V
128604 +          SLOT_POWER_2_8V
128605 +          SLOT_POWER_2_0V
128606 +          SLOT_POWER_1_8V
128607 +          SLOT_POWER_1_6V
128608 +
128609 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128610 +#define SDDEVICE_GET_SLOT_VOLTAGE_MASK(pDev)   (pDev)->pHcd->CardProperties.CardVoltage
128611 +
128612 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128613 +  @function: Get the Card Specific Data Register.
128614 +
128615 +  @function name: SDDEVICE_GET_CARDCSD
128616 +  @prototype: PUINT8 SDDEVICE_GET_CARDCSD(PSDDEVICE pDevice)
128617 +  @category: PD_Reference
128618 +
128619 +  @input:  pDevice   - the target device for this request
128620 +
128621 +  @output: none
128622 +
128623 +  @return:  UINT8 CardCSD[MAX_CARD_RESPONSE_BYTES] array of CSD data.
128624 +
128625 +  @notes: Implemented as a macro.
128626 +
128627 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128628 +#define SDDEVICE_GET_CARDCSD(pDev)         (pDev)->pHcd->CardProperties.CardCSD
128629 +
128630 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128631 +  @function: Get the bus mode flags
128632 +
128633 +  @function name: SDDEVICE_GET_BUSMODE_FLAGS
128634 +  @prototype: SD_BUSMODE_FLAGS SDDEVICE_GET_BUSMODE_FLAGS(PSDDEVICE pDevice)
128635 +  @category: PD_Reference
128636 +
128637 +  @input:  pDevice   - the target device for this request
128638 +
128639 +  @output: none
128640 +
128641 +  @return:
128642 +
128643 +  @notes: Implemented as a macro.  This function returns the raw bus mode flags.  This
128644 +          is useful for function drivers that wish to override the bus clock without
128645 +          modifying the current bus mode.
128646 +
128647 +  @see also: SDDEVICE_GET_BUSWIDTH
128648 +  @see also: SDCONFIG_BUS_MODE_CTRL
128649 +
128650 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128651 +#define SDDEVICE_GET_BUSMODE_FLAGS(pDev)  (pDev)->pHcd->CardProperties.BusMode
128652 +
128653 +
128654 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128655 +  @function: Get the bus width.
128656 +
128657 +  @function name: SDDEVICE_GET_BUSWIDTH
128658 +  @prototype: UINT8 SDDEVICE_GET_BUSWIDTH(PSDDEVICE pDevice)
128659 +  @category: PD_Reference
128660 +
128661 +  @input:  pDevice   - the target device for this request
128662 +
128663 +  @output: none
128664 +
128665 +  @return:  bus width: SDCONFIG_BUS_WIDTH_SPI, SDCONFIG_BUS_WIDTH_1_BIT, SDCONFIG_BUS_WIDTH_4_BIT
128666 +
128667 +  @notes: Implemented as a macro.
128668 +
128669 +  @see also: SDDEVICE_IS_BUSMODE_SPI
128670 +
128671 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128672 +#define SDDEVICE_GET_BUSWIDTH(pDev)        SDCONFIG_GET_BUSWIDTH((pDev)->pHcd->CardProperties.BusMode)
128673 +
128674 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128675 +  @function: Is bus in SPI mode.
128676 +
128677 +  @function name: SDDEVICE_IS_BUSMODE_SPI
128678 +  @prototype: BOOL SDDEVICE_IS_BUSMODE_SPI(PSDDEVICE pDevice)
128679 +  @category: PD_Reference
128680 +
128681 +  @input:  pDevice   - the target device for this request
128682 +
128683 +  @output: none
128684 +
128685 +  @return:  TRUE, SPI mode.
128686 +
128687 +  @notes: Implemented as a macro.
128688 +
128689 +  @see also: SDDEVICE_GET_BUSWIDTH
128690 +
128691 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128692 +#define SDDEVICE_IS_BUSMODE_SPI(pDev) (SDDEVICE_GET_BUSWIDTH(pDev) == SDCONFIG_BUS_WIDTH_SPI)
128693 +
128694 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128695 +  @function: Send a request to a device.
128696 +
128697 +  @function name: SDDEVICE_CALL_REQUEST_FUNC
128698 +  @prototype: SDIO_STATUS SDDEVICE_CALL_REQUEST_FUNC(PSDDEVICE pDevice, PSDREQUEST pRequest)
128699 +  @category: PD_Reference
128700 +
128701 +  @input:  pDevice   - the target device for this request
128702 +  @input:  pRequest  - the request to be sent
128703 +
128704 +  @output: none
128705 +
128706 +  @return: SDIO_STATUS
128707 +
128708 +  @notes: Sends a request to the specified device. If the request is successfully sent, then
128709 +          the response flags can be checked to detemine the result of the request.
128710 +
128711 +  @example: Example of sending a request to a device:
128712 +    PSDREQUEST  pReq = NULL;
128713 +    //allocate a request
128714 +    pReq = SDDeviceAllocRequest(pDevice);
128715 +    if (NULL == pReq) {
128716 +        return SDIO_STATUS_NO_RESOURCES;
128717 +    }
128718 +    //initialize the request
128719 +    SDLIB_SetupCMD52Request(FuncNo, Address, Write, *pData, pReq);
128720 +    //send the request to the target
128721 +    status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
128722 +    if (!SDIO_SUCCESS(status)) {
128723 +        break;
128724 +    }
128725 +    //check the request response (based on the request type)
128726 +    if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
128727 +        ...
128728 +    }
128729 +    if (!Write) {
128730 +            // store the byte
128731 +        *pData =  SD_R5_GET_READ_DATA(pReq->Response);
128732 +    }
128733 +    //free the request
128734 +    SDDeviceFreeRequest(pDevice,pReq);
128735 +    ...
128736 +
128737 +  @see also: SDDeviceAllocRequest
128738 +  @see also: SDDEVICE_CALL_CONFIG_FUNC
128739 +
128740 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128741 +#define SDDEVICE_CALL_REQUEST_FUNC(pDev,pReq)  (pDev)->pRequest((pDev),(pReq))
128742 +
128743 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128744 +  @function: Send configuration to a device.
128745 +
128746 +  @function name: SDDEVICE_CALL_CONFIG_FUNC
128747 +  @prototype: SDIO_STATUS SDDEVICE_CALL_CONFIG_FUNC(PSDDEVICE pDevice, PSDCONFIG pConfigure)
128748 +  @category: PD_Reference
128749 +
128750 +  @input:  pDevice   - the target device for this request
128751 +  @input:  pConfigure - configuration request
128752 +
128753 +  @output: none
128754 +
128755 +  @return: SDIO_STATUS
128756 +
128757 +  @notes: Sends a configuration request to the specified device.
128758 +
128759 +  @example: Example of sending a request to a device:
128760 +        SDCONFIG  configHdr;
128761 +        SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
128762 +        fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
128763 +        fData.TimeOut = 500;
128764 +        SET_SDCONFIG_CMD_INFO(&configHdr, SDCONFIG_FUNC_ENABLE_DISABLE, fData, sizeof(fData));
128765 +        return SDDEVICE_CALL_CONFIG_FUNC(pDevice, &configHdr);
128766 +
128767 +  @see also: SDLIB_IssueConfig
128768 +
128769 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128770 +#define SDDEVICE_CALL_CONFIG_FUNC(pDev,pCfg)   (pDev)->pConfigure((pDev),(pCfg))
128771 +
128772 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128773 +  @function: Allocate a request structure.
128774 +
128775 +  @function name: SDDeviceAllocRequest
128776 +  @prototype: PSDREQUEST SDDeviceAllocRequest(PSDDEVICE pDevice)
128777 +  @category: PD_Reference
128778 +
128779 +  @input:  pDevice   - the target device for this request
128780 +
128781 +  @output: none
128782 +
128783 +  @return: request pointer or NULL if not available.
128784 +
128785 +  @notes:  This function must not be called in a non-schedulable (interrupts off) context.
128786 +           Allocating memory on some OSes may block.
128787 +
128788 +  @see also: SDDEVICE_CALL_REQUEST_FUNC
128789 +  @see also: SDDeviceFreeRequest
128790 +
128791 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128792 +#define SDDeviceAllocRequest(pDev)        (pDev)->AllocRequest((pDev))
128793 +
128794 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128795 +  @function: Free a request structure.
128796 +
128797 +  @function name: SDDeviceFreeRequest
128798 +  @prototype: void SDDeviceFreeRequest(PSDDEVICE pDevice, PSDREQUEST pRequest)
128799 +  @category: PD_Reference
128800 +
128801 +  @input:  pDevice   - the target device for this request
128802 +  @input:  pRequest  - request allocated by SDDeviceAllocRequest().
128803 +
128804 +  @output: none
128805 +
128806 +  @return: none
128807 +
128808 +  @notes: This function must not be called in a non-schedulable (interrupts off) context.
128809 +          Freeing memory on some OSes may block.
128810 +
128811 +  @see also: SDDEVICE_CALL_REQUEST_FUNC
128812 +  @see also: SDDeviceAllocRequest
128813 +
128814 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128815 +#define SDDeviceFreeRequest(pDev,pReq)    (pDev)->FreeRequest((pDev),pReq)
128816 +
128817 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128818 +  @function: Register an interrupt handler for a device.
128819 +
128820 +  @function name: SDDEVICE_SET_IRQ_HANDLER
128821 +  @prototype: void SDDEVICE_SET_IRQ_HANDLER(PSDDEVICE pDevice,
128822 +                                            void (*pIrqFunction)(PVOID pContext),
128823 +                                            PVOID pContext)
128824 +  @category: PD_Reference
128825 +
128826 +  @input:  pDevice   - the target device for this request
128827 +  @input:  pIrqFunction  - the interrupt function to execute.
128828 +  @input:  pContext  - context value passed into interrupt routine.
128829 +
128830 +  @output: none
128831 +
128832 +  @return: none
128833 +
128834 +  @notes: The registered routine will be called upon each card interrupt.
128835 +          The interrupt function should acknowledge the interrupt when it is
128836 +          ready to handle more interrupts using:
128837 +          SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
128838 +          The interrupt handler can perform synchronous request calls.
128839 +
128840 +  @see also: SDDEVICE_SET_ASYNC_IRQ_HANDLER
128841 +
128842 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128843 +#define SDDEVICE_SET_IRQ_HANDLER(pDev,pFn,pContext)  \
128844 +{                                                    \
128845 +    (pDev)->pIrqFunction = (pFn);                    \
128846 +    (pDev)->IrqContext = (PVOID)(pContext);          \
128847 +}
128848 +
128849 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128850 +  @function: Register an asynchronous interrupt handler for a device.
128851 +
128852 +  @function name: SDDEVICE_SET_ASYNC_IRQ_HANDLER
128853 +  @prototype: void SDDEVICE_SET_ASYNC_IRQ_HANDLER(PSDDEVICE pDevice,
128854 +                                            void (*pIrqAsyncFunction)(PVOID pContext),
128855 +                                            PVOID pContext)
128856 +  @category: PD_Reference
128857 +
128858 +  @input:  pDevice   - the target device for this request
128859 +  @input:  pIrqAsyncFunction  - the interrupt function to execute.
128860 +  @input:  pContext  - context value passed into interrupt routine.
128861 +
128862 +  @output: none
128863 +
128864 +  @return: none
128865 +
128866 +  @notes: The registered routine will be called upon each card interrupt.
128867 +          The interrupt function should acknowledge the interrupt when it is
128868 +          ready to handle more interrupts using:
128869 +          SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
128870 +          The interrupt handler can not perform any synchronous request calls.
128871 +          Using this call provides a faster interrupt dispatch, but limits all
128872 +          requests to asynchronous mode.
128873 +
128874 +  @see also: SDDEVICE_SET_IRQ_HANDLER
128875 +
128876 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128877 +#define SDDEVICE_SET_ASYNC_IRQ_HANDLER(pDev,pFn,pContext)  \
128878 +{                                                          \
128879 +    (pDev)->pIrqAsyncFunction = (pFn);                     \
128880 +    (pDev)->IrqAsyncContext = (PVOID)(pContext);           \
128881 +}
128882 +
128883 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128884 +  @function: Get the SDIO capabilities rgeister.
128885 +
128886 +  @function name: SDDEVICE_GET_SDIOCARD_CAPS
128887 +  @prototype: UINT8 SDDEVICE_GET_SDIOCARD_CAPS(PSDDEVICE pDevice)
128888 +  @category: PD_Reference
128889 +
128890 +  @input:  pDevice   - the target device for this request
128891 +
128892 +  @output: none
128893 +
128894 +  @return: SD capabilities
128895 +
128896 +  @notes: See SD specification for decoding of these capabilities.
128897 +
128898 +  @see also: SDDEVICE_GET_SDIO_CARD_CAPS
128899 +
128900 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128901 +#define SDDEVICE_GET_SDIOCARD_CAPS(pDev) (pDev)->pHcd->CardProperties.SDIOCaps
128902 +
128903 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128904 +  @function: Get HCD driver name
128905 +
128906 +  @function name: SDDEVICE_GET_HCDNAME
128907 +  @prototype: PTEXT SDDEVICE_GET_HCDNAME(PSDDEVICE pDevice)
128908 +  @category: PD_Reference
128909 +
128910 +  @input:  pDevice   - the target device for this request
128911 +
128912 +  @output: none
128913 +
128914 +  @return:  pointer to a string containing the name of the underlying HCD
128915 +
128916 +  @notes: Implemented as a macro.
128917 +
128918 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128919 +#define SDDEVICE_GET_HCDNAME(pDev)  (pDev)->pHcd->pName
128920 +
128921 +
128922 +#define SDDEVICE_CALL_IRQ_HANDLER(pDev)       (pDev)->pIrqFunction((pDev)->IrqContext)
128923 +#define SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDev) (pDev)->pIrqAsyncFunction((pDev)->IrqAsyncContext)
128924 +
128925 +
128926 +#define SDDEVICE_SET_SDIO_FUNCNO(pDev,Num) (pDev)->pId[0].SDIO_FunctionNo = (Num)
128927 +#define SDDEVICE_IS_CARD_REMOVED(pDev)     ((pDev)->pHcd->CardProperties.CardState & \
128928 +                                             CARD_STATE_REMOVED)
128929 +
128930 +
128931 +typedef enum _SDHCD_IRQ_PROC_STATE {
128932 +    SDHCD_IDLE = 0,
128933 +    SDHCD_IRQ_PENDING = 1,
128934 +    SDHCD_IRQ_HELPER  = 2
128935 +}SDHCD_IRQ_PROC_STATE, *PSDHCD_IRQ_PROC_STATE;
128936 +
128937 +/* host controller bus driver registration structure */
128938 +typedef struct _SDHCD {
128939 +    CT_VERSION_CODE Version;    /* version code of the SDIO stack */
128940 +    SDLIST  SDList;             /* internal use list*/
128941 +    PTEXT   pName;              /* name of registering host/slot driver */
128942 +    UINT32  Attributes;         /* attributes of host controller */
128943 +    UINT16  MaxBytesPerBlock;   /* max bytes per block */
128944 +    UINT16  MaxBlocksPerTrans;  /* max blocks per transaction */
128945 +    SD_SLOT_CURRENT  MaxSlotCurrent;  /* max current per slot in milli-amps */
128946 +    UINT8   SlotNumber;         /* sequential slot number for this HCD, set by bus driver */
128947 +    SD_BUSCLOCK_RATE    MaxClockRate;         /* max clock rate in hz */
128948 +    SLOT_VOLTAGE_MASK   SlotVoltageCaps;      /* slot voltage capabilities */
128949 +    SLOT_VOLTAGE_MASK   SlotVoltagePreferred; /* preferred slot voltage */
128950 +    PVOID   pContext;                         /* host controller driver use data   */
128951 +    SDIO_STATUS (*pRequest)(struct _SDHCD *pHcd);
128952 +                                /* get/set configuration */
128953 +    SDIO_STATUS (*pConfigure)(struct _SDHCD *pHcd, PSDCONFIG pConfig);
128954 +        /* everything below this line is for bus driver use */
128955 +    OS_SEMAPHORE    ConfigureOpsSem;    /* semaphore to make specific configure ops atomic, internal use */
128956 +    OS_CRITICALSECTION HcdCritSection;  /* critical section to protect hcd data structures (internal use) */
128957 +    SDREQUESTQUEUE  RequestQueue;       /* request queue, internal use */
128958 +    PSDREQUEST      pCurrentRequest;    /* current request we are working on */
128959 +    CARD_PROPERTIES CardProperties;     /* properties for the currently inserted card*/
128960 +    OSKERNEL_HELPER SDIOIrqHelper;      /* synch IRQ helper, internal use */
128961 +    SDDEVICE        *pPseudoDev;        /* pseudo device used for initialization (internal use) */
128962 +    UINT8           PendingHelperIrqs;  /* IRQ helper pending IRQs */
128963 +    UINT8           PendingIrqAcks;     /* pending IRQ acks from function drivers */
128964 +    UINT8           IrqsEnabled;        /* current irq enabled mask */
128965 +    SDHCD_IRQ_PROC_STATE IrqProcState;  /* irq processing state */
128966 +    POS_DEVICE      pDevice;            /* device registration with base system */
128967 +    SD_SLOT_CURRENT SlotCurrentAllocated; /* slot current allocated (internal use ) */
128968 +    ATOMIC_FLAGS    HcdFlags;             /* HCD Flags */
128969 +#define HCD_REQUEST_CALL_BIT  0
128970 +#define HCD_IRQ_NO_PEND_CHECK 1           /* HCD flag to bypass interrupt pending register
128971 +                                             check, typically done on single function cards */
128972 +    SDREQUESTQUEUE  CompletedRequestQueue; /* completed request queue, internal use */
128973 +    PSDDMA_DESCRIPTION pDmaDescription; /* description of HCD's DMA capabilities */
128974 +    POS_MODULE         pModule;         /* OS-specific module information */
128975 +    INT                Recursion;       /* recursion level */
128976 +    PVOID              Reserved1;
128977 +    PVOID              Reserved2;
128978 +}SDHCD, *PSDHCD;
128979 +
128980 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
128981 +  @function: Get a pointer to the HCD's DMA description
128982 +
128983 +  @function name: SDGET_DMA_DESCRIPTION
128984 +  @prototype: PSDDMA_DESCRIPTION SDGET_DMA_DESCRIPTION(PSDDEVICE pDevice)
128985 +  @category: PD_Reference
128986 +
128987 +  @input:  pDevice - device structure
128988 +
128989 +  @return: PSDDMA_DESCRIPTION or NULL if no DMA support
128990 +
128991 +  @notes: Implemented as a macro.
128992 +
128993 +  @example: getting the current request:
128994 +          PSDDMA_DESCRIPTION pDmaDescrp = SDGET_DMA_DESCRIPTION(pDevice);
128995 +
128996 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
128997 +#define SDGET_DMA_DESCRIPTION(pDevice)     (pDevice)->pHcd->pDmaDescription
128998 +
128999 +
129000 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129001 +  @function: Get the logical slot number the device is assigned to.
129002 +
129003 +  @function name: SDDEVICE_GET_SLOT_NUMBER
129004 +  @prototype: UINT8 SDDEVICE_GET_SLOT_NUMBER(PSDDEVICE pDevice)
129005 +  @category: PD_Reference
129006 +
129007 +  @input:  pDevice - device structure
129008 +
129009 +  @return: unsigned number representing the slot number
129010 +
129011 +  @notes: Implemented as a macro. This value is unique for each physical slot in the system
129012 +          and assigned by the bus driver. Devices on a multi-function card will share the same
129013 +          slot number.
129014 +
129015 +  @example: getting the slot number:
129016 +          UINT8 thisSlot = SDDEVICE_GET_SLOT_NUMBER(pDevice);
129017 +
129018 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129019 +#define SDDEVICE_GET_SLOT_NUMBER(pDevice) (pDevice)->pHcd->SlotNumber
129020 +
129021 +/* for function use */
129022 +SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction);
129023 +SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction);
129024 +
129025 +#include "sdio_hcd_defs.h"
129026 +#endif /* __SDIO_BUSDRIVER_H___ */
129027 Index: linux-2.6.24.7/include/linux/sdio/_sdio_defs.h
129028 ===================================================================
129029 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
129030 +++ linux-2.6.24.7/include/linux/sdio/_sdio_defs.h      2008-12-11 22:46:49.000000000 +0100
129031 @@ -0,0 +1,638 @@
129032 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129033 +@file: _sdio_defs.h
129034 +
129035 +@abstract: SD/SDIO definitions
129036 +
129037 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
129038 +
129039 +
129040 + *
129041 + *  This program is free software; you can redistribute it and/or modify
129042 + *  it under the terms of the GNU General Public License version 2 as
129043 + *  published by the Free Software Foundation;
129044 + *
129045 + *  Software distributed under the License is distributed on an "AS
129046 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
129047 + *  implied. See the License for the specific language governing
129048 + *  rights and limitations under the License.
129049 + *
129050 + *  Portions of this code were developed with information supplied from the
129051 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
129052 + *
129053 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
129054 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
129055 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
129056 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
129057 + *   Specification may require a license from the SD Card Association or other third parties.
129058 + *   Disclaimers:
129059 + *   The information contained in the Simplified Specification is presented only as a standard
129060 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
129061 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
129062 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
129063 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
129064 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
129065 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
129066 + *   information, know-how or other confidential information to any third party.
129067 + *
129068 + *
129069 + *  The initial developers of the original code are Seung Yi and Paul Lever
129070 + *
129071 + *  sdio@atheros.com
129072 + *
129073 + *
129074 +
129075 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129076 +#ifndef ___SDIO_DEFS_H___
129077 +#define ___SDIO_DEFS_H___
129078 +
129079 +#define SD_INIT_BUS_CLOCK   100000    /* initialization clock in hz */
129080 +#define SPI_INIT_BUS_CLOCK  100000    /* initialization clock in hz */
129081 +#define SD_MAX_BUS_CLOCK    25000000  /* max clock speed in hz */
129082 +#define SD_HS_MAX_BUS_CLOCK 50000000  /* SD high speed max clock speed in hz */
129083 +#define SDIO_LOW_SPEED_MAX_BUS_CLOCK 400000 /* max low speed clock in hz */
129084 +#define SDMMC_MIN_INIT_CLOCKS   80    /* minimun number of initialization clocks */
129085 +#define SDIO_EMPC_CURRENT_THRESHOLD  300  /* SDIO 1.10 , EMPC (mA) threshold, we add some overhead */
129086 +
129087 +/* commands */
129088 +#define CMD0    0
129089 +#define CMD1    1
129090 +#define CMD2    2
129091 +#define CMD3    3
129092 +#define CMD4    4
129093 +#define CMD5    5
129094 +#define CMD6    6
129095 +#define CMD7    7
129096 +#define CMD9    9
129097 +#define CMD10   10
129098 +#define CMD12   12
129099 +#define CMD13   13
129100 +#define CMD15   15
129101 +#define CMD16   16
129102 +#define CMD17   17
129103 +#define CMD18   18
129104 +#define CMD24   24
129105 +#define CMD25   25
129106 +#define CMD27   27
129107 +#define CMD28   28
129108 +#define CMD29   29
129109 +#define CMD30   30
129110 +#define CMD32   32
129111 +#define CMD33   33
129112 +#define CMD38   38
129113 +#define CMD42   42
129114 +#define CMD52   52
129115 +#define CMD53   53
129116 +#define CMD55   55
129117 +#define CMD56   56
129118 +#define CMD58   58
129119 +#define CMD59   59
129120 +#define ACMD6   6
129121 +#define ACMD13  13
129122 +#define ACMD22  22
129123 +#define ACMD23  23
129124 +#define ACMD41  41
129125 +#define ACMD42  42
129126 +#define ACMD51  51
129127 +
129128 +#define SD_ACMD6_BUS_WIDTH_1_BIT         0x00
129129 +#define SD_ACMD6_BUS_WIDTH_4_BIT         0x02
129130 +
129131 +#define SD_CMD59_CRC_OFF            0x00000000
129132 +#define SD_CMD59_CRC_ON             0x00000001
129133 +
129134 +/* SD/SPI max response size */
129135 +#define SD_MAX_CMD_RESPONSE_BYTES SD_R2_RESPONSE_BYTES
129136 +
129137 +#define SD_R1_RESPONSE_BYTES  6
129138 +#define SD_R1B_RESPONSE_BYTES SD_R1_RESPONSE_BYTES
129139 +#define SD_R1_GET_CMD(pR) ((pR)[5] & 0xC0))
129140 +#define SD_R1_SET_CMD(pR,cmd)  (pR)[5] = (cmd) & 0xC0
129141 +#define SD_R1_GET_CARD_STATUS(pR) (((UINT32)((pR)[1]))        |  \
129142 +                                  (((UINT32)((pR)[2])) << 8)  |  \
129143 +                                  (((UINT32)((pR)[3])) << 16) |  \
129144 +                                  (((UINT32)((pR)[4])) << 24) )
129145 +#define SD_R1_SET_CMD_STATUS(pR,status) \
129146 +{                                      \
129147 +    (pR)[1] = (UINT8)(status);         \
129148 +    (pR)[2] = (UINT8)((status) >> 8);  \
129149 +    (pR)[3] = (UINT8)((status) >> 16); \
129150 +    (pR)[4] = (UINT8)((status) >> 24); \
129151 +}
129152 +
129153 +/* SD R1 card status bit masks */
129154 +#define SD_CS_CMD_OUT_OF_RANGE  ((UINT32)(1 << 31))
129155 +#define SD_CS_ADDRESS_ERR       (1 << 30)
129156 +#define SD_CS_BLK_LEN_ERR       (1 << 29)
129157 +#define SD_CS_ERASE_SEQ_ERR     (1 << 28)
129158 +#define SD_CS_ERASE_PARAM_ERR   (1 << 27)
129159 +#define SD_CS_WP_ERR            (1 << 26)
129160 +#define SD_CS_CARD_LOCKED       (1 << 25)
129161 +#define SD_CS_LK_UNLK_FAILED    (1 << 24)
129162 +#define SD_CS_PREV_CMD_CRC_ERR  (1 << 23)
129163 +#define SD_CS_ILLEGAL_CMD_ERR   (1 << 22)
129164 +#define SD_CS_ECC_FAILED        (1 << 21)
129165 +#define SD_CS_CARD_INTERNAL_ERR (1 << 20)
129166 +#define SD_CS_GENERAL_ERR       (1 << 19)
129167 +#define SD_CS_CSD_OVERWR_ERR    (1 << 16)
129168 +#define SD_CS_WP_ERASE_SKIP     (1 << 15)
129169 +#define SD_CS_ECC_DISABLED      (1 << 14)
129170 +#define SD_CS_ERASE_RESET       (1 << 13)
129171 +#define SD_CS_GET_STATE(status) (((status) >> 9) & 0x0f)
129172 +#define SD_CS_SET_STATE(status, state) \
129173 +{                               \
129174 +    (status) &= ~(0x0F << 9);   \
129175 +    (status) |= (state) << 9    \
129176 +}
129177 +
129178 +#define SD_CS_TRANSFER_ERRORS \
129179 +                ( SD_CS_ADDRESS_ERR       | \
129180 +                  SD_CS_BLK_LEN_ERR       | \
129181 +                  SD_CS_ERASE_SEQ_ERR     | \
129182 +                  SD_CS_ERASE_PARAM_ERR   | \
129183 +                  SD_CS_WP_ERR            | \
129184 +                  SD_CS_ECC_FAILED        | \
129185 +                  SD_CS_CARD_INTERNAL_ERR | \
129186 +                  SD_CS_GENERAL_ERR )
129187 +
129188 +#define SD_CS_STATE_IDLE   0
129189 +#define SD_CS_STATE_READY  1
129190 +#define SD_CS_STATE_IDENT  2
129191 +#define SD_CS_STATE_STBY   3
129192 +#define SD_CS_STATE_TRANS  4
129193 +#define SD_CS_STATE_DATA   5
129194 +#define SD_CS_STATE_RCV    6
129195 +#define SD_CS_STATE_PRG    7
129196 +#define SD_CS_STATE_DIS    8
129197 +#define SD_CS_READY_FOR_DATA    (1 << 8)
129198 +#define SD_CS_APP_CMD           (1 << 5)
129199 +#define SD_CS_AKE_SEQ_ERR       (1 << 3)
129200 +
129201 +/* SD R2 response */
129202 +#define SD_R2_RESPONSE_BYTES  17
129203 +#define MAX_CSD_CID_BYTES     16
129204 +#define SD_R2_SET_STUFF_BITS(pR)   (pR)[16] = 0x3F
129205 +#define GET_SD_CSD_TRANS_SPEED(pR) (pR)[12]
129206 +#define GET_SD_CID_MANFID(pR)      (pR)[15]
129207 +#define GET_SD_CID_PN_1(pR)        (pR)[12]
129208 +#define GET_SD_CID_PN_2(pR)        (pR)[11]
129209 +#define GET_SD_CID_PN_3(pR)        (pR)[10]
129210 +#define GET_SD_CID_PN_4(pR)        (pR)[9]
129211 +#define GET_SD_CID_PN_5(pR)        (pR)[8]
129212 +#define GET_SD_CID_PN_6(pR)        (pR)[7]
129213 +
129214 +#define GET_SD_CID_OEMID(pR)      ((((UINT16)(pR)[14]) << 8 )| (UINT16)((pR)[13]))
129215 +#define SDMMC_OCR_VOLTAGE_MASK 0x7FFFFFFF
129216 +/* SD R3 response */
129217 +#define SD_R3_RESPONSE_BYTES 6
129218 +#define SD_R3_GET_OCR(pR) ((((UINT32)((pR)[1])) |  \
129219 +                           (((UINT32)((pR)[2])) << 8)  |  \
129220 +                           (((UINT32)((pR)[3])) << 16) | \
129221 +                           (((UINT32)((pR)[4])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
129222 +#define SD_R3_IS_CARD_READY(pR)  (((pR)[4] & 0x80) == 0x80)
129223 +
129224 +/* OCR bit definitions */
129225 +#define SD_OCR_CARD_PWR_UP_STATUS  ((UINT32)(1 << 31))
129226 +#define SD_OCR_3_5_TO_3_6_VDD      (1 << 23)
129227 +#define SD_OCR_3_4_TO_3_5_VDD      (1 << 22)
129228 +#define SD_OCR_3_3_TO_3_4_VDD      (1 << 21)
129229 +#define SD_OCR_3_2_TO_3_3_VDD      (1 << 20)
129230 +#define SD_OCR_3_1_TO_3_2_VDD      (1 << 19)
129231 +#define SD_OCR_3_0_TO_3_1_VDD      (1 << 18)
129232 +#define SD_OCR_2_9_TO_3_0_VDD      (1 << 17)
129233 +#define SD_OCR_2_8_TO_2_9_VDD      (1 << 16)
129234 +#define SD_OCR_2_7_TO_2_8_VDD      (1 << 15)
129235 +#define SD_OCR_2_6_TO_2_7_VDD      (1 << 14)
129236 +#define SD_OCR_2_5_TO_2_6_VDD      (1 << 13)
129237 +#define SD_OCR_2_4_TO_2_5_VDD      (1 << 12)
129238 +#define SD_OCR_2_3_TO_2_4_VDD      (1 << 11)
129239 +#define SD_OCR_2_2_TO_2_3_VDD      (1 << 10)
129240 +#define SD_OCR_2_1_TO_2_2_VDD      (1 << 9)
129241 +#define SD_OCR_2_0_TO_2_1_VDD      (1 << 8)
129242 +#define SD_OCR_1_9_TO_2_0_VDD      (1 << 7)
129243 +#define SD_OCR_1_8_TO_1_9_VDD      (1 << 6)
129244 +#define SD_OCR_1_7_TO_1_8_VDD      (1 << 5)
129245 +#define SD_OCR_1_6_TO_1_7_VDD      (1 << 4)
129246 +
129247 +/* SD Status data block */
129248 +#define SD_STATUS_DATA_BYTES        64
129249 +#define SDS_GET_DATA_WIDTH(buffer)  ((buffer)[0] & 0xC0)
129250 +#define SDS_BUS_1_BIT               0x00
129251 +#define SDS_BUS_4_BIT               0x80
129252 +#define SDS_GET_SECURE_MODE(buffer) ((buffer)[0] & 0x20)
129253 +#define SDS_CARD_SECURE_MODE        0x20
129254 +#define SDS_GET_CARD_TYPE(buffer)   ((buffer)[60] & 0x0F)
129255 +#define SDS_SD_CARD_RW              0x00
129256 +#define SDS_SD_CARD_ROM             0x01
129257 +
129258 +/* SD R6 response */
129259 +#define SD_R6_RESPONSE_BYTES 6
129260 +#define SD_R6_GET_RCA(pR) ((UINT16)((pR)[3]) | (((UINT16)((pR)[4])) << 8))
129261 +#define SD_R6_GET_CS(pR)  ((UINT16)((pR)[1]) | (((UINT16)((pR)[2])) << 8))
129262 +
129263 +/* SD Configuration Register (SCR) */
129264 +#define SD_SCR_BYTES            8
129265 +#define SCR_REV_1_0             0x00
129266 +#define SCR_SD_SPEC_1_00        0x00
129267 +#define SCR_SD_SPEC_1_10        0x01
129268 +#define SCR_BUS_SUPPORTS_1_BIT  0x01
129269 +#define SCR_BUS_SUPPORTS_4_BIT  0x04
129270 +#define SCR_SD_SECURITY_MASK    0x70
129271 +#define SCR_SD_NO_SECURITY      0x00
129272 +#define SCR_SD_SECURITY_1_0     0x10
129273 +#define SCR_SD_SECURITY_2_0     0x20
129274 +#define SCR_DATA_STATUS_1_AFTER_ERASE  0x80
129275 +
129276 +#define GET_SD_SCR_STRUCT_VER(pB) ((pB)[7] >> 4)
129277 +#define GET_SD_SCR_SDSPEC_VER(pB) ((pB)[7] & 0x0F)
129278 +#define GET_SD_SCR_BUSWIDTHS(pB)  ((pB)[6] & 0x0F)
129279 +#define GET_SD_SCR_BUSWIDTHS_FLAGS(pB)  (pB)[6]
129280 +#define GET_SD_SCR_SECURITY(pB)   (((pB)[6] >> 4) & 0x07)
129281 +#define GET_SD_SCR_DATA_STAT_AFTER_ERASE(pB) (((pB)[6] >> 7) & 0x01)
129282 +
129283 +/* SDIO R4 Response */
129284 +#define SD_SDIO_R4_RESPONSE_BYTES 6
129285 +#define SD_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[1])        |  \
129286 +                          (((UINT32)(pR)[2]) << 8)  |  \
129287 +                          (((UINT32)(pR)[3]) << 16))
129288 +#define SD_SDIO_R4_IS_MEMORY_PRESENT(pR)   (((pR)[4] & 0x08) == 0x08)
129289 +#define SD_SDIO_R4_GET_IO_FUNC_COUNT(pR)   (((pR)[4] >> 4) & 0x07)
129290 +#define SD_SDIO_R4_IS_CARD_READY(pR)       (((pR)[4] & 0x80) == 0x80)
129291 +
129292 +/* SDIO R5 response */
129293 +#define SD_SDIO_R5_RESPONSE_BYTES      6
129294 +#define SD_SDIO_R5_READ_DATA_OFFSET    1
129295 +#define SD_R5_GET_READ_DATA(pR)  (pR)[SD_SDIO_R5_READ_DATA_OFFSET]
129296 +#define SD_R5_RESP_FLAGS_OFFSET   2
129297 +#define SD_R5_GET_RESP_FLAGS(pR) (pR)[SD_R5_RESP_FLAGS_OFFSET]
129298 +#define SD_R5_SET_CMD(pR,cmd)  (pR)[5] = (cmd) & 0xC0
129299 +#define SD_R5_RESP_CMD_ERR  (1 << 7) /* for previous cmd */
129300 +#define SD_R5_ILLEGAL_CMD   (1 << 6)
129301 +#define SD_R5_GENERAL_ERR   (1 << 3)
129302 +#define SD_R5_INVALID_FUNC  (1 << 1)
129303 +#define SD_R5_ARG_RANGE_ERR (1 << 0)
129304 +#define SD_R5_CURRENT_CMD_ERRORS (SD_R5_ILLEGAL_CMD | SD_R5_GENERAL_ERR \
129305 +                                 | SD_R5_INVALID_FUNC | SD_R5_ARG_RANGE_ERR)
129306 +#define SD_R5_ERRORS (SD_R5_CURRENT_CMD_ERRORS)
129307 +
129308 +#define SD_R5_GET_IO_STATE(pR) (((pR)[2] >> 4) & 0x03)
129309 +#define SD_R5_STATE_DIS 0x00
129310 +#define SD_R5_STATE_CMD 0x01
129311 +#define SD_R5_STATE_TRN 0x02
129312 +
129313 +/* SDIO Modified R6 Response */
129314 +#define SD_SDIO_R6_RESPONSE_BYTES 6
129315 +#define SD_SDIO_R6_GET_RCA(pR)  ((UINT16)((pR)[3]) | ((UINT16)((pR)[4]) << 8))
129316 +#define SD_SDIO_R6_GET_CSTAT(pR)((UINT16)((pR)[1]) | ((UINT16)((pR)[2]) << 8))
129317 +
129318 +/* SPI mode R1 response */
129319 +#define SPI_R1_RESPONSE_BYTES   1
129320 +#define GET_SPI_R1_RESP_TOKEN(pR) (pR)[0]
129321 +#define SPI_CS_STATE_IDLE       0x01
129322 +#define SPI_CS_ERASE_RESET      (1 << 1)
129323 +#define SPI_CS_ILLEGAL_CMD      (1 << 2)
129324 +#define SPI_CS_CMD_CRC_ERR      (1 << 3)
129325 +#define SPI_CS_ERASE_SEQ_ERR    (1 << 4)
129326 +#define SPI_CS_ADDRESS_ERR      (1 << 5)
129327 +#define SPI_CS_PARAM_ERR        (1 << 6)
129328 +#define SPI_CS_ERR_MASK         0x7c
129329 +
129330 +/* SPI mode R2 response */
129331 +#define SPI_R2_RESPONSE_BYTES  2
129332 +#define GET_SPI_R2_RESP_TOKEN(pR)   (pR)[1]
129333 +#define GET_SPI_R2_STATUS_TOKEN(pR) (pR)[0]
129334 +/* the first response byte is defined above */
129335 +/* the second response byte is defined below */
129336 +#define SPI_CS_CARD_IS_LOCKED      (1 << 0)
129337 +#define SPI_CS_LOCK_UNLOCK_FAILED  (1 << 1)
129338 +#define SPI_CS_ERROR               (1 << 2)
129339 +#define SPI_CS_INTERNAL_ERROR      (1 << 3)
129340 +#define SPI_CS_ECC_FAILED          (1 << 4)
129341 +#define SPI_CS_WP_VIOLATION        (1 << 5)
129342 +#define SPI_CS_ERASE_PARAM_ERR     (1 << 6)
129343 +#define SPI_CS_OUT_OF_RANGE        (1 << 7)
129344 +
129345 +/* SPI mode R3 response */
129346 +#define SPI_R3_RESPONSE_BYTES 5
129347 +#define SPI_R3_GET_OCR(pR) ((((UINT32)((pR)[0])) |         \
129348 +                            (((UINT32)((pR)[1])) << 8)  |  \
129349 +                            (((UINT32)((pR)[2])) << 16) |  \
129350 +                            (((UINT32)((pR)[3])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
129351 +#define SPI_R3_IS_CARD_READY(pR)  (((pR)[3] & 0x80) == 0x80)
129352 +#define GET_SPI_R3_RESP_TOKEN(pR) (pR)[4]
129353 +
129354 +/* SPI mode SDIO R4 response */
129355 +#define SPI_SDIO_R4_RESPONSE_BYTES 5
129356 +#define SPI_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[0])        |  \
129357 +                          (((UINT32)(pR)[1]) << 8)   |  \
129358 +                          (((UINT32)(pR)[2]) << 16))
129359 +#define SPI_SDIO_R4_IS_MEMORY_PRESENT(pR)   (((pR)[3] & 0x08) == 0x08)
129360 +#define SPI_SDIO_R4_GET_IO_FUNC_COUNT(pR)   (((pR)[3] >> 4) & 0x07)
129361 +#define SPI_SDIO_R4_IS_CARD_READY(pR)       (((pR)[3] & 0x80) == 0x80)
129362 +#define GET_SPI_SDIO_R4_RESP_TOKEN(pR)  (pR)[4]
129363 +
129364 +/* SPI Mode SDIO R5 response */
129365 +#define SPI_SDIO_R5_RESPONSE_BYTES 2
129366 +#define GET_SPI_SDIO_R5_RESP_TOKEN(pR)     (pR)[1]
129367 +#define GET_SPI_SDIO_R5_RESPONSE_RDATA(pR) (pR)[0]
129368 +#define SPI_R5_IDLE_STATE   0x01
129369 +#define SPI_R5_ILLEGAL_CMD  (1 << 2)
129370 +#define SPI_R5_CMD_CRC      (1 << 3)
129371 +#define SPI_R5_FUNC_ERR     (1 << 4)
129372 +#define SPI_R5_PARAM_ERR    (1 << 6)
129373 +
129374 +/* SDIO COMMAND 52 Definitions */
129375 +#define CMD52_READ  0
129376 +#define CMD52_WRITE 1
129377 +#define CMD52_READ_AFTER_WRITE 1
129378 +#define CMD52_NORMAL_WRITE     0
129379 +#define SDIO_SET_CMD52_ARG(arg,rw,func,raw,address,writedata) \
129380 +    (arg) = (((rw) & 1) << 31)           | \
129381 +            (((func) & 0x7) << 28)       | \
129382 +            (((raw) & 1) << 27)          | \
129383 +            (1 << 26)                    | \
129384 +            (((address) & 0x1FFFF) << 9) | \
129385 +            (1 << 8)                     | \
129386 +            ((writedata) & 0xFF)
129387 +#define SDIO_SET_CMD52_READ_ARG(arg,func,address) \
129388 +    SDIO_SET_CMD52_ARG(arg,CMD52_READ,(func),0,address,0x00)
129389 +#define SDIO_SET_CMD52_WRITE_ARG(arg,func,address,value) \
129390 +    SDIO_SET_CMD52_ARG(arg,CMD52_WRITE,(func),CMD52_NORMAL_WRITE,address,value)
129391 +
129392 +/* SDIO COMMAND 53 Definitions */
129393 +#define CMD53_READ          0
129394 +#define CMD53_WRITE         1
129395 +#define CMD53_BLOCK_BASIS   1
129396 +#define CMD53_BYTE_BASIS    0
129397 +#define CMD53_FIXED_ADDRESS 0
129398 +#define CMD53_INCR_ADDRESS  1
129399 +#define SDIO_SET_CMD53_ARG(arg,rw,func,mode,opcode,address,bytes_blocks) \
129400 +    (arg) = (((rw) & 1) << 31)                  | \
129401 +            (((func) & 0x7) << 28)              | \
129402 +            (((mode) & 1) << 27)                | \
129403 +            (((opcode) & 1) << 26)              | \
129404 +            (((address) & 0x1FFFF) << 9)        | \
129405 +            ((bytes_blocks) & 0x1FF)
129406 +
129407 +#define SDIO_MAX_LENGTH_BYTE_BASIS  512
129408 +#define SDIO_MAX_BLOCKS_BLOCK_BASIS 511
129409 +#define SDIO_MAX_BYTES_PER_BLOCK    2048
129410 +#define SDIO_COMMON_AREA_FUNCTION_NUMBER 0
129411 +#define SDIO_FIRST_FUNCTION_NUMBER       1
129412 +#define SDIO_LAST_FUNCTION_NUMBER        7
129413 +
129414 +#define CMD53_CONVERT_BYTE_BASIS_BLK_LENGTH_PARAM(b) (((b) < SDIO_MAX_LENGTH_BYTE_BASIS) ? (b) : 0)
129415 +#define CMD53_CONVERT_BLOCK_BASIS_BLK_COUNT_PARAM(b) (((b) <= SDIO_MAX_BLOCKS_BLOCK_BASIS) ? (b) : 0)
129416 +
129417 +
129418 +/* SDIO COMMON Registers */
129419 +
129420 +/* revision register */
129421 +#define CCCR_SDIO_REVISION_REG  0x00
129422 +#define CCCR_REV_MASK           0x0F
129423 +#define CCCR_REV_1_0            0x00
129424 +#define CCCR_REV_1_1            0x01
129425 +#define SDIO_REV_MASK           0xF0
129426 +#define SDIO_REV_1_00           0x00
129427 +#define SDIO_REV_1_10           0x10
129428 +#define SDIO_REV_1_20           0x20
129429 +/* SD physical spec revision */
129430 +#define SD_SPEC_REVISION_REG    0x01
129431 +#define SD_REV_MASK             0x0F
129432 +#define SD_REV_1_01             0x00
129433 +#define SD_REV_1_10             0x01
129434 +/* I/O Enable  */
129435 +#define SDIO_ENABLE_REG         0x02
129436 +/* I/O Ready */
129437 +#define SDIO_READY_REG          0x03
129438 +/* Interrupt Enable */
129439 +#define SDIO_INT_ENABLE_REG     0x04
129440 +#define SDIO_INT_MASTER_ENABLE  0x01
129441 +#define SDIO_INT_ALL_ENABLE     0xFE
129442 +/* Interrupt Pending */
129443 +#define SDIO_INT_PENDING_REG    0x05
129444 +#define SDIO_INT_PEND_MASK      0xFE
129445 +/* I/O Abort */
129446 +#define SDIO_IO_ABORT_REG       0x06
129447 +#define SDIO_IO_RESET           (1 << 3)
129448 +/* Bus Interface */
129449 +#define SDIO_BUS_IF_REG         0x07
129450 +#define CARD_DETECT_DISABLE     0x80
129451 +#define SDIO_BUS_WIDTH_1_BIT    0x00
129452 +#define SDIO_BUS_WIDTH_4_BIT    0x02
129453 +/* Card Capabilities */
129454 +#define SDIO_CARD_CAPS_REG          0x08
129455 +#define SDIO_CAPS_CMD52_WHILE_DATA  0x01   /* card can issue CMD52 while data transfer */
129456 +#define SDIO_CAPS_MULTI_BLOCK       0x02   /* card supports multi-block data transfers */
129457 +#define SDIO_CAPS_READ_WAIT         0x04   /* card supports read-wait protocol */
129458 +#define SDIO_CAPS_SUSPEND_RESUME    0x08   /* card supports I/O function suspend/resume */
129459 +#define SDIO_CAPS_INT_MULTI_BLK     0x10   /* interrupts between multi-block data capable */
129460 +#define SDIO_CAPS_ENB_INT_MULTI_BLK 0x20   /* enable ints between muli-block data */
129461 +#define SDIO_CAPS_LOW_SPEED         0x40   /* low speed card */
129462 +#define SDIO_CAPS_4BIT_LS           0x80   /* 4 bit low speed card */
129463 +/* Common CIS pointer */
129464 +#define SDIO_CMN_CIS_PTR_LOW_REG    0x09
129465 +#define SDIO_CMN_CIS_PTR_MID_REG    0x0a
129466 +#define SDIO_CMN_CIS_PTR_HI_REG     0x0b
129467 +/* Bus suspend */
129468 +#define SDIO_BUS_SUSPEND_REG            0x0c
129469 +#define SDIO_FUNC_SUSPEND_STATUS_MASK   0x01 /* selected function is suspended */
129470 +#define SDIO_SUSPEND_FUNCTION           0x02 /* suspend the current selected function */
129471 +/* Function select (for bus suspension) */
129472 +#define SDIO_FUNCTION_SELECT_REG        0x0d
129473 +#define SDIO_SUSPEND_FUNCTION_0         0x00
129474 +#define SDIO_SUSPEND_MEMORY_FUNC_MASK    0x08
129475 +/* Function Execution */
129476 +#define SDIO_FUNCTION_EXEC_REG          0x0e
129477 +#define SDIO_MEMORY_FUNC_EXEC_MASK      0x01
129478 +/* Function Ready */
129479 +#define SDIO_FUNCTION_READY_REG          0x0f
129480 +#define SDIO_MEMORY_FUNC_BUSY_MASK       0x01
129481 +
129482 +/* power control 1.10 only  */
129483 +#define SDIO_POWER_CONTROL_REG            0x12
129484 +#define SDIO_POWER_CONTROL_SMPC           0x01
129485 +#define SDIO_POWER_CONTROL_EMPC           0x02
129486 +
129487 +/* high speed control , 1.20 only */
129488 +#define SDIO_HS_CONTROL_REG               0x13
129489 +#define SDIO_HS_CONTROL_SHS               0x01
129490 +#define SDIO_HS_CONTROL_EHS               0x02
129491 +
129492 +/* Function Base Registers */
129493 +#define xFUNCTION_FBR_OFFSET(funcNo) (0x100*(funcNo))
129494 +/* offset calculation that does not use multiplication */
129495 +static INLINE UINT32 CalculateFBROffset(UCHAR FuncNo) {
129496 +    UCHAR i = FuncNo;
129497 +    UINT32 offset = 0;
129498 +    while (i) {
129499 +        offset += 0x100;
129500 +        i--;
129501 +    }
129502 +    return offset;
129503 +}
129504 +/* Function info */
129505 +#define FBR_FUNC_INFO_REG_OFFSET(fbr)   ((fbr) + 0x00)
129506 +#define FUNC_INFO_SUPPORTS_CSA_MASK     0x40
129507 +#define FUNC_INFO_ENABLE_CSA            0x80
129508 +#define FUNC_INFO_DEVICE_CODE_MASK      0x0F
129509 +#define FUNC_INFO_DEVICE_CODE_LAST      0x0F
129510 +#define FBR_FUNC_EXT_DEVICE_CODE_OFFSET(fbr) ((fbr) + 0x01)
129511 +/* Function Power selection */
129512 +#define FBR_FUNC_POWER_SELECT_OFFSET(fbr)    ((fbr) + 0x02)
129513 +#define FUNC_POWER_SELECT_SPS           0x01
129514 +#define FUNC_POWER_SELECT_EPS           0x02
129515 +/* Function CIS ptr */
129516 +#define FBR_FUNC_CIS_LOW_OFFSET(fbr)   ((fbr) + 0x09)
129517 +#define FBR_FUNC_CIS_MID_OFFSET(fbr)   ((fbr) + 0x0a)
129518 +#define FBR_FUNC_CIS_HI_OFFSET(fbr)    ((fbr) + 0x0b)
129519 +/* Function CSA ptr */
129520 +#define FBR_FUNC_CSA_LOW_OFFSET(fbr)   ((fbr) + 0x0c)
129521 +#define FBR_FUNC_CSA_MID_OFFSET(fbr)   ((fbr) + 0x0d)
129522 +#define FBR_FUNC_CSA_HI_OFFSET(fbr)    ((fbr) + 0x0e)
129523 +/* Function CSA data window */
129524 +#define FBR_FUNC_CSA_DATA_OFFSET(fbr)  ((fbr) + 0x0f)
129525 +/* Function Block Size Control */
129526 +#define FBR_FUNC_BLK_SIZE_LOW_OFFSET(fbr)  ((fbr) + 0x10)
129527 +#define FBR_FUNC_BLK_SIZE_HI_OFFSET(fbr)   ((fbr) + 0x11)
129528 +#define SDIO_CIS_AREA_BEGIN   0x00001000
129529 +#define SDIO_CIS_AREA_END     0x00017fff
129530 +/* Tuple definitions */
129531 +#define CISTPL_NULL         0x00
129532 +#define CISTPL_CHECKSUM     0x10
129533 +#define CISTPL_VERS_1       0x15
129534 +#define CISTPL_ALTSTR       0x16
129535 +#define CISTPL_MANFID       0x20
129536 +#define CISTPL_FUNCID       0x21
129537 +#define CISTPL_FUNCE        0x22
129538 +#define CISTPL_VENDOR       0x91
129539 +#define CISTPL_END          0xff
129540 +#define CISTPL_LINK_END     0xff
129541 +
129542 +
129543 +/* these structures must be packed */
129544 +
129545 +/* Manufacturer ID tuple */
129546 +struct SDIO_MANFID_TPL {
129547 +    UINT16  ManufacturerCode;   /* jedec code */
129548 +    UINT16  ManufacturerInfo;   /* manufacturer specific code */
129549 +}CT_PACK_STRUCT;
129550 +
129551 +/* Function ID Tuple */
129552 +struct SDIO_FUNC_ID_TPL {
129553 +    UINT8  DeviceCode;  /* device code */
129554 +    UINT8  InitMask;    /* system initialization mask (not used) */
129555 +}CT_PACK_STRUCT;
129556 +
129557 +    /* Extended Function Tuple (Common) */
129558 +struct SDIO_FUNC_EXT_COMMON_TPL {
129559 +    UINT8   Type;                               /* type */
129560 +    UINT16  Func0_MaxBlockSize;                 /* max function 0 block transfer size */
129561 +    UINT8   MaxTransSpeed;                      /* max transfer speed (encoded) */
129562 +#define TRANSFER_UNIT_MULTIPIER_MASK  0x07
129563 +#define TIME_VALUE_MASK               0x78
129564 +#define TIME_VALUE_SHIFT              3
129565 +}CT_PACK_STRUCT;
129566 +
129567 +/* Extended Function Tuple (Per Function) */
129568 +struct SDIO_FUNC_EXT_FUNCTION_TPL {
129569 +    UINT8   Type;                               /* type */
129570 +#define SDIO_FUNC_INFO_WAKEUP_SUPPORT 0x01
129571 +    UINT8   FunctionInfo;                       /* function info */
129572 +    UINT8   SDIORev;                            /* revision */
129573 +    UINT32  CardPSN;                            /* product serial number */
129574 +    UINT32  CSASize;                            /* CSA size */
129575 +    UINT8   CSAProperties;                      /* CSA properties */
129576 +    UINT16  MaxBlockSize;                       /* max block size for block transfers */
129577 +    UINT32  FunctionOCR;                        /* optimal function OCR */
129578 +    UINT8   OpMinPwr;                           /* operational min power */
129579 +    UINT8   OpAvgPwr;                           /* operational average power */
129580 +    UINT8   OpMaxPwr;                           /* operation maximum power */
129581 +    UINT8   SbMinPwr;                           /* standby minimum power */
129582 +    UINT8   SbAvgPwr;                           /* standby average power */
129583 +    UINT8   SbMaxPwr;                           /* standby maximum power */
129584 +    UINT16  MinBandWidth;                       /* minimum bus bandwidth */
129585 +    UINT16  OptBandWidth;                       /* optimalbus bandwitdh */
129586 +}CT_PACK_STRUCT;
129587 +
129588 +struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 {
129589 +    struct SDIO_FUNC_EXT_FUNCTION_TPL CommonInfo;  /* from 1.0*/
129590 +    UINT16  EnableTimeOut;                  /* timeout for enable */
129591 +    UINT16  OperPwrMaxPwr;
129592 +    UINT16  OperPwrAvgPwr;
129593 +    UINT16  HiPwrMaxPwr;
129594 +    UINT16  HiPwrAvgPwr;
129595 +    UINT16  LowPwrMaxPwr;
129596 +    UINT16  LowPwrAvgPwr;
129597 +}CT_PACK_STRUCT;
129598 +
129599 +static INLINE SDIO_STATUS ConvertCMD52ResponseToSDIOStatus(UINT8 CMD52ResponseFlags) {
129600 +    if (!(CMD52ResponseFlags & SD_R5_ERRORS)) {
129601 +        return SDIO_STATUS_SUCCESS;
129602 +    }
129603 +    if (CMD52ResponseFlags & SD_R5_ILLEGAL_CMD) {
129604 +        return SDIO_STATUS_DATA_STATE_INVALID;
129605 +    } else if (CMD52ResponseFlags & SD_R5_INVALID_FUNC) {
129606 +        return SDIO_STATUS_INVALID_FUNC;
129607 +    } else if (CMD52ResponseFlags & SD_R5_ARG_RANGE_ERR) {
129608 +        return SDIO_STATUS_FUNC_ARG_ERROR;
129609 +    } else {
129610 +        return SDIO_STATUS_DATA_ERROR_UNKNOWN;
129611 +    }
129612 +}
129613 +
129614 +/* CMD6 mode switch definitions */
129615 +
129616 +#define SD_SWITCH_FUNC_CHECK    0
129617 +#define SD_SWITCH_FUNC_SET      ((UINT32)(1 << 31))
129618 +#define SD_FUNC_NO_SELECT_MASK  0x00FFFFFF
129619 +#define SD_SWITCH_GRP_1         0
129620 +#define SD_SWITCH_GRP_2         1
129621 +#define SD_SWITCH_GRP_3         2
129622 +#define SD_SWITCH_GRP_4         3
129623 +#define SD_SWITCH_GRP_5         4
129624 +#define SD_SWITCH_GRP_6         5
129625 +
129626 +#define SD_SWITCH_HIGH_SPEED_GROUP     SD_SWITCH_GRP_1
129627 +#define SD_SWITCH_HIGH_SPEED_FUNC_NO   1
129628 +
129629 +#define SD_SWITCH_MAKE_SHIFT(grp) ((grp) * 4)
129630 +
129631 +#define SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo) \
129632 +     ((SD_FUNC_NO_SELECT_MASK & (~(0xF << SD_SWITCH_MAKE_SHIFT(FuncGrp)))) |  \
129633 +        (((FuncNo) & 0xF) << SD_SWITCH_MAKE_SHIFT(FuncGrp)))                 \
129634 +
129635 +#define SD_SWITCH_FUNC_ARG_GROUP_CHECK(FuncGrp,FuncNo) \
129636 +    (SD_SWITCH_FUNC_CHECK | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
129637 +
129638 +#define SD_SWITCH_FUNC_ARG_GROUP_SET(FuncGrp,FuncNo)   \
129639 +    (SD_SWITCH_FUNC_SET | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
129640 +
129641 +#define SD_SWITCH_FUNC_STATUS_BLOCK_BYTES 64
129642 +
129643 +#define SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pBuffer,FuncGrp) \
129644 +    (USHORT)((pBuffer)[50 + ((FuncGrp)*2)] | ((pBuffer)[51 + ((FuncGrp)*2)] << 8))
129645 +
129646 +#define SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pBuffer) \
129647 +     (USHORT)((pBuffer)[62] | ((pBuffer)[63] << 8))
129648 +
129649 +static INLINE UINT8 SDSwitchGetSwitchResult(PUINT8 pBuffer, UINT8 FuncGrp)
129650 +{
129651 +    switch (FuncGrp) {
129652 +        case 0:
129653 +            return (pBuffer[47] & 0xF);
129654 +        case 1:
129655 +            return (pBuffer[47] >> 4);
129656 +        case 2:
129657 +            return (pBuffer[48] & 0xF);
129658 +        case 3:
129659 +            return (pBuffer[48] >> 4);
129660 +        case 4:
129661 +            return (pBuffer[49] & 0xF);
129662 +        case 5:
129663 +            return (pBuffer[49] >> 4);
129664 +        default:
129665 +            return 0xF;
129666 +    }
129667 +}
129668 +
129669 +#endif
129670 Index: linux-2.6.24.7/include/linux/sdio/sdio_hcd_defs.h
129671 ===================================================================
129672 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
129673 +++ linux-2.6.24.7/include/linux/sdio/sdio_hcd_defs.h   2008-12-11 22:46:49.000000000 +0100
129674 @@ -0,0 +1,219 @@
129675 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129676 +@file: sdio_hcd_defs.h
129677 +
129678 +@abstract: host controller driver definitions
129679 +
129680 +@notice: Copyright (c), 2005-2006 Atheros Communications, Inc.
129681 +
129682 +
129683 + *
129684 + *  This program is free software; you can redistribute it and/or modify
129685 + *  it under the terms of the GNU General Public License version 2 as
129686 + *  published by the Free Software Foundation;
129687 + *
129688 + *  Software distributed under the License is distributed on an "AS
129689 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
129690 + *  implied. See the License for the specific language governing
129691 + *  rights and limitations under the License.
129692 + *
129693 + *  Portions of this code were developed with information supplied from the
129694 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
129695 + *
129696 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
129697 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
129698 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
129699 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
129700 + *   Specification may require a license from the SD Card Association or other third parties.
129701 + *   Disclaimers:
129702 + *   The information contained in the Simplified Specification is presented only as a standard
129703 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
129704 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
129705 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
129706 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
129707 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
129708 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
129709 + *   information, know-how or other confidential information to any third party.
129710 + *
129711 + *
129712 + *  The initial developers of the original code are Seung Yi and Paul Lever
129713 + *
129714 + *  sdio@atheros.com
129715 + *
129716 + *
129717 +
129718 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129719 +#ifndef __SDIO_HCD_DEFS_H___
129720 +#define __SDIO_HCD_DEFS_H___
129721 +
129722 +    /* write protect switch position data */
129723 +typedef UINT8 SDCONFIG_WP_VALUE;
129724 +
129725 +    /* HC commands */
129726 +#define SDCONFIG_SEND_INIT_CLOCKS  (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 1)
129727 +#define SDCONFIG_SDIO_INT_CTRL     (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 2)
129728 +#define SDCONFIG_SDIO_REARM_INT    (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_NONE | 3)
129729 +#define SDCONFIG_BUS_MODE_CTRL     (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_BOTH | 4)
129730 +#define SDCONFIG_POWER_CTRL        (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 5)
129731 +#define SDCONFIG_GET_WP            (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET  | 6)
129732 +
129733 +    /* slot init clocks control */
129734 +typedef struct _SDCONFIG_INIT_CLOCKS_DATA  {
129735 +    UINT16  NumberOfClocks;  /* number of clocks to issue in the current bus mode*/
129736 +}SDCONFIG_INIT_CLOCKS_DATA, *PSDCONFIG_INIT_CLOCKS_DATA;
129737 +
129738 +/* slot power control */
129739 +typedef struct _SDCONFIG_POWER_CTRL_DATA  {
129740 +    BOOL                SlotPowerEnable;            /* turn on/off slot power */
129741 +    SLOT_VOLTAGE_MASK   SlotPowerVoltageMask;       /* slot power voltage mask */
129742 +}SDCONFIG_POWER_CTRL_DATA, *PSDCONFIG_POWER_CTRL_DATA;
129743 +
129744 +typedef UINT8 SDIO_IRQ_MODE_FLAGS;
129745 +/* SDIO Interrupt control */
129746 +typedef struct _SDCONFIG_SDIO_INT_CTRL_DATA  {
129747 +    BOOL                  SlotIRQEnable;      /* turn on/off Slot IRQ detection */
129748 +    SDIO_IRQ_MODE_FLAGS   IRQDetectMode;      /* slot IRQ detect mode , only valid if Enabled = TRUE */
129749 +#define IRQ_DETECT_RAW       0x00
129750 +#define IRQ_DETECT_MULTI_BLK 0x01
129751 +#define IRQ_DETECT_4_BIT     0x02
129752 +#define IRQ_DETECT_1_BIT     0x04
129753 +#define IRQ_DETECT_SPI       0x08
129754 +}SDCONFIG_SDIO_INT_CTRL_DATA, *PSDCONFIG_SDIO_INT_CTRL_DATA;
129755 +
129756 +/* card insert */
129757 +#define EVENT_HCD_ATTACH               1
129758 +/* card remove */
129759 +#define EVENT_HCD_DETACH               2
129760 +/* card slot interrupt */
129761 +#define EVENT_HCD_SDIO_IRQ_PENDING     3
129762 +/* transfer done */
129763 +#define EVENT_HCD_TRANSFER_DONE        4
129764 +/* (internal use only) */
129765 +#define EVENT_HCD_CD_POLLING           5
129766 +/* NOP */
129767 +#define EVENT_HCD_NOP                  0
129768 +
129769 +/* attrib_flags */
129770 +#define SDHCD_ATTRIB_SUPPORTS_POWER   0x0001  /* host controller driver supports power managment */
129771 +#define SDHCD_ATTRIB_BUS_1BIT         0x0002  /* SD Native 1 - bit mode */
129772 +#define SDHCD_ATTRIB_BUS_4BIT         0x0004  /* SD Native 4 - bit mode */
129773 +#define SDHCD_ATTRIB_BUS_SPI          0x0008  /* SPI mode capable */
129774 +#define SDHCD_ATTRIB_READ_WAIT        0x0010  /* read wait supported (SD-only) */
129775 +#define SDHCD_ATTRIB_MULTI_BLK_IRQ    0x0020  /* interrupts between multi-block capable (SD-only) */
129776 +#define SDHCD_ATTRIB_BUS_MMC8BIT      0x0040  /* MMC  8-bit */
129777 +#define SDHCD_ATTRIB_SLOT_POLLING     0x0080  /* requires slot polling for Card Detect */
129778 +#define SDHCD_ATTRIB_POWER_SWITCH     0x0100  /* host has power switch control, must be set if SPI
129779 +                                                 mode can be switched to 1 or 4 bit mode */
129780 +#define SDHCD_ATTRIB_NO_SPI_CRC       0x0200  /* when in SPI mode,
129781 +                                                 host wants to run without SPI CRC */
129782 +#define SDHCD_ATTRIB_AUTO_CMD12       0x0400  /* host controller supports auto CMD12 */
129783 +#define SDHCD_ATTRIB_NO_4BIT_IRQ      0x0800  /* host controller does not support 4 bit IRQ mode*/
129784 +#define SDHCD_ATTRIB_RAW_MODE         0x1000  /* host controller is a raw mode hcd*/
129785 +#define SDHCD_ATTRIB_SD_HIGH_SPEED    0x2000  /* host controller supports SD high speed interface */
129786 +#define SDHCD_ATTRIB_MMC_HIGH_SPEED   0x4000  /* host controller supports MMC high speed interface */
129787 +
129788 +#define IS_CARD_PRESENT(pHcd)         ((pHcd)->CardProperties.Flags & CARD_TYPE_MASK)
129789 +#define SET_CURRENT_REQUEST(pHcd,Req) (pHcd)->pCurrentRequest = (Req)
129790 +#define IS_HCD_RAW(pHcd)              ((pHcd)->Attributes & SDHCD_ATTRIB_RAW_MODE)
129791 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129792 +  @function: Get a pointer to the current bus request for a host controller
129793 +
129794 +  @function name: GET_CURRENT_REQUEST
129795 +  @prototype: PSDREQUEST GET_CURRENT_REQUEST (PSDHCD pHcd)
129796 +  @category: HD_Reference
129797 +
129798 +  @input:  pHcd - host structure
129799 +
129800 +  @return: current SD/SDIO bus request being worked on
129801 +
129802 +  @notes: Implemented as a macro. This macro returns the current SD request that is
129803 +          being worked on.
129804 +
129805 +  @example: getting the current request:
129806 +          pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
129807 +
129808 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129809 +#define GET_CURRENT_REQUEST(pHcd)     (pHcd)->pCurrentRequest
129810 +#define GET_CURRENT_BUS_WIDTH(pHcd) SDCONFIG_GET_BUSWIDTH((pHcd)->CardProperties.BusMode)
129811 +
129812 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129813 +  @function: Get host controller's current operational bus clock
129814 +
129815 +  @function name: SDHCD_GET_OPER_CLOCK
129816 +  @prototype: SD_BUSCLOCK_RATE SDHCD_GET_OPER_CLOCK(PSDHCD pHcd)
129817 +  @category: HD_Reference
129818 +
129819 +  @input:  pHcd   - the registered host structure
129820 +
129821 +  @output: none
129822 +
129823 +  @return: clock rate
129824 +
129825 +  @notes: Implemented as a macro. Returns the current bus clock rate.
129826 +
129827 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129828 +#define SDHCD_GET_OPER_CLOCK(pHcd)      (pHcd)->CardProperties.OperBusClock
129829 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129830 +  @function: Is host controller operating in SPI mode
129831 +
129832 +  @function name: IS_HCD_BUS_MODE_SPI
129833 +  @prototype: BOOL IS_HCD_BUS_MODE_SPI (PSDHCD pHcd)
129834 +  @category: HD_Reference
129835 +
129836 +  @input:  pHcd - host structure
129837 +
129838 +  @return: TRUE if in SPI mode
129839 +
129840 +  @notes: Implemented as a macro. Host controllers that operate in SPI mode
129841 +          dynamically can use this macro to check for SPI operation.
129842 +
129843 +  @example: testing for SPI mode:
129844 +          if (IS_HCD_BUS_MODE_SPI(&pHct->Hcd)) {
129845 +             .. in spi mode
129846 +          }
129847 +
129848 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129849 +#define IS_HCD_BUS_MODE_SPI(pHcd)   (GET_CURRENT_BUS_WIDTH(pHcd) == SDCONFIG_BUS_WIDTH_SPI)
129850 +
129851 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129852 +  @function: Is host controller using SPI in non-CRC mode
129853 +
129854 +  @function name: IS_HCD_BUS_MODE_SPI_NO_CRC
129855 +  @prototype: BOOL IS_HCD_BUS_MODE_SPI_NO_CRC(PSDHCD pHcd)
129856 +  @category: HD_Reference
129857 +
129858 +  @input:  pHcd - host structure
129859 +
129860 +  @return: TRUE if CRC mode is off
129861 +
129862 +  @notes: Implemented as a macro. SPI-capable cards and systems can operate in
129863 +          non-CRC protected mode.  In this mode the host controller should ignore
129864 +          CRC fields and/or disable CRC generation when issuing command or data
129865 +          packets.  This option is useful for software based SPI mode where CRC
129866 +          should be turned off in order to reduce processing overhead.
129867 +
129868 +  @example: test for non-CRC SPI mode:
129869 +          if (IS_HCD_BUS_MODE_SPI_NO_CRC(&pHct->Hcd)) {
129870 +             .. disable CRC checking in hardware.
129871 +          }
129872 +
129873 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129874 +#define IS_HCD_BUS_MODE_SPI_NO_CRC(pHcd)   ((pHcd)->CardProperties.BusMode & \
129875 +                                                        SDCONFIG_BUS_MODE_SPI_NO_CRC)
129876 +
129877 +typedef UINT8 SDHCD_RESPONSE_CHECK_MODE;
129878 +/* have SDIO core check the response token and see if it is okay to continue with
129879 +   * the data portion */
129880 +#define SDHCD_CHECK_DATA_TRANS_OK   0x01
129881 +/* have SDIO core check the SPI token received */
129882 +#define SDHCD_CHECK_SPI_TOKEN       0x02
129883 +
129884 +/* prototypes */
129885 +/* for HCD use */
129886 +SDIO_STATUS SDIO_RegisterHostController(PSDHCD pHcd);
129887 +SDIO_STATUS SDIO_UnregisterHostController(PSDHCD pHcd);
129888 +SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event);
129889 +SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode);
129890 +SDIO_STATUS SDIO_BusAddOSDevice(PSDDMA_DESCRIPTION pDma, POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice);
129891 +void SDIO_BusRemoveOSDevice(POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice);
129892 +
129893 +#endif /* __SDIO_BUSDRIVER_H___ */
129894 Index: linux-2.6.24.7/include/linux/sdio/sdio_lib.h
129895 ===================================================================
129896 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
129897 +++ linux-2.6.24.7/include/linux/sdio/sdio_lib.h        2008-12-11 22:46:49.000000000 +0100
129898 @@ -0,0 +1,270 @@
129899 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
129900 +@file: sdio_lib.h
129901 +
129902 +@abstract: SDIO Library include
129903 +
129904 +#notes:
129905 +
129906 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
129907 +
129908 +
129909 + *
129910 + *  This program is free software; you can redistribute it and/or modify
129911 + *  it under the terms of the GNU General Public License version 2 as
129912 + *  published by the Free Software Foundation;
129913 + *
129914 + *  Software distributed under the License is distributed on an "AS
129915 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
129916 + *  implied. See the License for the specific language governing
129917 + *  rights and limitations under the License.
129918 + *
129919 + *  Portions of this code were developed with information supplied from the
129920 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
129921 + *
129922 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
129923 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
129924 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
129925 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
129926 + *   Specification may require a license from the SD Card Association or other third parties.
129927 + *   Disclaimers:
129928 + *   The information contained in the Simplified Specification is presented only as a standard
129929 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
129930 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
129931 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
129932 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
129933 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
129934 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
129935 + *   information, know-how or other confidential information to any third party.
129936 + *
129937 + *
129938 + *  The initial developers of the original code are Seung Yi and Paul Lever
129939 + *
129940 + *  sdio@atheros.com
129941 + *
129942 + *
129943 +
129944 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
129945 +#ifndef __SDIO_LIB_H___
129946 +#define __SDIO_LIB_H___
129947 +
129948 +#ifdef UNDER_CE
129949 +#include "wince\sdio_lib_wince.h"
129950 +#endif /* WINCE */
129951 +
129952 +#define CMD52_DO_READ  FALSE
129953 +#define CMD52_DO_WRITE TRUE
129954 +
129955 +    /* read/write macros to any function */
129956 +#define Cmd52WriteByteFunc(pDev,Func,Address,pValue) \
129957 +                SDLIB_IssueCMD52((pDev),(Func),(Address),(pValue),1,CMD52_DO_WRITE)
129958 +#define Cmd52ReadByteFunc(pDev,Func,Address,pValue) \
129959 +                SDLIB_IssueCMD52((pDev),(Func),(Address),pValue,1,CMD52_DO_READ)
129960 +#define Cmd52ReadMultipleFunc(pDev,Func, Address, pBuf,length) \
129961 +                SDLIB_IssueCMD52((pDev),(Func),(Address),(pBuf),(length),CMD52_DO_READ)
129962 +
129963 +   /* macros to access common registers */
129964 +#define Cmd52WriteByteCommon(pDev, Address, pValue) \
129965 +                Cmd52WriteByteFunc((pDev),0,(Address),(pValue))
129966 +#define Cmd52ReadByteCommon(pDev, Address, pValue) \
129967 +                Cmd52ReadByteFunc((pDev),0,(Address),(pValue))
129968 +#define Cmd52ReadMultipleCommon(pDev, Address, pBuf,length) \
129969 +                Cmd52ReadMultipleFunc((pDev),0,(Address),(pBuf),(length))
129970 +
129971 +#define SDLIB_SetupCMD52RequestAsync(f,a,w,wd,pR)   \
129972 +{                                                   \
129973 +    SDLIB_SetupCMD52Request((f),(a),(w),(wd),(pR)); \
129974 +    (pR)->Flags |= SDREQ_FLAGS_TRANS_ASYNC;         \
129975 +}
129976 +
129977 +    /* a message block */
129978 +typedef struct _SDMESSAGE_BLOCK {
129979 +    SDLIST  SDList;                   /* list entry */
129980 +    INT     MessageLength;            /* number of bytes in this message */
129981 +    UINT8   MessageStart[1];          /* message start */
129982 +}SDMESSAGE_BLOCK, *PSDMESSAGE_BLOCK;
129983 +
129984 +    /* message queue */
129985 +typedef struct _SDMESSAGE_QUEUE {
129986 +    SDLIST          MessageList;        /* message list */
129987 +    OS_CRITICALSECTION MessageCritSection; /* message semaphore */
129988 +    SDLIST          FreeMessageList;    /* free message list */
129989 +    INT             MaxMessageLength;   /* max message block length */
129990 +}SDMESSAGE_QUEUE, *PSDMESSAGE_QUEUE;
129991 +
129992 +/* internal library prototypes that can be proxied */
129993 +SDIO_STATUS _SDLIB_IssueCMD52(PSDDEVICE     pDevice,
129994 +                        UINT8         FuncNo,
129995 +                        UINT32        Address,
129996 +                        PUINT8        pData,
129997 +                        INT           ByteCount,
129998 +                        BOOL          Write);
129999 +SDIO_STATUS _SDLIB_FindTuple(PSDDEVICE  pDevice,
130000 +                             UINT8      Tuple,
130001 +                             UINT32     *pTupleScanAddress,
130002 +                             PUINT8     pBuffer,
130003 +                             UINT8      *pLength);
130004 +SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE        pDevice,
130005 +                               SDCONFIG_COMMAND Command,
130006 +                               PVOID            pData,
130007 +                               INT              Length);
130008 +void _SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length,PTEXT pDescription);
130009 +void _SDLIB_SetupCMD52Request(UINT8         FuncNo,
130010 +                              UINT32        Address,
130011 +                              BOOL          Write,
130012 +                              UINT8         WriteData,
130013 +                              PSDREQUEST    pRequest);
130014 +SDIO_STATUS _SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
130015 +                                        UINT16           BlockSize);
130016 +
130017 +SDIO_STATUS _SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice,
130018 +                                       SD_SLOT_CURRENT *pOpCurrent);
130019 +PSDMESSAGE_QUEUE _CreateMessageQueue(INT MaxMessages, INT MaxMessageLength);
130020 +void _DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue);
130021 +SDIO_STATUS _PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength);
130022 +SDIO_STATUS _GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength);
130023 +
130024 +#ifdef CTSYSTEM_NO_FUNCTION_PROXIES
130025 +    /* OS port requires no proxy functions, use methods directly from the library */
130026 +#define SDLIB_IssueCMD52        _SDLIB_IssueCMD52
130027 +#define SDLIB_SetupCMD52Request _SDLIB_SetupCMD52Request
130028 +#define SDLIB_FindTuple         _SDLIB_FindTuple
130029 +#define SDLIB_IssueConfig       _SDLIB_IssueConfig
130030 +#define SDLIB_SetFunctionBlockSize  _SDLIB_SetFunctionBlockSize
130031 +#define SDLIB_GetDefaultOpCurrent   _SDLIB_GetDefaultOpCurrent
130032 +#define SDLIB_CreateMessageQueue    _CreateMessageQueue
130033 +#define SDLIB_DeleteMessageQueue    _DeleteMessageQueue
130034 +#define SDLIB_PostMessage           _PostMessage
130035 +#define SDLIB_GetMessage            _GetMessage
130036 +#define SDLIB_PrintBuffer           _SDLIB_PrintBuffer
130037 +#else
130038 +
130039 +/* proxied versions */
130040 +SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE     pDevice,
130041 +                             UINT8         FuncNo,
130042 +                             UINT32        Address,
130043 +                             PUINT8        pData,
130044 +                             INT           ByteCount,
130045 +                             BOOL          Write);
130046 +
130047 +void SDLIB_SetupCMD52Request(UINT8         FuncNo,
130048 +                             UINT32        Address,
130049 +                             BOOL          Write,
130050 +                             UINT8         WriteData,
130051 +                             PSDREQUEST    pRequest);
130052 +
130053 +SDIO_STATUS SDLIB_FindTuple(PSDDEVICE  pDevice,
130054 +                        UINT8      Tuple,
130055 +                        UINT32     *pTupleScanAddress,
130056 +                        PUINT8     pBuffer,
130057 +                        UINT8      *pLength);
130058 +
130059 +SDIO_STATUS SDLIB_IssueConfig(PSDDEVICE        pDevice,
130060 +                              SDCONFIG_COMMAND Command,
130061 +                              PVOID            pData,
130062 +                              INT              Length);
130063 +
130064 +SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
130065 +                                       UINT16           BlockSize);
130066 +
130067 +void SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length,PTEXT pDescription);
130068 +
130069 +SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent);
130070 +
130071 +PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength);
130072 +
130073 +void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue);
130074 +
130075 +SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength);
130076 +
130077 +SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength);
130078 +#endif /* CTSYSTEM_NO_FUNCTION_PROXIES */
130079 +
130080 +
130081 +SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
130082 +                           PHELPER_FUNCTION pFunction,
130083 +                           PVOID            pContext);
130084 +
130085 +void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper);
130086 +
130087 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
130088 +  @function: Check message queue is empty
130089 +
130090 +  @function name: SDLIB_IsQueueEmpty
130091 +  @prototype: BOOL SDLIB_IsQueueEmpty(PSDMESSAGE_QUEUE pQueue)
130092 +  @category: Support_Reference
130093 +
130094 +  @input: pQueue - message queue to check
130095 +
130096 +  @return: TRUE if empty else false
130097 +
130098 +  @see also: SDLIB_CreateMessageQueue
130099 +
130100 +  @example: Check message queue :
130101 +              if (SDLIB_IsQueueEmpty(pInstance->pQueue)) {
130102 +                   .. message queue is empty
130103 +              }
130104 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
130105 +static INLINE BOOL SDLIB_IsQueueEmpty(PSDMESSAGE_QUEUE pQueue) {
130106 +    return SDLIST_IS_EMPTY(&pQueue->MessageList);
130107 +}
130108 +
130109 +
130110 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
130111 +  @function: Issue an I/O abort request
130112 +
130113 +  @function name: SDLIB_IssueIOAbort
130114 +  @prototype: SDIO_STATUS SDLIB_IssueIOAbort(PSDDEVICE pDevice)
130115 +  @category: PD_Reference
130116 +
130117 +  @input: pDevice - the device that is the target of this request
130118 +
130119 +  @return: SDIO_STATUS
130120 +
130121 +  @notes: This procedure can be called to issue an I/O abort request to an I/O function.
130122 +          This procedure cannot be used to abort a data (block) transfer already in progress.
130123 +          It is intended to be used when a data (block) transfer completes with an error and only if
130124 +          the I/O function requires an abort action.  Some I/O functions may automatically
130125 +          recover from such failures and not require this action. This function issues
130126 +          the abort command synchronously and can potentially block.
130127 +          If an async request is required, you must allocate a request and use
130128 +          SDLIB_SetupIOAbortAsync() to prepare the request.
130129 +
130130 +  @example: Issuing I/O Abort synchronously :
130131 +              .. check status from last block operation:
130132 +              if (status == SDIO_STATUS_BUS_READ_TIMEOUT) {
130133 +                   .. on failure, issue I/O abort
130134 +                   status2 = SDLIB_IssueIOAbort(pDevice);
130135 +              }
130136 +            Issuing I/O Abort asynchronously:
130137 +                ... allocate a request
130138 +                ... setup the request:
130139 +                 SDLIB_SetupIOAbortAsync(pDevice,pReq);
130140 +                 pReq->pCompletion = myIOAbortCompletion;
130141 +                 pReq->pCompleteContext = pDevice;
130142 +                 status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
130143 +
130144 +   @see also: SDLIB_SetupIOAbortAsync
130145 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
130146 +static INLINE SDIO_STATUS SDLIB_IssueIOAbort(PSDDEVICE pDevice) {
130147 +    UINT8 value = SDDEVICE_GET_SDIO_FUNCNO(pDevice);
130148 +    return Cmd52WriteByteCommon(pDevice,0x06,&value);
130149 +}
130150 +
130151 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
130152 +  @function: Setup an I/O abort request for async operation
130153 +
130154 +  @function name: SDLIB_SetupIOAbortAsync
130155 +  @prototype: SDLIB_SetupIOAbortAsync(PSDDEVICE pDevice, PSDREQUEST pRequest)
130156 +  @category: PD_Reference
130157 +
130158 +  @input: pDevice - the device that is the target of this request
130159 +          pRequest - the request to set up
130160 +
130161 +  @see also: SDLIB_IssueIOAbort
130162 +
130163 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
130164 +#define SDLIB_SetupIOAbortAsync(pDevice, pReq) \
130165 +        SDLIB_SetupCMD52RequestAsync(0,0x06,TRUE,SDDEVICE_GET_SDIO_FUNCNO(pDevice),(pReq))
130166 +
130167 +
130168 +#endif /* __SDIO_LIB_H___*/
130169 Index: linux-2.6.24.7/include/linux/sdio/sdlist.h
130170 ===================================================================
130171 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
130172 +++ linux-2.6.24.7/include/linux/sdio/sdlist.h  2008-12-11 22:46:49.000000000 +0100
130173 @@ -0,0 +1,141 @@
130174 +/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
130175 +@file: sdlist.h
130176 +
130177 +@abstract: OS independent list functions
130178 +
130179 +@notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
130180 +
130181 +
130182 + *
130183 + *  This program is free software; you can redistribute it and/or modify
130184 + *  it under the terms of the GNU General Public License version 2 as
130185 + *  published by the Free Software Foundation;
130186 + *
130187 + *  Software distributed under the License is distributed on an "AS
130188 + *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
130189 + *  implied. See the License for the specific language governing
130190 + *  rights and limitations under the License.
130191 + *
130192 + *  Portions of this code were developed with information supplied from the
130193 + *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
130194 + *
130195 + *   The following conditions apply to the release of the SD simplified specification (�Simplified
130196 + *   Specification�) by the SD Card Association. The Simplified Specification is a subset of the complete
130197 + *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
130198 + *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
130199 + *   Specification may require a license from the SD Card Association or other third parties.
130200 + *   Disclaimers:
130201 + *   The information contained in the Simplified Specification is presented only as a standard
130202 + *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
130203 + *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
130204 + *   any damages, any infringements of patents or other right of the SD Card Association or any third
130205 + *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
130206 + *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
130207 + *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
130208 + *   information, know-how or other confidential information to any third party.
130209 + *
130210 + *
130211 + *  The initial developers of the original code are Seung Yi and Paul Lever
130212 + *
130213 + *  sdio@atheros.com
130214 + *
130215 + *
130216 +
130217 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
130218 +#ifndef __SDLIST_H___
130219 +#define __SDLIST_H___
130220 +
130221 +/* list functions */
130222 +/* pointers for the list */
130223 +typedef struct _SDLIST {
130224 +    struct _SDLIST *pPrev;
130225 +    struct _SDLIST *pNext;
130226 +}SDLIST, *PSDLIST;
130227 +/*
130228 + * SDLIST_INIT , circular list
130229 +*/
130230 +#define SDLIST_INIT(pList)\
130231 +    {(pList)->pPrev = pList; (pList)->pNext = pList;}
130232 +#define SDLIST_INIT_DECLARE(List)\
130233 +    SDLIST List =   {&List, &List}
130234 +
130235 +
130236 +#define SDLIST_IS_EMPTY(pList) (((pList)->pPrev == (pList)) && ((pList)->pNext == (pList)))
130237 +#define SDLIST_GET_ITEM_AT_HEAD(pList) (pList)->pNext
130238 +#define SDLIST_GET_ITEM_AT_TAIL(pList) (pList)->pPrev
130239 +/*
130240 + * SDITERATE_OVER_LIST pStart is the list, pTemp is a temp list member
130241 + * NOT: do not use this function if the items in the list are deleted inside the
130242 + * iteration loop
130243 +*/
130244 +#define SDITERATE_OVER_LIST(pStart, pTemp) \
130245 +    for((pTemp) =(pStart)->pNext; pTemp != (pStart); (pTemp) = (pTemp)->pNext)
130246 +
130247 +
130248 +/* safe iterate macro that allows the item to be removed from the list
130249 + * the iteration continues to the next item in the list
130250 + */
130251 +#define SDITERATE_OVER_LIST_ALLOW_REMOVE(pStart,pItem,st,offset)  \
130252 +{                                                       \
130253 +    PSDLIST  pTemp;                                     \
130254 +    pTemp = (pStart)->pNext;                            \
130255 +    while (pTemp != (pStart)) {                         \
130256 +        (pItem) = CONTAINING_STRUCT(pTemp,st,offset);   \
130257 +         pTemp = pTemp->pNext;                          \
130258 +
130259 +#define SDITERATE_END }}
130260 +
130261 +/*
130262 + * SDListInsertTail - insert pAdd to the end of the list
130263 +*/
130264 +static INLINE PSDLIST SDListInsertTail(PSDLIST pList, PSDLIST pAdd) {
130265 +        /* this assert catches when an item is added twice */
130266 +    DBG_ASSERT(pAdd->pNext != pList);
130267 +        /* insert at tail */
130268 +    pAdd->pPrev = pList->pPrev;
130269 +    pAdd->pNext = pList;
130270 +    pList->pPrev->pNext = pAdd;
130271 +    pList->pPrev = pAdd;
130272 +    return pAdd;
130273 +}
130274 +
130275 +/*
130276 + * SDListInsertHead - insert pAdd into the head of the list
130277 +*/
130278 +static INLINE PSDLIST SDListInsertHead(PSDLIST pList, PSDLIST pAdd) {
130279 +        /* this assert catches when an item is added twice */
130280 +    DBG_ASSERT(pAdd->pPrev != pList);
130281 +        /* insert at head */
130282 +    pAdd->pPrev = pList;
130283 +    pAdd->pNext = pList->pNext;
130284 +    pList->pNext->pPrev = pAdd;
130285 +    pList->pNext = pAdd;
130286 +    return pAdd;
130287 +}
130288 +
130289 +#define SDListAdd(pList,pItem) SDListInsertHead((pList),(pItem))
130290 +/*
130291 + * SDListRemove - remove pDel from list
130292 +*/
130293 +static INLINE PSDLIST SDListRemove(PSDLIST pDel) {
130294 +    pDel->pNext->pPrev = pDel->pPrev;
130295 +    pDel->pPrev->pNext = pDel->pNext;
130296 +        /* point back to itself just to be safe, incase remove is called again */
130297 +    pDel->pNext = pDel;
130298 +    pDel->pPrev = pDel;
130299 +    return pDel;
130300 +}
130301 +
130302 +/*
130303 + * SDListRemoveItemFromHead - get a list item from the head
130304 +*/
130305 +static INLINE PSDLIST SDListRemoveItemFromHead(PSDLIST pList) {
130306 +    PSDLIST pItem = NULL;
130307 +    if (pList->pNext != pList) {
130308 +        pItem = pList->pNext;
130309 +            /* remove the first item from head */
130310 +        SDListRemove(pItem);
130311 +    }
130312 +    return pItem;
130313 +}
130314 +#endif /* __SDLIST_H___ */
130315 Index: linux-2.6.24.7/include/linux/spi/glamo.h
130316 ===================================================================
130317 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
130318 +++ linux-2.6.24.7/include/linux/spi/glamo.h    2008-12-11 22:46:49.000000000 +0100
130319 @@ -0,0 +1,28 @@
130320 +#ifndef __GLAMO_SPI_H
130321 +#define __GLAMO_SPI_H
130322 +
130323 +#include <linux/glamo-gpio.h>
130324 +
130325 +struct spi_board_info;
130326 +struct glamofb_handle;
130327 +struct glamo_core;
130328 +
130329 +struct glamo_spi_info {
130330 +       unsigned long           board_size;
130331 +       struct spi_board_info   *board_info;
130332 +       struct glamofb_handle   *glamofb_handle;
130333 +};
130334 +
130335 +struct glamo_spigpio_info {
130336 +       unsigned int            pin_clk;
130337 +       unsigned int            pin_mosi;
130338 +       unsigned int            pin_miso;
130339 +       unsigned int            pin_cs;
130340 +
130341 +       unsigned int            board_size;
130342 +       struct spi_board_info   *board_info;
130343 +       struct glamo_core       *glamo;
130344 +};
130345 +
130346 +
130347 +#endif
130348 Index: linux-2.6.24.7/include/linux/suspend.h
130349 ===================================================================
130350 --- linux-2.6.24.7.orig/include/linux/suspend.h 2008-12-11 22:46:07.000000000 +0100
130351 +++ linux-2.6.24.7/include/linux/suspend.h      2008-12-11 22:46:49.000000000 +0100
130352 @@ -122,6 +122,12 @@ struct pbe {
130353         struct pbe *next;
130354  };
130355
130356 +/**
130357 + * global indication we are somewhere between start of suspend and end of
130358 + * resume, nonzero is true
130359 + */
130360 +extern int global_inside_suspend;
130361 +
130362  /* mm/page_alloc.c */
130363  extern void drain_local_pages(void);
130364  extern void mark_free_pages(struct zone *zone);
130365 Index: linux-2.6.24.7/include/linux/time.h
130366 ===================================================================
130367 --- linux-2.6.24.7.orig/include/linux/time.h    2008-12-11 22:46:10.000000000 +0100
130368 +++ linux-2.6.24.7/include/linux/time.h 2008-12-11 22:48:46.000000000 +0100
130369 @@ -181,6 +181,10 @@ static inline void timespec_add_ns(struc
130370                  * optimising this loop into a modulo operation.  */
130371                 asm("" : "+r"(ns));
130372
130373 +               /* The following asm() prevents the compiler from
130374 +                * optimising this loop into a modulo operation.  */
130375 +               asm("" : "+r"(ns));
130376 +
130377                 ns -= NSEC_PER_SEC;
130378                 a->tv_sec++;
130379         }
130380 Index: linux-2.6.24.7/include/linux/vt.h
130381 ===================================================================
130382 --- linux-2.6.24.7.orig/include/linux/vt.h      2008-12-11 22:46:07.000000000 +0100
130383 +++ linux-2.6.24.7/include/linux/vt.h   2008-12-11 22:46:49.000000000 +0100
130384 @@ -18,8 +18,19 @@ extern int unregister_vt_notifier(struct
130385   * resizing).
130386   */
130387  #define MIN_NR_CONSOLES 1       /* must be at least 1 */
130388 +#if (CONFIG_NR_TTY_DEVICES < 4)
130389 +/* Lower Limit */
130390 +#define MAX_NR_CONSOLES        4       /* serial lines start at 64 */
130391 +#define MAX_NR_USER_CONSOLES 4 /* must be root to allocate above this */
130392 +#elif (CONFIG_NR_TTY_DEVICES > 63)
130393 +/* Upper Limit */
130394  #define MAX_NR_CONSOLES        63      /* serial lines start at 64 */
130395  #define MAX_NR_USER_CONSOLES 63        /* must be root to allocate above this */
130396 +#else
130397 +/* They chose a sensible number */
130398 +#define MAX_NR_CONSOLES CONFIG_NR_TTY_DEVICES
130399 +#define MAX_NR_USER_CONSOLES CONFIG_NR_TTY_DEVICES
130400 +#endif
130401                 /* Note: the ioctl VT_GETSTATE does not work for
130402                    consoles 16 and higher (since it returns a short) */
130403
130404 Index: linux-2.6.24.7/include/sound/soc-dapm.h
130405 ===================================================================
130406 --- linux-2.6.24.7.orig/include/sound/soc-dapm.h        2008-12-11 22:46:07.000000000 +0100
130407 +++ linux-2.6.24.7/include/sound/soc-dapm.h     2008-12-11 22:46:49.000000000 +0100
130408 @@ -206,6 +206,8 @@ int snd_soc_dapm_sys_add(struct device *
130409  /* dapm audio endpoint control */
130410  int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec,
130411         char *pin, int status);
130412 +int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec,
130413 +       char *pin);
130414  int snd_soc_dapm_sync_endpoints(struct snd_soc_codec *codec);
130415
130416  /* dapm widget types */
130417 Index: linux-2.6.24.7/include/sound/soc.h
130418 ===================================================================
130419 --- linux-2.6.24.7.orig/include/sound/soc.h     2008-12-11 22:46:07.000000000 +0100
130420 +++ linux-2.6.24.7/include/sound/soc.h  2008-12-11 22:46:49.000000000 +0100
130421 @@ -410,6 +410,9 @@ struct snd_soc_dai_link  {
130422
130423         /* codec/machine specific init - e.g. add machine controls */
130424         int (*init)(struct snd_soc_codec *codec);
130425 +
130426 +       /* DAI pcm */
130427 +       struct snd_pcm *pcm;
130428  };
130429
130430  /* SoC machine */
130431 @@ -439,6 +442,7 @@ struct snd_soc_device {
130432         struct snd_soc_codec *codec;
130433         struct snd_soc_codec_device *codec_dev;
130434         struct delayed_work delayed_work;
130435 +       struct work_struct deferred_resume_work;
130436         void *codec_data;
130437  };
130438
130439 Index: linux-2.6.24.7/kernel/power/main.c
130440 ===================================================================
130441 --- linux-2.6.24.7.orig/kernel/power/main.c     2008-12-11 22:46:07.000000000 +0100
130442 +++ linux-2.6.24.7/kernel/power/main.c  2008-12-11 22:46:49.000000000 +0100
130443 @@ -31,6 +31,10 @@ DEFINE_MUTEX(pm_mutex);
130444  unsigned int pm_flags;
130445  EXPORT_SYMBOL(pm_flags);
130446
130447 +int global_inside_suspend;
130448 +EXPORT_SYMBOL(global_inside_suspend);
130449 +
130450 +
130451  #ifdef CONFIG_SUSPEND
130452
130453  /* This is just an arbitrary number */
130454 @@ -156,10 +160,12 @@ int suspend_devices_and_enter(suspend_st
130455         if (!suspend_ops)
130456                 return -ENOSYS;
130457
130458 +       global_inside_suspend = 1;
130459 +
130460         if (suspend_ops->set_target) {
130461                 error = suspend_ops->set_target(state);
130462                 if (error)
130463 -                       return error;
130464 +                       goto bail;
130465         }
130466         suspend_console();
130467         error = device_suspend(PMSG_SUSPEND);
130468 @@ -183,6 +189,8 @@ int suspend_devices_and_enter(suspend_st
130469         device_resume();
130470   Resume_console:
130471         resume_console();
130472 +bail:
130473 +       global_inside_suspend = 0;
130474         return error;
130475  }
130476
130477 Index: linux-2.6.24.7/kernel/printk.c
130478 ===================================================================
130479 --- linux-2.6.24.7.orig/kernel/printk.c 2008-12-11 22:46:07.000000000 +0100
130480 +++ linux-2.6.24.7/kernel/printk.c      2008-12-11 22:46:49.000000000 +0100
130481 @@ -33,8 +33,11 @@
130482  #include <linux/bootmem.h>
130483  #include <linux/syscalls.h>
130484  #include <linux/jiffies.h>
130485 +#include <linux/suspend.h>
130486
130487  #include <asm/uaccess.h>
130488 +#include <asm/plat-s3c24xx/neo1973.h>
130489 +#include <asm/arch/gta02.h>
130490
130491  #define __LOG_BUF_LEN  (1 << CONFIG_LOG_BUF_SHIFT)
130492
130493 @@ -61,6 +64,12 @@ int console_printk[4] = {
130494  int oops_in_progress;
130495  EXPORT_SYMBOL(oops_in_progress);
130496
130497 +void (*printk_emergency_debug_spew_init)(void) = NULL;
130498 +EXPORT_SYMBOL(printk_emergency_debug_spew_init);
130499 +
130500 +void (*printk_emergency_debug_spew_send_string)(const char *) = NULL;
130501 +EXPORT_SYMBOL(printk_emergency_debug_spew_send_string);
130502 +
130503  /*
130504   * console_sem protects the console_drivers list, and also
130505   * provides serialisation for access to the entire console
130506 @@ -653,6 +662,38 @@ asmlinkage int vprintk(const char *fmt,
130507         /* Emit the output into the temporary buffer */
130508         printed_len = vscnprintf(printk_buf, sizeof(printk_buf), fmt, args);
130509
130510 +       /* if you're debugging resume, the normal methods can change resume
130511 +        * ordering behaviours because their debugging output is synchronous
130512 +        * (ie, CONFIG_DEBUG_LL).  If your problem is an OOPS, this code
130513 +        * will not affect the speed and duration and ordering of resume
130514 +        * actions, but will give you a chance to read the full undumped
130515 +        * syslog AND the OOPS data when it happens
130516 +        *
130517 +        * if you support it, your debug device init can override the exported
130518 +        * emergency_debug_spew_init and emergency_debug_spew_send_string to
130519 +        * usually force polling or bitbanging on your debug console device
130520 +        */
130521 +       if (oops_in_progress && global_inside_suspend &&
130522 +           printk_emergency_debug_spew_init &&
130523 +           printk_emergency_debug_spew_send_string) {
130524 +               unsigned long cur_index;
130525 +               char ch[2];
130526 +
130527 +               if (global_inside_suspend == 1) {
130528 +                       (printk_emergency_debug_spew_init)();
130529 +
130530 +                       ch[1] = '\0';
130531 +                       cur_index = con_start;
130532 +                       while (cur_index != log_end) {
130533 +                               ch[0] = LOG_BUF(cur_index);
130534 +                               (printk_emergency_debug_spew_send_string)(ch);
130535 +                               cur_index++;
130536 +                       }
130537 +                       global_inside_suspend++; /* only once */
130538 +               }
130539 +               (printk_emergency_debug_spew_send_string)(printk_buf);
130540 +       }
130541 +
130542         /*
130543          * Copy the output into log_buf.  If the caller didn't provide
130544          * appropriate log level tags, we insert them here
130545 Index: linux-2.6.24.7/MAINTAINERS
130546 ===================================================================
130547 --- linux-2.6.24.7.orig/MAINTAINERS     2008-12-11 22:46:07.000000000 +0100
130548 +++ linux-2.6.24.7/MAINTAINERS  2008-12-11 22:46:49.000000000 +0100
130549 @@ -1536,6 +1536,14 @@ P:       Akinobu Mita
130550  M:     akinobu.mita@gmail.com
130551  S:     Supported
130552
130553 +FIC/OPENMOKO NEO1973 GSM PHONE
130554 +P:     Harald Welte
130555 +M:     laforge@openmoko.org
130556 +L:     openmoko-kernel@lists.openmoko.org
130557 +W:     http://wiki.openmoko.org/wiki/Kernel
130558 +W:     http://wiki.openmoko.org/wiki/Neo1973
130559 +S:     Maintained
130560 +
130561  FRAMEBUFFER LAYER
130562  P:     Antonino Daplas
130563  M:     adaplas@gmail.com
130564 Index: linux-2.6.24.7/makerecovery
130565 ===================================================================
130566 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
130567 +++ linux-2.6.24.7/makerecovery 2008-12-11 22:46:49.000000000 +0100
130568 @@ -0,0 +1,17 @@
130569 +#!/bin/sh
130570 +#
130571 +# make 6MB recovery image from two moredrivers type kernels
130572 +# placed at start and at +4MBytes
130573 +
130574 +if [ -z "$1" ] ; then
130575 + echo "Usage: $0 uImage-moredrivers-..."
130576 + exit 1
130577 +fi
130578 +cat $1 > recovery-$1
130579 +SIZE=`ls -l $1 | tr -s ' ' ' ' | cut -d' ' -f5`
130580 +SPACE=$(( 4 * 1024 * 1024 - $SIZE ))
130581 +dd if=/dev/zero of=_spacer bs=1 count=$SPACE
130582 +cat _spacer >> recovery-$1
130583 +rm -f _spacer
130584 +cat $1 >> recovery-$1
130585 +
130586 Index: linux-2.6.24.7/remote_install_sdcard
130587 ===================================================================
130588 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
130589 +++ linux-2.6.24.7/remote_install_sdcard        2008-12-11 22:46:49.000000000 +0100
130590 @@ -0,0 +1,20 @@
130591 +#!/bin/sh
130592 +
130593 +# automatic kernel updater and reboot - Andy Green <andy@openmoko.com>
130594 +
130595 +GTA_DEVICE_IP=192.168.0.202
130596 +GTA_MOUNTPOINT=/mnt
130597 +
130598 +# you should set up key-based auth on dropbear if you want
130599 +# to play this game.
130600 +#
130601 +# 1) mkdir /home/root/.ssh
130602 +# 2) chown root:root / /home /home/root
130603 +# 3) chmod 700 /home/root /home/root/.ssh
130604 +# 4) copy your id_*.pub into /home/root/.ssh/authorized_keys
130605 +# 5) chmod 600 /home/root/.ssh/*
130606 +
130607 +ssh root@$GTA_DEVICE_IP "mount /dev/mmcblk0p1 $GTA_MOUNTPOINT"
130608 +scp uImage.bin root@$GTA_DEVICE_IP:$GTA_MOUNTPOINT
130609 +ssh root@$GTA_DEVICE_IP "umount $GTA_MOUNTPOINT ; mount /dev/mmcblk0p2 / -oremount,ro ; reboot -if &"
130610 +
130611 Index: linux-2.6.24.7/scripts/mkuboot.sh
130612 ===================================================================
130613 --- linux-2.6.24.7.orig/scripts/mkuboot.sh      2008-12-11 22:46:07.000000000 +0100
130614 +++ linux-2.6.24.7/scripts/mkuboot.sh   2008-12-11 22:46:49.000000000 +0100
130615 @@ -11,7 +11,7 @@ if [ -z "${MKIMAGE}" ]; then
130616         if [ -z "${MKIMAGE}" ]; then
130617                 # Doesn't exist
130618                 echo '"mkimage" command not found - U-Boot images will not be built' >&2
130619 -               exit 0;
130620 +               exit 1;
130621         fi
130622  fi
130623
130624 Index: linux-2.6.24.7/sound/soc/codecs/wm8753.c
130625 ===================================================================
130626 --- linux-2.6.24.7.orig/sound/soc/codecs/wm8753.c       2008-12-11 22:46:07.000000000 +0100
130627 +++ linux-2.6.24.7/sound/soc/codecs/wm8753.c    2008-12-11 22:46:49.000000000 +0100
130628 @@ -198,6 +198,7 @@ static const char *wm8753_mic_sel[] = {"
130629  static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
130630  static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
130631         "Channel Swap"};
130632 +static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
130633
130634  static const struct soc_enum wm8753_enum[] = {
130635  SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
130636 @@ -228,6 +229,7 @@ SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753
130637  SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
130638  SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
130639  SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
130640 +SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
130641  };
130642
130643
130644 @@ -277,7 +279,7 @@ SOC_DOUBLE_R("Speaker Playback ZC Switch
130645
130646  SOC_SINGLE("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1),
130647  SOC_SINGLE("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1),
130648 -SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 4, 7, 1),
130649 +SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1),
130650  SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
130651
130652  SOC_ENUM("Bass Boost", wm8753_enum[0]),
130653 @@ -328,6 +330,7 @@ SOC_SINGLE("Mic1 Capture Volume", WM8753
130654  SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
130655
130656  SOC_ENUM("ADC Data Select", wm8753_enum[27]),
130657 +SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
130658  };
130659
130660  /* add non dapm controls */
130661 @@ -1582,6 +1585,9 @@ static int wm8753_init(struct snd_soc_de
130662         schedule_delayed_work(&codec->delayed_work,
130663                 msecs_to_jiffies(caps_charge));
130664
130665 +       /* Fix reg WM8753_ADCTL2 */
130666 +       wm8753_write(codec, WM8753_ADCTL2, 0x0000);
130667 +
130668         /* set the update bits */
130669         reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
130670         wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
130671 Index: linux-2.6.24.7/sound/soc/s3c24xx/Kconfig
130672 ===================================================================
130673 --- linux-2.6.24.7.orig/sound/soc/s3c24xx/Kconfig       2008-12-11 22:46:07.000000000 +0100
130674 +++ linux-2.6.24.7/sound/soc/s3c24xx/Kconfig    2008-12-11 22:46:49.000000000 +0100
130675 @@ -25,6 +25,21 @@ config SND_S3C24XX_SOC_NEO1973_WM8753
130676           Say Y if you want to add support for SoC audio on smdk2440
130677           with the WM8753.
130678
130679 +config SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG
130680 +       bool "SoC I2S Audio support for NEO1973 - WM8753 debug"
130681 +       depends on SND_S3C24XX_SOC_NEO1973_WM8753
130682 +       help
130683 +         Enable debugging output for the SoC I2S Audio code.
130684 +
130685 +config SND_S3C24XX_SOC_NEO1973_GTA02_WM8753
130686 +       tristate "SoC I2S Audio support for NEO1973 GTA02 - WM8753"
130687 +       depends on SND_S3C24XX_SOC && MACH_NEO1973_GTA02
130688 +       select SND_S3C24XX_SOC_I2S
130689 +       select SND_SOC_WM8753
130690 +       help
130691 +         Say Y if you want to add support for SoC audio on neo1973 gta02
130692 +         with the WM8753 codec
130693 +
130694  config SND_S3C24XX_SOC_SMDK2443_WM9710
130695         tristate "SoC AC97 Audio support for SMDK2443 - WM9710"
130696         depends on SND_S3C24XX_SOC && MACH_SMDK2443
130697 Index: linux-2.6.24.7/sound/soc/s3c24xx/Makefile
130698 ===================================================================
130699 --- linux-2.6.24.7.orig/sound/soc/s3c24xx/Makefile      2008-12-11 22:46:07.000000000 +0100
130700 +++ linux-2.6.24.7/sound/soc/s3c24xx/Makefile   2008-12-11 22:46:49.000000000 +0100
130701 @@ -10,6 +10,9 @@ obj-$(CONFIG_SND_S3C2443_SOC_AC97) += sn
130702  # S3C24XX Machine Support
130703  snd-soc-neo1973-wm8753-objs := neo1973_wm8753.o
130704  snd-soc-smdk2443-wm9710-objs := smdk2443_wm9710.o
130705 +snd-soc-neo1973-gta02-wm8753-objs := neo1973_gta02_wm8753.o
130706
130707  obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
130708  obj-$(CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710) += snd-soc-smdk2443-wm9710.o
130709 +obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753) += snd-soc-neo1973-gta02-wm8753.o
130710 +
130711 Index: linux-2.6.24.7/sound/soc/s3c24xx/neo1973_gta02_wm8753.c
130712 ===================================================================
130713 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
130714 +++ linux-2.6.24.7/sound/soc/s3c24xx/neo1973_gta02_wm8753.c     2008-12-11 22:46:49.000000000 +0100
130715 @@ -0,0 +1,667 @@
130716 +/*
130717 + * neo1973_gta02_wm8753.c  --  SoC audio for Neo1973
130718 + *
130719 + * Copyright 2007 Openmoko Inc
130720 + * Author: Graeme Gregory <graeme@openmoko.org>
130721 + * Copyright 2007 Wolfson Microelectronics PLC.
130722 + * Author: Graeme Gregory <linux@wolfsonmicro.com>
130723 + *
130724 + *  This program is free software; you can redistribute  it and/or modify it
130725 + *  under  the terms of  the GNU General  Public License as published by the
130726 + *  Free Software Foundation;  either version 2 of the  License, or (at your
130727 + *  option) any later version.
130728 + *
130729 + *  Revision history
130730 + *    06th Nov 2007   Changed from GTA01 to GTA02
130731 + *    20th Jan 2007   Initial version.
130732 + *    05th Feb 2007   Rename all to Neo1973
130733 + *
130734 + */
130735 +
130736 +#include <linux/module.h>
130737 +#include <linux/moduleparam.h>
130738 +#include <linux/timer.h>
130739 +#include <linux/interrupt.h>
130740 +#include <linux/platform_device.h>
130741 +#include <linux/i2c.h>
130742 +#include <sound/driver.h>
130743 +#include <sound/core.h>
130744 +#include <sound/pcm.h>
130745 +#include <sound/soc.h>
130746 +#include <sound/soc-dapm.h>
130747 +
130748 +#include <asm/mach-types.h>
130749 +#include <asm/hardware/scoop.h>
130750 +#include <asm/plat-s3c24xx/regs-iis.h>
130751 +#include <asm/arch/regs-clock.h>
130752 +#include <asm/arch/regs-gpio.h>
130753 +#include <asm/hardware.h>
130754 +#include <asm/arch/audio.h>
130755 +#include <asm/io.h>
130756 +#include <asm/arch/spi-gpio.h>
130757 +#include <asm/arch/regs-gpioj.h>
130758 +#include <asm/arch/gta02.h>
130759 +#include "../codecs/wm8753.h"
130760 +#include "s3c24xx-pcm.h"
130761 +#include "s3c24xx-i2s.h"
130762 +
130763 +/* define the scenarios */
130764 +#define NEO_AUDIO_OFF                  0
130765 +#define NEO_GSM_CALL_AUDIO_HANDSET     1
130766 +#define NEO_GSM_CALL_AUDIO_HEADSET     2
130767 +#define NEO_GSM_CALL_AUDIO_BLUETOOTH   3
130768 +#define NEO_STEREO_TO_SPEAKERS         4
130769 +#define NEO_STEREO_TO_HEADPHONES       5
130770 +#define NEO_CAPTURE_HANDSET            6
130771 +#define NEO_CAPTURE_HEADSET            7
130772 +#define NEO_CAPTURE_BLUETOOTH          8
130773 +#define NEO_STEREO_TO_HANDSET_SPK      9
130774 +
130775 +static struct snd_soc_machine neo1973_gta02;
130776 +
130777 +static int neo1973_gta02_hifi_hw_params(struct snd_pcm_substream *substream,
130778 +       struct snd_pcm_hw_params *params)
130779 +{
130780 +       struct snd_soc_pcm_runtime *rtd = substream->private_data;
130781 +       struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
130782 +       struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
130783 +       unsigned int pll_out = 0, bclk = 0;
130784 +       int ret = 0;
130785 +       unsigned long iis_clkrate;
130786 +
130787 +       iis_clkrate = s3c24xx_i2s_get_clockrate();
130788 +
130789 +       switch (params_rate(params)) {
130790 +       case 8000:
130791 +       case 16000:
130792 +               pll_out = 12288000;
130793 +               break;
130794 +       case 48000:
130795 +               bclk = WM8753_BCLK_DIV_4;
130796 +               pll_out = 12288000;
130797 +               break;
130798 +       case 96000:
130799 +               bclk = WM8753_BCLK_DIV_2;
130800 +               pll_out = 12288000;
130801 +               break;
130802 +       case 11025:
130803 +               bclk = WM8753_BCLK_DIV_16;
130804 +               pll_out = 11289600;
130805 +               break;
130806 +       case 22050:
130807 +               bclk = WM8753_BCLK_DIV_8;
130808 +               pll_out = 11289600;
130809 +               break;
130810 +       case 44100:
130811 +               bclk = WM8753_BCLK_DIV_4;
130812 +               pll_out = 11289600;
130813 +               break;
130814 +       case 88200:
130815 +               bclk = WM8753_BCLK_DIV_2;
130816 +               pll_out = 11289600;
130817 +               break;
130818 +       }
130819 +
130820 +       /* set codec DAI configuration */
130821 +       ret = codec_dai->dai_ops.set_fmt(codec_dai,
130822 +               SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
130823 +               SND_SOC_DAIFMT_CBM_CFM);
130824 +       if (ret < 0)
130825 +               return ret;
130826 +
130827 +       /* set cpu DAI configuration */
130828 +       ret = cpu_dai->dai_ops.set_fmt(cpu_dai,
130829 +               SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
130830 +               SND_SOC_DAIFMT_CBM_CFM);
130831 +       if (ret < 0)
130832 +               return ret;
130833 +
130834 +       /* set the codec system clock for DAC and ADC */
130835 +       ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_MCLK, pll_out,
130836 +               SND_SOC_CLOCK_IN);
130837 +       if (ret < 0)
130838 +               return ret;
130839 +
130840 +       /* set MCLK division for sample rate */
130841 +       ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_MCLK,
130842 +               S3C2410_IISMOD_32FS );
130843 +       if (ret < 0)
130844 +               return ret;
130845 +
130846 +       /* set codec BCLK division for sample rate */
130847 +       ret = codec_dai->dai_ops.set_clkdiv(codec_dai,
130848 +                                       WM8753_BCLKDIV, bclk);
130849 +       if (ret < 0)
130850 +               return ret;
130851 +
130852 +       /* set prescaler division for sample rate */
130853 +       ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, S3C24XX_DIV_PRESCALER,
130854 +               S3C24XX_PRESCALE(4,4));
130855 +       if (ret < 0)
130856 +               return ret;
130857 +
130858 +       /* codec PLL input is PCLK/4 */
130859 +       ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1,
130860 +               iis_clkrate / 4, pll_out);
130861 +       if (ret < 0)
130862 +               return ret;
130863 +
130864 +       return 0;
130865 +}
130866 +
130867 +static int neo1973_gta02_hifi_hw_free(struct snd_pcm_substream *substream)
130868 +{
130869 +       struct snd_soc_pcm_runtime *rtd = substream->private_data;
130870 +       struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
130871 +
130872 +       /* disable the PLL */
130873 +       return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, 0, 0);
130874 +}
130875 +
130876 +/*
130877 + * Neo1973 WM8753 HiFi DAI opserations.
130878 + */
130879 +static struct snd_soc_ops neo1973_gta02_hifi_ops = {
130880 +       .hw_params = neo1973_gta02_hifi_hw_params,
130881 +       .hw_free = neo1973_gta02_hifi_hw_free,
130882 +};
130883 +
130884 +static int neo1973_gta02_voice_hw_params(
130885 +       struct snd_pcm_substream *substream,
130886 +       struct snd_pcm_hw_params *params)
130887 +{
130888 +       struct snd_soc_pcm_runtime *rtd = substream->private_data;
130889 +       struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
130890 +       unsigned int pcmdiv = 0;
130891 +       int ret = 0;
130892 +       unsigned long iis_clkrate;
130893 +
130894 +       iis_clkrate = s3c24xx_i2s_get_clockrate();
130895 +
130896 +       if (params_rate(params) != 8000)
130897 +               return -EINVAL;
130898 +       if (params_channels(params) != 1)
130899 +               return -EINVAL;
130900 +
130901 +       pcmdiv = WM8753_PCM_DIV_6; /* 2.048 MHz */
130902 +
130903 +       /* todo: gg check mode (DSP_B) against CSR datasheet */
130904 +       /* set codec DAI configuration */
130905 +       ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B |
130906 +               SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
130907 +       if (ret < 0)
130908 +               return ret;
130909 +
130910 +       /* set the codec system clock for DAC and ADC */
130911 +       ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8753_PCMCLK,
130912 +               12288000, SND_SOC_CLOCK_IN);
130913 +       if (ret < 0)
130914 +               return ret;
130915 +
130916 +       /* set codec PCM division for sample rate */
130917 +       ret = codec_dai->dai_ops.set_clkdiv(codec_dai, WM8753_PCMDIV,
130918 +                                       pcmdiv);
130919 +       if (ret < 0)
130920 +               return ret;
130921 +
130922 +       /* configue and enable PLL for 12.288MHz output */
130923 +       ret = codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2,
130924 +               iis_clkrate / 4, 12288000);
130925 +       if (ret < 0)
130926 +               return ret;
130927 +
130928 +       return 0;
130929 +}
130930 +
130931 +static int neo1973_gta02_voice_hw_free(struct snd_pcm_substream *substream)
130932 +{
130933 +       struct snd_soc_pcm_runtime *rtd = substream->private_data;
130934 +       struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
130935 +
130936 +       /* disable the PLL */
130937 +       return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, 0, 0);
130938 +}
130939 +
130940 +static struct snd_soc_ops neo1973_gta02_voice_ops = {
130941 +       .hw_params = neo1973_gta02_voice_hw_params,
130942 +       .hw_free = neo1973_gta02_voice_hw_free,
130943 +};
130944 +
130945 +#define LM4853_AMP 1
130946 +#define LM4853_SPK 2
130947 +
130948 +static u8 lm4853_state=0;
130949 +
130950 +static int lm4853_set_state(struct snd_kcontrol *kcontrol,
130951 +       struct snd_ctl_elem_value *ucontrol)
130952 +{
130953 +       int val = ucontrol->value.integer.value[0];
130954 +
130955 +       if(val) {
130956 +               lm4853_state |= LM4853_AMP;
130957 +               s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,0);
130958 +       } else {
130959 +               lm4853_state &= ~LM4853_AMP;
130960 +               s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT,1);
130961 +       }
130962 +
130963 +       return 0;
130964 +}
130965 +
130966 +static int lm4853_get_state(struct snd_kcontrol *kcontrol,
130967 +       struct snd_ctl_elem_value *ucontrol)
130968 +{
130969 +       ucontrol->value.integer.value[0] = lm4853_state & LM4853_AMP;
130970 +
130971 +       return 0;
130972 +}
130973 +
130974 +static int lm4853_set_spk(struct snd_kcontrol *kcontrol,
130975 +       struct snd_ctl_elem_value *ucontrol)
130976 +{
130977 +       int val = ucontrol->value.integer.value[0];
130978 +
130979 +       if(val) {
130980 +               lm4853_state |= LM4853_SPK;
130981 +               s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,0);
130982 +       } else {
130983 +               lm4853_state &= ~LM4853_SPK;
130984 +               s3c2410_gpio_setpin(GTA02_GPIO_HP_IN,1);
130985 +       }
130986 +
130987 +       return 0;
130988 +}
130989 +
130990 +static int lm4853_get_spk(struct snd_kcontrol *kcontrol,
130991 +       struct snd_ctl_elem_value *ucontrol)
130992 +{
130993 +       ucontrol->value.integer.value[0] = (lm4853_state & LM4853_SPK) >> 1;
130994 +
130995 +       return 0;
130996 +}
130997 +
130998 +static int neo1973_gta02_set_stereo_out(struct snd_kcontrol *kcontrol,
130999 +       struct snd_ctl_elem_value *ucontrol)
131000 +{
131001 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131002 +       int val = ucontrol->value.integer.value[0];
131003 +
131004 +       snd_soc_dapm_set_endpoint(codec, "Stereo Out", val);
131005 +
131006 +       snd_soc_dapm_sync_endpoints(codec);
131007 +
131008 +       return 0;
131009 +}
131010 +
131011 +static int neo1973_gta02_get_stereo_out(struct snd_kcontrol *kcontrol,
131012 +       struct snd_ctl_elem_value *ucontrol)
131013 +{
131014 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131015 +
131016 +       ucontrol->value.integer.value[0] =
131017 +               snd_soc_dapm_get_endpoint(codec, "Stereo Out");
131018 +
131019 +       return 0;
131020 +}
131021 +
131022 +
131023 +static int neo1973_gta02_set_gsm_out(struct snd_kcontrol *kcontrol,
131024 +       struct snd_ctl_elem_value *ucontrol)
131025 +{
131026 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131027 +       int val = ucontrol->value.integer.value[0];
131028 +
131029 +       snd_soc_dapm_set_endpoint(codec, "GSM Line Out", val);
131030 +
131031 +       snd_soc_dapm_sync_endpoints(codec);
131032 +
131033 +       return 0;
131034 +}
131035 +
131036 +static int neo1973_gta02_get_gsm_out(struct snd_kcontrol *kcontrol,
131037 +       struct snd_ctl_elem_value *ucontrol)
131038 +{
131039 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131040 +
131041 +       ucontrol->value.integer.value[0] =
131042 +               snd_soc_dapm_get_endpoint(codec, "GSM Line Out");
131043 +
131044 +       return 0;
131045 +}
131046 +
131047 +static int neo1973_gta02_set_gsm_in(struct snd_kcontrol *kcontrol,
131048 +       struct snd_ctl_elem_value *ucontrol)
131049 +{
131050 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131051 +       int val = ucontrol->value.integer.value[0];
131052 +
131053 +       snd_soc_dapm_set_endpoint(codec, "GSM Line In", val);
131054 +
131055 +       snd_soc_dapm_sync_endpoints(codec);
131056 +
131057 +       return 0;
131058 +}
131059 +
131060 +static int neo1973_gta02_get_gsm_in(struct snd_kcontrol *kcontrol,
131061 +       struct snd_ctl_elem_value *ucontrol)
131062 +{
131063 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131064 +
131065 +       ucontrol->value.integer.value[0] =
131066 +               snd_soc_dapm_get_endpoint(codec, "GSM Line In");
131067 +
131068 +       return 0;
131069 +}
131070 +
131071 +static int neo1973_gta02_set_headset_mic(struct snd_kcontrol *kcontrol,
131072 +       struct snd_ctl_elem_value *ucontrol)
131073 +{
131074 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131075 +       int val = ucontrol->value.integer.value[0];
131076 +
131077 +       snd_soc_dapm_set_endpoint(codec, "Headset Mic", val);
131078 +
131079 +       snd_soc_dapm_sync_endpoints(codec);
131080 +
131081 +       return 0;
131082 +}
131083 +
131084 +static int neo1973_gta02_get_headset_mic(struct snd_kcontrol *kcontrol,
131085 +       struct snd_ctl_elem_value *ucontrol)
131086 +{
131087 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131088 +
131089 +       ucontrol->value.integer.value[0] =
131090 +               snd_soc_dapm_get_endpoint(codec, "Headset Mic");
131091 +
131092 +       return 0;
131093 +}
131094 +
131095 +static int neo1973_gta02_set_handset_mic(struct snd_kcontrol *kcontrol,
131096 +       struct snd_ctl_elem_value *ucontrol)
131097 +{
131098 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131099 +       int val = ucontrol->value.integer.value[0];
131100 +
131101 +       snd_soc_dapm_set_endpoint(codec, "Handset Mic", val);
131102 +
131103 +       snd_soc_dapm_sync_endpoints(codec);
131104 +
131105 +       return 0;
131106 +}
131107 +
131108 +static int neo1973_gta02_get_handset_mic(struct snd_kcontrol *kcontrol,
131109 +       struct snd_ctl_elem_value *ucontrol)
131110 +{
131111 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131112 +
131113 +       ucontrol->value.integer.value[0] =
131114 +               snd_soc_dapm_get_endpoint(codec, "Handset Mic");
131115 +
131116 +       return 0;
131117 +}
131118 +
131119 +static int neo1973_gta02_set_handset_spk(struct snd_kcontrol *kcontrol,
131120 +       struct snd_ctl_elem_value *ucontrol)
131121 +{
131122 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131123 +       int val = ucontrol->value.integer.value[0];
131124 +
131125 +       snd_soc_dapm_set_endpoint(codec, "Handset Spk", val);
131126 +
131127 +       snd_soc_dapm_sync_endpoints(codec);
131128 +
131129 +       return 0;
131130 +}
131131 +
131132 +static int neo1973_gta02_get_handset_spk(struct snd_kcontrol *kcontrol,
131133 +       struct snd_ctl_elem_value *ucontrol)
131134 +{
131135 +       struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131136 +
131137 +       ucontrol->value.integer.value[0] =
131138 +               snd_soc_dapm_get_endpoint(codec, "Handset Spk");
131139 +
131140 +       return 0;
131141 +}
131142 +
131143 +static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
131144 +       SND_SOC_DAPM_LINE("Stereo Out", NULL),
131145 +       SND_SOC_DAPM_LINE("GSM Line Out", NULL),
131146 +       SND_SOC_DAPM_LINE("GSM Line In", NULL),
131147 +       SND_SOC_DAPM_MIC("Headset Mic", NULL),
131148 +       SND_SOC_DAPM_MIC("Handset Mic", NULL),
131149 +       SND_SOC_DAPM_SPK("Handset Spk", NULL),
131150 +};
131151 +
131152 +
131153 +/* example machine audio_mapnections */
131154 +static const char* audio_map[][3] = {
131155 +
131156 +       /* Connections to the lm4853 amp */
131157 +       {"Stereo Out", NULL, "LOUT1"},
131158 +       {"Stereo Out", NULL, "ROUT1"},
131159 +
131160 +       /* Connections to the GSM Module */
131161 +       {"GSM Line Out", NULL, "MONO1"},
131162 +       {"GSM Line Out", NULL, "MONO2"},
131163 +       {"RXP", NULL, "GSM Line In"},
131164 +       {"RXN", NULL, "GSM Line In"},
131165 +
131166 +       /* Connections to Headset */
131167 +       {"MIC1", NULL, "Mic Bias"},
131168 +       {"Mic Bias", NULL, "Headset Mic"},
131169 +
131170 +       /* Call Mic */
131171 +       {"MIC2", NULL, "Mic Bias"},
131172 +       {"MIC2N", NULL, "Mic Bias"},
131173 +       {"Mic Bias", NULL, "Handset Mic"},
131174 +
131175 +       /* Call Speaker */
131176 +       {"Handset Spk", NULL, "LOUT2"},
131177 +       {"Handset Spk", NULL, "ROUT2"},
131178 +
131179 +       /* Connect the ALC pins */
131180 +       {"ACIN", NULL, "ACOP"},
131181 +
131182 +       {NULL, NULL, NULL},
131183 +};
131184 +
131185 +static const struct snd_kcontrol_new wm8753_neo1973_gta02_controls[] = {
131186 +       SOC_SINGLE_EXT("DAPM Stereo Out Switch", 0, 0, 1, 0,
131187 +               neo1973_gta02_get_stereo_out,
131188 +               neo1973_gta02_set_stereo_out),
131189 +       SOC_SINGLE_EXT("DAPM GSM Line Out Switch", 1, 0, 1, 0,
131190 +               neo1973_gta02_get_gsm_out,
131191 +               neo1973_gta02_set_gsm_out),
131192 +       SOC_SINGLE_EXT("DAPM GSM Line In Switch", 2, 0, 1, 0,
131193 +               neo1973_gta02_get_gsm_in,
131194 +               neo1973_gta02_set_gsm_in),
131195 +       SOC_SINGLE_EXT("DAPM Headset Mic Switch", 3, 0, 1, 0,
131196 +               neo1973_gta02_get_headset_mic,
131197 +               neo1973_gta02_set_headset_mic),
131198 +       SOC_SINGLE_EXT("DAPM Handset Mic Switch", 4, 0, 1, 0,
131199 +               neo1973_gta02_get_handset_mic,
131200 +               neo1973_gta02_set_handset_mic),
131201 +       SOC_SINGLE_EXT("DAPM Handset Spk Switch", 5, 0, 1, 0,
131202 +               neo1973_gta02_get_handset_spk,
131203 +               neo1973_gta02_set_handset_spk),
131204 +       SOC_SINGLE_EXT("Amp State Switch", 6, 0, 1, 0,
131205 +               lm4853_get_state,
131206 +               lm4853_set_state),
131207 +       SOC_SINGLE_EXT("Amp Spk Switch", 7, 0, 1, 0,
131208 +               lm4853_get_spk,
131209 +               lm4853_set_spk),
131210 +};
131211 +
131212 +/*
131213 + * This is an example machine initialisation for a wm8753 connected to a
131214 + * neo1973 GTA02.
131215 + */
131216 +static int neo1973_gta02_wm8753_init(struct snd_soc_codec *codec)
131217 +{
131218 +       int i, err;
131219 +
131220 +       /* set up NC codec pins */
131221 +       snd_soc_dapm_set_endpoint(codec, "OUT3",  0);
131222 +       snd_soc_dapm_set_endpoint(codec, "OUT4",  0);
131223 +       snd_soc_dapm_set_endpoint(codec, "LINE1", 0);
131224 +       snd_soc_dapm_set_endpoint(codec, "LINE2", 0);
131225 +
131226 +       /* Add neo1973 gta02 specific widgets */
131227 +       for (i = 0; i < ARRAY_SIZE(wm8753_dapm_widgets); i++)
131228 +               snd_soc_dapm_new_control(codec, &wm8753_dapm_widgets[i]);
131229 +
131230 +       /* add neo1973 gta02 specific controls */
131231 +       for (i = 0; i < ARRAY_SIZE(wm8753_neo1973_gta02_controls); i++) {
131232 +               err = snd_ctl_add(codec->card,
131233 +                       snd_soc_cnew(&wm8753_neo1973_gta02_controls[i],
131234 +                       codec, NULL));
131235 +               if (err < 0)
131236 +                       return err;
131237 +       }
131238 +
131239 +       /* set up neo1973 gta02 specific audio path audio_mapnects */
131240 +       for (i = 0; audio_map[i][0] != NULL; i++) {
131241 +               snd_soc_dapm_connect_input(codec, audio_map[i][0],
131242 +                       audio_map[i][1], audio_map[i][2]);
131243 +       }
131244 +
131245 +       /* set endpoints to default off mode */
131246 +       snd_soc_dapm_set_endpoint(codec, "Stereo Out",  0);
131247 +       snd_soc_dapm_set_endpoint(codec, "GSM Line Out",0);
131248 +       snd_soc_dapm_set_endpoint(codec, "GSM Line In", 0);
131249 +       snd_soc_dapm_set_endpoint(codec, "Headset Mic", 0);
131250 +       snd_soc_dapm_set_endpoint(codec, "Handset Mic", 0);
131251 +       snd_soc_dapm_set_endpoint(codec, "Handset Spk", 0);
131252 +
131253 +       snd_soc_dapm_sync_endpoints(codec);
131254 +       return 0;
131255 +}
131256 +
131257 +/*
131258 + * BT Codec DAI
131259 + */
131260 +static struct snd_soc_cpu_dai bt_dai =
131261 +{      .name = "Bluetooth",
131262 +       .id = 0,
131263 +       .type = SND_SOC_DAI_PCM,
131264 +       .playback = {
131265 +               .channels_min = 1,
131266 +               .channels_max = 1,
131267 +               .rates = SNDRV_PCM_RATE_8000,
131268 +               .formats = SNDRV_PCM_FMTBIT_S16_LE,},
131269 +       .capture = {
131270 +               .channels_min = 1,
131271 +               .channels_max = 1,
131272 +               .rates = SNDRV_PCM_RATE_8000,
131273 +               .formats = SNDRV_PCM_FMTBIT_S16_LE,},
131274 +};
131275 +
131276 +static struct snd_soc_dai_link neo1973_gta02_dai[] = {
131277 +{ /* Hifi Playback - for similatious use with voice below */
131278 +       .name = "WM8753",
131279 +       .stream_name = "WM8753 HiFi",
131280 +       .cpu_dai = &s3c24xx_i2s_dai,
131281 +       .codec_dai = &wm8753_dai[WM8753_DAI_HIFI],
131282 +       .init = neo1973_gta02_wm8753_init,
131283 +       .ops = &neo1973_gta02_hifi_ops,
131284 +},
131285 +{ /* Voice via BT */
131286 +       .name = "Bluetooth",
131287 +       .stream_name = "Voice",
131288 +       .cpu_dai = &bt_dai,
131289 +       .codec_dai = &wm8753_dai[WM8753_DAI_VOICE],
131290 +       .ops = &neo1973_gta02_voice_ops,
131291 +},
131292 +};
131293 +
131294 +#ifdef CONFIG_PM
131295 +int neo1973_gta02_suspend(struct platform_device *pdev, pm_message_t state)
131296 +{
131297 +       s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
131298 +
131299 +       return 0;
131300 +}
131301 +
131302 +int neo1973_gta02_resume(struct platform_device *pdev)
131303 +{
131304 +       if(lm4853_state & LM4853_AMP)
131305 +               s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 0);
131306 +
131307 +       return 0;
131308 +}
131309 +#else
131310 +#define neo1973_gta02_suspend NULL
131311 +#define neo1973_gta02_resume NULL
131312 +#endif
131313 +
131314 +static struct snd_soc_machine neo1973_gta02 = {
131315 +       .name = "neo1973-gta02",
131316 +       .suspend_pre = neo1973_gta02_suspend,
131317 +       .resume_post = neo1973_gta02_resume,
131318 +       .dai_link = neo1973_gta02_dai,
131319 +       .num_links = ARRAY_SIZE(neo1973_gta02_dai),
131320 +};
131321 +
131322 +static struct wm8753_setup_data neo1973_gta02_wm8753_setup = {
131323 +       .i2c_address = 0x1a,
131324 +};
131325 +
131326 +static struct snd_soc_device neo1973_gta02_snd_devdata = {
131327 +       .machine = &neo1973_gta02,
131328 +       .platform = &s3c24xx_soc_platform,
131329 +       .codec_dev = &soc_codec_dev_wm8753,
131330 +       .codec_data = &neo1973_gta02_wm8753_setup,
131331 +};
131332 +
131333 +static struct platform_device *neo1973_gta02_snd_device;
131334 +
131335 +static int __init neo1973_gta02_init(void)
131336 +{
131337 +       int ret;
131338 +
131339 +       if (!machine_is_neo1973_gta02()) {
131340 +               printk(KERN_INFO
131341 +                      "Only GTA02 hardware supported by ASoc driver\n");
131342 +               return -ENODEV;
131343 +       }
131344 +
131345 +       neo1973_gta02_snd_device = platform_device_alloc("soc-audio", -1);
131346 +       if (!neo1973_gta02_snd_device)
131347 +               return -ENOMEM;
131348 +
131349 +       platform_set_drvdata(neo1973_gta02_snd_device,
131350 +                       &neo1973_gta02_snd_devdata);
131351 +       neo1973_gta02_snd_devdata.dev = &neo1973_gta02_snd_device->dev;
131352 +       ret = platform_device_add(neo1973_gta02_snd_device);
131353 +
131354 +       if (ret)
131355 +               platform_device_put(neo1973_gta02_snd_device);
131356 +
131357 +       /* Initialise GPIOs used by amp */
131358 +       s3c2410_gpio_cfgpin(GTA02_GPIO_HP_IN, S3C2410_GPIO_OUTPUT);
131359 +       s3c2410_gpio_cfgpin(GTA02_GPIO_AMP_SHUT, S3C2410_GPIO_OUTPUT);
131360 +
131361 +       /* Amp off by default */
131362 +       s3c2410_gpio_setpin(GTA02_GPIO_AMP_SHUT, 1);
131363 +
131364 +       /* Speaker off by default */
131365 +       s3c2410_gpio_setpin(GTA02_GPIO_HP_IN, 1);
131366 +
131367 +       return ret;
131368 +}
131369 +
131370 +static void __exit neo1973_gta02_exit(void)
131371 +{
131372 +       platform_device_unregister(neo1973_gta02_snd_device);
131373 +}
131374 +
131375 +module_init(neo1973_gta02_init);
131376 +module_exit(neo1973_gta02_exit);
131377 +
131378 +/* Module information */
131379 +MODULE_AUTHOR("Graeme Gregory, graeme@openmoko.org");
131380 +MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA02");
131381 +MODULE_LICENSE("GPL");
131382 +
131383 Index: linux-2.6.24.7/sound/soc/s3c24xx/neo1973_wm8753.c
131384 ===================================================================
131385 --- linux-2.6.24.7.orig/sound/soc/s3c24xx/neo1973_wm8753.c      2008-12-11 22:46:07.000000000 +0100
131386 +++ linux-2.6.24.7/sound/soc/s3c24xx/neo1973_wm8753.c   2008-12-11 22:46:49.000000000 +0100
131387 @@ -30,18 +30,29 @@
131388
131389  #include <asm/mach-types.h>
131390  #include <asm/hardware/scoop.h>
131391 -#include <asm/arch/regs-iis.h>
131392  #include <asm/arch/regs-clock.h>
131393  #include <asm/arch/regs-gpio.h>
131394  #include <asm/hardware.h>
131395  #include <asm/arch/audio.h>
131396  #include <asm/io.h>
131397  #include <asm/arch/spi-gpio.h>
131398 +
131399 +#include <asm/plat-s3c24xx/regs-iis.h>
131400 +
131401  #include "../codecs/wm8753.h"
131402  #include "lm4857.h"
131403  #include "s3c24xx-pcm.h"
131404  #include "s3c24xx-i2s.h"
131405
131406 +/* Debugging stuff */
131407 +#ifdef SND_S3C24XX_SOC_NEO1973_WM8753_DEBUG
131408 +static int debug        = 1;
131409 +#else
131410 +static int debug        = 0;
131411 +#endif
131412 +
131413 +#define dprintk(msg...) if (debug) { printk(KERN_DEBUG "wm8753: " msg); }
131414 +
131415  /* define the scenarios */
131416  #define NEO_AUDIO_OFF                  0
131417  #define NEO_GSM_CALL_AUDIO_HANDSET     1
131418 @@ -66,6 +77,8 @@ static int neo1973_hifi_hw_params(struct
131419         int ret = 0;
131420         unsigned long iis_clkrate;
131421
131422 +       dprintk("Entered %s\n", __FUNCTION__);
131423 +
131424         iis_clkrate = s3c24xx_i2s_get_clockrate();
131425
131426         switch (params_rate(params)) {
131427 @@ -150,6 +163,8 @@ static int neo1973_hifi_hw_free(struct s
131428         struct snd_soc_pcm_runtime *rtd = substream->private_data;
131429         struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
131430
131431 +       dprintk("Entered %s\n", __FUNCTION__);
131432 +
131433         /* disable the PLL */
131434         return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL1, 0, 0);
131435  }
131436 @@ -171,6 +186,8 @@ static int neo1973_voice_hw_params(struc
131437         int ret = 0;
131438         unsigned long iis_clkrate;
131439
131440 +       dprintk("Entered %s\n", __FUNCTION__);
131441 +
131442         iis_clkrate = s3c24xx_i2s_get_clockrate();
131443
131444         if (params_rate(params) != 8000)
131445 @@ -212,6 +229,8 @@ static int neo1973_voice_hw_free(struct
131446         struct snd_soc_pcm_runtime *rtd = substream->private_data;
131447         struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
131448
131449 +       dprintk("Entered %s\n", __FUNCTION__);
131450 +
131451         /* disable the PLL */
131452         return codec_dai->dai_ops.set_pll(codec_dai, WM8753_PLL2, 0, 0);
131453  }
131454 @@ -226,12 +245,16 @@ static int neo1973_scenario = 0;
131455  static int neo1973_get_scenario(struct snd_kcontrol *kcontrol,
131456         struct snd_ctl_elem_value *ucontrol)
131457  {
131458 +       dprintk("Entered %s\n", __FUNCTION__);
131459 +
131460         ucontrol->value.integer.value[0] = neo1973_scenario;
131461         return 0;
131462  }
131463
131464  static int set_scenario_endpoints(struct snd_soc_codec *codec, int scenario)
131465  {
131466 +       dprintk("Entered %s\n", __FUNCTION__);
131467 +
131468         switch(neo1973_scenario) {
131469         case NEO_AUDIO_OFF:
131470                 snd_soc_dapm_set_endpoint(codec, "Audio Out",    0);
131471 @@ -314,6 +337,8 @@ static int neo1973_set_scenario(struct s
131472  {
131473         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
131474
131475 +       dprintk("Entered %s\n", __FUNCTION__);
131476 +
131477         if (neo1973_scenario == ucontrol->value.integer.value[0])
131478                 return 0;
131479
131480 @@ -326,6 +351,8 @@ static u8 lm4857_regs[4] = {0x00, 0x40,
131481
131482  static void lm4857_write_regs(void)
131483  {
131484 +       dprintk("Entered %s\n", __FUNCTION__);
131485 +
131486         if (i2c_master_send(i2c, lm4857_regs, 4) != 4)
131487                 printk(KERN_ERR "lm4857: i2c write failed\n");
131488  }
131489 @@ -337,6 +364,8 @@ static int lm4857_get_reg(struct snd_kco
131490         int shift = (kcontrol->private_value >> 8) & 0x0F;
131491         int mask = (kcontrol->private_value >> 16) & 0xFF;
131492
131493 +       dprintk("Entered %s\n", __FUNCTION__);
131494 +
131495         ucontrol->value.integer.value[0] = (lm4857_regs[reg] >> shift) & mask;
131496         return 0;
131497  }
131498 @@ -348,6 +377,8 @@ static int lm4857_set_reg(struct snd_kco
131499         int shift = (kcontrol->private_value >> 8) & 0x0F;
131500         int mask = (kcontrol->private_value >> 16) & 0xFF;
131501
131502 +       dprintk("Entered %s\n", __FUNCTION__);
131503 +
131504         if (((lm4857_regs[reg] >> shift ) & mask) ==
131505                 ucontrol->value.integer.value[0])
131506                 return 0;
131507 @@ -363,6 +394,8 @@ static int lm4857_get_mode(struct snd_kc
131508  {
131509         u8 value = lm4857_regs[LM4857_CTRL] & 0x0F;
131510
131511 +       dprintk("Entered %s\n", __FUNCTION__);
131512 +
131513         if (value)
131514                 value -= 5;
131515
131516 @@ -375,6 +408,8 @@ static int lm4857_set_mode(struct snd_kc
131517  {
131518         u8 value = ucontrol->value.integer.value[0];
131519
131520 +       dprintk("Entered %s\n", __FUNCTION__);
131521 +
131522         if (value)
131523                 value += 5;
131524
131525 @@ -482,6 +517,8 @@ static int neo1973_wm8753_init(struct sn
131526  {
131527         int i, err;
131528
131529 +       dprintk("Entered %s\n", __FUNCTION__);
131530 +
131531         /* set up NC codec pins */
131532         snd_soc_dapm_set_endpoint(codec, "LOUT2", 0);
131533         snd_soc_dapm_set_endpoint(codec, "ROUT2", 0);
131534 @@ -582,6 +619,8 @@ static int lm4857_amp_probe(struct i2c_a
131535  {
131536         int ret;
131537
131538 +       dprintk("Entered %s\n", __FUNCTION__);
131539 +
131540         client_template.adapter = adap;
131541         client_template.addr = addr;
131542
131543 @@ -605,6 +644,8 @@ exit_err:
131544
131545  static int lm4857_i2c_detach(struct i2c_client *client)
131546  {
131547 +       dprintk("Entered %s\n", __FUNCTION__);
131548 +
131549         i2c_detach_client(client);
131550         kfree(client);
131551         return 0;
131552 @@ -612,9 +653,46 @@ static int lm4857_i2c_detach(struct i2c_
131553
131554  static int lm4857_i2c_attach(struct i2c_adapter *adap)
131555  {
131556 +       dprintk("Entered %s\n", __FUNCTION__);
131557 +
131558         return i2c_probe(adap, &addr_data, lm4857_amp_probe);
131559  }
131560
131561 +static u8 lm4857_state;
131562 +
131563 +static int lm4857_suspend(struct i2c_client *dev, pm_message_t state)
131564 +{
131565 +       dprintk("Entered %s\n", __FUNCTION__);
131566 +
131567 +       dev_dbg(&dev->dev, "lm4857_suspend\n");
131568 +       lm4857_state = lm4857_regs[LM4857_CTRL] & 0xf;
131569 +       if (lm4857_state) {
131570 +               lm4857_regs[LM4857_CTRL] &= 0xf0;
131571 +               lm4857_write_regs();
131572 +       }
131573 +       return 0;
131574 +}
131575 +
131576 +static int lm4857_resume(struct i2c_client *dev)
131577 +{
131578 +       dprintk("Entered %s\n", __FUNCTION__);
131579 +
131580 +       if (lm4857_state) {
131581 +               lm4857_regs[LM4857_CTRL] |= (lm4857_state & 0x0f);
131582 +               lm4857_write_regs();
131583 +       }
131584 +       return 0;
131585 +}
131586 +
131587 +static void lm4857_shutdown(struct i2c_client *dev)
131588 +{
131589 +       dprintk("Entered %s\n", __FUNCTION__);
131590 +
131591 +       dev_dbg(&dev->dev, "lm4857_shutdown\n");
131592 +       lm4857_regs[LM4857_CTRL] &= 0xf0;
131593 +       lm4857_write_regs();
131594 +}
131595 +
131596  /* corgi i2c codec control layer */
131597  static struct i2c_driver lm4857_i2c_driver = {
131598         .driver = {
131599 @@ -622,6 +700,9 @@ static struct i2c_driver lm4857_i2c_driv
131600                 .owner = THIS_MODULE,
131601         },
131602         .id =             I2C_DRIVERID_LM4857,
131603 +       .suspend =        lm4857_suspend,
131604 +       .resume =         lm4857_resume,
131605 +       .shutdown =       lm4857_shutdown,
131606         .attach_adapter = lm4857_i2c_attach,
131607         .detach_client =  lm4857_i2c_detach,
131608         .command =        NULL,
131609 @@ -638,6 +719,14 @@ static int __init neo1973_init(void)
131610  {
131611         int ret;
131612
131613 +       dprintk("Entered %s\n", __FUNCTION__);
131614 +
131615 +       if (!machine_is_neo1973_gta01()) {
131616 +               printk(KERN_INFO
131617 +                      "Only GTA01 hardware supported by ASoc driver\n");
131618 +               return -ENODEV;
131619 +       }
131620 +
131621         neo1973_snd_device = platform_device_alloc("soc-audio", -1);
131622         if (!neo1973_snd_device)
131623                 return -ENOMEM;
131624 @@ -658,6 +747,9 @@ static int __init neo1973_init(void)
131625
131626  static void __exit neo1973_exit(void)
131627  {
131628 +       dprintk("Entered %s\n", __FUNCTION__);
131629 +
131630 +       i2c_del_driver(&lm4857_i2c_driver);
131631         platform_device_unregister(neo1973_snd_device);
131632  }
131633
131634 @@ -666,5 +758,5 @@ module_exit(neo1973_exit);
131635
131636  /* Module information */
131637  MODULE_AUTHOR("Graeme Gregory, graeme.gregory@wolfsonmicro.com, www.wolfsonmicro.com");
131638 -MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973");
131639 +MODULE_DESCRIPTION("ALSA SoC WM8753 Neo1973 GTA01");
131640  MODULE_LICENSE("GPL");
131641 Index: linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-i2s.c
131642 ===================================================================
131643 --- linux-2.6.24.7.orig/sound/soc/s3c24xx/s3c24xx-i2s.c 2008-12-11 22:46:07.000000000 +0100
131644 +++ linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-i2s.c      2008-12-11 22:46:49.000000000 +0100
131645 @@ -33,19 +33,20 @@
131646
131647  #include <asm/hardware.h>
131648  #include <asm/io.h>
131649 -#include <asm/arch/regs-iis.h>
131650  #include <asm/arch/regs-gpio.h>
131651  #include <asm/arch/regs-clock.h>
131652  #include <asm/arch/audio.h>
131653  #include <asm/dma.h>
131654  #include <asm/arch/dma.h>
131655
131656 +#include <asm/plat-s3c24xx/regs-iis.h>
131657 +
131658  #include "s3c24xx-pcm.h"
131659  #include "s3c24xx-i2s.h"
131660
131661  #define S3C24XX_I2S_DEBUG 0
131662  #if S3C24XX_I2S_DEBUG
131663 -#define DBG(x...) printk(KERN_DEBUG x)
131664 +#define DBG(x...) printk(KERN_DEBUG "s3c24xx-i2s: " x)
131665  #else
131666  #define DBG(x...)
131667  #endif
131668 @@ -75,6 +76,10 @@ static struct s3c24xx_pcm_dma_params s3c
131669  struct s3c24xx_i2s_info {
131670         void __iomem    *regs;
131671         struct clk      *iis_clk;
131672 +       u32             iiscon;
131673 +       u32             iismod;
131674 +       u32             iisfcon;
131675 +       u32             iispsr;
131676  };
131677  static struct s3c24xx_i2s_info s3c24xx_i2s;
131678
131679 @@ -175,7 +180,7 @@ static void s3c24xx_snd_rxctrl(int on)
131680  static int s3c24xx_snd_lrsync(void)
131681  {
131682         u32 iiscon;
131683 -       unsigned long timeout = jiffies + msecs_to_jiffies(5);
131684 +       int timeout = 5; /* 500us, 125 should be enough at 8kHz */
131685
131686         DBG("Entered %s\n", __FUNCTION__);
131687
131688 @@ -184,8 +189,9 @@ static int s3c24xx_snd_lrsync(void)
131689                 if (iiscon & S3C2410_IISCON_LRINDEX)
131690                         break;
131691
131692 -               if (timeout < jiffies)
131693 +               if (!--timeout)
131694                         return -ETIMEDOUT;
131695 +               udelay(100);
131696         }
131697
131698         return 0;
131699 @@ -279,11 +285,14 @@ static int s3c24xx_i2s_trigger(struct sn
131700         case SNDRV_PCM_TRIGGER_START:
131701         case SNDRV_PCM_TRIGGER_RESUME:
131702         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
131703 -               if (!s3c24xx_snd_is_clkmaster()) {
131704 -                       ret = s3c24xx_snd_lrsync();
131705 -                       if (ret)
131706 -                               goto exit_err;
131707 -               }
131708 +               if (!s3c24xx_snd_is_clkmaster())
131709 +                       /* we ignore the return code, if it sync'd then fine,
131710 +                        * if it didn't sync, which happens after resume the
131711 +                        * first time when there was a live stream at suspend,
131712 +                        * just let it timeout, the stream picks up OK after
131713 +                        * that and LRCK is evidently working again.
131714 +                        */
131715 +                       s3c24xx_snd_lrsync();
131716
131717                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
131718                         s3c24xx_snd_rxctrl(1);
131719 @@ -405,6 +414,40 @@ static int s3c24xx_i2s_probe(struct plat
131720         return 0;
131721  }
131722
131723 +#ifdef CONFIG_PM
131724 +int s3c24xx_i2s_suspend(struct platform_device *pdev,
131725 +                struct snd_soc_cpu_dai *cpu_dai)
131726 +{
131727 +       DBG("Entered %s\n", __FUNCTION__);
131728 +       s3c24xx_i2s.iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
131729 +       s3c24xx_i2s.iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
131730 +       s3c24xx_i2s.iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON);
131731 +       s3c24xx_i2s.iispsr = readl(s3c24xx_i2s.regs + S3C2410_IISPSR);
131732 +
131733 +       clk_disable(s3c24xx_i2s.iis_clk);
131734 +
131735 +       return 0;
131736 +}
131737 +
131738 +int s3c24xx_i2s_resume(struct platform_device *pdev,
131739 +                struct snd_soc_cpu_dai *cpu_dai)
131740 +{
131741 +       DBG("Entered %s\n", __FUNCTION__);
131742 +       clk_enable(s3c24xx_i2s.iis_clk);
131743 +
131744 +        writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
131745 +        writel(s3c24xx_i2s.iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
131746 +        writel(s3c24xx_i2s.iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
131747 +        writel(s3c24xx_i2s.iispsr, s3c24xx_i2s.regs + S3C2410_IISPSR);
131748 +
131749 +       return 0;
131750 +}
131751 +#else
131752 +#define s3c24xx_i2s_suspend NULL
131753 +#define s3c24xx_i2s_resume NULL
131754 +#endif
131755 +
131756 +
131757  #define S3C24XX_I2S_RATES \
131758         (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
131759         SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
131760 @@ -415,6 +458,8 @@ struct snd_soc_cpu_dai s3c24xx_i2s_dai =
131761         .id = 0,
131762         .type = SND_SOC_DAI_I2S,
131763         .probe = s3c24xx_i2s_probe,
131764 +       .suspend = s3c24xx_i2s_suspend,
131765 +       .resume = s3c24xx_i2s_resume,
131766         .playback = {
131767                 .channels_min = 2,
131768                 .channels_max = 2,
131769 Index: linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-pcm.c
131770 ===================================================================
131771 --- linux-2.6.24.7.orig/sound/soc/s3c24xx/s3c24xx-pcm.c 2008-12-11 22:46:07.000000000 +0100
131772 +++ linux-2.6.24.7/sound/soc/s3c24xx/s3c24xx-pcm.c      2008-12-11 22:46:49.000000000 +0100
131773 @@ -40,7 +40,7 @@
131774
131775  #define S3C24XX_PCM_DEBUG 0
131776  #if S3C24XX_PCM_DEBUG
131777 -#define DBG(x...) printk(KERN_DEBUG x)
131778 +#define DBG(x...) printk(KERN_DEBUG "s3c24xx-pcm: " x)
131779  #else
131780  #define DBG(x...)
131781  #endif
131782 @@ -49,7 +49,9 @@ static const struct snd_pcm_hardware s3c
131783         .info                   = SNDRV_PCM_INFO_INTERLEAVED |
131784                                     SNDRV_PCM_INFO_BLOCK_TRANSFER |
131785                                     SNDRV_PCM_INFO_MMAP |
131786 -                                   SNDRV_PCM_INFO_MMAP_VALID,
131787 +                                   SNDRV_PCM_INFO_MMAP_VALID |
131788 +                                   SNDRV_PCM_INFO_PAUSE |
131789 +                                   SNDRV_PCM_INFO_RESUME,
131790         .formats                = SNDRV_PCM_FMTBIT_S16_LE |
131791                                     SNDRV_PCM_FMTBIT_U16_LE |
131792                                     SNDRV_PCM_FMTBIT_U8 |
131793 @@ -176,28 +178,6 @@ static int s3c24xx_pcm_hw_params(struct
131794                 }
131795         }
131796
131797 -       /* channel needs configuring for mem=>device, increment memory addr,
131798 -        * sync to pclk, half-word transfers to the IIS-FIFO. */
131799 -       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
131800 -               s3c2410_dma_devconfig(prtd->params->channel,
131801 -                               S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC |
131802 -                               S3C2410_DISRCC_APB, prtd->params->dma_addr);
131803 -
131804 -               s3c2410_dma_config(prtd->params->channel,
131805 -                               prtd->params->dma_size,
131806 -                               S3C2410_DCON_SYNC_PCLK |
131807 -                               S3C2410_DCON_HANDSHAKE);
131808 -       } else {
131809 -               s3c2410_dma_config(prtd->params->channel,
131810 -                               prtd->params->dma_size,
131811 -                               S3C2410_DCON_HANDSHAKE |
131812 -                               S3C2410_DCON_SYNC_PCLK);
131813 -
131814 -               s3c2410_dma_devconfig(prtd->params->channel,
131815 -                                       S3C2410_DMASRC_HW, 0x3,
131816 -                                       prtd->params->dma_addr);
131817 -       }
131818 -
131819         s3c2410_dma_set_buffdone_fn(prtd->params->channel,
131820                                     s3c24xx_audio_buffdone);
131821
131822 @@ -246,6 +226,28 @@ static int s3c24xx_pcm_prepare(struct sn
131823         if (!prtd->params)
131824                 return 0;
131825
131826 +       /* channel needs configuring for mem=>device, increment memory addr,
131827 +        * sync to pclk, half-word transfers to the IIS-FIFO. */
131828 +       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
131829 +               s3c2410_dma_devconfig(prtd->params->channel,
131830 +                               S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC |
131831 +                               S3C2410_DISRCC_APB, prtd->params->dma_addr);
131832 +
131833 +               s3c2410_dma_config(prtd->params->channel,
131834 +                               prtd->params->dma_size,
131835 +                               S3C2410_DCON_SYNC_PCLK |
131836 +                               S3C2410_DCON_HANDSHAKE);
131837 +       } else {
131838 +               s3c2410_dma_config(prtd->params->channel,
131839 +                               prtd->params->dma_size,
131840 +                               S3C2410_DCON_HANDSHAKE |
131841 +                               S3C2410_DCON_SYNC_PCLK);
131842 +
131843 +               s3c2410_dma_devconfig(prtd->params->channel,
131844 +                                       S3C2410_DMASRC_HW, 0x3,
131845 +                                       prtd->params->dma_addr);
131846 +       }
131847 +
131848         /* flush the DMA channel */
131849         s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_FLUSH);
131850         prtd->dma_loaded = 0;
131851 Index: linux-2.6.24.7/sound/soc/soc-core.c
131852 ===================================================================
131853 --- linux-2.6.24.7.orig/sound/soc/soc-core.c    2008-12-11 22:46:07.000000000 +0100
131854 +++ linux-2.6.24.7/sound/soc/soc-core.c 2008-12-11 22:46:49.000000000 +0100
131855 @@ -632,6 +632,16 @@ static int soc_suspend(struct platform_d
131856         struct snd_soc_codec *codec = socdev->codec;
131857         int i;
131858
131859 +       /* Due to the resume being scheduled into a workqueue we could
131860 +       * suspend before that's finished - wait for it to complete.
131861 +        */
131862 +       snd_power_lock(codec->card);
131863 +       snd_power_wait(codec->card, SNDRV_CTL_POWER_D0);
131864 +       snd_power_unlock(codec->card);
131865 +
131866 +       /* we're going to block userspace touching us until resume completes */
131867 +       snd_power_change_state(codec->card, SNDRV_CTL_POWER_D3hot);
131868 +
131869         /* mute any active DAC's */
131870         for(i = 0; i < machine->num_links; i++) {
131871                 struct snd_soc_codec_dai *dai = machine->dai_link[i].codec_dai;
131872 @@ -639,6 +649,10 @@ static int soc_suspend(struct platform_d
131873                         dai->dai_ops.digital_mute(dai, 1);
131874         }
131875
131876 +       /* suspend all pcm's */
131877 +       for(i = 0; i < machine->num_links; i++)
131878 +               snd_pcm_suspend_all(machine->dai_link[i].pcm);
131879 +
131880         if (machine->suspend_pre)
131881                 machine->suspend_pre(pdev, state);
131882
131883 @@ -680,16 +694,27 @@ static int soc_suspend(struct platform_d
131884         return 0;
131885  }
131886
131887 -/* powers up audio subsystem after a suspend */
131888 -static int soc_resume(struct platform_device *pdev)
131889 +/* deferred resume work, so resume can complete before we finished
131890 + * setting our codec back up, which can be very slow on I2C
131891 + */
131892 +static void soc_resume_deferred(struct work_struct *work)
131893  {
131894 -       struct snd_soc_device *socdev = platform_get_drvdata(pdev);
131895 -       struct snd_soc_machine *machine = socdev->machine;
131896 -       struct snd_soc_platform *platform = socdev->platform;
131897 -       struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
131898 +       struct snd_soc_device *socdev = container_of(work,
131899 +                                                    struct snd_soc_device,
131900 +                                                    deferred_resume_work);
131901 +       struct snd_soc_machine *machine = socdev->machine;
131902 +       struct snd_soc_platform *platform = socdev->platform;
131903 +       struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
131904         struct snd_soc_codec *codec = socdev->codec;
131905 +       struct platform_device *pdev = to_platform_device(socdev->dev);
131906         int i;
131907
131908 +       /* our power state is still SNDRV_CTL_POWER_D3hot from suspend time,
131909 +        * so userspace apps are blocked from touching us
131910 +        */
131911 +
131912 +       dev_info(socdev->dev, "starting resume work\n");
131913 +
131914         if (machine->resume_pre)
131915                 machine->resume_pre(pdev);
131916
131917 @@ -731,6 +756,22 @@ static int soc_resume(struct platform_de
131918         if (machine->resume_post)
131919                 machine->resume_post(pdev);
131920
131921 +       dev_info(socdev->dev, "resume work completed\n");
131922 +
131923 +       /* userspace can access us now we are back as we were before */
131924 +       snd_power_change_state(codec->card, SNDRV_CTL_POWER_D0);
131925 +}
131926 +
131927 +/* powers up audio subsystem after a suspend */
131928 +static int soc_resume(struct platform_device *pdev)
131929 +{
131930 +       struct snd_soc_device *socdev = platform_get_drvdata(pdev);
131931 +
131932 +       dev_info(socdev->dev, "scheduling resume work\n");
131933 +
131934 +       if (!schedule_work(&socdev->deferred_resume_work))
131935 +               dev_err(socdev->dev, "work item may be lost\n");
131936 +
131937         return 0;
131938  }
131939
131940 @@ -777,6 +818,9 @@ static int soc_probe(struct platform_dev
131941
131942         /* DAPM stream work */
131943         INIT_DELAYED_WORK(&socdev->delayed_work, close_delayed_work);
131944 +       /* deferred resume work */
131945 +       INIT_WORK(&socdev->deferred_resume_work, soc_resume_deferred);
131946 +
131947         return 0;
131948
131949  platform_err:
131950 @@ -873,6 +917,7 @@ static int soc_new_pcm(struct snd_soc_de
131951                 return ret;
131952         }
131953
131954 +       dai_link->pcm = pcm;
131955         pcm->private_data = rtd;
131956         soc_pcm_ops.mmap = socdev->platform->pcm_ops->mmap;
131957         soc_pcm_ops.pointer = socdev->platform->pcm_ops->pointer;
131958 @@ -923,6 +968,38 @@ static ssize_t codec_reg_show(struct dev
131959  }
131960  static DEVICE_ATTR(codec_reg, 0444, codec_reg_show, NULL);
131961
131962 +
131963 +static ssize_t codec_reg_write(struct device *dev,
131964 +                              struct device_attribute *attr,
131965 +                              const char *buf, size_t count)
131966 +{
131967 +       u32 address;
131968 +       u32 data;
131969 +       char * end;
131970 +       size_t left = count;
131971 +       struct snd_soc_device *devdata = dev_get_drvdata(dev);
131972 +       struct snd_soc_codec *codec = devdata->codec;
131973 +
131974 +       address = simple_strtoul(buf, &end, 16);
131975 +       left -= (int)(end - buf);
131976 +       while ((*end == ' ') && (left)) {
131977 +               end++;
131978 +               left--;
131979 +       }
131980 +       if (!left)
131981 +               return count;
131982 +       data = simple_strtoul(end, &end, 16);
131983 +
131984 +       printk(KERN_INFO"user writes Codec reg 0x%02X with Data 0x%04X\n",
131985 +                                                               address, data);
131986 +
131987 +       codec->write(codec, address, data);
131988 +
131989 +       return count;
131990 +}
131991 +
131992 +static DEVICE_ATTR(codec_reg_write, 0644, NULL, codec_reg_write);
131993 +
131994  /**
131995   * snd_soc_new_ac97_codec - initailise AC97 device
131996   * @codec: audio codec
131997 @@ -1134,6 +1211,9 @@ int snd_soc_register_card(struct snd_soc
131998         err = device_create_file(socdev->dev, &dev_attr_codec_reg);
131999         if (err < 0)
132000                 printk(KERN_WARNING "asoc: failed to add codec sysfs entries\n");
132001 +       err = device_create_file(socdev->dev, &dev_attr_codec_reg_write);
132002 +       if (err < 0)
132003 +               printk(KERN_WARNING "asoc: failed to add codec sysfs entries\n");
132004  out:
132005         mutex_unlock(&codec->mutex);
132006         return ret;
132007 Index: linux-2.6.24.7/sound/soc/soc-dapm.c
132008 ===================================================================
132009 --- linux-2.6.24.7.orig/sound/soc/soc-dapm.c    2008-12-11 22:46:07.000000000 +0100
132010 +++ linux-2.6.24.7/sound/soc/soc-dapm.c 2008-12-11 22:46:49.000000000 +0100
132011 @@ -1305,6 +1305,30 @@ int snd_soc_dapm_set_endpoint(struct snd
132012  EXPORT_SYMBOL_GPL(snd_soc_dapm_set_endpoint);
132013
132014  /**
132015 + * snd_soc_dapm_get_endpoint - get audio endpoint status
132016 + * @codec: audio codec
132017 + * @endpoint: audio signal endpoint (or start point)
132018 + *
132019 + * Get audio endpoint status - connected or disconnected.
132020 + *
132021 + * Returns status
132022 + */
132023 +int snd_soc_dapm_get_endpoint(struct snd_soc_codec *codec,
132024 +       char *endpoint)
132025 +{
132026 +       struct snd_soc_dapm_widget *w;
132027 +
132028 +       list_for_each_entry(w, &codec->dapm_widgets, list) {
132029 +               if (!strcmp(w->name, endpoint)) {
132030 +                       return w->connected;
132031 +               }
132032 +       }
132033 +
132034 +       return 0;
132035 +}
132036 +EXPORT_SYMBOL_GPL(snd_soc_dapm_get_endpoint);
132037 +
132038 +/**
132039   * snd_soc_dapm_free - free dapm resources
132040   * @socdev: SoC device
132041   *
132042 Index: linux-2.6.24.7/synthesize-gta-module-configs.mak
132043 ===================================================================
132044 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
132045 +++ linux-2.6.24.7/synthesize-gta-module-configs.mak    2008-12-11 22:46:49.000000000 +0100
132046 @@ -0,0 +1,9 @@
132047 +all:           defconfig-gta01 defconfig-gta02
132048 +
132049 +defconfig-gta01: \
132050 +               defconfig-2.6.24-maxmodules
132051 +               cp $< $@
132052 +
132053 +defconfig-gta02: \
132054 +               defconfig-2.6.24-maxmodules
132055 +               sed '/UART.*=0$$/s/=0/=2/' <$< >$@ || { rm -f $@; exit 1; }