9e75505a880e5e1550cf0187a9466ea36bc895c3
[openwrt.git] / target / linux / olpc / files-2.6.23 / drivers / video / geode / geode_regs.h
1 /* This header file defines the registers and suspend/resume
2    structures for the Geode GX and LX.   The lxfb driver defines
3    _GEODELX_ before including this file, which will unlock the
4    extra registers that are only valid for LX.
5 */
6
7 #ifndef _GEODE_REGS_H_
8 #define _GEODE_REGS_H_
9
10 /* MSRs */
11
12 #define GX_VP_MSR_PAD_SELECT    0xC0002011
13 #define LX_VP_MSR_PAD_SELECT    0x48000011
14
15 #define GEODE_MSR_GLCP_DOTPLL   0x4c000015
16
17 #define GLCP_DOTPLL_RESET    (1 << 0)
18 #define GLCP_DOTPLL_BYPASS   (1 << 15)
19 #define GLCP_DOTPLL_HALFPIX  (1 << 24)
20 #define GLCP_DOTPLL_LOCK     (1 << 25)
21
22 /* Registers */
23 #define VP_FP_START          0x400
24
25
26 #ifdef _GEODELX_
27
28 #define GP_REG_SIZE  0x7C
29 #define DC_REG_SIZE  0xF0
30 #define VP_REG_SIZE  0x158
31 #define FP_REG_SIZE  0x70
32
33 #else
34
35 #define GP_REG_SIZE 0x50
36 #define DC_REG_SIZE 0x90
37 #define VP_REG_SIZE 0x138
38 #define FP_REG_SIZE 0x70
39
40 #endif
41
42 #define DC_PAL_SIZE 0x105
43
44 struct geoderegs {
45
46         struct {
47                 u64 padsel;
48                 u64 dotpll;
49
50 #ifdef _GEODELX_
51                 u64 dfglcfg;
52                 u64 dcspare;
53 #else
54                 u64 rstpll;
55 #endif
56         } msr;
57
58         union {
59                 unsigned char b[GP_REG_SIZE];
60                 struct {
61                         u32 dst_offset;         /* 0x00 */
62                         u32 src_offset;         /* 0x04 */
63                         u32 stride;             /* 0x08 */
64                         u32 wid_height;         /* 0x0C */
65                         u32 src_color_fg;       /* 0x10 */
66                         u32 src_color_bg;       /* 0x14 */
67                         u32 pat_color_0;        /* 0x18 */
68                         u32 pat_color_1;        /* 0x1C */
69                         u32 pat_color_2;        /* 0x20 */
70                         u32 pat_color_3;        /* 0x24 */
71                         u32 pat_color_4;        /* 0x28 */
72                         u32 pat_color_5;        /* 0x2C */
73                         u32 pat_data_0;         /* 0x30 */
74                         u32 pat_data_1;         /* 0x34 */
75                         u32 raster_mode;        /* 0x38 */
76                         u32 vector_mode;        /* 0x3C */
77                         u32 blt_mode;           /* 0x40 */
78                         u32 blit_status;        /* 0x4C */
79                         u32 hst_src;            /* 0x48 */
80                         u32 base_offset;        /* 0x4C */
81
82 #ifdef _GEODELX_
83                         u32 cmd_top;            /* 0x50 */
84                         u32 cmd_bot;            /* 0x54 */
85                         u32 cmd_read;           /* 0x58 */
86                         u32 cmd_write;          /* 0x5C */
87                         u32 ch3_offset;         /* 0x60 */
88                         u32 ch3_mode_str;       /* 0x64 */
89                         u32 ch3_width;          /* 0x68 */
90                         u32 ch3_hsrc;           /* 0x6C */
91                         u32 lut_index;          /* 0x70 */
92                         u32 lut_data;           /* 0x74 */
93                         u32 int_cntrl;          /* 0x78 */
94 #endif
95                 } r;
96         } gp;
97
98         union {
99                 unsigned char b[DC_REG_SIZE];
100
101                 struct {
102                         u32 unlock;             /* 0x00 */
103                         u32 gcfg;               /* 0x04 */
104                         u32 dcfg;               /* 0x08 */
105                         u32 arb;                /* 0x0C */
106                         u32 fb_st_offset;       /* 0x10 */
107                         u32 cb_st_offset;       /* 0x14 */
108                         u32 curs_st_offset;     /* 0x18 */
109                         u32 icon_st_offset;     /* 0x1C */
110                         u32 vid_y_st_offset;    /* 0x20 */
111                         u32 vid_u_st_offset;    /* 0x24 */
112                         u32 vid_v_st_offset;    /* 0x28 */
113                         u32 dctop;              /* 0x2c */
114                         u32 line_size;          /* 0x30 */
115                         u32 gfx_pitch;          /* 0x34 */
116                         u32 vid_yuv_pitch;      /* 0x38 */
117                         u32 rsvd2;              /* 0x3C */
118                         u32 h_active_timing;    /* 0x40 */
119                         u32 h_blank_timing;     /* 0x44 */
120                         u32 h_sync_timing;      /* 0x48 */
121                         u32 rsvd3;              /* 0x4C */
122                         u32 v_active_timing;    /* 0x50 */
123                         u32 v_blank_timing;     /* 0x54 */
124                         u32 v_sync_timing;      /* 0x58 */
125                         u32 fbactive;           /* 0x5C */
126                         u32 dc_cursor_x;        /* 0x60 */
127                         u32 dc_cursor_y;        /* 0x64 */
128                         u32 dc_icon_x;          /* 0x68 */
129                         u32 dc_line_cnt;        /* 0x6C */
130                         u32 rsvd5;              /* 0x70 - palette address */
131                         u32 rsvd6;              /* 0x74 - palette data */
132                         u32 dfifo_diag;         /* 0x78 */
133                         u32 cfifo_diag;         /* 0x7C */
134                         u32 dc_vid_ds_delta;    /* 0x80 */
135                         u32 gliu0_mem_offset;   /* 0x84 */
136                         u32 dv_ctl;             /* 0x88 - added by LX */
137                         u32 dv_acc;             /* 0x8C */
138
139 #ifdef _GEODELX_
140                         u32 gfx_scale;
141                         u32 irq_filt_ctl;
142                         u32 filt_coeff1;
143                         u32 filt_coeff2;
144                         u32 vbi_event_ctl;
145                         u32 vbi_odd_ctl;
146                         u32 vbi_hor;
147                         u32 vbi_ln_odd;
148                         u32 vbi_ln_event;
149                         u32 vbi_pitch;
150                         u32 clr_key;
151                         u32 clr_key_mask;
152                         u32 clr_key_x;
153                         u32 clr_key_y;
154                         u32 irq;
155                         u32 rsvd8;
156                         u32 genlk_ctrl;
157                         u32 vid_even_y_st_offset;    /* 0xD8 */
158                         u32 vid_even_u_st_offset;    /* 0xDC */
159                         u32 vid_even_v_st_offset;    /* 0xE0 */
160                         u32 v_active_even_timing;    /* 0xE4 */
161                         u32 v_blank_even_timing;     /* 0xE8 */
162                         u32 v_sync_even_timing;      /* 0xEC */
163 #endif
164                 } r;
165         } dc;
166
167         union {
168                 unsigned char b[VP_REG_SIZE];
169
170                 struct {
171                         u64 vcfg;               /* 0x00 */
172                         u64 dcfg;               /* 0x08 */
173                         u64 vx;                 /* 0x10 */
174                         u64 vy;                 /* 0x18 */
175                         u64 vs;                 /* 0x20 */
176                         u64 vck;                /* 0x28 */
177                         u64 vcm;                /* 0x30 */
178                         u64 rsvd1;              /* 0x38 - Gamma address*/
179                         u64 rsvd2;              /* 0x40 - Gamma data*/
180                         u64 rsvd3;              /* 0x48 */
181                         u64 misc;               /* 0x50 */
182                         u64 ccs;                /* 0x58 */
183                         u64 rsvd4[3];           /* 0x60-0x70 */
184                         u64 vdc;                /* 0x78 */
185                         u64 vco;                /* 0x80 */
186                         u64 crc;                /* 0x88 */
187                         u64 crc32;              /* 0x90 */
188                         u64 vde;                /* 0x98 */
189                         u64 cck;                /* 0xA0 */
190                         u64 ccm;                /* 0xA8 */
191                         u64 cc1;                /* 0xB0 */
192                         u64 cc2;                /* 0xB8 */
193                         u64 a1x;                /* 0xC0 */
194                         u64 a1y;                /* 0xC8 */
195                         u64 a1c;                /* 0xD0 */
196                         u64 a1t;                /* 0xD8 */
197                         u64 a2x;                /* 0xE0 */
198                         u64 a2y;                /* 0xE8 */
199                         u64 a2c;                /* 0xF0 */
200                         u64 a2t;                /* 0xF8 */
201                         u64 a3x;                /* 0x100 */
202                         u64 a3y;                /* 0x108 */
203                         u64 a3c;                /* 0x110 */
204                         u64 a3t;                /* 0x118 */
205                         u64 vrr;                /* 0x120 */
206                         u64 awt;                /* 0x128 */
207                         u64 vtm;                /* 0x130 */
208 #ifdef _GEODELX_
209                         u64 vye;                /* 0x138 */
210                         u64 a1ye;               /* 0x140 */
211                         u32 a2ye;               /* 0x148 */
212                         u32 a3ye;               /* 0x150 */
213 #endif
214                 } r;
215         } vp;
216
217         union {
218                 unsigned char b[FP_REG_SIZE];
219
220                 struct {
221                         u64 pt1;                /* 0x400 */
222                         u64 pt2;                /* 0x408 */
223                         u64 pm;                 /* 0x410 */
224                         u64 dfc;                /* 0x418 */
225                         u64 blfsr;              /* 0x420 */
226                         u64 rlfsr;              /* 0x428 */
227                         u64 fmi;                /* 0x430 */
228                         u64 fmd;                /* 0x438 */
229                         u64 rsvd;               /* 0x440 */
230                         u64 dca;                /* 0x448 */
231                         u64 dmd;                /* 0x450 */
232                         u64 crc;                /* 0x458 */
233                         u64 fbb;                /* 0x460 */
234                         u64 crc32;              /* 0x468 */
235                 } r;
236         } fp;
237
238         u32 pal[DC_PAL_SIZE];
239         u32 gamma[256];
240 };
241
242 #endif