1 From 9b799b8a4ecbf560f8fb996e8e5147a8f7b9a1b3 Mon Sep 17 00:00:00 2001
2 From: Sascha Hauer <s.hauer@pengutronix.de>
3 Date: Wed, 13 May 2015 10:52:41 +0200
4 Subject: [PATCH 22/76] dt-bindings: thermal: Add binding document for
5 Mediatek thermal controller
7 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
9 .../bindings/thermal/mediatek-thermal.txt | 36 ++++++++++++++++++++
10 1 file changed, 36 insertions(+)
11 create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
14 +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
18 +This describes the device tree binding for the Mediatek thermal controller
19 +which measures the on-SoC temperatures. This device does not have its own ADC,
20 +instead it directly controls the AUXADC via AHB bus accesses. For this reason
21 +this device needs phandles to the AUXADC.
24 +- compatible: "mediatek,mt8173-thermal"
25 +- reg: Address range of the thermal controller
26 +- interrupts: IRQ for the thermal controller
27 +- clocks, clock-names: Clocks needed for the thermal controller. required
29 + "therm": Main clock needed for register access
30 + "auxadc": The AUXADC clock
31 +- resets, reset-names: Reference to the reset controller controlling the thermal
32 + controller. Required reset-names:
33 + "therm": The main reset line
34 +- auxadc: A phandle to the AUXADC which the thermal controller uses
35 +- apmixedsys: A phandle to the APMIXEDSYS controller.
36 +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
40 + thermal: thermal@1100b000 {
41 + #thermal-sensor-cells = <1>;
42 + compatible = "mediatek,mt8173-thermal";
43 + reg = <0 0x1100b000 0 0x1000>;
44 + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
45 + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
46 + clock-names = "therm", "auxadc";
47 + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
48 + reset-names = "therm";
50 + apmixedsys = <&apmixedsys>;