target/linux/mediatek/patches-4.4/0039-soc-mediatek-PMIC-wrap-add-a-slave-specific-struct.patch

   1 From ae593b270b87f9ed6c35dec3ac69dd6bda43c0a0 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 20 Jan 2016 09:55:08 +0100
   4 Subject: [PATCH 39/81] soc: mediatek: PMIC wrap: add a slave specific struct
   5
   6 This patch adds a new struct pwrap_slv_type that we use to store the slave
   7 specific data. The patch adds 2 new helper functions to access the dew
   8 registers. The slave type is looked up via the wrappers child node.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  drivers/soc/mediatek/mtk-pmic-wrap.c |  159 ++++++++++++++++++++++++----------
  13  1 file changed, 112 insertions(+), 47 deletions(-)
  14
  15 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
  16 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
  17 @@ -69,33 +69,54 @@
  18                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
  19                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
  20
  21 -/* macro for slave device wrapper registers */
  22 -#define PWRAP_DEW_BASE                 0xbc00
  23 -#define PWRAP_DEW_EVENT_OUT_EN         (PWRAP_DEW_BASE + 0x0)
  24 -#define PWRAP_DEW_DIO_EN               (PWRAP_DEW_BASE + 0x2)
  25 -#define PWRAP_DEW_EVENT_SRC_EN         (PWRAP_DEW_BASE + 0x4)
  26 -#define PWRAP_DEW_EVENT_SRC            (PWRAP_DEW_BASE + 0x6)
  27 -#define PWRAP_DEW_EVENT_FLAG           (PWRAP_DEW_BASE + 0x8)
  28 -#define PWRAP_DEW_READ_TEST            (PWRAP_DEW_BASE + 0xa)
  29 -#define PWRAP_DEW_WRITE_TEST           (PWRAP_DEW_BASE + 0xc)
  30 -#define PWRAP_DEW_CRC_EN               (PWRAP_DEW_BASE + 0xe)
  31 -#define PWRAP_DEW_CRC_VAL              (PWRAP_DEW_BASE + 0x10)
  32 -#define PWRAP_DEW_MON_GRP_SEL          (PWRAP_DEW_BASE + 0x12)
  33 -#define PWRAP_DEW_MON_FLAG_SEL         (PWRAP_DEW_BASE + 0x14)
  34 -#define PWRAP_DEW_EVENT_TEST           (PWRAP_DEW_BASE + 0x16)
  35 -#define PWRAP_DEW_CIPHER_KEY_SEL       (PWRAP_DEW_BASE + 0x18)
  36 -#define PWRAP_DEW_CIPHER_IV_SEL                (PWRAP_DEW_BASE + 0x1a)
  37 -#define PWRAP_DEW_CIPHER_LOAD          (PWRAP_DEW_BASE + 0x1c)
  38 -#define PWRAP_DEW_CIPHER_START         (PWRAP_DEW_BASE + 0x1e)
  39 -#define PWRAP_DEW_CIPHER_RDY           (PWRAP_DEW_BASE + 0x20)
  40 -#define PWRAP_DEW_CIPHER_MODE          (PWRAP_DEW_BASE + 0x22)
  41 -#define PWRAP_DEW_CIPHER_SWRST         (PWRAP_DEW_BASE + 0x24)
  42 -#define PWRAP_MT8173_DEW_CIPHER_IV0    (PWRAP_DEW_BASE + 0x26)
  43 -#define PWRAP_MT8173_DEW_CIPHER_IV1    (PWRAP_DEW_BASE + 0x28)
  44 -#define PWRAP_MT8173_DEW_CIPHER_IV2    (PWRAP_DEW_BASE + 0x2a)
  45 -#define PWRAP_MT8173_DEW_CIPHER_IV3    (PWRAP_DEW_BASE + 0x2c)
  46 -#define PWRAP_MT8173_DEW_CIPHER_IV4    (PWRAP_DEW_BASE + 0x2e)
  47 -#define PWRAP_MT8173_DEW_CIPHER_IV5    (PWRAP_DEW_BASE + 0x30)
  48 +/* defines for slave device wrapper registers */
  49 +enum dew_regs {
  50 +       PWRAP_DEW_BASE,
  51 +       PWRAP_DEW_DIO_EN,
  52 +       PWRAP_DEW_READ_TEST,
  53 +       PWRAP_DEW_WRITE_TEST,
  54 +       PWRAP_DEW_CRC_EN,
  55 +       PWRAP_DEW_CRC_VAL,
  56 +       PWRAP_DEW_MON_GRP_SEL,
  57 +       PWRAP_DEW_CIPHER_KEY_SEL,
  58 +       PWRAP_DEW_CIPHER_IV_SEL,
  59 +       PWRAP_DEW_CIPHER_RDY,
  60 +       PWRAP_DEW_CIPHER_MODE,
  61 +       PWRAP_DEW_CIPHER_SWRST,
  62 +
  63 +       /* MT6397 only regs */
  64 +       PWRAP_DEW_EVENT_OUT_EN,
  65 +       PWRAP_DEW_EVENT_SRC_EN,
  66 +       PWRAP_DEW_EVENT_SRC,
  67 +       PWRAP_DEW_EVENT_FLAG,
  68 +       PWRAP_DEW_MON_FLAG_SEL,
  69 +       PWRAP_DEW_EVENT_TEST,
  70 +       PWRAP_DEW_CIPHER_LOAD,
  71 +       PWRAP_DEW_CIPHER_START,
  72 +};
  73 +
  74 +static const u32 mt6397_regs[] = {
  75 +       [PWRAP_DEW_BASE] =              0xbc00,
  76 +       [PWRAP_DEW_EVENT_OUT_EN] =      0xbc00,
  77 +       [PWRAP_DEW_DIO_EN] =            0xbc02,
  78 +       [PWRAP_DEW_EVENT_SRC_EN] =      0xbc04,
  79 +       [PWRAP_DEW_EVENT_SRC] =         0xbc06,
  80 +       [PWRAP_DEW_EVENT_FLAG] =        0xbc08,
  81 +       [PWRAP_DEW_READ_TEST] =         0xbc0a,
  82 +       [PWRAP_DEW_WRITE_TEST] =        0xbc0c,
  83 +       [PWRAP_DEW_CRC_EN] =            0xbc0e,
  84 +       [PWRAP_DEW_CRC_VAL] =           0xbc10,
  85 +       [PWRAP_DEW_MON_GRP_SEL] =       0xbc12,
  86 +       [PWRAP_DEW_MON_FLAG_SEL] =      0xbc14,
  87 +       [PWRAP_DEW_EVENT_TEST] =        0xbc16,
  88 +       [PWRAP_DEW_CIPHER_KEY_SEL] =    0xbc18,
  89 +       [PWRAP_DEW_CIPHER_IV_SEL] =     0xbc1a,
  90 +       [PWRAP_DEW_CIPHER_LOAD] =       0xbc1c,
  91 +       [PWRAP_DEW_CIPHER_START] =      0xbc1e,
  92 +       [PWRAP_DEW_CIPHER_RDY] =        0xbc20,
  93 +       [PWRAP_DEW_CIPHER_MODE] =       0xbc22,
  94 +       [PWRAP_DEW_CIPHER_SWRST] =      0xbc24,
  95 +};
  96
  97  enum pwrap_regs {
  98         PWRAP_MUX_SEL,
  99 @@ -349,16 +370,26 @@ static int mt8135_regs[] = {
 100         [PWRAP_DCM_DBC_PRD] =           0x160,
 101  };
 102
 103 +enum pmic_type {
 104 +       PMIC_MT6397,
 105 +};
 106 +
 107  enum pwrap_type {
 108         PWRAP_MT8135,
 109         PWRAP_MT8173,
 110  };
 111
 112 +struct pwrap_slv_type {
 113 +       const u32 *dew_regs;
 114 +       enum pmic_type type;
 115 +};
 116 +
 117  struct pmic_wrapper {
 118         struct device *dev;
 119         void __iomem *base;
 120         struct regmap *regmap;
 121         const struct pmic_wrapper_type *master;
 122 +       const struct pwrap_slv_type *slave;
 123         struct clk *clk_spi;
 124         struct clk *clk_wrap;
 125         struct reset_control *rstc;
 126 @@ -544,7 +575,8 @@ static int pwrap_init_sidly(struct pmic_
 127
 128         for (i = 0; i < 4; i++) {
 129                 pwrap_writel(wrp, i, PWRAP_SIDLY);
 130 -               pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 131 +               pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST],
 132 +                          &rdata);
 133                 if (rdata == PWRAP_DEW_READ_TEST_VAL) {
 134                         dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
 135                         pass |= 1 << i;
 136 @@ -593,7 +625,8 @@ static bool pwrap_is_pmic_cipher_ready(s
 137         u32 rdata;
 138         int ret;
 139
 140 -       ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
 141 +       ret = pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY],
 142 +                        &rdata);
 143         if (ret)
 144                 return 0;
 145
 146 @@ -621,12 +654,12 @@ static int pwrap_init_cipher(struct pmic
 147         }
 148
 149         /* Config cipher mode @PMIC */
 150 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
 151 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
 152 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
 153 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
 154 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
 155 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
 156 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1);
 157 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0);
 158 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1);
 159 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2);
 160 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_LOAD], 0x1);
 161 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_START], 0x1);
 162
 163         /* wait for cipher data ready@AP */
 164         ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
 165 @@ -643,7 +676,7 @@ static int pwrap_init_cipher(struct pmic
 166         }
 167
 168         /* wait for cipher mode idle */
 169 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
 170 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_MODE], 0x1);
 171         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 172         if (ret) {
 173                 dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
 174 @@ -653,9 +686,11 @@ static int pwrap_init_cipher(struct pmic
 175         pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
 176
 177         /* Write Test */
 178 -       if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
 179 -           pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
 180 -                       (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 181 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 182 +                       PWRAP_DEW_WRITE_TEST_VAL) ||
 183 +           pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 184 +                      &rdata) ||
 185 +           (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 186                 dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
 187                 return -EFAULT;
 188         }
 189 @@ -677,8 +712,10 @@ static int pwrap_mt8135_init_soc_specifi
 190         writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
 191
 192         /* enable PMIC event out and sources */
 193 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 194 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 195 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 196 +                       0x1) ||
 197 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 198 +                       0xffff)) {
 199                 dev_err(wrp->dev, "enable dewrap fail\n");
 200                 return -EFAULT;
 201         }
 202 @@ -689,8 +726,10 @@ static int pwrap_mt8135_init_soc_specifi
 203  static int pwrap_mt8173_init_soc_specific(struct pmic_wrapper *wrp)
 204  {
 205         /* PMIC_DEWRAP enables */
 206 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 207 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 208 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 209 +                       0x1) ||
 210 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 211 +                       0xffff)) {
 212                 dev_err(wrp->dev, "enable dewrap fail\n");
 213                 return -EFAULT;
 214         }
 215 @@ -734,7 +773,7 @@ static int pwrap_init(struct pmic_wrappe
 216                 return ret;
 217
 218         /* Enable dual IO mode */
 219 -       pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
 220 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1);
 221
 222         /* Check IDLE & INIT_DONE in advance */
 223         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 224 @@ -746,7 +785,7 @@ static int pwrap_init(struct pmic_wrappe
 225         pwrap_writel(wrp, 1, PWRAP_DIO_EN);
 226
 227         /* Read Test */
 228 -       pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 229 +       pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], &rdata);
 230         if (rdata != PWRAP_DEW_READ_TEST_VAL) {
 231                 dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
 232                                 PWRAP_DEW_READ_TEST_VAL, rdata);
 233 @@ -759,12 +798,13 @@ static int pwrap_init(struct pmic_wrappe
 234                 return ret;
 235
 236         /* Signature checking - using CRC */
 237 -       if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
 238 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1))
 239                 return -EFAULT;
 240
 241         pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 242         pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
 243 -       pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
 244 +       pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
 245 +                    PWRAP_SIG_ADR);
 246         pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 247
 248         if (wrp->master->type == PWRAP_MT8135)
 249 @@ -818,6 +858,21 @@ static const struct regmap_config pwrap_
 250         .max_register = 0xffff,
 251  };
 252
 253 +static const struct pwrap_slv_type pmic_mt6397 = {
 254 +       .dew_regs = mt6397_regs,
 255 +       .type = PMIC_MT6397,
 256 +};
 257 +
 258 +static const struct of_device_id of_slave_match_tbl[] = {
 259 +       {
 260 +               .compatible = "mediatek,mt6397",
 261 +               .data = &pmic_mt6397,
 262 +       }, {
 263 +               /* sentinel */
 264 +       }
 265 +};
 266 +MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
 267 +
 268  static struct pmic_wrapper_type pwrap_mt8135 = {
 269         .regs = mt8135_regs,
 270         .type = PWRAP_MT8135,
 271 @@ -862,8 +917,17 @@ static int pwrap_probe(struct platform_d
 272         struct device_node *np = pdev->dev.of_node;
 273         const struct of_device_id *of_id =
 274                 of_match_device(of_pwrap_match_tbl, &pdev->dev);
 275 +       const struct of_device_id *of_slave_id = NULL;
 276         struct resource *res;
 277
 278 +       if (pdev->dev.of_node->child)
 279 +               of_slave_id = of_match_node(of_slave_match_tbl,
 280 +                                           pdev->dev.of_node->child);
 281 +       if (!of_slave_id) {
 282 +               dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
 283 +               return -EINVAL;
 284 +       }
 285 +
 286         wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
 287         if (!wrp)
 288                 return -ENOMEM;
 289 @@ -871,6 +935,7 @@ static int pwrap_probe(struct platform_d
 290         platform_set_drvdata(pdev, wrp);
 291
 292         wrp->master = of_id->data;
 293 +       wrp->slave = of_slave_id->data;
 294         wrp->dev = &pdev->dev;
 295
 296         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");