1 From 72112b91624dca6c636bd3a592471642d3988b27 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 20 Jul 2012 19:09:01 +0200
4 Subject: [PATCH 111/123] MTD: MIPS: lantiq: Add NAND support on Lantiq FALCON
7 The driver uses plat_nand. As the platform_device is loaded from DT, we need
8 to lookup the node and attach our falocn specific "struct platform_nand_data"
11 Signed-off-by: John Crispin <blogic@openwrt.org>
12 Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
13 Cc: linux-mtd@lists.infradead.org
15 drivers/mtd/nand/Kconfig | 8 ++++
16 drivers/mtd/nand/Makefile | 1 +
17 drivers/mtd/nand/falcon_nand.c | 82 ++++++++++++++++++++++++++++++++++++++++
18 3 files changed, 91 insertions(+)
19 create mode 100644 drivers/mtd/nand/falcon_nand.c
21 --- a/drivers/mtd/nand/Kconfig
22 +++ b/drivers/mtd/nand/Kconfig
23 @@ -572,4 +572,12 @@ config MTD_NAND_XWAY
24 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
25 to the External Bus Unit (EBU).
27 +config MTD_NAND_FALCON
28 + tristate "Support for NAND on Lantiq FALC-ON SoC"
29 + depends on LANTIQ && SOC_FALCON
30 + select MTD_NAND_PLATFORM
32 + Enables support for NAND Flash chips on Lantiq FALC-ON SoCs. NAND is
33 + attached to the External Bus Unit (EBU).
36 --- a/drivers/mtd/nand/Makefile
37 +++ b/drivers/mtd/nand/Makefile
38 @@ -53,5 +53,6 @@ obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
39 obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
40 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
41 obj-$(CONFIG_MTD_NAND_XWAY) += xway_nand.o
42 +obj-$(CONFIG_MTD_NAND_FALCON) += falcon_nand.o
44 nand-objs := nand_base.o nand_bbt.o
46 +++ b/drivers/mtd/nand/falcon_nand.c
49 + * This program is free software; you can redistribute it and/or modify it
50 + * under the terms of the GNU General Public License version 2 as published
51 + * by the Free Software Foundation.
53 + * Copyright (C) 2011 Thomas Langer <thomas.langer@lantiq.com>
54 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
57 +#include <linux/mtd/nand.h>
58 +#include <linux/of_platform.h>
60 +#include <lantiq_soc.h>
63 +/* address lines used for NAND control signals */
64 +#define NAND_ADDR_ALE 0x10000
65 +#define NAND_ADDR_CLE 0x20000
66 +/* Ready/Busy Status */
67 +#define MODCON_STS 0x0002
68 +/* Ready/Busy Status Edge */
69 +#define MODCON_STSEDGE 0x0004
70 +#define LTQ_EBU_MODCON 0x000C
72 +static const char *part_probes[] = { "cmdlinepart", "ofpart", NULL };
74 +static int falcon_nand_ready(struct mtd_info *mtd)
76 + u32 modcon = ltq_ebu_r32(LTQ_EBU_MODCON);
78 + return (((modcon & (MODCON_STS | MODCON_STSEDGE)) ==
79 + (MODCON_STS | MODCON_STSEDGE)));
82 +static void falcon_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
84 + struct nand_chip *this = mtd->priv;
85 + unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
87 + if (ctrl & NAND_CTRL_CHANGE) {
88 + nandaddr &= ~(NAND_ADDR_ALE | NAND_ADDR_CLE);
90 + if (ctrl & NAND_CLE)
91 + nandaddr |= NAND_ADDR_CLE;
92 + if (ctrl & NAND_ALE)
93 + nandaddr |= NAND_ADDR_ALE;
95 + this->IO_ADDR_W = (void __iomem *) nandaddr;
98 + if (cmd != NAND_CMD_NONE)
99 + writeb(cmd, this->IO_ADDR_W);
102 +static struct platform_nand_data falcon_nand_data = {
106 + .part_probe_types = part_probes,
109 + .cmd_ctrl = falcon_hwcontrol,
110 + .dev_ready = falcon_nand_ready,
114 +static int __init falcon_register_nand(void)
116 + struct device_node *node;
117 + struct platform_device *pdev;
119 + node = of_find_compatible_node(NULL, NULL, "lantiq,nand-falcon");
122 + pdev = of_find_device_by_node(node);
124 + pdev->dev.platform_data = &falcon_nand_data;
129 +arch_initcall(falcon_register_nand);