target/linux/lantiq/patches-3.7/0102-MIPS-lantiq-add-GPHY-clock-gate-bits.patch

   1 From 05d6c964722224e8cf2902606744e29a835e7d5f Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 3 Dec 2012 21:35:01 +0100
   4 Subject: [PATCH 102/123] MIPS: lantiq: add GPHY clock gate bits
   5
   6 Explicitly enable the clock gate of the internal GPHYs found on xrx200.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/lantiq/xway/reset.c   |    9 +++++++++
  11  arch/mips/lantiq/xway/sysctrl.c |    1 +
  12  2 files changed, 10 insertions(+)
  13
  14 --- a/arch/mips/lantiq/xway/reset.c
  15 +++ b/arch/mips/lantiq/xway/reset.c
  16 @@ -78,10 +78,19 @@ static struct ltq_xrx200_gphy_reset {
  17  /* reset and boot a gphy. these phys only exist on xrx200 SoC */
  18  int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
  19  {
  20 +       struct clk *clk;
  21 +
  22         if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
  23                 dev_err(dev, "this SoC has no GPHY\n");
  24                 return -EINVAL;
  25         }
  26 +
  27 +       clk = clk_get_sys("1f203000.rcu", "gphy");
  28 +       if (IS_ERR(clk))
  29 +               return PTR_ERR(clk);
  30 +
  31 +       clk_enable(clk);
  32 +
  33         if (id > 1) {
  34                 dev_err(dev, "%u is an invalid gphy id\n", id);
  35                 return -EINVAL;
  36 --- a/arch/mips/lantiq/xway/sysctrl.c
  37 +++ b/arch/mips/lantiq/xway/sysctrl.c
  38 @@ -374,6 +374,7 @@ void __init ltq_soc_init(void)
  39                                 PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
  40                                 PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
  41                                 PMU_PPE_QSB | PMU_PPE_TOP);
  42 +               clkdev_add_pmu("1f203000.rcu", "gphy", 0, PMU_GPHY);
  43         } else if (of_machine_is_compatible("lantiq,ar9")) {
  44                 clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
  45                                 ltq_ar9_fpi_hz());