[lantiq] update 3.2 patches
[openwrt.git] / target / linux / lantiq / patches-3.2 / 0021-MIPS-lantiq-use-devres-managed-gpios.patch
1 From 20ed991ce59030544426dc3422da7ee76667537b Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 8 Mar 2012 08:37:25 +0100
4 Subject: [PATCH 21/73] MIPS: lantiq: use devres managed gpios
5
6 3.2 introduced devm_request_gpio() to allow managed gpios.
7
8 The devres api requires a struct device pointer to work. Add a parameter to ltq_gpio_request()
9 so that managed gpios can work.
10
11 Signed-off-by: John Crispin <blogic@openwrt.org>
12 ---
13  .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |    4 +---
14  arch/mips/include/asm/mach-lantiq/lantiq.h         |    4 ++++
15  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 ---
16  arch/mips/lantiq/falcon/gpio.c                     |    4 ++--
17  arch/mips/lantiq/falcon/prom.c                     |    7 -------
18  arch/mips/lantiq/xway/gpio.c                       |    4 ++--
19  arch/mips/lantiq/xway/gpio_stp.c                   |   13 ++++++++-----
20  arch/mips/pci/pci-lantiq.c                         |   18 ++++++++++--------
21  drivers/net/ethernet/lantiq_etop.c                 |    9 ++++++---
22  drivers/tty/serial/lantiq.c                        |   12 ++++++++++++
23  10 files changed, 45 insertions(+), 33 deletions(-)
24
25 diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
26 index b074748..a5dc06a 100644
27 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
28 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
29 @@ -126,9 +126,7 @@ extern __iomem void *ltq_sys1_membase;
30  #define ltq_sys1_w32_mask(clear, set, reg)   \
31         ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
32  
33 -/* gpio_request wrapper to help configure the pin */
34 -extern int  ltq_gpio_request(unsigned int pin, unsigned int mux,
35 -                               unsigned int dir, const char *name);
36 +/* gpio wrapper to help configure the pin muxing */
37  extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
38  
39  /* to keep the irq code generic we need to define these to 0 as falcon
40 diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h
41 index 188de0f..924b91a 100644
42 --- a/arch/mips/include/asm/mach-lantiq/lantiq.h
43 +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
44 @@ -37,6 +37,10 @@ extern unsigned int ltq_get_soc_type(void);
45  /* spinlock all ebu i/o */
46  extern spinlock_t ebu_lock;
47  
48 +/* request a non-gpio and set the PIO config */
49 +extern int ltq_gpio_request(struct device *dev, unsigned int pin,
50 +               unsigned int mux, unsigned int dir, const char *name);
51 +
52  /* some irq helpers */
53  extern void ltq_disable_irq(struct irq_data *data);
54  extern void ltq_mask_and_ack_irq(struct irq_data *data);
55 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
56 index 6983d75..6c5b705 100644
57 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
58 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
59 @@ -145,9 +145,6 @@
60  extern __iomem void *ltq_ebu_membase;
61  extern __iomem void *ltq_cgu_membase;
62  
63 -/* request a non-gpio and set the PIO config */
64 -extern int  ltq_gpio_request(unsigned int pin, unsigned int mux,
65 -                               unsigned int dir, const char *name);
66  extern void ltq_pmu_enable(unsigned int module);
67  extern void ltq_pmu_disable(unsigned int module);
68  extern void ltq_cgu_enable(unsigned int clk);
69 diff --git a/arch/mips/lantiq/falcon/gpio.c b/arch/mips/lantiq/falcon/gpio.c
70 index 28f8639..a44f71b 100644
71 --- a/arch/mips/lantiq/falcon/gpio.c
72 +++ b/arch/mips/lantiq/falcon/gpio.c
73 @@ -97,7 +97,7 @@ int ltq_gpio_mux_set(unsigned int pin, unsigned int mux)
74  }
75  EXPORT_SYMBOL(ltq_gpio_mux_set);
76  
77 -int ltq_gpio_request(unsigned int pin, unsigned int mux,
78 +int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
79                         unsigned int dir, const char *name)
80  {
81         int port = pin / 100;
82 @@ -106,7 +106,7 @@ int ltq_gpio_request(unsigned int pin, unsigned int mux,
83         if (offset >= PINS_PER_PORT || port >= MAX_PORTS)
84                 return -EINVAL;
85  
86 -       if (gpio_request(pin, name)) {
87 +       if (devm_gpio_request(dev, pin, name)) {
88                 pr_err("failed to setup lantiq gpio: %s\n", name);
89                 return -EBUSY;
90         }
91 diff --git a/arch/mips/lantiq/falcon/prom.c b/arch/mips/lantiq/falcon/prom.c
92 index b50d6f9..f98b389 100644
93 --- a/arch/mips/lantiq/falcon/prom.c
94 +++ b/arch/mips/lantiq/falcon/prom.c
95 @@ -27,9 +27,6 @@
96  #define TYPE_SHIFT     26
97  #define TYPE_MASK      0x3C000000
98  
99 -#define MUXC_SIF_RX_PIN                112
100 -#define MUXC_SIF_TX_PIN                113
101 -
102  /* this parameter allows us enable/disable asc1 via commandline */
103  static int register_asc1;
104  static int __init
105 @@ -48,10 +45,6 @@ ltq_soc_setup(void)
106         falcon_register_gpio();
107         if (register_asc1) {
108                 ltq_register_asc(1);
109 -               if (ltq_gpio_request(MUXC_SIF_RX_PIN, 3, 0, "asc1-rx"))
110 -                       pr_err("failed to request asc1-rx");
111 -               if (ltq_gpio_request(MUXC_SIF_TX_PIN, 3, 1, "asc1-tx"))
112 -                       pr_err("failed to request asc1-tx");
113                 ltq_sysctl_activate(SYSCTL_SYS1, ACTS_ASC1_ACT);
114         }
115  }
116 diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
117 index 14ff7c7..54ec6c9 100644
118 --- a/arch/mips/lantiq/xway/gpio.c
119 +++ b/arch/mips/lantiq/xway/gpio.c
120 @@ -50,14 +50,14 @@ int irq_to_gpio(unsigned int gpio)
121  }
122  EXPORT_SYMBOL(irq_to_gpio);
123  
124 -int ltq_gpio_request(unsigned int pin, unsigned int mux,
125 +int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
126                         unsigned int dir, const char *name)
127  {
128         int id = 0;
129  
130         if (pin >= (MAX_PORTS * PINS_PER_PORT))
131                 return -EINVAL;
132 -       if (gpio_request(pin, name)) {
133 +       if (devm_gpio_request(dev, pin, name)) {
134                 pr_err("failed to setup lantiq gpio: %s\n", name);
135                 return -EBUSY;
136         }
137 diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
138 index cb6f170..e6b4809 100644
139 --- a/arch/mips/lantiq/xway/gpio_stp.c
140 +++ b/arch/mips/lantiq/xway/gpio_stp.c
141 @@ -80,11 +80,6 @@ static struct gpio_chip ltq_stp_chip = {
142  
143  static int ltq_stp_hw_init(void)
144  {
145 -       /* the 3 pins used to control the external stp */
146 -       ltq_gpio_request(4, 2, 1, "stp-st");
147 -       ltq_gpio_request(5, 2, 1, "stp-d");
148 -       ltq_gpio_request(6, 2, 1, "stp-sh");
149 -
150         /* sane defaults */
151         ltq_stp_w32(0, LTQ_STP_AR);
152         ltq_stp_w32(0, LTQ_STP_CPU0);
153 @@ -133,6 +128,14 @@ static int __devinit ltq_stp_probe(struct platform_device *pdev)
154                 dev_err(&pdev->dev, "failed to remap STP memory\n");
155                 return -ENOMEM;
156         }
157 +
158 +       /* the 3 pins used to control the external stp */
159 +       if (ltq_gpio_request(&pdev->dev, 4, 2, 1, "stp-st") ||
160 +                       ltq_gpio_request(&pdev->dev, 5, 2, 1, "stp-d") ||
161 +                       ltq_gpio_request(&pdev->dev, 6, 2, 1, "stp-sh")) {
162 +               dev_err(&pdev->dev, "failed to request needed gpios\n");
163 +               return -EBUSY;
164 +       }
165         ret = gpiochip_add(&ltq_stp_chip);
166         if (!ret)
167                 ret = ltq_stp_hw_init();
168 diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
169 index c001c5a..47b551c 100644
170 --- a/arch/mips/pci/pci-lantiq.c
171 +++ b/arch/mips/pci/pci-lantiq.c
172 @@ -150,24 +150,26 @@ static u32 ltq_calc_bar11mask(void)
173         return bar11mask;
174  }
175  
176 -static void ltq_pci_setup_gpio(int gpio)
177 +static void ltq_pci_setup_gpio(struct device *dev)
178  {
179 +       struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
180         int i;
181         for (i = 0; i < ARRAY_SIZE(ltq_pci_gpio_map); i++) {
182 -               if (gpio & (1 << i)) {
183 -                       ltq_gpio_request(ltq_pci_gpio_map[i].pin,
184 +               if (conf->gpio & (1 << i)) {
185 +                       ltq_gpio_request(dev, ltq_pci_gpio_map[i].pin,
186                                 ltq_pci_gpio_map[i].mux,
187                                 ltq_pci_gpio_map[i].dir,
188                                 ltq_pci_gpio_map[i].name);
189                 }
190         }
191 -       ltq_gpio_request(21, 0, 1, "pci-reset");
192 -       ltq_pci_req_mask = (gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
193 +       ltq_gpio_request(dev, 21, 0, 1, "pci-reset");
194 +       ltq_pci_req_mask = (conf->gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
195  }
196  
197 -static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
198 +static int __devinit ltq_pci_startup(struct device *dev)
199  {
200         u32 temp_buffer;
201 +       struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
202  
203         /* set clock to 33Mhz */
204         if (ltq_is_ar9()) {
205 @@ -190,7 +192,7 @@ static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
206         }
207  
208         /* setup pci clock and gpis used by pci */
209 -       ltq_pci_setup_gpio(conf->gpio);
210 +       ltq_pci_setup_gpio(dev);
211  
212         /* enable auto-switching between PCI and EBU */
213         ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
214 @@ -275,7 +277,7 @@ static int __devinit ltq_pci_probe(struct platform_device *pdev)
215                 ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE);
216         ltq_pci_controller.io_map_base =
217                 (unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1);
218 -       ltq_pci_startup(ltq_pci_data);
219 +       ltq_pci_startup(&pdev->dev);
220         register_pci_controller(&ltq_pci_controller);
221  
222         return 0;
223 diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c
224 index dddb9fe..fcbb9c7 100644
225 --- a/drivers/net/ethernet/lantiq_etop.c
226 +++ b/drivers/net/ethernet/lantiq_etop.c
227 @@ -291,9 +291,6 @@ ltq_etop_gbit_init(void)
228  {
229         ltq_pmu_enable(PMU_SWITCH);
230  
231 -       ltq_gpio_request(42, 2, 1, "MDIO");
232 -       ltq_gpio_request(43, 2, 1, "MDC");
233 -
234         ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0);
235         /** Disable MDIO auto polling mode */
236         ltq_gbit_w32_mask(0, PX_CTL_DMDIO, LTQ_GBIT_P0_CTL);
237 @@ -868,6 +865,12 @@ ltq_etop_probe(struct platform_device *pdev)
238                         err = -ENOMEM;
239                         goto err_out;
240                 }
241 +               if (ltq_gpio_request(&pdev->dev, 42, 2, 1, "MDIO") ||
242 +                               ltq_gpio_request(&pdev->dev, 43, 2, 1, "MDC")) {
243 +                       dev_err(&pdev->dev, "failed to request MDIO gpios\n");
244 +                       err = -EBUSY;
245 +                       goto err_out;
246 +               }
247         }
248  
249         dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
250 diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
251 index 96c1cac..5d25828 100644
252 --- a/drivers/tty/serial/lantiq.c
253 +++ b/drivers/tty/serial/lantiq.c
254 @@ -107,6 +107,9 @@
255  #define ASCFSTAT_TXFREEMASK    0x3F000000
256  #define ASCFSTAT_TXFREEOFF     24
257  
258 +#define MUXC_SIF_RX_PIN                112
259 +#define MUXC_SIF_TX_PIN                113
260 +
261  static void lqasc_tx_chars(struct uart_port *port);
262  static struct ltq_uart_port *lqasc_port[MAXPORTS];
263  static struct uart_driver lqasc_reg;
264 @@ -529,6 +532,15 @@ lqasc_request_port(struct uart_port *port)
265                 if (port->membase == NULL)
266                         return -ENOMEM;
267         }
268 +       if (ltq_is_falcon() && (port->line == 1)) {
269 +               struct ltq_uart_port *ltq_port = lqasc_port[pdev->id];
270 +               if (ltq_gpio_request(&pdev->dev, MUXC_SIF_RX_PIN,
271 +                               3, 0, "asc1-rx"))
272 +                       return -EBUSY;
273 +               if (ltq_gpio_request(&pdev->dev, MUXC_SIF_TX_PIN,
274 +                               3, 1, "asc1-tx"))
275 +                       return -EBUSY;
276 +       }
277         return 0;
278  }
279  
280 -- 
281 1.7.9.1
282