1 From 8c19ced548538d964dcfb83bdf9ea9e8fbb7bdb1 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 10/34] MIPS: lantiq: wifi and ethernet eeprom handling
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
9 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
10 arch/mips/lantiq/xway/Makefile | 2 +
11 arch/mips/lantiq/xway/ath_eep.c | 237 ++++++++++++++++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
14 6 files changed, 417 insertions(+)
15 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
16 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
17 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
18 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
20 diff --git a/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
22 index 0000000..095d261
24 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
26 +#ifndef _PCI_ATH_FIXUP
27 +#define _PCI_ATH_FIXUP
29 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
31 +#endif /* _PCI_ATH_FIXUP */
32 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 index 133336b..779715c 100644
34 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
35 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
36 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr);
37 extern void ltq_pmu_enable(unsigned int module);
38 extern void ltq_pmu_disable(unsigned int module);
40 +/* allow the ethernet driver to load a flash mapped mac addr */
41 +const u8* ltq_get_eth_mac(void);
43 #endif /* CONFIG_SOC_TYPE_XWAY */
44 #endif /* _LTQ_XWAY_H__ */
45 diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
46 index da51fe0..0af7a54 100644
47 --- a/arch/mips/lantiq/xway/Makefile
48 +++ b/arch/mips/lantiq/xway/Makefile
49 @@ -2,4 +2,6 @@ obj-y := prom.o sysctrl.o clk.o reset.o dma.o timer.o dcdc.o
53 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
55 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
56 diff --git a/arch/mips/lantiq/xway/ath_eep.c b/arch/mips/lantiq/xway/ath_eep.c
58 index 0000000..1146f01
60 +++ b/arch/mips/lantiq/xway/ath_eep.c
63 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
64 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
65 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
66 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
67 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
69 + * This program is free software; you can redistribute it and/or modify it
70 + * under the terms of the GNU General Public License version 2 as published
71 + * by the Free Software Foundation.
74 +#include <linux/init.h>
75 +#include <linux/module.h>
76 +#include <linux/platform_device.h>
77 +#include <linux/etherdevice.h>
78 +#include <linux/ath5k_platform.h>
79 +#include <linux/ath9k_platform.h>
80 +#include <linux/pci.h>
81 +#include <linux/err.h>
82 +#include <linux/mtd/mtd.h>
83 +#include <pci-ath-fixup.h>
84 +#include <lantiq_soc.h>
85 +#include <linux/of_net.h>
87 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
88 +struct ath5k_platform_data ath5k_pdata;
89 +struct ath9k_platform_data ath9k_pdata = {
92 +static u8 athxk_eeprom_mac[6];
94 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
96 + dev->dev.platform_data = &ath9k_pdata;
100 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
102 + struct device_node *np = pdev->dev.of_node, *mtd_np;
104 + u32 mac_inc = 0, pci_slot = 0;
106 + struct mtd_info *the_mtd;
107 + size_t flash_readlen;
108 + const __be32 *list;
112 + list = of_get_property(np, "ath,eep-flash", &i);
113 + if (!list || (i != (2 * sizeof(*list)))) {
114 + dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
118 + phandle = be32_to_cpup(list++);
120 + dev_err(&pdev->dev, "failed to find phandle\n");
124 + mtd_np = of_find_node_by_phandle(phandle);
126 + dev_err(&pdev->dev, "failed to find mtd node\n");
130 + part = of_get_property(mtd_np, "label", NULL);
132 + part = mtd_np->name;
134 + the_mtd = get_mtd_device_nm(part);
135 + if (the_mtd == ERR_PTR(-ENODEV)) {
136 + dev_err(&pdev->dev, "failed to find mtd device\n");
140 + i = mtd_read(the_mtd, be32_to_cpup(list),
141 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
142 + (void *) ath9k_pdata.eeprom_data);
143 + put_mtd_device(the_mtd);
144 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
145 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
149 + if (of_find_property(np, "ath,eep-swap", NULL))
150 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
151 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
153 + if (of_find_property(np, "ath,eep-endian", NULL)) {
154 + ath9k_pdata.endian_check = true;
156 + dev_info(&pdev->dev, "endian check enabled.\n");
159 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
160 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
162 + random_ether_addr(athxk_eeprom_mac);
163 + if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
164 + dev_warn(&pdev->dev, "using random mac\n");
167 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
168 + athxk_eeprom_mac[5] += mac_inc;
170 + ath9k_pdata.macaddr = athxk_eeprom_mac;
171 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
173 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
174 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
175 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
178 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
183 +static struct of_device_id ath9k_eeprom_ids[] = {
184 + { .compatible = "ath9k,eeprom" },
188 +static struct platform_driver ath9k_eeprom_driver = {
190 + .name = "ath9k,eeprom",
191 + .owner = THIS_MODULE,
192 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
196 +static int __init of_ath9k_eeprom_init(void)
198 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
200 +late_initcall(of_ath9k_eeprom_init);
203 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
205 + dev->dev.platform_data = &ath5k_pdata;
209 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
211 + struct device_node *np = pdev->dev.of_node, *mtd_np;
215 + struct mtd_info *the_mtd;
216 + size_t flash_readlen;
217 + const __be32 *list;
221 + list = of_get_property(np, "ath,eep-flash", &i);
222 + if (!list || (i != (2 * sizeof(*list)))) {
223 + dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
227 + phandle = be32_to_cpup(list++);
229 + dev_err(&pdev->dev, "failed to find phandle\n");
233 + mtd_np = of_find_node_by_phandle(phandle);
235 + dev_err(&pdev->dev, "failed to find mtd node\n");
239 + part = of_get_property(mtd_np, "label", NULL);
241 + part = mtd_np->name;
243 + the_mtd = get_mtd_device_nm(part);
244 + if (the_mtd == ERR_PTR(-ENODEV)) {
245 + dev_err(&pdev->dev, "failed to find mtd device\n");
249 + i = mtd_read(the_mtd, be32_to_cpup(list),
250 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
251 + (void *) ath5k_pdata.eeprom_data);
252 + put_mtd_device(the_mtd);
253 + if ((sizeof(ath5k_pdata.eeprom_data) != flash_readlen) || i) {
254 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
258 + if (of_find_property(np, "ath,eep-swap", NULL))
259 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
260 + ath5k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
262 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
263 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
265 + random_ether_addr(athxk_eeprom_mac);
266 + if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
267 + dev_warn(&pdev->dev, "using random mac\n");
270 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
271 + athxk_eeprom_mac[5] += mac_inc;
273 + ath5k_pdata.macaddr = athxk_eeprom_mac;
274 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
276 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
281 +static struct of_device_id ath5k_eeprom_ids[] = {
282 + { .compatible = "ath5k,eeprom" },
286 +static struct platform_driver ath5k_eeprom_driver = {
288 + .name = "ath5k,eeprom",
289 + .owner = THIS_MODULE,
290 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
294 +static int __init of_ath5k_eeprom_init(void)
296 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
298 +device_initcall(of_ath5k_eeprom_init);
299 diff --git a/arch/mips/lantiq/xway/pci-ath-fixup.c b/arch/mips/lantiq/xway/pci-ath-fixup.c
301 index 0000000..c87ffb2
303 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
306 + * Atheros AP94 reference board PCI initialization
308 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
310 + * This program is free software; you can redistribute it and/or modify it
311 + * under the terms of the GNU General Public License version 2 as published
312 + * by the Free Software Foundation.
315 +#include <linux/pci.h>
316 +#include <linux/init.h>
317 +#include <linux/delay.h>
318 +#include <lantiq_soc.h>
320 +#define LTQ_PCI_MEM_BASE 0x18000000
327 +static int ath_num_fixups;
328 +static struct ath_fixup ath_fixups[2];
330 +static void ath_pci_fixup(struct pci_dev *dev)
333 + u16 *cal_data = NULL;
339 + for (i = 0; i < ath_num_fixups; i++) {
340 + if (ath_fixups[i].cal_data == NULL)
343 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
346 + cal_data = ath_fixups[i].cal_data;
350 + if (cal_data == NULL)
353 + if (*cal_data != 0xa55a) {
354 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
358 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
360 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
362 + pr_err("pci %s: ioremap error\n", pci_name(dev));
366 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
367 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
368 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
369 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
370 + pci_write_config_word(dev, PCI_COMMAND, cmd);
372 + /* set pointer to first reg address */
374 + while (*cal_data != 0xffff) {
378 + val |= (*cal_data++) << 16;
380 + ltq_w32(swab32(val), mem + reg);
384 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
385 + dev->vendor = val & 0xffff;
386 + dev->device = (val >> 16) & 0xffff;
388 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
389 + dev->revision = val & 0xff;
390 + dev->class = val >> 8; /* upper 3 bytes */
392 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
393 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
395 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
396 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
397 + pci_write_config_word(dev, PCI_COMMAND, cmd);
399 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
403 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
405 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
407 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
410 + ath_fixups[ath_num_fixups].slot = slot;
411 + ath_fixups[ath_num_fixups].cal_data = cal_data;
414 diff --git a/arch/mips/lantiq/xway/rt_eep.c b/arch/mips/lantiq/xway/rt_eep.c
416 index 0000000..00f2d4c
418 +++ b/arch/mips/lantiq/xway/rt_eep.c
421 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
423 + * This program is free software; you can redistribute it and/or modify it
424 + * under the terms of the GNU General Public License version 2 as published
425 + * by the Free Software Foundation.
428 +#include <linux/init.h>
429 +#include <linux/module.h>
430 +#include <linux/pci.h>
431 +#include <linux/platform_device.h>
432 +#include <linux/rt2x00_platform.h>
434 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
435 +static struct rt2x00_platform_data rt2x00_pdata;
437 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
439 + dev->dev.platform_data = &rt2x00_pdata;
443 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
445 + struct device_node *np = pdev->dev.of_node;
446 + const char *eeprom;
448 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
449 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
453 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
454 +// rt2x00_pdata.mac_address = mac;
455 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
457 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
462 +static struct of_device_id ralink_eeprom_ids[] = {
463 + { .compatible = "ralink,eeprom" },
467 +static struct platform_driver ralink_eeprom_driver = {
469 + .name = "ralink,eeprom",
470 + .owner = THIS_MODULE,
471 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
475 +static int __init of_ralink_eeprom_init(void)
477 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
479 +device_initcall(of_ralink_eeprom_init);