target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From 8c19ced548538d964dcfb83bdf9ea9e8fbb7bdb1 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 13 Mar 2013 10:02:58 +0100
   4 Subject: [PATCH 10/34] MIPS: lantiq: wifi and ethernet eeprom handling
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
  10  arch/mips/lantiq/xway/Makefile                     |    2 +
  11  arch/mips/lantiq/xway/ath_eep.c                    |  237 ++++++++++++++++++++
  12  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 +++++++++
  13  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  14  6 files changed, 417 insertions(+)
  15  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  16  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  17  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  18  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  19
  20 --- /dev/null
  21 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  22 @@ -0,0 +1,6 @@
  23 +#ifndef _PCI_ATH_FIXUP
  24 +#define _PCI_ATH_FIXUP
  25 +
  26 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  27 +
  28 +#endif /* _PCI_ATH_FIXUP */
  29 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  30 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  31 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
  32  extern void ltq_pmu_enable(unsigned int module);
  33  extern void ltq_pmu_disable(unsigned int module);
  34
  35 +/* allow the ethernet driver to load a flash mapped mac addr */
  36 +const u8* ltq_get_eth_mac(void);
  37 +
  38  #endif /* CONFIG_SOC_TYPE_XWAY */
  39  #endif /* _LTQ_XWAY_H__ */
  40 --- a/arch/mips/lantiq/xway/Makefile
  41 +++ b/arch/mips/lantiq/xway/Makefile
  42 @@ -2,4 +2,6 @@ obj-y := prom.o sysctrl.o clk.o reset.o
  43
  44  obj-y += vmmc.o
  45
  46 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  47 +
  48  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  49 --- /dev/null
  50 +++ b/arch/mips/lantiq/xway/ath_eep.c
  51 @@ -0,0 +1,250 @@
  52 +/*
  53 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  54 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  55 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  56 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  57 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  58 + *
  59 + *  This program is free software; you can redistribute it and/or modify it
  60 + *  under the terms of the GNU General Public License version 2 as published
  61 + *  by the Free Software Foundation.
  62 + */
  63 +
  64 +#include <linux/init.h>
  65 +#include <linux/module.h>
  66 +#include <linux/platform_device.h>
  67 +#include <linux/etherdevice.h>
  68 +#include <linux/ath5k_platform.h>
  69 +#include <linux/ath9k_platform.h>
  70 +#include <linux/pci.h>
  71 +#include <linux/err.h>
  72 +#include <linux/mtd/mtd.h>
  73 +#include <pci-ath-fixup.h>
  74 +#include <lantiq_soc.h>
  75 +#include <linux/of_net.h>
  76 +
  77 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  78 +struct ath5k_platform_data ath5k_pdata;
  79 +struct ath9k_platform_data ath9k_pdata = {
  80 +       .led_pin = -1,
  81 +};
  82 +static u8 athxk_eeprom_mac[6];
  83 +
  84 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  85 +{
  86 +       dev->dev.platform_data = &ath9k_pdata;
  87 +       return 0;
  88 +}
  89 +
  90 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  91 +{
  92 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
  93 +       int mac_offset;
  94 +       u32 mac_inc = 0, pci_slot = 0;
  95 +       int i;
  96 +       struct mtd_info *the_mtd;
  97 +       size_t flash_readlen;
  98 +       const __be32 *list;
  99 +       const char *part;
 100 +       phandle phandle;
 101 +
 102 +       list = of_get_property(np, "ath,eep-flash", &i);
 103 +       if (!list || (i !=  (2 * sizeof(*list)))) {
 104 +               dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
 105 +               return -ENODEV;
 106 +       }
 107 +
 108 +       phandle = be32_to_cpup(list++);
 109 +       if (!phandle) {
 110 +               dev_err(&pdev->dev, "failed to find phandle\n");
 111 +               return -ENODEV;
 112 +       }
 113 +
 114 +       mtd_np = of_find_node_by_phandle(phandle);
 115 +       if (!mtd_np) {
 116 +               dev_err(&pdev->dev, "failed to find mtd node\n");
 117 +               return -ENODEV;
 118 +       }
 119 +
 120 +       part = of_get_property(mtd_np, "label", NULL);
 121 +       if (!part)
 122 +               part = mtd_np->name;
 123 +
 124 +       the_mtd = get_mtd_device_nm(part);
 125 +       if (the_mtd == ERR_PTR(-ENODEV)) {
 126 +               dev_err(&pdev->dev, "failed to find mtd device\n");
 127 +               return -ENODEV;
 128 +       }
 129 +
 130 +       i = mtd_read(the_mtd, be32_to_cpup(list),
 131 +                       ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 132 +                       (void *) ath9k_pdata.eeprom_data);
 133 +       put_mtd_device(the_mtd);
 134 +       if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 135 +               dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 136 +               return -ENODEV;
 137 +       }
 138 +
 139 +       if (of_find_property(np, "ath,eep-swap", NULL))
 140 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 141 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 142 +
 143 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 144 +               ath9k_pdata.endian_check = true;
 145 +
 146 +               dev_info(&pdev->dev, "endian check enabled.\n");
 147 +       }
 148 +
 149 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 150 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
 151 +       } else {
 152 +               random_ether_addr(athxk_eeprom_mac);
 153 +               if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
 154 +                       dev_warn(&pdev->dev, "using random mac\n");
 155 +       }
 156 +
 157 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 158 +               athxk_eeprom_mac[5] += mac_inc;
 159 +
 160 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 161 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 162 +
 163 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 164 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 165 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 166 +       }
 167 +
 168 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 169 +
 170 +       return 0;
 171 +}
 172 +
 173 +static struct of_device_id ath9k_eeprom_ids[] = {
 174 +       { .compatible = "ath9k,eeprom" },
 175 +       { }
 176 +};
 177 +
 178 +static struct platform_driver ath9k_eeprom_driver = {
 179 +       .driver         = {
 180 +               .name           = "ath9k,eeprom",
 181 +               .owner  = THIS_MODULE,
 182 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 183 +       },
 184 +};
 185 +
 186 +static int ath9k_eep_loaded;
 187 +static int __init of_ath9k_eeprom_init(void)
 188 +{
 189 +       int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 190 +
 191 +       if (!ret)
 192 +               ath9k_eep_loaded = 1;
 193 +
 194 +       return ret;
 195 +}
 196 +
 197 +static int __init of_ath9k_eeprom_init_late(void)
 198 +{
 199 +       if (ath9k_eep_loaded)
 200 +               return 0;
 201 +       return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 202 +}
 203 +late_initcall(of_ath9k_eeprom_init_late);
 204 +subsys_initcall(of_ath9k_eeprom_init);
 205 +
 206 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 207 +{
 208 +       dev->dev.platform_data = &ath5k_pdata;
 209 +       return 0;
 210 +}
 211 +
 212 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 213 +{
 214 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
 215 +       int mac_offset;
 216 +       u32 mac_inc = 0;
 217 +       int i;
 218 +       struct mtd_info *the_mtd;
 219 +       size_t flash_readlen;
 220 +       const __be32 *list;
 221 +       const char *part;
 222 +       phandle phandle;
 223 +
 224 +       list = of_get_property(np, "ath,eep-flash", &i);
 225 +       if (!list || (i !=  (2 * sizeof(*list)))) {
 226 +               dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
 227 +               return -ENODEV;
 228 +       }
 229 +
 230 +       phandle = be32_to_cpup(list++);
 231 +       if (!phandle) {
 232 +               dev_err(&pdev->dev, "failed to find phandle\n");
 233 +               return -ENODEV;
 234 +       }
 235 +
 236 +       mtd_np = of_find_node_by_phandle(phandle);
 237 +       if (!mtd_np) {
 238 +               dev_err(&pdev->dev, "failed to find mtd node\n");
 239 +               return -ENODEV;
 240 +       }
 241 +
 242 +       part = of_get_property(mtd_np, "label", NULL);
 243 +       if (!part)
 244 +               part = mtd_np->name;
 245 +
 246 +       the_mtd = get_mtd_device_nm(part);
 247 +       if (the_mtd == ERR_PTR(-ENODEV)) {
 248 +               dev_err(&pdev->dev, "failed to find mtd device\n");
 249 +               return -ENODEV;
 250 +       }
 251 +
 252 +       i = mtd_read(the_mtd, be32_to_cpup(list),
 253 +                       ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 254 +                       (void *) ath5k_pdata.eeprom_data);
 255 +       put_mtd_device(the_mtd);
 256 +       if ((sizeof(ath5k_pdata.eeprom_data) != flash_readlen) || i) {
 257 +               dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 258 +               return -ENODEV;
 259 +       }
 260 +
 261 +       if (of_find_property(np, "ath,eep-swap", NULL))
 262 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 263 +                       ath5k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 264 +
 265 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 266 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
 267 +       } else {
 268 +               random_ether_addr(athxk_eeprom_mac);
 269 +               if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
 270 +                       dev_warn(&pdev->dev, "using random mac\n");
 271 +       }
 272 +
 273 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 274 +               athxk_eeprom_mac[5] += mac_inc;
 275 +
 276 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 277 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 278 +
 279 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 280 +
 281 +       return 0;
 282 +}
 283 +
 284 +static struct of_device_id ath5k_eeprom_ids[] = {
 285 +       { .compatible = "ath5k,eeprom" },
 286 +       { }
 287 +};
 288 +
 289 +static struct platform_driver ath5k_eeprom_driver = {
 290 +       .driver         = {
 291 +               .name           = "ath5k,eeprom",
 292 +               .owner  = THIS_MODULE,
 293 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 294 +       },
 295 +};
 296 +
 297 +static int __init of_ath5k_eeprom_init(void)
 298 +{
 299 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 300 +}
 301 +device_initcall(of_ath5k_eeprom_init);
 302 --- /dev/null
 303 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 304 @@ -0,0 +1,109 @@
 305 +/*
 306 + *  Atheros AP94 reference board PCI initialization
 307 + *
 308 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 309 + *
 310 + *  This program is free software; you can redistribute it and/or modify it
 311 + *  under the terms of the GNU General Public License version 2 as published
 312 + *  by the Free Software Foundation.
 313 + */
 314 +
 315 +#include <linux/pci.h>
 316 +#include <linux/init.h>
 317 +#include <linux/delay.h>
 318 +#include <lantiq_soc.h>
 319 +
 320 +#define LTQ_PCI_MEM_BASE               0x18000000
 321 +
 322 +struct ath_fixup {
 323 +       u16             *cal_data;
 324 +       unsigned        slot;
 325 +};
 326 +
 327 +static int ath_num_fixups;
 328 +static struct ath_fixup ath_fixups[2];
 329 +
 330 +static void ath_pci_fixup(struct pci_dev *dev)
 331 +{
 332 +       void __iomem *mem;
 333 +       u16 *cal_data = NULL;
 334 +       u16 cmd;
 335 +       u32 bar0;
 336 +       u32 val;
 337 +       unsigned i;
 338 +
 339 +       for (i = 0; i < ath_num_fixups; i++) {
 340 +               if (ath_fixups[i].cal_data == NULL)
 341 +                       continue;
 342 +
 343 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 344 +                       continue;
 345 +
 346 +               cal_data = ath_fixups[i].cal_data;
 347 +               break;
 348 +       }
 349 +
 350 +       if (cal_data == NULL)
 351 +               return;
 352 +
 353 +       if (*cal_data != 0xa55a) {
 354 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 355 +               return;
 356 +       }
 357 +
 358 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 359 +
 360 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
 361 +       if (!mem) {
 362 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 363 +               return;
 364 +       }
 365 +
 366 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 367 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
 368 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 369 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 370 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 371 +
 372 +       /* set pointer to first reg address */
 373 +       cal_data += 3;
 374 +       while (*cal_data != 0xffff) {
 375 +               u32 reg;
 376 +               reg = *cal_data++;
 377 +               val = *cal_data++;
 378 +               val |= (*cal_data++) << 16;
 379 +
 380 +               ltq_w32(swab32(val), mem + reg);
 381 +               udelay(100);
 382 +       }
 383 +
 384 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 385 +       dev->vendor = val & 0xffff;
 386 +       dev->device = (val >> 16) & 0xffff;
 387 +
 388 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 389 +       dev->revision = val & 0xff;
 390 +       dev->class = val >> 8; /* upper 3 bytes */
 391 +
 392 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 393 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 394 +
 395 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 396 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 397 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 398 +
 399 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 400 +
 401 +       iounmap(mem);
 402 +}
 403 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 404 +
 405 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 406 +{
 407 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 408 +               return;
 409 +
 410 +       ath_fixups[ath_num_fixups].slot = slot;
 411 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 412 +       ath_num_fixups++;
 413 +}
 414 --- /dev/null
 415 +++ b/arch/mips/lantiq/xway/rt_eep.c
 416 @@ -0,0 +1,60 @@
 417 +/*
 418 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 419 + *
 420 + *  This program is free software; you can redistribute it and/or modify it
 421 + *  under the terms of the GNU General Public License version 2 as published
 422 + *  by the Free Software Foundation.
 423 + */
 424 +
 425 +#include <linux/init.h>
 426 +#include <linux/module.h>
 427 +#include <linux/pci.h>
 428 +#include <linux/platform_device.h>
 429 +#include <linux/rt2x00_platform.h>
 430 +
 431 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 432 +static struct rt2x00_platform_data rt2x00_pdata;
 433 +
 434 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 435 +{
 436 +       dev->dev.platform_data = &rt2x00_pdata;
 437 +       return 0;
 438 +}
 439 +
 440 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 441 +{
 442 +       struct device_node *np = pdev->dev.of_node;
 443 +       const char *eeprom;
 444 +
 445 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 446 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 447 +               return 0;
 448 +       }
 449 +
 450 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 451 +//     rt2x00_pdata.mac_address = mac;
 452 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 453 +
 454 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 455 +
 456 +       return 0;
 457 +}
 458 +
 459 +static struct of_device_id ralink_eeprom_ids[] = {
 460 +       { .compatible = "ralink,eeprom" },
 461 +       { }
 462 +};
 463 +
 464 +static struct platform_driver ralink_eeprom_driver = {
 465 +       .driver         = {
 466 +               .name           = "ralink,eeprom",
 467 +               .owner  = THIS_MODULE,
 468 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 469 +       },
 470 +};
 471 +
 472 +static int __init of_ralink_eeprom_init(void)
 473 +{
 474 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 475 +}
 476 +device_initcall(of_ralink_eeprom_init);