target/linux/lantiq/files/arch/mips/lantiq/svip/mach-easy336.c

   1 #include <linux/init.h>
   2 #include <linux/platform_device.h>
   3 #include <linux/leds.h>
   4 #include <linux/gpio.h>
   5 #include <linux/gpio_buttons.h>
   6 #include <linux/mtd/mtd.h>
   7 #include <linux/mtd/partitions.h>
   8 #include <linux/input.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/spi/spi.h>
  11 #include <linux/spi/flash.h>
  12 #include "../machtypes.h"
  13
  14 #include <sys1_reg.h>
  15 #include <sys2_reg.h>
  16 #include <svip_pms.h>
  17
  18 #include "devices.h"
  19
  20 static struct mtd_partition easy336_sflash_partitions[] = {
  21         {
  22                 .name           = "SPI flash",
  23                 .size           = MTDPART_SIZ_FULL,
  24                 .offset         = 0,
  25         },
  26 };
  27
  28 static struct flash_platform_data easy336_sflash_data = {
  29         .name = "m25p32",
  30         .parts = (void *)&easy336_sflash_partitions,
  31         .nr_parts = ARRAY_SIZE(easy336_sflash_partitions),
  32         .type = "m25p32",
  33 };
  34
  35 static struct spi_board_info bdinfo[] __initdata = {
  36         {
  37                 .modalias = "m25p80",
  38                 .platform_data = &easy336_sflash_data,
  39                 .mode = SPI_MODE_0,
  40                 .irq = -1,
  41                 .max_speed_hz = 25000000,
  42                 .bus_num = 0,
  43                 .chip_select = 0,
  44         }
  45 };
  46
  47 static struct mtd_partition easy336_partitions[] = {
  48         {
  49                 .name   = "uboot",
  50                 .offset = 0x0,
  51                 .size   = 0x40000,
  52         },
  53         {
  54                 .name   = "uboot_env",
  55                 .offset = 0x40000,
  56                 .size   = 0x20000,
  57         },
  58         {
  59                 .name   = "linux",
  60                 .offset = 0x60000,
  61                 .size   = 0x1a0000,
  62         },
  63         {
  64                 .name   = "rootfs",
  65                 .offset = 0x200000,
  66                 .size   = 0x500000,
  67         },
  68 };
  69
  70 static struct physmap_flash_data easy336_flash_data = {
  71         .nr_parts       = ARRAY_SIZE(easy336_partitions),
  72         .parts          = easy336_partitions,
  73 };
  74
  75 static const struct ltq_mux_pin mux_p0[LTQ_MUX_P0_PINS] = {
  76         LTQ_MUX_P0_0_SSC0_MTSR,
  77         LTQ_MUX_P0_1_SSC0_MRST,
  78         LTQ_MUX_P0_2_SSC0_SCLK,
  79         LTQ_MUX_P0_3_SSC1_MTSR,
  80         LTQ_MUX_P0_4_SSC1_MRST,
  81         LTQ_MUX_P0_5_SSC1_SCLK,
  82         LTQ_MUX_P0_6_SSC0_CS0,
  83         LTQ_MUX_P0_7_SSC0_CS1,
  84         LTQ_MUX_P0_8_SSC0_CS2,
  85         LTQ_MUX_P0_9_SSC0_CS3,
  86         LTQ_MUX_P0_10_SSC0_CS4,
  87         LTQ_MUX_P0_11_SSC0_CS5,
  88         LTQ_MUX_P0_12_EXINT5,
  89         LTQ_MUX_P0_13_EXINT6,
  90         LTQ_MUX_P0_14_ASC0_TXD,
  91         LTQ_MUX_P0_15_ASC0_RXD,
  92         LTQ_MUX_P0_16_EXINT9,
  93         LTQ_MUX_P0_17_EXINT10,
  94         LTQ_MUX_P0_18_EJ_BRKIN,
  95         LTQ_MUX_P0_19_EXINT16
  96 };
  97
  98 static const struct ltq_mux_pin mux_p2[LTQ_MUX_P2_PINS] = {
  99         LTQ_MUX_P2_0_EBU_A0,
 100         LTQ_MUX_P2_1_EBU_A1,
 101         LTQ_MUX_P2_2_EBU_A2,
 102         LTQ_MUX_P2_3_EBU_A3,
 103         LTQ_MUX_P2_4_EBU_A4,
 104         LTQ_MUX_P2_5_EBU_A5,
 105         LTQ_MUX_P2_6_EBU_A6,
 106         LTQ_MUX_P2_7_EBU_A7,
 107         LTQ_MUX_P2_8_EBU_A8,
 108         LTQ_MUX_P2_9_EBU_A9,
 109         LTQ_MUX_P2_10_EBU_A10,
 110         LTQ_MUX_P2_11_EBU_A11,
 111         LTQ_MUX_P2_12_EBU_RD,
 112         LTQ_MUX_P2_13_EBU_WR,
 113         LTQ_MUX_P2_14_EBU_ALE,
 114         LTQ_MUX_P2_15_EBU_WAIT,
 115         LTQ_MUX_P2_16_EBU_RDBY,
 116         LTQ_MUX_P2_17_EBU_BC0,
 117         LTQ_MUX_P2_18_EBU_BC1
 118 };
 119
 120 static const struct ltq_mux_pin mux_p3[LTQ_MUX_P3_PINS] = {
 121         LTQ_MUX_P3_0_EBU_AD0,
 122         LTQ_MUX_P3_1_EBU_AD1,
 123         LTQ_MUX_P3_2_EBU_AD2,
 124         LTQ_MUX_P3_3_EBU_AD3,
 125         LTQ_MUX_P3_4_EBU_AD4,
 126         LTQ_MUX_P3_5_EBU_AD5,
 127         LTQ_MUX_P3_6_EBU_AD6,
 128         LTQ_MUX_P3_7_EBU_AD7,
 129         LTQ_MUX_P3_8_EBU_AD8,
 130         LTQ_MUX_P3_9_EBU_AD9,
 131         LTQ_MUX_P3_10_EBU_AD10,
 132         LTQ_MUX_P3_11_EBU_AD11,
 133         LTQ_MUX_P3_12_EBU_AD12,
 134         LTQ_MUX_P3_13_EBU_AD13,
 135         LTQ_MUX_P3_14_EBU_AD14,
 136         LTQ_MUX_P3_15_EBU_AD15,
 137         LTQ_MUX_P3_16_EBU_CS0,
 138         LTQ_MUX_P3_17_EBU_CS1,
 139         LTQ_MUX_P3_18_EBU_CS2,
 140         LTQ_MUX_P3_19_EBU_CS3
 141 };
 142
 143 static void __init easy336_init_common(void)
 144 {
 145         svip_sys1_clk_enable(SYS1_CLKENR_L2C |
 146                              SYS1_CLKENR_DDR2 |
 147                              SYS1_CLKENR_SMI2 |
 148                              SYS1_CLKENR_SMI1 |
 149                              SYS1_CLKENR_SMI0 |
 150                              SYS1_CLKENR_FMI0 |
 151                              SYS1_CLKENR_DMA |
 152                              SYS1_CLKENR_GPTC |
 153                              SYS1_CLKENR_EBU);
 154
 155         svip_sys2_clk_enable(SYS2_CLKENR_HWSYNC |
 156                              SYS2_CLKENR_MBS |
 157                              SYS2_CLKENR_SWINT |
 158                              SYS2_CLKENR_HWACC3 |
 159                              SYS2_CLKENR_HWACC2 |
 160                              SYS2_CLKENR_HWACC1 |
 161                              SYS2_CLKENR_HWACC0 |
 162                              SYS2_CLKENR_SIF7 |
 163                              SYS2_CLKENR_SIF6 |
 164                              SYS2_CLKENR_SIF5 |
 165                              SYS2_CLKENR_SIF4 |
 166                              SYS2_CLKENR_SIF3 |
 167                              SYS2_CLKENR_SIF2 |
 168                              SYS2_CLKENR_SIF1 |
 169                              SYS2_CLKENR_SIF0 |
 170                              SYS2_CLKENR_DFEV7 |
 171                              SYS2_CLKENR_DFEV6 |
 172                              SYS2_CLKENR_DFEV5 |
 173                              SYS2_CLKENR_DFEV4 |
 174                              SYS2_CLKENR_DFEV3 |
 175                              SYS2_CLKENR_DFEV2 |
 176                              SYS2_CLKENR_DFEV1 |
 177                              SYS2_CLKENR_DFEV0);
 178
 179         svip_register_mux(mux_p0, NULL, mux_p2, mux_p3, NULL);
 180         svip_register_asc(0);
 181         svip_register_eth();
 182         svip_register_virtual_eth();
 183         /* ltq_register_wdt(); - conflicts with lq_switch */
 184         svip_register_gpio();
 185         svip_register_spi();
 186         ltq_register_tapi();
 187 }
 188
 189 static void __init easy336_init(void)
 190 {
 191         easy336_init_common();
 192         ltq_register_nor(&easy336_flash_data);
 193 }
 194
 195 static void __init easy336sf_init(void)
 196 {
 197         easy336_init_common();
 198         svip_register_spi_flash(bdinfo);
 199 }
 200
 201 static void __init easy336nand_init(void)
 202 {
 203         easy336_init_common();
 204         svip_register_nand();
 205 }
 206
 207 MIPS_MACHINE(LANTIQ_MACH_EASY336,
 208              "EASY336",
 209              "EASY336",
 210              easy336_init);
 211
 212 MIPS_MACHINE(LANTIQ_MACH_EASY336SF,
 213              "EASY336SF",
 214              "EASY336 (Serial Flash)",
 215              easy336sf_init);
 216
 217 MIPS_MACHINE(LANTIQ_MACH_EASY336NAND,
 218              "EASY336NAND",
 219              "EASY336 (NAND Flash)",
 220              easy336nand_init);
 221