lantiq: Add device tree for P2812HNUF1 and P2812HNUF3
[openwrt.git] / target / linux / lantiq / dts / P2812HNUFX.dtsi
1 /include/ "vr9.dtsi"
2
3 / {
4         chosen {
5                 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
6         };
7
8         memory@0 {
9                 reg = <0x0 0x8000000>;
10         };
11
12         fpi@10000000 {
13                 #address-cells = <1>;
14                 #size-cells = <1>;
15                 compatible = "lantiq,fpi", "simple-bus";
16                 ranges = <0x0 0x10000000 0xEEFFFFF>;
17                 reg = <0x10000000 0xEF00000>;
18
19                 localbus@0 {
20                         #address-cells = <2>;
21                         #size-cells = <1>;
22                         ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
23                                 1 0 0x4000000 0x4000010>; /* addsel1 */
24                         compatible = "lantiq,localbus", "simple-bus";
25                 };
26
27                 gpio: pinmux@E100B10 {
28                         compatible = "lantiq,pinctrl-xr9";
29                         pinctrl-names = "default";
30                         pinctrl-0 = <&state_default>;
31                         
32                         interrupt-parent = <&icu0>;
33                         interrupts = <166 135 66 40 41 42 38>;
34
35                         #gpio-cells = <2>;
36                         gpio-controller;
37                         reg = <0xE100B10 0xA0>;
38
39                         state_default: pinmux {
40                                 exin3 {
41                                         lantiq,groups = "exin3";
42                                         lantiq,function = "exin";
43                                 };
44                                 mdio {
45                                         lantiq,groups = "mdio";
46                                         lantiq,function = "mdio";
47                                 };
48                                 gphy-leds {
49                                         lantiq,groups = "gphy0 led1", "gphy1 led1",
50                                                         "gphy0 led2", "gphy1 led2";
51                                         lantiq,function = "gphy";
52                                         lantiq,pull = <2>;
53                                         lantiq,open-drain = <0>;
54                                         lantiq,output = <1>;
55                                 };
56                                 stp {
57                                         lantiq,groups = "stp";
58                                         lantiq,function = "stp";
59                                         lantiq,pull = <2>;
60                                         lantiq,open-drain = <0>;
61                                         lantiq,output = <1>;
62                                 };
63                                 pci-in {
64                                         lantiq,groups = "req1";
65                                         lantiq,function = "pci";
66                                         lantiq,output = <0>;
67                                         lantiq,open-drain = <1>;
68                                         lantiq,pull = <2>;
69                                 };
70                                 pci-out {
71                                         lantiq,groups = "gnt1";
72                                         lantiq,function = "pci";
73                                         lantiq,output = <1>;
74                                         lantiq,open-drain = <0>;
75                                         lantiq,pull = <0>;
76                                 };
77                                 pci_rst {
78                                         lantiq,pins = "io21";
79                                         lantiq,output = <1>;
80                                         lantiq,open-drain = <0>;
81                                         lantiq,pull = <2>;
82                                 };
83                                 pcie-rst {
84                                         lantiq,pins = "io38";
85                                         lantiq,pull = <0>;
86                                         lantiq,output = <1>;
87                                 };
88                                 ifxhcd-rst {
89                                         lantiq,pins = "io33";
90                                         lantiq,pull = <0>;
91                                         lantiq,open-drain = <0>;
92                                         lantiq,output = <1>;
93                                 };
94                                 nand_out {
95                                         lantiq,groups = "nand cle", "nand ale";
96                                         lantiq,function = "ebu";
97                                         lantiq,output = <1>;
98                                         lantiq,open-drain = <0>;
99                                         lantiq,pull = <0>;
100                                 };
101                                 nand_cs1 {
102                                         lantiq,groups = "nand cs1";
103                                         lantiq,function = "ebu";
104                                         lantiq,open-drain = <0>;
105                                         lantiq,pull = <0>;
106                                 };
107                         };
108                 };
109
110                 eth@E108000 {
111                         #address-cells = <1>;
112                         #size-cells = <0>;
113                         compatible = "lantiq,xrx200-net";
114                         reg = < 0xE108000 0x3000        /* switch */
115                                 0xE10B100 0x70          /* mdio */
116                                 0xE10B1D8 0x30          /* mii */
117                                 0xE10B308 0x30 >;       /* pmac */
118                         interrupt-parent = <&icu0>;
119                         interrupts = <73 72>;
120
121                         lan: interface@0 {
122                                 compatible = "lantiq,xrx200-pdi";
123                                 #address-cells = <1>;
124                                 #size-cells = <0>;
125                                 reg = <0>;
126                                 mac-address = [ 00 11 22 33 44 55 ];
127                                 lantiq,switch;
128
129                                 ethernet@0 {
130                                         compatible = "lantiq,xrx200-pdi-port";
131                                         reg = <0>;
132                                         phy-mode = "rgmii";
133                                         phy-handle = <&phy0>;
134                                 };
135                                 ethernet@1 {
136                                         compatible = "lantiq,xrx200-pdi-port";
137                                         reg = <1>;
138                                         phy-mode = "rgmii";
139                                         phy-handle = <&phy1>;
140                                 };
141                                 ethernet@2 {
142                                         compatible = "lantiq,xrx200-pdi-port";
143                                         reg = <2>;
144                                         phy-mode = "gmii";
145                                         phy-handle = <&phy11>;
146                                 };
147                                 ethernet@4 {
148                                         compatible = "lantiq,xrx200-pdi-port";
149                                         reg = <4>;
150                                         phy-mode = "gmii";
151                                         phy-handle = <&phy13>;
152                                 };
153                                 ethernet@5 {
154                                         compatible = "lantiq,xrx200-pdi-port";
155                                         reg = <5>;
156                                         phy-mode = "rgmii";
157                                         phy-handle = <&phy5>;
158                                 };
159                         };
160
161                         mdio@0 {
162                                 #address-cells = <1>;
163                                 #size-cells = <0>;
164                                 compatible = "lantiq,xrx200-mdio";
165
166                                 phy0: ethernet-phy@0 {
167                                         reg = <0x0>;
168                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
169                                 };
170                                 phy1: ethernet-phy@1 {
171                                         reg = <0x1>;
172                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
173                                 };
174                                 phy5: ethernet-phy@5 {
175                                         reg = <0x5>;
176                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
177                                 };
178                                 phy11: ethernet-phy@11 {
179                                         reg = <0x11>;
180                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
181                                 };
182                                 phy13: ethernet-phy@13 {
183                                         reg = <0x13>;
184                                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
185                                 };
186                         };
187                 };
188
189                 stp: stp@E100BB0 {
190                         compatible = "lantiq,gpio-stp-xway";
191                         reg = <0xE100BB0 0x40>;
192                         #gpio-cells = <2>;
193                         gpio-controller;
194
195                         lantiq,shadow = <0xffffff>;
196                         lantiq,groups = <0x7>;
197                         lantiq,dsl = <0x0>;
198                         lantiq,phy1 = <0x0>;
199                         lantiq,phy2 = <0x0>;
200                 };
201
202                 ifxhcd@E101000 {
203                         status = "okay";
204                         gpios = <&gpio 33 0>;
205                         lantiq,portmask = <0x3>;
206                 };
207
208                 pci@E105400 {
209                         status = "okay";
210                         #address-cells = <3>;
211                         #size-cells = <2>;
212                         #interrupt-cells = <1>;
213                         compatible = "lantiq,pci-xway";
214                         bus-range = <0x0 0x0>;
215                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
216                                 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
217                         reg = <0x7000000 0x8000         /* config space */
218                                 0xE105400 0x400>;       /* pci bridge */
219                         lantiq,bus-clock = <33333333>;
220                         /*lantiq,external-clock;*/
221                         lantiq,delay-hi = <0>; /* 0ns delay */
222                         lantiq,delay-lo = <0>; /* 0.0ns delay */
223                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
224                         interrupt-map = <
225                                 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
226                                 >;
227                         gpio-reset = <&gpio 21 0>;
228                         req-mask = <0x1>;       /* GNT1 */
229                 };
230         };
231
232         gphy-xrx200 {
233                 compatible = "lantiq,phy-xrx200";
234                 firmware1 = "lantiq/vr9_phy11g_a1x.bin";        /*VR9 1.1*/
235                 firmware2 = "lantiq/vr9_phy11g_a2x.bin";        /*VR9 1.2*/
236                 phys = [ 00 01 ];
237         };
238
239         gpio-keys-polled {
240                 compatible = "gpio-keys-polled";
241                 #address-cells = <1>;
242                 #size-cells = <0>;
243                 poll-interval = <100>;
244
245                 reset {
246                         label = "reset";
247                         gpios = <&gpio 39 1>;
248                         linux,code = <0x198>;
249                 };
250
251                 rfkill {
252                         label = "rfkill";
253                         gpios = <&gpio 1 1>;
254                         linux,code = <0xf7>;
255                 };
256         };
257 };