target/linux/ipq806x/patches/0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch

   1 From 2d9ffb1a3f87396c3b792124870ef63fc27c568f Mon Sep 17 00:00:00 2001
   2 From: Stephen Boyd <sboyd@codeaurora.org>
   3 Date: Thu, 6 Mar 2014 22:44:46 -0800
   4 Subject: [PATCH 032/182] pinctrl: msm: Simplify msm_config_reg() and callers
   5
   6 We don't need to check for a negative reg here because reg is
   7 always the same and is always non-negative. Also, collapse the
   8 switch statement down for the duplicate cases.
   9
  10 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  11 Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  12 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  13 ---
  14  drivers/pinctrl/pinctrl-msm.c |   29 +++++------------------------
  15  1 file changed, 5 insertions(+), 24 deletions(-)
  16
  17 --- a/drivers/pinctrl/pinctrl-msm.c
  18 +++ b/drivers/pinctrl/pinctrl-msm.c
  19 @@ -200,28 +200,17 @@ static const struct pinmux_ops msm_pinmu
  20  static int msm_config_reg(struct msm_pinctrl *pctrl,
  21                           const struct msm_pingroup *g,
  22                           unsigned param,
  23 -                         s16 *reg,
  24                           unsigned *mask,
  25                           unsigned *bit)
  26  {
  27         switch (param) {
  28         case PIN_CONFIG_BIAS_DISABLE:
  29 -               *reg = g->ctl_reg;
  30 -               *bit = g->pull_bit;
  31 -               *mask = 3;
  32 -               break;
  33         case PIN_CONFIG_BIAS_PULL_DOWN:
  34 -               *reg = g->ctl_reg;
  35 -               *bit = g->pull_bit;
  36 -               *mask = 3;
  37 -               break;
  38         case PIN_CONFIG_BIAS_PULL_UP:
  39 -               *reg = g->ctl_reg;
  40                 *bit = g->pull_bit;
  41                 *mask = 3;
  42                 break;
  43         case PIN_CONFIG_DRIVE_STRENGTH:
  44 -               *reg = g->ctl_reg;
  45                 *bit = g->drv_bit;
  46                 *mask = 7;
  47                 break;
  48 @@ -230,12 +219,6 @@ static int msm_config_reg(struct msm_pin
  49                 return -ENOTSUPP;
  50         }
  51
  52 -       if (*reg < 0) {
  53 -               dev_err(pctrl->dev, "Config param %04x not supported on group %s\n",
  54 -                       param, g->name);
  55 -               return -ENOTSUPP;
  56 -       }
  57 -
  58         return 0;
  59  }
  60
  61 @@ -273,17 +256,16 @@ static int msm_config_group_get(struct p
  62         unsigned mask;
  63         unsigned arg;
  64         unsigned bit;
  65 -       s16 reg;
  66         int ret;
  67         u32 val;
  68
  69         g = &pctrl->soc->groups[group];
  70
  71 -       ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
  72 +       ret = msm_config_reg(pctrl, g, param, &mask, &bit);
  73         if (ret < 0)
  74                 return ret;
  75
  76 -       val = readl(pctrl->regs + reg);
  77 +       val = readl(pctrl->regs + g->ctl_reg);
  78         arg = (val >> bit) & mask;
  79
  80         /* Convert register value to pinconf value */
  81 @@ -323,7 +305,6 @@ static int msm_config_group_set(struct p
  82         unsigned mask;
  83         unsigned arg;
  84         unsigned bit;
  85 -       s16 reg;
  86         int ret;
  87         u32 val;
  88         int i;
  89 @@ -334,7 +315,7 @@ static int msm_config_group_set(struct p
  90                 param = pinconf_to_config_param(configs[i]);
  91                 arg = pinconf_to_config_argument(configs[i]);
  92
  93 -               ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
  94 +               ret = msm_config_reg(pctrl, g, param, &mask, &bit);
  95                 if (ret < 0)
  96                         return ret;
  97
  98 @@ -369,10 +350,10 @@ static int msm_config_group_set(struct p
  99                 }
 100
 101                 spin_lock_irqsave(&pctrl->lock, flags);
 102 -               val = readl(pctrl->regs + reg);
 103 +               val = readl(pctrl->regs + g->ctl_reg);
 104                 val &= ~(mask << bit);
 105                 val |= arg << bit;
 106 -               writel(val, pctrl->regs + reg);
 107 +               writel(val, pctrl->regs + g->ctl_reg);
 108                 spin_unlock_irqrestore(&pctrl->lock, flags);
 109         }
 110