d6569782363e2237a2780c014bef75da77a0f371
[openwrt.git] / target / linux / ipq806x / patches / 0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch
1 From 2d9ffb1a3f87396c3b792124870ef63fc27c568f Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Thu, 6 Mar 2014 22:44:46 -0800
4 Subject: [PATCH 032/182] pinctrl: msm: Simplify msm_config_reg() and callers
5
6 We don't need to check for a negative reg here because reg is
7 always the same and is always non-negative. Also, collapse the
8 switch statement down for the duplicate cases.
9
10 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
11 Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
12 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
13 ---
14  drivers/pinctrl/pinctrl-msm.c |   29 +++++------------------------
15  1 file changed, 5 insertions(+), 24 deletions(-)
16
17 diff --git a/drivers/pinctrl/pinctrl-msm.c b/drivers/pinctrl/pinctrl-msm.c
18 index ab46e3a..91de8bc 100644
19 --- a/drivers/pinctrl/pinctrl-msm.c
20 +++ b/drivers/pinctrl/pinctrl-msm.c
21 @@ -200,28 +200,17 @@ static const struct pinmux_ops msm_pinmux_ops = {
22  static int msm_config_reg(struct msm_pinctrl *pctrl,
23                           const struct msm_pingroup *g,
24                           unsigned param,
25 -                         s16 *reg,
26                           unsigned *mask,
27                           unsigned *bit)
28  {
29         switch (param) {
30         case PIN_CONFIG_BIAS_DISABLE:
31 -               *reg = g->ctl_reg;
32 -               *bit = g->pull_bit;
33 -               *mask = 3;
34 -               break;
35         case PIN_CONFIG_BIAS_PULL_DOWN:
36 -               *reg = g->ctl_reg;
37 -               *bit = g->pull_bit;
38 -               *mask = 3;
39 -               break;
40         case PIN_CONFIG_BIAS_PULL_UP:
41 -               *reg = g->ctl_reg;
42                 *bit = g->pull_bit;
43                 *mask = 3;
44                 break;
45         case PIN_CONFIG_DRIVE_STRENGTH:
46 -               *reg = g->ctl_reg;
47                 *bit = g->drv_bit;
48                 *mask = 7;
49                 break;
50 @@ -230,12 +219,6 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
51                 return -ENOTSUPP;
52         }
53  
54 -       if (*reg < 0) {
55 -               dev_err(pctrl->dev, "Config param %04x not supported on group %s\n",
56 -                       param, g->name);
57 -               return -ENOTSUPP;
58 -       }
59 -
60         return 0;
61  }
62  
63 @@ -273,17 +256,16 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
64         unsigned mask;
65         unsigned arg;
66         unsigned bit;
67 -       s16 reg;
68         int ret;
69         u32 val;
70  
71         g = &pctrl->soc->groups[group];
72  
73 -       ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
74 +       ret = msm_config_reg(pctrl, g, param, &mask, &bit);
75         if (ret < 0)
76                 return ret;
77  
78 -       val = readl(pctrl->regs + reg);
79 +       val = readl(pctrl->regs + g->ctl_reg);
80         arg = (val >> bit) & mask;
81  
82         /* Convert register value to pinconf value */
83 @@ -323,7 +305,6 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
84         unsigned mask;
85         unsigned arg;
86         unsigned bit;
87 -       s16 reg;
88         int ret;
89         u32 val;
90         int i;
91 @@ -334,7 +315,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
92                 param = pinconf_to_config_param(configs[i]);
93                 arg = pinconf_to_config_argument(configs[i]);
94  
95 -               ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
96 +               ret = msm_config_reg(pctrl, g, param, &mask, &bit);
97                 if (ret < 0)
98                         return ret;
99  
100 @@ -369,10 +350,10 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
101                 }
102  
103                 spin_lock_irqsave(&pctrl->lock, flags);
104 -               val = readl(pctrl->regs + reg);
105 +               val = readl(pctrl->regs + g->ctl_reg);
106                 val &= ~(mask << bit);
107                 val |= arg << bit;
108 -               writel(val, pctrl->regs + reg);
109 +               writel(val, pctrl->regs + g->ctl_reg);
110                 spin_unlock_irqrestore(&pctrl->lock, flags);
111         }
112  
113 -- 
114 1.7.10.4
115