target/linux/ipq806x/patches-4.1/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch

   1 From cab1f4720e82f2e17eaeed9a9ad9e4f07c742977 Mon Sep 17 00:00:00 2001
   2 From: Mathieu Olivari <mathieu@codeaurora.org>
   3 Date: Mon, 11 May 2015 12:29:18 -0700
   4 Subject: [PATCH 8/8] ARM: dts: qcom: add gmac nodes to ipq806x platforms
   5
   6 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
   7 ---
   8  arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 31 ++++++++++++
   9  arch/arm/boot/dts/qcom-ipq8064-db149.dts | 43 ++++++++++++++++
  10  arch/arm/boot/dts/qcom-ipq8064.dtsi      | 86 ++++++++++++++++++++++++++++++++
  11  3 files changed, 160 insertions(+)
  12
  13 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  14 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
  15 @@ -93,6 +93,16 @@
  16                                         bias-disable;
  17                                 };
  18                         };
  19 +
  20 +                       rgmii2_pins: rgmii2_pins {
  21 +                               mux {
  22 +                                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  23 +                                              "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  24 +                                       function = "rgmii2";
  25 +                                       drive-strength = <8>;
  26 +                                       bias-disable;
  27 +                               };
  28 +                       };
  29                 };
  30
  31                 gsbi@16300000 {
  32 @@ -220,6 +230,27 @@
  33                                 reg = <4>;
  34                         };
  35                 };
  36 +
  37 +               gmac1: ethernet@37200000 {
  38 +                       status = "ok";
  39 +                       phy-mode = "rgmii";
  40 +                       phy-handle = <&phy4>;
  41 +                       qcom,id = <1>;
  42 +
  43 +                       pinctrl-0 = <&rgmii2_pins>;
  44 +                       pinctrl-names = "default";
  45 +               };
  46 +
  47 +               gmac2: ethernet@37400000 {
  48 +                       status = "ok";
  49 +                       phy-mode = "sgmii";
  50 +                       qcom,id = <2>;
  51 +
  52 +                       fixed-link {
  53 +                               speed = <1000>;
  54 +                               full-duplex;
  55 +                       };
  56 +               };
  57         };
  58  };
  59
  60 --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  61 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
  62 @@ -75,6 +75,14 @@
  63                                         bias-disable;
  64                                 };
  65                         };
  66 +
  67 +                       rgmii0_pins: rgmii0_pins {
  68 +                               mux {
  69 +                                       pins = "gpio2", "gpio66";
  70 +                                       drive-strength = <8>;
  71 +                                       bias-disable;
  72 +                               };
  73 +                       };
  74                 };
  75
  76                 gsbi2: gsbi@12480000 {
  77 @@ -225,5 +233,40 @@
  78                                 reg = <7>;
  79                         };
  80                 };
  81 +
  82 +               gmac0: ethernet@37000000 {
  83 +                       status = "ok";
  84 +                       phy-mode = "rgmii";
  85 +                       qcom,id = <0>;
  86 +                       phy-handle = <&phy4>;
  87 +
  88 +                       pinctrl-0 = <&rgmii0_pins>;
  89 +                       pinctrl-names = "default";
  90 +               };
  91 +
  92 +               gmac1: ethernet@37200000 {
  93 +                       status = "ok";
  94 +                       phy-mode = "sgmii";
  95 +                       qcom,id = <1>;
  96 +
  97 +                       fixed-link {
  98 +                               speed = <1000>;
  99 +                               full-duplex;
 100 +                       };
 101 +               };
 102 +
 103 +               gmac2: ethernet@37400000 {
 104 +                       status = "ok";
 105 +                       phy-mode = "sgmii";
 106 +                       qcom,id = <2>;
 107 +                       phy-handle = <&phy6>;
 108 +               };
 109 +
 110 +               gmac3: ethernet@37600000 {
 111 +                       status = "ok";
 112 +                       phy-mode = "sgmii";
 113 +                       qcom,id = <3>;
 114 +                       phy-handle = <&phy7>;
 115 +               };
 116         };
 117  };
 118 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 119 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
 120 @@ -631,5 +631,91 @@
 121
 122                         status = "disabled";
 123                 };
 124 +
 125 +               nss_common: syscon@03000000 {
 126 +                       compatible = "syscon";
 127 +                       reg = <0x03000000 0x0000FFFF>;
 128 +               };
 129 +
 130 +               qsgmii_csr: syscon@1bb00000 {
 131 +                       compatible = "syscon";
 132 +                       reg = <0x1bb00000 0x000001FF>;
 133 +               };
 134 +
 135 +               gmac0: ethernet@37000000 {
 136 +                       device_type = "network";
 137 +                       compatible = "qcom,ipq806x-gmac";
 138 +                       reg = <0x37000000 0x200000>;
 139 +                       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
 140 +                       interrupt-names = "macirq";
 141 +
 142 +                       qcom,nss-common = <&nss_common>;
 143 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 144 +
 145 +                       clocks = <&gcc GMAC_CORE1_CLK>;
 146 +                       clock-names = "stmmaceth";
 147 +
 148 +                       resets = <&gcc GMAC_CORE1_RESET>;
 149 +                       reset-names = "stmmaceth";
 150 +
 151 +                       status = "disabled";
 152 +               };
 153 +
 154 +               gmac1: ethernet@37200000 {
 155 +                       device_type = "network";
 156 +                       compatible = "qcom,ipq806x-gmac";
 157 +                       reg = <0x37200000 0x200000>;
 158 +                       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
 159 +                       interrupt-names = "macirq";
 160 +
 161 +                       qcom,nss-common = <&nss_common>;
 162 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 163 +
 164 +                       clocks = <&gcc GMAC_CORE2_CLK>;
 165 +                       clock-names = "stmmaceth";
 166 +
 167 +                       resets = <&gcc GMAC_CORE2_RESET>;
 168 +                       reset-names = "stmmaceth";
 169 +
 170 +                       status = "disabled";
 171 +               };
 172 +
 173 +               gmac2: ethernet@37400000 {
 174 +                       device_type = "network";
 175 +                       compatible = "qcom,ipq806x-gmac";
 176 +                       reg = <0x37400000 0x200000>;
 177 +                       interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 178 +                       interrupt-names = "macirq";
 179 +
 180 +                       qcom,nss-common = <&nss_common>;
 181 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 182 +
 183 +                       clocks = <&gcc GMAC_CORE3_CLK>;
 184 +                       clock-names = "stmmaceth";
 185 +
 186 +                       resets = <&gcc GMAC_CORE3_RESET>;
 187 +                       reset-names = "stmmaceth";
 188 +
 189 +                       status = "disabled";
 190 +               };
 191 +
 192 +               gmac3: ethernet@37600000 {
 193 +                       device_type = "network";
 194 +                       compatible = "qcom,ipq806x-gmac";
 195 +                       reg = <0x37600000 0x200000>;
 196 +                       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
 197 +                       interrupt-names = "macirq";
 198 +
 199 +                       qcom,nss-common = <&nss_common>;
 200 +                       qcom,qsgmii-csr = <&qsgmii_csr>;
 201 +
 202 +                       clocks = <&gcc GMAC_CORE4_CLK>;
 203 +                       clock-names = "stmmaceth";
 204 +
 205 +                       resets = <&gcc GMAC_CORE4_RESET>;
 206 +                       reset-names = "stmmaceth";
 207 +
 208 +                       status = "disabled";
 209 +               };
 210         };
 211  };