ipq806x: add hwspinlock support
[openwrt.git] / target / linux / ipq806x / patches-3.18 / 164-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch
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4 Subject: [v3,4/5] arm: qcom: dts: Add NAND controller node for ipq806x
5 From: Archit Taneja <architt@codeaurora.org>
6 X-Patchwork-Id: 6927121
7 Message-Id: <1438578498-32254-5-git-send-email-architt@codeaurora.org>
8 To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
9         cernekee@gmail.com, computersforpeace@gmail.com
10 Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
11         sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
12         Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
13 Date: Mon,  3 Aug 2015 10:38:17 +0530
14
15 The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
16 compatible string.
17
18 Cc: devicetree@vger.kernel.org
19
20 Reviewed-by: Andy Gross <agross@codeaurora.org>
21 Signed-off-by: Archit Taneja <architt@codeaurora.org>
22
23 ---
24 arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++++++++++++++
25  1 file changed, 15 insertions(+)
26
27 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
28 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
29 @@ -682,6 +682,22 @@
30                         status = "disabled";
31                 };
32  
33 +               nand@1ac00000 {
34 +                       compatible = "qcom,ebi2-nandc";
35 +                       reg = <0x1ac00000 0x800>;
36 +
37 +                       clocks = <&gcc EBI2_CLK>,
38 +                                <&gcc EBI2_AON_CLK>;
39 +                       clock-names = "core", "aon";
40 +
41 +                       dmas = <&adm_dma 3>;
42 +                       dma-names = "rxtx";
43 +                       qcom,cmd-crci = <15>;
44 +                       qcom,data-crci = <3>;
45 +
46 +                       status = "disabled";
47 +               };
48 +
49         };
50  
51         sfpb_mutex: sfpb-mutex {