target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw5400-a.dts

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /dts-v1/;
  13 #include "imx6q.dtsi"
  14
  15 / {
  16         model = "Gateworks Ventana GW5400-A";
  17         compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
  18
  19         /* these are used by bootloader for disabling nodes */
  20         aliases {
  21                 ethernet0 = &fec;
  22                 ethernet1 = &eth1;
  23                 sky2 = &eth1;
  24                 ssi0 = &ssi1;
  25                 ssi1 = &ssi2;
  26                 ipu0 = &ipu1;
  27                 ipu1 = &ipu2;
  28                 usdhc0 = &usdhc1;
  29                 usdhc1 = &usdhc2;
  30                 usdhc2 = &usdhc3;
  31                 usdhc3 = &usdhc4;
  32                 i2c0 = &i2c1;
  33                 i2c1 = &i2c2;
  34                 i2c2 = &i2c3;
  35                 usb0 = &usbh3;
  36                 usb1 = &usbotg;
  37                 spi0 = &ecspi1;
  38                 spi1 = &ecspi2;
  39                 spi2 = &ecspi3;
  40                 spi3 = &ecspi4;
  41                 spi4 = &ecspi5;
  42                 pwm0 = &pwm1;
  43                 pwm1 = &pwm2;
  44                 pwm2 = &pwm3;
  45                 pwm3 = &pwm4;
  46                 can0 = &can1;
  47                 led0 = &led0;
  48                 led1 = &led1;
  49                 led2 = &led2;
  50         };
  51
  52         /* SDRAM addressing */
  53         memory {
  54                 reg = <0x10000000 0x40000000>;
  55         };
  56
  57         chosen {
  58                 bootargs = "console=ttymxc1,115200";
  59         };
  60
  61         leds {
  62                 compatible = "gpio-leds";
  63
  64                 led0: user1 {
  65                         label = "user1";
  66                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
  67                         default-state = "on";
  68                         linux,default-trigger = "heartbeat";
  69                 };
  70
  71                 led1: user2 {
  72                         label = "user2";
  73                         gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
  74                         default-state = "off";
  75                 };
  76
  77                 led2: user3 {
  78                         label = "user3";
  79                         gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
  80                         default-state = "off";
  81                 };
  82         };
  83
  84         regulators {
  85                 compatible = "simple-bus";
  86
  87                 reg_2p5v: 2p5v {
  88                         compatible = "regulator-fixed";
  89                         regulator-name = "2P5V";
  90                         regulator-min-microvolt = <2500000>;
  91                         regulator-max-microvolt = <2500000>;
  92                         regulator-always-on;
  93                 };
  94
  95                 reg_3p3v: 3p3v {
  96                         compatible = "regulator-fixed";
  97                         regulator-name = "3P3V";
  98                         regulator-min-microvolt = <3300000>;
  99                         regulator-max-microvolt = <3300000>;
 100                         regulator-always-on;
 101                 };
 102
 103                 reg_usb_otg_vbus: usb_otg_vbus {
 104                         compatible = "regulator-fixed";
 105                         regulator-name = "usb_otg_vbus";
 106                         regulator-min-microvolt = <5000000>;
 107                         regulator-max-microvolt = <5000000>;
 108                         gpio = <&gpio3 22 0>;
 109                         enable-active-high;
 110                 };
 111         };
 112
 113         sound {
 114                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 115                              "fsl,imx-audio-sgtl5000";
 116                 model = "imx6q-sabrelite-sgtl5000";
 117                 ssi-controller = <&ssi1>;
 118                 audio-codec = <&codec>;
 119                 audio-routing =
 120                         "MIC_IN", "Mic Jack",
 121                         "Mic Jack", "Mic Bias",
 122                         "Headphone Jack", "HP_OUT";
 123                 mux-int-port = <1>;
 124                 mux-ext-port = <4>;
 125         };
 126 };
 127
 128 &iomuxc {
 129         pinctrl-names = "default";
 130         pinctrl-0 = <&pinctrl_hog>;
 131
 132         hog {
 133                 pinctrl_hog: hoggrp {
 134                         fsl,pins = <
 135                                 MX6Q_PAD_EIM_D22__GPIO3_IO22    0x80000000 /* OTG_PWR_EN */
 136                                 MX6Q_PAD_EIM_D19__GPIO3_IO19    0x80000000 /* SPINOR_CS0# */
 137                                 MX6Q_PAD_KEY_COL0__GPIO4_IO06   0x80000000 /* user0 led */
 138                                 MX6Q_PAD_KEY_COL2__GPIO4_IO10   0x80000000 /* user1 led */
 139                                 MX6Q_PAD_KEY_ROW4__GPIO4_IO15   0x80000000 /* user2 led */
 140 /* let bootloader choose these based on hwconfig */
 141 #if 0
 142                                 MX6Q_PAD_GPIO_9__GPIO1_IO09     0x80000000 /* MX6_DIO0 (or PWM1_PWM0) */
 143                                 MX6Q_PAD_SD1_DAT2__GPIO1_IO19   0x80000000 /* MX6_DIO1 (or PWM2_PWM0) */
 144                                 MX6Q_PAD_SD4_DAT1__GPIO2_IO09   0x80000000 /* MX6_DIO2 (or PWM3_PWM0) */
 145                                 MX6Q_PAD_SD4_DAT2__GPIO2_IO10   0x80000000 /* MX6_DIO3 (or PWM3_PWM0) */
 146 #endif
 147                                 MX6Q_PAD_SD1_DAT0__GPIO1_IO16   0x80000000 /* USBHUB_RST# */
 148                                 MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
 149                                 MX6Q_PAD_ENET_TXD1__GPIO1_IO29  0x08000000 /* PCIE RST */
 150                                 MX6Q_PAD_SD1_DAT3__GPIO1_IO21   0x80000000 /* MIPI_DIO */
 151                                 MX6Q_PAD_GPIO_0__CCM_CLKO1      0x80000000 /* AUD4_MCK */
 152                          >;
 153                 };
 154         };
 155
 156 #if 0
 157         /* ipu1: IPU1_CSI0: HDMI reciver (Digital Video In) */
 158         ipu1 {
 159                 pinctrl_ipu1_1: ipu1grp-5 {
 160                         fsl,pins = <
 161                                 MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
 162                                 MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN
 163                                 MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK
 164                                 MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC
 165                                 MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_DATA04
 166                                 MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_DATA05
 167                                 MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_DATA06
 168                                 MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_DATA07
 169                                 MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_DATA08
 170                                 MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_DATA09
 171                                 MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_DATA10
 172                                 MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_DATA11
 173                                 MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_DATA12
 174                                 MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_DATA13
 175                                 MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_DATA14
 176                                 MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_DATA15
 177                                 MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16
 178                                 MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17
 179                                 MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18
 180                                 MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19
 181                         >;
 182                 };
 183         };
 184
 185         /* ipu2: IPU1_CSI1: Analog Video Decoder (Analog Video In) */
 186         /* IPU2_CSI1: Analog Video Decoder (Analog Video In) */
 187         ipu2 {
 188                 pinctrl_ipu2_1: ipu2grp-1 {
 189                         fsl,pins = <
 190                                 MX6Q_PAD_EIM_A17__IPU2_CSI1_DATA12
 191                                 MX6Q_PAD_EIM_D27__IPU2_CSI1_DATA13
 192                                 MX6Q_PAD_EIM_D26__IPU2_CSI1_DATA14
 193                                 MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15
 194                                 MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16
 195                                 MX6Q_PAD_EIM_D18__IPU2_CSI1_DATA17
 196                                 MX6Q_PAD_EIM_D16__IPU2_CSI1_DATA18
 197                                 MX6Q_PAD_EIM_EB2__IPU2_CSI1_DATA19
 198
 199                                 MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC
 200                                 MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC
 201 // not sure why this causes kernel to crash in early init
 202 //                      MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK
 203                         >;
 204                 };
 205         };
 206
 207         /* ipu3: IPU2_DISP0: Analog Video Encoder (Analog Video Out) */
 208         ipu3 {
 209                 pinctrl_ipu3_1: ipu3grp-5 {
 210                         fsl,pins = <
 211                                 MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DATA00
 212                                 MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DATA01
 213                                 MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DATA02
 214                                 MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DATA03
 215                                 MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DATA04
 216                                 MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DATA05
 217                                 MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DATA06
 218                                 MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DATA07
 219                                 MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DATA08
 220                                 MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DATA09
 221                                 MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DATA10
 222                                 MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DATA11
 223                                 MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DATA12
 224                                 MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DATA13
 225                                 MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DATA14
 226                                 MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DATA15
 227                         >;
 228                 };
 229         };
 230 #endif
 231 };
 232
 233 &ecspi1 {
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_ecspi1_1>;
 236         status = "okay";
 237
 238         flash: m25p80@0 {
 239                 #address-cells = <1>;
 240                 #size-cells = <1>;
 241                 compatible = "sst,w25q256";
 242                 spi-max-frequency = <30000000>;
 243                 reg = <0>;
 244         };
 245 };
 246
 247 &uart1 {
 248         pinctrl-names = "default";
 249         pinctrl-0 = <&pinctrl_uart1_2>;
 250         status = "okay";
 251 };
 252
 253 &uart2 {
 254         pinctrl-names = "default";
 255         pinctrl-0 = <&pinctrl_uart2_2>;
 256         status = "okay";
 257 };
 258
 259 &uart3 {
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&pinctrl_uart3_1>;
 262         status = "okay";
 263 };
 264
 265 &uart5 {
 266         status = "okay";
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&pinctrl_uart5_1>;
 269 };
 270
 271 &ssi1 {
 272         fsl,mode = "i2s-slave";
 273         status = "okay";
 274 };
 275
 276 &ssi2 {
 277         fsl,mode = "i2s-slave";
 278         status = "okay";
 279 };
 280
 281 &can1 {
 282         reg = <0x02090000 0x4000>;
 283         interrupts = <0 110 0x04>;
 284         status = "okay";
 285 };
 286
 287 &usbh1 {
 288         status = "okay";
 289 };
 290
 291 &pcie {
 292         reset-gpio = <&gpio1 29 0>;
 293         status = "okay";
 294
 295         eth1: sky2@8 { /* MAC/PHY on bus 8 */
 296                 compatible = "marvell,sky2";
 297                 /* Filled in by U-Boot */
 298                 mac-address = [ 00 00 00 00 00 00 ];
 299         };
 300 };
 301
 302 &fec {
 303         pinctrl-names = "default";
 304         pinctrl-0 = <&pinctrl_enet_1>;
 305         phy-mode = "rgmii";
 306         phy-reset-gpios = <&gpio1 30 0>;
 307         status = "okay";
 308 };
 309
 310 &usdhc3 {
 311         pinctrl-names = "default";
 312         pinctrl-0 = <&pinctrl_usdhc3_2>;
 313         cd-gpios = <&gpio7 0 0>;
 314         vmmc-supply = <&reg_3p3v>;
 315         status = "okay";
 316 };
 317
 318 &audmux {
 319         pinctrl-names = "default";
 320         pinctrl-0 = <&pinctrl_audmux_3>;
 321         status = "okay";
 322 };
 323
 324 &i2c1 {
 325         status = "okay";
 326         clock-frequency = <100000>;
 327         pinctrl-names = "default";
 328         pinctrl-0 = <&pinctrl_i2c1_1>;
 329
 330         eeprom: eeprom@50 {
 331                 compatible = "atmel,24c02";
 332                 reg = <0x50>;
 333                 pagesize = <16>;
 334         };
 335
 336         eeprom1: eeprom@50 {
 337                 compatible = "atmel,24c02";
 338                 reg = <0x50>;
 339                 pagesize = <16>;
 340         };
 341
 342         eeprom2: eeprom@51 {
 343                 compatible = "atmel,24c02";
 344                 reg = <0x51>;
 345                 pagesize = <16>;
 346         };
 347
 348         eeprom3: eeprom@52 {
 349                 compatible = "atmel,24c02";
 350                 reg = <0x52>;
 351                 pagesize = <16>;
 352         };
 353
 354         eeprom4: eeprom@53 {
 355                 compatible = "atmel,24c02";
 356                 reg = <0x53>;
 357                 pagesize = <16>;
 358         };
 359
 360         rtc: ds1672@68 {
 361                 compatible = "dallas,ds1672";
 362                 reg = <0x68>;
 363         };
 364
 365         gpio: pca9555@23 {
 366                 compatible = "nxp,pca9555";
 367                 reg = <0x23>;
 368                 gpio-controller;
 369                 #gpio-cells = <2>;
 370         };
 371
 372         hwmon: gsc@29 {
 373                 compatible = "gw,gsp";
 374                 reg = <0x29>;
 375         };
 376 };
 377
 378 &i2c2 {
 379         status = "okay";
 380         clock-frequency = <100000>;
 381         pinctrl-names = "default";
 382         pinctrl-0 = <&pinctrl_i2c2_2>;
 383
 384         pmic: pfuze@08 {
 385                 compatible = "fsl,pfuze100";
 386                 reg = <0x08>;
 387         };
 388
 389         pciswitch: pex8609@3f {
 390                 compatible = "plx,pex8609";
 391                 reg = <0x3f>;
 392         };
 393
 394         pciclkgen: si52147@6b {
 395                 compatible = "sil,si52147";
 396                 reg = <0x6b>;
 397         };
 398 };
 399
 400 &i2c3 {
 401         status = "okay";
 402         clock-frequency = <100000>;
 403         pinctrl-names = "default";
 404         pinctrl-0 = <&pinctrl_i2c3_2>;
 405
 406         codec: sgtl5000@0a {
 407                 compatible = "fsl,sgtl5000";
 408                 reg = <0x0a>;
 409                 clocks = <&clks 169>;
 410                 VDDA-supply = <&reg_2p5v>;
 411                 VDDIO-supply = <&reg_3p3v>;
 412         };
 413
 414         accelerometer: mma8450@1c {
 415                 compatible = "fsl,mma8450";
 416                 reg = <0x1c>;
 417         };
 418
 419         videoout: adv7393@2a {
 420                 compatible = "adi,adv7393";
 421                 reg = <0x2a>;
 422         };
 423
 424         videoin: adv7180@20 {
 425                 compatible = "adi,adv7180";
 426                 reg = <0x20>;
 427         };
 428
 429         hdmiin: adv7611@4c {
 430                 compatible = "adi,adv7611";
 431                 reg = <0x4c>;
 432         };
 433
 434         touchscreen: egalax_ts@04 {
 435                 compatible = "eeti,egalax_ts";
 436                 reg = <0x04>;
 437                 wakeup-gpios = <&gpio1 12 0>;
 438         };
 439 };
 440
 441 &ldb {
 442         status = "okay";
 443         lvds-channel@0 {
 444                 crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
 445         };
 446 };
 447
 448 &sata {
 449         status = "okay";
 450 };