target/linux/generic/patches-3.8/020-ssb_update.patch

   1 --- a/drivers/ssb/Kconfig
   2 +++ b/drivers/ssb/Kconfig
   3 @@ -136,10 +136,15 @@ config SSB_DRIVER_MIPS
   4
   5           If unsure, say N
   6
   7 +config SSB_SFLASH
   8 +       bool "SSB serial flash support"
   9 +       depends on SSB_DRIVER_MIPS && BROKEN
  10 +       default y
  11 +
  12  # Assumption: We are on embedded, if we compile the MIPS core.
  13  config SSB_EMBEDDED
  14         bool
  15 -       depends on SSB_DRIVER_MIPS
  16 +       depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
  17         default y
  18
  19  config SSB_DRIVER_EXTIF
  20 --- a/drivers/ssb/Makefile
  21 +++ b/drivers/ssb/Makefile
  22 @@ -11,6 +11,7 @@ ssb-$(CONFIG_SSB_SDIOHOST)            += sdio.o
  23  # built-in drivers
  24  ssb-y                                  += driver_chipcommon.o
  25  ssb-y                                  += driver_chipcommon_pmu.o
  26 +ssb-$(CONFIG_SSB_SFLASH)               += driver_chipcommon_sflash.o
  27  ssb-$(CONFIG_SSB_DRIVER_MIPS)          += driver_mipscore.o
  28  ssb-$(CONFIG_SSB_DRIVER_EXTIF)         += driver_extif.o
  29  ssb-$(CONFIG_SSB_DRIVER_PCICORE)       += driver_pcicore.o
  30 --- a/drivers/ssb/driver_chipcommon.c
  31 +++ b/drivers/ssb/driver_chipcommon.c
  32 @@ -354,7 +354,7 @@ void ssb_chipcommon_init(struct ssb_chip
  33
  34         if (cc->dev->id.revision >= 11)
  35                 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
  36 -       ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
  37 +       ssb_dbg("chipcommon status is 0x%x\n", cc->status);
  38
  39         if (cc->dev->id.revision >= 20) {
  40                 chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0);
  41 --- a/drivers/ssb/driver_chipcommon_pmu.c
  42 +++ b/drivers/ssb/driver_chipcommon_pmu.c
  43 @@ -110,8 +110,8 @@ static void ssb_pmu0_pllinit_r0(struct s
  44                 return;
  45         }
  46
  47 -       ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
  48 -                  (crystalfreq / 1000), (crystalfreq % 1000));
  49 +       ssb_info("Programming PLL to %u.%03u MHz\n",
  50 +                crystalfreq / 1000, crystalfreq % 1000);
  51
  52         /* First turn the PLL off. */
  53         switch (bus->chip_id) {
  54 @@ -138,7 +138,7 @@ static void ssb_pmu0_pllinit_r0(struct s
  55         }
  56         tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
  57         if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
  58 -               ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
  59 +               ssb_emerg("Failed to turn the PLL off!\n");
  60
  61         /* Set PDIV in PLL control 0. */
  62         pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
  63 @@ -249,8 +249,8 @@ static void ssb_pmu1_pllinit_r0(struct s
  64                 return;
  65         }
  66
  67 -       ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
  68 -                  (crystalfreq / 1000), (crystalfreq % 1000));
  69 +       ssb_info("Programming PLL to %u.%03u MHz\n",
  70 +                crystalfreq / 1000, crystalfreq % 1000);
  71
  72         /* First turn the PLL off. */
  73         switch (bus->chip_id) {
  74 @@ -275,7 +275,7 @@ static void ssb_pmu1_pllinit_r0(struct s
  75         }
  76         tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
  77         if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
  78 -               ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
  79 +               ssb_emerg("Failed to turn the PLL off!\n");
  80
  81         /* Set p1div and p2div. */
  82         pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
  83 @@ -349,9 +349,8 @@ static void ssb_pmu_pll_init(struct ssb_
  84         case 43222:
  85                 break;
  86         default:
  87 -               ssb_printk(KERN_ERR PFX
  88 -                          "ERROR: PLL init unknown for device %04X\n",
  89 -                          bus->chip_id);
  90 +               ssb_err("ERROR: PLL init unknown for device %04X\n",
  91 +                       bus->chip_id);
  92         }
  93  }
  94
  95 @@ -472,9 +471,8 @@ static void ssb_pmu_resources_init(struc
  96                 max_msk = 0xFFFFF;
  97                 break;
  98         default:
  99 -               ssb_printk(KERN_ERR PFX
 100 -                          "ERROR: PMU resource config unknown for device %04X\n",
 101 -                          bus->chip_id);
 102 +               ssb_err("ERROR: PMU resource config unknown for device %04X\n",
 103 +                       bus->chip_id);
 104         }
 105
 106         if (updown_tab) {
 107 @@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
 108         pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
 109         cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
 110
 111 -       ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
 112 -                   cc->pmu.rev, pmucap);
 113 +       ssb_dbg("Found rev %u PMU (capabilities 0x%08X)\n",
 114 +               cc->pmu.rev, pmucap);
 115
 116         if (cc->pmu.rev == 1)
 117                 chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
 118 @@ -638,9 +636,8 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chi
 119         case 0x5354:
 120                 ssb_pmu_get_alp_clock_clk0(cc);
 121         default:
 122 -               ssb_printk(KERN_ERR PFX
 123 -                          "ERROR: PMU alp clock unknown for device %04X\n",
 124 -                          bus->chip_id);
 125 +               ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
 126 +                       bus->chip_id);
 127                 return 0;
 128         }
 129  }
 130 @@ -654,9 +651,8 @@ u32 ssb_pmu_get_cpu_clock(struct ssb_chi
 131                 /* 5354 chip uses a non programmable PLL of frequency 240MHz */
 132                 return 240000000;
 133         default:
 134 -               ssb_printk(KERN_ERR PFX
 135 -                          "ERROR: PMU cpu clock unknown for device %04X\n",
 136 -                          bus->chip_id);
 137 +               ssb_err("ERROR: PMU cpu clock unknown for device %04X\n",
 138 +                       bus->chip_id);
 139                 return 0;
 140         }
 141  }
 142 @@ -669,9 +665,8 @@ u32 ssb_pmu_get_controlclock(struct ssb_
 143         case 0x5354:
 144                 return 120000000;
 145         default:
 146 -               ssb_printk(KERN_ERR PFX
 147 -                          "ERROR: PMU controlclock unknown for device %04X\n",
 148 -                          bus->chip_id);
 149 +               ssb_err("ERROR: PMU controlclock unknown for device %04X\n",
 150 +                       bus->chip_id);
 151                 return 0;
 152         }
 153  }
 154 @@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
 155                 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
 156                 break;
 157         case 43222:
 158 -               /* TODO: BCM43222 requires updating PLLs too */
 159 -               return;
 160 +               if (spuravoid == 1) {
 161 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);
 162 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);
 163 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);
 164 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
 165 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);
 166 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);
 167 +               } else {
 168 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);
 169 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);
 170 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);
 171 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
 172 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);
 173 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);
 174 +               }
 175 +               pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
 176 +               break;
 177         default:
 178                 ssb_printk(KERN_ERR PFX
 179                            "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
 180 --- /dev/null
 181 +++ b/drivers/ssb/driver_chipcommon_sflash.c
 182 @@ -0,0 +1,166 @@
 183 +/*
 184 + * Sonics Silicon Backplane
 185 + * ChipCommon serial flash interface
 186 + *
 187 + * Licensed under the GNU/GPL. See COPYING for details.
 188 + */
 189 +
 190 +#include <linux/ssb/ssb.h>
 191 +
 192 +#include "ssb_private.h"
 193 +
 194 +static struct resource ssb_sflash_resource = {
 195 +       .name   = "ssb_sflash",
 196 +       .start  = SSB_FLASH2,
 197 +       .end    = 0,
 198 +       .flags  = IORESOURCE_MEM | IORESOURCE_READONLY,
 199 +};
 200 +
 201 +struct platform_device ssb_sflash_dev = {
 202 +       .name           = "ssb_sflash",
 203 +       .resource       = &ssb_sflash_resource,
 204 +       .num_resources  = 1,
 205 +};
 206 +
 207 +struct ssb_sflash_tbl_e {
 208 +       char *name;
 209 +       u32 id;
 210 +       u32 blocksize;
 211 +       u16 numblocks;
 212 +};
 213 +
 214 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
 215 +       { "M25P20", 0x11, 0x10000, 4, },
 216 +       { "M25P40", 0x12, 0x10000, 8, },
 217 +
 218 +       { "M25P16", 0x14, 0x10000, 32, },
 219 +       { "M25P32", 0x15, 0x10000, 64, },
 220 +       { "M25P64", 0x16, 0x10000, 128, },
 221 +       { "M25FL128", 0x17, 0x10000, 256, },
 222 +       { 0 },
 223 +};
 224 +
 225 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
 226 +       { "SST25WF512", 1, 0x1000, 16, },
 227 +       { "SST25VF512", 0x48, 0x1000, 16, },
 228 +       { "SST25WF010", 2, 0x1000, 32, },
 229 +       { "SST25VF010", 0x49, 0x1000, 32, },
 230 +       { "SST25WF020", 3, 0x1000, 64, },
 231 +       { "SST25VF020", 0x43, 0x1000, 64, },
 232 +       { "SST25WF040", 4, 0x1000, 128, },
 233 +       { "SST25VF040", 0x44, 0x1000, 128, },
 234 +       { "SST25VF040B", 0x8d, 0x1000, 128, },
 235 +       { "SST25WF080", 5, 0x1000, 256, },
 236 +       { "SST25VF080B", 0x8e, 0x1000, 256, },
 237 +       { "SST25VF016", 0x41, 0x1000, 512, },
 238 +       { "SST25VF032", 0x4a, 0x1000, 1024, },
 239 +       { "SST25VF064", 0x4b, 0x1000, 2048, },
 240 +       { 0 },
 241 +};
 242 +
 243 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
 244 +       { "AT45DB011", 0xc, 256, 512, },
 245 +       { "AT45DB021", 0x14, 256, 1024, },
 246 +       { "AT45DB041", 0x1c, 256, 2048, },
 247 +       { "AT45DB081", 0x24, 256, 4096, },
 248 +       { "AT45DB161", 0x2c, 512, 4096, },
 249 +       { "AT45DB321", 0x34, 512, 8192, },
 250 +       { "AT45DB642", 0x3c, 1024, 8192, },
 251 +       { 0 },
 252 +};
 253 +
 254 +static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
 255 +{
 256 +       int i;
 257 +       chipco_write32(cc, SSB_CHIPCO_FLASHCTL,
 258 +                      SSB_CHIPCO_FLASHCTL_START | opcode);
 259 +       for (i = 0; i < 1000; i++) {
 260 +               if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) &
 261 +                     SSB_CHIPCO_FLASHCTL_BUSY))
 262 +                       return;
 263 +               cpu_relax();
 264 +       }
 265 +       pr_err("SFLASH control command failed (timeout)!\n");
 266 +}
 267 +
 268 +/* Initialize serial flash access */
 269 +int ssb_sflash_init(struct ssb_chipcommon *cc)
 270 +{
 271 +       struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
 272 +       const struct ssb_sflash_tbl_e *e;
 273 +       u32 id, id2;
 274 +
 275 +       switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
 276 +       case SSB_CHIPCO_FLASHT_STSER:
 277 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP);
 278 +
 279 +               chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0);
 280 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
 281 +               id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
 282 +
 283 +               chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 1);
 284 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
 285 +               id2 = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
 286 +
 287 +               switch (id) {
 288 +               case 0xbf:
 289 +                       for (e = ssb_sflash_sst_tbl; e->name; e++) {
 290 +                               if (e->id == id2)
 291 +                                       break;
 292 +                       }
 293 +                       break;
 294 +               case 0x13:
 295 +                       return -ENOTSUPP;
 296 +               default:
 297 +                       for (e = ssb_sflash_st_tbl; e->name; e++) {
 298 +                               if (e->id == id)
 299 +                                       break;
 300 +                       }
 301 +                       break;
 302 +               }
 303 +               if (!e->name) {
 304 +                       pr_err("Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n",
 305 +                              id, id2);
 306 +                       return -ENOTSUPP;
 307 +               }
 308 +
 309 +               break;
 310 +       case SSB_CHIPCO_FLASHT_ATSER:
 311 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_AT_STATUS);
 312 +               id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA) & 0x3c;
 313 +
 314 +               for (e = ssb_sflash_at_tbl; e->name; e++) {
 315 +                       if (e->id == id)
 316 +                               break;
 317 +               }
 318 +               if (!e->name) {
 319 +                       pr_err("Unsupported Atmel serial flash (id: 0x%X)\n",
 320 +                              id);
 321 +                       return -ENOTSUPP;
 322 +               }
 323 +
 324 +               break;
 325 +       default:
 326 +               pr_err("Unsupported flash type\n");
 327 +               return -ENOTSUPP;
 328 +       }
 329 +
 330 +       sflash->window = SSB_FLASH2;
 331 +       sflash->blocksize = e->blocksize;
 332 +       sflash->numblocks = e->numblocks;
 333 +       sflash->size = sflash->blocksize * sflash->numblocks;
 334 +       sflash->present = true;
 335 +
 336 +       pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
 337 +               e->name, e->blocksize, e->numblocks);
 338 +
 339 +       /* Prepare platform device, but don't register it yet. It's too early,
 340 +        * malloc (required by device_private_init) is not available yet. */
 341 +       ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 342 +                                        sflash->size;
 343 +       ssb_sflash_dev.dev.platform_data = sflash;
 344 +
 345 +       pr_err("Serial flash support is not implemented yet!\n");
 346 +
 347 +       return -ENOTSUPP;
 348 +}
 349 --- a/drivers/ssb/driver_gpio.c
 350 +++ b/drivers/ssb/driver_gpio.c
 351 @@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct
 352         ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
 353  }
 354
 355 +static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
 356 +{
 357 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 358 +
 359 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 360 +               return ssb_mips_irq(bus->chipco.dev) + 2;
 361 +       else
 362 +               return -EINVAL;
 363 +}
 364 +
 365  static int ssb_gpio_chipco_init(struct ssb_bus *bus)
 366  {
 367         struct gpio_chip *chip = &bus->gpio;
 368 @@ -86,6 +96,7 @@ static int ssb_gpio_chipco_init(struct s
 369         chip->set               = ssb_gpio_chipco_set_value;
 370         chip->direction_input   = ssb_gpio_chipco_direction_input;
 371         chip->direction_output  = ssb_gpio_chipco_direction_output;
 372 +       chip->to_irq            = ssb_gpio_chipco_to_irq;
 373         chip->ngpio             = 16;
 374         /* There is just one SoC in one device and its GPIO addresses should be
 375          * deterministic to address them more easily. The other buses could get
 376 @@ -134,6 +145,16 @@ static int ssb_gpio_extif_direction_outp
 377         return 0;
 378  }
 379
 380 +static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
 381 +{
 382 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 383 +
 384 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 385 +               return ssb_mips_irq(bus->extif.dev) + 2;
 386 +       else
 387 +               return -EINVAL;
 388 +}
 389 +
 390  static int ssb_gpio_extif_init(struct ssb_bus *bus)
 391  {
 392         struct gpio_chip *chip = &bus->gpio;
 393 @@ -144,6 +165,7 @@ static int ssb_gpio_extif_init(struct ss
 394         chip->set               = ssb_gpio_extif_set_value;
 395         chip->direction_input   = ssb_gpio_extif_direction_input;
 396         chip->direction_output  = ssb_gpio_extif_direction_output;
 397 +       chip->to_irq            = ssb_gpio_extif_to_irq;
 398         chip->ngpio             = 5;
 399         /* There is just one SoC in one device and its GPIO addresses should be
 400          * deterministic to address them more easily. The other buses could get
 401 --- a/drivers/ssb/driver_mipscore.c
 402 +++ b/drivers/ssb/driver_mipscore.c
 403 @@ -10,6 +10,7 @@
 404
 405  #include <linux/ssb/ssb.h>
 406
 407 +#include <linux/mtd/physmap.h>
 408  #include <linux/serial.h>
 409  #include <linux/serial_core.h>
 410  #include <linux/serial_reg.h>
 411 @@ -17,6 +18,25 @@
 412
 413  #include "ssb_private.h"
 414
 415 +static const char *part_probes[] = { "bcm47xxpart", NULL };
 416 +
 417 +static struct physmap_flash_data ssb_pflash_data = {
 418 +       .part_probe_types       = part_probes,
 419 +};
 420 +
 421 +static struct resource ssb_pflash_resource = {
 422 +       .name   = "ssb_pflash",
 423 +       .flags  = IORESOURCE_MEM,
 424 +};
 425 +
 426 +struct platform_device ssb_pflash_dev = {
 427 +       .name           = "physmap-flash",
 428 +       .dev            = {
 429 +               .platform_data  = &ssb_pflash_data,
 430 +       },
 431 +       .resource       = &ssb_pflash_resource,
 432 +       .num_resources  = 1,
 433 +};
 434
 435  static inline u32 mips_read32(struct ssb_mipscore *mcore,
 436                               u16 offset)
 437 @@ -147,21 +167,22 @@ static void set_irq(struct ssb_device *d
 438                 irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]);
 439                 ssb_write32(mdev, SSB_IPSFLAG, irqflag);
 440         }
 441 -       ssb_dprintk(KERN_INFO PFX
 442 -                   "set_irq: core 0x%04x, irq %d => %d\n",
 443 -                   dev->id.coreid, oldirq+2, irq+2);
 444 +       ssb_dbg("set_irq: core 0x%04x, irq %d => %d\n",
 445 +               dev->id.coreid, oldirq+2, irq+2);
 446  }
 447
 448  static void print_irq(struct ssb_device *dev, unsigned int irq)
 449  {
 450 -       int i;
 451         static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
 452 -       ssb_dprintk(KERN_INFO PFX
 453 -               "core 0x%04x, irq :", dev->id.coreid);
 454 -       for (i = 0; i <= 6; i++) {
 455 -               ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" ");
 456 -       }
 457 -       ssb_dprintk("\n");
 458 +       ssb_dbg("core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n",
 459 +               dev->id.coreid,
 460 +               irq_name[0], irq == 0 ? "*" : " ",
 461 +               irq_name[1], irq == 1 ? "*" : " ",
 462 +               irq_name[2], irq == 2 ? "*" : " ",
 463 +               irq_name[3], irq == 3 ? "*" : " ",
 464 +               irq_name[4], irq == 4 ? "*" : " ",
 465 +               irq_name[5], irq == 5 ? "*" : " ",
 466 +               irq_name[6], irq == 6 ? "*" : " ");
 467  }
 468
 469  static void dump_irq(struct ssb_bus *bus)
 470 @@ -189,34 +210,43 @@ static void ssb_mips_serial_init(struct
 471  static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
 472  {
 473         struct ssb_bus *bus = mcore->dev->bus;
 474 +       struct ssb_pflash *pflash = &mcore->pflash;
 475
 476         /* When there is no chipcommon on the bus there is 4MB flash */
 477         if (!ssb_chipco_available(&bus->chipco)) {
 478 -               mcore->pflash.present = true;
 479 -               mcore->pflash.buswidth = 2;
 480 -               mcore->pflash.window = SSB_FLASH1;
 481 -               mcore->pflash.window_size = SSB_FLASH1_SZ;
 482 -               return;
 483 +               pflash->present = true;
 484 +               pflash->buswidth = 2;
 485 +               pflash->window = SSB_FLASH1;
 486 +               pflash->window_size = SSB_FLASH1_SZ;
 487 +               goto ssb_pflash;
 488         }
 489
 490         /* There is ChipCommon, so use it to read info about flash */
 491         switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
 492         case SSB_CHIPCO_FLASHT_STSER:
 493         case SSB_CHIPCO_FLASHT_ATSER:
 494 -               pr_err("Serial flash not supported\n");
 495 +               pr_debug("Found serial flash\n");
 496 +               ssb_sflash_init(&bus->chipco);
 497                 break;
 498         case SSB_CHIPCO_FLASHT_PARA:
 499                 pr_debug("Found parallel flash\n");
 500 -               mcore->pflash.present = true;
 501 -               mcore->pflash.window = SSB_FLASH2;
 502 -               mcore->pflash.window_size = SSB_FLASH2_SZ;
 503 +               pflash->present = true;
 504 +               pflash->window = SSB_FLASH2;
 505 +               pflash->window_size = SSB_FLASH2_SZ;
 506                 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
 507                                & SSB_CHIPCO_CFG_DS16) == 0)
 508 -                       mcore->pflash.buswidth = 1;
 509 +                       pflash->buswidth = 1;
 510                 else
 511 -                       mcore->pflash.buswidth = 2;
 512 +                       pflash->buswidth = 2;
 513                 break;
 514         }
 515 +
 516 +ssb_pflash:
 517 +       if (pflash->present) {
 518 +               ssb_pflash_data.width = pflash->buswidth;
 519 +               ssb_pflash_resource.start = pflash->window;
 520 +               ssb_pflash_resource.end = pflash->window + pflash->window_size;
 521 +       }
 522  }
 523
 524  u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
 525 @@ -257,7 +287,7 @@ void ssb_mipscore_init(struct ssb_mipsco
 526         if (!mcore->dev)
 527                 return; /* We don't have a MIPS core */
 528
 529 -       ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n");
 530 +       ssb_dbg("Initializing MIPS core...\n");
 531
 532         bus = mcore->dev->bus;
 533         hz = ssb_clockspeed(bus);
 534 @@ -305,7 +335,7 @@ void ssb_mipscore_init(struct ssb_mipsco
 535                         break;
 536                 }
 537         }
 538 -       ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n");
 539 +       ssb_dbg("after irq reconfiguration\n");
 540         dump_irq(bus);
 541
 542         ssb_mips_serial_init(mcore);
 543 --- a/drivers/ssb/driver_pcicore.c
 544 +++ b/drivers/ssb/driver_pcicore.c
 545 @@ -263,8 +263,7 @@ int ssb_pcicore_plat_dev_init(struct pci
 546                 return -ENODEV;
 547         }
 548
 549 -       ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
 550 -                  pci_name(d));
 551 +       ssb_info("PCI: Fixing up device %s\n", pci_name(d));
 552
 553         /* Fix up interrupt lines */
 554         d->irq = ssb_mips_irq(extpci_core->dev) + 2;
 555 @@ -285,12 +284,12 @@ static void ssb_pcicore_fixup_pcibridge(
 556         if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
 557                 return;
 558
 559 -       ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
 560 +       ssb_info("PCI: Fixing up bridge %s\n", pci_name(dev));
 561
 562         /* Enable PCI bridge bus mastering and memory space */
 563         pci_set_master(dev);
 564         if (pcibios_enable_device(dev, ~0) < 0) {
 565 -               ssb_printk(KERN_ERR "PCI: SSB bridge enable failed\n");
 566 +               ssb_err("PCI: SSB bridge enable failed\n");
 567                 return;
 568         }
 569
 570 @@ -299,8 +298,8 @@ static void ssb_pcicore_fixup_pcibridge(
 571
 572         /* Make sure our latency is high enough to handle the devices behind us */
 573         lat = 168;
 574 -       ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
 575 -                  pci_name(dev), lat);
 576 +       ssb_info("PCI: Fixing latency timer of device %s to %u\n",
 577 +                pci_name(dev), lat);
 578         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
 579  }
 580  DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_pcicore_fixup_pcibridge);
 581 @@ -323,7 +322,7 @@ static void ssb_pcicore_init_hostmode(st
 582                 return;
 583         extpci_core = pc;
 584
 585 -       ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n");
 586 +       ssb_dbg("PCIcore in host mode found\n");
 587         /* Reset devices on the external PCI bus */
 588         val = SSB_PCICORE_CTL_RST_OE;
 589         val |= SSB_PCICORE_CTL_CLK_OE;
 590 @@ -338,7 +337,7 @@ static void ssb_pcicore_init_hostmode(st
 591         udelay(1); /* Assertion time demanded by the PCI standard */
 592
 593         if (pc->dev->bus->has_cardbus_slot) {
 594 -               ssb_dprintk(KERN_INFO PFX "CardBus slot detected\n");
 595 +               ssb_dbg("CardBus slot detected\n");
 596                 pc->cardbusmode = 1;
 597                 /* GPIO 1 resets the bridge */
 598                 ssb_gpio_out(pc->dev->bus, 1, 1);
 599 --- a/drivers/ssb/embedded.c
 600 +++ b/drivers/ssb/embedded.c
 601 @@ -57,9 +57,8 @@ int ssb_watchdog_register(struct ssb_bus
 602                                              bus->busnumber, &wdt,
 603                                              sizeof(wdt));
 604         if (IS_ERR(pdev)) {
 605 -               ssb_dprintk(KERN_INFO PFX
 606 -                           "can not register watchdog device, err: %li\n",
 607 -                           PTR_ERR(pdev));
 608 +               ssb_dbg("can not register watchdog device, err: %li\n",
 609 +                       PTR_ERR(pdev));
 610                 return PTR_ERR(pdev);
 611         }
 612
 613 --- a/drivers/ssb/main.c
 614 +++ b/drivers/ssb/main.c
 615 @@ -275,8 +275,8 @@ int ssb_devices_thaw(struct ssb_freeze_c
 616
 617                 err = sdrv->probe(sdev, &sdev->id);
 618                 if (err) {
 619 -                       ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 620 -                                  dev_name(sdev->dev));
 621 +                       ssb_err("Failed to thaw device %s\n",
 622 +                               dev_name(sdev->dev));
 623                         result = err;
 624                 }
 625                 ssb_device_put(sdev);
 626 @@ -447,10 +447,9 @@ void ssb_bus_unregister(struct ssb_bus *
 627
 628         err = ssb_gpio_unregister(bus);
 629         if (err == -EBUSY)
 630 -               ssb_dprintk(KERN_ERR PFX "Some GPIOs are still in use.\n");
 631 +               ssb_dbg("Some GPIOs are still in use\n");
 632         else if (err)
 633 -               ssb_dprintk(KERN_ERR PFX
 634 -                           "Can not unregister GPIO driver: %i\n", err);
 635 +               ssb_dbg("Can not unregister GPIO driver: %i\n", err);
 636
 637         ssb_buses_lock();
 638         ssb_devices_unregister(bus);
 639 @@ -497,8 +496,7 @@ static int ssb_devices_register(struct s
 640
 641                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 642                 if (!devwrap) {
 643 -                       ssb_printk(KERN_ERR PFX
 644 -                                  "Could not allocate device\n");
 645 +                       ssb_err("Could not allocate device\n");
 646                         err = -ENOMEM;
 647                         goto error;
 648                 }
 649 @@ -537,9 +535,7 @@ static int ssb_devices_register(struct s
 650                 sdev->dev = dev;
 651                 err = device_register(dev);
 652                 if (err) {
 653 -                       ssb_printk(KERN_ERR PFX
 654 -                                  "Could not register %s\n",
 655 -                                  dev_name(dev));
 656 +                       ssb_err("Could not register %s\n", dev_name(dev));
 657                         /* Set dev to NULL to not unregister
 658                          * dev on error unwinding. */
 659                         sdev->dev = NULL;
 660 @@ -549,6 +545,22 @@ static int ssb_devices_register(struct s
 661                 dev_idx++;
 662         }
 663
 664 +#ifdef CONFIG_SSB_DRIVER_MIPS
 665 +       if (bus->mipscore.pflash.present) {
 666 +               err = platform_device_register(&ssb_pflash_dev);
 667 +               if (err)
 668 +                       pr_err("Error registering parallel flash\n");
 669 +       }
 670 +#endif
 671 +
 672 +#ifdef CONFIG_SSB_SFLASH
 673 +       if (bus->mipscore.sflash.present) {
 674 +               err = platform_device_register(&ssb_sflash_dev);
 675 +               if (err)
 676 +                       pr_err("Error registering serial flash\n");
 677 +       }
 678 +#endif
 679 +
 680         return 0;
 681  error:
 682         /* Unwind the already registered devices. */
 683 @@ -817,10 +829,9 @@ static int ssb_bus_register(struct ssb_b
 684         ssb_mipscore_init(&bus->mipscore);
 685         err = ssb_gpio_init(bus);
 686         if (err == -ENOTSUPP)
 687 -               ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
 688 +               ssb_dbg("GPIO driver not activated\n");
 689         else if (err)
 690 -               ssb_dprintk(KERN_ERR PFX
 691 -                          "Error registering GPIO driver: %i\n", err);
 692 +               ssb_dbg("Error registering GPIO driver: %i\n", err);
 693         err = ssb_fetch_invariants(bus, get_invariants);
 694         if (err) {
 695                 ssb_bus_may_powerdown(bus);
 696 @@ -870,11 +881,11 @@ int ssb_bus_pcibus_register(struct ssb_b
 697
 698         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 699         if (!err) {
 700 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 701 -                          "PCI device %s\n", dev_name(&host_pci->dev));
 702 +               ssb_info("Sonics Silicon Backplane found on PCI device %s\n",
 703 +                        dev_name(&host_pci->dev));
 704         } else {
 705 -               ssb_printk(KERN_ERR PFX "Failed to register PCI version"
 706 -                          " of SSB with error %d\n", err);
 707 +               ssb_err("Failed to register PCI version of SSB with error %d\n",
 708 +                       err);
 709         }
 710
 711         return err;
 712 @@ -895,8 +906,8 @@ int ssb_bus_pcmciabus_register(struct ss
 713
 714         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 715         if (!err) {
 716 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 717 -                          "PCMCIA device %s\n", pcmcia_dev->devname);
 718 +               ssb_info("Sonics Silicon Backplane found on PCMCIA device %s\n",
 719 +                        pcmcia_dev->devname);
 720         }
 721
 722         return err;
 723 @@ -917,8 +928,8 @@ int ssb_bus_sdiobus_register(struct ssb_
 724
 725         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
 726         if (!err) {
 727 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 728 -                          "SDIO device %s\n", sdio_func_id(func));
 729 +               ssb_info("Sonics Silicon Backplane found on SDIO device %s\n",
 730 +                        sdio_func_id(func));
 731         }
 732
 733         return err;
 734 @@ -936,8 +947,8 @@ int ssb_bus_ssbbus_register(struct ssb_b
 735
 736         err = ssb_bus_register(bus, get_invariants, baseaddr);
 737         if (!err) {
 738 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 739 -                          "address 0x%08lX\n", baseaddr);
 740 +               ssb_info("Sonics Silicon Backplane found at address 0x%08lX\n",
 741 +                        baseaddr);
 742         }
 743
 744         return err;
 745 @@ -1331,7 +1342,7 @@ out:
 746  #endif
 747         return err;
 748  error:
 749 -       ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
 750 +       ssb_err("Bus powerdown failed\n");
 751         goto out;
 752  }
 753  EXPORT_SYMBOL(ssb_bus_may_powerdown);
 754 @@ -1354,7 +1365,7 @@ int ssb_bus_powerup(struct ssb_bus *bus,
 755
 756         return 0;
 757  error:
 758 -       ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
 759 +       ssb_err("Bus powerup failed\n");
 760         return err;
 761  }
 762  EXPORT_SYMBOL(ssb_bus_powerup);
 763 @@ -1462,15 +1473,13 @@ static int __init ssb_modinit(void)
 764
 765         err = b43_pci_ssb_bridge_init();
 766         if (err) {
 767 -               ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
 768 -                          "initialization failed\n");
 769 +               ssb_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
 770                 /* don't fail SSB init because of this */
 771                 err = 0;
 772         }
 773         err = ssb_gige_init();
 774         if (err) {
 775 -               ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
 776 -                          "driver initialization failed\n");
 777 +               ssb_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
 778                 /* don't fail SSB init because of this */
 779                 err = 0;
 780         }
 781 --- a/drivers/ssb/pci.c
 782 +++ b/drivers/ssb/pci.c
 783 @@ -56,7 +56,7 @@ int ssb_pci_switch_coreidx(struct ssb_bu
 784         }
 785         return 0;
 786  error:
 787 -       ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
 788 +       ssb_err("Failed to switch to core %u\n", coreidx);
 789         return -ENODEV;
 790  }
 791
 792 @@ -67,10 +67,9 @@ int ssb_pci_switch_core(struct ssb_bus *
 793         unsigned long flags;
 794
 795  #if SSB_VERBOSE_PCICORESWITCH_DEBUG
 796 -       ssb_printk(KERN_INFO PFX
 797 -                  "Switching to %s core, index %d\n",
 798 -                  ssb_core_name(dev->id.coreid),
 799 -                  dev->core_index);
 800 +       ssb_info("Switching to %s core, index %d\n",
 801 +                ssb_core_name(dev->id.coreid),
 802 +                dev->core_index);
 803  #endif
 804
 805         spin_lock_irqsave(&bus->bar_lock, flags);
 806 @@ -231,6 +230,15 @@ static inline u8 ssb_crc8(u8 crc, u8 dat
 807         return t[crc ^ data];
 808  }
 809
 810 +static void sprom_get_mac(char *mac, const u16 *in)
 811 +{
 812 +       int i;
 813 +       for (i = 0; i < 3; i++) {
 814 +               *mac++ = in[i] >> 8;
 815 +               *mac++ = in[i];
 816 +       }
 817 +}
 818 +
 819  static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
 820  {
 821         int word;
 822 @@ -278,7 +286,7 @@ static int sprom_do_write(struct ssb_bus
 823         u32 spromctl;
 824         u16 size = bus->sprom_size;
 825
 826 -       ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
 827 +       ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
 828         err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
 829         if (err)
 830                 goto err_ctlreg;
 831 @@ -286,17 +294,17 @@ static int sprom_do_write(struct ssb_bus
 832         err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
 833         if (err)
 834                 goto err_ctlreg;
 835 -       ssb_printk(KERN_NOTICE PFX "[ 0%%");
 836 +       ssb_notice("[ 0%%");
 837         msleep(500);
 838         for (i = 0; i < size; i++) {
 839                 if (i == size / 4)
 840 -                       ssb_printk("25%%");
 841 +                       ssb_cont("25%%");
 842                 else if (i == size / 2)
 843 -                       ssb_printk("50%%");
 844 +                       ssb_cont("50%%");
 845                 else if (i == (size * 3) / 4)
 846 -                       ssb_printk("75%%");
 847 +                       ssb_cont("75%%");
 848                 else if (i % 2)
 849 -                       ssb_printk(".");
 850 +                       ssb_cont(".");
 851                 writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
 852                 mmiowb();
 853                 msleep(20);
 854 @@ -309,12 +317,12 @@ static int sprom_do_write(struct ssb_bus
 855         if (err)
 856                 goto err_ctlreg;
 857         msleep(500);
 858 -       ssb_printk("100%% ]\n");
 859 -       ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
 860 +       ssb_cont("100%% ]\n");
 861 +       ssb_notice("SPROM written\n");
 862
 863         return 0;
 864  err_ctlreg:
 865 -       ssb_printk(KERN_ERR PFX "Could not access SPROM control register.\n");
 866 +       ssb_err("Could not access SPROM control register.\n");
 867         return err;
 868  }
 869
 870 @@ -339,10 +347,23 @@ static s8 r123_extract_antgain(u8 sprom_
 871         return (s8)gain;
 872  }
 873
 874 +static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
 875 +{
 876 +       SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
 877 +       SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
 878 +       SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
 879 +       SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
 880 +       SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
 881 +       SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
 882 +       SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
 883 +       SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
 884 +       SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
 885 +       SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
 886 +            SSB_SPROM2_MAXP_A_LO_SHIFT);
 887 +}
 888 +
 889  static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
 890  {
 891 -       int i;
 892 -       u16 v;
 893         u16 loc[3];
 894
 895         if (out->revision == 3)                 /* rev 3 moved MAC */
 896 @@ -352,19 +373,10 @@ static void sprom_extract_r123(struct ss
 897                 loc[1] = SSB_SPROM1_ET0MAC;
 898                 loc[2] = SSB_SPROM1_ET1MAC;
 899         }
 900 -       for (i = 0; i < 3; i++) {
 901 -               v = in[SPOFF(loc[0]) + i];
 902 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 903 -       }
 904 +       sprom_get_mac(out->il0mac, &in[SPOFF(loc[0])]);
 905         if (out->revision < 3) {        /* only rev 1-2 have et0, et1 */
 906 -               for (i = 0; i < 3; i++) {
 907 -                       v = in[SPOFF(loc[1]) + i];
 908 -                       *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
 909 -               }
 910 -               for (i = 0; i < 3; i++) {
 911 -                       v = in[SPOFF(loc[2]) + i];
 912 -                       *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
 913 -               }
 914 +               sprom_get_mac(out->et0mac, &in[SPOFF(loc[1])]);
 915 +               sprom_get_mac(out->et1mac, &in[SPOFF(loc[2])]);
 916         }
 917         SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
 918         SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
 919 @@ -372,6 +384,7 @@ static void sprom_extract_r123(struct ss
 920         SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
 921         SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
 922         SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
 923 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 924         if (out->revision == 1)
 925                 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
 926                      SSB_SPROM1_BINF_CCODE_SHIFT);
 927 @@ -398,8 +411,7 @@ static void sprom_extract_r123(struct ss
 928              SSB_SPROM1_ITSSI_A_SHIFT);
 929         SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
 930         SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
 931 -       if (out->revision >= 2)
 932 -               SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
 933 +
 934         SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
 935         SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
 936
 937 @@ -410,6 +422,8 @@ static void sprom_extract_r123(struct ss
 938         out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
 939                                                     SSB_SPROM1_AGAIN_A,
 940                                                     SSB_SPROM1_AGAIN_A_SHIFT);
 941 +       if (out->revision >= 2)
 942 +               sprom_extract_r23(out, in);
 943  }
 944
 945  /* Revs 4 5 and 8 have partially shared layout */
 946 @@ -454,23 +468,20 @@ static void sprom_extract_r458(struct ss
 947
 948  static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
 949  {
 950 -       int i;
 951 -       u16 v;
 952         u16 il0mac_offset;
 953
 954         if (out->revision == 4)
 955                 il0mac_offset = SSB_SPROM4_IL0MAC;
 956         else
 957                 il0mac_offset = SSB_SPROM5_IL0MAC;
 958 -       /* extract the MAC address */
 959 -       for (i = 0; i < 3; i++) {
 960 -               v = in[SPOFF(il0mac_offset) + i];
 961 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 962 -       }
 963 +
 964 +       sprom_get_mac(out->il0mac, &in[SPOFF(il0mac_offset)]);
 965 +
 966         SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
 967         SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
 968              SSB_SPROM4_ETHPHY_ET1A_SHIFT);
 969         SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
 970 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 971         if (out->revision == 4) {
 972                 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
 973                 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
 974 @@ -530,7 +541,7 @@ static void sprom_extract_r45(struct ssb
 975  static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
 976  {
 977         int i;
 978 -       u16 v, o;
 979 +       u16 o;
 980         u16 pwr_info_offset[] = {
 981                 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
 982                 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
 983 @@ -539,11 +550,10 @@ static void sprom_extract_r8(struct ssb_
 984                         ARRAY_SIZE(out->core_pwr_info));
 985
 986         /* extract the MAC address */
 987 -       for (i = 0; i < 3; i++) {
 988 -               v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
 989 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 990 -       }
 991 +       sprom_get_mac(out->il0mac, &in[SPOFF(SSB_SPROM8_IL0MAC)]);
 992 +
 993         SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
 994 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 995         SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
 996         SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
 997         SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
 998 @@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
 999         memset(out, 0, sizeof(*out));
1000
1001         out->revision = in[size - 1] & 0x00FF;
1002 -       ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
1003 +       ssb_dbg("SPROM revision %d detected\n", out->revision);
1004         memset(out->et0mac, 0xFF, 6);           /* preset et0 and et1 mac */
1005         memset(out->et1mac, 0xFF, 6);
1006
1007 @@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
1008                  * number stored in the SPROM.
1009                  * Always extract r1. */
1010                 out->revision = 1;
1011 -               ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
1012 +               ssb_dbg("SPROM treated as revision %d\n", out->revision);
1013         }
1014
1015         switch (out->revision) {
1016 @@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
1017                 sprom_extract_r8(out, in);
1018                 break;
1019         default:
1020 -               ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
1021 -                          " revision %d detected. Will extract"
1022 -                          " v1\n", out->revision);
1023 +               ssb_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
1024 +                        out->revision);
1025                 out->revision = 1;
1026                 sprom_extract_r123(out, in);
1027         }
1028 @@ -791,7 +800,7 @@ static int ssb_pci_sprom_get(struct ssb_
1029         u16 *buf;
1030
1031         if (!ssb_is_sprom_available(bus)) {
1032 -               ssb_printk(KERN_ERR PFX "No SPROM available!\n");
1033 +               ssb_err("No SPROM available!\n");
1034                 return -ENODEV;
1035         }
1036         if (bus->chipco.dev) {  /* can be unavailable! */
1037 @@ -810,7 +819,7 @@ static int ssb_pci_sprom_get(struct ssb_
1038         } else {
1039                 bus->sprom_offset = SSB_SPROM_BASE1;
1040         }
1041 -       ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
1042 +       ssb_dbg("SPROM offset is 0x%x\n", bus->sprom_offset);
1043
1044         buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
1045         if (!buf)
1046 @@ -835,18 +844,15 @@ static int ssb_pci_sprom_get(struct ssb_
1047                          * available for this device in some other storage */
1048                         err = ssb_fill_sprom_with_fallback(bus, sprom);
1049                         if (err) {
1050 -                               ssb_printk(KERN_WARNING PFX "WARNING: Using"
1051 -                                          " fallback SPROM failed (err %d)\n",
1052 -                                          err);
1053 +                               ssb_warn("WARNING: Using fallback SPROM failed (err %d)\n",
1054 +                                        err);
1055                         } else {
1056 -                               ssb_dprintk(KERN_DEBUG PFX "Using SPROM"
1057 -                                           " revision %d provided by"
1058 -                                           " platform.\n", sprom->revision);
1059 +                               ssb_dbg("Using SPROM revision %d provided by platform\n",
1060 +                                       sprom->revision);
1061                                 err = 0;
1062                                 goto out_free;
1063                         }
1064 -                       ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
1065 -                                  " SPROM CRC (corrupt SPROM)\n");
1066 +                       ssb_warn("WARNING: Invalid SPROM CRC (corrupt SPROM)\n");
1067                 }
1068         }
1069         err = sprom_extract(bus, sprom, buf, bus->sprom_size);
1070 --- a/drivers/ssb/pcihost_wrapper.c
1071 +++ b/drivers/ssb/pcihost_wrapper.c
1072 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
1073         struct ssb_bus *ssb = pci_get_drvdata(dev);
1074         int err;
1075
1076 -       pci_set_power_state(dev, 0);
1077 +       pci_set_power_state(dev, PCI_D0);
1078         err = pci_enable_device(dev);
1079         if (err)
1080                 return err;
1081 --- a/drivers/ssb/pcmcia.c
1082 +++ b/drivers/ssb/pcmcia.c
1083 @@ -143,7 +143,7 @@ int ssb_pcmcia_switch_coreidx(struct ssb
1084
1085         return 0;
1086  error:
1087 -       ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
1088 +       ssb_err("Failed to switch to core %u\n", coreidx);
1089         return err;
1090  }
1091
1092 @@ -153,10 +153,9 @@ int ssb_pcmcia_switch_core(struct ssb_bu
1093         int err;
1094
1095  #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
1096 -       ssb_printk(KERN_INFO PFX
1097 -                  "Switching to %s core, index %d\n",
1098 -                  ssb_core_name(dev->id.coreid),
1099 -                  dev->core_index);
1100 +       ssb_info("Switching to %s core, index %d\n",
1101 +                ssb_core_name(dev->id.coreid),
1102 +                dev->core_index);
1103  #endif
1104
1105         err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
1106 @@ -192,7 +191,7 @@ int ssb_pcmcia_switch_segment(struct ssb
1107
1108         return 0;
1109  error:
1110 -       ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
1111 +       ssb_err("Failed to switch pcmcia segment\n");
1112         return err;
1113  }
1114
1115 @@ -549,44 +548,39 @@ static int ssb_pcmcia_sprom_write_all(st
1116         bool failed = 0;
1117         size_t size = SSB_PCMCIA_SPROM_SIZE;
1118
1119 -       ssb_printk(KERN_NOTICE PFX
1120 -                  "Writing SPROM. Do NOT turn off the power! "
1121 -                  "Please stand by...\n");
1122 +       ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
1123         err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
1124         if (err) {
1125 -               ssb_printk(KERN_NOTICE PFX
1126 -                          "Could not enable SPROM write access.\n");
1127 +               ssb_notice("Could not enable SPROM write access\n");
1128                 return -EBUSY;
1129         }
1130 -       ssb_printk(KERN_NOTICE PFX "[ 0%%");
1131 +       ssb_notice("[ 0%%");
1132         msleep(500);
1133         for (i = 0; i < size; i++) {
1134                 if (i == size / 4)
1135 -                       ssb_printk("25%%");
1136 +                       ssb_cont("25%%");
1137                 else if (i == size / 2)
1138 -                       ssb_printk("50%%");
1139 +                       ssb_cont("50%%");
1140                 else if (i == (size * 3) / 4)
1141 -                       ssb_printk("75%%");
1142 +                       ssb_cont("75%%");
1143                 else if (i % 2)
1144 -                       ssb_printk(".");
1145 +                       ssb_cont(".");
1146                 err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
1147                 if (err) {
1148 -                       ssb_printk(KERN_NOTICE PFX
1149 -                                  "Failed to write to SPROM.\n");
1150 +                       ssb_notice("Failed to write to SPROM\n");
1151                         failed = 1;
1152                         break;
1153                 }
1154         }
1155         err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
1156         if (err) {
1157 -               ssb_printk(KERN_NOTICE PFX
1158 -                          "Could not disable SPROM write access.\n");
1159 +               ssb_notice("Could not disable SPROM write access\n");
1160                 failed = 1;
1161         }
1162         msleep(500);
1163         if (!failed) {
1164 -               ssb_printk("100%% ]\n");
1165 -               ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
1166 +               ssb_cont("100%% ]\n");
1167 +               ssb_notice("SPROM written\n");
1168         }
1169
1170         return failed ? -EBUSY : 0;
1171 @@ -700,7 +694,7 @@ static int ssb_pcmcia_do_get_invariants(
1172         return -ENOSPC; /* continue with next entry */
1173
1174  error:
1175 -       ssb_printk(KERN_ERR PFX
1176 +       ssb_err(
1177                    "PCMCIA: Failed to fetch device invariants: %s\n",
1178                    error_description);
1179         return -ENODEV;
1180 @@ -722,7 +716,7 @@ int ssb_pcmcia_get_invariants(struct ssb
1181         res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
1182                                 ssb_pcmcia_get_mac, sprom);
1183         if (res != 0) {
1184 -               ssb_printk(KERN_ERR PFX
1185 +               ssb_err(
1186                         "PCMCIA: Failed to fetch MAC address\n");
1187                 return -ENODEV;
1188         }
1189 @@ -733,7 +727,7 @@ int ssb_pcmcia_get_invariants(struct ssb
1190         if ((res == 0) || (res == -ENOSPC))
1191                 return 0;
1192
1193 -       ssb_printk(KERN_ERR PFX
1194 +       ssb_err(
1195                         "PCMCIA: Failed to fetch device invariants\n");
1196         return -ENODEV;
1197  }
1198 @@ -843,6 +837,6 @@ int ssb_pcmcia_init(struct ssb_bus *bus)
1199
1200         return 0;
1201  error:
1202 -       ssb_printk(KERN_ERR PFX "Failed to initialize PCMCIA host device\n");
1203 +       ssb_err("Failed to initialize PCMCIA host device\n");
1204         return err;
1205  }
1206 --- a/drivers/ssb/scan.c
1207 +++ b/drivers/ssb/scan.c
1208 @@ -125,8 +125,7 @@ static u16 pcidev_to_chipid(struct pci_d
1209                 chipid_fallback = 0x4401;
1210                 break;
1211         default:
1212 -               ssb_printk(KERN_ERR PFX
1213 -                          "PCI-ID not in fallback list\n");
1214 +               ssb_err("PCI-ID not in fallback list\n");
1215         }
1216
1217         return chipid_fallback;
1218 @@ -152,8 +151,7 @@ static u8 chipid_to_nrcores(u16 chipid)
1219         case 0x4704:
1220                 return 9;
1221         default:
1222 -               ssb_printk(KERN_ERR PFX
1223 -                          "CHIPID not in nrcores fallback list\n");
1224 +               ssb_err("CHIPID not in nrcores fallback list\n");
1225         }
1226
1227         return 1;
1228 @@ -320,15 +318,13 @@ int ssb_bus_scan(struct ssb_bus *bus,
1229                         bus->chip_package = 0;
1230                 }
1231         }
1232 -       ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
1233 -                  "package 0x%02X\n", bus->chip_id, bus->chip_rev,
1234 -                  bus->chip_package);
1235 +       ssb_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
1236 +                bus->chip_id, bus->chip_rev, bus->chip_package);
1237         if (!bus->nr_devices)
1238                 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
1239         if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
1240 -               ssb_printk(KERN_ERR PFX
1241 -                          "More than %d ssb cores found (%d)\n",
1242 -                          SSB_MAX_NR_CORES, bus->nr_devices);
1243 +               ssb_err("More than %d ssb cores found (%d)\n",
1244 +                       SSB_MAX_NR_CORES, bus->nr_devices);
1245                 goto err_unmap;
1246         }
1247         if (bus->bustype == SSB_BUSTYPE_SSB) {
1248 @@ -370,8 +366,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1249                         nr_80211_cores++;
1250                         if (nr_80211_cores > 1) {
1251                                 if (!we_support_multiple_80211_cores(bus)) {
1252 -                                       ssb_dprintk(KERN_INFO PFX "Ignoring additional "
1253 -                                                   "802.11 core\n");
1254 +                                       ssb_dbg("Ignoring additional 802.11 core\n");
1255                                         continue;
1256                                 }
1257                         }
1258 @@ -379,8 +374,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1259                 case SSB_DEV_EXTIF:
1260  #ifdef CONFIG_SSB_DRIVER_EXTIF
1261                         if (bus->extif.dev) {
1262 -                               ssb_printk(KERN_WARNING PFX
1263 -                                          "WARNING: Multiple EXTIFs found\n");
1264 +                               ssb_warn("WARNING: Multiple EXTIFs found\n");
1265                                 break;
1266                         }
1267                         bus->extif.dev = dev;
1268 @@ -388,8 +382,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1269                         break;
1270                 case SSB_DEV_CHIPCOMMON:
1271                         if (bus->chipco.dev) {
1272 -                               ssb_printk(KERN_WARNING PFX
1273 -                                          "WARNING: Multiple ChipCommon found\n");
1274 +                               ssb_warn("WARNING: Multiple ChipCommon found\n");
1275                                 break;
1276                         }
1277                         bus->chipco.dev = dev;
1278 @@ -398,8 +391,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1279                 case SSB_DEV_MIPS_3302:
1280  #ifdef CONFIG_SSB_DRIVER_MIPS
1281                         if (bus->mipscore.dev) {
1282 -                               ssb_printk(KERN_WARNING PFX
1283 -                                          "WARNING: Multiple MIPS cores found\n");
1284 +                               ssb_warn("WARNING: Multiple MIPS cores found\n");
1285                                 break;
1286                         }
1287                         bus->mipscore.dev = dev;
1288 @@ -420,8 +412,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1289                                 }
1290                         }
1291                         if (bus->pcicore.dev) {
1292 -                               ssb_printk(KERN_WARNING PFX
1293 -                                          "WARNING: Multiple PCI(E) cores found\n");
1294 +                               ssb_warn("WARNING: Multiple PCI(E) cores found\n");
1295                                 break;
1296                         }
1297                         bus->pcicore.dev = dev;
1298 --- a/drivers/ssb/sprom.c
1299 +++ b/drivers/ssb/sprom.c
1300 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
1301         while (cnt < sprom_size_words) {
1302                 memcpy(tmp, dump, 4);
1303                 dump += 4;
1304 -               err = strict_strtoul(tmp, 16, &parsed);
1305 +               err = kstrtoul(tmp, 16, &parsed);
1306                 if (err)
1307                         return err;
1308                 sprom[cnt++] = swab16((u16)parsed);
1309 @@ -127,13 +127,13 @@ ssize_t ssb_attr_sprom_store(struct ssb_
1310                 goto out_kfree;
1311         err = ssb_devices_freeze(bus, &freeze);
1312         if (err) {
1313 -               ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze all devices\n");
1314 +               ssb_err("SPROM write: Could not freeze all devices\n");
1315                 goto out_unlock;
1316         }
1317         res = sprom_write(bus, sprom);
1318         err = ssb_devices_thaw(&freeze);
1319         if (err)
1320 -               ssb_printk(KERN_ERR PFX "SPROM write: Could not thaw all devices\n");
1321 +               ssb_err("SPROM write: Could not thaw all devices\n");
1322  out_unlock:
1323         mutex_unlock(&bus->sprom_mutex);
1324  out_kfree:
1325 --- a/drivers/ssb/ssb_private.h
1326 +++ b/drivers/ssb/ssb_private.h
1327 @@ -9,16 +9,27 @@
1328  #define PFX    "ssb: "
1329
1330  #ifdef CONFIG_SSB_SILENT
1331 -# define ssb_printk(fmt, x...) do { /* nothing */ } while (0)
1332 +# define ssb_printk(fmt, ...)                                  \
1333 +       do { if (0) printk(fmt, ##__VA_ARGS__); } while (0)
1334  #else
1335 -# define ssb_printk            printk
1336 +# define ssb_printk(fmt, ...)                                  \
1337 +       printk(fmt, ##__VA_ARGS__)
1338  #endif /* CONFIG_SSB_SILENT */
1339
1340 +#define ssb_emerg(fmt, ...)    ssb_printk(KERN_EMERG PFX fmt, ##__VA_ARGS__)
1341 +#define ssb_err(fmt, ...)      ssb_printk(KERN_ERR PFX fmt, ##__VA_ARGS__)
1342 +#define ssb_warn(fmt, ...)     ssb_printk(KERN_WARNING PFX fmt, ##__VA_ARGS__)
1343 +#define ssb_notice(fmt, ...)   ssb_printk(KERN_NOTICE PFX fmt, ##__VA_ARGS__)
1344 +#define ssb_info(fmt, ...)     ssb_printk(KERN_INFO PFX fmt, ##__VA_ARGS__)
1345 +#define ssb_cont(fmt, ...)     ssb_printk(KERN_CONT fmt, ##__VA_ARGS__)
1346 +
1347  /* dprintk: Debugging printk; vanishes for non-debug compilation */
1348  #ifdef CONFIG_SSB_DEBUG
1349 -# define ssb_dprintk(fmt, x...)        ssb_printk(fmt , ##x)
1350 +# define ssb_dbg(fmt, ...)                                     \
1351 +       ssb_printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__)
1352  #else
1353 -# define ssb_dprintk(fmt, x...)        do { /* nothing */ } while (0)
1354 +# define ssb_dbg(fmt, ...)                                     \
1355 +       do { if (0) printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__); } while (0)
1356  #endif
1357
1358  #ifdef CONFIG_SSB_DEBUG
1359 @@ -217,6 +228,25 @@ extern u32 ssb_chipco_watchdog_timer_set
1360                                              u32 ticks);
1361  extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1362
1363 +/* driver_chipcommon_sflash.c */
1364 +#ifdef CONFIG_SSB_SFLASH
1365 +int ssb_sflash_init(struct ssb_chipcommon *cc);
1366 +#else
1367 +static inline int ssb_sflash_init(struct ssb_chipcommon *cc)
1368 +{
1369 +       pr_err("Serial flash not supported\n");
1370 +       return 0;
1371 +}
1372 +#endif /* CONFIG_SSB_SFLASH */
1373 +
1374 +#ifdef CONFIG_SSB_DRIVER_MIPS
1375 +extern struct platform_device ssb_pflash_dev;
1376 +#endif
1377 +
1378 +#ifdef CONFIG_SSB_SFLASH
1379 +extern struct platform_device ssb_sflash_dev;
1380 +#endif
1381 +
1382  #ifdef CONFIG_SSB_DRIVER_EXTIF
1383  extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
1384  extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1385 --- a/include/linux/ssb/ssb.h
1386 +++ b/include/linux/ssb/ssb.h
1387 @@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
1388
1389  struct ssb_sprom {
1390         u8 revision;
1391 -       u8 il0mac[6];           /* MAC address for 802.11b/g */
1392 -       u8 et0mac[6];           /* MAC address for Ethernet */
1393 -       u8 et1mac[6];           /* MAC address for 802.11a */
1394 +       u8 il0mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11b/g */
1395 +       u8 et0mac[6] __aligned(sizeof(u16));    /* MAC address for Ethernet */
1396 +       u8 et1mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11a */
1397         u8 et0phyaddr;          /* MII address for enet0 */
1398         u8 et1phyaddr;          /* MII address for enet1 */
1399         u8 et0mdcport;          /* MDIO for enet0 */
1400 @@ -340,13 +340,61 @@ enum ssb_bustype {
1401  #define SSB_BOARDVENDOR_DELL   0x1028  /* Dell */
1402  #define SSB_BOARDVENDOR_HP     0x0E11  /* HP */
1403  /* board_type */
1404 +#define SSB_BOARD_BCM94301CB   0x0406
1405 +#define SSB_BOARD_BCM94301MP   0x0407
1406 +#define SSB_BOARD_BU4309       0x040A
1407 +#define SSB_BOARD_BCM94309CB   0x040B
1408 +#define SSB_BOARD_BCM4309MP    0x040C
1409 +#define SSB_BOARD_BU4306       0x0416
1410  #define SSB_BOARD_BCM94306MP   0x0418
1411  #define SSB_BOARD_BCM4309G     0x0421
1412  #define SSB_BOARD_BCM4306CB    0x0417
1413 -#define SSB_BOARD_BCM4309MP    0x040C
1414 +#define SSB_BOARD_BCM94306PC   0x0425  /* pcmcia 3.3v 4306 card */
1415 +#define SSB_BOARD_BCM94306CBSG 0x042B  /* with SiGe PA */
1416 +#define SSB_BOARD_PCSG94306    0x042D  /* with SiGe PA */
1417 +#define SSB_BOARD_BU4704SD     0x042E  /* with sdram */
1418 +#define SSB_BOARD_BCM94704AGR  0x042F  /* dual 11a/11g Router */
1419 +#define SSB_BOARD_BCM94308MP   0x0430  /* 11a-only minipci */
1420 +#define SSB_BOARD_BU4318       0x0447
1421 +#define SSB_BOARD_CB4318       0x0448
1422 +#define SSB_BOARD_MPG4318      0x0449
1423  #define SSB_BOARD_MP4318       0x044A
1424 -#define SSB_BOARD_BU4306       0x0416
1425 -#define SSB_BOARD_BU4309       0x040A
1426 +#define SSB_BOARD_SD4318       0x044B
1427 +#define SSB_BOARD_BCM94306P    0x044C  /* with SiGe */
1428 +#define SSB_BOARD_BCM94303MP   0x044E
1429 +#define SSB_BOARD_BCM94306MPM  0x0450
1430 +#define SSB_BOARD_BCM94306MPL  0x0453
1431 +#define SSB_BOARD_PC4303       0x0454  /* pcmcia */
1432 +#define SSB_BOARD_BCM94306MPLNA        0x0457
1433 +#define SSB_BOARD_BCM94306MPH  0x045B
1434 +#define SSB_BOARD_BCM94306PCIV 0x045C
1435 +#define SSB_BOARD_BCM94318MPGH 0x0463
1436 +#define SSB_BOARD_BU4311       0x0464
1437 +#define SSB_BOARD_BCM94311MC   0x0465
1438 +#define SSB_BOARD_BCM94311MCAG 0x0466
1439 +/* 4321 boards */
1440 +#define SSB_BOARD_BU4321       0x046B
1441 +#define SSB_BOARD_BU4321E      0x047C
1442 +#define SSB_BOARD_MP4321       0x046C
1443 +#define SSB_BOARD_CB2_4321     0x046D
1444 +#define SSB_BOARD_CB2_4321_AG  0x0066
1445 +#define SSB_BOARD_MC4321       0x046E
1446 +/* 4325 boards */
1447 +#define SSB_BOARD_BCM94325DEVBU        0x0490
1448 +#define SSB_BOARD_BCM94325BGABU        0x0491
1449 +#define SSB_BOARD_BCM94325SDGWB        0x0492
1450 +#define SSB_BOARD_BCM94325SDGMDL       0x04AA
1451 +#define SSB_BOARD_BCM94325SDGMDL2      0x04C6
1452 +#define SSB_BOARD_BCM94325SDGMDL3      0x04C9
1453 +#define SSB_BOARD_BCM94325SDABGWBA     0x04E1
1454 +/* 4322 boards */
1455 +#define SSB_BOARD_BCM94322MC   0x04A4
1456 +#define SSB_BOARD_BCM94322USB  0x04A8  /* dualband */
1457 +#define SSB_BOARD_BCM94322HM   0x04B0
1458 +#define SSB_BOARD_BCM94322USB2D        0x04Bf  /* single band discrete front end */
1459 +/* 4312 boards */
1460 +#define SSB_BOARD_BU4312       0x048A
1461 +#define SSB_BOARD_BCM4312MCGSG 0x04B5
1462  /* chip_package */
1463  #define SSB_CHIPPACK_BCM4712S  1       /* Small 200pin 4712 */
1464  #define SSB_CHIPPACK_BCM4712M  2       /* Medium 225pin 4712 */
1465 --- a/include/linux/ssb/ssb_driver_gige.h
1466 +++ b/include/linux/ssb/ssb_driver_gige.h
1467 @@ -97,21 +97,16 @@ static inline bool ssb_gige_must_flush_p
1468         return 0;
1469  }
1470
1471 -#ifdef CONFIG_BCM47XX
1472 -#include <asm/mach-bcm47xx/nvram.h>
1473  /* Get the device MAC address */
1474 -static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1475 -{
1476 -       char buf[20];
1477 -       if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
1478 -               return;
1479 -       nvram_parse_macaddr(buf, macaddr);
1480 -}
1481 -#else
1482 -static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1483 +static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1484  {
1485 +       struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
1486 +       if (!dev)
1487 +               return -ENODEV;
1488 +
1489 +       memcpy(macaddr, dev->dev->bus->sprom.et0mac, 6);
1490 +       return 0;
1491  }
1492 -#endif
1493
1494  extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
1495                                           struct pci_dev *pdev);
1496 @@ -175,6 +170,10 @@ static inline bool ssb_gige_must_flush_p
1497  {
1498         return 0;
1499  }
1500 +static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1501 +{
1502 +       return -ENODEV;
1503 +}
1504
1505  #endif /* CONFIG_SSB_DRIVER_GIGE */
1506  #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
1507 --- a/include/linux/ssb/ssb_driver_mips.h
1508 +++ b/include/linux/ssb/ssb_driver_mips.h
1509 @@ -20,6 +20,18 @@ struct ssb_pflash {
1510         u32 window_size;
1511  };
1512
1513 +#ifdef CONFIG_SSB_SFLASH
1514 +struct ssb_sflash {
1515 +       bool present;
1516 +       u32 window;
1517 +       u32 blocksize;
1518 +       u16 numblocks;
1519 +       u32 size;
1520 +
1521 +       void *priv;
1522 +};
1523 +#endif
1524 +
1525  struct ssb_mipscore {
1526         struct ssb_device *dev;
1527
1528 @@ -27,6 +39,9 @@ struct ssb_mipscore {
1529         struct ssb_serial_port serial_ports[4];
1530
1531         struct ssb_pflash pflash;
1532 +#ifdef CONFIG_SSB_SFLASH
1533 +       struct ssb_sflash sflash;
1534 +#endif
1535  };
1536
1537  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
1538 @@ -45,6 +60,11 @@ void ssb_mipscore_init(struct ssb_mipsco
1539  {
1540  }
1541
1542 +static inline unsigned int ssb_mips_irq(struct ssb_device *dev)
1543 +{
1544 +       return 0;
1545 +}
1546 +
1547  #endif /* CONFIG_SSB_DRIVER_MIPS */
1548
1549  #endif /* LINUX_SSB_MIPSCORE_H_ */
1550 --- a/include/linux/ssb/ssb_regs.h
1551 +++ b/include/linux/ssb/ssb_regs.h
1552 @@ -172,6 +172,7 @@
1553  #define SSB_SPROMSIZE_WORDS_R4         220
1554  #define SSB_SPROMSIZE_BYTES_R123       (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
1555  #define SSB_SPROMSIZE_BYTES_R4         (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
1556 +#define SSB_SPROMSIZE_WORDS_R10                230
1557  #define SSB_SPROM_BASE1                        0x1000
1558  #define SSB_SPROM_BASE31               0x0800
1559  #define SSB_SPROM_REVISION             0x007E
1560 @@ -289,11 +290,11 @@
1561  #define  SSB_SPROM4_ETHPHY_ET1A_SHIFT  5
1562  #define  SSB_SPROM4_ETHPHY_ET0M                (1<<14) /* MDIO for enet0 */
1563  #define  SSB_SPROM4_ETHPHY_ET1M                (1<<15) /* MDIO for enet1 */
1564 -#define SSB_SPROM4_ANTAVAIL            0x005D  /* Antenna available bitfields */
1565 -#define  SSB_SPROM4_ANTAVAIL_A         0x00FF  /* A-PHY bitfield */
1566 -#define  SSB_SPROM4_ANTAVAIL_A_SHIFT   0
1567 -#define  SSB_SPROM4_ANTAVAIL_BG                0xFF00  /* B-PHY and G-PHY bitfield */
1568 -#define  SSB_SPROM4_ANTAVAIL_BG_SHIFT  8
1569 +#define SSB_SPROM4_ANTAVAIL            0x005C  /* Antenna available bitfields */
1570 +#define  SSB_SPROM4_ANTAVAIL_BG                0x00FF  /* B-PHY and G-PHY bitfield */
1571 +#define  SSB_SPROM4_ANTAVAIL_BG_SHIFT  0
1572 +#define  SSB_SPROM4_ANTAVAIL_A         0xFF00  /* A-PHY bitfield */
1573 +#define  SSB_SPROM4_ANTAVAIL_A_SHIFT   8
1574  #define SSB_SPROM4_AGAIN01             0x005E  /* Antenna Gain (in dBm Q5.2) */
1575  #define  SSB_SPROM4_AGAIN0             0x00FF  /* Antenna 0 */
1576  #define  SSB_SPROM4_AGAIN0_SHIFT       0