target/linux/generic/patches-3.8/020-ssb_update.patch

   1 --- a/drivers/ssb/Kconfig
   2 +++ b/drivers/ssb/Kconfig
   3 @@ -136,6 +136,11 @@ config SSB_DRIVER_MIPS
   4
   5           If unsure, say N
   6
   7 +config SSB_SFLASH
   8 +       bool "SSB serial flash support"
   9 +       depends on SSB_DRIVER_MIPS && BROKEN
  10 +       default y
  11 +
  12  # Assumption: We are on embedded, if we compile the MIPS core.
  13  config SSB_EMBEDDED
  14         bool
  15 --- a/drivers/ssb/Makefile
  16 +++ b/drivers/ssb/Makefile
  17 @@ -11,6 +11,7 @@ ssb-$(CONFIG_SSB_SDIOHOST)            += sdio.o
  18  # built-in drivers
  19  ssb-y                                  += driver_chipcommon.o
  20  ssb-y                                  += driver_chipcommon_pmu.o
  21 +ssb-$(CONFIG_SSB_SFLASH)               += driver_chipcommon_sflash.o
  22  ssb-$(CONFIG_SSB_DRIVER_MIPS)          += driver_mipscore.o
  23  ssb-$(CONFIG_SSB_DRIVER_EXTIF)         += driver_extif.o
  24  ssb-$(CONFIG_SSB_DRIVER_PCICORE)       += driver_pcicore.o
  25 --- a/drivers/ssb/driver_chipcommon.c
  26 +++ b/drivers/ssb/driver_chipcommon.c
  27 @@ -354,7 +354,7 @@ void ssb_chipcommon_init(struct ssb_chip
  28
  29         if (cc->dev->id.revision >= 11)
  30                 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
  31 -       ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
  32 +       ssb_dbg("chipcommon status is 0x%x\n", cc->status);
  33
  34         if (cc->dev->id.revision >= 20) {
  35                 chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0);
  36 --- a/drivers/ssb/driver_chipcommon_pmu.c
  37 +++ b/drivers/ssb/driver_chipcommon_pmu.c
  38 @@ -110,8 +110,8 @@ static void ssb_pmu0_pllinit_r0(struct s
  39                 return;
  40         }
  41
  42 -       ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
  43 -                  (crystalfreq / 1000), (crystalfreq % 1000));
  44 +       ssb_info("Programming PLL to %u.%03u MHz\n",
  45 +                crystalfreq / 1000, crystalfreq % 1000);
  46
  47         /* First turn the PLL off. */
  48         switch (bus->chip_id) {
  49 @@ -138,7 +138,7 @@ static void ssb_pmu0_pllinit_r0(struct s
  50         }
  51         tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
  52         if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
  53 -               ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
  54 +               ssb_emerg("Failed to turn the PLL off!\n");
  55
  56         /* Set PDIV in PLL control 0. */
  57         pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
  58 @@ -249,8 +249,8 @@ static void ssb_pmu1_pllinit_r0(struct s
  59                 return;
  60         }
  61
  62 -       ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
  63 -                  (crystalfreq / 1000), (crystalfreq % 1000));
  64 +       ssb_info("Programming PLL to %u.%03u MHz\n",
  65 +                crystalfreq / 1000, crystalfreq % 1000);
  66
  67         /* First turn the PLL off. */
  68         switch (bus->chip_id) {
  69 @@ -275,7 +275,7 @@ static void ssb_pmu1_pllinit_r0(struct s
  70         }
  71         tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
  72         if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
  73 -               ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
  74 +               ssb_emerg("Failed to turn the PLL off!\n");
  75
  76         /* Set p1div and p2div. */
  77         pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
  78 @@ -349,9 +349,8 @@ static void ssb_pmu_pll_init(struct ssb_
  79         case 43222:
  80                 break;
  81         default:
  82 -               ssb_printk(KERN_ERR PFX
  83 -                          "ERROR: PLL init unknown for device %04X\n",
  84 -                          bus->chip_id);
  85 +               ssb_err("ERROR: PLL init unknown for device %04X\n",
  86 +                       bus->chip_id);
  87         }
  88  }
  89
  90 @@ -472,9 +471,8 @@ static void ssb_pmu_resources_init(struc
  91                 max_msk = 0xFFFFF;
  92                 break;
  93         default:
  94 -               ssb_printk(KERN_ERR PFX
  95 -                          "ERROR: PMU resource config unknown for device %04X\n",
  96 -                          bus->chip_id);
  97 +               ssb_err("ERROR: PMU resource config unknown for device %04X\n",
  98 +                       bus->chip_id);
  99         }
 100
 101         if (updown_tab) {
 102 @@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
 103         pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
 104         cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
 105
 106 -       ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
 107 -                   cc->pmu.rev, pmucap);
 108 +       ssb_dbg("Found rev %u PMU (capabilities 0x%08X)\n",
 109 +               cc->pmu.rev, pmucap);
 110
 111         if (cc->pmu.rev == 1)
 112                 chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
 113 @@ -638,9 +636,8 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chi
 114         case 0x5354:
 115                 ssb_pmu_get_alp_clock_clk0(cc);
 116         default:
 117 -               ssb_printk(KERN_ERR PFX
 118 -                          "ERROR: PMU alp clock unknown for device %04X\n",
 119 -                          bus->chip_id);
 120 +               ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
 121 +                       bus->chip_id);
 122                 return 0;
 123         }
 124  }
 125 @@ -654,9 +651,8 @@ u32 ssb_pmu_get_cpu_clock(struct ssb_chi
 126                 /* 5354 chip uses a non programmable PLL of frequency 240MHz */
 127                 return 240000000;
 128         default:
 129 -               ssb_printk(KERN_ERR PFX
 130 -                          "ERROR: PMU cpu clock unknown for device %04X\n",
 131 -                          bus->chip_id);
 132 +               ssb_err("ERROR: PMU cpu clock unknown for device %04X\n",
 133 +                       bus->chip_id);
 134                 return 0;
 135         }
 136  }
 137 @@ -669,9 +665,8 @@ u32 ssb_pmu_get_controlclock(struct ssb_
 138         case 0x5354:
 139                 return 120000000;
 140         default:
 141 -               ssb_printk(KERN_ERR PFX
 142 -                          "ERROR: PMU controlclock unknown for device %04X\n",
 143 -                          bus->chip_id);
 144 +               ssb_err("ERROR: PMU controlclock unknown for device %04X\n",
 145 +                       bus->chip_id);
 146                 return 0;
 147         }
 148  }
 149 @@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
 150                 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
 151                 break;
 152         case 43222:
 153 -               /* TODO: BCM43222 requires updating PLLs too */
 154 -               return;
 155 +               if (spuravoid == 1) {
 156 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);
 157 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);
 158 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);
 159 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
 160 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);
 161 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);
 162 +               } else {
 163 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);
 164 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);
 165 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);
 166 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
 167 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);
 168 +                       ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);
 169 +               }
 170 +               pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
 171 +               break;
 172         default:
 173                 ssb_printk(KERN_ERR PFX
 174                            "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
 175 --- /dev/null
 176 +++ b/drivers/ssb/driver_chipcommon_sflash.c
 177 @@ -0,0 +1,140 @@
 178 +/*
 179 + * Sonics Silicon Backplane
 180 + * ChipCommon serial flash interface
 181 + *
 182 + * Licensed under the GNU/GPL. See COPYING for details.
 183 + */
 184 +
 185 +#include <linux/ssb/ssb.h>
 186 +
 187 +#include "ssb_private.h"
 188 +
 189 +struct ssb_sflash_tbl_e {
 190 +       char *name;
 191 +       u32 id;
 192 +       u32 blocksize;
 193 +       u16 numblocks;
 194 +};
 195 +
 196 +static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
 197 +       { "M25P20", 0x11, 0x10000, 4, },
 198 +       { "M25P40", 0x12, 0x10000, 8, },
 199 +
 200 +       { "M25P16", 0x14, 0x10000, 32, },
 201 +       { "M25P32", 0x15, 0x10000, 64, },
 202 +       { "M25P64", 0x16, 0x10000, 128, },
 203 +       { "M25FL128", 0x17, 0x10000, 256, },
 204 +       { 0 },
 205 +};
 206 +
 207 +static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
 208 +       { "SST25WF512", 1, 0x1000, 16, },
 209 +       { "SST25VF512", 0x48, 0x1000, 16, },
 210 +       { "SST25WF010", 2, 0x1000, 32, },
 211 +       { "SST25VF010", 0x49, 0x1000, 32, },
 212 +       { "SST25WF020", 3, 0x1000, 64, },
 213 +       { "SST25VF020", 0x43, 0x1000, 64, },
 214 +       { "SST25WF040", 4, 0x1000, 128, },
 215 +       { "SST25VF040", 0x44, 0x1000, 128, },
 216 +       { "SST25VF040B", 0x8d, 0x1000, 128, },
 217 +       { "SST25WF080", 5, 0x1000, 256, },
 218 +       { "SST25VF080B", 0x8e, 0x1000, 256, },
 219 +       { "SST25VF016", 0x41, 0x1000, 512, },
 220 +       { "SST25VF032", 0x4a, 0x1000, 1024, },
 221 +       { "SST25VF064", 0x4b, 0x1000, 2048, },
 222 +       { 0 },
 223 +};
 224 +
 225 +static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
 226 +       { "AT45DB011", 0xc, 256, 512, },
 227 +       { "AT45DB021", 0x14, 256, 1024, },
 228 +       { "AT45DB041", 0x1c, 256, 2048, },
 229 +       { "AT45DB081", 0x24, 256, 4096, },
 230 +       { "AT45DB161", 0x2c, 512, 4096, },
 231 +       { "AT45DB321", 0x34, 512, 8192, },
 232 +       { "AT45DB642", 0x3c, 1024, 8192, },
 233 +       { 0 },
 234 +};
 235 +
 236 +static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
 237 +{
 238 +       int i;
 239 +       chipco_write32(cc, SSB_CHIPCO_FLASHCTL,
 240 +                      SSB_CHIPCO_FLASHCTL_START | opcode);
 241 +       for (i = 0; i < 1000; i++) {
 242 +               if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) &
 243 +                     SSB_CHIPCO_FLASHCTL_BUSY))
 244 +                       return;
 245 +               cpu_relax();
 246 +       }
 247 +       pr_err("SFLASH control command failed (timeout)!\n");
 248 +}
 249 +
 250 +/* Initialize serial flash access */
 251 +int ssb_sflash_init(struct ssb_chipcommon *cc)
 252 +{
 253 +       struct ssb_sflash_tbl_e *e;
 254 +       u32 id, id2;
 255 +
 256 +       switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
 257 +       case SSB_CHIPCO_FLASHT_STSER:
 258 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP);
 259 +
 260 +               chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0);
 261 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
 262 +               id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
 263 +
 264 +               chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 1);
 265 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
 266 +               id2 = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
 267 +
 268 +               switch (id) {
 269 +               case 0xbf:
 270 +                       for (e = ssb_sflash_sst_tbl; e->name; e++) {
 271 +                               if (e->id == id2)
 272 +                                       break;
 273 +                       }
 274 +                       break;
 275 +               case 0x13:
 276 +                       return -ENOTSUPP;
 277 +               default:
 278 +                       for (e = ssb_sflash_st_tbl; e->name; e++) {
 279 +                               if (e->id == id)
 280 +                                       break;
 281 +                       }
 282 +                       break;
 283 +               }
 284 +               if (!e->name) {
 285 +                       pr_err("Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n",
 286 +                              id, id2);
 287 +                       return -ENOTSUPP;
 288 +               }
 289 +
 290 +               break;
 291 +       case SSB_CHIPCO_FLASHT_ATSER:
 292 +               ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_AT_STATUS);
 293 +               id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA) & 0x3c;
 294 +
 295 +               for (e = ssb_sflash_at_tbl; e->name; e++) {
 296 +                       if (e->id == id)
 297 +                               break;
 298 +               }
 299 +               if (!e->name) {
 300 +                       pr_err("Unsupported Atmel serial flash (id: 0x%X)\n",
 301 +                              id);
 302 +                       return -ENOTSUPP;
 303 +               }
 304 +
 305 +               break;
 306 +       default:
 307 +               pr_err("Unsupported flash type\n");
 308 +               return -ENOTSUPP;
 309 +       }
 310 +
 311 +       pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
 312 +               e->name, e->blocksize, e->numblocks);
 313 +
 314 +       pr_err("Serial flash support is not implemented yet!\n");
 315 +
 316 +       return -ENOTSUPP;
 317 +}
 318 --- a/drivers/ssb/driver_gpio.c
 319 +++ b/drivers/ssb/driver_gpio.c
 320 @@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct
 321         ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
 322  }
 323
 324 +static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
 325 +{
 326 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 327 +
 328 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 329 +               return ssb_mips_irq(bus->chipco.dev) + 2;
 330 +       else
 331 +               return -EINVAL;
 332 +}
 333 +
 334  static int ssb_gpio_chipco_init(struct ssb_bus *bus)
 335  {
 336         struct gpio_chip *chip = &bus->gpio;
 337 @@ -86,6 +96,7 @@ static int ssb_gpio_chipco_init(struct s
 338         chip->set               = ssb_gpio_chipco_set_value;
 339         chip->direction_input   = ssb_gpio_chipco_direction_input;
 340         chip->direction_output  = ssb_gpio_chipco_direction_output;
 341 +       chip->to_irq            = ssb_gpio_chipco_to_irq;
 342         chip->ngpio             = 16;
 343         /* There is just one SoC in one device and its GPIO addresses should be
 344          * deterministic to address them more easily. The other buses could get
 345 @@ -134,6 +145,16 @@ static int ssb_gpio_extif_direction_outp
 346         return 0;
 347  }
 348
 349 +static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
 350 +{
 351 +       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
 352 +
 353 +       if (bus->bustype == SSB_BUSTYPE_SSB)
 354 +               return ssb_mips_irq(bus->extif.dev) + 2;
 355 +       else
 356 +               return -EINVAL;
 357 +}
 358 +
 359  static int ssb_gpio_extif_init(struct ssb_bus *bus)
 360  {
 361         struct gpio_chip *chip = &bus->gpio;
 362 @@ -144,6 +165,7 @@ static int ssb_gpio_extif_init(struct ss
 363         chip->set               = ssb_gpio_extif_set_value;
 364         chip->direction_input   = ssb_gpio_extif_direction_input;
 365         chip->direction_output  = ssb_gpio_extif_direction_output;
 366 +       chip->to_irq            = ssb_gpio_extif_to_irq;
 367         chip->ngpio             = 5;
 368         /* There is just one SoC in one device and its GPIO addresses should be
 369          * deterministic to address them more easily. The other buses could get
 370 --- a/drivers/ssb/driver_mipscore.c
 371 +++ b/drivers/ssb/driver_mipscore.c
 372 @@ -10,6 +10,7 @@
 373
 374  #include <linux/ssb/ssb.h>
 375
 376 +#include <linux/mtd/physmap.h>
 377  #include <linux/serial.h>
 378  #include <linux/serial_core.h>
 379  #include <linux/serial_reg.h>
 380 @@ -17,6 +18,25 @@
 381
 382  #include "ssb_private.h"
 383
 384 +static const char *part_probes[] = { "bcm47xxpart", NULL };
 385 +
 386 +static struct physmap_flash_data ssb_pflash_data = {
 387 +       .part_probe_types       = part_probes,
 388 +};
 389 +
 390 +static struct resource ssb_pflash_resource = {
 391 +       .name   = "ssb_pflash",
 392 +       .flags  = IORESOURCE_MEM,
 393 +};
 394 +
 395 +struct platform_device ssb_pflash_dev = {
 396 +       .name           = "physmap-flash",
 397 +       .dev            = {
 398 +               .platform_data  = &ssb_pflash_data,
 399 +       },
 400 +       .resource       = &ssb_pflash_resource,
 401 +       .num_resources  = 1,
 402 +};
 403
 404  static inline u32 mips_read32(struct ssb_mipscore *mcore,
 405                               u16 offset)
 406 @@ -147,21 +167,22 @@ static void set_irq(struct ssb_device *d
 407                 irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]);
 408                 ssb_write32(mdev, SSB_IPSFLAG, irqflag);
 409         }
 410 -       ssb_dprintk(KERN_INFO PFX
 411 -                   "set_irq: core 0x%04x, irq %d => %d\n",
 412 -                   dev->id.coreid, oldirq+2, irq+2);
 413 +       ssb_dbg("set_irq: core 0x%04x, irq %d => %d\n",
 414 +               dev->id.coreid, oldirq+2, irq+2);
 415  }
 416
 417  static void print_irq(struct ssb_device *dev, unsigned int irq)
 418  {
 419 -       int i;
 420         static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
 421 -       ssb_dprintk(KERN_INFO PFX
 422 -               "core 0x%04x, irq :", dev->id.coreid);
 423 -       for (i = 0; i <= 6; i++) {
 424 -               ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" ");
 425 -       }
 426 -       ssb_dprintk("\n");
 427 +       ssb_dbg("core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n",
 428 +               dev->id.coreid,
 429 +               irq_name[0], irq == 0 ? "*" : " ",
 430 +               irq_name[1], irq == 1 ? "*" : " ",
 431 +               irq_name[2], irq == 2 ? "*" : " ",
 432 +               irq_name[3], irq == 3 ? "*" : " ",
 433 +               irq_name[4], irq == 4 ? "*" : " ",
 434 +               irq_name[5], irq == 5 ? "*" : " ",
 435 +               irq_name[6], irq == 6 ? "*" : " ");
 436  }
 437
 438  static void dump_irq(struct ssb_bus *bus)
 439 @@ -189,34 +210,43 @@ static void ssb_mips_serial_init(struct
 440  static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
 441  {
 442         struct ssb_bus *bus = mcore->dev->bus;
 443 +       struct ssb_pflash *pflash = &mcore->pflash;
 444
 445         /* When there is no chipcommon on the bus there is 4MB flash */
 446         if (!ssb_chipco_available(&bus->chipco)) {
 447 -               mcore->pflash.present = true;
 448 -               mcore->pflash.buswidth = 2;
 449 -               mcore->pflash.window = SSB_FLASH1;
 450 -               mcore->pflash.window_size = SSB_FLASH1_SZ;
 451 -               return;
 452 +               pflash->present = true;
 453 +               pflash->buswidth = 2;
 454 +               pflash->window = SSB_FLASH1;
 455 +               pflash->window_size = SSB_FLASH1_SZ;
 456 +               goto ssb_pflash;
 457         }
 458
 459         /* There is ChipCommon, so use it to read info about flash */
 460         switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
 461         case SSB_CHIPCO_FLASHT_STSER:
 462         case SSB_CHIPCO_FLASHT_ATSER:
 463 -               pr_err("Serial flash not supported\n");
 464 +               pr_debug("Found serial flash\n");
 465 +               ssb_sflash_init(&bus->chipco);
 466                 break;
 467         case SSB_CHIPCO_FLASHT_PARA:
 468                 pr_debug("Found parallel flash\n");
 469 -               mcore->pflash.present = true;
 470 -               mcore->pflash.window = SSB_FLASH2;
 471 -               mcore->pflash.window_size = SSB_FLASH2_SZ;
 472 +               pflash->present = true;
 473 +               pflash->window = SSB_FLASH2;
 474 +               pflash->window_size = SSB_FLASH2_SZ;
 475                 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
 476                                & SSB_CHIPCO_CFG_DS16) == 0)
 477 -                       mcore->pflash.buswidth = 1;
 478 +                       pflash->buswidth = 1;
 479                 else
 480 -                       mcore->pflash.buswidth = 2;
 481 +                       pflash->buswidth = 2;
 482                 break;
 483         }
 484 +
 485 +ssb_pflash:
 486 +       if (pflash->present) {
 487 +               ssb_pflash_data.width = pflash->buswidth;
 488 +               ssb_pflash_resource.start = pflash->window;
 489 +               ssb_pflash_resource.end = pflash->window + pflash->window_size;
 490 +       }
 491  }
 492
 493  u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
 494 @@ -257,7 +287,7 @@ void ssb_mipscore_init(struct ssb_mipsco
 495         if (!mcore->dev)
 496                 return; /* We don't have a MIPS core */
 497
 498 -       ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n");
 499 +       ssb_dbg("Initializing MIPS core...\n");
 500
 501         bus = mcore->dev->bus;
 502         hz = ssb_clockspeed(bus);
 503 @@ -305,7 +335,7 @@ void ssb_mipscore_init(struct ssb_mipsco
 504                         break;
 505                 }
 506         }
 507 -       ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n");
 508 +       ssb_dbg("after irq reconfiguration\n");
 509         dump_irq(bus);
 510
 511         ssb_mips_serial_init(mcore);
 512 --- a/drivers/ssb/driver_pcicore.c
 513 +++ b/drivers/ssb/driver_pcicore.c
 514 @@ -263,8 +263,7 @@ int ssb_pcicore_plat_dev_init(struct pci
 515                 return -ENODEV;
 516         }
 517
 518 -       ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
 519 -                  pci_name(d));
 520 +       ssb_info("PCI: Fixing up device %s\n", pci_name(d));
 521
 522         /* Fix up interrupt lines */
 523         d->irq = ssb_mips_irq(extpci_core->dev) + 2;
 524 @@ -285,12 +284,12 @@ static void ssb_pcicore_fixup_pcibridge(
 525         if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
 526                 return;
 527
 528 -       ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
 529 +       ssb_info("PCI: Fixing up bridge %s\n", pci_name(dev));
 530
 531         /* Enable PCI bridge bus mastering and memory space */
 532         pci_set_master(dev);
 533         if (pcibios_enable_device(dev, ~0) < 0) {
 534 -               ssb_printk(KERN_ERR "PCI: SSB bridge enable failed\n");
 535 +               ssb_err("PCI: SSB bridge enable failed\n");
 536                 return;
 537         }
 538
 539 @@ -299,8 +298,8 @@ static void ssb_pcicore_fixup_pcibridge(
 540
 541         /* Make sure our latency is high enough to handle the devices behind us */
 542         lat = 168;
 543 -       ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
 544 -                  pci_name(dev), lat);
 545 +       ssb_info("PCI: Fixing latency timer of device %s to %u\n",
 546 +                pci_name(dev), lat);
 547         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
 548  }
 549  DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_pcicore_fixup_pcibridge);
 550 @@ -323,7 +322,7 @@ static void ssb_pcicore_init_hostmode(st
 551                 return;
 552         extpci_core = pc;
 553
 554 -       ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n");
 555 +       ssb_dbg("PCIcore in host mode found\n");
 556         /* Reset devices on the external PCI bus */
 557         val = SSB_PCICORE_CTL_RST_OE;
 558         val |= SSB_PCICORE_CTL_CLK_OE;
 559 @@ -338,7 +337,7 @@ static void ssb_pcicore_init_hostmode(st
 560         udelay(1); /* Assertion time demanded by the PCI standard */
 561
 562         if (pc->dev->bus->has_cardbus_slot) {
 563 -               ssb_dprintk(KERN_INFO PFX "CardBus slot detected\n");
 564 +               ssb_dbg("CardBus slot detected\n");
 565                 pc->cardbusmode = 1;
 566                 /* GPIO 1 resets the bridge */
 567                 ssb_gpio_out(pc->dev->bus, 1, 1);
 568 --- a/drivers/ssb/embedded.c
 569 +++ b/drivers/ssb/embedded.c
 570 @@ -57,9 +57,8 @@ int ssb_watchdog_register(struct ssb_bus
 571                                              bus->busnumber, &wdt,
 572                                              sizeof(wdt));
 573         if (IS_ERR(pdev)) {
 574 -               ssb_dprintk(KERN_INFO PFX
 575 -                           "can not register watchdog device, err: %li\n",
 576 -                           PTR_ERR(pdev));
 577 +               ssb_dbg("can not register watchdog device, err: %li\n",
 578 +                       PTR_ERR(pdev));
 579                 return PTR_ERR(pdev);
 580         }
 581
 582 --- a/drivers/ssb/main.c
 583 +++ b/drivers/ssb/main.c
 584 @@ -275,8 +275,8 @@ int ssb_devices_thaw(struct ssb_freeze_c
 585
 586                 err = sdrv->probe(sdev, &sdev->id);
 587                 if (err) {
 588 -                       ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 589 -                                  dev_name(sdev->dev));
 590 +                       ssb_err("Failed to thaw device %s\n",
 591 +                               dev_name(sdev->dev));
 592                         result = err;
 593                 }
 594                 ssb_device_put(sdev);
 595 @@ -447,10 +447,9 @@ void ssb_bus_unregister(struct ssb_bus *
 596
 597         err = ssb_gpio_unregister(bus);
 598         if (err == -EBUSY)
 599 -               ssb_dprintk(KERN_ERR PFX "Some GPIOs are still in use.\n");
 600 +               ssb_dbg("Some GPIOs are still in use\n");
 601         else if (err)
 602 -               ssb_dprintk(KERN_ERR PFX
 603 -                           "Can not unregister GPIO driver: %i\n", err);
 604 +               ssb_dbg("Can not unregister GPIO driver: %i\n", err);
 605
 606         ssb_buses_lock();
 607         ssb_devices_unregister(bus);
 608 @@ -497,8 +496,7 @@ static int ssb_devices_register(struct s
 609
 610                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 611                 if (!devwrap) {
 612 -                       ssb_printk(KERN_ERR PFX
 613 -                                  "Could not allocate device\n");
 614 +                       ssb_err("Could not allocate device\n");
 615                         err = -ENOMEM;
 616                         goto error;
 617                 }
 618 @@ -537,9 +535,7 @@ static int ssb_devices_register(struct s
 619                 sdev->dev = dev;
 620                 err = device_register(dev);
 621                 if (err) {
 622 -                       ssb_printk(KERN_ERR PFX
 623 -                                  "Could not register %s\n",
 624 -                                  dev_name(dev));
 625 +                       ssb_err("Could not register %s\n", dev_name(dev));
 626                         /* Set dev to NULL to not unregister
 627                          * dev on error unwinding. */
 628                         sdev->dev = NULL;
 629 @@ -549,6 +545,14 @@ static int ssb_devices_register(struct s
 630                 dev_idx++;
 631         }
 632
 633 +#ifdef CONFIG_SSB_DRIVER_MIPS
 634 +       if (bus->mipscore.pflash.present) {
 635 +               err = platform_device_register(&ssb_pflash_dev);
 636 +               if (err)
 637 +                       pr_err("Error registering parallel flash\n");
 638 +       }
 639 +#endif
 640 +
 641         return 0;
 642  error:
 643         /* Unwind the already registered devices. */
 644 @@ -817,10 +821,9 @@ static int ssb_bus_register(struct ssb_b
 645         ssb_mipscore_init(&bus->mipscore);
 646         err = ssb_gpio_init(bus);
 647         if (err == -ENOTSUPP)
 648 -               ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
 649 +               ssb_dbg("GPIO driver not activated\n");
 650         else if (err)
 651 -               ssb_dprintk(KERN_ERR PFX
 652 -                          "Error registering GPIO driver: %i\n", err);
 653 +               ssb_dbg("Error registering GPIO driver: %i\n", err);
 654         err = ssb_fetch_invariants(bus, get_invariants);
 655         if (err) {
 656                 ssb_bus_may_powerdown(bus);
 657 @@ -870,11 +873,11 @@ int ssb_bus_pcibus_register(struct ssb_b
 658
 659         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 660         if (!err) {
 661 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 662 -                          "PCI device %s\n", dev_name(&host_pci->dev));
 663 +               ssb_info("Sonics Silicon Backplane found on PCI device %s\n",
 664 +                        dev_name(&host_pci->dev));
 665         } else {
 666 -               ssb_printk(KERN_ERR PFX "Failed to register PCI version"
 667 -                          " of SSB with error %d\n", err);
 668 +               ssb_err("Failed to register PCI version of SSB with error %d\n",
 669 +                       err);
 670         }
 671
 672         return err;
 673 @@ -895,8 +898,8 @@ int ssb_bus_pcmciabus_register(struct ss
 674
 675         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 676         if (!err) {
 677 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 678 -                          "PCMCIA device %s\n", pcmcia_dev->devname);
 679 +               ssb_info("Sonics Silicon Backplane found on PCMCIA device %s\n",
 680 +                        pcmcia_dev->devname);
 681         }
 682
 683         return err;
 684 @@ -917,8 +920,8 @@ int ssb_bus_sdiobus_register(struct ssb_
 685
 686         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
 687         if (!err) {
 688 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 689 -                          "SDIO device %s\n", sdio_func_id(func));
 690 +               ssb_info("Sonics Silicon Backplane found on SDIO device %s\n",
 691 +                        sdio_func_id(func));
 692         }
 693
 694         return err;
 695 @@ -936,8 +939,8 @@ int ssb_bus_ssbbus_register(struct ssb_b
 696
 697         err = ssb_bus_register(bus, get_invariants, baseaddr);
 698         if (!err) {
 699 -               ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 700 -                          "address 0x%08lX\n", baseaddr);
 701 +               ssb_info("Sonics Silicon Backplane found at address 0x%08lX\n",
 702 +                        baseaddr);
 703         }
 704
 705         return err;
 706 @@ -1331,7 +1334,7 @@ out:
 707  #endif
 708         return err;
 709  error:
 710 -       ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
 711 +       ssb_err("Bus powerdown failed\n");
 712         goto out;
 713  }
 714  EXPORT_SYMBOL(ssb_bus_may_powerdown);
 715 @@ -1354,7 +1357,7 @@ int ssb_bus_powerup(struct ssb_bus *bus,
 716
 717         return 0;
 718  error:
 719 -       ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
 720 +       ssb_err("Bus powerup failed\n");
 721         return err;
 722  }
 723  EXPORT_SYMBOL(ssb_bus_powerup);
 724 @@ -1462,15 +1465,13 @@ static int __init ssb_modinit(void)
 725
 726         err = b43_pci_ssb_bridge_init();
 727         if (err) {
 728 -               ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
 729 -                          "initialization failed\n");
 730 +               ssb_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
 731                 /* don't fail SSB init because of this */
 732                 err = 0;
 733         }
 734         err = ssb_gige_init();
 735         if (err) {
 736 -               ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
 737 -                          "driver initialization failed\n");
 738 +               ssb_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
 739                 /* don't fail SSB init because of this */
 740                 err = 0;
 741         }
 742 --- a/drivers/ssb/pci.c
 743 +++ b/drivers/ssb/pci.c
 744 @@ -56,7 +56,7 @@ int ssb_pci_switch_coreidx(struct ssb_bu
 745         }
 746         return 0;
 747  error:
 748 -       ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
 749 +       ssb_err("Failed to switch to core %u\n", coreidx);
 750         return -ENODEV;
 751  }
 752
 753 @@ -67,10 +67,9 @@ int ssb_pci_switch_core(struct ssb_bus *
 754         unsigned long flags;
 755
 756  #if SSB_VERBOSE_PCICORESWITCH_DEBUG
 757 -       ssb_printk(KERN_INFO PFX
 758 -                  "Switching to %s core, index %d\n",
 759 -                  ssb_core_name(dev->id.coreid),
 760 -                  dev->core_index);
 761 +       ssb_info("Switching to %s core, index %d\n",
 762 +                ssb_core_name(dev->id.coreid),
 763 +                dev->core_index);
 764  #endif
 765
 766         spin_lock_irqsave(&bus->bar_lock, flags);
 767 @@ -231,6 +230,15 @@ static inline u8 ssb_crc8(u8 crc, u8 dat
 768         return t[crc ^ data];
 769  }
 770
 771 +static void sprom_get_mac(char *mac, const u16 *in)
 772 +{
 773 +       int i;
 774 +       for (i = 0; i < 3; i++) {
 775 +               *mac++ = in[i] >> 8;
 776 +               *mac++ = in[i];
 777 +       }
 778 +}
 779 +
 780  static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
 781  {
 782         int word;
 783 @@ -278,7 +286,7 @@ static int sprom_do_write(struct ssb_bus
 784         u32 spromctl;
 785         u16 size = bus->sprom_size;
 786
 787 -       ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
 788 +       ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
 789         err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
 790         if (err)
 791                 goto err_ctlreg;
 792 @@ -286,17 +294,17 @@ static int sprom_do_write(struct ssb_bus
 793         err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
 794         if (err)
 795                 goto err_ctlreg;
 796 -       ssb_printk(KERN_NOTICE PFX "[ 0%%");
 797 +       ssb_notice("[ 0%%");
 798         msleep(500);
 799         for (i = 0; i < size; i++) {
 800                 if (i == size / 4)
 801 -                       ssb_printk("25%%");
 802 +                       ssb_cont("25%%");
 803                 else if (i == size / 2)
 804 -                       ssb_printk("50%%");
 805 +                       ssb_cont("50%%");
 806                 else if (i == (size * 3) / 4)
 807 -                       ssb_printk("75%%");
 808 +                       ssb_cont("75%%");
 809                 else if (i % 2)
 810 -                       ssb_printk(".");
 811 +                       ssb_cont(".");
 812                 writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
 813                 mmiowb();
 814                 msleep(20);
 815 @@ -309,12 +317,12 @@ static int sprom_do_write(struct ssb_bus
 816         if (err)
 817                 goto err_ctlreg;
 818         msleep(500);
 819 -       ssb_printk("100%% ]\n");
 820 -       ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
 821 +       ssb_cont("100%% ]\n");
 822 +       ssb_notice("SPROM written\n");
 823
 824         return 0;
 825  err_ctlreg:
 826 -       ssb_printk(KERN_ERR PFX "Could not access SPROM control register.\n");
 827 +       ssb_err("Could not access SPROM control register.\n");
 828         return err;
 829  }
 830
 831 @@ -339,10 +347,23 @@ static s8 r123_extract_antgain(u8 sprom_
 832         return (s8)gain;
 833  }
 834
 835 +static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
 836 +{
 837 +       SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
 838 +       SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
 839 +       SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
 840 +       SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
 841 +       SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
 842 +       SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
 843 +       SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
 844 +       SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
 845 +       SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
 846 +       SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
 847 +            SSB_SPROM2_MAXP_A_LO_SHIFT);
 848 +}
 849 +
 850  static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
 851  {
 852 -       int i;
 853 -       u16 v;
 854         u16 loc[3];
 855
 856         if (out->revision == 3)                 /* rev 3 moved MAC */
 857 @@ -352,19 +373,10 @@ static void sprom_extract_r123(struct ss
 858                 loc[1] = SSB_SPROM1_ET0MAC;
 859                 loc[2] = SSB_SPROM1_ET1MAC;
 860         }
 861 -       for (i = 0; i < 3; i++) {
 862 -               v = in[SPOFF(loc[0]) + i];
 863 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 864 -       }
 865 +       sprom_get_mac(out->il0mac, &in[SPOFF(loc[0])]);
 866         if (out->revision < 3) {        /* only rev 1-2 have et0, et1 */
 867 -               for (i = 0; i < 3; i++) {
 868 -                       v = in[SPOFF(loc[1]) + i];
 869 -                       *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
 870 -               }
 871 -               for (i = 0; i < 3; i++) {
 872 -                       v = in[SPOFF(loc[2]) + i];
 873 -                       *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
 874 -               }
 875 +               sprom_get_mac(out->et0mac, &in[SPOFF(loc[1])]);
 876 +               sprom_get_mac(out->et1mac, &in[SPOFF(loc[2])]);
 877         }
 878         SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
 879         SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
 880 @@ -372,6 +384,7 @@ static void sprom_extract_r123(struct ss
 881         SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
 882         SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
 883         SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
 884 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 885         if (out->revision == 1)
 886                 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
 887                      SSB_SPROM1_BINF_CCODE_SHIFT);
 888 @@ -398,8 +411,7 @@ static void sprom_extract_r123(struct ss
 889              SSB_SPROM1_ITSSI_A_SHIFT);
 890         SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
 891         SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
 892 -       if (out->revision >= 2)
 893 -               SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
 894 +
 895         SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
 896         SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
 897
 898 @@ -410,6 +422,8 @@ static void sprom_extract_r123(struct ss
 899         out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
 900                                                     SSB_SPROM1_AGAIN_A,
 901                                                     SSB_SPROM1_AGAIN_A_SHIFT);
 902 +       if (out->revision >= 2)
 903 +               sprom_extract_r23(out, in);
 904  }
 905
 906  /* Revs 4 5 and 8 have partially shared layout */
 907 @@ -454,23 +468,20 @@ static void sprom_extract_r458(struct ss
 908
 909  static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
 910  {
 911 -       int i;
 912 -       u16 v;
 913         u16 il0mac_offset;
 914
 915         if (out->revision == 4)
 916                 il0mac_offset = SSB_SPROM4_IL0MAC;
 917         else
 918                 il0mac_offset = SSB_SPROM5_IL0MAC;
 919 -       /* extract the MAC address */
 920 -       for (i = 0; i < 3; i++) {
 921 -               v = in[SPOFF(il0mac_offset) + i];
 922 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 923 -       }
 924 +
 925 +       sprom_get_mac(out->il0mac, &in[SPOFF(il0mac_offset)]);
 926 +
 927         SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
 928         SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
 929              SSB_SPROM4_ETHPHY_ET1A_SHIFT);
 930         SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
 931 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 932         if (out->revision == 4) {
 933                 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
 934                 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
 935 @@ -530,7 +541,7 @@ static void sprom_extract_r45(struct ssb
 936  static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
 937  {
 938         int i;
 939 -       u16 v, o;
 940 +       u16 o;
 941         u16 pwr_info_offset[] = {
 942                 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
 943                 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
 944 @@ -539,11 +550,10 @@ static void sprom_extract_r8(struct ssb_
 945                         ARRAY_SIZE(out->core_pwr_info));
 946
 947         /* extract the MAC address */
 948 -       for (i = 0; i < 3; i++) {
 949 -               v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
 950 -               *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
 951 -       }
 952 +       sprom_get_mac(out->il0mac, &in[SPOFF(SSB_SPROM8_IL0MAC)]);
 953 +
 954         SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
 955 +       SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
 956         SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
 957         SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
 958         SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
 959 @@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
 960         memset(out, 0, sizeof(*out));
 961
 962         out->revision = in[size - 1] & 0x00FF;
 963 -       ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
 964 +       ssb_dbg("SPROM revision %d detected\n", out->revision);
 965         memset(out->et0mac, 0xFF, 6);           /* preset et0 and et1 mac */
 966         memset(out->et1mac, 0xFF, 6);
 967
 968 @@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
 969                  * number stored in the SPROM.
 970                  * Always extract r1. */
 971                 out->revision = 1;
 972 -               ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
 973 +               ssb_dbg("SPROM treated as revision %d\n", out->revision);
 974         }
 975
 976         switch (out->revision) {
 977 @@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
 978                 sprom_extract_r8(out, in);
 979                 break;
 980         default:
 981 -               ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
 982 -                          " revision %d detected. Will extract"
 983 -                          " v1\n", out->revision);
 984 +               ssb_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
 985 +                        out->revision);
 986                 out->revision = 1;
 987                 sprom_extract_r123(out, in);
 988         }
 989 @@ -791,7 +800,7 @@ static int ssb_pci_sprom_get(struct ssb_
 990         u16 *buf;
 991
 992         if (!ssb_is_sprom_available(bus)) {
 993 -               ssb_printk(KERN_ERR PFX "No SPROM available!\n");
 994 +               ssb_err("No SPROM available!\n");
 995                 return -ENODEV;
 996         }
 997         if (bus->chipco.dev) {  /* can be unavailable! */
 998 @@ -810,7 +819,7 @@ static int ssb_pci_sprom_get(struct ssb_
 999         } else {
1000                 bus->sprom_offset = SSB_SPROM_BASE1;
1001         }
1002 -       ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
1003 +       ssb_dbg("SPROM offset is 0x%x\n", bus->sprom_offset);
1004
1005         buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
1006         if (!buf)
1007 @@ -835,18 +844,15 @@ static int ssb_pci_sprom_get(struct ssb_
1008                          * available for this device in some other storage */
1009                         err = ssb_fill_sprom_with_fallback(bus, sprom);
1010                         if (err) {
1011 -                               ssb_printk(KERN_WARNING PFX "WARNING: Using"
1012 -                                          " fallback SPROM failed (err %d)\n",
1013 -                                          err);
1014 +                               ssb_warn("WARNING: Using fallback SPROM failed (err %d)\n",
1015 +                                        err);
1016                         } else {
1017 -                               ssb_dprintk(KERN_DEBUG PFX "Using SPROM"
1018 -                                           " revision %d provided by"
1019 -                                           " platform.\n", sprom->revision);
1020 +                               ssb_dbg("Using SPROM revision %d provided by platform\n",
1021 +                                       sprom->revision);
1022                                 err = 0;
1023                                 goto out_free;
1024                         }
1025 -                       ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
1026 -                                  " SPROM CRC (corrupt SPROM)\n");
1027 +                       ssb_warn("WARNING: Invalid SPROM CRC (corrupt SPROM)\n");
1028                 }
1029         }
1030         err = sprom_extract(bus, sprom, buf, bus->sprom_size);
1031 --- a/drivers/ssb/pcmcia.c
1032 +++ b/drivers/ssb/pcmcia.c
1033 @@ -143,7 +143,7 @@ int ssb_pcmcia_switch_coreidx(struct ssb
1034
1035         return 0;
1036  error:
1037 -       ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
1038 +       ssb_err("Failed to switch to core %u\n", coreidx);
1039         return err;
1040  }
1041
1042 @@ -153,10 +153,9 @@ int ssb_pcmcia_switch_core(struct ssb_bu
1043         int err;
1044
1045  #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
1046 -       ssb_printk(KERN_INFO PFX
1047 -                  "Switching to %s core, index %d\n",
1048 -                  ssb_core_name(dev->id.coreid),
1049 -                  dev->core_index);
1050 +       ssb_info("Switching to %s core, index %d\n",
1051 +                ssb_core_name(dev->id.coreid),
1052 +                dev->core_index);
1053  #endif
1054
1055         err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
1056 @@ -192,7 +191,7 @@ int ssb_pcmcia_switch_segment(struct ssb
1057
1058         return 0;
1059  error:
1060 -       ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
1061 +       ssb_err("Failed to switch pcmcia segment\n");
1062         return err;
1063  }
1064
1065 @@ -549,44 +548,39 @@ static int ssb_pcmcia_sprom_write_all(st
1066         bool failed = 0;
1067         size_t size = SSB_PCMCIA_SPROM_SIZE;
1068
1069 -       ssb_printk(KERN_NOTICE PFX
1070 -                  "Writing SPROM. Do NOT turn off the power! "
1071 -                  "Please stand by...\n");
1072 +       ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
1073         err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
1074         if (err) {
1075 -               ssb_printk(KERN_NOTICE PFX
1076 -                          "Could not enable SPROM write access.\n");
1077 +               ssb_notice("Could not enable SPROM write access\n");
1078                 return -EBUSY;
1079         }
1080 -       ssb_printk(KERN_NOTICE PFX "[ 0%%");
1081 +       ssb_notice("[ 0%%");
1082         msleep(500);
1083         for (i = 0; i < size; i++) {
1084                 if (i == size / 4)
1085 -                       ssb_printk("25%%");
1086 +                       ssb_cont("25%%");
1087                 else if (i == size / 2)
1088 -                       ssb_printk("50%%");
1089 +                       ssb_cont("50%%");
1090                 else if (i == (size * 3) / 4)
1091 -                       ssb_printk("75%%");
1092 +                       ssb_cont("75%%");
1093                 else if (i % 2)
1094 -                       ssb_printk(".");
1095 +                       ssb_cont(".");
1096                 err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
1097                 if (err) {
1098 -                       ssb_printk(KERN_NOTICE PFX
1099 -                                  "Failed to write to SPROM.\n");
1100 +                       ssb_notice("Failed to write to SPROM\n");
1101                         failed = 1;
1102                         break;
1103                 }
1104         }
1105         err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
1106         if (err) {
1107 -               ssb_printk(KERN_NOTICE PFX
1108 -                          "Could not disable SPROM write access.\n");
1109 +               ssb_notice("Could not disable SPROM write access\n");
1110                 failed = 1;
1111         }
1112         msleep(500);
1113         if (!failed) {
1114 -               ssb_printk("100%% ]\n");
1115 -               ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
1116 +               ssb_cont("100%% ]\n");
1117 +               ssb_notice("SPROM written\n");
1118         }
1119
1120         return failed ? -EBUSY : 0;
1121 @@ -700,7 +694,7 @@ static int ssb_pcmcia_do_get_invariants(
1122         return -ENOSPC; /* continue with next entry */
1123
1124  error:
1125 -       ssb_printk(KERN_ERR PFX
1126 +       ssb_err(
1127                    "PCMCIA: Failed to fetch device invariants: %s\n",
1128                    error_description);
1129         return -ENODEV;
1130 @@ -722,7 +716,7 @@ int ssb_pcmcia_get_invariants(struct ssb
1131         res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
1132                                 ssb_pcmcia_get_mac, sprom);
1133         if (res != 0) {
1134 -               ssb_printk(KERN_ERR PFX
1135 +               ssb_err(
1136                         "PCMCIA: Failed to fetch MAC address\n");
1137                 return -ENODEV;
1138         }
1139 @@ -733,7 +727,7 @@ int ssb_pcmcia_get_invariants(struct ssb
1140         if ((res == 0) || (res == -ENOSPC))
1141                 return 0;
1142
1143 -       ssb_printk(KERN_ERR PFX
1144 +       ssb_err(
1145                         "PCMCIA: Failed to fetch device invariants\n");
1146         return -ENODEV;
1147  }
1148 @@ -843,6 +837,6 @@ int ssb_pcmcia_init(struct ssb_bus *bus)
1149
1150         return 0;
1151  error:
1152 -       ssb_printk(KERN_ERR PFX "Failed to initialize PCMCIA host device\n");
1153 +       ssb_err("Failed to initialize PCMCIA host device\n");
1154         return err;
1155  }
1156 --- a/drivers/ssb/scan.c
1157 +++ b/drivers/ssb/scan.c
1158 @@ -125,8 +125,7 @@ static u16 pcidev_to_chipid(struct pci_d
1159                 chipid_fallback = 0x4401;
1160                 break;
1161         default:
1162 -               ssb_printk(KERN_ERR PFX
1163 -                          "PCI-ID not in fallback list\n");
1164 +               ssb_err("PCI-ID not in fallback list\n");
1165         }
1166
1167         return chipid_fallback;
1168 @@ -152,8 +151,7 @@ static u8 chipid_to_nrcores(u16 chipid)
1169         case 0x4704:
1170                 return 9;
1171         default:
1172 -               ssb_printk(KERN_ERR PFX
1173 -                          "CHIPID not in nrcores fallback list\n");
1174 +               ssb_err("CHIPID not in nrcores fallback list\n");
1175         }
1176
1177         return 1;
1178 @@ -320,15 +318,13 @@ int ssb_bus_scan(struct ssb_bus *bus,
1179                         bus->chip_package = 0;
1180                 }
1181         }
1182 -       ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
1183 -                  "package 0x%02X\n", bus->chip_id, bus->chip_rev,
1184 -                  bus->chip_package);
1185 +       ssb_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
1186 +                bus->chip_id, bus->chip_rev, bus->chip_package);
1187         if (!bus->nr_devices)
1188                 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
1189         if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
1190 -               ssb_printk(KERN_ERR PFX
1191 -                          "More than %d ssb cores found (%d)\n",
1192 -                          SSB_MAX_NR_CORES, bus->nr_devices);
1193 +               ssb_err("More than %d ssb cores found (%d)\n",
1194 +                       SSB_MAX_NR_CORES, bus->nr_devices);
1195                 goto err_unmap;
1196         }
1197         if (bus->bustype == SSB_BUSTYPE_SSB) {
1198 @@ -370,8 +366,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1199                         nr_80211_cores++;
1200                         if (nr_80211_cores > 1) {
1201                                 if (!we_support_multiple_80211_cores(bus)) {
1202 -                                       ssb_dprintk(KERN_INFO PFX "Ignoring additional "
1203 -                                                   "802.11 core\n");
1204 +                                       ssb_dbg("Ignoring additional 802.11 core\n");
1205                                         continue;
1206                                 }
1207                         }
1208 @@ -379,8 +374,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1209                 case SSB_DEV_EXTIF:
1210  #ifdef CONFIG_SSB_DRIVER_EXTIF
1211                         if (bus->extif.dev) {
1212 -                               ssb_printk(KERN_WARNING PFX
1213 -                                          "WARNING: Multiple EXTIFs found\n");
1214 +                               ssb_warn("WARNING: Multiple EXTIFs found\n");
1215                                 break;
1216                         }
1217                         bus->extif.dev = dev;
1218 @@ -388,8 +382,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1219                         break;
1220                 case SSB_DEV_CHIPCOMMON:
1221                         if (bus->chipco.dev) {
1222 -                               ssb_printk(KERN_WARNING PFX
1223 -                                          "WARNING: Multiple ChipCommon found\n");
1224 +                               ssb_warn("WARNING: Multiple ChipCommon found\n");
1225                                 break;
1226                         }
1227                         bus->chipco.dev = dev;
1228 @@ -398,8 +391,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1229                 case SSB_DEV_MIPS_3302:
1230  #ifdef CONFIG_SSB_DRIVER_MIPS
1231                         if (bus->mipscore.dev) {
1232 -                               ssb_printk(KERN_WARNING PFX
1233 -                                          "WARNING: Multiple MIPS cores found\n");
1234 +                               ssb_warn("WARNING: Multiple MIPS cores found\n");
1235                                 break;
1236                         }
1237                         bus->mipscore.dev = dev;
1238 @@ -420,8 +412,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1239                                 }
1240                         }
1241                         if (bus->pcicore.dev) {
1242 -                               ssb_printk(KERN_WARNING PFX
1243 -                                          "WARNING: Multiple PCI(E) cores found\n");
1244 +                               ssb_warn("WARNING: Multiple PCI(E) cores found\n");
1245                                 break;
1246                         }
1247                         bus->pcicore.dev = dev;
1248 --- a/drivers/ssb/sprom.c
1249 +++ b/drivers/ssb/sprom.c
1250 @@ -127,13 +127,13 @@ ssize_t ssb_attr_sprom_store(struct ssb_
1251                 goto out_kfree;
1252         err = ssb_devices_freeze(bus, &freeze);
1253         if (err) {
1254 -               ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze all devices\n");
1255 +               ssb_err("SPROM write: Could not freeze all devices\n");
1256                 goto out_unlock;
1257         }
1258         res = sprom_write(bus, sprom);
1259         err = ssb_devices_thaw(&freeze);
1260         if (err)
1261 -               ssb_printk(KERN_ERR PFX "SPROM write: Could not thaw all devices\n");
1262 +               ssb_err("SPROM write: Could not thaw all devices\n");
1263  out_unlock:
1264         mutex_unlock(&bus->sprom_mutex);
1265  out_kfree:
1266 --- a/drivers/ssb/ssb_private.h
1267 +++ b/drivers/ssb/ssb_private.h
1268 @@ -9,16 +9,27 @@
1269  #define PFX    "ssb: "
1270
1271  #ifdef CONFIG_SSB_SILENT
1272 -# define ssb_printk(fmt, x...) do { /* nothing */ } while (0)
1273 +# define ssb_printk(fmt, ...)                                  \
1274 +       do { if (0) printk(fmt, ##__VA_ARGS__); } while (0)
1275  #else
1276 -# define ssb_printk            printk
1277 +# define ssb_printk(fmt, ...)                                  \
1278 +       printk(fmt, ##__VA_ARGS__)
1279  #endif /* CONFIG_SSB_SILENT */
1280
1281 +#define ssb_emerg(fmt, ...)    ssb_printk(KERN_EMERG PFX fmt, ##__VA_ARGS__)
1282 +#define ssb_err(fmt, ...)      ssb_printk(KERN_ERR PFX fmt, ##__VA_ARGS__)
1283 +#define ssb_warn(fmt, ...)     ssb_printk(KERN_WARNING PFX fmt, ##__VA_ARGS__)
1284 +#define ssb_notice(fmt, ...)   ssb_printk(KERN_NOTICE PFX fmt, ##__VA_ARGS__)
1285 +#define ssb_info(fmt, ...)     ssb_printk(KERN_INFO PFX fmt, ##__VA_ARGS__)
1286 +#define ssb_cont(fmt, ...)     ssb_printk(KERN_CONT fmt, ##__VA_ARGS__)
1287 +
1288  /* dprintk: Debugging printk; vanishes for non-debug compilation */
1289  #ifdef CONFIG_SSB_DEBUG
1290 -# define ssb_dprintk(fmt, x...)        ssb_printk(fmt , ##x)
1291 +# define ssb_dbg(fmt, ...)                                     \
1292 +       ssb_printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__)
1293  #else
1294 -# define ssb_dprintk(fmt, x...)        do { /* nothing */ } while (0)
1295 +# define ssb_dbg(fmt, ...)                                     \
1296 +       do { if (0) printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__); } while (0)
1297  #endif
1298
1299  #ifdef CONFIG_SSB_DEBUG
1300 @@ -217,6 +228,21 @@ extern u32 ssb_chipco_watchdog_timer_set
1301                                              u32 ticks);
1302  extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1303
1304 +/* driver_chipcommon_sflash.c */
1305 +#ifdef CONFIG_SSB_SFLASH
1306 +int ssb_sflash_init(struct ssb_chipcommon *cc);
1307 +#else
1308 +static inline int ssb_sflash_init(struct ssb_chipcommon *cc)
1309 +{
1310 +       pr_err("Serial flash not supported\n");
1311 +       return 0;
1312 +}
1313 +#endif /* CONFIG_SSB_SFLASH */
1314 +
1315 +#ifdef CONFIG_SSB_DRIVER_MIPS
1316 +extern struct platform_device ssb_pflash_dev;
1317 +#endif
1318 +
1319  #ifdef CONFIG_SSB_DRIVER_EXTIF
1320  extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
1321  extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1322 --- a/include/linux/ssb/ssb.h
1323 +++ b/include/linux/ssb/ssb.h
1324 @@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
1325
1326  struct ssb_sprom {
1327         u8 revision;
1328 -       u8 il0mac[6];           /* MAC address for 802.11b/g */
1329 -       u8 et0mac[6];           /* MAC address for Ethernet */
1330 -       u8 et1mac[6];           /* MAC address for 802.11a */
1331 +       u8 il0mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11b/g */
1332 +       u8 et0mac[6] __aligned(sizeof(u16));    /* MAC address for Ethernet */
1333 +       u8 et1mac[6] __aligned(sizeof(u16));    /* MAC address for 802.11a */
1334         u8 et0phyaddr;          /* MII address for enet0 */
1335         u8 et1phyaddr;          /* MII address for enet1 */
1336         u8 et0mdcport;          /* MDIO for enet0 */
1337 @@ -340,13 +340,61 @@ enum ssb_bustype {
1338  #define SSB_BOARDVENDOR_DELL   0x1028  /* Dell */
1339  #define SSB_BOARDVENDOR_HP     0x0E11  /* HP */
1340  /* board_type */
1341 +#define SSB_BOARD_BCM94301CB   0x0406
1342 +#define SSB_BOARD_BCM94301MP   0x0407
1343 +#define SSB_BOARD_BU4309       0x040A
1344 +#define SSB_BOARD_BCM94309CB   0x040B
1345 +#define SSB_BOARD_BCM4309MP    0x040C
1346 +#define SSB_BOARD_BU4306       0x0416
1347  #define SSB_BOARD_BCM94306MP   0x0418
1348  #define SSB_BOARD_BCM4309G     0x0421
1349  #define SSB_BOARD_BCM4306CB    0x0417
1350 -#define SSB_BOARD_BCM4309MP    0x040C
1351 +#define SSB_BOARD_BCM94306PC   0x0425  /* pcmcia 3.3v 4306 card */
1352 +#define SSB_BOARD_BCM94306CBSG 0x042B  /* with SiGe PA */
1353 +#define SSB_BOARD_PCSG94306    0x042D  /* with SiGe PA */
1354 +#define SSB_BOARD_BU4704SD     0x042E  /* with sdram */
1355 +#define SSB_BOARD_BCM94704AGR  0x042F  /* dual 11a/11g Router */
1356 +#define SSB_BOARD_BCM94308MP   0x0430  /* 11a-only minipci */
1357 +#define SSB_BOARD_BU4318       0x0447
1358 +#define SSB_BOARD_CB4318       0x0448
1359 +#define SSB_BOARD_MPG4318      0x0449
1360  #define SSB_BOARD_MP4318       0x044A
1361 -#define SSB_BOARD_BU4306       0x0416
1362 -#define SSB_BOARD_BU4309       0x040A
1363 +#define SSB_BOARD_SD4318       0x044B
1364 +#define SSB_BOARD_BCM94306P    0x044C  /* with SiGe */
1365 +#define SSB_BOARD_BCM94303MP   0x044E
1366 +#define SSB_BOARD_BCM94306MPM  0x0450
1367 +#define SSB_BOARD_BCM94306MPL  0x0453
1368 +#define SSB_BOARD_PC4303       0x0454  /* pcmcia */
1369 +#define SSB_BOARD_BCM94306MPLNA        0x0457
1370 +#define SSB_BOARD_BCM94306MPH  0x045B
1371 +#define SSB_BOARD_BCM94306PCIV 0x045C
1372 +#define SSB_BOARD_BCM94318MPGH 0x0463
1373 +#define SSB_BOARD_BU4311       0x0464
1374 +#define SSB_BOARD_BCM94311MC   0x0465
1375 +#define SSB_BOARD_BCM94311MCAG 0x0466
1376 +/* 4321 boards */
1377 +#define SSB_BOARD_BU4321       0x046B
1378 +#define SSB_BOARD_BU4321E      0x047C
1379 +#define SSB_BOARD_MP4321       0x046C
1380 +#define SSB_BOARD_CB2_4321     0x046D
1381 +#define SSB_BOARD_CB2_4321_AG  0x0066
1382 +#define SSB_BOARD_MC4321       0x046E
1383 +/* 4325 boards */
1384 +#define SSB_BOARD_BCM94325DEVBU        0x0490
1385 +#define SSB_BOARD_BCM94325BGABU        0x0491
1386 +#define SSB_BOARD_BCM94325SDGWB        0x0492
1387 +#define SSB_BOARD_BCM94325SDGMDL       0x04AA
1388 +#define SSB_BOARD_BCM94325SDGMDL2      0x04C6
1389 +#define SSB_BOARD_BCM94325SDGMDL3      0x04C9
1390 +#define SSB_BOARD_BCM94325SDABGWBA     0x04E1
1391 +/* 4322 boards */
1392 +#define SSB_BOARD_BCM94322MC   0x04A4
1393 +#define SSB_BOARD_BCM94322USB  0x04A8  /* dualband */
1394 +#define SSB_BOARD_BCM94322HM   0x04B0
1395 +#define SSB_BOARD_BCM94322USB2D        0x04Bf  /* single band discrete front end */
1396 +/* 4312 boards */
1397 +#define SSB_BOARD_BU4312       0x048A
1398 +#define SSB_BOARD_BCM4312MCGSG 0x04B5
1399  /* chip_package */
1400  #define SSB_CHIPPACK_BCM4712S  1       /* Small 200pin 4712 */
1401  #define SSB_CHIPPACK_BCM4712M  2       /* Medium 225pin 4712 */
1402 --- a/include/linux/ssb/ssb_driver_gige.h
1403 +++ b/include/linux/ssb/ssb_driver_gige.h
1404 @@ -97,21 +97,16 @@ static inline bool ssb_gige_must_flush_p
1405         return 0;
1406  }
1407
1408 -#ifdef CONFIG_BCM47XX
1409 -#include <asm/mach-bcm47xx/nvram.h>
1410  /* Get the device MAC address */
1411 -static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1412 -{
1413 -       char buf[20];
1414 -       if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
1415 -               return;
1416 -       nvram_parse_macaddr(buf, macaddr);
1417 -}
1418 -#else
1419 -static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1420 +static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1421  {
1422 +       struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
1423 +       if (!dev)
1424 +               return -ENODEV;
1425 +
1426 +       memcpy(macaddr, dev->dev->bus->sprom.et0mac, 6);
1427 +       return 0;
1428  }
1429 -#endif
1430
1431  extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
1432                                           struct pci_dev *pdev);
1433 @@ -175,6 +170,10 @@ static inline bool ssb_gige_must_flush_p
1434  {
1435         return 0;
1436  }
1437 +static inline int ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1438 +{
1439 +       return -ENODEV;
1440 +}
1441
1442  #endif /* CONFIG_SSB_DRIVER_GIGE */
1443  #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
1444 --- a/include/linux/ssb/ssb_driver_mips.h
1445 +++ b/include/linux/ssb/ssb_driver_mips.h
1446 @@ -45,6 +45,11 @@ void ssb_mipscore_init(struct ssb_mipsco
1447  {
1448  }
1449
1450 +static inline unsigned int ssb_mips_irq(struct ssb_device *dev)
1451 +{
1452 +       return 0;
1453 +}
1454 +
1455  #endif /* CONFIG_SSB_DRIVER_MIPS */
1456
1457  #endif /* LINUX_SSB_MIPSCORE_H_ */
1458 --- a/include/linux/ssb/ssb_regs.h
1459 +++ b/include/linux/ssb/ssb_regs.h
1460 @@ -289,11 +289,11 @@
1461  #define  SSB_SPROM4_ETHPHY_ET1A_SHIFT  5
1462  #define  SSB_SPROM4_ETHPHY_ET0M                (1<<14) /* MDIO for enet0 */
1463  #define  SSB_SPROM4_ETHPHY_ET1M                (1<<15) /* MDIO for enet1 */
1464 -#define SSB_SPROM4_ANTAVAIL            0x005D  /* Antenna available bitfields */
1465 -#define  SSB_SPROM4_ANTAVAIL_A         0x00FF  /* A-PHY bitfield */
1466 -#define  SSB_SPROM4_ANTAVAIL_A_SHIFT   0
1467 -#define  SSB_SPROM4_ANTAVAIL_BG                0xFF00  /* B-PHY and G-PHY bitfield */
1468 -#define  SSB_SPROM4_ANTAVAIL_BG_SHIFT  8
1469 +#define SSB_SPROM4_ANTAVAIL            0x005C  /* Antenna available bitfields */
1470 +#define  SSB_SPROM4_ANTAVAIL_BG                0x00FF  /* B-PHY and G-PHY bitfield */
1471 +#define  SSB_SPROM4_ANTAVAIL_BG_SHIFT  0
1472 +#define  SSB_SPROM4_ANTAVAIL_A         0xFF00  /* A-PHY bitfield */
1473 +#define  SSB_SPROM4_ANTAVAIL_A_SHIFT   8
1474  #define SSB_SPROM4_AGAIN01             0x005E  /* Antenna Gain (in dBm Q5.2) */
1475  #define  SSB_SPROM4_AGAIN0             0x00FF  /* Antenna 0 */
1476  #define  SSB_SPROM4_AGAIN0_SHIFT       0